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[/] [yacc/] [trunk/] [syn/] [xilinx/] [ram_module_altera.prj] - Blame information for rev 4


verilog work "ram1k3.v"
verilog work "ram1k2.v"
verilog work "ram1k1.v"
verilog work "ram1k0.v"
verilog work "ram_module_altera.v"

Line No.	Rev	Author	Line
1	2	tak.sugawa	`verilog work "ram1k3.v"`
2			`verilog work "ram1k2.v"`
3			`verilog work "ram1k1.v"`
4			`verilog work "ram1k0.v"`
5			`verilog work "ram_module_altera.v"`