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[/] [yacc/] [trunk/] [syn/] [xilinx/] [s3_vsmpl.prj] - Blame information for rev 4

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Line No. Rev Author Line
1 2 tak.sugawa 
verilog work "ram1k3.v"
2 
verilog work "ram1k2.v"
3 
verilog work "ram1k1.v"
4 
verilog work "ram1k0.v"
5 
verilog work "ram_module_altera.v"
6 
verilog work "decoder.v"
7 
verilog work "pc_module.v"
8 
verilog work "mul_div_module5.v"
9 
verilog work "alu.v"
10 
verilog work "shifter.v"
11 
verilog work "ram32x32.v"
12 
verilog work "ram32x32_xilinx.v"
13 
verilog work "pipelined_rfile.v"
14 
verilog work "uart_read.v"
15 
verilog work "fifo.v"
16 
verilog work "uart_write_cyclone.v"
17 
verilog work "yacc2.v"
18 
verilog work "s3_vsmpl.v"

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