1 |
35 |
sandroamt |
--------------------------------------------------------------------------------
|
2 |
|
|
---- ----
|
3 |
|
|
---- This file is part of the yaVGA project ----
|
4 |
|
|
---- http://www.opencores.org/?do=project&who=yavga ----
|
5 |
|
|
---- ----
|
6 |
|
|
---- Description ----
|
7 |
|
|
---- Implementation of yaVGA IP core ----
|
8 |
|
|
---- ----
|
9 |
|
|
---- To Do: ----
|
10 |
|
|
---- ----
|
11 |
|
|
---- ----
|
12 |
|
|
---- Author(s): ----
|
13 |
|
|
---- Sandro Amato, sdroamt@netscape.net ----
|
14 |
|
|
---- ----
|
15 |
|
|
--------------------------------------------------------------------------------
|
16 |
|
|
---- ----
|
17 |
|
|
---- Copyright (c) 2009, Sandro Amato ----
|
18 |
|
|
---- All rights reserved. ----
|
19 |
|
|
---- ----
|
20 |
|
|
---- Redistribution and use in source and binary forms, with or without ----
|
21 |
|
|
---- modification, are permitted provided that the following conditions ----
|
22 |
|
|
---- are met: ----
|
23 |
|
|
---- ----
|
24 |
|
|
---- * Redistributions of source code must retain the above ----
|
25 |
|
|
---- copyright notice, this list of conditions and the ----
|
26 |
|
|
---- following disclaimer. ----
|
27 |
|
|
---- * Redistributions in binary form must reproduce the above ----
|
28 |
|
|
---- copyright notice, this list of conditions and the ----
|
29 |
|
|
---- following disclaimer in the documentation and/or other ----
|
30 |
|
|
---- materials provided with the distribution. ----
|
31 |
|
|
---- * Neither the name of SANDRO AMATO nor the names of its ----
|
32 |
|
|
---- contributors may be used to endorse or promote products ----
|
33 |
|
|
---- derived from this software without specific prior written ----
|
34 |
|
|
---- permission. ----
|
35 |
|
|
---- ----
|
36 |
|
|
---- THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS ----
|
37 |
|
|
---- "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT ----
|
38 |
|
|
---- LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS ----
|
39 |
|
|
---- FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE ----
|
40 |
|
|
---- COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, ----
|
41 |
|
|
---- INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, ----
|
42 |
|
|
---- BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; ----
|
43 |
|
|
---- LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER ----
|
44 |
|
|
---- CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT ----
|
45 |
|
|
---- LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ----
|
46 |
|
|
---- ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE ----
|
47 |
|
|
---- POSSIBILITY OF SUCH DAMAGE. ----
|
48 |
|
|
--------------------------------------------------------------------------------
|
49 |
|
|
|
50 |
|
|
|
51 |
|
|
library IEEE;
|
52 |
|
|
use IEEE.STD_LOGIC_1164.all;
|
53 |
|
|
use IEEE.STD_LOGIC_ARITH.all;
|
54 |
|
|
use IEEE.STD_LOGIC_UNSIGNED.all;
|
55 |
|
|
|
56 |
|
|
use work.yavga_pkg.all;
|
57 |
|
|
|
58 |
|
|
-- Uncomment the following lines to use the declarations that are
|
59 |
|
|
-- provided for instantiating Xilinx primitive components.
|
60 |
|
|
library UNISIM;
|
61 |
|
|
use UNISIM.VComponents.all;
|
62 |
|
|
|
63 |
|
|
entity charmaps_ROM is
|
64 |
|
|
port (
|
65 |
|
|
i_EN : in std_logic; -- RAM Enable Input
|
66 |
|
|
i_clock : in std_logic; -- Clock
|
67 |
|
|
i_ADDR : in std_logic_vector(c_INTCHMAP_ADDR_BUS_W - 1 downto 0); -- 11-bit Address Input
|
68 |
|
|
o_DO : out std_logic_vector(c_INTCHMAP_DATA_BUS_W - 1 downto 0) -- 8-bit Data Output
|
69 |
|
|
);
|
70 |
|
|
end charmaps_ROM;
|
71 |
|
|
|
72 |
|
|
architecture Behavioral of charmaps_ROM is
|
73 |
|
|
signal s_EN : std_logic;
|
74 |
|
|
|
75 |
|
|
constant c_rom_size : natural := 2**c_INTCHMAP_ADDR_BUS_W;
|
76 |
|
|
|
77 |
|
|
type t_rom is array (c_rom_size-1 downto 0) of
|
78 |
|
|
std_logic_vector (c_INTCHMAP_DATA_BUS_W - 1 downto 0);
|
79 |
|
|
|
80 |
|
|
constant c_rom : t_rom := (
|
81 |
|
|
-- AUTOMATICALLY GENERATED... START
|