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[/] [yifive/] [trunk/] [caravel_yifive/] [verilog/] [dv/] [io_ports/] [io_ports.c] - Blame information for rev 2

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1 2 dinesha
/*
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 * SPDX-FileCopyrightText: 2020 Efabless Corporation
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 *
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 * Licensed under the Apache License, Version 2.0 (the "License");
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 * you may not use this file except in compliance with the License.
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 * You may obtain a copy of the License at
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 *
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 *      http://www.apache.org/licenses/LICENSE-2.0
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 *
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 * Unless required by applicable law or agreed to in writing, software
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 * distributed under the License is distributed on an "AS IS" BASIS,
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 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
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 * See the License for the specific language governing permissions and
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 * limitations under the License.
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 * SPDX-License-Identifier: Apache-2.0
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 */
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// This include is relative to $CARAVEL_PATH (see Makefile)
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#include "verilog/dv/caravel/defs.h"
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#include "verilog/dv/caravel/stub.c"
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/*
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        IO Test:
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                - Configures MPRJ lower 8-IO pins as outputs
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                - Observes counter value through the MPRJ lower 8 IO pins (in the testbench)
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*/
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void main()
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{
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        /*
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        IO Control Registers
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        | DM     | VTRIP | SLOW  | AN_POL | AN_SEL | AN_EN | MOD_SEL | INP_DIS | HOLDH | OEB_N | MGMT_EN |
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        | 3-bits | 1-bit | 1-bit | 1-bit  | 1-bit  | 1-bit | 1-bit   | 1-bit   | 1-bit | 1-bit | 1-bit   |
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        Output: 0000_0110_0000_1110  (0x1808) = GPIO_MODE_USER_STD_OUTPUT
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        | DM     | VTRIP | SLOW  | AN_POL | AN_SEL | AN_EN | MOD_SEL | INP_DIS | HOLDH | OEB_N | MGMT_EN |
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        | 110    | 0     | 0     | 0      | 0      | 0     | 0       | 1       | 0     | 0     | 0       |
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        Input: 0000_0001_0000_1111 (0x0402) = GPIO_MODE_USER_STD_INPUT_NOPULL
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        | DM     | VTRIP | SLOW  | AN_POL | AN_SEL | AN_EN | MOD_SEL | INP_DIS | HOLDH | OEB_N | MGMT_EN |
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        | 001    | 0     | 0     | 0      | 0      | 0     | 0       | 0       | 0     | 1     | 0       |
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        */
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        /* Set up the housekeeping SPI to be connected internally so    */
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        /* that external pin changes don't affect it.                   */
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        reg_spimaster_config = 0xa002;  // Enable, prescaler = 2,
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                                        // connect to housekeeping SPI
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        // Connect the housekeeping SPI to the SPI master
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        // so that the CSB line is not left floating.  This allows
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        // all of the GPIO pins to be used for user functions.
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        // Configure lower 8-IOs as user output
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        // Observe counter value in the testbench
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        reg_mprj_io_0 =  GPIO_MODE_USER_STD_OUTPUT;
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        reg_mprj_io_1 =  GPIO_MODE_USER_STD_OUTPUT;
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        reg_mprj_io_2 =  GPIO_MODE_USER_STD_OUTPUT;
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        reg_mprj_io_3 =  GPIO_MODE_USER_STD_OUTPUT;
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        reg_mprj_io_4 =  GPIO_MODE_USER_STD_OUTPUT;
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        reg_mprj_io_5 =  GPIO_MODE_USER_STD_OUTPUT;
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        reg_mprj_io_6 =  GPIO_MODE_USER_STD_OUTPUT;
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        reg_mprj_io_7 =  GPIO_MODE_USER_STD_OUTPUT;
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        /* Apply configuration */
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        reg_mprj_xfer = 1;
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        while (reg_mprj_xfer == 1);
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}
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