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[/] [z80control/] [trunk/] [DE1/] [ROM/] [HexFiles/] [rom.vhd] - Blame information for rev 12

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Line No. Rev Author Line
1 12 tylerapohl 
library IEEE;
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use IEEE.std_logic_1164.all;
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use ieee.numeric_std.all;
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entity rom is
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        port(
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                Clk : in std_logic;
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                A   : in std_logic_vector(13 downto 0);
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                D   : out std_logic_vector(7 downto 0)
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        );
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end rom;
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architecture rtl of rom is
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begin
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process (Clk)
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begin
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 if Clk'event and Clk = '1' then
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        case A is
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             when "00000000000000" => D <= x"C3";
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             when "00000000000001" => D <= x"72";
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             when "00000000000010" => D <= x"00";
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             when "00000000000011" => D <= x"FF";
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             when "00000000000100" => D <= x"AA";
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             when "00000000000101" => D <= x"00";
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             when "00000000000110" => D <= x"8C";
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             when "00000000000111" => D <= x"0C";
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             when "00000000001000" => D <= x"01";
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             when "00000000001001" => D <= x"00";
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             when "00000000001010" => D <= x"00";
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             when "00000000001011" => D <= x"00";
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             when "00000000001100" => D <= x"00";
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             when "00000000001101" => D <= x"00";
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             when "00000000001110" => D <= x"00";
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             when "00000000001111" => D <= x"00";
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             when "00000000010000" => D <= x"00";
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             when "00000000010001" => D <= x"00";
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             when "00000000010010" => D <= x"00";
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             when "00000000010011" => D <= x"00";
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             when "00000000010100" => D <= x"00";
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             when "00000000010101" => D <= x"00";
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             when "00000000010110" => D <= x"00";
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             when "00000000010111" => D <= x"00";
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             when "00000000011000" => D <= x"00";
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             when "00000000011001" => D <= x"00";
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             when "00000000011010" => D <= x"00";
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             when "00000000011011" => D <= x"00";
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             when "00000000011100" => D <= x"00";
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             when "00000000011101" => D <= x"00";
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             when "00000000011110" => D <= x"00";
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             when others => D <= "ZZZZZZZZ";
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        end case;
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 end if;
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end process;
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end;

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