OpenCores
URL https://opencores.org/ocsvn/z80soc/z80soc/trunk

Subversion Repositories z80soc

[/] [z80soc/] [trunk/] [V0.7.3/] [DE1/] [db/] [z80soc.hier_info] - Blame information for rev 46

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Line No. Rev Author Line
1 46 rrred 
|z80soc
2 
CLOCK_27 => ~NO_FANOUT~
3 
CLOCK_50 => clk_div:clkdiv_inst.clock_in_50Mhz
4 
CLOCK_50 => \random:rand_temp[0].CLK
5 
CLOCK_50 => \random:rand_temp[1].CLK
6 
CLOCK_50 => \random:rand_temp[2].CLK
7 
CLOCK_50 => \random:rand_temp[3].CLK
8 
CLOCK_50 => \random:rand_temp[4].CLK
9 
CLOCK_50 => \random:rand_temp[5].CLK
10 
CLOCK_50 => \random:rand_temp[6].CLK
11 
CLOCK_50 => \random:rand_temp[7].CLK
12 
CLOCK_50 => \random:rand_temp[8].CLK
13 
CLOCK_50 => \random:rand_temp[9].CLK
14 
CLOCK_50 => \random:rand_temp[10].CLK
15 
CLOCK_50 => \random:rand_temp[11].CLK
16 
CLOCK_50 => \random:rand_temp[12].CLK
17 
CLOCK_50 => \random:rand_temp[13].CLK
18 
CLOCK_50 => \random:rand_temp[14].CLK
19 
CLOCK_50 => \random:rand_temp[15].CLK
20 
CLOCK_50 => ps2_ascii_reg1[0].CLK
21 
CLOCK_50 => ps2_ascii_reg1[1].CLK
22 
CLOCK_50 => ps2_ascii_reg1[2].CLK
23 
CLOCK_50 => ps2_ascii_reg1[3].CLK
24 
CLOCK_50 => ps2_ascii_reg1[4].CLK
25 
CLOCK_50 => ps2_ascii_reg1[5].CLK
26 
CLOCK_50 => ps2_ascii_reg1[6].CLK
27 
CLOCK_50 => ps2_ascii_reg1[7].CLK
28 
CLOCK_50 => ps2_read.CLK
29 
CLOCK_50 => ps2kbd:ps2_kbd_inst.clock
30 
EXT_CLOCK => ~NO_FANOUT~
31 
KEY[0] => DI_CPU[0].DATAA
32 
KEY[1] => DI_CPU[1].DATAA
33 
KEY[2] => DI_CPU[2].DATAA
34 
KEY[3] => DI_CPU[3].DATAA
35 
SW[0] => DI_CPU[0].DATAB
36 
SW[1] => DI_CPU[1].DATAB
37 
SW[2] => DI_CPU[2].DATAB
38 
SW[3] => DI_CPU[3].DATAB
39 
SW[4] => DI_CPU[4].DATAB
40 
SW[5] => DI_CPU[5].DATAB
41 
SW[6] => DI_CPU[6].DATAB
42 
SW[7] => DI_CPU[7].DATAB
43 
SW[8] => Clk_Z80.OUTPUTSELECT
44 
SW[8] => LEDR[8].DATAIN
45 
SW[9] => LEDR[9].DATAIN
46 
SW[9] => T80se:z80_inst.RESET_n
47 
SW[9] => ps2kbd:ps2_kbd_inst.reset
48 
HEX0[0] <= decoder_7seg:DISPHEX0.HEX_DISP[0]
49 
HEX0[1] <= decoder_7seg:DISPHEX0.HEX_DISP[1]
50 
HEX0[2] <= decoder_7seg:DISPHEX0.HEX_DISP[2]
51 
HEX0[3] <= decoder_7seg:DISPHEX0.HEX_DISP[3]
52 
HEX0[4] <= decoder_7seg:DISPHEX0.HEX_DISP[4]
53 
HEX0[5] <= decoder_7seg:DISPHEX0.HEX_DISP[5]
54 
HEX0[6] <= decoder_7seg:DISPHEX0.HEX_DISP[6]
55 
HEX1[0] <= decoder_7seg:DISPHEX1.HEX_DISP[0]
56 
HEX1[1] <= decoder_7seg:DISPHEX1.HEX_DISP[1]
57 
HEX1[2] <= decoder_7seg:DISPHEX1.HEX_DISP[2]
58 
HEX1[3] <= decoder_7seg:DISPHEX1.HEX_DISP[3]
59 
HEX1[4] <= decoder_7seg:DISPHEX1.HEX_DISP[4]
60 
HEX1[5] <= decoder_7seg:DISPHEX1.HEX_DISP[5]
61 
HEX1[6] <= decoder_7seg:DISPHEX1.HEX_DISP[6]
62 
HEX2[0] <= decoder_7seg:DISPHEX2.HEX_DISP[0]
63 
HEX2[1] <= decoder_7seg:DISPHEX2.HEX_DISP[1]
64 
HEX2[2] <= decoder_7seg:DISPHEX2.HEX_DISP[2]
65 
HEX2[3] <= decoder_7seg:DISPHEX2.HEX_DISP[3]
66 
HEX2[4] <= decoder_7seg:DISPHEX2.HEX_DISP[4]
67 
HEX2[5] <= decoder_7seg:DISPHEX2.HEX_DISP[5]
68 
HEX2[6] <= decoder_7seg:DISPHEX2.HEX_DISP[6]
69 
HEX3[0] <= decoder_7seg:DISPHEX3.HEX_DISP[0]
70 
HEX3[1] <= decoder_7seg:DISPHEX3.HEX_DISP[1]
71 
HEX3[2] <= decoder_7seg:DISPHEX3.HEX_DISP[2]
72 
HEX3[3] <= decoder_7seg:DISPHEX3.HEX_DISP[3]
73 
HEX3[4] <= decoder_7seg:DISPHEX3.HEX_DISP[4]
74 
HEX3[5] <= decoder_7seg:DISPHEX3.HEX_DISP[5]
75 
HEX3[6] <= decoder_7seg:DISPHEX3.HEX_DISP[6]
76 
LEDG[0] <= \pinout_process:LEDG_sig[0].DB_MAX_OUTPUT_PORT_TYPE
77 
LEDG[1] <= \pinout_process:LEDG_sig[1].DB_MAX_OUTPUT_PORT_TYPE
78 
LEDG[2] <= \pinout_process:LEDG_sig[2].DB_MAX_OUTPUT_PORT_TYPE
79 
LEDG[3] <= \pinout_process:LEDG_sig[3].DB_MAX_OUTPUT_PORT_TYPE
80 
LEDG[4] <= \pinout_process:LEDG_sig[4].DB_MAX_OUTPUT_PORT_TYPE
81 
LEDG[5] <= \pinout_process:LEDG_sig[5].DB_MAX_OUTPUT_PORT_TYPE
82 
LEDG[6] <= \pinout_process:LEDG_sig[6].DB_MAX_OUTPUT_PORT_TYPE
83 
LEDG[7] <= \pinout_process:LEDG_sig[7].DB_MAX_OUTPUT_PORT_TYPE
84 
LEDR[0] <= \pinout_process:LEDR_sig[0].DB_MAX_OUTPUT_PORT_TYPE
85 
LEDR[1] <= \pinout_process:LEDR_sig[1].DB_MAX_OUTPUT_PORT_TYPE
86 
LEDR[2] <= \pinout_process:LEDR_sig[2].DB_MAX_OUTPUT_PORT_TYPE
87 
LEDR[3] <= \pinout_process:LEDR_sig[3].DB_MAX_OUTPUT_PORT_TYPE
88 
LEDR[4] <= \pinout_process:LEDR_sig[4].DB_MAX_OUTPUT_PORT_TYPE
89 
LEDR[5] <= \pinout_process:LEDR_sig[5].DB_MAX_OUTPUT_PORT_TYPE
90 
LEDR[6] <= \pinout_process:LEDR_sig[6].DB_MAX_OUTPUT_PORT_TYPE
91 
LEDR[7] <= \pinout_process:LEDR_sig[7].DB_MAX_OUTPUT_PORT_TYPE
92 
LEDR[8] <= SW[8].DB_MAX_OUTPUT_PORT_TYPE
93 
LEDR[9] <= SW[9].DB_MAX_OUTPUT_PORT_TYPE
94 
UART_TXD <= UART_TXD.DB_MAX_OUTPUT_PORT_TYPE
95 
UART_RXD => ~NO_FANOUT~
96 
IRDA_RXD => ~NO_FANOUT~
97 
DRAM_DQ[0] <> DRAM_DQ[0]
98 
DRAM_DQ[1] <> DRAM_DQ[1]
99 
DRAM_DQ[2] <> DRAM_DQ[2]
100 
DRAM_DQ[3] <> DRAM_DQ[3]
101 
DRAM_DQ[4] <> DRAM_DQ[4]
102 
DRAM_DQ[5] <> DRAM_DQ[5]
103 
DRAM_DQ[6] <> DRAM_DQ[6]
104 
DRAM_DQ[7] <> DRAM_DQ[7]
105 
DRAM_DQ[8] <> DRAM_DQ[8]
106 
DRAM_DQ[9] <> DRAM_DQ[9]
107 
DRAM_DQ[10] <> DRAM_DQ[10]
108 
DRAM_DQ[11] <> DRAM_DQ[11]
109 
DRAM_DQ[12] <> DRAM_DQ[12]
110 
DRAM_DQ[13] <> DRAM_DQ[13]
111 
DRAM_DQ[14] <> DRAM_DQ[14]
112 
DRAM_DQ[15] <> DRAM_DQ[15]
113 
DRAM_ADDR[0] <=
114 
DRAM_ADDR[1] <=
115 
DRAM_ADDR[2] <=
116 
DRAM_ADDR[3] <=
117 
DRAM_ADDR[4] <=
118 
DRAM_ADDR[5] <=
119 
DRAM_ADDR[6] <=
120 
DRAM_ADDR[7] <=
121 
DRAM_ADDR[8] <=
122 
DRAM_ADDR[9] <=
123 
DRAM_ADDR[10] <=
124 
DRAM_ADDR[11] <=
125 
DRAM_LDQM <=
126 
DRAM_UDQM <=
127 
DRAM_WE_N <=
128 
DRAM_CAS_N <=
129 
DRAM_RAS_N <=
130 
DRAM_CS_N <=
131 
DRAM_BA_0 <=
132 
DRAM_BA_1 <=
133 
DRAM_CLK <=
134 
DRAM_CKE <=
135 
FL_DQ[0] <> FL_DQ[0]
136 
FL_DQ[1] <> FL_DQ[1]
137 
FL_DQ[2] <> FL_DQ[2]
138 
FL_DQ[3] <> FL_DQ[3]
139 
FL_DQ[4] <> FL_DQ[4]
140 
FL_DQ[5] <> FL_DQ[5]
141 
FL_DQ[6] <> FL_DQ[6]
142 
FL_DQ[7] <> FL_DQ[7]
143 
FL_ADDR[0] <=
144 
FL_ADDR[1] <=
145 
FL_ADDR[2] <=
146 
FL_ADDR[3] <=
147 
FL_ADDR[4] <=
148 
FL_ADDR[5] <=
149 
FL_ADDR[6] <=
150 
FL_ADDR[7] <=
151 
FL_ADDR[8] <=
152 
FL_ADDR[9] <=
153 
FL_ADDR[10] <=
154 
FL_ADDR[11] <=
155 
FL_ADDR[12] <=
156 
FL_ADDR[13] <=
157 
FL_ADDR[14] <=
158 
FL_ADDR[15] <=
159 
FL_ADDR[16] <=
160 
FL_ADDR[17] <=
161 
FL_ADDR[18] <=
162 
FL_ADDR[19] <=
163 
FL_ADDR[20] <=
164 
FL_ADDR[21] <=
165 
FL_WE_N <=
166 
FL_RST_N <=
167 
FL_OE_N <=
168 
FL_CE_N <=
169 
SRAM_DQ[0] <> SRAM_DQ[0]
170 
SRAM_DQ[1] <> SRAM_DQ[1]
171 
SRAM_DQ[2] <> SRAM_DQ[2]
172 
SRAM_DQ[3] <> SRAM_DQ[3]
173 
SRAM_DQ[4] <> SRAM_DQ[4]
174 
SRAM_DQ[5] <> SRAM_DQ[5]
175 
SRAM_DQ[6] <> SRAM_DQ[6]
176 
SRAM_DQ[7] <> SRAM_DQ[7]
177 
SRAM_DQ[8] <> SRAM_DQ[8]
178 
SRAM_DQ[8] <> SRAM_DQ[8]
179 
SRAM_DQ[9] <> SRAM_DQ[9]
180 
SRAM_DQ[9] <> SRAM_DQ[9]
181 
SRAM_DQ[10] <> SRAM_DQ[10]
182 
SRAM_DQ[10] <> SRAM_DQ[10]
183 
SRAM_DQ[11] <> SRAM_DQ[11]
184 
SRAM_DQ[11] <> SRAM_DQ[11]
185 
SRAM_DQ[12] <> SRAM_DQ[12]
186 
SRAM_DQ[12] <> SRAM_DQ[12]
187 
SRAM_DQ[13] <> SRAM_DQ[13]
188 
SRAM_DQ[13] <> SRAM_DQ[13]
189 
SRAM_DQ[14] <> SRAM_DQ[14]
190 
SRAM_DQ[14] <> SRAM_DQ[14]
191 
SRAM_DQ[15] <> SRAM_DQ[15]
192 
SRAM_DQ[15] <> SRAM_DQ[15]
193 
SRAM_ADDR[0] <= T80se:z80_inst.A[0]
194 
SRAM_ADDR[1] <= T80se:z80_inst.A[1]
195 
SRAM_ADDR[2] <= T80se:z80_inst.A[2]
196 
SRAM_ADDR[3] <= T80se:z80_inst.A[3]
197 
SRAM_ADDR[4] <= T80se:z80_inst.A[4]
198 
SRAM_ADDR[5] <= T80se:z80_inst.A[5]
199 
SRAM_ADDR[6] <= T80se:z80_inst.A[6]
200 
SRAM_ADDR[7] <= T80se:z80_inst.A[7]
201 
SRAM_ADDR[8] <= T80se:z80_inst.A[8]
202 
SRAM_ADDR[9] <= T80se:z80_inst.A[9]
203 
SRAM_ADDR[10] <= T80se:z80_inst.A[10]
204 
SRAM_ADDR[11] <= T80se:z80_inst.A[11]
205 
SRAM_ADDR[12] <= T80se:z80_inst.A[12]
206 
SRAM_ADDR[13] <= T80se:z80_inst.A[13]
207 
SRAM_ADDR[14] <= Add0.DB_MAX_OUTPUT_PORT_TYPE
208 
SRAM_ADDR[15] <= Add0.DB_MAX_OUTPUT_PORT_TYPE
209 
SRAM_ADDR[16] <=
210 
SRAM_ADDR[17] <=
211 
SRAM_UB_N <=
212 
SRAM_LB_N <=
213 
SRAM_WE_N <= SRAM_DQ.DB_MAX_OUTPUT_PORT_TYPE
214 
SRAM_CE_N <=
215 
SRAM_OE_N <= SRAM_OE_N.DB_MAX_OUTPUT_PORT_TYPE
216 
SD_DAT => ~NO_FANOUT~
217 
SD_DAT3 <= SD_DAT3.DB_MAX_OUTPUT_PORT_TYPE
218 
SD_CMD <= SD_CMD.DB_MAX_OUTPUT_PORT_TYPE
219 
SD_CLK <= UART_TXD.DB_MAX_OUTPUT_PORT_TYPE
220 
TDI => ~NO_FANOUT~
221 
TCK => ~NO_FANOUT~
222 
TCS => ~NO_FANOUT~
223 
TDO <=
224 
I2C_SDAT <> I2C_SDAT
225 
I2C_SCLK <=
226 
PS2_DAT <> ps2kbd:ps2_kbd_inst.keyboard_data
227 
PS2_CLK <> ps2kbd:ps2_kbd_inst.keyboard_clk
228 
VGA_HS <= video:video_inst.VGA_HS
229 
VGA_VS <= video:video_inst.VGA_VS
230 
VGA_R[0] <= video:video_inst.VGA_R[0]
231 
VGA_R[1] <= video:video_inst.VGA_R[1]
232 
VGA_R[2] <= video:video_inst.VGA_R[2]
233 
VGA_R[3] <= video:video_inst.VGA_R[3]
234 
VGA_G[0] <= video:video_inst.VGA_G[0]
235 
VGA_G[1] <= video:video_inst.VGA_G[1]
236 
VGA_G[2] <= video:video_inst.VGA_G[2]
237 
VGA_G[3] <= video:video_inst.VGA_G[3]
238 
VGA_B[0] <= video:video_inst.VGA_B[0]
239 
VGA_B[1] <= video:video_inst.VGA_B[1]
240 
VGA_B[2] <= video:video_inst.VGA_B[2]
241 
VGA_B[3] <= video:video_inst.VGA_B[3]
242 
AUD_ADCLRCK <> AUD_ADCLRCK
243 
AUD_ADCDAT => ~NO_FANOUT~
244 
AUD_DACLRCK <> AUD_DACLRCK
245 
AUD_DACDAT <=
246 
AUD_BCLK <> AUD_BCLK
247 
AUD_XCK <=
248 
GPIO_0[0] <> GPIO_0[0]
249 
GPIO_0[1] <> GPIO_0[1]
250 
GPIO_0[2] <> GPIO_0[2]
251 
GPIO_0[3] <> GPIO_0[3]
252 
GPIO_0[4] <> GPIO_0[4]
253 
GPIO_0[5] <> GPIO_0[5]
254 
GPIO_0[6] <> GPIO_0[6]
255 
GPIO_0[7] <> GPIO_0[7]
256 
GPIO_0[8] <> GPIO_0[8]
257 
GPIO_0[9] <> GPIO_0[9]
258 
GPIO_0[10] <> GPIO_0[10]
259 
GPIO_0[11] <> GPIO_0[11]
260 
GPIO_0[12] <> GPIO_0[12]
261 
GPIO_0[13] <> GPIO_0[13]
262 
GPIO_0[14] <> GPIO_0[14]
263 
GPIO_0[15] <> GPIO_0[15]
264 
GPIO_0[16] <> GPIO_0[16]
265 
GPIO_0[17] <> GPIO_0[17]
266 
GPIO_0[18] <> GPIO_0[18]
267 
GPIO_0[19] <> GPIO_0[19]
268 
GPIO_0[20] <> GPIO_0[20]
269 
GPIO_0[21] <> GPIO_0[21]
270 
GPIO_0[22] <> GPIO_0[22]
271 
GPIO_0[23] <> GPIO_0[23]
272 
GPIO_0[24] <> GPIO_0[24]
273 
GPIO_0[25] <> GPIO_0[25]
274 
GPIO_0[26] <> GPIO_0[26]
275 
GPIO_0[27] <> GPIO_0[27]
276 
GPIO_0[28] <> GPIO_0[28]
277 
GPIO_0[29] <> GPIO_0[29]
278 
GPIO_0[30] <> GPIO_0[30]
279 
GPIO_0[31] <> GPIO_0[31]
280 
GPIO_0[32] <> GPIO_0[32]
281 
GPIO_0[33] <> GPIO_0[33]
282 
GPIO_0[34] <> GPIO_0[34]
283 
GPIO_0[35] <> GPIO_0[35]
284 
GPIO_1[0] <> GPIO_1[0]
285 
GPIO_1[1] <> GPIO_1[1]
286 
GPIO_1[2] <> GPIO_1[2]
287 
GPIO_1[3] <> GPIO_1[3]
288 
GPIO_1[4] <> GPIO_1[4]
289 
GPIO_1[5] <> GPIO_1[5]
290 
GPIO_1[6] <> GPIO_1[6]
291 
GPIO_1[7] <> GPIO_1[7]
292 
GPIO_1[8] <> GPIO_1[8]
293 
GPIO_1[9] <> GPIO_1[9]
294 
GPIO_1[10] <> GPIO_1[10]
295 
GPIO_1[11] <> GPIO_1[11]
296 
GPIO_1[12] <> GPIO_1[12]
297 
GPIO_1[13] <> GPIO_1[13]
298 
GPIO_1[14] <> GPIO_1[14]
299 
GPIO_1[15] <> GPIO_1[15]
300 
GPIO_1[16] <> GPIO_1[16]
301 
GPIO_1[17] <> GPIO_1[17]
302 
GPIO_1[18] <> GPIO_1[18]
303 
GPIO_1[19] <> GPIO_1[19]
304 
GPIO_1[20] <> GPIO_1[20]
305 
GPIO_1[21] <> GPIO_1[21]
306 
GPIO_1[22] <> GPIO_1[22]
307 
GPIO_1[23] <> GPIO_1[23]
308 
GPIO_1[24] <> GPIO_1[24]
309 
GPIO_1[25] <> GPIO_1[25]
310 
GPIO_1[26] <> GPIO_1[26]
311 
GPIO_1[27] <> GPIO_1[27]
312 
GPIO_1[28] <> GPIO_1[28]
313 
GPIO_1[29] <> GPIO_1[29]
314 
GPIO_1[30] <> GPIO_1[30]
315 
GPIO_1[31] <> GPIO_1[31]
316 
GPIO_1[32] <> GPIO_1[32]
317 
GPIO_1[33] <> GPIO_1[33]
318 
GPIO_1[34] <> GPIO_1[34]
319 
GPIO_1[35] <> GPIO_1[35]
320 
 
321 
 
322 
|z80soc|T80se:z80_inst
323 
RESET_n => T80:u0.RESET_n
324 
RESET_n => DI_Reg[0].ACLR
325 
RESET_n => DI_Reg[1].ACLR
326 
RESET_n => DI_Reg[2].ACLR
327 
RESET_n => DI_Reg[3].ACLR
328 
RESET_n => DI_Reg[4].ACLR
329 
RESET_n => DI_Reg[5].ACLR
330 
RESET_n => DI_Reg[6].ACLR
331 
RESET_n => DI_Reg[7].ACLR
332 
RESET_n => MREQ_n~reg0.PRESET
333 
RESET_n => IORQ_n~reg0.PRESET
334 
RESET_n => WR_n~reg0.PRESET
335 
RESET_n => RD_n~reg0.PRESET
336 
CLK_n => T80:u0.CLK_n
337 
CLK_n => DI_Reg[0].CLK
338 
CLK_n => DI_Reg[1].CLK
339 
CLK_n => DI_Reg[2].CLK
340 
CLK_n => DI_Reg[3].CLK
341 
CLK_n => DI_Reg[4].CLK
342 
CLK_n => DI_Reg[5].CLK
343 
CLK_n => DI_Reg[6].CLK
344 
CLK_n => DI_Reg[7].CLK
345 
CLK_n => MREQ_n~reg0.CLK
346 
CLK_n => IORQ_n~reg0.CLK
347 
CLK_n => WR_n~reg0.CLK
348 
CLK_n => RD_n~reg0.CLK
349 
CLKEN => T80:u0.CEN
350 
CLKEN => DI_Reg[0].ENA
351 
CLKEN => RD_n~reg0.ENA
352 
CLKEN => WR_n~reg0.ENA
353 
CLKEN => IORQ_n~reg0.ENA
354 
CLKEN => MREQ_n~reg0.ENA
355 
CLKEN => DI_Reg[7].ENA
356 
CLKEN => DI_Reg[6].ENA
357 
CLKEN => DI_Reg[5].ENA
358 
CLKEN => DI_Reg[4].ENA
359 
CLKEN => DI_Reg[3].ENA
360 
CLKEN => DI_Reg[2].ENA
361 
CLKEN => DI_Reg[1].ENA
362 
WAIT_n => process_0.IN1
363 
WAIT_n => T80:u0.WAIT_n
364 
WAIT_n => process_0.IN1
365 
INT_n => T80:u0.INT_n
366 
NMI_n => T80:u0.NMI_n
367 
BUSRQ_n => T80:u0.BUSRQ_n
368 
M1_n <= T80:u0.M1_n
369 
MREQ_n <= MREQ_n~reg0.DB_MAX_OUTPUT_PORT_TYPE
370 
IORQ_n <= IORQ_n~reg0.DB_MAX_OUTPUT_PORT_TYPE
371 
RD_n <= RD_n~reg0.DB_MAX_OUTPUT_PORT_TYPE
372 
WR_n <= WR_n~reg0.DB_MAX_OUTPUT_PORT_TYPE
373 
RFSH_n <= T80:u0.RFSH_n
374 
HALT_n <= T80:u0.HALT_n
375 
BUSAK_n <= T80:u0.BUSAK_n
376 
A[0] <= T80:u0.A[0]
377 
A[1] <= T80:u0.A[1]
378 
A[2] <= T80:u0.A[2]
379 
A[3] <= T80:u0.A[3]
380 
A[4] <= T80:u0.A[4]
381 
A[5] <= T80:u0.A[5]
382 
A[6] <= T80:u0.A[6]
383 
A[7] <= T80:u0.A[7]
384 
A[8] <= T80:u0.A[8]
385 
A[9] <= T80:u0.A[9]
386 
A[10] <= T80:u0.A[10]
387 
A[11] <= T80:u0.A[11]
388 
A[12] <= T80:u0.A[12]
389 
A[13] <= T80:u0.A[13]
390 
A[14] <= T80:u0.A[14]
391 
A[15] <= T80:u0.A[15]
392 
DI[0] => DI_Reg.DATAB
393 
DI[0] => T80:u0.DInst[0]
394 
DI[1] => DI_Reg.DATAB
395 
DI[1] => T80:u0.DInst[1]
396 
DI[2] => DI_Reg.DATAB
397 
DI[2] => T80:u0.DInst[2]
398 
DI[3] => DI_Reg.DATAB
399 
DI[3] => T80:u0.DInst[3]
400 
DI[4] => DI_Reg.DATAB
401 
DI[4] => T80:u0.DInst[4]
402 
DI[5] => DI_Reg.DATAB
403 
DI[5] => T80:u0.DInst[5]
404 
DI[6] => DI_Reg.DATAB
405 
DI[6] => T80:u0.DInst[6]
406 
DI[7] => DI_Reg.DATAB
407 
DI[7] => T80:u0.DInst[7]
408 
DO[0] <= T80:u0.DO[0]
409 
DO[1] <= T80:u0.DO[1]
410 
DO[2] <= T80:u0.DO[2]
411 
DO[3] <= T80:u0.DO[3]
412 
DO[4] <= T80:u0.DO[4]
413 
DO[5] <= T80:u0.DO[5]
414 
DO[6] <= T80:u0.DO[6]
415 
DO[7] <= T80:u0.DO[7]
416 
 
417 
 
418 
|z80soc|T80se:z80_inst|T80:u0
419 
RESET_n => XY_Ind.ACLR
420 
RESET_n => PreserveC_r.ACLR
421 
RESET_n => Save_ALU_r.ACLR
422 
RESET_n => ALU_Op_r[0].ACLR
423 
RESET_n => ALU_Op_r[1].ACLR
424 
RESET_n => ALU_Op_r[2].ACLR
425 
RESET_n => ALU_Op_r[3].ACLR
426 
RESET_n => Z16_r.ACLR
427 
RESET_n => BTR_r.ACLR
428 
RESET_n => Arith16_r.ACLR
429 
RESET_n => Read_To_Reg_r[0].ACLR
430 
RESET_n => Read_To_Reg_r[1].ACLR
431 
RESET_n => Read_To_Reg_r[2].ACLR
432 
RESET_n => Read_To_Reg_r[3].ACLR
433 
RESET_n => Read_To_Reg_r[4].ACLR
434 
RESET_n => Alternate.ACLR
435 
RESET_n => SP[0].PRESET
436 
RESET_n => SP[1].PRESET
437 
RESET_n => SP[2].PRESET
438 
RESET_n => SP[3].PRESET
439 
RESET_n => SP[4].PRESET
440 
RESET_n => SP[5].PRESET
441 
RESET_n => SP[6].PRESET
442 
RESET_n => SP[7].PRESET
443 
RESET_n => SP[8].PRESET
444 
RESET_n => SP[9].PRESET
445 
RESET_n => SP[10].PRESET
446 
RESET_n => SP[11].PRESET
447 
RESET_n => SP[12].PRESET
448 
RESET_n => SP[13].PRESET
449 
RESET_n => SP[14].PRESET
450 
RESET_n => SP[15].PRESET
451 
RESET_n => R[0].ACLR
452 
RESET_n => R[1].ACLR
453 
RESET_n => R[2].ACLR
454 
RESET_n => R[3].ACLR
455 
RESET_n => R[4].ACLR
456 
RESET_n => R[5].ACLR
457 
RESET_n => R[6].ACLR
458 
RESET_n => R[7].ACLR
459 
RESET_n => I[0].ACLR
460 
RESET_n => I[1].ACLR
461 
RESET_n => I[2].ACLR
462 
RESET_n => I[3].ACLR
463 
RESET_n => I[4].ACLR
464 
RESET_n => I[5].ACLR
465 
RESET_n => I[6].ACLR
466 
RESET_n => I[7].ACLR
467 
RESET_n => Fp[0].PRESET
468 
RESET_n => Fp[1].PRESET
469 
RESET_n => Fp[2].PRESET
470 
RESET_n => Fp[3].PRESET
471 
RESET_n => Fp[4].PRESET
472 
RESET_n => Fp[5].PRESET
473 
RESET_n => Fp[6].PRESET
474 
RESET_n => Fp[7].PRESET
475 
RESET_n => Ap[0].PRESET
476 
RESET_n => Ap[1].PRESET
477 
RESET_n => Ap[2].PRESET
478 
RESET_n => Ap[3].PRESET
479 
RESET_n => Ap[4].PRESET
480 
RESET_n => Ap[5].PRESET
481 
RESET_n => Ap[6].PRESET
482 
RESET_n => Ap[7].PRESET
483 
RESET_n => F[0].PRESET
484 
RESET_n => F[1].PRESET
485 
RESET_n => F[2].PRESET
486 
RESET_n => F[3].PRESET
487 
RESET_n => F[4].PRESET
488 
RESET_n => F[5].PRESET
489 
RESET_n => F[6].PRESET
490 
RESET_n => F[7].PRESET
491 
RESET_n => ACC[0].PRESET
492 
RESET_n => ACC[1].PRESET
493 
RESET_n => ACC[2].PRESET
494 
RESET_n => ACC[3].PRESET
495 
RESET_n => ACC[4].PRESET
496 
RESET_n => ACC[5].PRESET
497 
RESET_n => ACC[6].PRESET
498 
RESET_n => ACC[7].PRESET
499 
RESET_n => DO[0]~reg0.ACLR
500 
RESET_n => DO[1]~reg0.ACLR
501 
RESET_n => DO[2]~reg0.ACLR
502 
RESET_n => DO[3]~reg0.ACLR
503 
RESET_n => DO[4]~reg0.ACLR
504 
RESET_n => DO[5]~reg0.ACLR
505 
RESET_n => DO[6]~reg0.ACLR
506 
RESET_n => DO[7]~reg0.ACLR
507 
RESET_n => MCycles[0].ACLR
508 
RESET_n => MCycles[1].ACLR
509 
RESET_n => MCycles[2].ACLR
510 
RESET_n => IStatus[0].ACLR
511 
RESET_n => IStatus[1].ACLR
512 
RESET_n => XY_State[0].ACLR
513 
RESET_n => XY_State[1].ACLR
514 
RESET_n => ISet[0].ACLR
515 
RESET_n => ISet[1].ACLR
516 
RESET_n => IR[0].ACLR
517 
RESET_n => IR[1].ACLR
518 
RESET_n => IR[2].ACLR
519 
RESET_n => IR[3].ACLR
520 
RESET_n => IR[4].ACLR
521 
RESET_n => IR[5].ACLR
522 
RESET_n => IR[6].ACLR
523 
RESET_n => IR[7].ACLR
524 
RESET_n => TmpAddr[0].ACLR
525 
RESET_n => TmpAddr[1].ACLR
526 
RESET_n => TmpAddr[2].ACLR
527 
RESET_n => TmpAddr[3].ACLR
528 
RESET_n => TmpAddr[4].ACLR
529 
RESET_n => TmpAddr[5].ACLR
530 
RESET_n => TmpAddr[6].ACLR
531 
RESET_n => TmpAddr[7].ACLR
532 
RESET_n => TmpAddr[8].ACLR
533 
RESET_n => TmpAddr[9].ACLR
534 
RESET_n => TmpAddr[10].ACLR
535 
RESET_n => TmpAddr[11].ACLR
536 
RESET_n => TmpAddr[12].ACLR
537 
RESET_n => TmpAddr[13].ACLR
538 
RESET_n => TmpAddr[14].ACLR
539 
RESET_n => TmpAddr[15].ACLR
540 
RESET_n => A[0]~reg0.ACLR
541 
RESET_n => A[1]~reg0.ACLR
542 
RESET_n => A[2]~reg0.ACLR
543 
RESET_n => A[3]~reg0.ACLR
544 
RESET_n => A[4]~reg0.ACLR
545 
RESET_n => A[5]~reg0.ACLR
546 
RESET_n => A[6]~reg0.ACLR
547 
RESET_n => A[7]~reg0.ACLR
548 
RESET_n => A[8]~reg0.ACLR
549 
RESET_n => A[9]~reg0.ACLR
550 
RESET_n => A[10]~reg0.ACLR
551 
RESET_n => A[11]~reg0.ACLR
552 
RESET_n => A[12]~reg0.ACLR
553 
RESET_n => A[13]~reg0.ACLR
554 
RESET_n => A[14]~reg0.ACLR
555 
RESET_n => A[15]~reg0.ACLR
556 
RESET_n => PC[0].ACLR
557 
RESET_n => PC[1].ACLR
558 
RESET_n => PC[2].ACLR
559 
RESET_n => PC[3].ACLR
560 
RESET_n => PC[4].ACLR
561 
RESET_n => PC[5].ACLR
562 
RESET_n => PC[6].ACLR
563 
RESET_n => PC[7].ACLR
564 
RESET_n => PC[8].ACLR
565 
RESET_n => PC[9].ACLR
566 
RESET_n => PC[10].ACLR
567 
RESET_n => PC[11].ACLR
568 
RESET_n => PC[12].ACLR
569 
RESET_n => PC[13].ACLR
570 
RESET_n => PC[14].ACLR
571 
RESET_n => PC[15].ACLR
572 
RESET_n => M1_n~reg0.PRESET
573 
RESET_n => Auto_Wait_t2.ACLR
574 
RESET_n => Auto_Wait_t1.ACLR
575 
RESET_n => No_BTR.ACLR
576 
RESET_n => IntE_FF2.ACLR
577 
RESET_n => IntE_FF1.ACLR
578 
RESET_n => IntCycle.ACLR
579 
RESET_n => NMICycle.ACLR
580 
RESET_n => BusAck.ACLR
581 
RESET_n => Halt_FF.ACLR
582 
RESET_n => Pre_XY_F_M[0].ACLR
583 
RESET_n => Pre_XY_F_M[1].ACLR
584 
RESET_n => Pre_XY_F_M[2].ACLR
585 
RESET_n => TState[0].ACLR
586 
RESET_n => TState[1].ACLR
587 
RESET_n => TState[2].ACLR
588 
RESET_n => MCycle[0].PRESET
589 
RESET_n => MCycle[1].ACLR
590 
RESET_n => MCycle[2].ACLR
591 
RESET_n => RFSH_n~reg0.PRESET
592 
RESET_n => NMI_s.ACLR
593 
RESET_n => INT_s.ACLR
594 
RESET_n => BusReq_s.ACLR
595 
RESET_n => OldNMI_n.ACLR
596 
CLK_n => T80_Reg:Regs.Clk
597 
CLK_n => M1_n~reg0.CLK
598 
CLK_n => Auto_Wait_t2.CLK
599 
CLK_n => Auto_Wait_t1.CLK
600 
CLK_n => No_BTR.CLK
601 
CLK_n => IntE_FF2.CLK
602 
CLK_n => IntE_FF1.CLK
603 
CLK_n => IntCycle.CLK
604 
CLK_n => NMICycle.CLK
605 
CLK_n => BusAck.CLK
606 
CLK_n => Halt_FF.CLK
607 
CLK_n => Pre_XY_F_M[0].CLK
608 
CLK_n => Pre_XY_F_M[1].CLK
609 
CLK_n => Pre_XY_F_M[2].CLK
610 
CLK_n => TState[0].CLK
611 
CLK_n => TState[1].CLK
612 
CLK_n => TState[2].CLK
613 
CLK_n => MCycle[0].CLK
614 
CLK_n => MCycle[1].CLK
615 
CLK_n => MCycle[2].CLK
616 
CLK_n => NMI_s.CLK
617 
CLK_n => INT_s.CLK
618 
CLK_n => BusReq_s.CLK
619 
CLK_n => OldNMI_n.CLK
620 
CLK_n => RFSH_n~reg0.CLK
621 
CLK_n => BusA[0].CLK
622 
CLK_n => BusA[1].CLK
623 
CLK_n => BusA[2].CLK
624 
CLK_n => BusA[3].CLK
625 
CLK_n => BusA[4].CLK
626 
CLK_n => BusA[5].CLK
627 
CLK_n => BusA[6].CLK
628 
CLK_n => BusA[7].CLK
629 
CLK_n => BusB[0].CLK
630 
CLK_n => BusB[1].CLK
631 
CLK_n => BusB[2].CLK
632 
CLK_n => BusB[3].CLK
633 
CLK_n => BusB[4].CLK
634 
CLK_n => BusB[5].CLK
635 
CLK_n => BusB[6].CLK
636 
CLK_n => BusB[7].CLK
637 
CLK_n => RegBusA_r[0].CLK
638 
CLK_n => RegBusA_r[1].CLK
639 
CLK_n => RegBusA_r[2].CLK
640 
CLK_n => RegBusA_r[3].CLK
641 
CLK_n => RegBusA_r[4].CLK
642 
CLK_n => RegBusA_r[5].CLK
643 
CLK_n => RegBusA_r[6].CLK
644 
CLK_n => RegBusA_r[7].CLK
645 
CLK_n => RegBusA_r[8].CLK
646 
CLK_n => RegBusA_r[9].CLK
647 
CLK_n => RegBusA_r[10].CLK
648 
CLK_n => RegBusA_r[11].CLK
649 
CLK_n => RegBusA_r[12].CLK
650 
CLK_n => RegBusA_r[13].CLK
651 
CLK_n => RegBusA_r[14].CLK
652 
CLK_n => RegBusA_r[15].CLK
653 
CLK_n => IncDecZ.CLK
654 
CLK_n => RegAddrC[0].CLK
655 
CLK_n => RegAddrC[1].CLK
656 
CLK_n => RegAddrC[2].CLK
657 
CLK_n => RegAddrB_r[0].CLK
658 
CLK_n => RegAddrB_r[1].CLK
659 
CLK_n => RegAddrB_r[2].CLK
660 
CLK_n => RegAddrA_r[0].CLK
661 
CLK_n => RegAddrA_r[1].CLK
662 
CLK_n => RegAddrA_r[2].CLK
663 
CLK_n => XY_Ind.CLK
664 
CLK_n => PreserveC_r.CLK
665 
CLK_n => Save_ALU_r.CLK
666 
CLK_n => ALU_Op_r[0].CLK
667 
CLK_n => ALU_Op_r[1].CLK
668 
CLK_n => ALU_Op_r[2].CLK
669 
CLK_n => ALU_Op_r[3].CLK
670 
CLK_n => Z16_r.CLK
671 
CLK_n => BTR_r.CLK
672 
CLK_n => Arith16_r.CLK
673 
CLK_n => Read_To_Reg_r[0].CLK
674 
CLK_n => Read_To_Reg_r[1].CLK
675 
CLK_n => Read_To_Reg_r[2].CLK
676 
CLK_n => Read_To_Reg_r[3].CLK
677 
CLK_n => Read_To_Reg_r[4].CLK
678 
CLK_n => Alternate.CLK
679 
CLK_n => SP[0].CLK
680 
CLK_n => SP[1].CLK
681 
CLK_n => SP[2].CLK
682 
CLK_n => SP[3].CLK
683 
CLK_n => SP[4].CLK
684 
CLK_n => SP[5].CLK
685 
CLK_n => SP[6].CLK
686 
CLK_n => SP[7].CLK
687 
CLK_n => SP[8].CLK
688 
CLK_n => SP[9].CLK
689 
CLK_n => SP[10].CLK
690 
CLK_n => SP[11].CLK
691 
CLK_n => SP[12].CLK
692 
CLK_n => SP[13].CLK
693 
CLK_n => SP[14].CLK
694 
CLK_n => SP[15].CLK
695 
CLK_n => R[0].CLK
696 
CLK_n => R[1].CLK
697 
CLK_n => R[2].CLK
698 
CLK_n => R[3].CLK
699 
CLK_n => R[4].CLK
700 
CLK_n => R[5].CLK
701 
CLK_n => R[6].CLK
702 
CLK_n => R[7].CLK
703 
CLK_n => I[0].CLK
704 
CLK_n => I[1].CLK
705 
CLK_n => I[2].CLK
706 
CLK_n => I[3].CLK
707 
CLK_n => I[4].CLK
708 
CLK_n => I[5].CLK
709 
CLK_n => I[6].CLK
710 
CLK_n => I[7].CLK
711 
CLK_n => Fp[0].CLK
712 
CLK_n => Fp[1].CLK
713 
CLK_n => Fp[2].CLK
714 
CLK_n => Fp[3].CLK
715 
CLK_n => Fp[4].CLK
716 
CLK_n => Fp[5].CLK
717 
CLK_n => Fp[6].CLK
718 
CLK_n => Fp[7].CLK
719 
CLK_n => Ap[0].CLK
720 
CLK_n => Ap[1].CLK
721 
CLK_n => Ap[2].CLK
722 
CLK_n => Ap[3].CLK
723 
CLK_n => Ap[4].CLK
724 
CLK_n => Ap[5].CLK
725 
CLK_n => Ap[6].CLK
726 
CLK_n => Ap[7].CLK
727 
CLK_n => F[0].CLK
728 
CLK_n => F[1].CLK
729 
CLK_n => F[2].CLK
730 
CLK_n => F[3].CLK
731 
CLK_n => F[4].CLK
732 
CLK_n => F[5].CLK
733 
CLK_n => F[6].CLK
734 
CLK_n => F[7].CLK
735 
CLK_n => ACC[0].CLK
736 
CLK_n => ACC[1].CLK
737 
CLK_n => ACC[2].CLK
738 
CLK_n => ACC[3].CLK
739 
CLK_n => ACC[4].CLK
740 
CLK_n => ACC[5].CLK
741 
CLK_n => ACC[6].CLK
742 
CLK_n => ACC[7].CLK
743 
CLK_n => DO[0]~reg0.CLK
744 
CLK_n => DO[1]~reg0.CLK
745 
CLK_n => DO[2]~reg0.CLK
746 
CLK_n => DO[3]~reg0.CLK
747 
CLK_n => DO[4]~reg0.CLK
748 
CLK_n => DO[5]~reg0.CLK
749 
CLK_n => DO[6]~reg0.CLK
750 
CLK_n => DO[7]~reg0.CLK
751 
CLK_n => MCycles[0].CLK
752 
CLK_n => MCycles[1].CLK
753 
CLK_n => MCycles[2].CLK
754 
CLK_n => IStatus[0].CLK
755 
CLK_n => IStatus[1].CLK
756 
CLK_n => XY_State[0].CLK
757 
CLK_n => XY_State[1].CLK
758 
CLK_n => ISet[0].CLK
759 
CLK_n => ISet[1].CLK
760 
CLK_n => IR[0].CLK
761 
CLK_n => IR[1].CLK
762 
CLK_n => IR[2].CLK
763 
CLK_n => IR[3].CLK
764 
CLK_n => IR[4].CLK
765 
CLK_n => IR[5].CLK
766 
CLK_n => IR[6].CLK
767 
CLK_n => IR[7].CLK
768 
CLK_n => TmpAddr[0].CLK
769 
CLK_n => TmpAddr[1].CLK
770 
CLK_n => TmpAddr[2].CLK
771 
CLK_n => TmpAddr[3].CLK
772 
CLK_n => TmpAddr[4].CLK
773 
CLK_n => TmpAddr[5].CLK
774 
CLK_n => TmpAddr[6].CLK
775 
CLK_n => TmpAddr[7].CLK
776 
CLK_n => TmpAddr[8].CLK
777 
CLK_n => TmpAddr[9].CLK
778 
CLK_n => TmpAddr[10].CLK
779 
CLK_n => TmpAddr[11].CLK
780 
CLK_n => TmpAddr[12].CLK
781 
CLK_n => TmpAddr[13].CLK
782 
CLK_n => TmpAddr[14].CLK
783 
CLK_n => TmpAddr[15].CLK
784 
CLK_n => A[0]~reg0.CLK
785 
CLK_n => A[1]~reg0.CLK
786 
CLK_n => A[2]~reg0.CLK
787 
CLK_n => A[3]~reg0.CLK
788 
CLK_n => A[4]~reg0.CLK
789 
CLK_n => A[5]~reg0.CLK
790 
CLK_n => A[6]~reg0.CLK
791 
CLK_n => A[7]~reg0.CLK
792 
CLK_n => A[8]~reg0.CLK
793 
CLK_n => A[9]~reg0.CLK
794 
CLK_n => A[10]~reg0.CLK
795 
CLK_n => A[11]~reg0.CLK
796 
CLK_n => A[12]~reg0.CLK
797 
CLK_n => A[13]~reg0.CLK
798 
CLK_n => A[14]~reg0.CLK
799 
CLK_n => A[15]~reg0.CLK
800 
CLK_n => PC[0].CLK
801 
CLK_n => PC[1].CLK
802 
CLK_n => PC[2].CLK
803 
CLK_n => PC[3].CLK
804 
CLK_n => PC[4].CLK
805 
CLK_n => PC[5].CLK
806 
CLK_n => PC[6].CLK
807 
CLK_n => PC[7].CLK
808 
CLK_n => PC[8].CLK
809 
CLK_n => PC[9].CLK
810 
CLK_n => PC[10].CLK
811 
CLK_n => PC[11].CLK
812 
CLK_n => PC[12].CLK
813 
CLK_n => PC[13].CLK
814 
CLK_n => PC[14].CLK
815 
CLK_n => PC[15].CLK
816 
CEN => ClkEn.IN1
817 
CEN => RFSH_n~reg0.ENA
818 
CEN => OldNMI_n.ENA
819 
CEN => BusReq_s.ENA
820 
CEN => INT_s.ENA
821 
CEN => M1_n~reg0.ENA
822 
CEN => NMI_s.ENA
823 
CEN => MCycle[2].ENA
824 
CEN => MCycle[1].ENA
825 
CEN => MCycle[0].ENA
826 
CEN => TState[2].ENA
827 
CEN => TState[1].ENA
828 
CEN => TState[0].ENA
829 
CEN => Pre_XY_F_M[2].ENA
830 
CEN => Pre_XY_F_M[1].ENA
831 
CEN => Pre_XY_F_M[0].ENA
832 
CEN => Halt_FF.ENA
833 
CEN => BusAck.ENA
834 
CEN => NMICycle.ENA
835 
CEN => IntCycle.ENA
836 
CEN => IntE_FF1.ENA
837 
CEN => IntE_FF2.ENA
838 
CEN => No_BTR.ENA
839 
CEN => Auto_Wait_t1.ENA
840 
CEN => Auto_Wait_t2.ENA
841 
WAIT_n => process_2.IN1
842 
WAIT_n => process_5.IN1
843 
WAIT_n => process_7.IN1
844 
WAIT_n => process_7.IN1
845 
INT_n => INT_s.DATAIN
846 
NMI_n => process_6.IN1
847 
NMI_n => OldNMI_n.DATAIN
848 
BUSRQ_n => BusReq_s.DATAIN
849 
M1_n <= M1_n~reg0.DB_MAX_OUTPUT_PORT_TYPE
850 
IORQ <= T80_MCode:mcode.IORQ
851 
NoRead <= T80_MCode:mcode.NoRead
852 
Write <= T80_MCode:mcode.Write
853 
RFSH_n <= RFSH_n~reg0.DB_MAX_OUTPUT_PORT_TYPE
854 
HALT_n <= Halt_FF.DB_MAX_OUTPUT_PORT_TYPE
855 
BUSAK_n <= BusAck.DB_MAX_OUTPUT_PORT_TYPE
856 
A[0] <= A[0]~reg0.DB_MAX_OUTPUT_PORT_TYPE
857 
A[1] <= A[1]~reg0.DB_MAX_OUTPUT_PORT_TYPE
858 
A[2] <= A[2]~reg0.DB_MAX_OUTPUT_PORT_TYPE
859 
A[3] <= A[3]~reg0.DB_MAX_OUTPUT_PORT_TYPE
860 
A[4] <= A[4]~reg0.DB_MAX_OUTPUT_PORT_TYPE
861 
A[5] <= A[5]~reg0.DB_MAX_OUTPUT_PORT_TYPE
862 
A[6] <= A[6]~reg0.DB_MAX_OUTPUT_PORT_TYPE
863 
A[7] <= A[7]~reg0.DB_MAX_OUTPUT_PORT_TYPE
864 
A[8] <= A[8]~reg0.DB_MAX_OUTPUT_PORT_TYPE
865 
A[9] <= A[9]~reg0.DB_MAX_OUTPUT_PORT_TYPE
866 
A[10] <= A[10]~reg0.DB_MAX_OUTPUT_PORT_TYPE
867 
A[11] <= A[11]~reg0.DB_MAX_OUTPUT_PORT_TYPE
868 
A[12] <= A[12]~reg0.DB_MAX_OUTPUT_PORT_TYPE
869 
A[13] <= A[13]~reg0.DB_MAX_OUTPUT_PORT_TYPE
870 
A[14] <= A[14]~reg0.DB_MAX_OUTPUT_PORT_TYPE
871 
A[15] <= A[15]~reg0.DB_MAX_OUTPUT_PORT_TYPE
872 
DInst[0] => IR.DATAA
873 
DInst[0] => IR.DATAB
874 
DInst[1] => IR.DATAA
875 
DInst[1] => IR.DATAB
876 
DInst[2] => IR.DATAA
877 
DInst[2] => IR.DATAB
878 
DInst[3] => IR.DATAA
879 
DInst[3] => IR.DATAB
880 
DInst[4] => IR.DATAA
881 
DInst[4] => IR.DATAB
882 
DInst[5] => IR.DATAA
883 
DInst[5] => IR.DATAB
884 
DInst[6] => IR.DATAA
885 
DInst[6] => IR.DATAB
886 
DInst[7] => IR.DATAA
887 
DInst[7] => IR.DATAB
888 
DI[0] => Save_Mux.DATAB
889 
DI[0] => A.DATAA
890 
DI[0] => Mux15.IN7
891 
DI[0] => A.DATAB
892 
DI[0] => PC.DATAB
893 
DI[0] => Add2.IN32
894 
DI[0] => Add5.IN32
895 
DI[0] => TmpAddr.DATAB
896 
DI[0] => TmpAddr.DATAB
897 
DI[0] => F.IN0
898 
DI[0] => Mux91.IN15
899 
DI[0] => Mux99.IN10
900 
DI[0] => Equal18.IN7
901 
DI[1] => Save_Mux.DATAB
902 
DI[1] => A.DATAA
903 
DI[1] => Mux14.IN7
904 
DI[1] => A.DATAB
905 
DI[1] => PC.DATAB
906 
DI[1] => Add2.IN31
907 
DI[1] => Add5.IN31
908 
DI[1] => TmpAddr.DATAB
909 
DI[1] => TmpAddr.DATAB
910 
DI[1] => F.IN1
911 
DI[1] => Mux90.IN15
912 
DI[1] => Mux98.IN10
913 
DI[1] => Equal18.IN6
914 
DI[2] => Save_Mux.DATAB
915 
DI[2] => A.DATAA
916 
DI[2] => Mux13.IN7
917 
DI[2] => A.DATAB
918 
DI[2] => PC.DATAB
919 
DI[2] => Add2.IN30
920 
DI[2] => Add5.IN30
921 
DI[2] => TmpAddr.DATAB
922 
DI[2] => TmpAddr.DATAB
923 
DI[2] => F.IN1
924 
DI[2] => Mux89.IN15
925 
DI[2] => Mux97.IN10
926 
DI[2] => Equal18.IN5
927 
DI[3] => Save_Mux.DATAB
928 
DI[3] => A.DATAA
929 
DI[3] => Mux12.IN7
930 
DI[3] => A.DATAB
931 
DI[3] => PC.DATAB
932 
DI[3] => Add2.IN29
933 
DI[3] => Add5.IN29
934 
DI[3] => TmpAddr.DATAB
935 
DI[3] => TmpAddr.DATAB
936 
DI[3] => F.IN1
937 
DI[3] => Mux88.IN15
938 
DI[3] => Mux96.IN10
939 
DI[3] => Equal18.IN4
940 
DI[4] => Save_Mux.DATAB
941 
DI[4] => A.DATAA
942 
DI[4] => Mux11.IN7
943 
DI[4] => A.DATAB
944 
DI[4] => PC.DATAB
945 
DI[4] => Add2.IN28
946 
DI[4] => Add5.IN28
947 
DI[4] => TmpAddr.DATAB
948 
DI[4] => TmpAddr.DATAB
949 
DI[4] => F.IN1
950 
DI[4] => Mux87.IN15
951 
DI[4] => Mux95.IN10
952 
DI[4] => Equal18.IN3
953 
DI[5] => Save_Mux.DATAB
954 
DI[5] => A.DATAA
955 
DI[5] => Mux10.IN7
956 
DI[5] => A.DATAB
957 
DI[5] => PC.DATAB
958 
DI[5] => Add2.IN27
959 
DI[5] => Add5.IN27
960 
DI[5] => TmpAddr.DATAB
961 
DI[5] => TmpAddr.DATAB
962 
DI[5] => F.IN1
963 
DI[5] => Mux86.IN15
964 
DI[5] => Mux94.IN10
965 
DI[5] => Equal18.IN2
966 
DI[6] => Save_Mux.DATAB
967 
DI[6] => A.DATAA
968 
DI[6] => Mux9.IN7
969 
DI[6] => A.DATAB
970 
DI[6] => PC.DATAB
971 
DI[6] => Add2.IN26
972 
DI[6] => Add5.IN26
973 
DI[6] => TmpAddr.DATAB
974 
DI[6] => TmpAddr.DATAB
975 
DI[6] => F.IN1
976 
DI[6] => Mux85.IN15
977 
DI[6] => Mux93.IN10
978 
DI[6] => Equal18.IN1
979 
DI[7] => Save_Mux.DATAB
980 
DI[7] => A.DATAA
981 
DI[7] => Mux8.IN7
982 
DI[7] => A.DATAB
983 
DI[7] => PC.DATAB
984 
DI[7] => Add2.IN17
985 
DI[7] => Add2.IN18
986 
DI[7] => Add2.IN19
987 
DI[7] => Add2.IN20
988 
DI[7] => Add2.IN21
989 
DI[7] => Add2.IN22
990 
DI[7] => Add2.IN23
991 
DI[7] => Add2.IN24
992 
DI[7] => Add2.IN25
993 
DI[7] => Add5.IN17
994 
DI[7] => Add5.IN18
995 
DI[7] => Add5.IN19
996 
DI[7] => Add5.IN20
997 
DI[7] => Add5.IN21
998 
DI[7] => Add5.IN22
999 
DI[7] => Add5.IN23
1000 
DI[7] => Add5.IN24
1001 
DI[7] => Add5.IN25
1002 
DI[7] => TmpAddr.DATAB
1003 
DI[7] => TmpAddr.DATAB
1004 
DI[7] => F.IN1
1005 
DI[7] => F.DATAB
1006 
DI[7] => Mux84.IN15
1007 
DI[7] => Mux92.IN10
1008 
DI[7] => Equal18.IN0
1009 
DO[0] <= DO[0]~reg0.DB_MAX_OUTPUT_PORT_TYPE
1010 
DO[1] <= DO[1]~reg0.DB_MAX_OUTPUT_PORT_TYPE
1011 
DO[2] <= DO[2]~reg0.DB_MAX_OUTPUT_PORT_TYPE
1012 
DO[3] <= DO[3]~reg0.DB_MAX_OUTPUT_PORT_TYPE
1013 
DO[4] <= DO[4]~reg0.DB_MAX_OUTPUT_PORT_TYPE
1014 
DO[5] <= DO[5]~reg0.DB_MAX_OUTPUT_PORT_TYPE
1015 
DO[6] <= DO[6]~reg0.DB_MAX_OUTPUT_PORT_TYPE
1016 
DO[7] <= DO[7]~reg0.DB_MAX_OUTPUT_PORT_TYPE
1017 
MC[0] <= MCycle[0].DB_MAX_OUTPUT_PORT_TYPE
1018 
MC[1] <= MCycle[1].DB_MAX_OUTPUT_PORT_TYPE
1019 
MC[2] <= MCycle[2].DB_MAX_OUTPUT_PORT_TYPE
1020 
TS[0] <= TState[0].DB_MAX_OUTPUT_PORT_TYPE
1021 
TS[1] <= TState[1].DB_MAX_OUTPUT_PORT_TYPE
1022 
TS[2] <= TState[2].DB_MAX_OUTPUT_PORT_TYPE
1023 
IntCycle_n <= IntCycle.DB_MAX_OUTPUT_PORT_TYPE
1024 
IntE <= IntE_FF1.DB_MAX_OUTPUT_PORT_TYPE
1025 
Stop <= T80_MCode:mcode.I_DJNZ
1026 
 
1027 
 
1028 
|z80soc|T80se:z80_inst|T80:u0|T80_MCode:mcode
1029 
IR[0] => Mux5.IN7
1030 
IR[0] => Mux28.IN7
1031 
IR[0] => Set_BusB_To.DATAB
1032 
IR[0] => Mux61.IN263
1033 
IR[0] => Mux62.IN263
1034 
IR[0] => Mux63.IN263
1035 
IR[0] => Mux64.IN158
1036 
IR[0] => Mux64.IN159
1037 
IR[0] => Mux64.IN160
1038 
IR[0] => Mux64.IN161
1039 
IR[0] => Mux64.IN162
1040 
IR[0] => Mux64.IN163
1041 
IR[0] => Mux64.IN164
1042 
IR[0] => Mux64.IN165
1043 
IR[0] => Mux64.IN166
1044 
IR[0] => Mux64.IN167
1045 
IR[0] => Mux64.IN168
1046 
IR[0] => Mux64.IN169
1047 
IR[0] => Mux64.IN170
1048 
IR[0] => Mux64.IN171
1049 
IR[0] => Mux64.IN172
1050 
IR[0] => Mux64.IN173
1051 
IR[0] => Mux64.IN174
1052 
IR[0] => Mux64.IN175
1053 
IR[0] => Mux64.IN176
1054 
IR[0] => Mux64.IN177
1055 
IR[0] => Mux64.IN178
1056 
IR[0] => Mux64.IN179
1057 
IR[0] => Mux64.IN180
1058 
IR[0] => Mux64.IN181
1059 
IR[0] => Mux64.IN182
1060 
IR[0] => Mux64.IN183
1061 
IR[0] => Mux64.IN184
1062 
IR[0] => Mux64.IN185
1063 
IR[0] => Mux64.IN186
1064 
IR[0] => Mux64.IN187
1065 
IR[0] => Mux64.IN188
1066 
IR[0] => Mux64.IN189
1067 
IR[0] => Mux64.IN190
1068 
IR[0] => Mux64.IN191
1069 
IR[0] => Mux64.IN192
1070 
IR[0] => Mux64.IN193
1071 
IR[0] => Mux64.IN194
1072 
IR[0] => Mux64.IN195
1073 
IR[0] => Mux64.IN196
1074 
IR[0] => Mux64.IN197
1075 
IR[0] => Mux64.IN198
1076 
IR[0] => Mux64.IN199
1077 
IR[0] => Mux64.IN200
1078 
IR[0] => Mux64.IN201
1079 
IR[0] => Mux64.IN202
1080 
IR[0] => Mux64.IN203
1081 
IR[0] => Mux64.IN204
1082 
IR[0] => Mux64.IN205
1083 
IR[0] => Mux64.IN206
1084 
IR[0] => Mux64.IN207
1085 
IR[0] => Mux64.IN208
1086 
IR[0] => Mux64.IN209
1087 
IR[0] => Mux64.IN210
1088 
IR[0] => Mux64.IN211
1089 
IR[0] => Mux64.IN212
1090 
IR[0] => Mux64.IN213
1091 
IR[0] => Mux64.IN214
1092 
IR[0] => Mux64.IN215
1093 
IR[0] => Mux64.IN216
1094 
IR[0] => Mux64.IN217
1095 
IR[0] => Mux64.IN218
1096 
IR[0] => Mux64.IN219
1097 
IR[0] => Mux64.IN220
1098 
IR[0] => Mux64.IN221
1099 
IR[0] => Mux64.IN222
1100 
IR[0] => Mux64.IN223
1101 
IR[0] => Mux64.IN224
1102 
IR[0] => Mux64.IN225
1103 
IR[0] => Mux64.IN226
1104 
IR[0] => Mux64.IN227
1105 
IR[0] => Mux64.IN228
1106 
IR[0] => Mux64.IN229
1107 
IR[0] => Mux64.IN230
1108 
IR[0] => Mux64.IN231
1109 
IR[0] => Mux64.IN232
1110 
IR[0] => Mux64.IN233
1111 
IR[0] => Mux64.IN234
1112 
IR[0] => Mux64.IN235
1113 
IR[0] => Mux64.IN236
1114 
IR[0] => Mux64.IN237
1115 
IR[0] => Mux64.IN238
1116 
IR[0] => Mux64.IN239
1117 
IR[0] => Mux64.IN240
1118 
IR[0] => Mux64.IN241
1119 
IR[0] => Mux64.IN242
1120 
IR[0] => Mux64.IN243
1121 
IR[0] => Mux64.IN244
1122 
IR[0] => Mux64.IN245
1123 
IR[0] => Mux64.IN246
1124 
IR[0] => Mux64.IN247
1125 
IR[0] => Mux64.IN248
1126 
IR[0] => Mux64.IN249
1127 
IR[0] => Mux64.IN250
1128 
IR[0] => Mux64.IN251
1129 
IR[0] => Mux64.IN252
1130 
IR[0] => Mux64.IN253
1131 
IR[0] => Mux64.IN254
1132 
IR[0] => Mux64.IN255
1133 
IR[0] => Mux64.IN256
1134 
IR[0] => Mux64.IN257
1135 
IR[0] => Mux64.IN258
1136 
IR[0] => Mux64.IN259
1137 
IR[0] => Mux64.IN260
1138 
IR[0] => Mux64.IN261
1139 
IR[0] => Mux64.IN262
1140 
IR[0] => Mux64.IN263
1141 
IR[0] => Mux65.IN263
1142 
IR[0] => Mux66.IN69
1143 
IR[0] => Mux67.IN263
1144 
IR[0] => Mux68.IN263
1145 
IR[0] => Mux69.IN263
1146 
IR[0] => Mux70.IN263
1147 
IR[0] => Mux71.IN263
1148 
IR[0] => Mux72.IN262
1149 
IR[0] => Mux73.IN263
1150 
IR[0] => Mux74.IN263
1151 
IR[0] => Mux75.IN263
1152 
IR[0] => Mux76.IN263
1153 
IR[0] => Mux77.IN263
1154 
IR[0] => Mux78.IN263
1155 
IR[0] => Mux79.IN263
1156 
IR[0] => Mux80.IN263
1157 
IR[0] => Mux81.IN263
1158 
IR[0] => Mux82.IN263
1159 
IR[0] => Mux83.IN263
1160 
IR[0] => Mux84.IN263
1161 
IR[0] => Mux85.IN263
1162 
IR[0] => Mux86.IN263
1163 
IR[0] => Mux87.IN263
1164 
IR[0] => Mux88.IN263
1165 
IR[0] => Mux89.IN263
1166 
IR[0] => Mux90.IN263
1167 
IR[0] => Mux91.IN263
1168 
IR[0] => Mux92.IN263
1169 
IR[0] => Mux93.IN263
1170 
IR[0] => Mux94.IN263
1171 
IR[0] => Mux95.IN263
1172 
IR[0] => Mux96.IN263
1173 
IR[0] => Mux97.IN263
1174 
IR[0] => Mux98.IN263
1175 
IR[0] => Mux99.IN263
1176 
IR[0] => Mux100.IN263
1177 
IR[0] => Mux101.IN263
1178 
IR[0] => Mux102.IN263
1179 
IR[0] => Mux103.IN263
1180 
IR[0] => Mux104.IN263
1181 
IR[0] => Mux105.IN263
1182 
IR[0] => Mux106.IN263
1183 
IR[0] => Mux107.IN263
1184 
IR[0] => Mux108.IN69
1185 
IR[0] => Mux109.IN263
1186 
IR[0] => Mux110.IN263
1187 
IR[0] => Mux111.IN263
1188 
IR[0] => Mux112.IN263
1189 
IR[0] => Mux113.IN36
1190 
IR[0] => Mux114.IN263
1191 
IR[0] => Mux115.IN263
1192 
IR[0] => Mux116.IN263
1193 
IR[0] => Mux119.IN36
1194 
IR[0] => Mux120.IN36
1195 
IR[0] => Mux121.IN36
1196 
IR[0] => Mux122.IN36
1197 
IR[0] => Mux123.IN36
1198 
IR[0] => Mux124.IN10
1199 
IR[0] => Mux125.IN36
1200 
IR[0] => Mux126.IN36
1201 
IR[0] => Mux127.IN36
1202 
IR[0] => Mux128.IN36
1203 
IR[0] => Mux129.IN36
1204 
IR[0] => Mux130.IN36
1205 
IR[0] => Mux197.IN69
1206 
IR[0] => Mux198.IN134
1207 
IR[0] => Mux199.IN134
1208 
IR[0] => Mux200.IN263
1209 
IR[0] => Mux201.IN263
1210 
IR[0] => Mux202.IN263
1211 
IR[0] => Mux203.IN134
1212 
IR[0] => Mux204.IN36
1213 
IR[0] => Mux205.IN134
1214 
IR[0] => Mux206.IN69
1215 
IR[0] => Mux207.IN69
1216 
IR[0] => Mux208.IN263
1217 
IR[0] => Mux209.IN69
1218 
IR[0] => Mux210.IN263
1219 
IR[0] => Mux211.IN69
1220 
IR[0] => Mux212.IN263
1221 
IR[0] => Mux213.IN69
1222 
IR[0] => Mux214.IN263
1223 
IR[0] => Mux215.IN263
1224 
IR[0] => Mux216.IN263
1225 
IR[0] => Mux217.IN69
1226 
IR[0] => Mux218.IN134
1227 
IR[0] => Mux219.IN263
1228 
IR[0] => Mux220.IN263
1229 
IR[0] => Mux221.IN69
1230 
IR[0] => Mux222.IN263
1231 
IR[0] => Mux223.IN69
1232 
IR[0] => Mux224.IN69
1233 
IR[0] => Mux225.IN69
1234 
IR[0] => Mux226.IN69
1235 
IR[0] => Mux227.IN263
1236 
IR[0] => Mux228.IN263
1237 
IR[0] => Mux229.IN263
1238 
IR[0] => Mux230.IN263
1239 
IR[0] => Mux231.IN69
1240 
IR[0] => Mux232.IN263
1241 
IR[0] => Mux233.IN263
1242 
IR[0] => Mux234.IN69
1243 
IR[0] => Mux235.IN69
1244 
IR[0] => Mux236.IN36
1245 
IR[0] => Mux237.IN134
1246 
IR[0] => Mux238.IN263
1247 
IR[0] => Mux239.IN263
1248 
IR[0] => Mux240.IN263
1249 
IR[0] => Mux241.IN36
1250 
IR[0] => Mux242.IN69
1251 
IR[0] => Mux243.IN36
1252 
IR[0] => Mux244.IN69
1253 
IR[0] => Mux248.IN3
1254 
IR[0] => Mux253.IN3
1255 
IR[0] => Set_BusB_To.DATAB
1256 
IR[0] => Equal5.IN7
1257 
IR[0] => Equal7.IN3
1258 
IR[1] => Mux4.IN7
1259 
IR[1] => Mux27.IN7
1260 
IR[1] => Set_BusB_To.DATAB
1261 
IR[1] => Mux61.IN262
1262 
IR[1] => Mux62.IN262
1263 
IR[1] => Mux63.IN157
1264 
IR[1] => Mux63.IN158
1265 
IR[1] => Mux63.IN159
1266 
IR[1] => Mux63.IN160
1267 
IR[1] => Mux63.IN161
1268 
IR[1] => Mux63.IN162
1269 
IR[1] => Mux63.IN163
1270 
IR[1] => Mux63.IN164
1271 
IR[1] => Mux63.IN165
1272 
IR[1] => Mux63.IN166
1273 
IR[1] => Mux63.IN167
1274 
IR[1] => Mux63.IN168
1275 
IR[1] => Mux63.IN169
1276 
IR[1] => Mux63.IN170
1277 
IR[1] => Mux63.IN171
1278 
IR[1] => Mux63.IN172
1279 
IR[1] => Mux63.IN173
1280 
IR[1] => Mux63.IN174
1281 
IR[1] => Mux63.IN175
1282 
IR[1] => Mux63.IN176
1283 
IR[1] => Mux63.IN177
1284 
IR[1] => Mux63.IN178
1285 
IR[1] => Mux63.IN179
1286 
IR[1] => Mux63.IN180
1287 
IR[1] => Mux63.IN181
1288 
IR[1] => Mux63.IN182
1289 
IR[1] => Mux63.IN183
1290 
IR[1] => Mux63.IN184
1291 
IR[1] => Mux63.IN185
1292 
IR[1] => Mux63.IN186
1293 
IR[1] => Mux63.IN187
1294 
IR[1] => Mux63.IN188
1295 
IR[1] => Mux63.IN189
1296 
IR[1] => Mux63.IN190
1297 
IR[1] => Mux63.IN191
1298 
IR[1] => Mux63.IN192
1299 
IR[1] => Mux63.IN193
1300 
IR[1] => Mux63.IN194
1301 
IR[1] => Mux63.IN195
1302 
IR[1] => Mux63.IN196
1303 
IR[1] => Mux63.IN197
1304 
IR[1] => Mux63.IN198
1305 
IR[1] => Mux63.IN199
1306 
IR[1] => Mux63.IN200
1307 
IR[1] => Mux63.IN201
1308 
IR[1] => Mux63.IN202
1309 
IR[1] => Mux63.IN203
1310 
IR[1] => Mux63.IN204
1311 
IR[1] => Mux63.IN205
1312 
IR[1] => Mux63.IN206
1313 
IR[1] => Mux63.IN207
1314 
IR[1] => Mux63.IN208
1315 
IR[1] => Mux63.IN209
1316 
IR[1] => Mux63.IN210
1317 
IR[1] => Mux63.IN211
1318 
IR[1] => Mux63.IN212
1319 
IR[1] => Mux63.IN213
1320 
IR[1] => Mux63.IN214
1321 
IR[1] => Mux63.IN215
1322 
IR[1] => Mux63.IN216
1323 
IR[1] => Mux63.IN217
1324 
IR[1] => Mux63.IN218
1325 
IR[1] => Mux63.IN219
1326 
IR[1] => Mux63.IN220
1327 
IR[1] => Mux63.IN221
1328 
IR[1] => Mux63.IN222
1329 
IR[1] => Mux63.IN223
1330 
IR[1] => Mux63.IN224
1331 
IR[1] => Mux63.IN225
1332 
IR[1] => Mux63.IN226
1333 
IR[1] => Mux63.IN227
1334 
IR[1] => Mux63.IN228
1335 
IR[1] => Mux63.IN229
1336 
IR[1] => Mux63.IN230
1337 
IR[1] => Mux63.IN231
1338 
IR[1] => Mux63.IN232
1339 
IR[1] => Mux63.IN233
1340 
IR[1] => Mux63.IN234
1341 
IR[1] => Mux63.IN235
1342 
IR[1] => Mux63.IN236
1343 
IR[1] => Mux63.IN237
1344 
IR[1] => Mux63.IN238
1345 
IR[1] => Mux63.IN239
1346 
IR[1] => Mux63.IN240
1347 
IR[1] => Mux63.IN241
1348 
IR[1] => Mux63.IN242
1349 
IR[1] => Mux63.IN243
1350 
IR[1] => Mux63.IN244
1351 
IR[1] => Mux63.IN245
1352 
IR[1] => Mux63.IN246
1353 
IR[1] => Mux63.IN247
1354 
IR[1] => Mux63.IN248
1355 
IR[1] => Mux63.IN249
1356 
IR[1] => Mux63.IN250
1357 
IR[1] => Mux63.IN251
1358 
IR[1] => Mux63.IN252
1359 
IR[1] => Mux63.IN253
1360 
IR[1] => Mux63.IN254
1361 
IR[1] => Mux63.IN255
1362 
IR[1] => Mux63.IN256
1363 
IR[1] => Mux63.IN257
1364 
IR[1] => Mux63.IN258
1365 
IR[1] => Mux63.IN259
1366 
IR[1] => Mux63.IN260
1367 
IR[1] => Mux63.IN261
1368 
IR[1] => Mux63.IN262
1369 
IR[1] => Mux64.IN157
1370 
IR[1] => Mux65.IN262
1371 
IR[1] => Mux66.IN68
1372 
IR[1] => Mux67.IN262
1373 
IR[1] => Mux68.IN262
1374 
IR[1] => Mux69.IN262
1375 
IR[1] => Mux70.IN262
1376 
IR[1] => Mux71.IN262
1377 
IR[1] => Mux72.IN261
1378 
IR[1] => Mux73.IN262
1379 
IR[1] => Mux74.IN262
1380 
IR[1] => Mux75.IN262
1381 
IR[1] => Mux76.IN262
1382 
IR[1] => Mux77.IN262
1383 
IR[1] => Mux78.IN262
1384 
IR[1] => Mux79.IN262
1385 
IR[1] => Mux80.IN262
1386 
IR[1] => Mux81.IN262
1387 
IR[1] => Mux82.IN262
1388 
IR[1] => Mux83.IN262
1389 
IR[1] => Mux84.IN262
1390 
IR[1] => Mux85.IN262
1391 
IR[1] => Mux86.IN262
1392 
IR[1] => Mux87.IN262
1393 
IR[1] => Mux88.IN262
1394 
IR[1] => Mux89.IN262
1395 
IR[1] => Mux90.IN262
1396 
IR[1] => Mux91.IN262
1397 
IR[1] => Mux92.IN262
1398 
IR[1] => Mux93.IN262
1399 
IR[1] => Mux94.IN262
1400 
IR[1] => Mux95.IN262
1401 
IR[1] => Mux96.IN262
1402 
IR[1] => Mux97.IN262
1403 
IR[1] => Mux98.IN262
1404 
IR[1] => Mux99.IN262
1405 
IR[1] => Mux100.IN262
1406 
IR[1] => Mux101.IN262
1407 
IR[1] => Mux102.IN262
1408 
IR[1] => Mux103.IN262
1409 
IR[1] => Mux104.IN262
1410 
IR[1] => Mux105.IN262
1411 
IR[1] => Mux106.IN262
1412 
IR[1] => Mux107.IN262
1413 
IR[1] => Mux108.IN68
1414 
IR[1] => Mux109.IN262
1415 
IR[1] => Mux110.IN262
1416 
IR[1] => Mux111.IN262
1417 
IR[1] => Mux112.IN262
1418 
IR[1] => Mux113.IN35
1419 
IR[1] => Mux114.IN262
1420 
IR[1] => Mux115.IN262
1421 
IR[1] => Mux116.IN262
1422 
IR[1] => Mux119.IN35
1423 
IR[1] => Mux120.IN35
1424 
IR[1] => Mux121.IN35
1425 
IR[1] => Mux122.IN35
1426 
IR[1] => Mux123.IN35
1427 
IR[1] => Mux124.IN9
1428 
IR[1] => Mux125.IN35
1429 
IR[1] => Mux126.IN35
1430 
IR[1] => Mux127.IN35
1431 
IR[1] => Mux128.IN35
1432 
IR[1] => Mux129.IN35
1433 
IR[1] => Mux130.IN35
1434 
IR[1] => Mux197.IN68
1435 
IR[1] => Mux198.IN133
1436 
IR[1] => Mux199.IN133
1437 
IR[1] => Mux200.IN262
1438 
IR[1] => Mux201.IN262
1439 
IR[1] => Mux202.IN262
1440 
IR[1] => Mux203.IN133
1441 
IR[1] => Mux204.IN35
1442 
IR[1] => Mux205.IN133
1443 
IR[1] => Mux206.IN68
1444 
IR[1] => Mux207.IN68
1445 
IR[1] => Mux208.IN262
1446 
IR[1] => Mux209.IN68
1447 
IR[1] => Mux210.IN262
1448 
IR[1] => Mux211.IN68
1449 
IR[1] => Mux212.IN262
1450 
IR[1] => Mux213.IN68
1451 
IR[1] => Mux214.IN262
1452 
IR[1] => Mux215.IN262
1453 
IR[1] => Mux216.IN262
1454 
IR[1] => Mux217.IN68
1455 
IR[1] => Mux218.IN133
1456 
IR[1] => Mux219.IN262
1457 
IR[1] => Mux220.IN262
1458 
IR[1] => Mux221.IN68
1459 
IR[1] => Mux222.IN262
1460 
IR[1] => Mux223.IN68
1461 
IR[1] => Mux224.IN68
1462 
IR[1] => Mux225.IN68
1463 
IR[1] => Mux226.IN68
1464 
IR[1] => Mux227.IN262
1465 
IR[1] => Mux228.IN262
1466 
IR[1] => Mux229.IN262
1467 
IR[1] => Mux230.IN262
1468 
IR[1] => Mux231.IN68
1469 
IR[1] => Mux232.IN262
1470 
IR[1] => Mux233.IN262
1471 
IR[1] => Mux234.IN68
1472 
IR[1] => Mux235.IN68
1473 
IR[1] => Mux236.IN35
1474 
IR[1] => Mux237.IN133
1475 
IR[1] => Mux238.IN262
1476 
IR[1] => Mux239.IN262
1477 
IR[1] => Mux240.IN262
1478 
IR[1] => Mux241.IN35
1479 
IR[1] => Mux242.IN68
1480 
IR[1] => Mux243.IN35
1481 
IR[1] => Mux244.IN68
1482 
IR[1] => Mux247.IN3
1483 
IR[1] => Mux252.IN3
1484 
IR[1] => Set_BusB_To.DATAB
1485 
IR[1] => Equal5.IN6
1486 
IR[1] => Equal7.IN7
1487 
IR[2] => Mux3.IN7
1488 
IR[2] => Mux26.IN7
1489 
IR[2] => Set_BusB_To.DATAB
1490 
IR[2] => Mux61.IN261
1491 
IR[2] => Mux62.IN156
1492 
IR[2] => Mux62.IN157
1493 
IR[2] => Mux62.IN158
1494 
IR[2] => Mux62.IN159
1495 
IR[2] => Mux62.IN160
1496 
IR[2] => Mux62.IN161
1497 
IR[2] => Mux62.IN162
1498 
IR[2] => Mux62.IN163
1499 
IR[2] => Mux62.IN164
1500 
IR[2] => Mux62.IN165
1501 
IR[2] => Mux62.IN166
1502 
IR[2] => Mux62.IN167
1503 
IR[2] => Mux62.IN168
1504 
IR[2] => Mux62.IN169
1505 
IR[2] => Mux62.IN170
1506 
IR[2] => Mux62.IN171
1507 
IR[2] => Mux62.IN172
1508 
IR[2] => Mux62.IN173
1509 
IR[2] => Mux62.IN174
1510 
IR[2] => Mux62.IN175
1511 
IR[2] => Mux62.IN176
1512 
IR[2] => Mux62.IN177
1513 
IR[2] => Mux62.IN178
1514 
IR[2] => Mux62.IN179
1515 
IR[2] => Mux62.IN180
1516 
IR[2] => Mux62.IN181
1517 
IR[2] => Mux62.IN182
1518 
IR[2] => Mux62.IN183
1519 
IR[2] => Mux62.IN184
1520 
IR[2] => Mux62.IN185
1521 
IR[2] => Mux62.IN186
1522 
IR[2] => Mux62.IN187
1523 
IR[2] => Mux62.IN188
1524 
IR[2] => Mux62.IN189
1525 
IR[2] => Mux62.IN190
1526 
IR[2] => Mux62.IN191
1527 
IR[2] => Mux62.IN192
1528 
IR[2] => Mux62.IN193
1529 
IR[2] => Mux62.IN194
1530 
IR[2] => Mux62.IN195
1531 
IR[2] => Mux62.IN196
1532 
IR[2] => Mux62.IN197
1533 
IR[2] => Mux62.IN198
1534 
IR[2] => Mux62.IN199
1535 
IR[2] => Mux62.IN200
1536 
IR[2] => Mux62.IN201
1537 
IR[2] => Mux62.IN202
1538 
IR[2] => Mux62.IN203
1539 
IR[2] => Mux62.IN204
1540 
IR[2] => Mux62.IN205
1541 
IR[2] => Mux62.IN206
1542 
IR[2] => Mux62.IN207
1543 
IR[2] => Mux62.IN208
1544 
IR[2] => Mux62.IN209
1545 
IR[2] => Mux62.IN210
1546 
IR[2] => Mux62.IN211
1547 
IR[2] => Mux62.IN212
1548 
IR[2] => Mux62.IN213
1549 
IR[2] => Mux62.IN214
1550 
IR[2] => Mux62.IN215
1551 
IR[2] => Mux62.IN216
1552 
IR[2] => Mux62.IN217
1553 
IR[2] => Mux62.IN218
1554 
IR[2] => Mux62.IN219
1555 
IR[2] => Mux62.IN220
1556 
IR[2] => Mux62.IN221
1557 
IR[2] => Mux62.IN222
1558 
IR[2] => Mux62.IN223
1559 
IR[2] => Mux62.IN224
1560 
IR[2] => Mux62.IN225
1561 
IR[2] => Mux62.IN226
1562 
IR[2] => Mux62.IN227
1563 
IR[2] => Mux62.IN228
1564 
IR[2] => Mux62.IN229
1565 
IR[2] => Mux62.IN230
1566 
IR[2] => Mux62.IN231
1567 
IR[2] => Mux62.IN232
1568 
IR[2] => Mux62.IN233
1569 
IR[2] => Mux62.IN234
1570 
IR[2] => Mux62.IN235
1571 
IR[2] => Mux62.IN236
1572 
IR[2] => Mux62.IN237
1573 
IR[2] => Mux62.IN238
1574 
IR[2] => Mux62.IN239
1575 
IR[2] => Mux62.IN240
1576 
IR[2] => Mux62.IN241
1577 
IR[2] => Mux62.IN242
1578 
IR[2] => Mux62.IN243
1579 
IR[2] => Mux62.IN244
1580 
IR[2] => Mux62.IN245
1581 
IR[2] => Mux62.IN246
1582 
IR[2] => Mux62.IN247
1583 
IR[2] => Mux62.IN248
1584 
IR[2] => Mux62.IN249
1585 
IR[2] => Mux62.IN250
1586 
IR[2] => Mux62.IN251
1587 
IR[2] => Mux62.IN252
1588 
IR[2] => Mux62.IN253
1589 
IR[2] => Mux62.IN254
1590 
IR[2] => Mux62.IN255
1591 
IR[2] => Mux62.IN256
1592 
IR[2] => Mux62.IN257
1593 
IR[2] => Mux62.IN258
1594 
IR[2] => Mux62.IN259
1595 
IR[2] => Mux62.IN260
1596 
IR[2] => Mux62.IN261
1597 
IR[2] => Mux63.IN156
1598 
IR[2] => Mux64.IN156
1599 
IR[2] => Mux65.IN261
1600 
IR[2] => Mux66.IN67
1601 
IR[2] => Mux67.IN261
1602 
IR[2] => Mux68.IN261
1603 
IR[2] => Mux69.IN261
1604 
IR[2] => Mux70.IN261
1605 
IR[2] => Mux71.IN261
1606 
IR[2] => Mux72.IN260
1607 
IR[2] => Mux73.IN261
1608 
IR[2] => Mux74.IN261
1609 
IR[2] => Mux75.IN261
1610 
IR[2] => Mux76.IN261
1611 
IR[2] => Mux77.IN261
1612 
IR[2] => Mux78.IN261
1613 
IR[2] => Mux79.IN261
1614 
IR[2] => Mux80.IN261
1615 
IR[2] => Mux81.IN261
1616 
IR[2] => Mux82.IN261
1617 
IR[2] => Mux83.IN261
1618 
IR[2] => Mux84.IN261
1619 
IR[2] => Mux85.IN261
1620 
IR[2] => Mux86.IN261
1621 
IR[2] => Mux87.IN261
1622 
IR[2] => Mux88.IN261
1623 
IR[2] => Mux89.IN261
1624 
IR[2] => Mux90.IN261
1625 
IR[2] => Mux91.IN261
1626 
IR[2] => Mux92.IN261
1627 
IR[2] => Mux93.IN261
1628 
IR[2] => Mux94.IN261
1629 
IR[2] => Mux95.IN261
1630 
IR[2] => Mux96.IN261
1631 
IR[2] => Mux97.IN261
1632 
IR[2] => Mux98.IN261
1633 
IR[2] => Mux99.IN261
1634 
IR[2] => Mux100.IN261
1635 
IR[2] => Mux101.IN261
1636 
IR[2] => Mux102.IN261
1637 
IR[2] => Mux103.IN261
1638 
IR[2] => Mux104.IN261
1639 
IR[2] => Mux105.IN261
1640 
IR[2] => Mux106.IN261
1641 
IR[2] => Mux107.IN261
1642 
IR[2] => Mux108.IN67
1643 
IR[2] => Mux109.IN261
1644 
IR[2] => Mux110.IN261
1645 
IR[2] => Mux111.IN261
1646 
IR[2] => Mux112.IN261
1647 
IR[2] => Mux113.IN34
1648 
IR[2] => Mux114.IN261
1649 
IR[2] => Mux115.IN261
1650 
IR[2] => Mux116.IN261
1651 
IR[2] => Mux119.IN34
1652 
IR[2] => Mux120.IN34
1653 
IR[2] => Mux121.IN34
1654 
IR[2] => Mux122.IN34
1655 
IR[2] => Mux123.IN34
1656 
IR[2] => Mux124.IN8
1657 
IR[2] => Mux125.IN34
1658 
IR[2] => Mux126.IN34
1659 
IR[2] => Mux127.IN34
1660 
IR[2] => Mux128.IN34
1661 
IR[2] => Mux129.IN34
1662 
IR[2] => Mux130.IN34
1663 
IR[2] => Mux197.IN67
1664 
IR[2] => Mux198.IN132
1665 
IR[2] => Mux199.IN132
1666 
IR[2] => Mux200.IN261
1667 
IR[2] => Mux201.IN261
1668 
IR[2] => Mux202.IN261
1669 
IR[2] => Mux203.IN132
1670 
IR[2] => Mux204.IN34
1671 
IR[2] => Mux205.IN132
1672 
IR[2] => Mux206.IN67
1673 
IR[2] => Mux207.IN67
1674 
IR[2] => Mux208.IN261
1675 
IR[2] => Mux209.IN67
1676 
IR[2] => Mux210.IN261
1677 
IR[2] => Mux211.IN67
1678 
IR[2] => Mux212.IN261
1679 
IR[2] => Mux213.IN67
1680 
IR[2] => Mux214.IN261
1681 
IR[2] => Mux215.IN261
1682 
IR[2] => Mux216.IN261
1683 
IR[2] => Mux217.IN67
1684 
IR[2] => Mux218.IN132
1685 
IR[2] => Mux219.IN261
1686 
IR[2] => Mux220.IN261
1687 
IR[2] => Mux221.IN67
1688 
IR[2] => Mux222.IN261
1689 
IR[2] => Mux223.IN67
1690 
IR[2] => Mux224.IN67
1691 
IR[2] => Mux225.IN67
1692 
IR[2] => Mux226.IN67
1693 
IR[2] => Mux227.IN261
1694 
IR[2] => Mux228.IN261
1695 
IR[2] => Mux229.IN261
1696 
IR[2] => Mux230.IN261
1697 
IR[2] => Mux231.IN67
1698 
IR[2] => Mux232.IN261
1699 
IR[2] => Mux233.IN261
1700 
IR[2] => Mux234.IN67
1701 
IR[2] => Mux235.IN67
1702 
IR[2] => Mux236.IN34
1703 
IR[2] => Mux237.IN132
1704 
IR[2] => Mux238.IN261
1705 
IR[2] => Mux239.IN261
1706 
IR[2] => Mux240.IN261
1707 
IR[2] => Mux241.IN34
1708 
IR[2] => Mux242.IN67
1709 
IR[2] => Mux243.IN34
1710 
IR[2] => Mux244.IN67
1711 
IR[2] => Mux246.IN3
1712 
IR[2] => Mux251.IN3
1713 
IR[2] => Set_BusB_To.DATAB
1714 
IR[2] => Equal5.IN2
1715 
IR[2] => Equal7.IN6
1716 
IR[3] => Mux2.IN7
1717 
IR[3] => Mux34.IN2
1718 
IR[3] => Mux34.IN3
1719 
IR[3] => Mux34.IN4
1720 
IR[3] => Mux34.IN5
1721 
IR[3] => Mux34.IN6
1722 
IR[3] => Mux34.IN7
1723 
IR[3] => Mux45.IN6
1724 
IR[3] => Mux61.IN260
1725 
IR[3] => Mux62.IN155
1726 
IR[3] => Mux63.IN155
1727 
IR[3] => Mux64.IN155
1728 
IR[3] => Mux65.IN260
1729 
IR[3] => Mux66.IN66
1730 
IR[3] => Mux67.IN260
1731 
IR[3] => Mux68.IN260
1732 
IR[3] => Mux69.IN197
1733 
IR[3] => Mux69.IN198
1734 
IR[3] => Mux69.IN199
1735 
IR[3] => Mux69.IN200
1736 
IR[3] => Mux69.IN201
1737 
IR[3] => Mux69.IN202
1738 
IR[3] => Mux69.IN203
1739 
IR[3] => Mux69.IN204
1740 
IR[3] => Mux69.IN205
1741 
IR[3] => Mux69.IN206
1742 
IR[3] => Mux69.IN207
1743 
IR[3] => Mux69.IN208
1744 
IR[3] => Mux69.IN209
1745 
IR[3] => Mux69.IN210
1746 
IR[3] => Mux69.IN211
1747 
IR[3] => Mux69.IN212
1748 
IR[3] => Mux69.IN213
1749 
IR[3] => Mux69.IN214
1750 
IR[3] => Mux69.IN215
1751 
IR[3] => Mux69.IN216
1752 
IR[3] => Mux69.IN217
1753 
IR[3] => Mux69.IN218
1754 
IR[3] => Mux69.IN219
1755 
IR[3] => Mux69.IN220
1756 
IR[3] => Mux69.IN221
1757 
IR[3] => Mux69.IN222
1758 
IR[3] => Mux69.IN223
1759 
IR[3] => Mux69.IN224
1760 
IR[3] => Mux69.IN225
1761 
IR[3] => Mux69.IN226
1762 
IR[3] => Mux69.IN227
1763 
IR[3] => Mux69.IN228
1764 
IR[3] => Mux69.IN229
1765 
IR[3] => Mux69.IN230
1766 
IR[3] => Mux69.IN231
1767 
IR[3] => Mux69.IN232
1768 
IR[3] => Mux69.IN233
1769 
IR[3] => Mux69.IN234
1770 
IR[3] => Mux69.IN235
1771 
IR[3] => Mux69.IN236
1772 
IR[3] => Mux69.IN237
1773 
IR[3] => Mux69.IN238
1774 
IR[3] => Mux69.IN239
1775 
IR[3] => Mux69.IN240
1776 
IR[3] => Mux69.IN241
1777 
IR[3] => Mux69.IN242
1778 
IR[3] => Mux69.IN243
1779 
IR[3] => Mux69.IN244
1780 
IR[3] => Mux69.IN245
1781 
IR[3] => Mux69.IN246
1782 
IR[3] => Mux69.IN247
1783 
IR[3] => Mux69.IN248
1784 
IR[3] => Mux69.IN249
1785 
IR[3] => Mux69.IN250
1786 
IR[3] => Mux69.IN251
1787 
IR[3] => Mux69.IN252
1788 
IR[3] => Mux69.IN253
1789 
IR[3] => Mux69.IN254
1790 
IR[3] => Mux69.IN255
1791 
IR[3] => Mux69.IN256
1792 
IR[3] => Mux69.IN257
1793 
IR[3] => Mux69.IN258
1794 
IR[3] => Mux69.IN259
1795 
IR[3] => Mux69.IN260
1796 
IR[3] => Mux70.IN260
1797 
IR[3] => Mux71.IN260
1798 
IR[3] => Mux72.IN259
1799 
IR[3] => Mux73.IN260
1800 
IR[3] => Mux74.IN260
1801 
IR[3] => Mux75.IN260
1802 
IR[3] => Mux76.IN260
1803 
IR[3] => Mux77.IN260
1804 
IR[3] => Mux78.IN260
1805 
IR[3] => Mux79.IN260
1806 
IR[3] => Mux80.IN260
1807 
IR[3] => Mux81.IN260
1808 
IR[3] => Mux82.IN260
1809 
IR[3] => Mux83.IN260
1810 
IR[3] => Mux84.IN260
1811 
IR[3] => Mux85.IN260
1812 
IR[3] => Mux86.IN260
1813 
IR[3] => Mux87.IN260
1814 
IR[3] => Mux88.IN260
1815 
IR[3] => Mux89.IN260
1816 
IR[3] => Mux90.IN260
1817 
IR[3] => Mux91.IN260
1818 
IR[3] => Mux92.IN260
1819 
IR[3] => Mux93.IN260
1820 
IR[3] => Mux94.IN260
1821 
IR[3] => Mux95.IN260
1822 
IR[3] => Mux96.IN260
1823 
IR[3] => Mux97.IN260
1824 
IR[3] => Mux98.IN260
1825 
IR[3] => Mux99.IN30
1826 
IR[3] => Mux99.IN31
1827 
IR[3] => Mux99.IN32
1828 
IR[3] => Mux99.IN33
1829 
IR[3] => Mux99.IN34
1830 
IR[3] => Mux99.IN35
1831 
IR[3] => Mux99.IN36
1832 
IR[3] => Mux99.IN37
1833 
IR[3] => Mux99.IN38
1834 
IR[3] => Mux99.IN39
1835 
IR[3] => Mux99.IN40
1836 
IR[3] => Mux99.IN41
1837 
IR[3] => Mux99.IN42
1838 
IR[3] => Mux99.IN43
1839 
IR[3] => Mux99.IN44
1840 
IR[3] => Mux99.IN45
1841 
IR[3] => Mux99.IN46
1842 
IR[3] => Mux99.IN47
1843 
IR[3] => Mux99.IN48
1844 
IR[3] => Mux99.IN49
1845 
IR[3] => Mux99.IN50
1846 
IR[3] => Mux99.IN51
1847 
IR[3] => Mux99.IN52
1848 
IR[3] => Mux99.IN53
1849 
IR[3] => Mux99.IN54
1850 
IR[3] => Mux99.IN55
1851 
IR[3] => Mux99.IN56
1852 
IR[3] => Mux99.IN57
1853 
IR[3] => Mux99.IN58
1854 
IR[3] => Mux99.IN59
1855 
IR[3] => Mux99.IN60
1856 
IR[3] => Mux99.IN61
1857 
IR[3] => Mux99.IN62
1858 
IR[3] => Mux99.IN63
1859 
IR[3] => Mux99.IN64
1860 
IR[3] => Mux99.IN65
1861 
IR[3] => Mux99.IN66
1862 
IR[3] => Mux99.IN67
1863 
IR[3] => Mux99.IN68
1864 
IR[3] => Mux99.IN69
1865 
IR[3] => Mux99.IN70
1866 
IR[3] => Mux99.IN71
1867 
IR[3] => Mux99.IN72
1868 
IR[3] => Mux99.IN73
1869 
IR[3] => Mux99.IN74
1870 
IR[3] => Mux99.IN75
1871 
IR[3] => Mux99.IN76
1872 
IR[3] => Mux99.IN77
1873 
IR[3] => Mux99.IN78
1874 
IR[3] => Mux99.IN79
1875 
IR[3] => Mux99.IN80
1876 
IR[3] => Mux99.IN81
1877 
IR[3] => Mux99.IN82
1878 
IR[3] => Mux99.IN83
1879 
IR[3] => Mux99.IN84
1880 
IR[3] => Mux99.IN85
1881 
IR[3] => Mux99.IN86
1882 
IR[3] => Mux99.IN87
1883 
IR[3] => Mux99.IN88
1884 
IR[3] => Mux99.IN89
1885 
IR[3] => Mux99.IN90
1886 
IR[3] => Mux99.IN91
1887 
IR[3] => Mux99.IN92
1888 
IR[3] => Mux99.IN93
1889 
IR[3] => Mux99.IN94
1890 
IR[3] => Mux99.IN95
1891 
IR[3] => Mux99.IN96
1892 
IR[3] => Mux99.IN97
1893 
IR[3] => Mux99.IN98
1894 
IR[3] => Mux99.IN99
1895 
IR[3] => Mux99.IN100
1896 
IR[3] => Mux99.IN101
1897 
IR[3] => Mux99.IN102
1898 
IR[3] => Mux99.IN103
1899 
IR[3] => Mux99.IN104
1900 
IR[3] => Mux99.IN105
1901 
IR[3] => Mux99.IN106
1902 
IR[3] => Mux99.IN107
1903 
IR[3] => Mux99.IN108
1904 
IR[3] => Mux99.IN109
1905 
IR[3] => Mux99.IN110
1906 
IR[3] => Mux99.IN111
1907 
IR[3] => Mux99.IN112
1908 
IR[3] => Mux99.IN113
1909 
IR[3] => Mux99.IN114
1910 
IR[3] => Mux99.IN115
1911 
IR[3] => Mux99.IN116
1912 
IR[3] => Mux99.IN117
1913 
IR[3] => Mux99.IN118
1914 
IR[3] => Mux99.IN119
1915 
IR[3] => Mux99.IN120
1916 
IR[3] => Mux99.IN121
1917 
IR[3] => Mux99.IN122
1918 
IR[3] => Mux99.IN123
1919 
IR[3] => Mux99.IN124
1920 
IR[3] => Mux99.IN125
1921 
IR[3] => Mux99.IN126
1922 
IR[3] => Mux99.IN127
1923 
IR[3] => Mux99.IN128
1924 
IR[3] => Mux99.IN129
1925 
IR[3] => Mux99.IN130
1926 
IR[3] => Mux99.IN131
1927 
IR[3] => Mux99.IN132
1928 
IR[3] => Mux99.IN133
1929 
IR[3] => Mux99.IN134
1930 
IR[3] => Mux99.IN135
1931 
IR[3] => Mux99.IN136
1932 
IR[3] => Mux99.IN137
1933 
IR[3] => Mux99.IN138
1934 
IR[3] => Mux99.IN139
1935 
IR[3] => Mux99.IN140
1936 
IR[3] => Mux99.IN141
1937 
IR[3] => Mux99.IN142
1938 
IR[3] => Mux99.IN143
1939 
IR[3] => Mux99.IN144
1940 
IR[3] => Mux99.IN145
1941 
IR[3] => Mux99.IN146
1942 
IR[3] => Mux99.IN147
1943 
IR[3] => Mux99.IN148
1944 
IR[3] => Mux99.IN149
1945 
IR[3] => Mux99.IN150
1946 
IR[3] => Mux99.IN151
1947 
IR[3] => Mux99.IN152
1948 
IR[3] => Mux99.IN153
1949 
IR[3] => Mux99.IN154
1950 
IR[3] => Mux99.IN155
1951 
IR[3] => Mux99.IN156
1952 
IR[3] => Mux99.IN157
1953 
IR[3] => Mux99.IN158
1954 
IR[3] => Mux99.IN159
1955 
IR[3] => Mux99.IN160
1956 
IR[3] => Mux99.IN161
1957 
IR[3] => Mux99.IN162
1958 
IR[3] => Mux99.IN163
1959 
IR[3] => Mux99.IN164
1960 
IR[3] => Mux99.IN165
1961 
IR[3] => Mux99.IN166
1962 
IR[3] => Mux99.IN167
1963 
IR[3] => Mux99.IN168
1964 
IR[3] => Mux99.IN169
1965 
IR[3] => Mux99.IN170
1966 
IR[3] => Mux99.IN171
1967 
IR[3] => Mux99.IN172
1968 
IR[3] => Mux99.IN173
1969 
IR[3] => Mux99.IN174
1970 
IR[3] => Mux99.IN175
1971 
IR[3] => Mux99.IN176
1972 
IR[3] => Mux99.IN177
1973 
IR[3] => Mux99.IN178
1974 
IR[3] => Mux99.IN179
1975 
IR[3] => Mux99.IN180
1976 
IR[3] => Mux99.IN181
1977 
IR[3] => Mux99.IN182
1978 
IR[3] => Mux99.IN183
1979 
IR[3] => Mux99.IN184
1980 
IR[3] => Mux99.IN185
1981 
IR[3] => Mux99.IN186
1982 
IR[3] => Mux99.IN187
1983 
IR[3] => Mux99.IN188
1984 
IR[3] => Mux99.IN189
1985 
IR[3] => Mux99.IN190
1986 
IR[3] => Mux99.IN191
1987 
IR[3] => Mux99.IN192
1988 
IR[3] => Mux99.IN193
1989 
IR[3] => Mux99.IN194
1990 
IR[3] => Mux99.IN195
1991 
IR[3] => Mux99.IN196
1992 
IR[3] => Mux99.IN197
1993 
IR[3] => Mux99.IN198
1994 
IR[3] => Mux99.IN199
1995 
IR[3] => Mux99.IN200
1996 
IR[3] => Mux99.IN201
1997 
IR[3] => Mux99.IN202
1998 
IR[3] => Mux99.IN203
1999 
IR[3] => Mux99.IN204
2000 
IR[3] => Mux99.IN205
2001 
IR[3] => Mux99.IN206
2002 
IR[3] => Mux99.IN207
2003 
IR[3] => Mux99.IN208
2004 
IR[3] => Mux99.IN209
2005 
IR[3] => Mux99.IN210
2006 
IR[3] => Mux99.IN211
2007 
IR[3] => Mux99.IN212
2008 
IR[3] => Mux99.IN213
2009 
IR[3] => Mux99.IN214
2010 
IR[3] => Mux99.IN215
2011 
IR[3] => Mux99.IN216
2012 
IR[3] => Mux99.IN217
2013 
IR[3] => Mux99.IN218
2014 
IR[3] => Mux99.IN219
2015 
IR[3] => Mux99.IN220
2016 
IR[3] => Mux99.IN221
2017 
IR[3] => Mux99.IN222
2018 
IR[3] => Mux99.IN223
2019 
IR[3] => Mux99.IN224
2020 
IR[3] => Mux99.IN225
2021 
IR[3] => Mux99.IN226
2022 
IR[3] => Mux99.IN227
2023 
IR[3] => Mux99.IN228
2024 
IR[3] => Mux99.IN229
2025 
IR[3] => Mux99.IN230
2026 
IR[3] => Mux99.IN231
2027 
IR[3] => Mux99.IN232
2028 
IR[3] => Mux99.IN233
2029 
IR[3] => Mux99.IN234
2030 
IR[3] => Mux99.IN235
2031 
IR[3] => Mux99.IN236
2032 
IR[3] => Mux99.IN237
2033 
IR[3] => Mux99.IN238
2034 
IR[3] => Mux99.IN239
2035 
IR[3] => Mux99.IN240
2036 
IR[3] => Mux99.IN241
2037 
IR[3] => Mux99.IN242
2038 
IR[3] => Mux99.IN243
2039 
IR[3] => Mux99.IN244
2040 
IR[3] => Mux99.IN245
2041 
IR[3] => Mux99.IN246
2042 
IR[3] => Mux99.IN247
2043 
IR[3] => Mux99.IN248
2044 
IR[3] => Mux99.IN249
2045 
IR[3] => Mux99.IN250
2046 
IR[3] => Mux99.IN251
2047 
IR[3] => Mux99.IN252
2048 
IR[3] => Mux99.IN253
2049 
IR[3] => Mux99.IN254
2050 
IR[3] => Mux99.IN255
2051 
IR[3] => Mux99.IN256
2052 
IR[3] => Mux99.IN257
2053 
IR[3] => Mux99.IN258
2054 
IR[3] => Mux99.IN259
2055 
IR[3] => Mux99.IN260
2056 
IR[3] => Mux100.IN260
2057 
IR[3] => Mux101.IN260
2058 
IR[3] => Mux102.IN260
2059 
IR[3] => Mux103.IN260
2060 
IR[3] => Mux104.IN260
2061 
IR[3] => Mux105.IN260
2062 
IR[3] => Mux106.IN260
2063 
IR[3] => Mux107.IN260
2064 
IR[3] => Mux108.IN66
2065 
IR[3] => Mux109.IN260
2066 
IR[3] => Mux110.IN260
2067 
IR[3] => Mux111.IN260
2068 
IR[3] => Mux112.IN260
2069 
IR[3] => Mux114.IN260
2070 
IR[3] => Mux115.IN260
2071 
IR[3] => Mux116.IN260
2072 
IR[3] => ALU_Op.DATAA
2073 
IR[3] => ALU_Op.DATAA
2074 
IR[3] => Mux141.IN6
2075 
IR[3] => Mux141.IN7
2076 
IR[3] => Mux145.IN1
2077 
IR[3] => Mux145.IN2
2078 
IR[3] => Mux145.IN3
2079 
IR[3] => Mux145.IN4
2080 
IR[3] => Mux145.IN5
2081 
IR[3] => Mux145.IN6
2082 
IR[3] => Mux145.IN7
2083 
IR[3] => Mux147.IN7
2084 
IR[3] => Mux150.IN1
2085 
IR[3] => Mux150.IN2
2086 
IR[3] => Mux150.IN3
2087 
IR[3] => Mux150.IN4
2088 
IR[3] => Mux150.IN5
2089 
IR[3] => Mux150.IN6
2090 
IR[3] => Mux150.IN7
2091 
IR[3] => Mux158.IN1
2092 
IR[3] => Mux158.IN2
2093 
IR[3] => Mux158.IN3
2094 
IR[3] => Mux170.IN1
2095 
IR[3] => Mux170.IN2
2096 
IR[3] => Mux170.IN3
2097 
IR[3] => Mux170.IN4
2098 
IR[3] => Mux170.IN5
2099 
IR[3] => Mux170.IN6
2100 
IR[3] => Mux170.IN7
2101 
IR[3] => Mux175.IN1
2102 
IR[3] => Mux175.IN2
2103 
IR[3] => Mux175.IN3
2104 
IR[3] => Mux175.IN4
2105 
IR[3] => Mux175.IN5
2106 
IR[3] => Mux175.IN6
2107 
IR[3] => Mux175.IN7
2108 
IR[3] => Set_BusA_To.DATAB
2109 
IR[3] => Mux183.IN7
2110 
IR[3] => Mux194.IN1
2111 
IR[3] => Mux194.IN2
2112 
IR[3] => Mux194.IN3
2113 
IR[3] => Mux194.IN4
2114 
IR[3] => Mux194.IN5
2115 
IR[3] => Mux194.IN6
2116 
IR[3] => Mux194.IN7
2117 
IR[3] => Mux195.IN7
2118 
IR[3] => Mux199.IN131
2119 
IR[3] => Mux200.IN260
2120 
IR[3] => Mux201.IN260
2121 
IR[3] => Mux202.IN260
2122 
IR[3] => Mux206.IN66
2123 
IR[3] => Mux207.IN66
2124 
IR[3] => Mux208.IN260
2125 
IR[3] => Mux210.IN260
2126 
IR[3] => Mux211.IN66
2127 
IR[3] => Mux212.IN260
2128 
IR[3] => Mux213.IN66
2129 
IR[3] => Mux214.IN260
2130 
IR[3] => Mux215.IN260
2131 
IR[3] => Mux216.IN260
2132 
IR[3] => Mux217.IN66
2133 
IR[3] => Mux218.IN131
2134 
IR[3] => Mux219.IN260
2135 
IR[3] => Mux220.IN260
2136 
IR[3] => Mux221.IN66
2137 
IR[3] => Mux222.IN260
2138 
IR[3] => Mux227.IN260
2139 
IR[3] => Mux228.IN260
2140 
IR[3] => Mux229.IN260
2141 
IR[3] => Mux230.IN38
2142 
IR[3] => Mux230.IN39
2143 
IR[3] => Mux230.IN40
2144 
IR[3] => Mux230.IN41
2145 
IR[3] => Mux230.IN42
2146 
IR[3] => Mux230.IN43
2147 
IR[3] => Mux230.IN44
2148 
IR[3] => Mux230.IN45
2149 
IR[3] => Mux230.IN46
2150 
IR[3] => Mux230.IN47
2151 
IR[3] => Mux230.IN48
2152 
IR[3] => Mux230.IN49
2153 
IR[3] => Mux230.IN50
2154 
IR[3] => Mux230.IN51
2155 
IR[3] => Mux230.IN52
2156 
IR[3] => Mux230.IN53
2157 
IR[3] => Mux230.IN54
2158 
IR[3] => Mux230.IN55
2159 
IR[3] => Mux230.IN56
2160 
IR[3] => Mux230.IN57
2161 
IR[3] => Mux230.IN58
2162 
IR[3] => Mux230.IN59
2163 
IR[3] => Mux230.IN60
2164 
IR[3] => Mux230.IN61
2165 
IR[3] => Mux230.IN62
2166 
IR[3] => Mux230.IN63
2167 
IR[3] => Mux230.IN64
2168 
IR[3] => Mux230.IN65
2169 
IR[3] => Mux230.IN66
2170 
IR[3] => Mux230.IN67
2171 
IR[3] => Mux230.IN68
2172 
IR[3] => Mux230.IN69
2173 
IR[3] => Mux230.IN70
2174 
IR[3] => Mux230.IN71
2175 
IR[3] => Mux230.IN72
2176 
IR[3] => Mux230.IN73
2177 
IR[3] => Mux230.IN74
2178 
IR[3] => Mux230.IN75
2179 
IR[3] => Mux230.IN76
2180 
IR[3] => Mux230.IN77
2181 
IR[3] => Mux230.IN78
2182 
IR[3] => Mux230.IN79
2183 
IR[3] => Mux230.IN80
2184 
IR[3] => Mux230.IN81
2185 
IR[3] => Mux230.IN82
2186 
IR[3] => Mux230.IN83
2187 
IR[3] => Mux230.IN84
2188 
IR[3] => Mux230.IN85
2189 
IR[3] => Mux230.IN86
2190 
IR[3] => Mux230.IN87
2191 
IR[3] => Mux230.IN88
2192 
IR[3] => Mux230.IN89
2193 
IR[3] => Mux230.IN90
2194 
IR[3] => Mux230.IN91
2195 
IR[3] => Mux230.IN92
2196 
IR[3] => Mux230.IN93
2197 
IR[3] => Mux230.IN94
2198 
IR[3] => Mux230.IN95
2199 
IR[3] => Mux230.IN96
2200 
IR[3] => Mux230.IN97
2201 
IR[3] => Mux230.IN98
2202 
IR[3] => Mux230.IN99
2203 
IR[3] => Mux230.IN100
2204 
IR[3] => Mux230.IN101
2205 
IR[3] => Mux230.IN102
2206 
IR[3] => Mux230.IN103
2207 
IR[3] => Mux230.IN104
2208 
IR[3] => Mux230.IN105
2209 
IR[3] => Mux230.IN106
2210 
IR[3] => Mux230.IN107
2211 
IR[3] => Mux230.IN108
2212 
IR[3] => Mux230.IN109
2213 
IR[3] => Mux230.IN110
2214 
IR[3] => Mux230.IN111
2215 
IR[3] => Mux230.IN112
2216 
IR[3] => Mux230.IN113
2217 
IR[3] => Mux230.IN114
2218 
IR[3] => Mux230.IN115
2219 
IR[3] => Mux230.IN116
2220 
IR[3] => Mux230.IN117
2221 
IR[3] => Mux230.IN118
2222 
IR[3] => Mux230.IN119
2223 
IR[3] => Mux230.IN120
2224 
IR[3] => Mux230.IN121
2225 
IR[3] => Mux230.IN122
2226 
IR[3] => Mux230.IN123
2227 
IR[3] => Mux230.IN124
2228 
IR[3] => Mux230.IN125
2229 
IR[3] => Mux230.IN126
2230 
IR[3] => Mux230.IN127
2231 
IR[3] => Mux230.IN128
2232 
IR[3] => Mux230.IN129
2233 
IR[3] => Mux230.IN130
2234 
IR[3] => Mux230.IN131
2235 
IR[3] => Mux230.IN132
2236 
IR[3] => Mux230.IN133
2237 
IR[3] => Mux230.IN134
2238 
IR[3] => Mux230.IN135
2239 
IR[3] => Mux230.IN136
2240 
IR[3] => Mux230.IN137
2241 
IR[3] => Mux230.IN138
2242 
IR[3] => Mux230.IN139
2243 
IR[3] => Mux230.IN140
2244 
IR[3] => Mux230.IN141
2245 
IR[3] => Mux230.IN142
2246 
IR[3] => Mux230.IN143
2247 
IR[3] => Mux230.IN144
2248 
IR[3] => Mux230.IN145
2249 
IR[3] => Mux230.IN146
2250 
IR[3] => Mux230.IN147
2251 
IR[3] => Mux230.IN148
2252 
IR[3] => Mux230.IN149
2253 
IR[3] => Mux230.IN150
2254 
IR[3] => Mux230.IN151
2255 
IR[3] => Mux230.IN152
2256 
IR[3] => Mux230.IN153
2257 
IR[3] => Mux230.IN154
2258 
IR[3] => Mux230.IN155
2259 
IR[3] => Mux230.IN156
2260 
IR[3] => Mux230.IN157
2261 
IR[3] => Mux230.IN158
2262 
IR[3] => Mux230.IN159
2263 
IR[3] => Mux230.IN160
2264 
IR[3] => Mux230.IN161
2265 
IR[3] => Mux230.IN162
2266 
IR[3] => Mux230.IN163
2267 
IR[3] => Mux230.IN164
2268 
IR[3] => Mux230.IN165
2269 
IR[3] => Mux230.IN166
2270 
IR[3] => Mux230.IN167
2271 
IR[3] => Mux230.IN168
2272 
IR[3] => Mux230.IN169
2273 
IR[3] => Mux230.IN170
2274 
IR[3] => Mux230.IN171
2275 
IR[3] => Mux230.IN172
2276 
IR[3] => Mux230.IN173
2277 
IR[3] => Mux230.IN174
2278 
IR[3] => Mux230.IN175
2279 
IR[3] => Mux230.IN176
2280 
IR[3] => Mux230.IN177
2281 
IR[3] => Mux230.IN178
2282 
IR[3] => Mux230.IN179
2283 
IR[3] => Mux230.IN180
2284 
IR[3] => Mux230.IN181
2285 
IR[3] => Mux230.IN182
2286 
IR[3] => Mux230.IN183
2287 
IR[3] => Mux230.IN184
2288 
IR[3] => Mux230.IN185
2289 
IR[3] => Mux230.IN186
2290 
IR[3] => Mux230.IN187
2291 
IR[3] => Mux230.IN188
2292 
IR[3] => Mux230.IN189
2293 
IR[3] => Mux230.IN190
2294 
IR[3] => Mux230.IN191
2295 
IR[3] => Mux230.IN192
2296 
IR[3] => Mux230.IN193
2297 
IR[3] => Mux230.IN194
2298 
IR[3] => Mux230.IN195
2299 
IR[3] => Mux230.IN196
2300 
IR[3] => Mux230.IN197
2301 
IR[3] => Mux230.IN198
2302 
IR[3] => Mux230.IN199
2303 
IR[3] => Mux230.IN200
2304 
IR[3] => Mux230.IN201
2305 
IR[3] => Mux230.IN202
2306 
IR[3] => Mux230.IN203
2307 
IR[3] => Mux230.IN204
2308 
IR[3] => Mux230.IN205
2309 
IR[3] => Mux230.IN206
2310 
IR[3] => Mux230.IN207
2311 
IR[3] => Mux230.IN208
2312 
IR[3] => Mux230.IN209
2313 
IR[3] => Mux230.IN210
2314 
IR[3] => Mux230.IN211
2315 
IR[3] => Mux230.IN212
2316 
IR[3] => Mux230.IN213
2317 
IR[3] => Mux230.IN214
2318 
IR[3] => Mux230.IN215
2319 
IR[3] => Mux230.IN216
2320 
IR[3] => Mux230.IN217
2321 
IR[3] => Mux230.IN218
2322 
IR[3] => Mux230.IN219
2323 
IR[3] => Mux230.IN220
2324 
IR[3] => Mux230.IN221
2325 
IR[3] => Mux230.IN222
2326 
IR[3] => Mux230.IN223
2327 
IR[3] => Mux230.IN224
2328 
IR[3] => Mux230.IN225
2329 
IR[3] => Mux230.IN226
2330 
IR[3] => Mux230.IN227
2331 
IR[3] => Mux230.IN228
2332 
IR[3] => Mux230.IN229
2333 
IR[3] => Mux230.IN230
2334 
IR[3] => Mux230.IN231
2335 
IR[3] => Mux230.IN232
2336 
IR[3] => Mux230.IN233
2337 
IR[3] => Mux230.IN234
2338 
IR[3] => Mux230.IN235
2339 
IR[3] => Mux230.IN236
2340 
IR[3] => Mux230.IN237
2341 
IR[3] => Mux230.IN238
2342 
IR[3] => Mux230.IN239
2343 
IR[3] => Mux230.IN240
2344 
IR[3] => Mux230.IN241
2345 
IR[3] => Mux230.IN242
2346 
IR[3] => Mux230.IN243
2347 
IR[3] => Mux230.IN244
2348 
IR[3] => Mux230.IN245
2349 
IR[3] => Mux230.IN246
2350 
IR[3] => Mux230.IN247
2351 
IR[3] => Mux230.IN248
2352 
IR[3] => Mux230.IN249
2353 
IR[3] => Mux230.IN250
2354 
IR[3] => Mux230.IN251
2355 
IR[3] => Mux230.IN252
2356 
IR[3] => Mux230.IN253
2357 
IR[3] => Mux230.IN254
2358 
IR[3] => Mux230.IN255
2359 
IR[3] => Mux230.IN256
2360 
IR[3] => Mux230.IN257
2361 
IR[3] => Mux230.IN258
2362 
IR[3] => Mux230.IN259
2363 
IR[3] => Mux230.IN260
2364 
IR[3] => Mux232.IN260
2365 
IR[3] => Mux233.IN260
2366 
IR[3] => Mux237.IN131
2367 
IR[3] => Mux238.IN260
2368 
IR[3] => Mux239.IN260
2369 
IR[3] => Mux240.IN260
2370 
IR[3] => Equal3.IN0
2371 
IR[3] => Equal5.IN5
2372 
IR[3] => Equal7.IN2
2373 
IR[4] => Mux1.IN7
2374 
IR[4] => Set_BusA_To.DATAA
2375 
IR[4] => Mux45.IN5
2376 
IR[4] => Mux61.IN259
2377 
IR[4] => Mux62.IN154
2378 
IR[4] => Mux63.IN154
2379 
IR[4] => Mux64.IN154
2380 
IR[4] => Mux65.IN259
2381 
IR[4] => Mux67.IN259
2382 
IR[4] => Mux68.IN196
2383 
IR[4] => Mux68.IN197
2384 
IR[4] => Mux68.IN198
2385 
IR[4] => Mux68.IN199
2386 
IR[4] => Mux68.IN200
2387 
IR[4] => Mux68.IN201
2388 
IR[4] => Mux68.IN202
2389 
IR[4] => Mux68.IN203
2390 
IR[4] => Mux68.IN204
2391 
IR[4] => Mux68.IN205
2392 
IR[4] => Mux68.IN206
2393 
IR[4] => Mux68.IN207
2394 
IR[4] => Mux68.IN208
2395 
IR[4] => Mux68.IN209
2396 
IR[4] => Mux68.IN210
2397 
IR[4] => Mux68.IN211
2398 
IR[4] => Mux68.IN212
2399 
IR[4] => Mux68.IN213
2400 
IR[4] => Mux68.IN214
2401 
IR[4] => Mux68.IN215
2402 
IR[4] => Mux68.IN216
2403 
IR[4] => Mux68.IN217
2404 
IR[4] => Mux68.IN218
2405 
IR[4] => Mux68.IN219
2406 
IR[4] => Mux68.IN220
2407 
IR[4] => Mux68.IN221
2408 
IR[4] => Mux68.IN222
2409 
IR[4] => Mux68.IN223
2410 
IR[4] => Mux68.IN224
2411 
IR[4] => Mux68.IN225
2412 
IR[4] => Mux68.IN226
2413 
IR[4] => Mux68.IN227
2414 
IR[4] => Mux68.IN228
2415 
IR[4] => Mux68.IN229
2416 
IR[4] => Mux68.IN230
2417 
IR[4] => Mux68.IN231
2418 
IR[4] => Mux68.IN232
2419 
IR[4] => Mux68.IN233
2420 
IR[4] => Mux68.IN234
2421 
IR[4] => Mux68.IN235
2422 
IR[4] => Mux68.IN236
2423 
IR[4] => Mux68.IN237
2424 
IR[4] => Mux68.IN238
2425 
IR[4] => Mux68.IN239
2426 
IR[4] => Mux68.IN240
2427 
IR[4] => Mux68.IN241
2428 
IR[4] => Mux68.IN242
2429 
IR[4] => Mux68.IN243
2430 
IR[4] => Mux68.IN244
2431 
IR[4] => Mux68.IN245
2432 
IR[4] => Mux68.IN246
2433 
IR[4] => Mux68.IN247
2434 
IR[4] => Mux68.IN248
2435 
IR[4] => Mux68.IN249
2436 
IR[4] => Mux68.IN250
2437 
IR[4] => Mux68.IN251
2438 
IR[4] => Mux68.IN252
2439 
IR[4] => Mux68.IN253
2440 
IR[4] => Mux68.IN254
2441 
IR[4] => Mux68.IN255
2442 
IR[4] => Mux68.IN256
2443 
IR[4] => Mux68.IN257
2444 
IR[4] => Mux68.IN258
2445 
IR[4] => Mux68.IN259
2446 
IR[4] => Mux69.IN196
2447 
IR[4] => Mux70.IN259
2448 
IR[4] => Mux71.IN259
2449 
IR[4] => Mux72.IN258
2450 
IR[4] => Mux73.IN259
2451 
IR[4] => Mux74.IN259
2452 
IR[4] => Mux75.IN259
2453 
IR[4] => Mux76.IN259
2454 
IR[4] => Mux77.IN259
2455 
IR[4] => Mux78.IN259
2456 
IR[4] => Mux79.IN259
2457 
IR[4] => Mux80.IN259
2458 
IR[4] => Mux81.IN259
2459 
IR[4] => Mux82.IN259
2460 
IR[4] => Mux83.IN259
2461 
IR[4] => Mux84.IN259
2462 
IR[4] => Mux85.IN259
2463 
IR[4] => Mux86.IN259
2464 
IR[4] => Mux87.IN259
2465 
IR[4] => Mux88.IN259
2466 
IR[4] => Mux89.IN259
2467 
IR[4] => Mux90.IN251
2468 
IR[4] => Mux90.IN252
2469 
IR[4] => Mux90.IN253
2470 
IR[4] => Mux90.IN254
2471 
IR[4] => Mux90.IN255
2472 
IR[4] => Mux90.IN256
2473 
IR[4] => Mux90.IN257
2474 
IR[4] => Mux90.IN258
2475 
IR[4] => Mux90.IN259
2476 
IR[4] => Mux91.IN259
2477 
IR[4] => Mux92.IN259
2478 
IR[4] => Mux93.IN259
2479 
IR[4] => Mux94.IN259
2480 
IR[4] => Mux95.IN259
2481 
IR[4] => Mux96.IN259
2482 
IR[4] => Mux97.IN259
2483 
IR[4] => Mux98.IN29
2484 
IR[4] => Mux98.IN30
2485 
IR[4] => Mux98.IN31
2486 
IR[4] => Mux98.IN32
2487 
IR[4] => Mux98.IN33
2488 
IR[4] => Mux98.IN34
2489 
IR[4] => Mux98.IN35
2490 
IR[4] => Mux98.IN36
2491 
IR[4] => Mux98.IN37
2492 
IR[4] => Mux98.IN38
2493 
IR[4] => Mux98.IN39
2494 
IR[4] => Mux98.IN40
2495 
IR[4] => Mux98.IN41
2496 
IR[4] => Mux98.IN42
2497 
IR[4] => Mux98.IN43
2498 
IR[4] => Mux98.IN44
2499 
IR[4] => Mux98.IN45
2500 
IR[4] => Mux98.IN46
2501 
IR[4] => Mux98.IN47
2502 
IR[4] => Mux98.IN48
2503 
IR[4] => Mux98.IN49
2504 
IR[4] => Mux98.IN50
2505 
IR[4] => Mux98.IN51
2506 
IR[4] => Mux98.IN52
2507 
IR[4] => Mux98.IN53
2508 
IR[4] => Mux98.IN54
2509 
IR[4] => Mux98.IN55
2510 
IR[4] => Mux98.IN56
2511 
IR[4] => Mux98.IN57
2512 
IR[4] => Mux98.IN58
2513 
IR[4] => Mux98.IN59
2514 
IR[4] => Mux98.IN60
2515 
IR[4] => Mux98.IN61
2516 
IR[4] => Mux98.IN62
2517 
IR[4] => Mux98.IN63
2518 
IR[4] => Mux98.IN64
2519 
IR[4] => Mux98.IN65
2520 
IR[4] => Mux98.IN66
2521 
IR[4] => Mux98.IN67
2522 
IR[4] => Mux98.IN68
2523 
IR[4] => Mux98.IN69
2524 
IR[4] => Mux98.IN70
2525 
IR[4] => Mux98.IN71
2526 
IR[4] => Mux98.IN72
2527 
IR[4] => Mux98.IN73
2528 
IR[4] => Mux98.IN74
2529 
IR[4] => Mux98.IN75
2530 
IR[4] => Mux98.IN76
2531 
IR[4] => Mux98.IN77
2532 
IR[4] => Mux98.IN78
2533 
IR[4] => Mux98.IN79
2534 
IR[4] => Mux98.IN80
2535 
IR[4] => Mux98.IN81
2536 
IR[4] => Mux98.IN82
2537 
IR[4] => Mux98.IN83
2538 
IR[4] => Mux98.IN84
2539 
IR[4] => Mux98.IN85
2540 
IR[4] => Mux98.IN86
2541 
IR[4] => Mux98.IN87
2542 
IR[4] => Mux98.IN88
2543 
IR[4] => Mux98.IN89
2544 
IR[4] => Mux98.IN90
2545 
IR[4] => Mux98.IN91
2546 
IR[4] => Mux98.IN92
2547 
IR[4] => Mux98.IN93
2548 
IR[4] => Mux98.IN94
2549 
IR[4] => Mux98.IN95
2550 
IR[4] => Mux98.IN96
2551 
IR[4] => Mux98.IN97
2552 
IR[4] => Mux98.IN98
2553 
IR[4] => Mux98.IN99
2554 
IR[4] => Mux98.IN100
2555 
IR[4] => Mux98.IN101
2556 
IR[4] => Mux98.IN102
2557 
IR[4] => Mux98.IN103
2558 
IR[4] => Mux98.IN104
2559 
IR[4] => Mux98.IN105
2560 
IR[4] => Mux98.IN106
2561 
IR[4] => Mux98.IN107
2562 
IR[4] => Mux98.IN108
2563 
IR[4] => Mux98.IN109
2564 
IR[4] => Mux98.IN110
2565 
IR[4] => Mux98.IN111
2566 
IR[4] => Mux98.IN112
2567 
IR[4] => Mux98.IN113
2568 
IR[4] => Mux98.IN114
2569 
IR[4] => Mux98.IN115
2570 
IR[4] => Mux98.IN116
2571 
IR[4] => Mux98.IN117
2572 
IR[4] => Mux98.IN118
2573 
IR[4] => Mux98.IN119
2574 
IR[4] => Mux98.IN120
2575 
IR[4] => Mux98.IN121
2576 
IR[4] => Mux98.IN122
2577 
IR[4] => Mux98.IN123
2578 
IR[4] => Mux98.IN124
2579 
IR[4] => Mux98.IN125
2580 
IR[4] => Mux98.IN126
2581 
IR[4] => Mux98.IN127
2582 
IR[4] => Mux98.IN128
2583 
IR[4] => Mux98.IN129
2584 
IR[4] => Mux98.IN130
2585 
IR[4] => Mux98.IN131
2586 
IR[4] => Mux98.IN132
2587 
IR[4] => Mux98.IN133
2588 
IR[4] => Mux98.IN134
2589 
IR[4] => Mux98.IN135
2590 
IR[4] => Mux98.IN136
2591 
IR[4] => Mux98.IN137
2592 
IR[4] => Mux98.IN138
2593 
IR[4] => Mux98.IN139
2594 
IR[4] => Mux98.IN140
2595 
IR[4] => Mux98.IN141
2596 
IR[4] => Mux98.IN142
2597 
IR[4] => Mux98.IN143
2598 
IR[4] => Mux98.IN144
2599 
IR[4] => Mux98.IN145
2600 
IR[4] => Mux98.IN146
2601 
IR[4] => Mux98.IN147
2602 
IR[4] => Mux98.IN148
2603 
IR[4] => Mux98.IN149
2604 
IR[4] => Mux98.IN150
2605 
IR[4] => Mux98.IN151
2606 
IR[4] => Mux98.IN152
2607 
IR[4] => Mux98.IN153
2608 
IR[4] => Mux98.IN154
2609 
IR[4] => Mux98.IN155
2610 
IR[4] => Mux98.IN156
2611 
IR[4] => Mux98.IN157
2612 
IR[4] => Mux98.IN158
2613 
IR[4] => Mux98.IN159
2614 
IR[4] => Mux98.IN160
2615 
IR[4] => Mux98.IN161
2616 
IR[4] => Mux98.IN162
2617 
IR[4] => Mux98.IN163
2618 
IR[4] => Mux98.IN164
2619 
IR[4] => Mux98.IN165
2620 
IR[4] => Mux98.IN166
2621 
IR[4] => Mux98.IN167
2622 
IR[4] => Mux98.IN168
2623 
IR[4] => Mux98.IN169
2624 
IR[4] => Mux98.IN170
2625 
IR[4] => Mux98.IN171
2626 
IR[4] => Mux98.IN172
2627 
IR[4] => Mux98.IN173
2628 
IR[4] => Mux98.IN174
2629 
IR[4] => Mux98.IN175
2630 
IR[4] => Mux98.IN176
2631 
IR[4] => Mux98.IN177
2632 
IR[4] => Mux98.IN178
2633 
IR[4] => Mux98.IN179
2634 
IR[4] => Mux98.IN180
2635 
IR[4] => Mux98.IN181
2636 
IR[4] => Mux98.IN182
2637 
IR[4] => Mux98.IN183
2638 
IR[4] => Mux98.IN184
2639 
IR[4] => Mux98.IN185
2640 
IR[4] => Mux98.IN186
2641 
IR[4] => Mux98.IN187
2642 
IR[4] => Mux98.IN188
2643 
IR[4] => Mux98.IN189
2644 
IR[4] => Mux98.IN190
2645 
IR[4] => Mux98.IN191
2646 
IR[4] => Mux98.IN192
2647 
IR[4] => Mux98.IN193
2648 
IR[4] => Mux98.IN194
2649 
IR[4] => Mux98.IN195
2650 
IR[4] => Mux98.IN196
2651 
IR[4] => Mux98.IN197
2652 
IR[4] => Mux98.IN198
2653 
IR[4] => Mux98.IN199
2654 
IR[4] => Mux98.IN200
2655 
IR[4] => Mux98.IN201
2656 
IR[4] => Mux98.IN202
2657 
IR[4] => Mux98.IN203
2658 
IR[4] => Mux98.IN204
2659 
IR[4] => Mux98.IN205
2660 
IR[4] => Mux98.IN206
2661 
IR[4] => Mux98.IN207
2662 
IR[4] => Mux98.IN208
2663 
IR[4] => Mux98.IN209
2664 
IR[4] => Mux98.IN210
2665 
IR[4] => Mux98.IN211
2666 
IR[4] => Mux98.IN212
2667 
IR[4] => Mux98.IN213
2668 
IR[4] => Mux98.IN214
2669 
IR[4] => Mux98.IN215
2670 
IR[4] => Mux98.IN216
2671 
IR[4] => Mux98.IN217
2672 
IR[4] => Mux98.IN218
2673 
IR[4] => Mux98.IN219
2674 
IR[4] => Mux98.IN220
2675 
IR[4] => Mux98.IN221
2676 
IR[4] => Mux98.IN222
2677 
IR[4] => Mux98.IN223
2678 
IR[4] => Mux98.IN224
2679 
IR[4] => Mux98.IN225
2680 
IR[4] => Mux98.IN226
2681 
IR[4] => Mux98.IN227
2682 
IR[4] => Mux98.IN228
2683 
IR[4] => Mux98.IN229
2684 
IR[4] => Mux98.IN230
2685 
IR[4] => Mux98.IN231
2686 
IR[4] => Mux98.IN232
2687 
IR[4] => Mux98.IN233
2688 
IR[4] => Mux98.IN234
2689 
IR[4] => Mux98.IN235
2690 
IR[4] => Mux98.IN236
2691 
IR[4] => Mux98.IN237
2692 
IR[4] => Mux98.IN238
2693 
IR[4] => Mux98.IN239
2694 
IR[4] => Mux98.IN240
2695 
IR[4] => Mux98.IN241
2696 
IR[4] => Mux98.IN242
2697 
IR[4] => Mux98.IN243
2698 
IR[4] => Mux98.IN244
2699 
IR[4] => Mux98.IN245
2700 
IR[4] => Mux98.IN246
2701 
IR[4] => Mux98.IN247
2702 
IR[4] => Mux98.IN248
2703 
IR[4] => Mux98.IN249
2704 
IR[4] => Mux98.IN250
2705 
IR[4] => Mux98.IN251
2706 
IR[4] => Mux98.IN252
2707 
IR[4] => Mux98.IN253
2708 
IR[4] => Mux98.IN254
2709 
IR[4] => Mux98.IN255
2710 
IR[4] => Mux98.IN256
2711 
IR[4] => Mux98.IN257
2712 
IR[4] => Mux98.IN258
2713 
IR[4] => Mux98.IN259
2714 
IR[4] => Mux99.IN29
2715 
IR[4] => Mux100.IN259
2716 
IR[4] => Mux101.IN259
2717 
IR[4] => Mux102.IN259
2718 
IR[4] => Mux103.IN259
2719 
IR[4] => Mux104.IN259
2720 
IR[4] => Mux105.IN259
2721 
IR[4] => Mux106.IN259
2722 
IR[4] => Mux107.IN259
2723 
IR[4] => Mux109.IN259
2724 
IR[4] => Mux110.IN259
2725 
IR[4] => Mux111.IN259
2726 
IR[4] => Mux112.IN259
2727 
IR[4] => Mux114.IN259
2728 
IR[4] => Mux115.IN259
2729 
IR[4] => Mux116.IN259
2730 
IR[4] => ALU_Op.DATAA
2731 
IR[4] => ALU_Op.DATAA
2732 
IR[4] => Set_BusA_To.DATAA
2733 
IR[4] => Mux144.IN1
2734 
IR[4] => Mux144.IN2
2735 
IR[4] => Mux144.IN3
2736 
IR[4] => Mux144.IN4
2737 
IR[4] => Mux144.IN5
2738 
IR[4] => Mux144.IN6
2739 
IR[4] => Mux144.IN7
2740 
IR[4] => Mux149.IN1
2741 
IR[4] => Mux149.IN2
2742 
IR[4] => Mux149.IN3
2743 
IR[4] => Mux149.IN4
2744 
IR[4] => Mux149.IN5
2745 
IR[4] => Mux149.IN6
2746 
IR[4] => Mux149.IN7
2747 
IR[4] => Mux152.IN5
2748 
IR[4] => Mux153.IN5
2749 
IR[4] => Mux154.IN5
2750 
IR[4] => Mux155.IN2
2751 
IR[4] => Mux155.IN3
2752 
IR[4] => Mux155.IN4
2753 
IR[4] => Mux155.IN5
2754 
IR[4] => Mux157.IN1
2755 
IR[4] => Mux157.IN2
2756 
IR[4] => Mux157.IN3
2757 
IR[4] => Mux166.IN1
2758 
IR[4] => Mux166.IN2
2759 
IR[4] => Mux166.IN3
2760 
IR[4] => Mux169.IN1
2761 
IR[4] => Mux169.IN2
2762 
IR[4] => Mux169.IN3
2763 
IR[4] => Mux169.IN4
2764 
IR[4] => Mux169.IN5
2765 
IR[4] => Mux169.IN6
2766 
IR[4] => Mux169.IN7
2767 
IR[4] => Mux174.IN1
2768 
IR[4] => Mux174.IN2
2769 
IR[4] => Mux174.IN3
2770 
IR[4] => Mux174.IN4
2771 
IR[4] => Mux174.IN5
2772 
IR[4] => Mux174.IN6
2773 
IR[4] => Mux174.IN7
2774 
IR[4] => Set_BusA_To.DATAB
2775 
IR[4] => Mux182.IN7
2776 
IR[4] => Mux193.IN1
2777 
IR[4] => Mux193.IN2
2778 
IR[4] => Mux193.IN3
2779 
IR[4] => Mux193.IN4
2780 
IR[4] => Mux193.IN5
2781 
IR[4] => Mux193.IN6
2782 
IR[4] => Mux193.IN7
2783 
IR[4] => Mux198.IN131
2784 
IR[4] => Mux200.IN259
2785 
IR[4] => Mux201.IN259
2786 
IR[4] => Mux202.IN259
2787 
IR[4] => Mux203.IN131
2788 
IR[4] => Mux205.IN131
2789 
IR[4] => Mux208.IN259
2790 
IR[4] => Mux210.IN259
2791 
IR[4] => Mux212.IN259
2792 
IR[4] => Mux214.IN259
2793 
IR[4] => Mux215.IN259
2794 
IR[4] => Mux216.IN259
2795 
IR[4] => Mux219.IN259
2796 
IR[4] => Mux220.IN259
2797 
IR[4] => Mux222.IN259
2798 
IR[4] => Mux227.IN259
2799 
IR[4] => Mux228.IN259
2800 
IR[4] => Mux229.IN37
2801 
IR[4] => Mux229.IN38
2802 
IR[4] => Mux229.IN39
2803 
IR[4] => Mux229.IN40
2804 
IR[4] => Mux229.IN41
2805 
IR[4] => Mux229.IN42
2806 
IR[4] => Mux229.IN43
2807 
IR[4] => Mux229.IN44
2808 
IR[4] => Mux229.IN45
2809 
IR[4] => Mux229.IN46
2810 
IR[4] => Mux229.IN47
2811 
IR[4] => Mux229.IN48
2812 
IR[4] => Mux229.IN49
2813 
IR[4] => Mux229.IN50
2814 
IR[4] => Mux229.IN51
2815 
IR[4] => Mux229.IN52
2816 
IR[4] => Mux229.IN53
2817 
IR[4] => Mux229.IN54
2818 
IR[4] => Mux229.IN55
2819 
IR[4] => Mux229.IN56
2820 
IR[4] => Mux229.IN57
2821 
IR[4] => Mux229.IN58
2822 
IR[4] => Mux229.IN59
2823 
IR[4] => Mux229.IN60
2824 
IR[4] => Mux229.IN61
2825 
IR[4] => Mux229.IN62
2826 
IR[4] => Mux229.IN63
2827 
IR[4] => Mux229.IN64
2828 
IR[4] => Mux229.IN65
2829 
IR[4] => Mux229.IN66
2830 
IR[4] => Mux229.IN67
2831 
IR[4] => Mux229.IN68
2832 
IR[4] => Mux229.IN69
2833 
IR[4] => Mux229.IN70
2834 
IR[4] => Mux229.IN71
2835 
IR[4] => Mux229.IN72
2836 
IR[4] => Mux229.IN73
2837 
IR[4] => Mux229.IN74
2838 
IR[4] => Mux229.IN75
2839 
IR[4] => Mux229.IN76
2840 
IR[4] => Mux229.IN77
2841 
IR[4] => Mux229.IN78
2842 
IR[4] => Mux229.IN79
2843 
IR[4] => Mux229.IN80
2844 
IR[4] => Mux229.IN81
2845 
IR[4] => Mux229.IN82
2846 
IR[4] => Mux229.IN83
2847 
IR[4] => Mux229.IN84
2848 
IR[4] => Mux229.IN85
2849 
IR[4] => Mux229.IN86
2850 
IR[4] => Mux229.IN87
2851 
IR[4] => Mux229.IN88
2852 
IR[4] => Mux229.IN89
2853 
IR[4] => Mux229.IN90
2854 
IR[4] => Mux229.IN91
2855 
IR[4] => Mux229.IN92
2856 
IR[4] => Mux229.IN93
2857 
IR[4] => Mux229.IN94
2858 
IR[4] => Mux229.IN95
2859 
IR[4] => Mux229.IN96
2860 
IR[4] => Mux229.IN97
2861 
IR[4] => Mux229.IN98
2862 
IR[4] => Mux229.IN99
2863 
IR[4] => Mux229.IN100
2864 
IR[4] => Mux229.IN101
2865 
IR[4] => Mux229.IN102
2866 
IR[4] => Mux229.IN103
2867 
IR[4] => Mux229.IN104
2868 
IR[4] => Mux229.IN105
2869 
IR[4] => Mux229.IN106
2870 
IR[4] => Mux229.IN107
2871 
IR[4] => Mux229.IN108
2872 
IR[4] => Mux229.IN109
2873 
IR[4] => Mux229.IN110
2874 
IR[4] => Mux229.IN111
2875 
IR[4] => Mux229.IN112
2876 
IR[4] => Mux229.IN113
2877 
IR[4] => Mux229.IN114
2878 
IR[4] => Mux229.IN115
2879 
IR[4] => Mux229.IN116
2880 
IR[4] => Mux229.IN117
2881 
IR[4] => Mux229.IN118
2882 
IR[4] => Mux229.IN119
2883 
IR[4] => Mux229.IN120
2884 
IR[4] => Mux229.IN121
2885 
IR[4] => Mux229.IN122
2886 
IR[4] => Mux229.IN123
2887 
IR[4] => Mux229.IN124
2888 
IR[4] => Mux229.IN125
2889 
IR[4] => Mux229.IN126
2890 
IR[4] => Mux229.IN127
2891 
IR[4] => Mux229.IN128
2892 
IR[4] => Mux229.IN129
2893 
IR[4] => Mux229.IN130
2894 
IR[4] => Mux229.IN131
2895 
IR[4] => Mux229.IN132
2896 
IR[4] => Mux229.IN133
2897 
IR[4] => Mux229.IN134
2898 
IR[4] => Mux229.IN135
2899 
IR[4] => Mux229.IN136
2900 
IR[4] => Mux229.IN137
2901 
IR[4] => Mux229.IN138
2902 
IR[4] => Mux229.IN139
2903 
IR[4] => Mux229.IN140
2904 
IR[4] => Mux229.IN141
2905 
IR[4] => Mux229.IN142
2906 
IR[4] => Mux229.IN143
2907 
IR[4] => Mux229.IN144
2908 
IR[4] => Mux229.IN145
2909 
IR[4] => Mux229.IN146
2910 
IR[4] => Mux229.IN147
2911 
IR[4] => Mux229.IN148
2912 
IR[4] => Mux229.IN149
2913 
IR[4] => Mux229.IN150
2914 
IR[4] => Mux229.IN151
2915 
IR[4] => Mux229.IN152
2916 
IR[4] => Mux229.IN153
2917 
IR[4] => Mux229.IN154
2918 
IR[4] => Mux229.IN155
2919 
IR[4] => Mux229.IN156
2920 
IR[4] => Mux229.IN157
2921 
IR[4] => Mux229.IN158
2922 
IR[4] => Mux229.IN159
2923 
IR[4] => Mux229.IN160
2924 
IR[4] => Mux229.IN161
2925 
IR[4] => Mux229.IN162
2926 
IR[4] => Mux229.IN163
2927 
IR[4] => Mux229.IN164
2928 
IR[4] => Mux229.IN165
2929 
IR[4] => Mux229.IN166
2930 
IR[4] => Mux229.IN167
2931 
IR[4] => Mux229.IN168
2932 
IR[4] => Mux229.IN169
2933 
IR[4] => Mux229.IN170
2934 
IR[4] => Mux229.IN171
2935 
IR[4] => Mux229.IN172
2936 
IR[4] => Mux229.IN173
2937 
IR[4] => Mux229.IN174
2938 
IR[4] => Mux229.IN175
2939 
IR[4] => Mux229.IN176
2940 
IR[4] => Mux229.IN177
2941 
IR[4] => Mux229.IN178
2942 
IR[4] => Mux229.IN179
2943 
IR[4] => Mux229.IN180
2944 
IR[4] => Mux229.IN181
2945 
IR[4] => Mux229.IN182
2946 
IR[4] => Mux229.IN183
2947 
IR[4] => Mux229.IN184
2948 
IR[4] => Mux229.IN185
2949 
IR[4] => Mux229.IN186
2950 
IR[4] => Mux229.IN187
2951 
IR[4] => Mux229.IN188
2952 
IR[4] => Mux229.IN189
2953 
IR[4] => Mux229.IN190
2954 
IR[4] => Mux229.IN191
2955 
IR[4] => Mux229.IN192
2956 
IR[4] => Mux229.IN193
2957 
IR[4] => Mux229.IN194
2958 
IR[4] => Mux229.IN195
2959 
IR[4] => Mux229.IN196
2960 
IR[4] => Mux229.IN197
2961 
IR[4] => Mux229.IN198
2962 
IR[4] => Mux229.IN199
2963 
IR[4] => Mux229.IN200
2964 
IR[4] => Mux229.IN201
2965 
IR[4] => Mux229.IN202
2966 
IR[4] => Mux229.IN203
2967 
IR[4] => Mux229.IN204
2968 
IR[4] => Mux229.IN205
2969 
IR[4] => Mux229.IN206
2970 
IR[4] => Mux229.IN207
2971 
IR[4] => Mux229.IN208
2972 
IR[4] => Mux229.IN209
2973 
IR[4] => Mux229.IN210
2974 
IR[4] => Mux229.IN211
2975 
IR[4] => Mux229.IN212
2976 
IR[4] => Mux229.IN213
2977 
IR[4] => Mux229.IN214
2978 
IR[4] => Mux229.IN215
2979 
IR[4] => Mux229.IN216
2980 
IR[4] => Mux229.IN217
2981 
IR[4] => Mux229.IN218
2982 
IR[4] => Mux229.IN219
2983 
IR[4] => Mux229.IN220
2984 
IR[4] => Mux229.IN221
2985 
IR[4] => Mux229.IN222
2986 
IR[4] => Mux229.IN223
2987 
IR[4] => Mux229.IN224
2988 
IR[4] => Mux229.IN225
2989 
IR[4] => Mux229.IN226
2990 
IR[4] => Mux229.IN227
2991 
IR[4] => Mux229.IN228
2992 
IR[4] => Mux229.IN229
2993 
IR[4] => Mux229.IN230
2994 
IR[4] => Mux229.IN231
2995 
IR[4] => Mux229.IN232
2996 
IR[4] => Mux229.IN233
2997 
IR[4] => Mux229.IN234
2998 
IR[4] => Mux229.IN235
2999 
IR[4] => Mux229.IN236
3000 
IR[4] => Mux229.IN237
3001 
IR[4] => Mux229.IN238
3002 
IR[4] => Mux229.IN239
3003 
IR[4] => Mux229.IN240
3004 
IR[4] => Mux229.IN241
3005 
IR[4] => Mux229.IN242
3006 
IR[4] => Mux229.IN243
3007 
IR[4] => Mux229.IN244
3008 
IR[4] => Mux229.IN245
3009 
IR[4] => Mux229.IN246
3010 
IR[4] => Mux229.IN247
3011 
IR[4] => Mux229.IN248
3012 
IR[4] => Mux229.IN249
3013 
IR[4] => Mux229.IN250
3014 
IR[4] => Mux229.IN251
3015 
IR[4] => Mux229.IN252
3016 
IR[4] => Mux229.IN253
3017 
IR[4] => Mux229.IN254
3018 
IR[4] => Mux229.IN255
3019 
IR[4] => Mux229.IN256
3020 
IR[4] => Mux229.IN257
3021 
IR[4] => Mux229.IN258
3022 
IR[4] => Mux229.IN259
3023 
IR[4] => Mux230.IN37
3024 
IR[4] => Mux232.IN259
3025 
IR[4] => Mux233.IN259
3026 
IR[4] => Mux237.IN130
3027 
IR[4] => Mux238.IN259
3028 
IR[4] => Mux239.IN259
3029 
IR[4] => Mux240.IN259
3030 
IR[4] => Equal2.IN1
3031 
IR[4] => Equal3.IN2
3032 
IR[4] => Equal5.IN1
3033 
IR[4] => Equal7.IN5
3034 
IR[5] => Mux0.IN7
3035 
IR[5] => Set_BusA_To.DATAA
3036 
IR[5] => Mux45.IN4
3037 
IR[5] => Mux61.IN258
3038 
IR[5] => Mux62.IN153
3039 
IR[5] => Mux63.IN153
3040 
IR[5] => Mux64.IN153
3041 
IR[5] => Mux65.IN258
3042 
IR[5] => Mux67.IN195
3043 
IR[5] => Mux67.IN196
3044 
IR[5] => Mux67.IN197
3045 
IR[5] => Mux67.IN198
3046 
IR[5] => Mux67.IN199
3047 
IR[5] => Mux67.IN200
3048 
IR[5] => Mux67.IN201
3049 
IR[5] => Mux67.IN202
3050 
IR[5] => Mux67.IN203
3051 
IR[5] => Mux67.IN204
3052 
IR[5] => Mux67.IN205
3053 
IR[5] => Mux67.IN206
3054 
IR[5] => Mux67.IN207
3055 
IR[5] => Mux67.IN208
3056 
IR[5] => Mux67.IN209
3057 
IR[5] => Mux67.IN210
3058 
IR[5] => Mux67.IN211
3059 
IR[5] => Mux67.IN212
3060 
IR[5] => Mux67.IN213
3061 
IR[5] => Mux67.IN214
3062 
IR[5] => Mux67.IN215
3063 
IR[5] => Mux67.IN216
3064 
IR[5] => Mux67.IN217
3065 
IR[5] => Mux67.IN218
3066 
IR[5] => Mux67.IN219
3067 
IR[5] => Mux67.IN220
3068 
IR[5] => Mux67.IN221
3069 
IR[5] => Mux67.IN222
3070 
IR[5] => Mux67.IN223
3071 
IR[5] => Mux67.IN224
3072 
IR[5] => Mux67.IN225
3073 
IR[5] => Mux67.IN226
3074 
IR[5] => Mux67.IN227
3075 
IR[5] => Mux67.IN228
3076 
IR[5] => Mux67.IN229
3077 
IR[5] => Mux67.IN230
3078 
IR[5] => Mux67.IN231
3079 
IR[5] => Mux67.IN232
3080 
IR[5] => Mux67.IN233
3081 
IR[5] => Mux67.IN234
3082 
IR[5] => Mux67.IN235
3083 
IR[5] => Mux67.IN236
3084 
IR[5] => Mux67.IN237
3085 
IR[5] => Mux67.IN238
3086 
IR[5] => Mux67.IN239
3087 
IR[5] => Mux67.IN240
3088 
IR[5] => Mux67.IN241
3089 
IR[5] => Mux67.IN242
3090 
IR[5] => Mux67.IN243
3091 
IR[5] => Mux67.IN244
3092 
IR[5] => Mux67.IN245
3093 
IR[5] => Mux67.IN246
3094 
IR[5] => Mux67.IN247
3095 
IR[5] => Mux67.IN248
3096 
IR[5] => Mux67.IN249
3097 
IR[5] => Mux67.IN250
3098 
IR[5] => Mux67.IN251
3099 
IR[5] => Mux67.IN252
3100 
IR[5] => Mux67.IN253
3101 
IR[5] => Mux67.IN254
3102 
IR[5] => Mux67.IN255
3103 
IR[5] => Mux67.IN256
3104 
IR[5] => Mux67.IN257
3105 
IR[5] => Mux67.IN258
3106 
IR[5] => Mux68.IN195
3107 
IR[5] => Mux69.IN195
3108 
IR[5] => Mux70.IN258
3109 
IR[5] => Mux71.IN258
3110 
IR[5] => Mux72.IN257
3111 
IR[5] => Mux73.IN258
3112 
IR[5] => Mux74.IN258
3113 
IR[5] => Mux75.IN258
3114 
IR[5] => Mux76.IN258
3115 
IR[5] => Mux77.IN258
3116 
IR[5] => Mux78.IN258
3117 
IR[5] => Mux79.IN258
3118 
IR[5] => Mux80.IN258
3119 
IR[5] => Mux81.IN258
3120 
IR[5] => Mux82.IN258
3121 
IR[5] => Mux83.IN258
3122 
IR[5] => Mux84.IN258
3123 
IR[5] => Mux85.IN258
3124 
IR[5] => Mux86.IN258
3125 
IR[5] => Mux87.IN258
3126 
IR[5] => Mux88.IN258
3127 
IR[5] => Mux89.IN250
3128 
IR[5] => Mux89.IN251
3129 
IR[5] => Mux89.IN252
3130 
IR[5] => Mux89.IN253
3131 
IR[5] => Mux89.IN254
3132 
IR[5] => Mux89.IN255
3133 
IR[5] => Mux89.IN256
3134 
IR[5] => Mux89.IN257
3135 
IR[5] => Mux89.IN258
3136 
IR[5] => Mux90.IN250
3137 
IR[5] => Mux91.IN258
3138 
IR[5] => Mux92.IN258
3139 
IR[5] => Mux93.IN258
3140 
IR[5] => Mux94.IN258
3141 
IR[5] => Mux95.IN258
3142 
IR[5] => Mux96.IN258
3143 
IR[5] => Mux97.IN28
3144 
IR[5] => Mux97.IN29
3145 
IR[5] => Mux97.IN30
3146 
IR[5] => Mux97.IN31
3147 
IR[5] => Mux97.IN32
3148 
IR[5] => Mux97.IN33
3149 
IR[5] => Mux97.IN34
3150 
IR[5] => Mux97.IN35
3151 
IR[5] => Mux97.IN36
3152 
IR[5] => Mux97.IN37
3153 
IR[5] => Mux97.IN38
3154 
IR[5] => Mux97.IN39
3155 
IR[5] => Mux97.IN40
3156 
IR[5] => Mux97.IN41
3157 
IR[5] => Mux97.IN42
3158 
IR[5] => Mux97.IN43
3159 
IR[5] => Mux97.IN44
3160 
IR[5] => Mux97.IN45
3161 
IR[5] => Mux97.IN46
3162 
IR[5] => Mux97.IN47
3163 
IR[5] => Mux97.IN48
3164 
IR[5] => Mux97.IN49
3165 
IR[5] => Mux97.IN50
3166 
IR[5] => Mux97.IN51
3167 
IR[5] => Mux97.IN52
3168 
IR[5] => Mux97.IN53
3169 
IR[5] => Mux97.IN54
3170 
IR[5] => Mux97.IN55
3171 
IR[5] => Mux97.IN56
3172 
IR[5] => Mux97.IN57
3173 
IR[5] => Mux97.IN58
3174 
IR[5] => Mux97.IN59
3175 
IR[5] => Mux97.IN60
3176 
IR[5] => Mux97.IN61
3177 
IR[5] => Mux97.IN62
3178 
IR[5] => Mux97.IN63
3179 
IR[5] => Mux97.IN64
3180 
IR[5] => Mux97.IN65
3181 
IR[5] => Mux97.IN66
3182 
IR[5] => Mux97.IN67
3183 
IR[5] => Mux97.IN68
3184 
IR[5] => Mux97.IN69
3185 
IR[5] => Mux97.IN70
3186 
IR[5] => Mux97.IN71
3187 
IR[5] => Mux97.IN72
3188 
IR[5] => Mux97.IN73
3189 
IR[5] => Mux97.IN74
3190 
IR[5] => Mux97.IN75
3191 
IR[5] => Mux97.IN76
3192 
IR[5] => Mux97.IN77
3193 
IR[5] => Mux97.IN78
3194 
IR[5] => Mux97.IN79
3195 
IR[5] => Mux97.IN80
3196 
IR[5] => Mux97.IN81
3197 
IR[5] => Mux97.IN82
3198 
IR[5] => Mux97.IN83
3199 
IR[5] => Mux97.IN84
3200 
IR[5] => Mux97.IN85
3201 
IR[5] => Mux97.IN86
3202 
IR[5] => Mux97.IN87
3203 
IR[5] => Mux97.IN88
3204 
IR[5] => Mux97.IN89
3205 
IR[5] => Mux97.IN90
3206 
IR[5] => Mux97.IN91
3207 
IR[5] => Mux97.IN92
3208 
IR[5] => Mux97.IN93
3209 
IR[5] => Mux97.IN94
3210 
IR[5] => Mux97.IN95
3211 
IR[5] => Mux97.IN96
3212 
IR[5] => Mux97.IN97
3213 
IR[5] => Mux97.IN98
3214 
IR[5] => Mux97.IN99
3215 
IR[5] => Mux97.IN100
3216 
IR[5] => Mux97.IN101
3217 
IR[5] => Mux97.IN102
3218 
IR[5] => Mux97.IN103
3219 
IR[5] => Mux97.IN104
3220 
IR[5] => Mux97.IN105
3221 
IR[5] => Mux97.IN106
3222 
IR[5] => Mux97.IN107
3223 
IR[5] => Mux97.IN108
3224 
IR[5] => Mux97.IN109
3225 
IR[5] => Mux97.IN110
3226 
IR[5] => Mux97.IN111
3227 
IR[5] => Mux97.IN112
3228 
IR[5] => Mux97.IN113
3229 
IR[5] => Mux97.IN114
3230 
IR[5] => Mux97.IN115
3231 
IR[5] => Mux97.IN116
3232 
IR[5] => Mux97.IN117
3233 
IR[5] => Mux97.IN118
3234 
IR[5] => Mux97.IN119
3235 
IR[5] => Mux97.IN120
3236 
IR[5] => Mux97.IN121
3237 
IR[5] => Mux97.IN122
3238 
IR[5] => Mux97.IN123
3239 
IR[5] => Mux97.IN124
3240 
IR[5] => Mux97.IN125
3241 
IR[5] => Mux97.IN126
3242 
IR[5] => Mux97.IN127
3243 
IR[5] => Mux97.IN128
3244 
IR[5] => Mux97.IN129
3245 
IR[5] => Mux97.IN130
3246 
IR[5] => Mux97.IN131
3247 
IR[5] => Mux97.IN132
3248 
IR[5] => Mux97.IN133
3249 
IR[5] => Mux97.IN134
3250 
IR[5] => Mux97.IN135
3251 
IR[5] => Mux97.IN136
3252 
IR[5] => Mux97.IN137
3253 
IR[5] => Mux97.IN138
3254 
IR[5] => Mux97.IN139
3255 
IR[5] => Mux97.IN140
3256 
IR[5] => Mux97.IN141
3257 
IR[5] => Mux97.IN142
3258 
IR[5] => Mux97.IN143
3259 
IR[5] => Mux97.IN144
3260 
IR[5] => Mux97.IN145
3261 
IR[5] => Mux97.IN146
3262 
IR[5] => Mux97.IN147
3263 
IR[5] => Mux97.IN148
3264 
IR[5] => Mux97.IN149
3265 
IR[5] => Mux97.IN150
3266 
IR[5] => Mux97.IN151
3267 
IR[5] => Mux97.IN152
3268 
IR[5] => Mux97.IN153
3269 
IR[5] => Mux97.IN154
3270 
IR[5] => Mux97.IN155
3271 
IR[5] => Mux97.IN156
3272 
IR[5] => Mux97.IN157
3273 
IR[5] => Mux97.IN158
3274 
IR[5] => Mux97.IN159
3275 
IR[5] => Mux97.IN160
3276 
IR[5] => Mux97.IN161
3277 
IR[5] => Mux97.IN162
3278 
IR[5] => Mux97.IN163
3279 
IR[5] => Mux97.IN164
3280 
IR[5] => Mux97.IN165
3281 
IR[5] => Mux97.IN166
3282 
IR[5] => Mux97.IN167
3283 
IR[5] => Mux97.IN168
3284 
IR[5] => Mux97.IN169
3285 
IR[5] => Mux97.IN170
3286 
IR[5] => Mux97.IN171
3287 
IR[5] => Mux97.IN172
3288 
IR[5] => Mux97.IN173
3289 
IR[5] => Mux97.IN174
3290 
IR[5] => Mux97.IN175
3291 
IR[5] => Mux97.IN176
3292 
IR[5] => Mux97.IN177
3293 
IR[5] => Mux97.IN178
3294 
IR[5] => Mux97.IN179
3295 
IR[5] => Mux97.IN180
3296 
IR[5] => Mux97.IN181
3297 
IR[5] => Mux97.IN182
3298 
IR[5] => Mux97.IN183
3299 
IR[5] => Mux97.IN184
3300 
IR[5] => Mux97.IN185
3301 
IR[5] => Mux97.IN186
3302 
IR[5] => Mux97.IN187
3303 
IR[5] => Mux97.IN188
3304 
IR[5] => Mux97.IN189
3305 
IR[5] => Mux97.IN190
3306 
IR[5] => Mux97.IN191
3307 
IR[5] => Mux97.IN192
3308 
IR[5] => Mux97.IN193
3309 
IR[5] => Mux97.IN194
3310 
IR[5] => Mux97.IN195
3311 
IR[5] => Mux97.IN196
3312 
IR[5] => Mux97.IN197
3313 
IR[5] => Mux97.IN198
3314 
IR[5] => Mux97.IN199
3315 
IR[5] => Mux97.IN200
3316 
IR[5] => Mux97.IN201
3317 
IR[5] => Mux97.IN202
3318 
IR[5] => Mux97.IN203
3319 
IR[5] => Mux97.IN204
3320 
IR[5] => Mux97.IN205
3321 
IR[5] => Mux97.IN206
3322 
IR[5] => Mux97.IN207
3323 
IR[5] => Mux97.IN208
3324 
IR[5] => Mux97.IN209
3325 
IR[5] => Mux97.IN210
3326 
IR[5] => Mux97.IN211
3327 
IR[5] => Mux97.IN212
3328 
IR[5] => Mux97.IN213
3329 
IR[5] => Mux97.IN214
3330 
IR[5] => Mux97.IN215
3331 
IR[5] => Mux97.IN216
3332 
IR[5] => Mux97.IN217
3333 
IR[5] => Mux97.IN218
3334 
IR[5] => Mux97.IN219
3335 
IR[5] => Mux97.IN220
3336 
IR[5] => Mux97.IN221
3337 
IR[5] => Mux97.IN222
3338 
IR[5] => Mux97.IN223
3339 
IR[5] => Mux97.IN224
3340 
IR[5] => Mux97.IN225
3341 
IR[5] => Mux97.IN226
3342 
IR[5] => Mux97.IN227
3343 
IR[5] => Mux97.IN228
3344 
IR[5] => Mux97.IN229
3345 
IR[5] => Mux97.IN230
3346 
IR[5] => Mux97.IN231
3347 
IR[5] => Mux97.IN232
3348 
IR[5] => Mux97.IN233
3349 
IR[5] => Mux97.IN234
3350 
IR[5] => Mux97.IN235
3351 
IR[5] => Mux97.IN236
3352 
IR[5] => Mux97.IN237
3353 
IR[5] => Mux97.IN238
3354 
IR[5] => Mux97.IN239
3355 
IR[5] => Mux97.IN240
3356 
IR[5] => Mux97.IN241
3357 
IR[5] => Mux97.IN242
3358 
IR[5] => Mux97.IN243
3359 
IR[5] => Mux97.IN244
3360 
IR[5] => Mux97.IN245
3361 
IR[5] => Mux97.IN246
3362 
IR[5] => Mux97.IN247
3363 
IR[5] => Mux97.IN248
3364 
IR[5] => Mux97.IN249
3365 
IR[5] => Mux97.IN250
3366 
IR[5] => Mux97.IN251
3367 
IR[5] => Mux97.IN252
3368 
IR[5] => Mux97.IN253
3369 
IR[5] => Mux97.IN254
3370 
IR[5] => Mux97.IN255
3371 
IR[5] => Mux97.IN256
3372 
IR[5] => Mux97.IN257
3373 
IR[5] => Mux97.IN258
3374 
IR[5] => Mux98.IN28
3375 
IR[5] => Mux99.IN28
3376 
IR[5] => Mux100.IN258
3377 
IR[5] => Mux101.IN258
3378 
IR[5] => Mux102.IN258
3379 
IR[5] => Mux103.IN258
3380 
IR[5] => Mux104.IN258
3381 
IR[5] => Mux105.IN258
3382 
IR[5] => Mux106.IN258
3383 
IR[5] => Mux107.IN258
3384 
IR[5] => Mux109.IN258
3385 
IR[5] => Mux110.IN258
3386 
IR[5] => Mux111.IN258
3387 
IR[5] => Mux112.IN258
3388 
IR[5] => Mux114.IN258
3389 
IR[5] => Mux115.IN258
3390 
IR[5] => Mux116.IN258
3391 
IR[5] => ALU_Op.DATAA
3392 
IR[5] => Set_BusA_To.DATAA
3393 
IR[5] => Mux143.IN1
3394 
IR[5] => Mux143.IN2
3395 
IR[5] => Mux143.IN3
3396 
IR[5] => Mux143.IN4
3397 
IR[5] => Mux143.IN5
3398 
IR[5] => Mux143.IN6
3399 
IR[5] => Mux143.IN7
3400 
IR[5] => Mux148.IN1
3401 
IR[5] => Mux148.IN2
3402 
IR[5] => Mux148.IN3
3403 
IR[5] => Mux148.IN4
3404 
IR[5] => Mux148.IN5
3405 
IR[5] => Mux148.IN6
3406 
IR[5] => Mux148.IN7
3407 
IR[5] => Mux152.IN4
3408 
IR[5] => Mux153.IN4
3409 
IR[5] => Mux154.IN1
3410 
IR[5] => Mux154.IN2
3411 
IR[5] => Mux154.IN3
3412 
IR[5] => Mux154.IN4
3413 
IR[5] => Mux155.IN1
3414 
IR[5] => Mux156.IN1
3415 
IR[5] => Mux156.IN2
3416 
IR[5] => Mux156.IN3
3417 
IR[5] => Mux168.IN1
3418 
IR[5] => Mux168.IN2
3419 
IR[5] => Mux168.IN3
3420 
IR[5] => Mux168.IN4
3421 
IR[5] => Mux168.IN5
3422 
IR[5] => Mux168.IN6
3423 
IR[5] => Mux168.IN7
3424 
IR[5] => Set_BusA_To.DATAB
3425 
IR[5] => Mux181.IN7
3426 
IR[5] => Mux192.IN1
3427 
IR[5] => Mux192.IN2
3428 
IR[5] => Mux192.IN3
3429 
IR[5] => Mux192.IN4
3430 
IR[5] => Mux192.IN5
3431 
IR[5] => Mux192.IN6
3432 
IR[5] => Mux192.IN7
3433 
IR[5] => Mux197.IN66
3434 
IR[5] => Mux198.IN130
3435 
IR[5] => Mux199.IN130
3436 
IR[5] => Mux200.IN258
3437 
IR[5] => Mux201.IN258
3438 
IR[5] => Mux202.IN258
3439 
IR[5] => Mux203.IN130
3440 
IR[5] => Mux205.IN130
3441 
IR[5] => Mux208.IN258
3442 
IR[5] => Mux209.IN66
3443 
IR[5] => Mux210.IN258
3444 
IR[5] => Mux212.IN258
3445 
IR[5] => Mux214.IN258
3446 
IR[5] => Mux215.IN258
3447 
IR[5] => Mux216.IN258
3448 
IR[5] => Mux218.IN130
3449 
IR[5] => Mux219.IN258
3450 
IR[5] => Mux220.IN258
3451 
IR[5] => Mux222.IN258
3452 
IR[5] => Mux223.IN66
3453 
IR[5] => Mux224.IN66
3454 
IR[5] => Mux225.IN66
3455 
IR[5] => Mux226.IN66
3456 
IR[5] => Mux227.IN258
3457 
IR[5] => Mux228.IN36
3458 
IR[5] => Mux228.IN37
3459 
IR[5] => Mux228.IN38
3460 
IR[5] => Mux228.IN39
3461 
IR[5] => Mux228.IN40
3462 
IR[5] => Mux228.IN41
3463 
IR[5] => Mux228.IN42
3464 
IR[5] => Mux228.IN43
3465 
IR[5] => Mux228.IN44
3466 
IR[5] => Mux228.IN45
3467 
IR[5] => Mux228.IN46
3468 
IR[5] => Mux228.IN47
3469 
IR[5] => Mux228.IN48
3470 
IR[5] => Mux228.IN49
3471 
IR[5] => Mux228.IN50
3472 
IR[5] => Mux228.IN51
3473 
IR[5] => Mux228.IN52
3474 
IR[5] => Mux228.IN53
3475 
IR[5] => Mux228.IN54
3476 
IR[5] => Mux228.IN55
3477 
IR[5] => Mux228.IN56
3478 
IR[5] => Mux228.IN57
3479 
IR[5] => Mux228.IN58
3480 
IR[5] => Mux228.IN59
3481 
IR[5] => Mux228.IN60
3482 
IR[5] => Mux228.IN61
3483 
IR[5] => Mux228.IN62
3484 
IR[5] => Mux228.IN63
3485 
IR[5] => Mux228.IN64
3486 
IR[5] => Mux228.IN65
3487 
IR[5] => Mux228.IN66
3488 
IR[5] => Mux228.IN67
3489 
IR[5] => Mux228.IN68
3490 
IR[5] => Mux228.IN69
3491 
IR[5] => Mux228.IN70
3492 
IR[5] => Mux228.IN71
3493 
IR[5] => Mux228.IN72
3494 
IR[5] => Mux228.IN73
3495 
IR[5] => Mux228.IN74
3496 
IR[5] => Mux228.IN75
3497 
IR[5] => Mux228.IN76
3498 
IR[5] => Mux228.IN77
3499 
IR[5] => Mux228.IN78
3500 
IR[5] => Mux228.IN79
3501 
IR[5] => Mux228.IN80
3502 
IR[5] => Mux228.IN81
3503 
IR[5] => Mux228.IN82
3504 
IR[5] => Mux228.IN83
3505 
IR[5] => Mux228.IN84
3506 
IR[5] => Mux228.IN85
3507 
IR[5] => Mux228.IN86
3508 
IR[5] => Mux228.IN87
3509 
IR[5] => Mux228.IN88
3510 
IR[5] => Mux228.IN89
3511 
IR[5] => Mux228.IN90
3512 
IR[5] => Mux228.IN91
3513 
IR[5] => Mux228.IN92
3514 
IR[5] => Mux228.IN93
3515 
IR[5] => Mux228.IN94
3516 
IR[5] => Mux228.IN95
3517 
IR[5] => Mux228.IN96
3518 
IR[5] => Mux228.IN97
3519 
IR[5] => Mux228.IN98
3520 
IR[5] => Mux228.IN99
3521 
IR[5] => Mux228.IN100
3522 
IR[5] => Mux228.IN101
3523 
IR[5] => Mux228.IN102
3524 
IR[5] => Mux228.IN103
3525 
IR[5] => Mux228.IN104
3526 
IR[5] => Mux228.IN105
3527 
IR[5] => Mux228.IN106
3528 
IR[5] => Mux228.IN107
3529 
IR[5] => Mux228.IN108
3530 
IR[5] => Mux228.IN109
3531 
IR[5] => Mux228.IN110
3532 
IR[5] => Mux228.IN111
3533 
IR[5] => Mux228.IN112
3534 
IR[5] => Mux228.IN113
3535 
IR[5] => Mux228.IN114
3536 
IR[5] => Mux228.IN115
3537 
IR[5] => Mux228.IN116
3538 
IR[5] => Mux228.IN117
3539 
IR[5] => Mux228.IN118
3540 
IR[5] => Mux228.IN119
3541 
IR[5] => Mux228.IN120
3542 
IR[5] => Mux228.IN121
3543 
IR[5] => Mux228.IN122
3544 
IR[5] => Mux228.IN123
3545 
IR[5] => Mux228.IN124
3546 
IR[5] => Mux228.IN125
3547 
IR[5] => Mux228.IN126
3548 
IR[5] => Mux228.IN127
3549 
IR[5] => Mux228.IN128
3550 
IR[5] => Mux228.IN129
3551 
IR[5] => Mux228.IN130
3552 
IR[5] => Mux228.IN131
3553 
IR[5] => Mux228.IN132
3554 
IR[5] => Mux228.IN133
3555 
IR[5] => Mux228.IN134
3556 
IR[5] => Mux228.IN135
3557 
IR[5] => Mux228.IN136
3558 
IR[5] => Mux228.IN137
3559 
IR[5] => Mux228.IN138
3560 
IR[5] => Mux228.IN139
3561 
IR[5] => Mux228.IN140
3562 
IR[5] => Mux228.IN141
3563 
IR[5] => Mux228.IN142
3564 
IR[5] => Mux228.IN143
3565 
IR[5] => Mux228.IN144
3566 
IR[5] => Mux228.IN145
3567 
IR[5] => Mux228.IN146
3568 
IR[5] => Mux228.IN147
3569 
IR[5] => Mux228.IN148
3570 
IR[5] => Mux228.IN149
3571 
IR[5] => Mux228.IN150
3572 
IR[5] => Mux228.IN151
3573 
IR[5] => Mux228.IN152
3574 
IR[5] => Mux228.IN153
3575 
IR[5] => Mux228.IN154
3576 
IR[5] => Mux228.IN155
3577 
IR[5] => Mux228.IN156
3578 
IR[5] => Mux228.IN157
3579 
IR[5] => Mux228.IN158
3580 
IR[5] => Mux228.IN159
3581 
IR[5] => Mux228.IN160
3582 
IR[5] => Mux228.IN161
3583 
IR[5] => Mux228.IN162
3584 
IR[5] => Mux228.IN163
3585 
IR[5] => Mux228.IN164
3586 
IR[5] => Mux228.IN165
3587 
IR[5] => Mux228.IN166
3588 
IR[5] => Mux228.IN167
3589 
IR[5] => Mux228.IN168
3590 
IR[5] => Mux228.IN169
3591 
IR[5] => Mux228.IN170
3592 
IR[5] => Mux228.IN171
3593 
IR[5] => Mux228.IN172
3594 
IR[5] => Mux228.IN173
3595 
IR[5] => Mux228.IN174
3596 
IR[5] => Mux228.IN175
3597 
IR[5] => Mux228.IN176
3598 
IR[5] => Mux228.IN177
3599 
IR[5] => Mux228.IN178
3600 
IR[5] => Mux228.IN179
3601 
IR[5] => Mux228.IN180
3602 
IR[5] => Mux228.IN181
3603 
IR[5] => Mux228.IN182
3604 
IR[5] => Mux228.IN183
3605 
IR[5] => Mux228.IN184
3606 
IR[5] => Mux228.IN185
3607 
IR[5] => Mux228.IN186
3608 
IR[5] => Mux228.IN187
3609 
IR[5] => Mux228.IN188
3610 
IR[5] => Mux228.IN189
3611 
IR[5] => Mux228.IN190
3612 
IR[5] => Mux228.IN191
3613 
IR[5] => Mux228.IN192
3614 
IR[5] => Mux228.IN193
3615 
IR[5] => Mux228.IN194
3616 
IR[5] => Mux228.IN195
3617 
IR[5] => Mux228.IN196
3618 
IR[5] => Mux228.IN197
3619 
IR[5] => Mux228.IN198
3620 
IR[5] => Mux228.IN199
3621 
IR[5] => Mux228.IN200
3622 
IR[5] => Mux228.IN201
3623 
IR[5] => Mux228.IN202
3624 
IR[5] => Mux228.IN203
3625 
IR[5] => Mux228.IN204
3626 
IR[5] => Mux228.IN205
3627 
IR[5] => Mux228.IN206
3628 
IR[5] => Mux228.IN207
3629 
IR[5] => Mux228.IN208
3630 
IR[5] => Mux228.IN209
3631 
IR[5] => Mux228.IN210
3632 
IR[5] => Mux228.IN211
3633 
IR[5] => Mux228.IN212
3634 
IR[5] => Mux228.IN213
3635 
IR[5] => Mux228.IN214
3636 
IR[5] => Mux228.IN215
3637 
IR[5] => Mux228.IN216
3638 
IR[5] => Mux228.IN217
3639 
IR[5] => Mux228.IN218
3640 
IR[5] => Mux228.IN219
3641 
IR[5] => Mux228.IN220
3642 
IR[5] => Mux228.IN221
3643 
IR[5] => Mux228.IN222
3644 
IR[5] => Mux228.IN223
3645 
IR[5] => Mux228.IN224
3646 
IR[5] => Mux228.IN225
3647 
IR[5] => Mux228.IN226
3648 
IR[5] => Mux228.IN227
3649 
IR[5] => Mux228.IN228
3650 
IR[5] => Mux228.IN229
3651 
IR[5] => Mux228.IN230
3652 
IR[5] => Mux228.IN231
3653 
IR[5] => Mux228.IN232
3654 
IR[5] => Mux228.IN233
3655 
IR[5] => Mux228.IN234
3656 
IR[5] => Mux228.IN235
3657 
IR[5] => Mux228.IN236
3658 
IR[5] => Mux228.IN237
3659 
IR[5] => Mux228.IN238
3660 
IR[5] => Mux228.IN239
3661 
IR[5] => Mux228.IN240
3662 
IR[5] => Mux228.IN241
3663 
IR[5] => Mux228.IN242
3664 
IR[5] => Mux228.IN243
3665 
IR[5] => Mux228.IN244
3666 
IR[5] => Mux228.IN245
3667 
IR[5] => Mux228.IN246
3668 
IR[5] => Mux228.IN247
3669 
IR[5] => Mux228.IN248
3670 
IR[5] => Mux228.IN249
3671 
IR[5] => Mux228.IN250
3672 
IR[5] => Mux228.IN251
3673 
IR[5] => Mux228.IN252
3674 
IR[5] => Mux228.IN253
3675 
IR[5] => Mux228.IN254
3676 
IR[5] => Mux228.IN255
3677 
IR[5] => Mux228.IN256
3678 
IR[5] => Mux228.IN257
3679 
IR[5] => Mux228.IN258
3680 
IR[5] => Mux229.IN36
3681 
IR[5] => Mux230.IN36
3682 
IR[5] => Mux231.IN66
3683 
IR[5] => Mux232.IN258
3684 
IR[5] => Mux233.IN258
3685 
IR[5] => Mux234.IN66
3686 
IR[5] => Mux235.IN66
3687 
IR[5] => Mux238.IN258
3688 
IR[5] => Mux239.IN258
3689 
IR[5] => Mux240.IN258
3690 
IR[5] => Mux242.IN66
3691 
IR[5] => Mux244.IN66
3692 
IR[5] => Equal2.IN0
3693 
IR[5] => Equal3.IN1
3694 
IR[5] => Equal5.IN0
3695 
IR[5] => Equal7.IN4
3696 
IR[6] => Mux61.IN257
3697 
IR[6] => Mux62.IN152
3698 
IR[6] => Mux63.IN152
3699 
IR[6] => Mux64.IN152
3700 
IR[6] => Mux65.IN257
3701 
IR[6] => Mux66.IN65
3702 
IR[6] => Mux67.IN194
3703 
IR[6] => Mux68.IN194
3704 
IR[6] => Mux69.IN194
3705 
IR[6] => Mux70.IN257
3706 
IR[6] => Mux71.IN257
3707 
IR[6] => Mux72.IN256
3708 
IR[6] => Mux73.IN257
3709 
IR[6] => Mux74.IN257
3710 
IR[6] => Mux75.IN257
3711 
IR[6] => Mux76.IN257
3712 
IR[6] => Mux77.IN257
3713 
IR[6] => Mux78.IN257
3714 
IR[6] => Mux79.IN257
3715 
IR[6] => Mux80.IN257
3716 
IR[6] => Mux81.IN257
3717 
IR[6] => Mux82.IN257
3718 
IR[6] => Mux83.IN257
3719 
IR[6] => Mux84.IN257
3720 
IR[6] => Mux85.IN257
3721 
IR[6] => Mux86.IN257
3722 
IR[6] => Mux87.IN257
3723 
IR[6] => Mux88.IN257
3724 
IR[6] => Mux89.IN249
3725 
IR[6] => Mux90.IN249
3726 
IR[6] => Mux91.IN257
3727 
IR[6] => Mux92.IN257
3728 
IR[6] => Mux93.IN257
3729 
IR[6] => Mux94.IN257
3730 
IR[6] => Mux95.IN257
3731 
IR[6] => Mux96.IN257
3732 
IR[6] => Mux97.IN27
3733 
IR[6] => Mux98.IN27
3734 
IR[6] => Mux99.IN27
3735 
IR[6] => Mux100.IN257
3736 
IR[6] => Mux101.IN257
3737 
IR[6] => Mux102.IN257
3738 
IR[6] => Mux103.IN257
3739 
IR[6] => Mux104.IN257
3740 
IR[6] => Mux105.IN257
3741 
IR[6] => Mux106.IN257
3742 
IR[6] => Mux107.IN257
3743 
IR[6] => Mux108.IN65
3744 
IR[6] => Mux109.IN257
3745 
IR[6] => Mux110.IN257
3746 
IR[6] => Mux111.IN257
3747 
IR[6] => Mux112.IN257
3748 
IR[6] => Mux113.IN33
3749 
IR[6] => Mux114.IN257
3750 
IR[6] => Mux115.IN257
3751 
IR[6] => Mux116.IN257
3752 
IR[6] => Mux119.IN33
3753 
IR[6] => Mux120.IN33
3754 
IR[6] => Mux121.IN33
3755 
IR[6] => Mux122.IN33
3756 
IR[6] => Mux123.IN33
3757 
IR[6] => Mux125.IN33
3758 
IR[6] => Mux126.IN33
3759 
IR[6] => Mux127.IN33
3760 
IR[6] => Mux128.IN33
3761 
IR[6] => Mux129.IN33
3762 
IR[6] => Mux130.IN33
3763 
IR[6] => Mux197.IN65
3764 
IR[6] => Mux198.IN129
3765 
IR[6] => Mux199.IN129
3766 
IR[6] => Mux200.IN257
3767 
IR[6] => Mux201.IN257
3768 
IR[6] => Mux202.IN257
3769 
IR[6] => Mux203.IN129
3770 
IR[6] => Mux204.IN33
3771 
IR[6] => Mux205.IN129
3772 
IR[6] => Mux206.IN65
3773 
IR[6] => Mux207.IN65
3774 
IR[6] => Mux208.IN257
3775 
IR[6] => Mux209.IN65
3776 
IR[6] => Mux210.IN257
3777 
IR[6] => Mux211.IN65
3778 
IR[6] => Mux212.IN257
3779 
IR[6] => Mux213.IN65
3780 
IR[6] => Mux214.IN257
3781 
IR[6] => Mux215.IN257
3782 
IR[6] => Mux216.IN257
3783 
IR[6] => Mux217.IN65
3784 
IR[6] => Mux218.IN129
3785 
IR[6] => Mux219.IN257
3786 
IR[6] => Mux220.IN257
3787 
IR[6] => Mux221.IN65
3788 
IR[6] => Mux222.IN257
3789 
IR[6] => Mux223.IN65
3790 
IR[6] => Mux224.IN65
3791 
IR[6] => Mux225.IN65
3792 
IR[6] => Mux226.IN65
3793 
IR[6] => Mux227.IN257
3794 
IR[6] => Mux228.IN35
3795 
IR[6] => Mux229.IN35
3796 
IR[6] => Mux230.IN35
3797 
IR[6] => Mux231.IN65
3798 
IR[6] => Mux232.IN257
3799 
IR[6] => Mux233.IN257
3800 
IR[6] => Mux234.IN65
3801 
IR[6] => Mux235.IN65
3802 
IR[6] => Mux236.IN33
3803 
IR[6] => Mux237.IN129
3804 
IR[6] => Mux238.IN257
3805 
IR[6] => Mux239.IN257
3806 
IR[6] => Mux240.IN257
3807 
IR[6] => Mux241.IN33
3808 
IR[6] => Mux242.IN65
3809 
IR[6] => Mux243.IN33
3810 
IR[6] => Mux244.IN65
3811 
IR[6] => Equal5.IN4
3812 
IR[6] => Equal7.IN1
3813 
IR[7] => Mux61.IN256
3814 
IR[7] => Mux62.IN151
3815 
IR[7] => Mux63.IN151
3816 
IR[7] => Mux64.IN151
3817 
IR[7] => Mux65.IN256
3818 
IR[7] => Mux66.IN64
3819 
IR[7] => Mux67.IN193
3820 
IR[7] => Mux68.IN193
3821 
IR[7] => Mux69.IN193
3822 
IR[7] => Mux70.IN256
3823 
IR[7] => Mux71.IN256
3824 
IR[7] => Mux72.IN255
3825 
IR[7] => Mux73.IN256
3826 
IR[7] => Mux74.IN256
3827 
IR[7] => Mux75.IN256
3828 
IR[7] => Mux76.IN256
3829 
IR[7] => Mux77.IN256
3830 
IR[7] => Mux78.IN256
3831 
IR[7] => Mux79.IN256
3832 
IR[7] => Mux80.IN256
3833 
IR[7] => Mux81.IN256
3834 
IR[7] => Mux82.IN256
3835 
IR[7] => Mux83.IN256
3836 
IR[7] => Mux84.IN256
3837 
IR[7] => Mux85.IN256
3838 
IR[7] => Mux86.IN256
3839 
IR[7] => Mux87.IN256
3840 
IR[7] => Mux88.IN256
3841 
IR[7] => Mux89.IN248
3842 
IR[7] => Mux90.IN248
3843 
IR[7] => Mux91.IN256
3844 
IR[7] => Mux92.IN256
3845 
IR[7] => Mux93.IN256
3846 
IR[7] => Mux94.IN256
3847 
IR[7] => Mux95.IN256
3848 
IR[7] => Mux96.IN256
3849 
IR[7] => Mux97.IN26
3850 
IR[7] => Mux98.IN26
3851 
IR[7] => Mux99.IN26
3852 
IR[7] => Mux100.IN256
3853 
IR[7] => Mux101.IN256
3854 
IR[7] => Mux102.IN256
3855 
IR[7] => Mux103.IN256
3856 
IR[7] => Mux104.IN256
3857 
IR[7] => Mux105.IN256
3858 
IR[7] => Mux106.IN256
3859 
IR[7] => Mux107.IN256
3860 
IR[7] => Mux108.IN64
3861 
IR[7] => Mux109.IN256
3862 
IR[7] => Mux110.IN256
3863 
IR[7] => Mux111.IN256
3864 
IR[7] => Mux112.IN256
3865 
IR[7] => Mux113.IN32
3866 
IR[7] => Mux114.IN256
3867 
IR[7] => Mux115.IN256
3868 
IR[7] => Mux116.IN256
3869 
IR[7] => Mux119.IN32
3870 
IR[7] => Mux120.IN32
3871 
IR[7] => Mux121.IN32
3872 
IR[7] => Mux122.IN32
3873 
IR[7] => Mux123.IN32
3874 
IR[7] => Mux125.IN32
3875 
IR[7] => Mux126.IN32
3876 
IR[7] => Mux127.IN32
3877 
IR[7] => Mux128.IN32
3878 
IR[7] => Mux129.IN32
3879 
IR[7] => Mux130.IN32
3880 
IR[7] => Mux197.IN64
3881 
IR[7] => Mux198.IN128
3882 
IR[7] => Mux199.IN128
3883 
IR[7] => Mux200.IN256
3884 
IR[7] => Mux201.IN256
3885 
IR[7] => Mux202.IN256
3886 
IR[7] => Mux203.IN128
3887 
IR[7] => Mux204.IN32
3888 
IR[7] => Mux205.IN128
3889 
IR[7] => Mux206.IN64
3890 
IR[7] => Mux207.IN64
3891 
IR[7] => Mux208.IN256
3892 
IR[7] => Mux209.IN64
3893 
IR[7] => Mux210.IN256
3894 
IR[7] => Mux211.IN64
3895 
IR[7] => Mux212.IN256
3896 
IR[7] => Mux213.IN64
3897 
IR[7] => Mux214.IN256
3898 
IR[7] => Mux215.IN256
3899 
IR[7] => Mux216.IN256
3900 
IR[7] => Mux217.IN64
3901 
IR[7] => Mux218.IN128
3902 
IR[7] => Mux219.IN256
3903 
IR[7] => Mux220.IN256
3904 
IR[7] => Mux221.IN64
3905 
IR[7] => Mux222.IN256
3906 
IR[7] => Mux223.IN64
3907 
IR[7] => Mux224.IN64
3908 
IR[7] => Mux225.IN64
3909 
IR[7] => Mux226.IN64
3910 
IR[7] => Mux227.IN256
3911 
IR[7] => Mux228.IN34
3912 
IR[7] => Mux229.IN34
3913 
IR[7] => Mux230.IN34
3914 
IR[7] => Mux231.IN64
3915 
IR[7] => Mux232.IN256
3916 
IR[7] => Mux233.IN256
3917 
IR[7] => Mux234.IN64
3918 
IR[7] => Mux235.IN64
3919 
IR[7] => Mux236.IN32
3920 
IR[7] => Mux237.IN128
3921 
IR[7] => Mux238.IN256
3922 
IR[7] => Mux239.IN256
3923 
IR[7] => Mux240.IN256
3924 
IR[7] => Mux241.IN32
3925 
IR[7] => Mux242.IN64
3926 
IR[7] => Mux243.IN32
3927 
IR[7] => Mux244.IN64
3928 
IR[7] => Equal5.IN3
3929 
IR[7] => Equal7.IN0
3930 
ISet[0] => Mux245.IN5
3931 
ISet[0] => Mux246.IN5
3932 
ISet[0] => Mux247.IN5
3933 
ISet[0] => Mux248.IN5
3934 
ISet[0] => Mux249.IN5
3935 
ISet[0] => Mux250.IN5
3936 
ISet[0] => Mux251.IN5
3937 
ISet[0] => Mux252.IN5
3938 
ISet[0] => Mux253.IN5
3939 
ISet[0] => Mux254.IN5
3940 
ISet[0] => Mux255.IN5
3941 
ISet[0] => Mux256.IN5
3942 
ISet[0] => Mux257.IN5
3943 
ISet[0] => Mux258.IN5
3944 
ISet[0] => Mux259.IN5
3945 
ISet[0] => Mux260.IN5
3946 
ISet[0] => Mux261.IN5
3947 
ISet[0] => Mux262.IN5
3948 
ISet[0] => Mux263.IN5
3949 
ISet[0] => Mux264.IN5
3950 
ISet[0] => Mux265.IN5
3951 
ISet[0] => Mux266.IN5
3952 
ISet[0] => Mux267.IN5
3953 
ISet[0] => Mux268.IN5
3954 
ISet[0] => Mux269.IN5
3955 
ISet[0] => Mux270.IN5
3956 
ISet[0] => Mux271.IN5
3957 
ISet[0] => Mux272.IN5
3958 
ISet[0] => Mux273.IN5
3959 
ISet[0] => Mux274.IN5
3960 
ISet[0] => Mux275.IN5
3961 
ISet[0] => Mux276.IN5
3962 
ISet[0] => Mux277.IN5
3963 
ISet[0] => Mux278.IN5
3964 
ISet[0] => Mux279.IN5
3965 
ISet[0] => Mux280.IN5
3966 
ISet[0] => Mux281.IN5
3967 
ISet[0] => Mux282.IN5
3968 
ISet[0] => Mux283.IN5
3969 
ISet[0] => Mux284.IN5
3970 
ISet[0] => Mux285.IN5
3971 
ISet[0] => Mux286.IN5
3972 
ISet[0] => Mux287.IN5
3973 
ISet[0] => Mux288.IN5
3974 
ISet[0] => Mux289.IN5
3975 
ISet[0] => Mux290.IN5
3976 
ISet[0] => Mux291.IN5
3977 
ISet[0] => Mux292.IN5
3978 
ISet[0] => Mux293.IN5
3979 
ISet[0] => Mux294.IN5
3980 
ISet[0] => Mux295.IN5
3981 
ISet[0] => Mux296.IN5
3982 
ISet[0] => Mux297.IN5
3983 
ISet[0] => Mux298.IN5
3984 
ISet[0] => Mux299.IN5
3985 
ISet[0] => Mux300.IN5
3986 
ISet[0] => Equal8.IN1
3987 
ISet[1] => Mux245.IN4
3988 
ISet[1] => Mux246.IN4
3989 
ISet[1] => Mux247.IN4
3990 
ISet[1] => Mux248.IN4
3991 
ISet[1] => Mux249.IN4
3992 
ISet[1] => Mux250.IN4
3993 
ISet[1] => Mux251.IN4
3994 
ISet[1] => Mux252.IN4
3995 
ISet[1] => Mux253.IN4
3996 
ISet[1] => Mux254.IN4
3997 
ISet[1] => Mux255.IN4
3998 
ISet[1] => Mux256.IN4
3999 
ISet[1] => Mux257.IN4
4000 
ISet[1] => Mux258.IN4
4001 
ISet[1] => Mux259.IN4
4002 
ISet[1] => Mux260.IN4
4003 
ISet[1] => Mux261.IN4
4004 
ISet[1] => Mux262.IN4
4005 
ISet[1] => Mux263.IN4
4006 
ISet[1] => Mux264.IN4
4007 
ISet[1] => Mux265.IN4
4008 
ISet[1] => Mux266.IN4
4009 
ISet[1] => Mux267.IN4
4010 
ISet[1] => Mux268.IN4
4011 
ISet[1] => Mux269.IN4
4012 
ISet[1] => Mux270.IN4
4013 
ISet[1] => Mux271.IN4
4014 
ISet[1] => Mux272.IN4
4015 
ISet[1] => Mux273.IN4
4016 
ISet[1] => Mux274.IN4
4017 
ISet[1] => Mux275.IN4
4018 
ISet[1] => Mux276.IN4
4019 
ISet[1] => Mux277.IN4
4020 
ISet[1] => Mux278.IN4
4021 
ISet[1] => Mux279.IN4
4022 
ISet[1] => Mux280.IN4
4023 
ISet[1] => Mux281.IN4
4024 
ISet[1] => Mux282.IN4
4025 
ISet[1] => Mux283.IN4
4026 
ISet[1] => Mux284.IN4
4027 
ISet[1] => Mux285.IN4
4028 
ISet[1] => Mux286.IN4
4029 
ISet[1] => Mux287.IN4
4030 
ISet[1] => Mux288.IN4
4031 
ISet[1] => Mux289.IN4
4032 
ISet[1] => Mux290.IN4
4033 
ISet[1] => Mux291.IN4
4034 
ISet[1] => Mux292.IN4
4035 
ISet[1] => Mux293.IN4
4036 
ISet[1] => Mux294.IN4
4037 
ISet[1] => Mux295.IN4
4038 
ISet[1] => Mux296.IN4
4039 
ISet[1] => Mux297.IN4
4040 
ISet[1] => Mux298.IN4
4041 
ISet[1] => Mux299.IN4
4042 
ISet[1] => Mux300.IN4
4043 
ISet[1] => Special_LD.OUTPUTSELECT
4044 
ISet[1] => Special_LD.OUTPUTSELECT
4045 
ISet[1] => Special_LD.OUTPUTSELECT
4046 
ISet[1] => I_BT.OUTPUTSELECT
4047 
ISet[1] => I_BC.OUTPUTSELECT
4048 
ISet[1] => IMode.OUTPUTSELECT
4049 
ISet[1] => IMode.OUTPUTSELECT
4050 
ISet[1] => I_RLD.OUTPUTSELECT
4051 
ISet[1] => I_RRD.OUTPUTSELECT
4052 
ISet[1] => I_RETN.OUTPUTSELECT
4053 
ISet[1] => I_INRC.OUTPUTSELECT
4054 
ISet[1] => I_BTR.OUTPUTSELECT
4055 
ISet[1] => Equal8.IN0
4056 
MCycle[0] => Mux0.IN10
4057 
MCycle[0] => Mux1.IN10
4058 
MCycle[0] => Mux2.IN10
4059 
MCycle[0] => Mux3.IN10
4060 
MCycle[0] => Mux4.IN10
4061 
MCycle[0] => Mux5.IN10
4062 
MCycle[0] => Mux6.IN10
4063 
MCycle[0] => Mux7.IN10
4064 
MCycle[0] => Mux8.IN10
4065 
MCycle[0] => Mux9.IN10
4066 
MCycle[0] => Mux10.IN10
4067 
MCycle[0] => Mux11.IN10
4068 
MCycle[0] => Mux12.IN10
4069 
MCycle[0] => Mux13.IN10
4070 
MCycle[0] => Mux14.IN10
4071 
MCycle[0] => Mux15.IN10
4072 
MCycle[0] => Mux16.IN10
4073 
MCycle[0] => Mux17.IN10
4074 
MCycle[0] => Mux18.IN10
4075 
MCycle[0] => Mux19.IN10
4076 
MCycle[0] => Mux20.IN10
4077 
MCycle[0] => Mux21.IN10
4078 
MCycle[0] => Mux22.IN10
4079 
MCycle[0] => Mux23.IN10
4080 
MCycle[0] => Mux24.IN10
4081 
MCycle[0] => Mux25.IN10
4082 
MCycle[0] => Mux26.IN10
4083 
MCycle[0] => Mux27.IN10
4084 
MCycle[0] => Mux28.IN10
4085 
MCycle[0] => Mux29.IN10
4086 
MCycle[0] => Mux30.IN10
4087 
MCycle[0] => Mux31.IN10
4088 
MCycle[0] => Mux32.IN10
4089 
MCycle[0] => Mux33.IN10
4090 
MCycle[0] => Mux34.IN10
4091 
MCycle[0] => Mux35.IN9
4092 
MCycle[0] => Mux36.IN10
4093 
MCycle[0] => Mux37.IN10
4094 
MCycle[0] => Mux38.IN9
4095 
MCycle[0] => Mux39.IN10
4096 
MCycle[0] => Mux40.IN5
4097 
MCycle[0] => Mux41.IN5
4098 
MCycle[0] => Mux42.IN5
4099 
MCycle[0] => Mux43.IN10
4100 
MCycle[0] => Mux44.IN10
4101 
MCycle[0] => Mux46.IN10
4102 
MCycle[0] => Mux47.IN10
4103 
MCycle[0] => Mux48.IN10
4104 
MCycle[0] => Mux49.IN10
4105 
MCycle[0] => Mux50.IN10
4106 
MCycle[0] => Mux51.IN10
4107 
MCycle[0] => Mux52.IN10
4108 
MCycle[0] => Mux53.IN10
4109 
MCycle[0] => Mux54.IN10
4110 
MCycle[0] => Mux55.IN10
4111 
MCycle[0] => Mux56.IN10
4112 
MCycle[0] => Mux57.IN10
4113 
MCycle[0] => Mux58.IN10
4114 
MCycle[0] => Mux59.IN10
4115 
MCycle[0] => Mux60.IN10
4116 
MCycle[0] => Mux117.IN10
4117 
MCycle[0] => Mux118.IN10
4118 
MCycle[0] => Mux133.IN10
4119 
MCycle[0] => Mux134.IN10
4120 
MCycle[0] => Mux135.IN10
4121 
MCycle[0] => Mux136.IN10
4122 
MCycle[0] => Mux137.IN10
4123 
MCycle[0] => Mux138.IN10
4124 
MCycle[0] => Mux139.IN10
4125 
MCycle[0] => Mux140.IN10
4126 
MCycle[0] => Mux141.IN10
4127 
MCycle[0] => Mux142.IN10
4128 
MCycle[0] => Mux143.IN10
4129 
MCycle[0] => Mux144.IN10
4130 
MCycle[0] => Mux145.IN10
4131 
MCycle[0] => Mux146.IN10
4132 
MCycle[0] => Mux147.IN10
4133 
MCycle[0] => Mux148.IN10
4134 
MCycle[0] => Mux149.IN10
4135 
MCycle[0] => Mux150.IN10
4136 
MCycle[0] => Mux151.IN10
4137 
MCycle[0] => Mux159.IN10
4138 
MCycle[0] => Mux160.IN10
4139 
MCycle[0] => Mux161.IN10
4140 
MCycle[0] => Mux162.IN10
4141 
MCycle[0] => Mux163.IN10
4142 
MCycle[0] => Mux164.IN10
4143 
MCycle[0] => Mux165.IN10
4144 
MCycle[0] => Mux168.IN10
4145 
MCycle[0] => Mux169.IN10
4146 
MCycle[0] => Mux170.IN10
4147 
MCycle[0] => Mux171.IN10
4148 
MCycle[0] => Mux172.IN10
4149 
MCycle[0] => Mux173.IN10
4150 
MCycle[0] => Mux174.IN10
4151 
MCycle[0] => Mux175.IN10
4152 
MCycle[0] => Mux176.IN10
4153 
MCycle[0] => Mux177.IN10
4154 
MCycle[0] => Mux178.IN10
4155 
MCycle[0] => Mux179.IN10
4156 
MCycle[0] => Mux180.IN10
4157 
MCycle[0] => Mux181.IN10
4158 
MCycle[0] => Mux182.IN10
4159 
MCycle[0] => Mux183.IN10
4160 
MCycle[0] => Mux184.IN10
4161 
MCycle[0] => Mux185.IN10
4162 
MCycle[0] => Mux186.IN10
4163 
MCycle[0] => Mux187.IN10
4164 
MCycle[0] => Mux188.IN10
4165 
MCycle[0] => Mux189.IN10
4166 
MCycle[0] => Mux190.IN10
4167 
MCycle[0] => Mux191.IN10
4168 
MCycle[0] => Mux192.IN10
4169 
MCycle[0] => Mux193.IN10
4170 
MCycle[0] => Mux194.IN10
4171 
MCycle[0] => Mux195.IN10
4172 
MCycle[0] => Mux196.IN10
4173 
MCycle[0] => Equal0.IN2
4174 
MCycle[0] => Equal1.IN1
4175 
MCycle[0] => Equal4.IN0
4176 
MCycle[0] => Equal6.IN2
4177 
MCycle[1] => Mux0.IN9
4178 
MCycle[1] => Mux1.IN9
4179 
MCycle[1] => Mux2.IN9
4180 
MCycle[1] => Mux3.IN9
4181 
MCycle[1] => Mux4.IN9
4182 
MCycle[1] => Mux5.IN9
4183 
MCycle[1] => Mux6.IN9
4184 
MCycle[1] => Mux7.IN9
4185 
MCycle[1] => Mux8.IN9
4186 
MCycle[1] => Mux9.IN9
4187 
MCycle[1] => Mux10.IN9
4188 
MCycle[1] => Mux11.IN9
4189 
MCycle[1] => Mux12.IN9
4190 
MCycle[1] => Mux13.IN9
4191 
MCycle[1] => Mux14.IN9
4192 
MCycle[1] => Mux15.IN9
4193 
MCycle[1] => Mux16.IN9
4194 
MCycle[1] => Mux17.IN9
4195 
MCycle[1] => Mux18.IN9
4196 
MCycle[1] => Mux19.IN9
4197 
MCycle[1] => Mux20.IN9
4198 
MCycle[1] => Mux21.IN9
4199 
MCycle[1] => Mux22.IN9
4200 
MCycle[1] => Mux23.IN9
4201 
MCycle[1] => Mux24.IN9
4202 
MCycle[1] => Mux25.IN9
4203 
MCycle[1] => Mux26.IN9
4204 
MCycle[1] => Mux27.IN9
4205 
MCycle[1] => Mux28.IN9
4206 
MCycle[1] => Mux29.IN9
4207 
MCycle[1] => Mux30.IN9
4208 
MCycle[1] => Mux31.IN9
4209 
MCycle[1] => Mux32.IN9
4210 
MCycle[1] => Mux33.IN9
4211 
MCycle[1] => Mux34.IN9
4212 
MCycle[1] => Mux35.IN8
4213 
MCycle[1] => Mux36.IN9
4214 
MCycle[1] => Mux37.IN9
4215 
MCycle[1] => Mux38.IN8
4216 
MCycle[1] => Mux39.IN9
4217 
MCycle[1] => Mux43.IN9
4218 
MCycle[1] => Mux44.IN9
4219 
MCycle[1] => Mux46.IN9
4220 
MCycle[1] => Mux47.IN9
4221 
MCycle[1] => Mux48.IN9
4222 
MCycle[1] => Mux49.IN9
4223 
MCycle[1] => Mux50.IN9
4224 
MCycle[1] => Mux51.IN9
4225 
MCycle[1] => Mux52.IN9
4226 
MCycle[1] => Mux53.IN9
4227 
MCycle[1] => Mux54.IN9
4228 
MCycle[1] => Mux55.IN9
4229 
MCycle[1] => Mux56.IN9
4230 
MCycle[1] => Mux57.IN9
4231 
MCycle[1] => Mux58.IN9
4232 
MCycle[1] => Mux59.IN9
4233 
MCycle[1] => Mux60.IN9
4234 
MCycle[1] => Mux117.IN9
4235 
MCycle[1] => Mux118.IN9
4236 
MCycle[1] => Mux131.IN5
4237 
MCycle[1] => Mux132.IN5
4238 
MCycle[1] => Mux133.IN9
4239 
MCycle[1] => Mux134.IN9
4240 
MCycle[1] => Mux135.IN9
4241 
MCycle[1] => Mux136.IN9
4242 
MCycle[1] => Mux137.IN9
4243 
MCycle[1] => Mux138.IN9
4244 
MCycle[1] => Mux139.IN9
4245 
MCycle[1] => Mux140.IN9
4246 
MCycle[1] => Mux141.IN9
4247 
MCycle[1] => Mux142.IN9
4248 
MCycle[1] => Mux143.IN9
4249 
MCycle[1] => Mux144.IN9
4250 
MCycle[1] => Mux145.IN9
4251 
MCycle[1] => Mux146.IN9
4252 
MCycle[1] => Mux147.IN9
4253 
MCycle[1] => Mux148.IN9
4254 
MCycle[1] => Mux149.IN9
4255 
MCycle[1] => Mux150.IN9
4256 
MCycle[1] => Mux151.IN9
4257 
MCycle[1] => Mux156.IN5
4258 
MCycle[1] => Mux157.IN5
4259 
MCycle[1] => Mux158.IN5
4260 
MCycle[1] => Mux159.IN9
4261 
MCycle[1] => Mux160.IN9
4262 
MCycle[1] => Mux161.IN9
4263 
MCycle[1] => Mux162.IN9
4264 
MCycle[1] => Mux163.IN9
4265 
MCycle[1] => Mux164.IN9
4266 
MCycle[1] => Mux165.IN9
4267 
MCycle[1] => Mux166.IN5
4268 
MCycle[1] => Mux167.IN5
4269 
MCycle[1] => Mux168.IN9
4270 
MCycle[1] => Mux169.IN9
4271 
MCycle[1] => Mux170.IN9
4272 
MCycle[1] => Mux171.IN9
4273 
MCycle[1] => Mux172.IN9
4274 
MCycle[1] => Mux173.IN9
4275 
MCycle[1] => Mux174.IN9
4276 
MCycle[1] => Mux175.IN9
4277 
MCycle[1] => Mux176.IN9
4278 
MCycle[1] => Mux177.IN9
4279 
MCycle[1] => Mux178.IN9
4280 
MCycle[1] => Mux179.IN9
4281 
MCycle[1] => Mux180.IN9
4282 
MCycle[1] => Mux181.IN9
4283 
MCycle[1] => Mux182.IN9
4284 
MCycle[1] => Mux183.IN9
4285 
MCycle[1] => Mux184.IN9
4286 
MCycle[1] => Mux185.IN9
4287 
MCycle[1] => Mux186.IN9
4288 
MCycle[1] => Mux187.IN9
4289 
MCycle[1] => Mux188.IN9
4290 
MCycle[1] => Mux189.IN9
4291 
MCycle[1] => Mux190.IN9
4292 
MCycle[1] => Mux191.IN9
4293 
MCycle[1] => Mux192.IN9
4294 
MCycle[1] => Mux193.IN9
4295 
MCycle[1] => Mux194.IN9
4296 
MCycle[1] => Mux195.IN9
4297 
MCycle[1] => Mux196.IN9
4298 
MCycle[1] => Equal0.IN1
4299 
MCycle[1] => Equal1.IN2
4300 
MCycle[1] => Equal4.IN2
4301 
MCycle[1] => Equal6.IN1
4302 
MCycle[2] => Mux0.IN8
4303 
MCycle[2] => Mux1.IN8
4304 
MCycle[2] => Mux2.IN8
4305 
MCycle[2] => Mux3.IN8
4306 
MCycle[2] => Mux4.IN8
4307 
MCycle[2] => Mux5.IN8
4308 
MCycle[2] => Mux6.IN8
4309 
MCycle[2] => Mux7.IN8
4310 
MCycle[2] => Mux8.IN8
4311 
MCycle[2] => Mux9.IN8
4312 
MCycle[2] => Mux10.IN8
4313 
MCycle[2] => Mux11.IN8
4314 
MCycle[2] => Mux12.IN8
4315 
MCycle[2] => Mux13.IN8
4316 
MCycle[2] => Mux14.IN8
4317 
MCycle[2] => Mux15.IN8
4318 
MCycle[2] => Mux16.IN8
4319 
MCycle[2] => Mux17.IN8
4320 
MCycle[2] => Mux18.IN8
4321 
MCycle[2] => Mux19.IN8
4322 
MCycle[2] => Mux20.IN8
4323 
MCycle[2] => Mux21.IN8
4324 
MCycle[2] => Mux22.IN8
4325 
MCycle[2] => Mux23.IN8
4326 
MCycle[2] => Mux24.IN8
4327 
MCycle[2] => Mux25.IN8
4328 
MCycle[2] => Mux26.IN8
4329 
MCycle[2] => Mux27.IN8
4330 
MCycle[2] => Mux28.IN8
4331 
MCycle[2] => Mux29.IN8
4332 
MCycle[2] => Mux30.IN8
4333 
MCycle[2] => Mux31.IN8
4334 
MCycle[2] => Mux32.IN8
4335 
MCycle[2] => Mux33.IN8
4336 
MCycle[2] => Mux34.IN8
4337 
MCycle[2] => Mux35.IN7
4338 
MCycle[2] => Mux36.IN8
4339 
MCycle[2] => Mux37.IN8
4340 
MCycle[2] => Mux38.IN7
4341 
MCycle[2] => Mux39.IN8
4342 
MCycle[2] => Mux40.IN4
4343 
MCycle[2] => Mux41.IN4
4344 
MCycle[2] => Mux42.IN4
4345 
MCycle[2] => Mux43.IN8
4346 
MCycle[2] => Mux44.IN8
4347 
MCycle[2] => Mux46.IN8
4348 
MCycle[2] => Mux47.IN8
4349 
MCycle[2] => Mux48.IN8
4350 
MCycle[2] => Mux49.IN8
4351 
MCycle[2] => Mux50.IN8
4352 
MCycle[2] => Mux51.IN8
4353 
MCycle[2] => Mux52.IN8
4354 
MCycle[2] => Mux53.IN8
4355 
MCycle[2] => Mux54.IN8
4356 
MCycle[2] => Mux55.IN8
4357 
MCycle[2] => Mux56.IN8
4358 
MCycle[2] => Mux57.IN8
4359 
MCycle[2] => Mux58.IN8
4360 
MCycle[2] => Mux59.IN8
4361 
MCycle[2] => Mux60.IN8
4362 
MCycle[2] => Mux117.IN8
4363 
MCycle[2] => Mux118.IN8
4364 
MCycle[2] => Mux131.IN4
4365 
MCycle[2] => Mux132.IN4
4366 
MCycle[2] => Mux133.IN8
4367 
MCycle[2] => Mux134.IN8
4368 
MCycle[2] => Mux135.IN8
4369 
MCycle[2] => Mux136.IN8
4370 
MCycle[2] => Mux137.IN8
4371 
MCycle[2] => Mux138.IN8
4372 
MCycle[2] => Mux139.IN8
4373 
MCycle[2] => Mux140.IN8
4374 
MCycle[2] => Mux141.IN8
4375 
MCycle[2] => Mux142.IN8
4376 
MCycle[2] => Mux143.IN8
4377 
MCycle[2] => Mux144.IN8
4378 
MCycle[2] => Mux145.IN8
4379 
MCycle[2] => Mux146.IN8
4380 
MCycle[2] => Mux147.IN8
4381 
MCycle[2] => Mux148.IN8
4382 
MCycle[2] => Mux149.IN8
4383 
MCycle[2] => Mux150.IN8
4384 
MCycle[2] => Mux151.IN8
4385 
MCycle[2] => Mux156.IN4
4386 
MCycle[2] => Mux157.IN4
4387 
MCycle[2] => Mux158.IN4
4388 
MCycle[2] => Mux159.IN8
4389 
MCycle[2] => Mux160.IN8
4390 
MCycle[2] => Mux161.IN8
4391 
MCycle[2] => Mux162.IN8
4392 
MCycle[2] => Mux163.IN8
4393 
MCycle[2] => Mux164.IN8
4394 
MCycle[2] => Mux165.IN8
4395 
MCycle[2] => Mux166.IN4
4396 
MCycle[2] => Mux167.IN4
4397 
MCycle[2] => Mux168.IN8
4398 
MCycle[2] => Mux169.IN8
4399 
MCycle[2] => Mux170.IN8
4400 
MCycle[2] => Mux171.IN8
4401 
MCycle[2] => Mux172.IN8
4402 
MCycle[2] => Mux173.IN8
4403 
MCycle[2] => Mux174.IN8
4404 
MCycle[2] => Mux175.IN8
4405 
MCycle[2] => Mux176.IN8
4406 
MCycle[2] => Mux177.IN8
4407 
MCycle[2] => Mux178.IN8
4408 
MCycle[2] => Mux179.IN8
4409 
MCycle[2] => Mux180.IN8
4410 
MCycle[2] => Mux181.IN8
4411 
MCycle[2] => Mux182.IN8
4412 
MCycle[2] => Mux183.IN8
4413 
MCycle[2] => Mux184.IN8
4414 
MCycle[2] => Mux185.IN8
4415 
MCycle[2] => Mux186.IN8
4416 
MCycle[2] => Mux187.IN8
4417 
MCycle[2] => Mux188.IN8
4418 
MCycle[2] => Mux189.IN8
4419 
MCycle[2] => Mux190.IN8
4420 
MCycle[2] => Mux191.IN8
4421 
MCycle[2] => Mux192.IN8
4422 
MCycle[2] => Mux193.IN8
4423 
MCycle[2] => Mux194.IN8
4424 
MCycle[2] => Mux195.IN8
4425 
MCycle[2] => Mux196.IN8
4426 
MCycle[2] => Equal0.IN0
4427 
MCycle[2] => Equal1.IN0
4428 
MCycle[2] => Equal4.IN1
4429 
MCycle[2] => Equal6.IN0
4430 
F[0] => Mux35.IN10
4431 
F[0] => Mux45.IN10
4432 
F[0] => Mux45.IN1
4433 
F[0] => Mux37.IN7
4434 
F[1] => ~NO_FANOUT~
4435 
F[2] => Mux45.IN9
4436 
F[2] => Mux45.IN2
4437 
F[3] => ~NO_FANOUT~
4438 
F[4] => ~NO_FANOUT~
4439 
F[5] => ~NO_FANOUT~
4440 
F[6] => Mux38.IN10
4441 
F[6] => Mux45.IN8
4442 
F[6] => Mux45.IN0
4443 
F[6] => Mux39.IN7
4444 
F[7] => Mux45.IN7
4445 
F[7] => Mux45.IN3
4446 
NMICycle => MCycles.OUTPUTSELECT
4447 
NMICycle => TStates.OUTPUTSELECT
4448 
NMICycle => TStates.OUTPUTSELECT
4449 
NMICycle => TStates.OUTPUTSELECT
4450 
NMICycle => IncDec_16.OUTPUTSELECT
4451 
NMICycle => Set_Addr_To.OUTPUTSELECT
4452 
NMICycle => Set_BusB_To.OUTPUTSELECT
4453 
NMICycle => Write.OUTPUTSELECT
4454 
NMICycle => LDZ.OUTPUTSELECT
4455 
NMICycle => Inc_PC.OUTPUTSELECT
4456 
NMICycle => Jump.OUTPUTSELECT
4457 
NMICycle => Mux72.IN263
4458 
IntCycle => MCycles.DATAA
4459 
IntCycle => TStates.OUTPUTSELECT
4460 
IntCycle => TStates.OUTPUTSELECT
4461 
IntCycle => TStates.OUTPUTSELECT
4462 
IntCycle => IncDec_16.OUTPUTSELECT
4463 
IntCycle => Set_Addr_To.OUTPUTSELECT
4464 
IntCycle => Set_BusB_To.OUTPUTSELECT
4465 
IntCycle => Write.OUTPUTSELECT
4466 
IntCycle => LDZ.OUTPUTSELECT
4467 
IntCycle => Inc_PC.OUTPUTSELECT
4468 
IntCycle => Jump.OUTPUTSELECT
4469 
MCycles[0] <= Mux257.DB_MAX_OUTPUT_PORT_TYPE
4470 
MCycles[1] <= Mux256.DB_MAX_OUTPUT_PORT_TYPE
4471 
MCycles[2] <= Mux255.DB_MAX_OUTPUT_PORT_TYPE
4472 
TStates[0] <= TStates.DB_MAX_OUTPUT_PORT_TYPE
4473 
TStates[1] <= TStates.DB_MAX_OUTPUT_PORT_TYPE
4474 
TStates[2] <= TStates.DB_MAX_OUTPUT_PORT_TYPE
4475 
Prefix[0] <= Mux300.DB_MAX_OUTPUT_PORT_TYPE
4476 
Prefix[1] <= Mux299.DB_MAX_OUTPUT_PORT_TYPE
4477 
Inc_PC <= Inc_PC.DB_MAX_OUTPUT_PORT_TYPE
4478 
Inc_WZ <= Mux266.DB_MAX_OUTPUT_PORT_TYPE
4479 
IncDec_16[0] <= Mux274.DB_MAX_OUTPUT_PORT_TYPE
4480 
IncDec_16[1] <= Mux273.DB_MAX_OUTPUT_PORT_TYPE
4481 
IncDec_16[2] <= Mux272.DB_MAX_OUTPUT_PORT_TYPE
4482 
IncDec_16[3] <= Mux271.DB_MAX_OUTPUT_PORT_TYPE
4483 
Read_To_Reg <= Mux254.DB_MAX_OUTPUT_PORT_TYPE
4484 
Read_To_Acc <= Mux263.DB_MAX_OUTPUT_PORT_TYPE
4485 
Set_BusA_To[0] <= Mux253.DB_MAX_OUTPUT_PORT_TYPE
4486 
Set_BusA_To[1] <= Mux252.DB_MAX_OUTPUT_PORT_TYPE
4487 
Set_BusA_To[2] <= Mux251.DB_MAX_OUTPUT_PORT_TYPE
4488 
Set_BusA_To[3] <= Mux250.DB_MAX_OUTPUT_PORT_TYPE
4489 
Set_BusB_To[0] <= Set_BusB_To.DB_MAX_OUTPUT_PORT_TYPE
4490 
Set_BusB_To[1] <= Set_BusB_To.DB_MAX_OUTPUT_PORT_TYPE
4491 
Set_BusB_To[2] <= Set_BusB_To.DB_MAX_OUTPUT_PORT_TYPE
4492 
Set_BusB_To[3] <= Set_BusB_To.DB_MAX_OUTPUT_PORT_TYPE
4493 
ALU_Op[0] <= Mux283.DB_MAX_OUTPUT_PORT_TYPE
4494 
ALU_Op[1] <= Mux282.DB_MAX_OUTPUT_PORT_TYPE
4495 
ALU_Op[2] <= Mux281.DB_MAX_OUTPUT_PORT_TYPE
4496 
ALU_Op[3] <= Mux280.DB_MAX_OUTPUT_PORT_TYPE
4497 
Save_ALU <= Mux278.DB_MAX_OUTPUT_PORT_TYPE
4498 
PreserveC <= Mux279.DB_MAX_OUTPUT_PORT_TYPE
4499 
Arith16 <= Mux292.DB_MAX_OUTPUT_PORT_TYPE
4500 
Set_Addr_To[0] <= Set_Addr_To.DB_MAX_OUTPUT_PORT_TYPE
4501 
Set_Addr_To[1] <= Set_Addr_To.DB_MAX_OUTPUT_PORT_TYPE
4502 
Set_Addr_To[2] <= Set_Addr_To.DB_MAX_OUTPUT_PORT_TYPE
4503 
IORQ <= Mux298.DB_MAX_OUTPUT_PORT_TYPE
4504 
Jump <= Mux287.DB_MAX_OUTPUT_PORT_TYPE
4505 
JumpE <= Mux293.DB_MAX_OUTPUT_PORT_TYPE
4506 
JumpXY <= Mux294.DB_MAX_OUTPUT_PORT_TYPE
4507 
Call <= Mux296.DB_MAX_OUTPUT_PORT_TYPE
4508 
RstP <= Mux297.DB_MAX_OUTPUT_PORT_TYPE
4509 
LDZ <= Mux264.DB_MAX_OUTPUT_PORT_TYPE
4510 
LDW <= Mux265.DB_MAX_OUTPUT_PORT_TYPE
4511 
LDSPHL <= Mux270.DB_MAX_OUTPUT_PORT_TYPE
4512 
Special_LD[0] <= Special_LD.DB_MAX_OUTPUT_PORT_TYPE
4513 
Special_LD[1] <= Special_LD.DB_MAX_OUTPUT_PORT_TYPE
4514 
Special_LD[2] <= Special_LD.DB_MAX_OUTPUT_PORT_TYPE
4515 
ExchangeDH <= Mux275.DB_MAX_OUTPUT_PORT_TYPE
4516 
ExchangeRp <= Mux249.DB_MAX_OUTPUT_PORT_TYPE
4517 
ExchangeAF <= Mux276.DB_MAX_OUTPUT_PORT_TYPE
4518 
ExchangeRS <= Mux277.DB_MAX_OUTPUT_PORT_TYPE
4519 
I_DJNZ <= Mux295.DB_MAX_OUTPUT_PORT_TYPE
4520 
I_CPL <= Mux284.DB_MAX_OUTPUT_PORT_TYPE
4521 
I_CCF <= Mux285.DB_MAX_OUTPUT_PORT_TYPE
4522 
I_SCF <= Mux286.DB_MAX_OUTPUT_PORT_TYPE
4523 
I_RETN <= I_RETN.DB_MAX_OUTPUT_PORT_TYPE
4524 
I_BT <= I_BT.DB_MAX_OUTPUT_PORT_TYPE
4525 
I_BC <= I_BC.DB_MAX_OUTPUT_PORT_TYPE
4526 
I_BTR <= I_BTR.DB_MAX_OUTPUT_PORT_TYPE
4527 
I_RLD <= I_RLD.DB_MAX_OUTPUT_PORT_TYPE
4528 
I_RRD <= I_RRD.DB_MAX_OUTPUT_PORT_TYPE
4529 
I_INRC <= I_INRC.DB_MAX_OUTPUT_PORT_TYPE
4530 
SetDI <= Mux289.DB_MAX_OUTPUT_PORT_TYPE
4531 
SetEI <= Mux290.DB_MAX_OUTPUT_PORT_TYPE
4532 
IMode[0] <= IMode.DB_MAX_OUTPUT_PORT_TYPE
4533 
IMode[1] <= IMode.DB_MAX_OUTPUT_PORT_TYPE
4534 
Halt <= Mux288.DB_MAX_OUTPUT_PORT_TYPE
4535 
NoRead <= NoRead.DB_MAX_OUTPUT_PORT_TYPE
4536 
Write <= Mux262.DB_MAX_OUTPUT_PORT_TYPE
4537 
 
4538 
 
4539 
|z80soc|T80se:z80_inst|T80:u0|T80_ALU:alu
4540 
Arith16 => F_Out.OUTPUTSELECT
4541 
Arith16 => F_Out.OUTPUTSELECT
4542 
Arith16 => F_Out.OUTPUTSELECT
4543 
Z16 => F_Out.OUTPUTSELECT
4544 
ALU_Op[0] => UseCarry.IN0
4545 
ALU_Op[0] => Mux8.IN5
4546 
ALU_Op[0] => Mux9.IN5
4547 
ALU_Op[0] => Mux10.IN5
4548 
ALU_Op[0] => Mux11.IN5
4549 
ALU_Op[0] => Mux12.IN5
4550 
ALU_Op[0] => Mux13.IN5
4551 
ALU_Op[0] => Mux14.IN5
4552 
ALU_Op[0] => Mux15.IN5
4553 
ALU_Op[0] => Mux16.IN8
4554 
ALU_Op[0] => Mux17.IN2
4555 
ALU_Op[0] => Mux18.IN10
4556 
ALU_Op[0] => Mux19.IN8
4557 
ALU_Op[0] => Mux20.IN10
4558 
ALU_Op[0] => Q_t.OUTPUTSELECT
4559 
ALU_Op[0] => Q_t.OUTPUTSELECT
4560 
ALU_Op[0] => Q_t.OUTPUTSELECT
4561 
ALU_Op[0] => Q_t.OUTPUTSELECT
4562 
ALU_Op[0] => Mux23.IN13
4563 
ALU_Op[0] => Mux24.IN16
4564 
ALU_Op[0] => Mux25.IN13
4565 
ALU_Op[0] => Mux26.IN16
4566 
ALU_Op[0] => Mux27.IN15
4567 
ALU_Op[0] => Mux28.IN16
4568 
ALU_Op[0] => Mux29.IN15
4569 
ALU_Op[0] => Mux30.IN13
4570 
ALU_Op[0] => Mux31.IN16
4571 
ALU_Op[0] => Mux32.IN16
4572 
ALU_Op[0] => Mux33.IN16
4573 
ALU_Op[0] => Mux34.IN16
4574 
ALU_Op[0] => Mux35.IN18
4575 
ALU_Op[0] => Mux36.IN18
4576 
ALU_Op[0] => Mux37.IN18
4577 
ALU_Op[0] => Mux38.IN18
4578 
ALU_Op[0] => Equal0.IN2
4579 
ALU_Op[1] => comb.IN1
4580 
ALU_Op[1] => B_i.OUTPUTSELECT
4581 
ALU_Op[1] => B_i.OUTPUTSELECT
4582 
ALU_Op[1] => B_i.OUTPUTSELECT
4583 
ALU_Op[1] => B_i.OUTPUTSELECT
4584 
ALU_Op[1] => B_i.OUTPUTSELECT
4585 
ALU_Op[1] => B_i.OUTPUTSELECT
4586 
ALU_Op[1] => B_i.OUTPUTSELECT
4587 
ALU_Op[1] => B_i.OUTPUTSELECT
4588 
ALU_Op[1] => Mux8.IN4
4589 
ALU_Op[1] => Mux9.IN4
4590 
ALU_Op[1] => Mux10.IN4
4591 
ALU_Op[1] => Mux11.IN4
4592 
ALU_Op[1] => Mux12.IN4
4593 
ALU_Op[1] => Mux13.IN4
4594 
ALU_Op[1] => Mux14.IN4
4595 
ALU_Op[1] => Mux15.IN4
4596 
ALU_Op[1] => Mux16.IN7
4597 
ALU_Op[1] => Mux17.IN1
4598 
ALU_Op[1] => Mux18.IN9
4599 
ALU_Op[1] => Mux19.IN7
4600 
ALU_Op[1] => Mux20.IN9
4601 
ALU_Op[1] => Mux23.IN12
4602 
ALU_Op[1] => Mux24.IN15
4603 
ALU_Op[1] => Mux25.IN12
4604 
ALU_Op[1] => Mux26.IN15
4605 
ALU_Op[1] => Mux27.IN14
4606 
ALU_Op[1] => Mux28.IN15
4607 
ALU_Op[1] => Mux29.IN14
4608 
ALU_Op[1] => Mux30.IN12
4609 
ALU_Op[1] => Mux31.IN15
4610 
ALU_Op[1] => Mux32.IN15
4611 
ALU_Op[1] => Mux33.IN15
4612 
ALU_Op[1] => Mux34.IN15
4613 
ALU_Op[1] => Mux35.IN17
4614 
ALU_Op[1] => Mux36.IN17
4615 
ALU_Op[1] => Mux37.IN17
4616 
ALU_Op[1] => Mux38.IN17
4617 
ALU_Op[1] => Equal0.IN1
4618 
ALU_Op[2] => Mux8.IN3
4619 
ALU_Op[2] => Mux9.IN3
4620 
ALU_Op[2] => Mux10.IN3
4621 
ALU_Op[2] => Mux11.IN3
4622 
ALU_Op[2] => Mux12.IN3
4623 
ALU_Op[2] => Mux13.IN3
4624 
ALU_Op[2] => Mux14.IN3
4625 
ALU_Op[2] => Mux15.IN3
4626 
ALU_Op[2] => Mux16.IN6
4627 
ALU_Op[2] => Mux17.IN0
4628 
ALU_Op[2] => Mux18.IN8
4629 
ALU_Op[2] => Mux19.IN6
4630 
ALU_Op[2] => Mux20.IN8
4631 
ALU_Op[2] => Mux23.IN11
4632 
ALU_Op[2] => Mux24.IN14
4633 
ALU_Op[2] => Mux25.IN11
4634 
ALU_Op[2] => Mux26.IN14
4635 
ALU_Op[2] => Mux27.IN13
4636 
ALU_Op[2] => Mux28.IN14
4637 
ALU_Op[2] => Mux29.IN13
4638 
ALU_Op[2] => Mux30.IN11
4639 
ALU_Op[2] => Mux31.IN14
4640 
ALU_Op[2] => Mux32.IN14
4641 
ALU_Op[2] => Mux33.IN14
4642 
ALU_Op[2] => Mux34.IN14
4643 
ALU_Op[2] => Mux35.IN16
4644 
ALU_Op[2] => Mux36.IN16
4645 
ALU_Op[2] => Mux37.IN16
4646 
ALU_Op[2] => Mux38.IN16
4647 
ALU_Op[2] => UseCarry.IN1
4648 
ALU_Op[2] => Equal0.IN0
4649 
ALU_Op[3] => Mux23.IN10
4650 
ALU_Op[3] => Mux24.IN13
4651 
ALU_Op[3] => Mux25.IN10
4652 
ALU_Op[3] => Mux26.IN13
4653 
ALU_Op[3] => Mux27.IN12
4654 
ALU_Op[3] => Mux28.IN13
4655 
ALU_Op[3] => Mux29.IN12
4656 
ALU_Op[3] => Mux30.IN10
4657 
ALU_Op[3] => Mux31.IN13
4658 
ALU_Op[3] => Mux32.IN13
4659 
ALU_Op[3] => Mux33.IN13
4660 
ALU_Op[3] => Mux34.IN13
4661 
ALU_Op[3] => Mux35.IN15
4662 
ALU_Op[3] => Mux36.IN15
4663 
ALU_Op[3] => Mux37.IN15
4664 
ALU_Op[3] => Mux38.IN15
4665 
IR[0] => Equal5.IN0
4666 
IR[1] => Equal5.IN2
4667 
IR[2] => Equal5.IN1
4668 
IR[3] => Mux0.IN10
4669 
IR[3] => Mux1.IN10
4670 
IR[3] => Mux2.IN10
4671 
IR[3] => Mux3.IN10
4672 
IR[3] => Mux4.IN10
4673 
IR[3] => Mux5.IN10
4674 
IR[3] => Mux6.IN10
4675 
IR[3] => Mux7.IN10
4676 
IR[3] => Mux21.IN3
4677 
IR[3] => Q_t.OUTPUTSELECT
4678 
IR[3] => Q_t.OUTPUTSELECT
4679 
IR[3] => Q_t.OUTPUTSELECT
4680 
IR[3] => Q_t.OUTPUTSELECT
4681 
IR[3] => Q_t.OUTPUTSELECT
4682 
IR[3] => Q_t.OUTPUTSELECT
4683 
IR[3] => Mux22.IN4
4684 
IR[3] => F_Out.OUTPUTSELECT
4685 
IR[4] => Mux0.IN9
4686 
IR[4] => Mux1.IN9
4687 
IR[4] => Mux2.IN9
4688 
IR[4] => Mux3.IN9
4689 
IR[4] => Mux4.IN9
4690 
IR[4] => Mux5.IN9
4691 
IR[4] => Mux6.IN9
4692 
IR[4] => Mux7.IN9
4693 
IR[4] => Mux21.IN2
4694 
IR[4] => Mux22.IN3
4695 
IR[5] => Mux0.IN8
4696 
IR[5] => Mux1.IN8
4697 
IR[5] => Mux2.IN8
4698 
IR[5] => Mux3.IN8
4699 
IR[5] => Mux4.IN8
4700 
IR[5] => Mux5.IN8
4701 
IR[5] => Mux6.IN8
4702 
IR[5] => Mux7.IN8
4703 
IR[5] => Mux21.IN1
4704 
IR[5] => Mux22.IN2
4705 
ISet[0] => Equal7.IN1
4706 
ISet[1] => Equal7.IN0
4707 
BusA[0] => Add0.IN10
4708 
BusA[0] => Q_t.IN0
4709 
BusA[0] => Q_t.IN0
4710 
BusA[0] => Q_t.IN0
4711 
BusA[0] => LessThan1.IN8
4712 
BusA[0] => LessThan2.IN8
4713 
BusA[0] => LessThan3.IN16
4714 
BusA[0] => Equal2.IN8
4715 
BusA[0] => F_Out.IN1
4716 
BusA[0] => Mux21.IN9
4717 
BusA[0] => Q_t.DATAA
4718 
BusA[0] => F_Out.DATAB
4719 
BusA[0] => Mux38.IN19
4720 
BusA[1] => Add0.IN9
4721 
BusA[1] => Q_t.IN0
4722 
BusA[1] => Q_t.IN0
4723 
BusA[1] => Q_t.IN0
4724 
BusA[1] => Add3.IN14
4725 
BusA[1] => DAA_Q.DATAA
4726 
BusA[1] => LessThan1.IN7
4727 
BusA[1] => LessThan2.IN7
4728 
BusA[1] => Add5.IN14
4729 
BusA[1] => DAA_Q.DATAA
4730 
BusA[1] => LessThan3.IN15
4731 
BusA[1] => Q_t.DATAA
4732 
BusA[1] => Mux22.IN6
4733 
BusA[1] => Mux22.IN7
4734 
BusA[1] => Mux22.IN8
4735 
BusA[1] => Mux22.IN9
4736 
BusA[2] => Add0.IN8
4737 
BusA[2] => Q_t.IN0
4738 
BusA[2] => Q_t.IN0
4739 
BusA[2] => Q_t.IN0
4740 
BusA[2] => Add3.IN13
4741 
BusA[2] => DAA_Q.DATAA
4742 
BusA[2] => LessThan1.IN6
4743 
BusA[2] => LessThan2.IN6
4744 
BusA[2] => Add5.IN13
4745 
BusA[2] => DAA_Q.DATAA
4746 
BusA[2] => LessThan3.IN14
4747 
BusA[2] => Q_t.DATAA
4748 
BusA[2] => Q_t.DATAB
4749 
BusA[3] => Add0.IN7
4750 
BusA[3] => Q_t.IN0
4751 
BusA[3] => Q_t.IN0
4752 
BusA[3] => Q_t.IN0
4753 
BusA[3] => Add3.IN12
4754 
BusA[3] => DAA_Q.DATAA
4755 
BusA[3] => LessThan1.IN5
4756 
BusA[3] => LessThan2.IN5
4757 
BusA[3] => Add5.IN12
4758 
BusA[3] => DAA_Q.DATAA
4759 
BusA[3] => LessThan3.IN13
4760 
BusA[3] => Q_t.DATAA
4761 
BusA[3] => Q_t.DATAB
4762 
BusA[4] => Add1.IN7
4763 
BusA[4] => Q_t.IN0
4764 
BusA[4] => Q_t.IN0
4765 
BusA[4] => Q_t.IN0
4766 
BusA[4] => Add3.IN11
4767 
BusA[4] => DAA_Q.DATAA
4768 
BusA[4] => Add5.IN11
4769 
BusA[4] => DAA_Q.DATAA
4770 
BusA[4] => LessThan3.IN12
4771 
BusA[4] => F_Out.IN1
4772 
BusA[4] => Q_t.DATAA
4773 
BusA[4] => Q_t.DATAB
4774 
BusA[4] => Mux34.IN17
4775 
BusA[4] => Mux34.IN18
4776 
BusA[4] => Equal3.IN3
4777 
BusA[5] => Add1.IN6
4778 
BusA[5] => Q_t.IN0
4779 
BusA[5] => Q_t.IN0
4780 
BusA[5] => Q_t.IN0
4781 
BusA[5] => Add3.IN10
4782 
BusA[5] => DAA_Q.DATAA
4783 
BusA[5] => Add5.IN10
4784 
BusA[5] => DAA_Q.DATAA
4785 
BusA[5] => LessThan3.IN11
4786 
BusA[5] => F_Out.IN1
4787 
BusA[5] => Q_t.DATAA
4788 
BusA[5] => Q_t.DATAB
4789 
BusA[5] => Mux25.IN14
4790 
BusA[5] => Mux25.IN15
4791 
BusA[5] => Mux33.IN17
4792 
BusA[5] => Mux33.IN18
4793 
BusA[5] => Equal3.IN2
4794 
BusA[6] => Add1.IN5
4795 
BusA[6] => Q_t.IN0
4796 
BusA[6] => Q_t.IN0
4797 
BusA[6] => Q_t.IN0
4798 
BusA[6] => Add3.IN9
4799 
BusA[6] => DAA_Q.DATAA
4800 
BusA[6] => Add5.IN9
4801 
BusA[6] => DAA_Q.DATAA
4802 
BusA[6] => LessThan3.IN10
4803 
BusA[6] => F_Out.IN1
4804 
BusA[6] => Mux21.IN5
4805 
BusA[6] => Mux21.IN6
4806 
BusA[6] => Mux21.IN7
4807 
BusA[6] => Mux21.IN8
4808 
BusA[6] => Q_t.DATAB
4809 
BusA[6] => Mux32.IN17
4810 
BusA[6] => Mux32.IN18
4811 
BusA[6] => Equal3.IN1
4812 
BusA[7] => Add2.IN3
4813 
BusA[7] => Q_t.IN0
4814 
BusA[7] => Q_t.IN0
4815 
BusA[7] => Q_t.IN0
4816 
BusA[7] => Add3.IN8
4817 
BusA[7] => DAA_Q.DATAA
4818 
BusA[7] => Add5.IN8
4819 
BusA[7] => DAA_Q.DATAA
4820 
BusA[7] => LessThan3.IN9
4821 
BusA[7] => F_Out.IN1
4822 
BusA[7] => Mux21.IN4
4823 
BusA[7] => Q_t.DATAB
4824 
BusA[7] => Mux22.IN5
4825 
BusA[7] => F_Out.DATAA
4826 
BusA[7] => Mux23.IN14
4827 
BusA[7] => Mux23.IN15
4828 
BusA[7] => Mux31.IN17
4829 
BusA[7] => Mux31.IN18
4830 
BusA[7] => Equal3.IN0
4831 
BusB[0] => B_i.DATAA
4832 
BusB[0] => Q_t.IN1
4833 
BusB[0] => Q_t.IN1
4834 
BusB[0] => Q_t.IN1
4835 
BusB[0] => Q_t.DATAA
4836 
BusB[0] => Q_t.IN1
4837 
BusB[0] => Q_t.IN1
4838 
BusB[0] => Q_t.IN1
4839 
BusB[0] => B_i.DATAB
4840 
BusB[1] => B_i.DATAA
4841 
BusB[1] => Q_t.IN1
4842 
BusB[1] => Q_t.IN1
4843 
BusB[1] => Q_t.IN1
4844 
BusB[1] => Q_t.DATAA
4845 
BusB[1] => Q_t.IN1
4846 
BusB[1] => Q_t.IN1
4847 
BusB[1] => Q_t.IN1
4848 
BusB[1] => B_i.DATAB
4849 
BusB[2] => B_i.DATAA
4850 
BusB[2] => Q_t.IN1
4851 
BusB[2] => Q_t.IN1
4852 
BusB[2] => Q_t.IN1
4853 
BusB[2] => Q_t.DATAA
4854 
BusB[2] => Q_t.IN1
4855 
BusB[2] => Q_t.IN1
4856 
BusB[2] => Q_t.IN1
4857 
BusB[2] => B_i.DATAB
4858 
BusB[3] => B_i.DATAA
4859 
BusB[3] => Q_t.IN1
4860 
BusB[3] => Q_t.IN1
4861 
BusB[3] => Q_t.IN1
4862 
BusB[3] => F_Out.DATAB
4863 
BusB[3] => Q_t.DATAA
4864 
BusB[3] => Q_t.IN1
4865 
BusB[3] => F_Out.DATAB
4866 
BusB[3] => Q_t.IN1
4867 
BusB[3] => Q_t.IN1
4868 
BusB[3] => B_i.DATAB
4869 
BusB[4] => B_i.DATAA
4870 
BusB[4] => Q_t.IN1
4871 
BusB[4] => Q_t.IN1
4872 
BusB[4] => Q_t.IN1
4873 
BusB[4] => Q_t.DATAB
4874 
BusB[4] => Q_t.IN1
4875 
BusB[4] => Q_t.IN1
4876 
BusB[4] => Q_t.IN1
4877 
BusB[4] => B_i.DATAB
4878 
BusB[5] => B_i.DATAA
4879 
BusB[5] => Q_t.IN1
4880 
BusB[5] => Q_t.IN1
4881 
BusB[5] => Q_t.IN1
4882 
BusB[5] => F_Out.DATAB
4883 
BusB[5] => Q_t.DATAB
4884 
BusB[5] => Q_t.IN1
4885 
BusB[5] => F_Out.DATAB
4886 
BusB[5] => Q_t.IN1
4887 
BusB[5] => Q_t.IN1
4888 
BusB[5] => B_i.DATAB
4889 
BusB[6] => B_i.DATAA
4890 
BusB[6] => Q_t.IN1
4891 
BusB[6] => Q_t.IN1
4892 
BusB[6] => Q_t.IN1
4893 
BusB[6] => Q_t.DATAB
4894 
BusB[6] => Q_t.IN1
4895 
BusB[6] => Q_t.IN1
4896 
BusB[6] => Q_t.IN1
4897 
BusB[6] => B_i.DATAB
4898 
BusB[7] => B_i.DATAA
4899 
BusB[7] => Q_t.IN1
4900 
BusB[7] => Q_t.IN1
4901 
BusB[7] => Q_t.IN1
4902 
BusB[7] => Q_t.DATAB
4903 
BusB[7] => Q_t.IN1
4904 
BusB[7] => Q_t.IN1
4905 
BusB[7] => Q_t.IN1
4906 
BusB[7] => B_i.DATAB
4907 
F_In[0] => comb.IN1
4908 
F_In[0] => process_1.IN1
4909 
F_In[0] => process_1.IN1
4910 
F_In[0] => F_Out.IN1
4911 
F_In[0] => Mux21.IN10
4912 
F_In[0] => Mux22.IN10
4913 
F_In[0] => Mux30.IN14
4914 
F_In[0] => Mux30.IN15
4915 
F_In[0] => Mux30.IN16
4916 
F_In[0] => Mux30.IN17
4917 
F_In[0] => Mux30.IN18
4918 
F_In[0] => Mux30.IN19
4919 
F_In[1] => Mux29.IN16
4920 
F_In[1] => Mux29.IN17
4921 
F_In[1] => Mux29.IN18
4922 
F_In[1] => Mux29.IN19
4923 
F_In[1] => F_Out.OUTPUTSELECT
4924 
F_In[1] => DAA_Q[8].OUTPUTSELECT
4925 
F_In[1] => DAA_Q[7].OUTPUTSELECT
4926 
F_In[1] => DAA_Q[6].OUTPUTSELECT
4927 
F_In[1] => DAA_Q[5].OUTPUTSELECT
4928 
F_In[1] => DAA_Q[4].OUTPUTSELECT
4929 
F_In[1] => DAA_Q[3].OUTPUTSELECT
4930 
F_In[1] => DAA_Q[2].OUTPUTSELECT
4931 
F_In[1] => DAA_Q[1].OUTPUTSELECT
4932 
F_In[2] => Mux17.IN3
4933 
F_In[2] => Mux17.IN4
4934 
F_In[2] => Mux17.IN5
4935 
F_In[2] => F_Out.DATAB
4936 
F_In[2] => F_Out.DATAB
4937 
F_In[2] => Mux28.IN17
4938 
F_In[2] => Mux28.IN18
4939 
F_In[2] => Mux28.IN19
4940 
F_In[3] => Mux27.IN16
4941 
F_In[3] => Mux27.IN17
4942 
F_In[3] => Mux27.IN18
4943 
F_In[4] => F_Out.DATAA
4944 
F_In[4] => process_1.IN1
4945 
F_In[4] => F_Out.DATAA
4946 
F_In[4] => F_Out.DATAA
4947 
F_In[4] => Mux26.IN17
4948 
F_In[4] => Mux26.IN18
4949 
F_In[4] => Mux26.IN19
4950 
F_In[5] => Mux25.IN16
4951 
F_In[5] => Mux25.IN17
4952 
F_In[5] => Mux25.IN18
4953 
F_In[6] => F_Out.DATAB
4954 
F_In[6] => F_Out.DATAB
4955 
F_In[6] => F_Out.DATAB
4956 
F_In[6] => Mux24.IN17
4957 
F_In[6] => Mux24.IN18
4958 
F_In[6] => Mux24.IN19
4959 
F_In[7] => F_Out.DATAB
4960 
F_In[7] => F_Out.DATAB
4961 
F_In[7] => Mux23.IN16
4962 
F_In[7] => Mux23.IN17
4963 
F_In[7] => Mux23.IN18
4964 
Q[0] <= Mux38.DB_MAX_OUTPUT_PORT_TYPE
4965 
Q[1] <= Mux37.DB_MAX_OUTPUT_PORT_TYPE
4966 
Q[2] <= Mux36.DB_MAX_OUTPUT_PORT_TYPE
4967 
Q[3] <= Mux35.DB_MAX_OUTPUT_PORT_TYPE
4968 
Q[4] <= Mux34.DB_MAX_OUTPUT_PORT_TYPE
4969 
Q[5] <= Mux33.DB_MAX_OUTPUT_PORT_TYPE
4970 
Q[6] <= Mux32.DB_MAX_OUTPUT_PORT_TYPE
4971 
Q[7] <= Mux31.DB_MAX_OUTPUT_PORT_TYPE
4972 
F_Out[0] <= Mux30.DB_MAX_OUTPUT_PORT_TYPE
4973 
F_Out[1] <= Mux29.DB_MAX_OUTPUT_PORT_TYPE
4974 
F_Out[2] <= Mux28.DB_MAX_OUTPUT_PORT_TYPE
4975 
F_Out[3] <= Mux27.DB_MAX_OUTPUT_PORT_TYPE
4976 
F_Out[4] <= Mux26.DB_MAX_OUTPUT_PORT_TYPE
4977 
F_Out[5] <= Mux25.DB_MAX_OUTPUT_PORT_TYPE
4978 
F_Out[6] <= Mux24.DB_MAX_OUTPUT_PORT_TYPE
4979 
F_Out[7] <= Mux23.DB_MAX_OUTPUT_PORT_TYPE
4980 
 
4981 
 
4982 
|z80soc|T80se:z80_inst|T80:u0|T80_Reg:Regs
4983 
Clk => RegsL[7][0].CLK
4984 
Clk => RegsL[7][1].CLK
4985 
Clk => RegsL[7][2].CLK
4986 
Clk => RegsL[7][3].CLK
4987 
Clk => RegsL[7][4].CLK
4988 
Clk => RegsL[7][5].CLK
4989 
Clk => RegsL[7][6].CLK
4990 
Clk => RegsL[7][7].CLK
4991 
Clk => RegsL[6][0].CLK
4992 
Clk => RegsL[6][1].CLK
4993 
Clk => RegsL[6][2].CLK
4994 
Clk => RegsL[6][3].CLK
4995 
Clk => RegsL[6][4].CLK
4996 
Clk => RegsL[6][5].CLK
4997 
Clk => RegsL[6][6].CLK
4998 
Clk => RegsL[6][7].CLK
4999 
Clk => RegsL[5][0].CLK
5000 
Clk => RegsL[5][1].CLK
5001 
Clk => RegsL[5][2].CLK
5002 
Clk => RegsL[5][3].CLK
5003 
Clk => RegsL[5][4].CLK
5004 
Clk => RegsL[5][5].CLK
5005 
Clk => RegsL[5][6].CLK
5006 
Clk => RegsL[5][7].CLK
5007 
Clk => RegsL[4][0].CLK
5008 
Clk => RegsL[4][1].CLK
5009 
Clk => RegsL[4][2].CLK
5010 
Clk => RegsL[4][3].CLK
5011 
Clk => RegsL[4][4].CLK
5012 
Clk => RegsL[4][5].CLK
5013 
Clk => RegsL[4][6].CLK
5014 
Clk => RegsL[4][7].CLK
5015 
Clk => RegsL[3][0].CLK
5016 
Clk => RegsL[3][1].CLK
5017 
Clk => RegsL[3][2].CLK
5018 
Clk => RegsL[3][3].CLK
5019 
Clk => RegsL[3][4].CLK
5020 
Clk => RegsL[3][5].CLK
5021 
Clk => RegsL[3][6].CLK
5022 
Clk => RegsL[3][7].CLK
5023 
Clk => RegsL[2][0].CLK
5024 
Clk => RegsL[2][1].CLK
5025 
Clk => RegsL[2][2].CLK
5026 
Clk => RegsL[2][3].CLK
5027 
Clk => RegsL[2][4].CLK
5028 
Clk => RegsL[2][5].CLK
5029 
Clk => RegsL[2][6].CLK
5030 
Clk => RegsL[2][7].CLK
5031 
Clk => RegsL[1][0].CLK
5032 
Clk => RegsL[1][1].CLK
5033 
Clk => RegsL[1][2].CLK
5034 
Clk => RegsL[1][3].CLK
5035 
Clk => RegsL[1][4].CLK
5036 
Clk => RegsL[1][5].CLK
5037 
Clk => RegsL[1][6].CLK
5038 
Clk => RegsL[1][7].CLK
5039 
Clk => RegsL[0][0].CLK
5040 
Clk => RegsL[0][1].CLK
5041 
Clk => RegsL[0][2].CLK
5042 
Clk => RegsL[0][3].CLK
5043 
Clk => RegsL[0][4].CLK
5044 
Clk => RegsL[0][5].CLK
5045 
Clk => RegsL[0][6].CLK
5046 
Clk => RegsL[0][7].CLK
5047 
Clk => RegsH[7][0].CLK
5048 
Clk => RegsH[7][1].CLK
5049 
Clk => RegsH[7][2].CLK
5050 
Clk => RegsH[7][3].CLK
5051 
Clk => RegsH[7][4].CLK
5052 
Clk => RegsH[7][5].CLK
5053 
Clk => RegsH[7][6].CLK
5054 
Clk => RegsH[7][7].CLK
5055 
Clk => RegsH[6][0].CLK
5056 
Clk => RegsH[6][1].CLK
5057 
Clk => RegsH[6][2].CLK
5058 
Clk => RegsH[6][3].CLK
5059 
Clk => RegsH[6][4].CLK
5060 
Clk => RegsH[6][5].CLK
5061 
Clk => RegsH[6][6].CLK
5062 
Clk => RegsH[6][7].CLK
5063 
Clk => RegsH[5][0].CLK
5064 
Clk => RegsH[5][1].CLK
5065 
Clk => RegsH[5][2].CLK
5066 
Clk => RegsH[5][3].CLK
5067 
Clk => RegsH[5][4].CLK
5068 
Clk => RegsH[5][5].CLK
5069 
Clk => RegsH[5][6].CLK
5070 
Clk => RegsH[5][7].CLK
5071 
Clk => RegsH[4][0].CLK
5072 
Clk => RegsH[4][1].CLK
5073 
Clk => RegsH[4][2].CLK
5074 
Clk => RegsH[4][3].CLK
5075 
Clk => RegsH[4][4].CLK
5076 
Clk => RegsH[4][5].CLK
5077 
Clk => RegsH[4][6].CLK
5078 
Clk => RegsH[4][7].CLK
5079 
Clk => RegsH[3][0].CLK
5080 
Clk => RegsH[3][1].CLK
5081 
Clk => RegsH[3][2].CLK
5082 
Clk => RegsH[3][3].CLK
5083 
Clk => RegsH[3][4].CLK
5084 
Clk => RegsH[3][5].CLK
5085 
Clk => RegsH[3][6].CLK
5086 
Clk => RegsH[3][7].CLK
5087 
Clk => RegsH[2][0].CLK
5088 
Clk => RegsH[2][1].CLK
5089 
Clk => RegsH[2][2].CLK
5090 
Clk => RegsH[2][3].CLK
5091 
Clk => RegsH[2][4].CLK
5092 
Clk => RegsH[2][5].CLK
5093 
Clk => RegsH[2][6].CLK
5094 
Clk => RegsH[2][7].CLK
5095 
Clk => RegsH[1][0].CLK
5096 
Clk => RegsH[1][1].CLK
5097 
Clk => RegsH[1][2].CLK
5098 
Clk => RegsH[1][3].CLK
5099 
Clk => RegsH[1][4].CLK
5100 
Clk => RegsH[1][5].CLK
5101 
Clk => RegsH[1][6].CLK
5102 
Clk => RegsH[1][7].CLK
5103 
Clk => RegsH[0][0].CLK
5104 
Clk => RegsH[0][1].CLK
5105 
Clk => RegsH[0][2].CLK
5106 
Clk => RegsH[0][3].CLK
5107 
Clk => RegsH[0][4].CLK
5108 
Clk => RegsH[0][5].CLK
5109 
Clk => RegsH[0][6].CLK
5110 
Clk => RegsH[0][7].CLK
5111 
CEN => RegsL[7][0].ENA
5112 
CEN => RegsL[7][1].ENA
5113 
CEN => RegsL[7][2].ENA
5114 
CEN => RegsL[7][3].ENA
5115 
CEN => RegsL[7][4].ENA
5116 
CEN => RegsL[7][5].ENA
5117 
CEN => RegsL[7][6].ENA
5118 
CEN => RegsL[7][7].ENA
5119 
CEN => RegsL[6][0].ENA
5120 
CEN => RegsL[6][1].ENA
5121 
CEN => RegsL[6][2].ENA
5122 
CEN => RegsL[6][3].ENA
5123 
CEN => RegsL[6][4].ENA
5124 
CEN => RegsL[6][5].ENA
5125 
CEN => RegsL[6][6].ENA
5126 
CEN => RegsL[6][7].ENA
5127 
CEN => RegsL[5][0].ENA
5128 
CEN => RegsL[5][1].ENA
5129 
CEN => RegsL[5][2].ENA
5130 
CEN => RegsL[5][3].ENA
5131 
CEN => RegsL[5][4].ENA
5132 
CEN => RegsL[5][5].ENA
5133 
CEN => RegsL[5][6].ENA
5134 
CEN => RegsL[5][7].ENA
5135 
CEN => RegsL[4][0].ENA
5136 
CEN => RegsL[4][1].ENA
5137 
CEN => RegsL[4][2].ENA
5138 
CEN => RegsL[4][3].ENA
5139 
CEN => RegsL[4][4].ENA
5140 
CEN => RegsL[4][5].ENA
5141 
CEN => RegsL[4][6].ENA
5142 
CEN => RegsL[4][7].ENA
5143 
CEN => RegsL[3][0].ENA
5144 
CEN => RegsL[3][1].ENA
5145 
CEN => RegsL[3][2].ENA
5146 
CEN => RegsL[3][3].ENA
5147 
CEN => RegsL[3][4].ENA
5148 
CEN => RegsL[3][5].ENA
5149 
CEN => RegsL[3][6].ENA
5150 
CEN => RegsL[3][7].ENA
5151 
CEN => RegsL[2][0].ENA
5152 
CEN => RegsL[2][1].ENA
5153 
CEN => RegsL[2][2].ENA
5154 
CEN => RegsL[2][3].ENA
5155 
CEN => RegsL[2][4].ENA
5156 
CEN => RegsL[2][5].ENA
5157 
CEN => RegsL[2][6].ENA
5158 
CEN => RegsL[2][7].ENA
5159 
CEN => RegsL[1][0].ENA
5160 
CEN => RegsL[1][1].ENA
5161 
CEN => RegsL[1][2].ENA
5162 
CEN => RegsL[1][3].ENA
5163 
CEN => RegsL[1][4].ENA
5164 
CEN => RegsL[1][5].ENA
5165 
CEN => RegsL[1][6].ENA
5166 
CEN => RegsL[1][7].ENA
5167 
CEN => RegsL[0][0].ENA
5168 
CEN => RegsL[0][1].ENA
5169 
CEN => RegsL[0][2].ENA
5170 
CEN => RegsL[0][3].ENA
5171 
CEN => RegsL[0][4].ENA
5172 
CEN => RegsL[0][5].ENA
5173 
CEN => RegsL[0][6].ENA
5174 
CEN => RegsL[0][7].ENA
5175 
CEN => RegsH[7][0].ENA
5176 
CEN => RegsH[7][1].ENA
5177 
CEN => RegsH[7][2].ENA
5178 
CEN => RegsH[7][3].ENA
5179 
CEN => RegsH[7][4].ENA
5180 
CEN => RegsH[7][5].ENA
5181 
CEN => RegsH[7][6].ENA
5182 
CEN => RegsH[7][7].ENA
5183 
CEN => RegsH[6][0].ENA
5184 
CEN => RegsH[6][1].ENA
5185 
CEN => RegsH[6][2].ENA
5186 
CEN => RegsH[6][3].ENA
5187 
CEN => RegsH[6][4].ENA
5188 
CEN => RegsH[6][5].ENA
5189 
CEN => RegsH[6][6].ENA
5190 
CEN => RegsH[6][7].ENA
5191 
CEN => RegsH[5][0].ENA
5192 
CEN => RegsH[5][1].ENA
5193 
CEN => RegsH[5][2].ENA
5194 
CEN => RegsH[5][3].ENA
5195 
CEN => RegsH[5][4].ENA
5196 
CEN => RegsH[5][5].ENA
5197 
CEN => RegsH[5][6].ENA
5198 
CEN => RegsH[5][7].ENA
5199 
CEN => RegsH[4][0].ENA
5200 
CEN => RegsH[4][1].ENA
5201 
CEN => RegsH[4][2].ENA
5202 
CEN => RegsH[4][3].ENA
5203 
CEN => RegsH[4][4].ENA
5204 
CEN => RegsH[4][5].ENA
5205 
CEN => RegsH[4][6].ENA
5206 
CEN => RegsH[4][7].ENA
5207 
CEN => RegsH[3][0].ENA
5208 
CEN => RegsH[3][1].ENA
5209 
CEN => RegsH[3][2].ENA
5210 
CEN => RegsH[3][3].ENA
5211 
CEN => RegsH[3][4].ENA
5212 
CEN => RegsH[3][5].ENA
5213 
CEN => RegsH[3][6].ENA
5214 
CEN => RegsH[3][7].ENA
5215 
CEN => RegsH[2][0].ENA
5216 
CEN => RegsH[2][1].ENA
5217 
CEN => RegsH[2][2].ENA
5218 
CEN => RegsH[2][3].ENA
5219 
CEN => RegsH[2][4].ENA
5220 
CEN => RegsH[2][5].ENA
5221 
CEN => RegsH[2][6].ENA
5222 
CEN => RegsH[2][7].ENA
5223 
CEN => RegsH[1][0].ENA
5224 
CEN => RegsH[1][1].ENA
5225 
CEN => RegsH[1][2].ENA
5226 
CEN => RegsH[1][3].ENA
5227 
CEN => RegsH[1][4].ENA
5228 
CEN => RegsH[1][5].ENA
5229 
CEN => RegsH[1][6].ENA
5230 
CEN => RegsH[1][7].ENA
5231 
CEN => RegsH[0][0].ENA
5232 
CEN => RegsH[0][1].ENA
5233 
CEN => RegsH[0][2].ENA
5234 
CEN => RegsH[0][3].ENA
5235 
CEN => RegsH[0][4].ENA
5236 
CEN => RegsH[0][5].ENA
5237 
CEN => RegsH[0][6].ENA
5238 
CEN => RegsH[0][7].ENA
5239 
WEH => RegsH.OUTPUTSELECT
5240 
WEH => RegsH.OUTPUTSELECT
5241 
WEH => RegsH.OUTPUTSELECT
5242 
WEH => RegsH.OUTPUTSELECT
5243 
WEH => RegsH.OUTPUTSELECT
5244 
WEH => RegsH.OUTPUTSELECT
5245 
WEH => RegsH.OUTPUTSELECT
5246 
WEH => RegsH.OUTPUTSELECT
5247 
WEH => RegsH.OUTPUTSELECT
5248 
WEH => RegsH.OUTPUTSELECT
5249 
WEH => RegsH.OUTPUTSELECT
5250 
WEH => RegsH.OUTPUTSELECT
5251 
WEH => RegsH.OUTPUTSELECT
5252 
WEH => RegsH.OUTPUTSELECT
5253 
WEH => RegsH.OUTPUTSELECT
5254 
WEH => RegsH.OUTPUTSELECT
5255 
WEH => RegsH.OUTPUTSELECT
5256 
WEH => RegsH.OUTPUTSELECT
5257 
WEH => RegsH.OUTPUTSELECT
5258 
WEH => RegsH.OUTPUTSELECT
5259 
WEH => RegsH.OUTPUTSELECT
5260 
WEH => RegsH.OUTPUTSELECT
5261 
WEH => RegsH.OUTPUTSELECT
5262 
WEH => RegsH.OUTPUTSELECT
5263 
WEH => RegsH.OUTPUTSELECT
5264 
WEH => RegsH.OUTPUTSELECT
5265 
WEH => RegsH.OUTPUTSELECT
5266 
WEH => RegsH.OUTPUTSELECT
5267 
WEH => RegsH.OUTPUTSELECT
5268 
WEH => RegsH.OUTPUTSELECT
5269 
WEH => RegsH.OUTPUTSELECT
5270 
WEH => RegsH.OUTPUTSELECT
5271 
WEH => RegsH.OUTPUTSELECT
5272 
WEH => RegsH.OUTPUTSELECT
5273 
WEH => RegsH.OUTPUTSELECT
5274 
WEH => RegsH.OUTPUTSELECT
5275 
WEH => RegsH.OUTPUTSELECT
5276 
WEH => RegsH.OUTPUTSELECT
5277 
WEH => RegsH.OUTPUTSELECT
5278 
WEH => RegsH.OUTPUTSELECT
5279 
WEH => RegsH.OUTPUTSELECT
5280 
WEH => RegsH.OUTPUTSELECT
5281 
WEH => RegsH.OUTPUTSELECT
5282 
WEH => RegsH.OUTPUTSELECT
5283 
WEH => RegsH.OUTPUTSELECT
5284 
WEH => RegsH.OUTPUTSELECT
5285 
WEH => RegsH.OUTPUTSELECT
5286 
WEH => RegsH.OUTPUTSELECT
5287 
WEH => RegsH.OUTPUTSELECT
5288 
WEH => RegsH.OUTPUTSELECT
5289 
WEH => RegsH.OUTPUTSELECT
5290 
WEH => RegsH.OUTPUTSELECT
5291 
WEH => RegsH.OUTPUTSELECT
5292 
WEH => RegsH.OUTPUTSELECT
5293 
WEH => RegsH.OUTPUTSELECT
5294 
WEH => RegsH.OUTPUTSELECT
5295 
WEH => RegsH.OUTPUTSELECT
5296 
WEH => RegsH.OUTPUTSELECT
5297 
WEH => RegsH.OUTPUTSELECT
5298 
WEH => RegsH.OUTPUTSELECT
5299 
WEH => RegsH.OUTPUTSELECT
5300 
WEH => RegsH.OUTPUTSELECT
5301 
WEH => RegsH.OUTPUTSELECT
5302 
WEH => RegsH.OUTPUTSELECT
5303 
WEL => RegsL.OUTPUTSELECT
5304 
WEL => RegsL.OUTPUTSELECT
5305 
WEL => RegsL.OUTPUTSELECT
5306 
WEL => RegsL.OUTPUTSELECT
5307 
WEL => RegsL.OUTPUTSELECT
5308 
WEL => RegsL.OUTPUTSELECT
5309 
WEL => RegsL.OUTPUTSELECT
5310 
WEL => RegsL.OUTPUTSELECT
5311 
WEL => RegsL.OUTPUTSELECT
5312 
WEL => RegsL.OUTPUTSELECT
5313 
WEL => RegsL.OUTPUTSELECT
5314 
WEL => RegsL.OUTPUTSELECT
5315 
WEL => RegsL.OUTPUTSELECT
5316 
WEL => RegsL.OUTPUTSELECT
5317 
WEL => RegsL.OUTPUTSELECT
5318 
WEL => RegsL.OUTPUTSELECT
5319 
WEL => RegsL.OUTPUTSELECT
5320 
WEL => RegsL.OUTPUTSELECT
5321 
WEL => RegsL.OUTPUTSELECT
5322 
WEL => RegsL.OUTPUTSELECT
5323 
WEL => RegsL.OUTPUTSELECT
5324 
WEL => RegsL.OUTPUTSELECT
5325 
WEL => RegsL.OUTPUTSELECT
5326 
WEL => RegsL.OUTPUTSELECT
5327 
WEL => RegsL.OUTPUTSELECT
5328 
WEL => RegsL.OUTPUTSELECT
5329 
WEL => RegsL.OUTPUTSELECT
5330 
WEL => RegsL.OUTPUTSELECT
5331 
WEL => RegsL.OUTPUTSELECT
5332 
WEL => RegsL.OUTPUTSELECT
5333 
WEL => RegsL.OUTPUTSELECT
5334 
WEL => RegsL.OUTPUTSELECT
5335 
WEL => RegsL.OUTPUTSELECT
5336 
WEL => RegsL.OUTPUTSELECT
5337 
WEL => RegsL.OUTPUTSELECT
5338 
WEL => RegsL.OUTPUTSELECT
5339 
WEL => RegsL.OUTPUTSELECT
5340 
WEL => RegsL.OUTPUTSELECT
5341 
WEL => RegsL.OUTPUTSELECT
5342 
WEL => RegsL.OUTPUTSELECT
5343 
WEL => RegsL.OUTPUTSELECT
5344 
WEL => RegsL.OUTPUTSELECT
5345 
WEL => RegsL.OUTPUTSELECT
5346 
WEL => RegsL.OUTPUTSELECT
5347 
WEL => RegsL.OUTPUTSELECT
5348 
WEL => RegsL.OUTPUTSELECT
5349 
WEL => RegsL.OUTPUTSELECT
5350 
WEL => RegsL.OUTPUTSELECT
5351 
WEL => RegsL.OUTPUTSELECT
5352 
WEL => RegsL.OUTPUTSELECT
5353 
WEL => RegsL.OUTPUTSELECT
5354 
WEL => RegsL.OUTPUTSELECT
5355 
WEL => RegsL.OUTPUTSELECT
5356 
WEL => RegsL.OUTPUTSELECT
5357 
WEL => RegsL.OUTPUTSELECT
5358 
WEL => RegsL.OUTPUTSELECT
5359 
WEL => RegsL.OUTPUTSELECT
5360 
WEL => RegsL.OUTPUTSELECT
5361 
WEL => RegsL.OUTPUTSELECT
5362 
WEL => RegsL.OUTPUTSELECT
5363 
WEL => RegsL.OUTPUTSELECT
5364 
WEL => RegsL.OUTPUTSELECT
5365 
WEL => RegsL.OUTPUTSELECT
5366 
WEL => RegsL.OUTPUTSELECT
5367 
AddrA[0] => Decoder0.IN2
5368 
AddrA[0] => Mux0.IN2
5369 
AddrA[0] => Mux1.IN2
5370 
AddrA[0] => Mux2.IN2
5371 
AddrA[0] => Mux3.IN2
5372 
AddrA[0] => Mux4.IN2
5373 
AddrA[0] => Mux5.IN2
5374 
AddrA[0] => Mux6.IN2
5375 
AddrA[0] => Mux7.IN2
5376 
AddrA[0] => Mux8.IN2
5377 
AddrA[0] => Mux9.IN2
5378 
AddrA[0] => Mux10.IN2
5379 
AddrA[0] => Mux11.IN2
5380 
AddrA[0] => Mux12.IN2
5381 
AddrA[0] => Mux13.IN2
5382 
AddrA[0] => Mux14.IN2
5383 
AddrA[0] => Mux15.IN2
5384 
AddrA[1] => Decoder0.IN1
5385 
AddrA[1] => Mux0.IN1
5386 
AddrA[1] => Mux1.IN1
5387 
AddrA[1] => Mux2.IN1
5388 
AddrA[1] => Mux3.IN1
5389 
AddrA[1] => Mux4.IN1
5390 
AddrA[1] => Mux5.IN1
5391 
AddrA[1] => Mux6.IN1
5392 
AddrA[1] => Mux7.IN1
5393 
AddrA[1] => Mux8.IN1
5394 
AddrA[1] => Mux9.IN1
5395 
AddrA[1] => Mux10.IN1
5396 
AddrA[1] => Mux11.IN1
5397 
AddrA[1] => Mux12.IN1
5398 
AddrA[1] => Mux13.IN1
5399 
AddrA[1] => Mux14.IN1
5400 
AddrA[1] => Mux15.IN1
5401 
AddrA[2] => Decoder0.IN0
5402 
AddrA[2] => Mux0.IN0
5403 
AddrA[2] => Mux1.IN0
5404 
AddrA[2] => Mux2.IN0
5405 
AddrA[2] => Mux3.IN0
5406 
AddrA[2] => Mux4.IN0
5407 
AddrA[2] => Mux5.IN0
5408 
AddrA[2] => Mux6.IN0
5409 
AddrA[2] => Mux7.IN0
5410 
AddrA[2] => Mux8.IN0
5411 
AddrA[2] => Mux9.IN0
5412 
AddrA[2] => Mux10.IN0
5413 
AddrA[2] => Mux11.IN0
5414 
AddrA[2] => Mux12.IN0
5415 
AddrA[2] => Mux13.IN0
5416 
AddrA[2] => Mux14.IN0
5417 
AddrA[2] => Mux15.IN0
5418 
AddrB[0] => Mux16.IN2
5419 
AddrB[0] => Mux17.IN2
5420 
AddrB[0] => Mux18.IN2
5421 
AddrB[0] => Mux19.IN2
5422 
AddrB[0] => Mux20.IN2
5423 
AddrB[0] => Mux21.IN2
5424 
AddrB[0] => Mux22.IN2
5425 
AddrB[0] => Mux23.IN2
5426 
AddrB[0] => Mux24.IN2
5427 
AddrB[0] => Mux25.IN2
5428 
AddrB[0] => Mux26.IN2
5429 
AddrB[0] => Mux27.IN2
5430 
AddrB[0] => Mux28.IN2
5431 
AddrB[0] => Mux29.IN2
5432 
AddrB[0] => Mux30.IN2
5433 
AddrB[0] => Mux31.IN2
5434 
AddrB[1] => Mux16.IN1
5435 
AddrB[1] => Mux17.IN1
5436 
AddrB[1] => Mux18.IN1
5437 
AddrB[1] => Mux19.IN1
5438 
AddrB[1] => Mux20.IN1
5439 
AddrB[1] => Mux21.IN1
5440 
AddrB[1] => Mux22.IN1
5441 
AddrB[1] => Mux23.IN1
5442 
AddrB[1] => Mux24.IN1
5443 
AddrB[1] => Mux25.IN1
5444 
AddrB[1] => Mux26.IN1
5445 
AddrB[1] => Mux27.IN1
5446 
AddrB[1] => Mux28.IN1
5447 
AddrB[1] => Mux29.IN1
5448 
AddrB[1] => Mux30.IN1
5449 
AddrB[1] => Mux31.IN1
5450 
AddrB[2] => Mux16.IN0
5451 
AddrB[2] => Mux17.IN0
5452 
AddrB[2] => Mux18.IN0
5453 
AddrB[2] => Mux19.IN0
5454 
AddrB[2] => Mux20.IN0
5455 
AddrB[2] => Mux21.IN0
5456 
AddrB[2] => Mux22.IN0
5457 
AddrB[2] => Mux23.IN0
5458 
AddrB[2] => Mux24.IN0
5459 
AddrB[2] => Mux25.IN0
5460 
AddrB[2] => Mux26.IN0
5461 
AddrB[2] => Mux27.IN0
5462 
AddrB[2] => Mux28.IN0
5463 
AddrB[2] => Mux29.IN0
5464 
AddrB[2] => Mux30.IN0
5465 
AddrB[2] => Mux31.IN0
5466 
AddrC[0] => Mux32.IN2
5467 
AddrC[0] => Mux33.IN2
5468 
AddrC[0] => Mux34.IN2
5469 
AddrC[0] => Mux35.IN2
5470 
AddrC[0] => Mux36.IN2
5471 
AddrC[0] => Mux37.IN2
5472 
AddrC[0] => Mux38.IN2
5473 
AddrC[0] => Mux39.IN2
5474 
AddrC[0] => Mux40.IN2
5475 
AddrC[0] => Mux41.IN2
5476 
AddrC[0] => Mux42.IN2
5477 
AddrC[0] => Mux43.IN2
5478 
AddrC[0] => Mux44.IN2
5479 
AddrC[0] => Mux45.IN2
5480 
AddrC[0] => Mux46.IN2
5481 
AddrC[0] => Mux47.IN2
5482 
AddrC[1] => Mux32.IN1
5483 
AddrC[1] => Mux33.IN1
5484 
AddrC[1] => Mux34.IN1
5485 
AddrC[1] => Mux35.IN1
5486 
AddrC[1] => Mux36.IN1
5487 
AddrC[1] => Mux37.IN1
5488 
AddrC[1] => Mux38.IN1
5489 
AddrC[1] => Mux39.IN1
5490 
AddrC[1] => Mux40.IN1
5491 
AddrC[1] => Mux41.IN1
5492 
AddrC[1] => Mux42.IN1
5493 
AddrC[1] => Mux43.IN1
5494 
AddrC[1] => Mux44.IN1
5495 
AddrC[1] => Mux45.IN1
5496 
AddrC[1] => Mux46.IN1
5497 
AddrC[1] => Mux47.IN1
5498 
AddrC[2] => Mux32.IN0
5499 
AddrC[2] => Mux33.IN0
5500 
AddrC[2] => Mux34.IN0
5501 
AddrC[2] => Mux35.IN0
5502 
AddrC[2] => Mux36.IN0
5503 
AddrC[2] => Mux37.IN0
5504 
AddrC[2] => Mux38.IN0
5505 
AddrC[2] => Mux39.IN0
5506 
AddrC[2] => Mux40.IN0
5507 
AddrC[2] => Mux41.IN0
5508 
AddrC[2] => Mux42.IN0
5509 
AddrC[2] => Mux43.IN0
5510 
AddrC[2] => Mux44.IN0
5511 
AddrC[2] => Mux45.IN0
5512 
AddrC[2] => Mux46.IN0
5513 
AddrC[2] => Mux47.IN0
5514 
DIH[0] => RegsH.DATAB
5515 
DIH[0] => RegsH.DATAB
5516 
DIH[0] => RegsH.DATAB
5517 
DIH[0] => RegsH.DATAB
5518 
DIH[0] => RegsH.DATAB
5519 
DIH[0] => RegsH.DATAB
5520 
DIH[0] => RegsH.DATAB
5521 
DIH[0] => RegsH.DATAB
5522 
DIH[1] => RegsH.DATAB
5523 
DIH[1] => RegsH.DATAB
5524 
DIH[1] => RegsH.DATAB
5525 
DIH[1] => RegsH.DATAB
5526 
DIH[1] => RegsH.DATAB
5527 
DIH[1] => RegsH.DATAB
5528 
DIH[1] => RegsH.DATAB
5529 
DIH[1] => RegsH.DATAB
5530 
DIH[2] => RegsH.DATAB
5531 
DIH[2] => RegsH.DATAB
5532 
DIH[2] => RegsH.DATAB
5533 
DIH[2] => RegsH.DATAB
5534 
DIH[2] => RegsH.DATAB
5535 
DIH[2] => RegsH.DATAB
5536 
DIH[2] => RegsH.DATAB
5537 
DIH[2] => RegsH.DATAB
5538 
DIH[3] => RegsH.DATAB
5539 
DIH[3] => RegsH.DATAB
5540 
DIH[3] => RegsH.DATAB
5541 
DIH[3] => RegsH.DATAB
5542 
DIH[3] => RegsH.DATAB
5543 
DIH[3] => RegsH.DATAB
5544 
DIH[3] => RegsH.DATAB
5545 
DIH[3] => RegsH.DATAB
5546 
DIH[4] => RegsH.DATAB
5547 
DIH[4] => RegsH.DATAB
5548 
DIH[4] => RegsH.DATAB
5549 
DIH[4] => RegsH.DATAB
5550 
DIH[4] => RegsH.DATAB
5551 
DIH[4] => RegsH.DATAB
5552 
DIH[4] => RegsH.DATAB
5553 
DIH[4] => RegsH.DATAB
5554 
DIH[5] => RegsH.DATAB
5555 
DIH[5] => RegsH.DATAB
5556 
DIH[5] => RegsH.DATAB
5557 
DIH[5] => RegsH.DATAB
5558 
DIH[5] => RegsH.DATAB
5559 
DIH[5] => RegsH.DATAB
5560 
DIH[5] => RegsH.DATAB
5561 
DIH[5] => RegsH.DATAB
5562 
DIH[6] => RegsH.DATAB
5563 
DIH[6] => RegsH.DATAB
5564 
DIH[6] => RegsH.DATAB
5565 
DIH[6] => RegsH.DATAB
5566 
DIH[6] => RegsH.DATAB
5567 
DIH[6] => RegsH.DATAB
5568 
DIH[6] => RegsH.DATAB
5569 
DIH[6] => RegsH.DATAB
5570 
DIH[7] => RegsH.DATAB
5571 
DIH[7] => RegsH.DATAB
5572 
DIH[7] => RegsH.DATAB
5573 
DIH[7] => RegsH.DATAB
5574 
DIH[7] => RegsH.DATAB
5575 
DIH[7] => RegsH.DATAB
5576 
DIH[7] => RegsH.DATAB
5577 
DIH[7] => RegsH.DATAB
5578 
DIL[0] => RegsL.DATAB
5579 
DIL[0] => RegsL.DATAB
5580 
DIL[0] => RegsL.DATAB
5581 
DIL[0] => RegsL.DATAB
5582 
DIL[0] => RegsL.DATAB
5583 
DIL[0] => RegsL.DATAB
5584 
DIL[0] => RegsL.DATAB
5585 
DIL[0] => RegsL.DATAB
5586 
DIL[1] => RegsL.DATAB
5587 
DIL[1] => RegsL.DATAB
5588 
DIL[1] => RegsL.DATAB
5589 
DIL[1] => RegsL.DATAB
5590 
DIL[1] => RegsL.DATAB
5591 
DIL[1] => RegsL.DATAB
5592 
DIL[1] => RegsL.DATAB
5593 
DIL[1] => RegsL.DATAB
5594 
DIL[2] => RegsL.DATAB
5595 
DIL[2] => RegsL.DATAB
5596 
DIL[2] => RegsL.DATAB
5597 
DIL[2] => RegsL.DATAB
5598 
DIL[2] => RegsL.DATAB
5599 
DIL[2] => RegsL.DATAB
5600 
DIL[2] => RegsL.DATAB
5601 
DIL[2] => RegsL.DATAB
5602 
DIL[3] => RegsL.DATAB
5603 
DIL[3] => RegsL.DATAB
5604 
DIL[3] => RegsL.DATAB
5605 
DIL[3] => RegsL.DATAB
5606 
DIL[3] => RegsL.DATAB
5607 
DIL[3] => RegsL.DATAB
5608 
DIL[3] => RegsL.DATAB
5609 
DIL[3] => RegsL.DATAB
5610 
DIL[4] => RegsL.DATAB
5611 
DIL[4] => RegsL.DATAB
5612 
DIL[4] => RegsL.DATAB
5613 
DIL[4] => RegsL.DATAB
5614 
DIL[4] => RegsL.DATAB
5615 
DIL[4] => RegsL.DATAB
5616 
DIL[4] => RegsL.DATAB
5617 
DIL[4] => RegsL.DATAB
5618 
DIL[5] => RegsL.DATAB
5619 
DIL[5] => RegsL.DATAB
5620 
DIL[5] => RegsL.DATAB
5621 
DIL[5] => RegsL.DATAB
5622 
DIL[5] => RegsL.DATAB
5623 
DIL[5] => RegsL.DATAB
5624 
DIL[5] => RegsL.DATAB
5625 
DIL[5] => RegsL.DATAB
5626 
DIL[6] => RegsL.DATAB
5627 
DIL[6] => RegsL.DATAB
5628 
DIL[6] => RegsL.DATAB
5629 
DIL[6] => RegsL.DATAB
5630 
DIL[6] => RegsL.DATAB
5631 
DIL[6] => RegsL.DATAB
5632 
DIL[6] => RegsL.DATAB
5633 
DIL[6] => RegsL.DATAB
5634 
DIL[7] => RegsL.DATAB
5635 
DIL[7] => RegsL.DATAB
5636 
DIL[7] => RegsL.DATAB
5637 
DIL[7] => RegsL.DATAB
5638 
DIL[7] => RegsL.DATAB
5639 
DIL[7] => RegsL.DATAB
5640 
DIL[7] => RegsL.DATAB
5641 
DIL[7] => RegsL.DATAB
5642 
DOAH[0] <= Mux7.DB_MAX_OUTPUT_PORT_TYPE
5643 
DOAH[1] <= Mux6.DB_MAX_OUTPUT_PORT_TYPE
5644 
DOAH[2] <= Mux5.DB_MAX_OUTPUT_PORT_TYPE
5645 
DOAH[3] <= Mux4.DB_MAX_OUTPUT_PORT_TYPE
5646 
DOAH[4] <= Mux3.DB_MAX_OUTPUT_PORT_TYPE
5647 
DOAH[5] <= Mux2.DB_MAX_OUTPUT_PORT_TYPE
5648 
DOAH[6] <= Mux1.DB_MAX_OUTPUT_PORT_TYPE
5649 
DOAH[7] <= Mux0.DB_MAX_OUTPUT_PORT_TYPE
5650 
DOAL[0] <= Mux15.DB_MAX_OUTPUT_PORT_TYPE
5651 
DOAL[1] <= Mux14.DB_MAX_OUTPUT_PORT_TYPE
5652 
DOAL[2] <= Mux13.DB_MAX_OUTPUT_PORT_TYPE
5653 
DOAL[3] <= Mux12.DB_MAX_OUTPUT_PORT_TYPE
5654 
DOAL[4] <= Mux11.DB_MAX_OUTPUT_PORT_TYPE
5655 
DOAL[5] <= Mux10.DB_MAX_OUTPUT_PORT_TYPE
5656 
DOAL[6] <= Mux9.DB_MAX_OUTPUT_PORT_TYPE
5657 
DOAL[7] <= Mux8.DB_MAX_OUTPUT_PORT_TYPE
5658 
DOBH[0] <= Mux23.DB_MAX_OUTPUT_PORT_TYPE
5659 
DOBH[1] <= Mux22.DB_MAX_OUTPUT_PORT_TYPE
5660 
DOBH[2] <= Mux21.DB_MAX_OUTPUT_PORT_TYPE
5661 
DOBH[3] <= Mux20.DB_MAX_OUTPUT_PORT_TYPE
5662 
DOBH[4] <= Mux19.DB_MAX_OUTPUT_PORT_TYPE
5663 
DOBH[5] <= Mux18.DB_MAX_OUTPUT_PORT_TYPE
5664 
DOBH[6] <= Mux17.DB_MAX_OUTPUT_PORT_TYPE
5665 
DOBH[7] <= Mux16.DB_MAX_OUTPUT_PORT_TYPE
5666 
DOBL[0] <= Mux31.DB_MAX_OUTPUT_PORT_TYPE
5667 
DOBL[1] <= Mux30.DB_MAX_OUTPUT_PORT_TYPE
5668 
DOBL[2] <= Mux29.DB_MAX_OUTPUT_PORT_TYPE
5669 
DOBL[3] <= Mux28.DB_MAX_OUTPUT_PORT_TYPE
5670 
DOBL[4] <= Mux27.DB_MAX_OUTPUT_PORT_TYPE
5671 
DOBL[5] <= Mux26.DB_MAX_OUTPUT_PORT_TYPE
5672 
DOBL[6] <= Mux25.DB_MAX_OUTPUT_PORT_TYPE
5673 
DOBL[7] <= Mux24.DB_MAX_OUTPUT_PORT_TYPE
5674 
DOCH[0] <= Mux39.DB_MAX_OUTPUT_PORT_TYPE
5675 
DOCH[1] <= Mux38.DB_MAX_OUTPUT_PORT_TYPE
5676 
DOCH[2] <= Mux37.DB_MAX_OUTPUT_PORT_TYPE
5677 
DOCH[3] <= Mux36.DB_MAX_OUTPUT_PORT_TYPE
5678 
DOCH[4] <= Mux35.DB_MAX_OUTPUT_PORT_TYPE
5679 
DOCH[5] <= Mux34.DB_MAX_OUTPUT_PORT_TYPE
5680 
DOCH[6] <= Mux33.DB_MAX_OUTPUT_PORT_TYPE
5681 
DOCH[7] <= Mux32.DB_MAX_OUTPUT_PORT_TYPE
5682 
DOCL[0] <= Mux47.DB_MAX_OUTPUT_PORT_TYPE
5683 
DOCL[1] <= Mux46.DB_MAX_OUTPUT_PORT_TYPE
5684 
DOCL[2] <= Mux45.DB_MAX_OUTPUT_PORT_TYPE
5685 
DOCL[3] <= Mux44.DB_MAX_OUTPUT_PORT_TYPE
5686 
DOCL[4] <= Mux43.DB_MAX_OUTPUT_PORT_TYPE
5687 
DOCL[5] <= Mux42.DB_MAX_OUTPUT_PORT_TYPE
5688 
DOCL[6] <= Mux41.DB_MAX_OUTPUT_PORT_TYPE
5689 
DOCL[7] <= Mux40.DB_MAX_OUTPUT_PORT_TYPE
5690 
 
5691 
 
5692 
|z80soc|video:video_inst
5693 
CLOCK_25 => VGA_SYNC:vga_sync_inst.clock_25Mhz
5694 
VRAM_DATA[0] => CRAM_ADDR[3].DATAIN
5695 
VRAM_DATA[1] => CRAM_ADDR[4].DATAIN
5696 
VRAM_DATA[2] => CRAM_ADDR[5].DATAIN
5697 
VRAM_DATA[3] => CRAM_ADDR[6].DATAIN
5698 
VRAM_DATA[4] => CRAM_ADDR[7].DATAIN
5699 
VRAM_DATA[5] => CRAM_ADDR[8].DATAIN
5700 
VRAM_DATA[6] => CRAM_ADDR[9].DATAIN
5701 
VRAM_DATA[7] => CRAM_ADDR[10].DATAIN
5702 
VRAM_ADDR[0] <= VGA_SYNC:vga_sync_inst.pixel_column[3]
5703 
VRAM_ADDR[1] <= VGA_SYNC:vga_sync_inst.pixel_column[4]
5704 
VRAM_ADDR[2] <= VGA_SYNC:vga_sync_inst.pixel_column[5]
5705 
VRAM_ADDR[3] <= VGA_SYNC:vga_sync_inst.pixel_column[6]
5706 
VRAM_ADDR[4] <= Add1.DB_MAX_OUTPUT_PORT_TYPE
5707 
VRAM_ADDR[5] <= Add1.DB_MAX_OUTPUT_PORT_TYPE
5708 
VRAM_ADDR[6] <= Add1.DB_MAX_OUTPUT_PORT_TYPE
5709 
VRAM_ADDR[7] <= Add1.DB_MAX_OUTPUT_PORT_TYPE
5710 
VRAM_ADDR[8] <= Add1.DB_MAX_OUTPUT_PORT_TYPE
5711 
VRAM_ADDR[9] <= Add1.DB_MAX_OUTPUT_PORT_TYPE
5712 
VRAM_ADDR[10] <= Add1.DB_MAX_OUTPUT_PORT_TYPE
5713 
VRAM_ADDR[11] <= Add1.DB_MAX_OUTPUT_PORT_TYPE
5714 
VRAM_ADDR[12] <= Add1.DB_MAX_OUTPUT_PORT_TYPE
5715 
VRAM_ADDR[13] <= Add1.DB_MAX_OUTPUT_PORT_TYPE
5716 
VRAM_CLOCK <= VGA_SYNC:vga_sync_inst.pixel_clock
5717 
VRAM_WREN <=
5718 
CRAM_DATA[0] => Mux0.IN3
5719 
CRAM_DATA[1] => Mux0.IN4
5720 
CRAM_DATA[2] => Mux0.IN5
5721 
CRAM_DATA[3] => Mux0.IN6
5722 
CRAM_DATA[4] => Mux0.IN7
5723 
CRAM_DATA[5] => Mux0.IN8
5724 
CRAM_DATA[6] => Mux0.IN9
5725 
CRAM_DATA[7] => Mux0.IN10
5726 
CRAM_ADDR[0] <= VGA_SYNC:vga_sync_inst.pixel_row[0]
5727 
CRAM_ADDR[1] <= VGA_SYNC:vga_sync_inst.pixel_row[1]
5728 
CRAM_ADDR[2] <= VGA_SYNC:vga_sync_inst.pixel_row[2]
5729 
CRAM_ADDR[3] <= VRAM_DATA[0].DB_MAX_OUTPUT_PORT_TYPE
5730 
CRAM_ADDR[4] <= VRAM_DATA[1].DB_MAX_OUTPUT_PORT_TYPE
5731 
CRAM_ADDR[5] <= VRAM_DATA[2].DB_MAX_OUTPUT_PORT_TYPE
5732 
CRAM_ADDR[6] <= VRAM_DATA[3].DB_MAX_OUTPUT_PORT_TYPE
5733 
CRAM_ADDR[7] <= VRAM_DATA[4].DB_MAX_OUTPUT_PORT_TYPE
5734 
CRAM_ADDR[8] <= VRAM_DATA[5].DB_MAX_OUTPUT_PORT_TYPE
5735 
CRAM_ADDR[9] <= VRAM_DATA[6].DB_MAX_OUTPUT_PORT_TYPE
5736 
CRAM_ADDR[10] <= VRAM_DATA[7].DB_MAX_OUTPUT_PORT_TYPE
5737 
CRAM_WEB <=
5738 
VGA_R[0] <= VGA_SYNC:vga_sync_inst.red_out[0]
5739 
VGA_R[1] <= VGA_SYNC:vga_sync_inst.red_out[1]
5740 
VGA_R[2] <= VGA_SYNC:vga_sync_inst.red_out[2]
5741 
VGA_R[3] <= VGA_SYNC:vga_sync_inst.red_out[3]
5742 
VGA_G[0] <= VGA_SYNC:vga_sync_inst.green_out[0]
5743 
VGA_G[1] <= VGA_SYNC:vga_sync_inst.green_out[1]
5744 
VGA_G[2] <= VGA_SYNC:vga_sync_inst.green_out[2]
5745 
VGA_G[3] <= VGA_SYNC:vga_sync_inst.green_out[3]
5746 
VGA_B[0] <= VGA_SYNC:vga_sync_inst.blue_out[0]
5747 
VGA_B[1] <= VGA_SYNC:vga_sync_inst.blue_out[1]
5748 
VGA_B[2] <= VGA_SYNC:vga_sync_inst.blue_out[2]
5749 
VGA_B[3] <= VGA_SYNC:vga_sync_inst.blue_out[3]
5750 
VGA_HS <= VGA_SYNC:vga_sync_inst.horiz_sync_out
5751 
VGA_VS <= VGA_SYNC:vga_sync_inst.vert_sync_out
5752 
 
5753 
 
5754 
|z80soc|video:video_inst|VGA_SYNC:vga_sync_inst
5755 
clock_25Mhz => blue_out[0]~reg0.CLK
5756 
clock_25Mhz => blue_out[1]~reg0.CLK
5757 
clock_25Mhz => blue_out[2]~reg0.CLK
5758 
clock_25Mhz => blue_out[3]~reg0.CLK
5759 
clock_25Mhz => green_out[0]~reg0.CLK
5760 
clock_25Mhz => green_out[1]~reg0.CLK
5761 
clock_25Mhz => green_out[2]~reg0.CLK
5762 
clock_25Mhz => green_out[3]~reg0.CLK
5763 
clock_25Mhz => red_out[0]~reg0.CLK
5764 
clock_25Mhz => red_out[1]~reg0.CLK
5765 
clock_25Mhz => red_out[2]~reg0.CLK
5766 
clock_25Mhz => red_out[3]~reg0.CLK
5767 
clock_25Mhz => vert_sync_out~reg0.CLK
5768 
clock_25Mhz => horiz_sync_out~reg0.CLK
5769 
clock_25Mhz => pixel_row[0]~reg0.CLK
5770 
clock_25Mhz => pixel_row[1]~reg0.CLK
5771 
clock_25Mhz => pixel_row[2]~reg0.CLK
5772 
clock_25Mhz => pixel_row[3]~reg0.CLK
5773 
clock_25Mhz => pixel_row[4]~reg0.CLK
5774 
clock_25Mhz => pixel_row[5]~reg0.CLK
5775 
clock_25Mhz => pixel_row[6]~reg0.CLK
5776 
clock_25Mhz => pixel_row[7]~reg0.CLK
5777 
clock_25Mhz => pixel_row[8]~reg0.CLK
5778 
clock_25Mhz => pixel_row[9]~reg0.CLK
5779 
clock_25Mhz => video_on_v.CLK
5780 
clock_25Mhz => pixel_column[0]~reg0.CLK
5781 
clock_25Mhz => pixel_column[1]~reg0.CLK
5782 
clock_25Mhz => pixel_column[2]~reg0.CLK
5783 
clock_25Mhz => pixel_column[3]~reg0.CLK
5784 
clock_25Mhz => pixel_column[4]~reg0.CLK
5785 
clock_25Mhz => pixel_column[5]~reg0.CLK
5786 
clock_25Mhz => pixel_column[6]~reg0.CLK
5787 
clock_25Mhz => pixel_column[7]~reg0.CLK
5788 
clock_25Mhz => pixel_column[8]~reg0.CLK
5789 
clock_25Mhz => pixel_column[9]~reg0.CLK
5790 
clock_25Mhz => video_on_h.CLK
5791 
clock_25Mhz => vert_sync.CLK
5792 
clock_25Mhz => v_count[0].CLK
5793 
clock_25Mhz => v_count[1].CLK
5794 
clock_25Mhz => v_count[2].CLK
5795 
clock_25Mhz => v_count[3].CLK
5796 
clock_25Mhz => v_count[4].CLK
5797 
clock_25Mhz => v_count[5].CLK
5798 
clock_25Mhz => v_count[6].CLK
5799 
clock_25Mhz => v_count[7].CLK
5800 
clock_25Mhz => v_count[8].CLK
5801 
clock_25Mhz => v_count[9].CLK
5802 
clock_25Mhz => horiz_sync.CLK
5803 
clock_25Mhz => h_count[0].CLK
5804 
clock_25Mhz => h_count[1].CLK
5805 
clock_25Mhz => h_count[2].CLK
5806 
clock_25Mhz => h_count[3].CLK
5807 
clock_25Mhz => h_count[4].CLK
5808 
clock_25Mhz => h_count[5].CLK
5809 
clock_25Mhz => h_count[6].CLK
5810 
clock_25Mhz => h_count[7].CLK
5811 
clock_25Mhz => h_count[8].CLK
5812 
clock_25Mhz => h_count[9].CLK
5813 
clock_25Mhz => pixel_clock.DATAIN
5814 
red[0] => red_out.IN1
5815 
red[1] => red_out.IN1
5816 
red[2] => red_out.IN1
5817 
red[3] => red_out.IN1
5818 
green[0] => green_out.IN1
5819 
green[1] => green_out.IN1
5820 
green[2] => green_out.IN1
5821 
green[3] => green_out.IN1
5822 
blue[0] => blue_out.IN1
5823 
blue[1] => blue_out.IN1
5824 
blue[2] => blue_out.IN1
5825 
blue[3] => blue_out.IN1
5826 
red_out[0] <= red_out[0]~reg0.DB_MAX_OUTPUT_PORT_TYPE
5827 
red_out[1] <= red_out[1]~reg0.DB_MAX_OUTPUT_PORT_TYPE
5828 
red_out[2] <= red_out[2]~reg0.DB_MAX_OUTPUT_PORT_TYPE
5829 
red_out[3] <= red_out[3]~reg0.DB_MAX_OUTPUT_PORT_TYPE
5830 
green_out[0] <= green_out[0]~reg0.DB_MAX_OUTPUT_PORT_TYPE
5831 
green_out[1] <= green_out[1]~reg0.DB_MAX_OUTPUT_PORT_TYPE
5832 
green_out[2] <= green_out[2]~reg0.DB_MAX_OUTPUT_PORT_TYPE
5833 
green_out[3] <= green_out[3]~reg0.DB_MAX_OUTPUT_PORT_TYPE
5834 
blue_out[0] <= blue_out[0]~reg0.DB_MAX_OUTPUT_PORT_TYPE
5835 
blue_out[1] <= blue_out[1]~reg0.DB_MAX_OUTPUT_PORT_TYPE
5836 
blue_out[2] <= blue_out[2]~reg0.DB_MAX_OUTPUT_PORT_TYPE
5837 
blue_out[3] <= blue_out[3]~reg0.DB_MAX_OUTPUT_PORT_TYPE
5838 
horiz_sync_out <= horiz_sync_out~reg0.DB_MAX_OUTPUT_PORT_TYPE
5839 
vert_sync_out <= vert_sync_out~reg0.DB_MAX_OUTPUT_PORT_TYPE
5840 
video_on <= video_on_int.DB_MAX_OUTPUT_PORT_TYPE
5841 
pixel_clock <= clock_25Mhz.DB_MAX_OUTPUT_PORT_TYPE
5842 
pixel_row[0] <= pixel_row[0]~reg0.DB_MAX_OUTPUT_PORT_TYPE
5843 
pixel_row[1] <= pixel_row[1]~reg0.DB_MAX_OUTPUT_PORT_TYPE
5844 
pixel_row[2] <= pixel_row[2]~reg0.DB_MAX_OUTPUT_PORT_TYPE
5845 
pixel_row[3] <= pixel_row[3]~reg0.DB_MAX_OUTPUT_PORT_TYPE
5846 
pixel_row[4] <= pixel_row[4]~reg0.DB_MAX_OUTPUT_PORT_TYPE
5847 
pixel_row[5] <= pixel_row[5]~reg0.DB_MAX_OUTPUT_PORT_TYPE
5848 
pixel_row[6] <= pixel_row[6]~reg0.DB_MAX_OUTPUT_PORT_TYPE
5849 
pixel_row[7] <= pixel_row[7]~reg0.DB_MAX_OUTPUT_PORT_TYPE
5850 
pixel_row[8] <= pixel_row[8]~reg0.DB_MAX_OUTPUT_PORT_TYPE
5851 
pixel_row[9] <= pixel_row[9]~reg0.DB_MAX_OUTPUT_PORT_TYPE
5852 
pixel_column[0] <= pixel_column[0]~reg0.DB_MAX_OUTPUT_PORT_TYPE
5853 
pixel_column[1] <= pixel_column[1]~reg0.DB_MAX_OUTPUT_PORT_TYPE
5854 
pixel_column[2] <= pixel_column[2]~reg0.DB_MAX_OUTPUT_PORT_TYPE
5855 
pixel_column[3] <= pixel_column[3]~reg0.DB_MAX_OUTPUT_PORT_TYPE
5856 
pixel_column[4] <= pixel_column[4]~reg0.DB_MAX_OUTPUT_PORT_TYPE
5857 
pixel_column[5] <= pixel_column[5]~reg0.DB_MAX_OUTPUT_PORT_TYPE
5858 
pixel_column[6] <= pixel_column[6]~reg0.DB_MAX_OUTPUT_PORT_TYPE
5859 
pixel_column[7] <= pixel_column[7]~reg0.DB_MAX_OUTPUT_PORT_TYPE
5860 
pixel_column[8] <= pixel_column[8]~reg0.DB_MAX_OUTPUT_PORT_TYPE
5861 
pixel_column[9] <= pixel_column[9]~reg0.DB_MAX_OUTPUT_PORT_TYPE
5862 
 
5863 
 
5864 
|z80soc|vram:vram_inst
5865 
data[0] => altsyncram:altsyncram_component.data_a[0]
5866 
data[1] => altsyncram:altsyncram_component.data_a[1]
5867 
data[2] => altsyncram:altsyncram_component.data_a[2]
5868 
data[3] => altsyncram:altsyncram_component.data_a[3]
5869 
data[4] => altsyncram:altsyncram_component.data_a[4]
5870 
data[5] => altsyncram:altsyncram_component.data_a[5]
5871 
data[6] => altsyncram:altsyncram_component.data_a[6]
5872 
data[7] => altsyncram:altsyncram_component.data_a[7]
5873 
rdaddress[0] => altsyncram:altsyncram_component.address_b[0]
5874 
rdaddress[1] => altsyncram:altsyncram_component.address_b[1]
5875 
rdaddress[2] => altsyncram:altsyncram_component.address_b[2]
5876 
rdaddress[3] => altsyncram:altsyncram_component.address_b[3]
5877 
rdaddress[4] => altsyncram:altsyncram_component.address_b[4]
5878 
rdaddress[5] => altsyncram:altsyncram_component.address_b[5]
5879 
rdaddress[6] => altsyncram:altsyncram_component.address_b[6]
5880 
rdaddress[7] => altsyncram:altsyncram_component.address_b[7]
5881 
rdaddress[8] => altsyncram:altsyncram_component.address_b[8]
5882 
rdaddress[9] => altsyncram:altsyncram_component.address_b[9]
5883 
rdaddress[10] => altsyncram:altsyncram_component.address_b[10]
5884 
rdaddress[11] => altsyncram:altsyncram_component.address_b[11]
5885 
rdaddress[12] => altsyncram:altsyncram_component.address_b[12]
5886 
rdclock => altsyncram:altsyncram_component.clock1
5887 
wraddress[0] => altsyncram:altsyncram_component.address_a[0]
5888 
wraddress[1] => altsyncram:altsyncram_component.address_a[1]
5889 
wraddress[2] => altsyncram:altsyncram_component.address_a[2]
5890 
wraddress[3] => altsyncram:altsyncram_component.address_a[3]
5891 
wraddress[4] => altsyncram:altsyncram_component.address_a[4]
5892 
wraddress[5] => altsyncram:altsyncram_component.address_a[5]
5893 
wraddress[6] => altsyncram:altsyncram_component.address_a[6]
5894 
wraddress[7] => altsyncram:altsyncram_component.address_a[7]
5895 
wraddress[8] => altsyncram:altsyncram_component.address_a[8]
5896 
wraddress[9] => altsyncram:altsyncram_component.address_a[9]
5897 
wraddress[10] => altsyncram:altsyncram_component.address_a[10]
5898 
wraddress[11] => altsyncram:altsyncram_component.address_a[11]
5899 
wraddress[12] => altsyncram:altsyncram_component.address_a[12]
5900 
wrclock => altsyncram:altsyncram_component.clock0
5901 
wren => altsyncram:altsyncram_component.wren_a
5902 
q[0] <= altsyncram:altsyncram_component.q_b[0]
5903 
q[1] <= altsyncram:altsyncram_component.q_b[1]
5904 
q[2] <= altsyncram:altsyncram_component.q_b[2]
5905 
q[3] <= altsyncram:altsyncram_component.q_b[3]
5906 
q[4] <= altsyncram:altsyncram_component.q_b[4]
5907 
q[5] <= altsyncram:altsyncram_component.q_b[5]
5908 
q[6] <= altsyncram:altsyncram_component.q_b[6]
5909 
q[7] <= altsyncram:altsyncram_component.q_b[7]
5910 
 
5911 
 
5912 
|z80soc|vram:vram_inst|altsyncram:altsyncram_component
5913 
wren_a => altsyncram_66l1:auto_generated.wren_a
5914 
rden_a => ~NO_FANOUT~
5915 
wren_b => ~NO_FANOUT~
5916 
rden_b => ~NO_FANOUT~
5917 
data_a[0] => altsyncram_66l1:auto_generated.data_a[0]
5918 
data_a[1] => altsyncram_66l1:auto_generated.data_a[1]
5919 
data_a[2] => altsyncram_66l1:auto_generated.data_a[2]
5920 
data_a[3] => altsyncram_66l1:auto_generated.data_a[3]
5921 
data_a[4] => altsyncram_66l1:auto_generated.data_a[4]
5922 
data_a[5] => altsyncram_66l1:auto_generated.data_a[5]
5923 
data_a[6] => altsyncram_66l1:auto_generated.data_a[6]
5924 
data_a[7] => altsyncram_66l1:auto_generated.data_a[7]
5925 
data_b[0] => ~NO_FANOUT~
5926 
data_b[1] => ~NO_FANOUT~
5927 
data_b[2] => ~NO_FANOUT~
5928 
data_b[3] => ~NO_FANOUT~
5929 
data_b[4] => ~NO_FANOUT~
5930 
data_b[5] => ~NO_FANOUT~
5931 
data_b[6] => ~NO_FANOUT~
5932 
data_b[7] => ~NO_FANOUT~
5933 
address_a[0] => altsyncram_66l1:auto_generated.address_a[0]
5934 
address_a[1] => altsyncram_66l1:auto_generated.address_a[1]
5935 
address_a[2] => altsyncram_66l1:auto_generated.address_a[2]
5936 
address_a[3] => altsyncram_66l1:auto_generated.address_a[3]
5937 
address_a[4] => altsyncram_66l1:auto_generated.address_a[4]
5938 
address_a[5] => altsyncram_66l1:auto_generated.address_a[5]
5939 
address_a[6] => altsyncram_66l1:auto_generated.address_a[6]
5940 
address_a[7] => altsyncram_66l1:auto_generated.address_a[7]
5941 
address_a[8] => altsyncram_66l1:auto_generated.address_a[8]
5942 
address_a[9] => altsyncram_66l1:auto_generated.address_a[9]
5943 
address_a[10] => altsyncram_66l1:auto_generated.address_a[10]
5944 
address_a[11] => altsyncram_66l1:auto_generated.address_a[11]
5945 
address_a[12] => altsyncram_66l1:auto_generated.address_a[12]
5946 
address_b[0] => altsyncram_66l1:auto_generated.address_b[0]
5947 
address_b[1] => altsyncram_66l1:auto_generated.address_b[1]
5948 
address_b[2] => altsyncram_66l1:auto_generated.address_b[2]
5949 
address_b[3] => altsyncram_66l1:auto_generated.address_b[3]
5950 
address_b[4] => altsyncram_66l1:auto_generated.address_b[4]
5951 
address_b[5] => altsyncram_66l1:auto_generated.address_b[5]
5952 
address_b[6] => altsyncram_66l1:auto_generated.address_b[6]
5953 
address_b[7] => altsyncram_66l1:auto_generated.address_b[7]
5954 
address_b[8] => altsyncram_66l1:auto_generated.address_b[8]
5955 
address_b[9] => altsyncram_66l1:auto_generated.address_b[9]
5956 
address_b[10] => altsyncram_66l1:auto_generated.address_b[10]
5957 
address_b[11] => altsyncram_66l1:auto_generated.address_b[11]
5958 
address_b[12] => altsyncram_66l1:auto_generated.address_b[12]
5959 
addressstall_a => ~NO_FANOUT~
5960 
addressstall_b => ~NO_FANOUT~
5961 
clock0 => altsyncram_66l1:auto_generated.clock0
5962 
clock1 => altsyncram_66l1:auto_generated.clock1
5963 
clocken0 => ~NO_FANOUT~
5964 
clocken1 => ~NO_FANOUT~
5965 
clocken2 => ~NO_FANOUT~
5966 
clocken3 => ~NO_FANOUT~
5967 
aclr0 => ~NO_FANOUT~
5968 
aclr1 => ~NO_FANOUT~
5969 
byteena_a[0] => ~NO_FANOUT~
5970 
byteena_b[0] => ~NO_FANOUT~
5971 
q_a[0] <=
5972 
q_a[1] <=
5973 
q_a[2] <=
5974 
q_a[3] <=
5975 
q_a[4] <=
5976 
q_a[5] <=
5977 
q_a[6] <=
5978 
q_a[7] <=
5979 
q_b[0] <= altsyncram_66l1:auto_generated.q_b[0]
5980 
q_b[1] <= altsyncram_66l1:auto_generated.q_b[1]
5981 
q_b[2] <= altsyncram_66l1:auto_generated.q_b[2]
5982 
q_b[3] <= altsyncram_66l1:auto_generated.q_b[3]
5983 
q_b[4] <= altsyncram_66l1:auto_generated.q_b[4]
5984 
q_b[5] <= altsyncram_66l1:auto_generated.q_b[5]
5985 
q_b[6] <= altsyncram_66l1:auto_generated.q_b[6]
5986 
q_b[7] <= altsyncram_66l1:auto_generated.q_b[7]
5987 
eccstatus[0] <=
5988 
eccstatus[1] <=
5989 
eccstatus[2] <=
5990 
 
5991 
 
5992 
|z80soc|vram:vram_inst|altsyncram:altsyncram_component|altsyncram_66l1:auto_generated
5993 
address_a[0] => altsyncram_pal1:altsyncram1.address_b[0]
5994 
address_a[1] => altsyncram_pal1:altsyncram1.address_b[1]
5995 
address_a[2] => altsyncram_pal1:altsyncram1.address_b[2]
5996 
address_a[3] => altsyncram_pal1:altsyncram1.address_b[3]
5997 
address_a[4] => altsyncram_pal1:altsyncram1.address_b[4]
5998 
address_a[5] => altsyncram_pal1:altsyncram1.address_b[5]
5999 
address_a[6] => altsyncram_pal1:altsyncram1.address_b[6]
6000 
address_a[7] => altsyncram_pal1:altsyncram1.address_b[7]
6001 
address_a[8] => altsyncram_pal1:altsyncram1.address_b[8]
6002 
address_a[9] => altsyncram_pal1:altsyncram1.address_b[9]
6003 
address_a[10] => altsyncram_pal1:altsyncram1.address_b[10]
6004 
address_a[11] => altsyncram_pal1:altsyncram1.address_b[11]
6005 
address_a[12] => altsyncram_pal1:altsyncram1.address_b[12]
6006 
address_b[0] => altsyncram_pal1:altsyncram1.address_a[0]
6007 
address_b[1] => altsyncram_pal1:altsyncram1.address_a[1]
6008 
address_b[2] => altsyncram_pal1:altsyncram1.address_a[2]
6009 
address_b[3] => altsyncram_pal1:altsyncram1.address_a[3]
6010 
address_b[4] => altsyncram_pal1:altsyncram1.address_a[4]
6011 
address_b[5] => altsyncram_pal1:altsyncram1.address_a[5]
6012 
address_b[6] => altsyncram_pal1:altsyncram1.address_a[6]
6013 
address_b[7] => altsyncram_pal1:altsyncram1.address_a[7]
6014 
address_b[8] => altsyncram_pal1:altsyncram1.address_a[8]
6015 
address_b[9] => altsyncram_pal1:altsyncram1.address_a[9]
6016 
address_b[10] => altsyncram_pal1:altsyncram1.address_a[10]
6017 
address_b[11] => altsyncram_pal1:altsyncram1.address_a[11]
6018 
address_b[12] => altsyncram_pal1:altsyncram1.address_a[12]
6019 
clock0 => altsyncram_pal1:altsyncram1.clock1
6020 
clock1 => altsyncram_pal1:altsyncram1.clock0
6021 
data_a[0] => altsyncram_pal1:altsyncram1.data_b[0]
6022 
data_a[1] => altsyncram_pal1:altsyncram1.data_b[1]
6023 
data_a[2] => altsyncram_pal1:altsyncram1.data_b[2]
6024 
data_a[3] => altsyncram_pal1:altsyncram1.data_b[3]
6025 
data_a[4] => altsyncram_pal1:altsyncram1.data_b[4]
6026 
data_a[5] => altsyncram_pal1:altsyncram1.data_b[5]
6027 
data_a[6] => altsyncram_pal1:altsyncram1.data_b[6]
6028 
data_a[7] => altsyncram_pal1:altsyncram1.data_b[7]
6029 
q_b[0] <= altsyncram_pal1:altsyncram1.q_a[0]
6030 
q_b[1] <= altsyncram_pal1:altsyncram1.q_a[1]
6031 
q_b[2] <= altsyncram_pal1:altsyncram1.q_a[2]
6032 
q_b[3] <= altsyncram_pal1:altsyncram1.q_a[3]
6033 
q_b[4] <= altsyncram_pal1:altsyncram1.q_a[4]
6034 
q_b[5] <= altsyncram_pal1:altsyncram1.q_a[5]
6035 
q_b[6] <= altsyncram_pal1:altsyncram1.q_a[6]
6036 
q_b[7] <= altsyncram_pal1:altsyncram1.q_a[7]
6037 
wren_a => altsyncram_pal1:altsyncram1.clocken1
6038 
wren_a => altsyncram_pal1:altsyncram1.wren_b
6039 
 
6040 
 
6041 
|z80soc|vram:vram_inst|altsyncram:altsyncram_component|altsyncram_66l1:auto_generated|altsyncram_pal1:altsyncram1
6042 
address_a[0] => ram_block2a0.PORTAADDR
6043 
address_a[0] => ram_block2a1.PORTAADDR
6044 
address_a[0] => ram_block2a2.PORTAADDR
6045 
address_a[0] => ram_block2a3.PORTAADDR
6046 
address_a[0] => ram_block2a4.PORTAADDR
6047 
address_a[0] => ram_block2a5.PORTAADDR
6048 
address_a[0] => ram_block2a6.PORTAADDR
6049 
address_a[0] => ram_block2a7.PORTAADDR
6050 
address_a[0] => ram_block2a8.PORTAADDR
6051 
address_a[0] => ram_block2a9.PORTAADDR
6052 
address_a[0] => ram_block2a10.PORTAADDR
6053 
address_a[0] => ram_block2a11.PORTAADDR
6054 
address_a[0] => ram_block2a12.PORTAADDR
6055 
address_a[0] => ram_block2a13.PORTAADDR
6056 
address_a[0] => ram_block2a14.PORTAADDR
6057 
address_a[0] => ram_block2a15.PORTAADDR
6058 
address_a[1] => ram_block2a0.PORTAADDR1
6059 
address_a[1] => ram_block2a1.PORTAADDR1
6060 
address_a[1] => ram_block2a2.PORTAADDR1
6061 
address_a[1] => ram_block2a3.PORTAADDR1
6062 
address_a[1] => ram_block2a4.PORTAADDR1
6063 
address_a[1] => ram_block2a5.PORTAADDR1
6064 
address_a[1] => ram_block2a6.PORTAADDR1
6065 
address_a[1] => ram_block2a7.PORTAADDR1
6066 
address_a[1] => ram_block2a8.PORTAADDR1
6067 
address_a[1] => ram_block2a9.PORTAADDR1
6068 
address_a[1] => ram_block2a10.PORTAADDR1
6069 
address_a[1] => ram_block2a11.PORTAADDR1
6070 
address_a[1] => ram_block2a12.PORTAADDR1
6071 
address_a[1] => ram_block2a13.PORTAADDR1
6072 
address_a[1] => ram_block2a14.PORTAADDR1
6073 
address_a[1] => ram_block2a15.PORTAADDR1
6074 
address_a[2] => ram_block2a0.PORTAADDR2
6075 
address_a[2] => ram_block2a1.PORTAADDR2
6076 
address_a[2] => ram_block2a2.PORTAADDR2
6077 
address_a[2] => ram_block2a3.PORTAADDR2
6078 
address_a[2] => ram_block2a4.PORTAADDR2
6079 
address_a[2] => ram_block2a5.PORTAADDR2
6080 
address_a[2] => ram_block2a6.PORTAADDR2
6081 
address_a[2] => ram_block2a7.PORTAADDR2
6082 
address_a[2] => ram_block2a8.PORTAADDR2
6083 
address_a[2] => ram_block2a9.PORTAADDR2
6084 
address_a[2] => ram_block2a10.PORTAADDR2
6085 
address_a[2] => ram_block2a11.PORTAADDR2
6086 
address_a[2] => ram_block2a12.PORTAADDR2
6087 
address_a[2] => ram_block2a13.PORTAADDR2
6088 
address_a[2] => ram_block2a14.PORTAADDR2
6089 
address_a[2] => ram_block2a15.PORTAADDR2
6090 
address_a[3] => ram_block2a0.PORTAADDR3
6091 
address_a[3] => ram_block2a1.PORTAADDR3
6092 
address_a[3] => ram_block2a2.PORTAADDR3
6093 
address_a[3] => ram_block2a3.PORTAADDR3
6094 
address_a[3] => ram_block2a4.PORTAADDR3
6095 
address_a[3] => ram_block2a5.PORTAADDR3
6096 
address_a[3] => ram_block2a6.PORTAADDR3
6097 
address_a[3] => ram_block2a7.PORTAADDR3
6098 
address_a[3] => ram_block2a8.PORTAADDR3
6099 
address_a[3] => ram_block2a9.PORTAADDR3
6100 
address_a[3] => ram_block2a10.PORTAADDR3
6101 
address_a[3] => ram_block2a11.PORTAADDR3
6102 
address_a[3] => ram_block2a12.PORTAADDR3
6103 
address_a[3] => ram_block2a13.PORTAADDR3
6104 
address_a[3] => ram_block2a14.PORTAADDR3
6105 
address_a[3] => ram_block2a15.PORTAADDR3
6106 
address_a[4] => ram_block2a0.PORTAADDR4
6107 
address_a[4] => ram_block2a1.PORTAADDR4
6108 
address_a[4] => ram_block2a2.PORTAADDR4
6109 
address_a[4] => ram_block2a3.PORTAADDR4
6110 
address_a[4] => ram_block2a4.PORTAADDR4
6111 
address_a[4] => ram_block2a5.PORTAADDR4
6112 
address_a[4] => ram_block2a6.PORTAADDR4
6113 
address_a[4] => ram_block2a7.PORTAADDR4
6114 
address_a[4] => ram_block2a8.PORTAADDR4
6115 
address_a[4] => ram_block2a9.PORTAADDR4
6116 
address_a[4] => ram_block2a10.PORTAADDR4
6117 
address_a[4] => ram_block2a11.PORTAADDR4
6118 
address_a[4] => ram_block2a12.PORTAADDR4
6119 
address_a[4] => ram_block2a13.PORTAADDR4
6120 
address_a[4] => ram_block2a14.PORTAADDR4
6121 
address_a[4] => ram_block2a15.PORTAADDR4
6122 
address_a[5] => ram_block2a0.PORTAADDR5
6123 
address_a[5] => ram_block2a1.PORTAADDR5
6124 
address_a[5] => ram_block2a2.PORTAADDR5
6125 
address_a[5] => ram_block2a3.PORTAADDR5
6126 
address_a[5] => ram_block2a4.PORTAADDR5
6127 
address_a[5] => ram_block2a5.PORTAADDR5
6128 
address_a[5] => ram_block2a6.PORTAADDR5
6129 
address_a[5] => ram_block2a7.PORTAADDR5
6130 
address_a[5] => ram_block2a8.PORTAADDR5
6131 
address_a[5] => ram_block2a9.PORTAADDR5
6132 
address_a[5] => ram_block2a10.PORTAADDR5
6133 
address_a[5] => ram_block2a11.PORTAADDR5
6134 
address_a[5] => ram_block2a12.PORTAADDR5
6135 
address_a[5] => ram_block2a13.PORTAADDR5
6136 
address_a[5] => ram_block2a14.PORTAADDR5
6137 
address_a[5] => ram_block2a15.PORTAADDR5
6138 
address_a[6] => ram_block2a0.PORTAADDR6
6139 
address_a[6] => ram_block2a1.PORTAADDR6
6140 
address_a[6] => ram_block2a2.PORTAADDR6
6141 
address_a[6] => ram_block2a3.PORTAADDR6
6142 
address_a[6] => ram_block2a4.PORTAADDR6
6143 
address_a[6] => ram_block2a5.PORTAADDR6
6144 
address_a[6] => ram_block2a6.PORTAADDR6
6145 
address_a[6] => ram_block2a7.PORTAADDR6
6146 
address_a[6] => ram_block2a8.PORTAADDR6
6147 
address_a[6] => ram_block2a9.PORTAADDR6
6148 
address_a[6] => ram_block2a10.PORTAADDR6
6149 
address_a[6] => ram_block2a11.PORTAADDR6
6150 
address_a[6] => ram_block2a12.PORTAADDR6
6151 
address_a[6] => ram_block2a13.PORTAADDR6
6152 
address_a[6] => ram_block2a14.PORTAADDR6
6153 
address_a[6] => ram_block2a15.PORTAADDR6
6154 
address_a[7] => ram_block2a0.PORTAADDR7
6155 
address_a[7] => ram_block2a1.PORTAADDR7
6156 
address_a[7] => ram_block2a2.PORTAADDR7
6157 
address_a[7] => ram_block2a3.PORTAADDR7
6158 
address_a[7] => ram_block2a4.PORTAADDR7
6159 
address_a[7] => ram_block2a5.PORTAADDR7
6160 
address_a[7] => ram_block2a6.PORTAADDR7
6161 
address_a[7] => ram_block2a7.PORTAADDR7
6162 
address_a[7] => ram_block2a8.PORTAADDR7
6163 
address_a[7] => ram_block2a9.PORTAADDR7
6164 
address_a[7] => ram_block2a10.PORTAADDR7
6165 
address_a[7] => ram_block2a11.PORTAADDR7
6166 
address_a[7] => ram_block2a12.PORTAADDR7
6167 
address_a[7] => ram_block2a13.PORTAADDR7
6168 
address_a[7] => ram_block2a14.PORTAADDR7
6169 
address_a[7] => ram_block2a15.PORTAADDR7
6170 
address_a[8] => ram_block2a0.PORTAADDR8
6171 
address_a[8] => ram_block2a1.PORTAADDR8
6172 
address_a[8] => ram_block2a2.PORTAADDR8
6173 
address_a[8] => ram_block2a3.PORTAADDR8
6174 
address_a[8] => ram_block2a4.PORTAADDR8
6175 
address_a[8] => ram_block2a5.PORTAADDR8
6176 
address_a[8] => ram_block2a6.PORTAADDR8
6177 
address_a[8] => ram_block2a7.PORTAADDR8
6178 
address_a[8] => ram_block2a8.PORTAADDR8
6179 
address_a[8] => ram_block2a9.PORTAADDR8
6180 
address_a[8] => ram_block2a10.PORTAADDR8
6181 
address_a[8] => ram_block2a11.PORTAADDR8
6182 
address_a[8] => ram_block2a12.PORTAADDR8
6183 
address_a[8] => ram_block2a13.PORTAADDR8
6184 
address_a[8] => ram_block2a14.PORTAADDR8
6185 
address_a[8] => ram_block2a15.PORTAADDR8
6186 
address_a[9] => ram_block2a0.PORTAADDR9
6187 
address_a[9] => ram_block2a1.PORTAADDR9
6188 
address_a[9] => ram_block2a2.PORTAADDR9
6189 
address_a[9] => ram_block2a3.PORTAADDR9
6190 
address_a[9] => ram_block2a4.PORTAADDR9
6191 
address_a[9] => ram_block2a5.PORTAADDR9
6192 
address_a[9] => ram_block2a6.PORTAADDR9
6193 
address_a[9] => ram_block2a7.PORTAADDR9
6194 
address_a[9] => ram_block2a8.PORTAADDR9
6195 
address_a[9] => ram_block2a9.PORTAADDR9
6196 
address_a[9] => ram_block2a10.PORTAADDR9
6197 
address_a[9] => ram_block2a11.PORTAADDR9
6198 
address_a[9] => ram_block2a12.PORTAADDR9
6199 
address_a[9] => ram_block2a13.PORTAADDR9
6200 
address_a[9] => ram_block2a14.PORTAADDR9
6201 
address_a[9] => ram_block2a15.PORTAADDR9
6202 
address_a[10] => ram_block2a0.PORTAADDR10
6203 
address_a[10] => ram_block2a1.PORTAADDR10
6204 
address_a[10] => ram_block2a2.PORTAADDR10
6205 
address_a[10] => ram_block2a3.PORTAADDR10
6206 
address_a[10] => ram_block2a4.PORTAADDR10
6207 
address_a[10] => ram_block2a5.PORTAADDR10
6208 
address_a[10] => ram_block2a6.PORTAADDR10
6209 
address_a[10] => ram_block2a7.PORTAADDR10
6210 
address_a[10] => ram_block2a8.PORTAADDR10
6211 
address_a[10] => ram_block2a9.PORTAADDR10
6212 
address_a[10] => ram_block2a10.PORTAADDR10
6213 
address_a[10] => ram_block2a11.PORTAADDR10
6214 
address_a[10] => ram_block2a12.PORTAADDR10
6215 
address_a[10] => ram_block2a13.PORTAADDR10
6216 
address_a[10] => ram_block2a14.PORTAADDR10
6217 
address_a[10] => ram_block2a15.PORTAADDR10
6218 
address_a[11] => ram_block2a0.PORTAADDR11
6219 
address_a[11] => ram_block2a1.PORTAADDR11
6220 
address_a[11] => ram_block2a2.PORTAADDR11
6221 
address_a[11] => ram_block2a3.PORTAADDR11
6222 
address_a[11] => ram_block2a4.PORTAADDR11
6223 
address_a[11] => ram_block2a5.PORTAADDR11
6224 
address_a[11] => ram_block2a6.PORTAADDR11
6225 
address_a[11] => ram_block2a7.PORTAADDR11
6226 
address_a[12] => address_reg_a[0].DATAIN
6227 
address_a[12] => decode_1oa:decode3.data[0]
6228 
address_a[12] => decode_1oa:decode_a.data[0]
6229 
address_b[0] => ram_block2a0.PORTBADDR
6230 
address_b[0] => ram_block2a1.PORTBADDR
6231 
address_b[0] => ram_block2a2.PORTBADDR
6232 
address_b[0] => ram_block2a3.PORTBADDR
6233 
address_b[0] => ram_block2a4.PORTBADDR
6234 
address_b[0] => ram_block2a5.PORTBADDR
6235 
address_b[0] => ram_block2a6.PORTBADDR
6236 
address_b[0] => ram_block2a7.PORTBADDR
6237 
address_b[0] => ram_block2a8.PORTBADDR
6238 
address_b[0] => ram_block2a9.PORTBADDR
6239 
address_b[0] => ram_block2a10.PORTBADDR
6240 
address_b[0] => ram_block2a11.PORTBADDR
6241 
address_b[0] => ram_block2a12.PORTBADDR
6242 
address_b[0] => ram_block2a13.PORTBADDR
6243 
address_b[0] => ram_block2a14.PORTBADDR
6244 
address_b[0] => ram_block2a15.PORTBADDR
6245 
address_b[1] => ram_block2a0.PORTBADDR1
6246 
address_b[1] => ram_block2a1.PORTBADDR1
6247 
address_b[1] => ram_block2a2.PORTBADDR1
6248 
address_b[1] => ram_block2a3.PORTBADDR1
6249 
address_b[1] => ram_block2a4.PORTBADDR1
6250 
address_b[1] => ram_block2a5.PORTBADDR1
6251 
address_b[1] => ram_block2a6.PORTBADDR1
6252 
address_b[1] => ram_block2a7.PORTBADDR1
6253 
address_b[1] => ram_block2a8.PORTBADDR1
6254 
address_b[1] => ram_block2a9.PORTBADDR1
6255 
address_b[1] => ram_block2a10.PORTBADDR1
6256 
address_b[1] => ram_block2a11.PORTBADDR1
6257 
address_b[1] => ram_block2a12.PORTBADDR1
6258 
address_b[1] => ram_block2a13.PORTBADDR1
6259 
address_b[1] => ram_block2a14.PORTBADDR1
6260 
address_b[1] => ram_block2a15.PORTBADDR1
6261 
address_b[2] => ram_block2a0.PORTBADDR2
6262 
address_b[2] => ram_block2a1.PORTBADDR2
6263 
address_b[2] => ram_block2a2.PORTBADDR2
6264 
address_b[2] => ram_block2a3.PORTBADDR2
6265 
address_b[2] => ram_block2a4.PORTBADDR2
6266 
address_b[2] => ram_block2a5.PORTBADDR2
6267 
address_b[2] => ram_block2a6.PORTBADDR2
6268 
address_b[2] => ram_block2a7.PORTBADDR2
6269 
address_b[2] => ram_block2a8.PORTBADDR2
6270 
address_b[2] => ram_block2a9.PORTBADDR2
6271 
address_b[2] => ram_block2a10.PORTBADDR2
6272 
address_b[2] => ram_block2a11.PORTBADDR2
6273 
address_b[2] => ram_block2a12.PORTBADDR2
6274 
address_b[2] => ram_block2a13.PORTBADDR2
6275 
address_b[2] => ram_block2a14.PORTBADDR2
6276 
address_b[2] => ram_block2a15.PORTBADDR2
6277 
address_b[3] => ram_block2a0.PORTBADDR3
6278 
address_b[3] => ram_block2a1.PORTBADDR3
6279 
address_b[3] => ram_block2a2.PORTBADDR3
6280 
address_b[3] => ram_block2a3.PORTBADDR3
6281 
address_b[3] => ram_block2a4.PORTBADDR3
6282 
address_b[3] => ram_block2a5.PORTBADDR3
6283 
address_b[3] => ram_block2a6.PORTBADDR3
6284 
address_b[3] => ram_block2a7.PORTBADDR3
6285 
address_b[3] => ram_block2a8.PORTBADDR3
6286 
address_b[3] => ram_block2a9.PORTBADDR3
6287 
address_b[3] => ram_block2a10.PORTBADDR3
6288 
address_b[3] => ram_block2a11.PORTBADDR3
6289 
address_b[3] => ram_block2a12.PORTBADDR3
6290 
address_b[3] => ram_block2a13.PORTBADDR3
6291 
address_b[3] => ram_block2a14.PORTBADDR3
6292 
address_b[3] => ram_block2a15.PORTBADDR3
6293 
address_b[4] => ram_block2a0.PORTBADDR4
6294 
address_b[4] => ram_block2a1.PORTBADDR4
6295 
address_b[4] => ram_block2a2.PORTBADDR4
6296 
address_b[4] => ram_block2a3.PORTBADDR4
6297 
address_b[4] => ram_block2a4.PORTBADDR4
6298 
address_b[4] => ram_block2a5.PORTBADDR4
6299 
address_b[4] => ram_block2a6.PORTBADDR4
6300 
address_b[4] => ram_block2a7.PORTBADDR4
6301 
address_b[4] => ram_block2a8.PORTBADDR4
6302 
address_b[4] => ram_block2a9.PORTBADDR4
6303 
address_b[4] => ram_block2a10.PORTBADDR4
6304 
address_b[4] => ram_block2a11.PORTBADDR4
6305 
address_b[4] => ram_block2a12.PORTBADDR4
6306 
address_b[4] => ram_block2a13.PORTBADDR4
6307 
address_b[4] => ram_block2a14.PORTBADDR4
6308 
address_b[4] => ram_block2a15.PORTBADDR4
6309 
address_b[5] => ram_block2a0.PORTBADDR5
6310 
address_b[5] => ram_block2a1.PORTBADDR5
6311 
address_b[5] => ram_block2a2.PORTBADDR5
6312 
address_b[5] => ram_block2a3.PORTBADDR5
6313 
address_b[5] => ram_block2a4.PORTBADDR5
6314 
address_b[5] => ram_block2a5.PORTBADDR5
6315 
address_b[5] => ram_block2a6.PORTBADDR5
6316 
address_b[5] => ram_block2a7.PORTBADDR5
6317 
address_b[5] => ram_block2a8.PORTBADDR5
6318 
address_b[5] => ram_block2a9.PORTBADDR5
6319 
address_b[5] => ram_block2a10.PORTBADDR5
6320 
address_b[5] => ram_block2a11.PORTBADDR5
6321 
address_b[5] => ram_block2a12.PORTBADDR5
6322 
address_b[5] => ram_block2a13.PORTBADDR5
6323 
address_b[5] => ram_block2a14.PORTBADDR5
6324 
address_b[5] => ram_block2a15.PORTBADDR5
6325 
address_b[6] => ram_block2a0.PORTBADDR6
6326 
address_b[6] => ram_block2a1.PORTBADDR6
6327 
address_b[6] => ram_block2a2.PORTBADDR6
6328 
address_b[6] => ram_block2a3.PORTBADDR6
6329 
address_b[6] => ram_block2a4.PORTBADDR6
6330 
address_b[6] => ram_block2a5.PORTBADDR6
6331 
address_b[6] => ram_block2a6.PORTBADDR6
6332 
address_b[6] => ram_block2a7.PORTBADDR6
6333 
address_b[6] => ram_block2a8.PORTBADDR6
6334 
address_b[6] => ram_block2a9.PORTBADDR6
6335 
address_b[6] => ram_block2a10.PORTBADDR6
6336 
address_b[6] => ram_block2a11.PORTBADDR6
6337 
address_b[6] => ram_block2a12.PORTBADDR6
6338 
address_b[6] => ram_block2a13.PORTBADDR6
6339 
address_b[6] => ram_block2a14.PORTBADDR6
6340 
address_b[6] => ram_block2a15.PORTBADDR6
6341 
address_b[7] => ram_block2a0.PORTBADDR7
6342 
address_b[7] => ram_block2a1.PORTBADDR7
6343 
address_b[7] => ram_block2a2.PORTBADDR7
6344 
address_b[7] => ram_block2a3.PORTBADDR7
6345 
address_b[7] => ram_block2a4.PORTBADDR7
6346 
address_b[7] => ram_block2a5.PORTBADDR7
6347 
address_b[7] => ram_block2a6.PORTBADDR7
6348 
address_b[7] => ram_block2a7.PORTBADDR7
6349 
address_b[7] => ram_block2a8.PORTBADDR7
6350 
address_b[7] => ram_block2a9.PORTBADDR7
6351 
address_b[7] => ram_block2a10.PORTBADDR7
6352 
address_b[7] => ram_block2a11.PORTBADDR7
6353 
address_b[7] => ram_block2a12.PORTBADDR7
6354 
address_b[7] => ram_block2a13.PORTBADDR7
6355 
address_b[7] => ram_block2a14.PORTBADDR7
6356 
address_b[7] => ram_block2a15.PORTBADDR7
6357 
address_b[8] => ram_block2a0.PORTBADDR8
6358 
address_b[8] => ram_block2a1.PORTBADDR8
6359 
address_b[8] => ram_block2a2.PORTBADDR8
6360 
address_b[8] => ram_block2a3.PORTBADDR8
6361 
address_b[8] => ram_block2a4.PORTBADDR8
6362 
address_b[8] => ram_block2a5.PORTBADDR8
6363 
address_b[8] => ram_block2a6.PORTBADDR8
6364 
address_b[8] => ram_block2a7.PORTBADDR8
6365 
address_b[8] => ram_block2a8.PORTBADDR8
6366 
address_b[8] => ram_block2a9.PORTBADDR8
6367 
address_b[8] => ram_block2a10.PORTBADDR8
6368 
address_b[8] => ram_block2a11.PORTBADDR8
6369 
address_b[8] => ram_block2a12.PORTBADDR8
6370 
address_b[8] => ram_block2a13.PORTBADDR8
6371 
address_b[8] => ram_block2a14.PORTBADDR8
6372 
address_b[8] => ram_block2a15.PORTBADDR8
6373 
address_b[9] => ram_block2a0.PORTBADDR9
6374 
address_b[9] => ram_block2a1.PORTBADDR9
6375 
address_b[9] => ram_block2a2.PORTBADDR9
6376 
address_b[9] => ram_block2a3.PORTBADDR9
6377 
address_b[9] => ram_block2a4.PORTBADDR9
6378 
address_b[9] => ram_block2a5.PORTBADDR9
6379 
address_b[9] => ram_block2a6.PORTBADDR9
6380 
address_b[9] => ram_block2a7.PORTBADDR9
6381 
address_b[9] => ram_block2a8.PORTBADDR9
6382 
address_b[9] => ram_block2a9.PORTBADDR9
6383 
address_b[9] => ram_block2a10.PORTBADDR9
6384 
address_b[9] => ram_block2a11.PORTBADDR9
6385 
address_b[9] => ram_block2a12.PORTBADDR9
6386 
address_b[9] => ram_block2a13.PORTBADDR9
6387 
address_b[9] => ram_block2a14.PORTBADDR9
6388 
address_b[9] => ram_block2a15.PORTBADDR9
6389 
address_b[10] => ram_block2a0.PORTBADDR10
6390 
address_b[10] => ram_block2a1.PORTBADDR10
6391 
address_b[10] => ram_block2a2.PORTBADDR10
6392 
address_b[10] => ram_block2a3.PORTBADDR10
6393 
address_b[10] => ram_block2a4.PORTBADDR10
6394 
address_b[10] => ram_block2a5.PORTBADDR10
6395 
address_b[10] => ram_block2a6.PORTBADDR10
6396 
address_b[10] => ram_block2a7.PORTBADDR10
6397 
address_b[10] => ram_block2a8.PORTBADDR10
6398 
address_b[10] => ram_block2a9.PORTBADDR10
6399 
address_b[10] => ram_block2a10.PORTBADDR10
6400 
address_b[10] => ram_block2a11.PORTBADDR10
6401 
address_b[10] => ram_block2a12.PORTBADDR10
6402 
address_b[10] => ram_block2a13.PORTBADDR10
6403 
address_b[10] => ram_block2a14.PORTBADDR10
6404 
address_b[10] => ram_block2a15.PORTBADDR10
6405 
address_b[11] => ram_block2a0.PORTBADDR11
6406 
address_b[11] => ram_block2a1.PORTBADDR11
6407 
address_b[11] => ram_block2a2.PORTBADDR11
6408 
address_b[11] => ram_block2a3.PORTBADDR11
6409 
address_b[11] => ram_block2a4.PORTBADDR11
6410 
address_b[11] => ram_block2a5.PORTBADDR11
6411 
address_b[11] => ram_block2a6.PORTBADDR11
6412 
address_b[11] => ram_block2a7.PORTBADDR11
6413 
address_b[12] => address_reg_b[0].DATAIN
6414 
address_b[12] => decode_1oa:decode4.data[0]
6415 
address_b[12] => decode_1oa:decode_b.data[0]
6416 
clock0 => ram_block2a0.CLK0
6417 
clock0 => ram_block2a1.CLK0
6418 
clock0 => ram_block2a2.CLK0
6419 
clock0 => ram_block2a3.CLK0
6420 
clock0 => ram_block2a4.CLK0
6421 
clock0 => ram_block2a5.CLK0
6422 
clock0 => ram_block2a6.CLK0
6423 
clock0 => ram_block2a7.CLK0
6424 
clock0 => ram_block2a8.CLK0
6425 
clock0 => ram_block2a9.CLK0
6426 
clock0 => ram_block2a10.CLK0
6427 
clock0 => ram_block2a11.CLK0
6428 
clock0 => ram_block2a12.CLK0
6429 
clock0 => ram_block2a13.CLK0
6430 
clock0 => ram_block2a14.CLK0
6431 
clock0 => ram_block2a15.CLK0
6432 
clock0 => address_reg_a[0].CLK
6433 
clock1 => ram_block2a0.CLK1
6434 
clock1 => ram_block2a1.CLK1
6435 
clock1 => ram_block2a2.CLK1
6436 
clock1 => ram_block2a3.CLK1
6437 
clock1 => ram_block2a4.CLK1
6438 
clock1 => ram_block2a5.CLK1
6439 
clock1 => ram_block2a6.CLK1
6440 
clock1 => ram_block2a7.CLK1
6441 
clock1 => ram_block2a8.CLK1
6442 
clock1 => ram_block2a9.CLK1
6443 
clock1 => ram_block2a10.CLK1
6444 
clock1 => ram_block2a11.CLK1
6445 
clock1 => ram_block2a12.CLK1
6446 
clock1 => ram_block2a13.CLK1
6447 
clock1 => ram_block2a14.CLK1
6448 
clock1 => ram_block2a15.CLK1
6449 
clock1 => address_reg_b[0].CLK
6450 
clocken1 => ~NO_FANOUT~
6451 
data_a[0] => ram_block2a0.PORTADATAIN
6452 
data_a[0] => ram_block2a8.PORTADATAIN
6453 
data_a[1] => ram_block2a1.PORTADATAIN
6454 
data_a[1] => ram_block2a9.PORTADATAIN
6455 
data_a[2] => ram_block2a2.PORTADATAIN
6456 
data_a[2] => ram_block2a10.PORTADATAIN
6457 
data_a[3] => ram_block2a3.PORTADATAIN
6458 
data_a[3] => ram_block2a11.PORTADATAIN
6459 
data_a[4] => ram_block2a4.PORTADATAIN
6460 
data_a[4] => ram_block2a12.PORTADATAIN
6461 
data_a[5] => ram_block2a5.PORTADATAIN
6462 
data_a[5] => ram_block2a13.PORTADATAIN
6463 
data_a[6] => ram_block2a6.PORTADATAIN
6464 
data_a[6] => ram_block2a14.PORTADATAIN
6465 
data_a[7] => ram_block2a7.PORTADATAIN
6466 
data_a[7] => ram_block2a15.PORTADATAIN
6467 
data_b[0] => ram_block2a0.PORTBDATAIN
6468 
data_b[0] => ram_block2a8.PORTBDATAIN
6469 
data_b[1] => ram_block2a1.PORTBDATAIN
6470 
data_b[1] => ram_block2a9.PORTBDATAIN
6471 
data_b[2] => ram_block2a2.PORTBDATAIN
6472 
data_b[2] => ram_block2a10.PORTBDATAIN
6473 
data_b[3] => ram_block2a3.PORTBDATAIN
6474 
data_b[3] => ram_block2a11.PORTBDATAIN
6475 
data_b[4] => ram_block2a4.PORTBDATAIN
6476 
data_b[4] => ram_block2a12.PORTBDATAIN
6477 
data_b[5] => ram_block2a5.PORTBDATAIN
6478 
data_b[5] => ram_block2a13.PORTBDATAIN
6479 
data_b[6] => ram_block2a6.PORTBDATAIN
6480 
data_b[6] => ram_block2a14.PORTBDATAIN
6481 
data_b[7] => ram_block2a7.PORTBDATAIN
6482 
data_b[7] => ram_block2a15.PORTBDATAIN
6483 
q_a[0] <= mux_hib:mux5.result[0]
6484 
q_a[1] <= mux_hib:mux5.result[1]
6485 
q_a[2] <= mux_hib:mux5.result[2]
6486 
q_a[3] <= mux_hib:mux5.result[3]
6487 
q_a[4] <= mux_hib:mux5.result[4]
6488 
q_a[5] <= mux_hib:mux5.result[5]
6489 
q_a[6] <= mux_hib:mux5.result[6]
6490 
q_a[7] <= mux_hib:mux5.result[7]
6491 
q_b[0] <= mux_hib:mux6.result[0]
6492 
q_b[1] <= mux_hib:mux6.result[1]
6493 
q_b[2] <= mux_hib:mux6.result[2]
6494 
q_b[3] <= mux_hib:mux6.result[3]
6495 
q_b[4] <= mux_hib:mux6.result[4]
6496 
q_b[5] <= mux_hib:mux6.result[5]
6497 
q_b[6] <= mux_hib:mux6.result[6]
6498 
q_b[7] <= mux_hib:mux6.result[7]
6499 
wren_a => decode_1oa:decode3.enable
6500 
wren_b => decode_1oa:decode4.enable
6501 
 
6502 
 
6503 
|z80soc|vram:vram_inst|altsyncram:altsyncram_component|altsyncram_66l1:auto_generated|altsyncram_pal1:altsyncram1|decode_1oa:decode3
6504 
data[0] => eq_node[1].IN0
6505 
data[0] => eq_node[0].IN0
6506 
enable => eq_node[1].IN1
6507 
enable => eq_node[0].IN1
6508 
eq[0] <= eq_node[0].DB_MAX_OUTPUT_PORT_TYPE
6509 
eq[1] <= eq_node[1].DB_MAX_OUTPUT_PORT_TYPE
6510 
 
6511 
 
6512 
|z80soc|vram:vram_inst|altsyncram:altsyncram_component|altsyncram_66l1:auto_generated|altsyncram_pal1:altsyncram1|decode_1oa:decode4
6513 
data[0] => eq_node[1].IN0
6514 
data[0] => eq_node[0].IN0
6515 
enable => eq_node[1].IN1
6516 
enable => eq_node[0].IN1
6517 
eq[0] <= eq_node[0].DB_MAX_OUTPUT_PORT_TYPE
6518 
eq[1] <= eq_node[1].DB_MAX_OUTPUT_PORT_TYPE
6519 
 
6520 
 
6521 
|z80soc|vram:vram_inst|altsyncram:altsyncram_component|altsyncram_66l1:auto_generated|altsyncram_pal1:altsyncram1|decode_1oa:decode_a
6522 
data[0] => eq_node[1].IN0
6523 
data[0] => eq_node[0].IN0
6524 
enable => eq_node[1].IN1
6525 
enable => eq_node[0].IN1
6526 
eq[0] <= eq_node[0].DB_MAX_OUTPUT_PORT_TYPE
6527 
eq[1] <= eq_node[1].DB_MAX_OUTPUT_PORT_TYPE
6528 
 
6529 
 
6530 
|z80soc|vram:vram_inst|altsyncram:altsyncram_component|altsyncram_66l1:auto_generated|altsyncram_pal1:altsyncram1|decode_1oa:decode_b
6531 
data[0] => eq_node[1].IN0
6532 
data[0] => eq_node[0].IN0
6533 
enable => eq_node[1].IN1
6534 
enable => eq_node[0].IN1
6535 
eq[0] <= eq_node[0].DB_MAX_OUTPUT_PORT_TYPE
6536 
eq[1] <= eq_node[1].DB_MAX_OUTPUT_PORT_TYPE
6537 
 
6538 
 
6539 
|z80soc|vram:vram_inst|altsyncram:altsyncram_component|altsyncram_66l1:auto_generated|altsyncram_pal1:altsyncram1|mux_hib:mux5
6540 
data[0] => result_node[0].IN1
6541 
data[1] => result_node[1].IN1
6542 
data[2] => result_node[2].IN1
6543 
data[3] => result_node[3].IN1
6544 
data[4] => result_node[4].IN1
6545 
data[5] => result_node[5].IN1
6546 
data[6] => result_node[6].IN1
6547 
data[7] => result_node[7].IN1
6548 
data[8] => result_node[0].IN1
6549 
data[9] => result_node[1].IN1
6550 
data[10] => result_node[2].IN1
6551 
data[11] => result_node[3].IN1
6552 
data[12] => result_node[4].IN1
6553 
data[13] => result_node[5].IN1
6554 
data[14] => result_node[6].IN1
6555 
data[15] => result_node[7].IN1
6556 
result[0] <= result_node[0].DB_MAX_OUTPUT_PORT_TYPE
6557 
result[1] <= result_node[1].DB_MAX_OUTPUT_PORT_TYPE
6558 
result[2] <= result_node[2].DB_MAX_OUTPUT_PORT_TYPE
6559 
result[3] <= result_node[3].DB_MAX_OUTPUT_PORT_TYPE
6560 
result[4] <= result_node[4].DB_MAX_OUTPUT_PORT_TYPE
6561 
result[5] <= result_node[5].DB_MAX_OUTPUT_PORT_TYPE
6562 
result[6] <= result_node[6].DB_MAX_OUTPUT_PORT_TYPE
6563 
result[7] <= result_node[7].DB_MAX_OUTPUT_PORT_TYPE
6564 
sel[0] => result_node[7].IN0
6565 
sel[0] => _.IN0
6566 
sel[0] => result_node[6].IN0
6567 
sel[0] => _.IN0
6568 
sel[0] => result_node[5].IN0
6569 
sel[0] => _.IN0
6570 
sel[0] => result_node[4].IN0
6571 
sel[0] => _.IN0
6572 
sel[0] => result_node[3].IN0
6573 
sel[0] => _.IN0
6574 
sel[0] => result_node[2].IN0
6575 
sel[0] => _.IN0
6576 
sel[0] => result_node[1].IN0
6577 
sel[0] => _.IN0
6578 
sel[0] => result_node[0].IN0
6579 
sel[0] => _.IN0
6580 
 
6581 
 
6582 
|z80soc|vram:vram_inst|altsyncram:altsyncram_component|altsyncram_66l1:auto_generated|altsyncram_pal1:altsyncram1|mux_hib:mux6
6583 
data[0] => result_node[0].IN1
6584 
data[1] => result_node[1].IN1
6585 
data[2] => result_node[2].IN1
6586 
data[3] => result_node[3].IN1
6587 
data[4] => result_node[4].IN1
6588 
data[5] => result_node[5].IN1
6589 
data[6] => result_node[6].IN1
6590 
data[7] => result_node[7].IN1
6591 
data[8] => result_node[0].IN1
6592 
data[9] => result_node[1].IN1
6593 
data[10] => result_node[2].IN1
6594 
data[11] => result_node[3].IN1
6595 
data[12] => result_node[4].IN1
6596 
data[13] => result_node[5].IN1
6597 
data[14] => result_node[6].IN1
6598 
data[15] => result_node[7].IN1
6599 
result[0] <= result_node[0].DB_MAX_OUTPUT_PORT_TYPE
6600 
result[1] <= result_node[1].DB_MAX_OUTPUT_PORT_TYPE
6601 
result[2] <= result_node[2].DB_MAX_OUTPUT_PORT_TYPE
6602 
result[3] <= result_node[3].DB_MAX_OUTPUT_PORT_TYPE
6603 
result[4] <= result_node[4].DB_MAX_OUTPUT_PORT_TYPE
6604 
result[5] <= result_node[5].DB_MAX_OUTPUT_PORT_TYPE
6605 
result[6] <= result_node[6].DB_MAX_OUTPUT_PORT_TYPE
6606 
result[7] <= result_node[7].DB_MAX_OUTPUT_PORT_TYPE
6607 
sel[0] => result_node[7].IN0
6608 
sel[0] => _.IN0
6609 
sel[0] => result_node[6].IN0
6610 
sel[0] => _.IN0
6611 
sel[0] => result_node[5].IN0
6612 
sel[0] => _.IN0
6613 
sel[0] => result_node[4].IN0
6614 
sel[0] => _.IN0
6615 
sel[0] => result_node[3].IN0
6616 
sel[0] => _.IN0
6617 
sel[0] => result_node[2].IN0
6618 
sel[0] => _.IN0
6619 
sel[0] => result_node[1].IN0
6620 
sel[0] => _.IN0
6621 
sel[0] => result_node[0].IN0
6622 
sel[0] => _.IN0
6623 
 
6624 
 
6625 
|z80soc|charram:cram
6626 
data[0] => altsyncram:altsyncram_component.data_a[0]
6627 
data[1] => altsyncram:altsyncram_component.data_a[1]
6628 
data[2] => altsyncram:altsyncram_component.data_a[2]
6629 
data[3] => altsyncram:altsyncram_component.data_a[3]
6630 
data[4] => altsyncram:altsyncram_component.data_a[4]
6631 
data[5] => altsyncram:altsyncram_component.data_a[5]
6632 
data[6] => altsyncram:altsyncram_component.data_a[6]
6633 
data[7] => altsyncram:altsyncram_component.data_a[7]
6634 
rdaddress[0] => altsyncram:altsyncram_component.address_b[0]
6635 
rdaddress[1] => altsyncram:altsyncram_component.address_b[1]
6636 
rdaddress[2] => altsyncram:altsyncram_component.address_b[2]
6637 
rdaddress[3] => altsyncram:altsyncram_component.address_b[3]
6638 
rdaddress[4] => altsyncram:altsyncram_component.address_b[4]
6639 
rdaddress[5] => altsyncram:altsyncram_component.address_b[5]
6640 
rdaddress[6] => altsyncram:altsyncram_component.address_b[6]
6641 
rdaddress[7] => altsyncram:altsyncram_component.address_b[7]
6642 
rdaddress[8] => altsyncram:altsyncram_component.address_b[8]
6643 
rdaddress[9] => altsyncram:altsyncram_component.address_b[9]
6644 
rdaddress[10] => altsyncram:altsyncram_component.address_b[10]
6645 
rdclock => altsyncram:altsyncram_component.clock1
6646 
wraddress[0] => altsyncram:altsyncram_component.address_a[0]
6647 
wraddress[1] => altsyncram:altsyncram_component.address_a[1]
6648 
wraddress[2] => altsyncram:altsyncram_component.address_a[2]
6649 
wraddress[3] => altsyncram:altsyncram_component.address_a[3]
6650 
wraddress[4] => altsyncram:altsyncram_component.address_a[4]
6651 
wraddress[5] => altsyncram:altsyncram_component.address_a[5]
6652 
wraddress[6] => altsyncram:altsyncram_component.address_a[6]
6653 
wraddress[7] => altsyncram:altsyncram_component.address_a[7]
6654 
wraddress[8] => altsyncram:altsyncram_component.address_a[8]
6655 
wraddress[9] => altsyncram:altsyncram_component.address_a[9]
6656 
wraddress[10] => altsyncram:altsyncram_component.address_a[10]
6657 
wrclock => altsyncram:altsyncram_component.clock0
6658 
wren => altsyncram:altsyncram_component.wren_a
6659 
q[0] <= altsyncram:altsyncram_component.q_b[0]
6660 
q[1] <= altsyncram:altsyncram_component.q_b[1]
6661 
q[2] <= altsyncram:altsyncram_component.q_b[2]
6662 
q[3] <= altsyncram:altsyncram_component.q_b[3]
6663 
q[4] <= altsyncram:altsyncram_component.q_b[4]
6664 
q[5] <= altsyncram:altsyncram_component.q_b[5]
6665 
q[6] <= altsyncram:altsyncram_component.q_b[6]
6666 
q[7] <= altsyncram:altsyncram_component.q_b[7]
6667 
 
6668 
 
6669 
|z80soc|charram:cram|altsyncram:altsyncram_component
6670 
wren_a => altsyncram_h1o1:auto_generated.wren_a
6671 
rden_a => ~NO_FANOUT~
6672 
wren_b => ~NO_FANOUT~
6673 
rden_b => ~NO_FANOUT~
6674 
data_a[0] => altsyncram_h1o1:auto_generated.data_a[0]
6675 
data_a[1] => altsyncram_h1o1:auto_generated.data_a[1]
6676 
data_a[2] => altsyncram_h1o1:auto_generated.data_a[2]
6677 
data_a[3] => altsyncram_h1o1:auto_generated.data_a[3]
6678 
data_a[4] => altsyncram_h1o1:auto_generated.data_a[4]
6679 
data_a[5] => altsyncram_h1o1:auto_generated.data_a[5]
6680 
data_a[6] => altsyncram_h1o1:auto_generated.data_a[6]
6681 
data_a[7] => altsyncram_h1o1:auto_generated.data_a[7]
6682 
data_b[0] => ~NO_FANOUT~
6683 
data_b[1] => ~NO_FANOUT~
6684 
data_b[2] => ~NO_FANOUT~
6685 
data_b[3] => ~NO_FANOUT~
6686 
data_b[4] => ~NO_FANOUT~
6687 
data_b[5] => ~NO_FANOUT~
6688 
data_b[6] => ~NO_FANOUT~
6689 
data_b[7] => ~NO_FANOUT~
6690 
address_a[0] => altsyncram_h1o1:auto_generated.address_a[0]
6691 
address_a[1] => altsyncram_h1o1:auto_generated.address_a[1]
6692 
address_a[2] => altsyncram_h1o1:auto_generated.address_a[2]
6693 
address_a[3] => altsyncram_h1o1:auto_generated.address_a[3]
6694 
address_a[4] => altsyncram_h1o1:auto_generated.address_a[4]
6695 
address_a[5] => altsyncram_h1o1:auto_generated.address_a[5]
6696 
address_a[6] => altsyncram_h1o1:auto_generated.address_a[6]
6697 
address_a[7] => altsyncram_h1o1:auto_generated.address_a[7]
6698 
address_a[8] => altsyncram_h1o1:auto_generated.address_a[8]
6699 
address_a[9] => altsyncram_h1o1:auto_generated.address_a[9]
6700 
address_a[10] => altsyncram_h1o1:auto_generated.address_a[10]
6701 
address_b[0] => altsyncram_h1o1:auto_generated.address_b[0]
6702 
address_b[1] => altsyncram_h1o1:auto_generated.address_b[1]
6703 
address_b[2] => altsyncram_h1o1:auto_generated.address_b[2]
6704 
address_b[3] => altsyncram_h1o1:auto_generated.address_b[3]
6705 
address_b[4] => altsyncram_h1o1:auto_generated.address_b[4]
6706 
address_b[5] => altsyncram_h1o1:auto_generated.address_b[5]
6707 
address_b[6] => altsyncram_h1o1:auto_generated.address_b[6]
6708 
address_b[7] => altsyncram_h1o1:auto_generated.address_b[7]
6709 
address_b[8] => altsyncram_h1o1:auto_generated.address_b[8]
6710 
address_b[9] => altsyncram_h1o1:auto_generated.address_b[9]
6711 
address_b[10] => altsyncram_h1o1:auto_generated.address_b[10]
6712 
addressstall_a => ~NO_FANOUT~
6713 
addressstall_b => ~NO_FANOUT~
6714 
clock0 => altsyncram_h1o1:auto_generated.clock0
6715 
clock1 => altsyncram_h1o1:auto_generated.clock1
6716 
clocken0 => ~NO_FANOUT~
6717 
clocken1 => ~NO_FANOUT~
6718 
clocken2 => ~NO_FANOUT~
6719 
clocken3 => ~NO_FANOUT~
6720 
aclr0 => ~NO_FANOUT~
6721 
aclr1 => ~NO_FANOUT~
6722 
byteena_a[0] => ~NO_FANOUT~
6723 
byteena_b[0] => ~NO_FANOUT~
6724 
q_a[0] <=
6725 
q_a[1] <=
6726 
q_a[2] <=
6727 
q_a[3] <=
6728 
q_a[4] <=
6729 
q_a[5] <=
6730 
q_a[6] <=
6731 
q_a[7] <=
6732 
q_b[0] <= altsyncram_h1o1:auto_generated.q_b[0]
6733 
q_b[1] <= altsyncram_h1o1:auto_generated.q_b[1]
6734 
q_b[2] <= altsyncram_h1o1:auto_generated.q_b[2]
6735 
q_b[3] <= altsyncram_h1o1:auto_generated.q_b[3]
6736 
q_b[4] <= altsyncram_h1o1:auto_generated.q_b[4]
6737 
q_b[5] <= altsyncram_h1o1:auto_generated.q_b[5]
6738 
q_b[6] <= altsyncram_h1o1:auto_generated.q_b[6]
6739 
q_b[7] <= altsyncram_h1o1:auto_generated.q_b[7]
6740 
eccstatus[0] <=
6741 
eccstatus[1] <=
6742 
eccstatus[2] <=
6743 
 
6744 
 
6745 
|z80soc|charram:cram|altsyncram:altsyncram_component|altsyncram_h1o1:auto_generated
6746 
address_a[0] => altsyncram_36o1:altsyncram1.address_b[0]
6747 
address_a[1] => altsyncram_36o1:altsyncram1.address_b[1]
6748 
address_a[2] => altsyncram_36o1:altsyncram1.address_b[2]
6749 
address_a[3] => altsyncram_36o1:altsyncram1.address_b[3]
6750 
address_a[4] => altsyncram_36o1:altsyncram1.address_b[4]
6751 
address_a[5] => altsyncram_36o1:altsyncram1.address_b[5]
6752 
address_a[6] => altsyncram_36o1:altsyncram1.address_b[6]
6753 
address_a[7] => altsyncram_36o1:altsyncram1.address_b[7]
6754 
address_a[8] => altsyncram_36o1:altsyncram1.address_b[8]
6755 
address_a[9] => altsyncram_36o1:altsyncram1.address_b[9]
6756 
address_a[10] => altsyncram_36o1:altsyncram1.address_b[10]
6757 
address_b[0] => altsyncram_36o1:altsyncram1.address_a[0]
6758 
address_b[1] => altsyncram_36o1:altsyncram1.address_a[1]
6759 
address_b[2] => altsyncram_36o1:altsyncram1.address_a[2]
6760 
address_b[3] => altsyncram_36o1:altsyncram1.address_a[3]
6761 
address_b[4] => altsyncram_36o1:altsyncram1.address_a[4]
6762 
address_b[5] => altsyncram_36o1:altsyncram1.address_a[5]
6763 
address_b[6] => altsyncram_36o1:altsyncram1.address_a[6]
6764 
address_b[7] => altsyncram_36o1:altsyncram1.address_a[7]
6765 
address_b[8] => altsyncram_36o1:altsyncram1.address_a[8]
6766 
address_b[9] => altsyncram_36o1:altsyncram1.address_a[9]
6767 
address_b[10] => altsyncram_36o1:altsyncram1.address_a[10]
6768 
clock0 => altsyncram_36o1:altsyncram1.clock1
6769 
clock1 => altsyncram_36o1:altsyncram1.clock0
6770 
data_a[0] => altsyncram_36o1:altsyncram1.data_b[0]
6771 
data_a[1] => altsyncram_36o1:altsyncram1.data_b[1]
6772 
data_a[2] => altsyncram_36o1:altsyncram1.data_b[2]
6773 
data_a[3] => altsyncram_36o1:altsyncram1.data_b[3]
6774 
data_a[4] => altsyncram_36o1:altsyncram1.data_b[4]
6775 
data_a[5] => altsyncram_36o1:altsyncram1.data_b[5]
6776 
data_a[6] => altsyncram_36o1:altsyncram1.data_b[6]
6777 
data_a[7] => altsyncram_36o1:altsyncram1.data_b[7]
6778 
q_b[0] <= altsyncram_36o1:altsyncram1.q_a[0]
6779 
q_b[1] <= altsyncram_36o1:altsyncram1.q_a[1]
6780 
q_b[2] <= altsyncram_36o1:altsyncram1.q_a[2]
6781 
q_b[3] <= altsyncram_36o1:altsyncram1.q_a[3]
6782 
q_b[4] <= altsyncram_36o1:altsyncram1.q_a[4]
6783 
q_b[5] <= altsyncram_36o1:altsyncram1.q_a[5]
6784 
q_b[6] <= altsyncram_36o1:altsyncram1.q_a[6]
6785 
q_b[7] <= altsyncram_36o1:altsyncram1.q_a[7]
6786 
wren_a => altsyncram_36o1:altsyncram1.clocken1
6787 
wren_a => altsyncram_36o1:altsyncram1.wren_b
6788 
 
6789 
 
6790 
|z80soc|charram:cram|altsyncram:altsyncram_component|altsyncram_h1o1:auto_generated|altsyncram_36o1:altsyncram1
6791 
address_a[0] => ram_block2a0.PORTAADDR
6792 
address_a[0] => ram_block2a1.PORTAADDR
6793 
address_a[0] => ram_block2a2.PORTAADDR
6794 
address_a[0] => ram_block2a3.PORTAADDR
6795 
address_a[0] => ram_block2a4.PORTAADDR
6796 
address_a[0] => ram_block2a5.PORTAADDR
6797 
address_a[0] => ram_block2a6.PORTAADDR
6798 
address_a[0] => ram_block2a7.PORTAADDR
6799 
address_a[1] => ram_block2a0.PORTAADDR1
6800 
address_a[1] => ram_block2a1.PORTAADDR1
6801 
address_a[1] => ram_block2a2.PORTAADDR1
6802 
address_a[1] => ram_block2a3.PORTAADDR1
6803 
address_a[1] => ram_block2a4.PORTAADDR1
6804 
address_a[1] => ram_block2a5.PORTAADDR1
6805 
address_a[1] => ram_block2a6.PORTAADDR1
6806 
address_a[1] => ram_block2a7.PORTAADDR1
6807 
address_a[2] => ram_block2a0.PORTAADDR2
6808 
address_a[2] => ram_block2a1.PORTAADDR2
6809 
address_a[2] => ram_block2a2.PORTAADDR2
6810 
address_a[2] => ram_block2a3.PORTAADDR2
6811 
address_a[2] => ram_block2a4.PORTAADDR2
6812 
address_a[2] => ram_block2a5.PORTAADDR2
6813 
address_a[2] => ram_block2a6.PORTAADDR2
6814 
address_a[2] => ram_block2a7.PORTAADDR2
6815 
address_a[3] => ram_block2a0.PORTAADDR3
6816 
address_a[3] => ram_block2a1.PORTAADDR3
6817 
address_a[3] => ram_block2a2.PORTAADDR3
6818 
address_a[3] => ram_block2a3.PORTAADDR3
6819 
address_a[3] => ram_block2a4.PORTAADDR3
6820 
address_a[3] => ram_block2a5.PORTAADDR3
6821 
address_a[3] => ram_block2a6.PORTAADDR3
6822 
address_a[3] => ram_block2a7.PORTAADDR3
6823 
address_a[4] => ram_block2a0.PORTAADDR4
6824 
address_a[4] => ram_block2a1.PORTAADDR4
6825 
address_a[4] => ram_block2a2.PORTAADDR4
6826 
address_a[4] => ram_block2a3.PORTAADDR4
6827 
address_a[4] => ram_block2a4.PORTAADDR4
6828 
address_a[4] => ram_block2a5.PORTAADDR4
6829 
address_a[4] => ram_block2a6.PORTAADDR4
6830 
address_a[4] => ram_block2a7.PORTAADDR4
6831 
address_a[5] => ram_block2a0.PORTAADDR5
6832 
address_a[5] => ram_block2a1.PORTAADDR5
6833 
address_a[5] => ram_block2a2.PORTAADDR5
6834 
address_a[5] => ram_block2a3.PORTAADDR5
6835 
address_a[5] => ram_block2a4.PORTAADDR5
6836 
address_a[5] => ram_block2a5.PORTAADDR5
6837 
address_a[5] => ram_block2a6.PORTAADDR5
6838 
address_a[5] => ram_block2a7.PORTAADDR5
6839 
address_a[6] => ram_block2a0.PORTAADDR6
6840 
address_a[6] => ram_block2a1.PORTAADDR6
6841 
address_a[6] => ram_block2a2.PORTAADDR6
6842 
address_a[6] => ram_block2a3.PORTAADDR6
6843 
address_a[6] => ram_block2a4.PORTAADDR6
6844 
address_a[6] => ram_block2a5.PORTAADDR6
6845 
address_a[6] => ram_block2a6.PORTAADDR6
6846 
address_a[6] => ram_block2a7.PORTAADDR6
6847 
address_a[7] => ram_block2a0.PORTAADDR7
6848 
address_a[7] => ram_block2a1.PORTAADDR7
6849 
address_a[7] => ram_block2a2.PORTAADDR7
6850 
address_a[7] => ram_block2a3.PORTAADDR7
6851 
address_a[7] => ram_block2a4.PORTAADDR7
6852 
address_a[7] => ram_block2a5.PORTAADDR7
6853 
address_a[7] => ram_block2a6.PORTAADDR7
6854 
address_a[7] => ram_block2a7.PORTAADDR7
6855 
address_a[8] => ram_block2a0.PORTAADDR8
6856 
address_a[8] => ram_block2a1.PORTAADDR8
6857 
address_a[8] => ram_block2a2.PORTAADDR8
6858 
address_a[8] => ram_block2a3.PORTAADDR8
6859 
address_a[8] => ram_block2a4.PORTAADDR8
6860 
address_a[8] => ram_block2a5.PORTAADDR8
6861 
address_a[8] => ram_block2a6.PORTAADDR8
6862 
address_a[8] => ram_block2a7.PORTAADDR8
6863 
address_a[9] => ram_block2a0.PORTAADDR9
6864 
address_a[9] => ram_block2a1.PORTAADDR9
6865 
address_a[9] => ram_block2a2.PORTAADDR9
6866 
address_a[9] => ram_block2a3.PORTAADDR9
6867 
address_a[9] => ram_block2a4.PORTAADDR9
6868 
address_a[9] => ram_block2a5.PORTAADDR9
6869 
address_a[9] => ram_block2a6.PORTAADDR9
6870 
address_a[9] => ram_block2a7.PORTAADDR9
6871 
address_a[10] => ram_block2a0.PORTAADDR10
6872 
address_a[10] => ram_block2a1.PORTAADDR10
6873 
address_a[10] => ram_block2a2.PORTAADDR10
6874 
address_a[10] => ram_block2a3.PORTAADDR10
6875 
address_a[10] => ram_block2a4.PORTAADDR10
6876 
address_a[10] => ram_block2a5.PORTAADDR10
6877 
address_a[10] => ram_block2a6.PORTAADDR10
6878 
address_a[10] => ram_block2a7.PORTAADDR10
6879 
address_b[0] => ram_block2a0.PORTBADDR
6880 
address_b[0] => ram_block2a1.PORTBADDR
6881 
address_b[0] => ram_block2a2.PORTBADDR
6882 
address_b[0] => ram_block2a3.PORTBADDR
6883 
address_b[0] => ram_block2a4.PORTBADDR
6884 
address_b[0] => ram_block2a5.PORTBADDR
6885 
address_b[0] => ram_block2a6.PORTBADDR
6886 
address_b[0] => ram_block2a7.PORTBADDR
6887 
address_b[1] => ram_block2a0.PORTBADDR1
6888 
address_b[1] => ram_block2a1.PORTBADDR1
6889 
address_b[1] => ram_block2a2.PORTBADDR1
6890 
address_b[1] => ram_block2a3.PORTBADDR1
6891 
address_b[1] => ram_block2a4.PORTBADDR1
6892 
address_b[1] => ram_block2a5.PORTBADDR1
6893 
address_b[1] => ram_block2a6.PORTBADDR1
6894 
address_b[1] => ram_block2a7.PORTBADDR1
6895 
address_b[2] => ram_block2a0.PORTBADDR2
6896 
address_b[2] => ram_block2a1.PORTBADDR2
6897 
address_b[2] => ram_block2a2.PORTBADDR2
6898 
address_b[2] => ram_block2a3.PORTBADDR2
6899 
address_b[2] => ram_block2a4.PORTBADDR2
6900 
address_b[2] => ram_block2a5.PORTBADDR2
6901 
address_b[2] => ram_block2a6.PORTBADDR2
6902 
address_b[2] => ram_block2a7.PORTBADDR2
6903 
address_b[3] => ram_block2a0.PORTBADDR3
6904 
address_b[3] => ram_block2a1.PORTBADDR3
6905 
address_b[3] => ram_block2a2.PORTBADDR3
6906 
address_b[3] => ram_block2a3.PORTBADDR3
6907 
address_b[3] => ram_block2a4.PORTBADDR3
6908 
address_b[3] => ram_block2a5.PORTBADDR3
6909 
address_b[3] => ram_block2a6.PORTBADDR3
6910 
address_b[3] => ram_block2a7.PORTBADDR3
6911 
address_b[4] => ram_block2a0.PORTBADDR4
6912 
address_b[4] => ram_block2a1.PORTBADDR4
6913 
address_b[4] => ram_block2a2.PORTBADDR4
6914 
address_b[4] => ram_block2a3.PORTBADDR4
6915 
address_b[4] => ram_block2a4.PORTBADDR4
6916 
address_b[4] => ram_block2a5.PORTBADDR4
6917 
address_b[4] => ram_block2a6.PORTBADDR4
6918 
address_b[4] => ram_block2a7.PORTBADDR4
6919 
address_b[5] => ram_block2a0.PORTBADDR5
6920 
address_b[5] => ram_block2a1.PORTBADDR5
6921 
address_b[5] => ram_block2a2.PORTBADDR5
6922 
address_b[5] => ram_block2a3.PORTBADDR5
6923 
address_b[5] => ram_block2a4.PORTBADDR5
6924 
address_b[5] => ram_block2a5.PORTBADDR5
6925 
address_b[5] => ram_block2a6.PORTBADDR5
6926 
address_b[5] => ram_block2a7.PORTBADDR5
6927 
address_b[6] => ram_block2a0.PORTBADDR6
6928 
address_b[6] => ram_block2a1.PORTBADDR6
6929 
address_b[6] => ram_block2a2.PORTBADDR6
6930 
address_b[6] => ram_block2a3.PORTBADDR6
6931 
address_b[6] => ram_block2a4.PORTBADDR6
6932 
address_b[6] => ram_block2a5.PORTBADDR6
6933 
address_b[6] => ram_block2a6.PORTBADDR6
6934 
address_b[6] => ram_block2a7.PORTBADDR6
6935 
address_b[7] => ram_block2a0.PORTBADDR7
6936 
address_b[7] => ram_block2a1.PORTBADDR7
6937 
address_b[7] => ram_block2a2.PORTBADDR7
6938 
address_b[7] => ram_block2a3.PORTBADDR7
6939 
address_b[7] => ram_block2a4.PORTBADDR7
6940 
address_b[7] => ram_block2a5.PORTBADDR7
6941 
address_b[7] => ram_block2a6.PORTBADDR7
6942 
address_b[7] => ram_block2a7.PORTBADDR7
6943 
address_b[8] => ram_block2a0.PORTBADDR8
6944 
address_b[8] => ram_block2a1.PORTBADDR8
6945 
address_b[8] => ram_block2a2.PORTBADDR8
6946 
address_b[8] => ram_block2a3.PORTBADDR8
6947 
address_b[8] => ram_block2a4.PORTBADDR8
6948 
address_b[8] => ram_block2a5.PORTBADDR8
6949 
address_b[8] => ram_block2a6.PORTBADDR8
6950 
address_b[8] => ram_block2a7.PORTBADDR8
6951 
address_b[9] => ram_block2a0.PORTBADDR9
6952 
address_b[9] => ram_block2a1.PORTBADDR9
6953 
address_b[9] => ram_block2a2.PORTBADDR9
6954 
address_b[9] => ram_block2a3.PORTBADDR9
6955 
address_b[9] => ram_block2a4.PORTBADDR9
6956 
address_b[9] => ram_block2a5.PORTBADDR9
6957 
address_b[9] => ram_block2a6.PORTBADDR9
6958 
address_b[9] => ram_block2a7.PORTBADDR9
6959 
address_b[10] => ram_block2a0.PORTBADDR10
6960 
address_b[10] => ram_block2a1.PORTBADDR10
6961 
address_b[10] => ram_block2a2.PORTBADDR10
6962 
address_b[10] => ram_block2a3.PORTBADDR10
6963 
address_b[10] => ram_block2a4.PORTBADDR10
6964 
address_b[10] => ram_block2a5.PORTBADDR10
6965 
address_b[10] => ram_block2a6.PORTBADDR10
6966 
address_b[10] => ram_block2a7.PORTBADDR10
6967 
clock0 => ram_block2a0.CLK0
6968 
clock0 => ram_block2a1.CLK0
6969 
clock0 => ram_block2a2.CLK0
6970 
clock0 => ram_block2a3.CLK0
6971 
clock0 => ram_block2a4.CLK0
6972 
clock0 => ram_block2a5.CLK0
6973 
clock0 => ram_block2a6.CLK0
6974 
clock0 => ram_block2a7.CLK0
6975 
clock1 => ram_block2a0.CLK1
6976 
clock1 => ram_block2a1.CLK1
6977 
clock1 => ram_block2a2.CLK1
6978 
clock1 => ram_block2a3.CLK1
6979 
clock1 => ram_block2a4.CLK1
6980 
clock1 => ram_block2a5.CLK1
6981 
clock1 => ram_block2a6.CLK1
6982 
clock1 => ram_block2a7.CLK1
6983 
clocken1 => ram_block2a0.ENA1
6984 
clocken1 => ram_block2a1.ENA1
6985 
clocken1 => ram_block2a2.ENA1
6986 
clocken1 => ram_block2a3.ENA1
6987 
clocken1 => ram_block2a4.ENA1
6988 
clocken1 => ram_block2a5.ENA1
6989 
clocken1 => ram_block2a6.ENA1
6990 
clocken1 => ram_block2a7.ENA1
6991 
data_a[0] => ram_block2a0.PORTADATAIN
6992 
data_a[1] => ram_block2a1.PORTADATAIN
6993 
data_a[2] => ram_block2a2.PORTADATAIN
6994 
data_a[3] => ram_block2a3.PORTADATAIN
6995 
data_a[4] => ram_block2a4.PORTADATAIN
6996 
data_a[5] => ram_block2a5.PORTADATAIN
6997 
data_a[6] => ram_block2a6.PORTADATAIN
6998 
data_a[7] => ram_block2a7.PORTADATAIN
6999 
data_b[0] => ram_block2a0.PORTBDATAIN
7000 
data_b[1] => ram_block2a1.PORTBDATAIN
7001 
data_b[2] => ram_block2a2.PORTBDATAIN
7002 
data_b[3] => ram_block2a3.PORTBDATAIN
7003 
data_b[4] => ram_block2a4.PORTBDATAIN
7004 
data_b[5] => ram_block2a5.PORTBDATAIN
7005 
data_b[6] => ram_block2a6.PORTBDATAIN
7006 
data_b[7] => ram_block2a7.PORTBDATAIN
7007 
q_a[0] <= ram_block2a0.PORTADATAOUT
7008 
q_a[1] <= ram_block2a1.PORTADATAOUT
7009 
q_a[2] <= ram_block2a2.PORTADATAOUT
7010 
q_a[3] <= ram_block2a3.PORTADATAOUT
7011 
q_a[4] <= ram_block2a4.PORTADATAOUT
7012 
q_a[5] <= ram_block2a5.PORTADATAOUT
7013 
q_a[6] <= ram_block2a6.PORTADATAOUT
7014 
q_a[7] <= ram_block2a7.PORTADATAOUT
7015 
q_b[0] <= ram_block2a0.PORTBDATAOUT
7016 
q_b[1] <= ram_block2a1.PORTBDATAOUT
7017 
q_b[2] <= ram_block2a2.PORTBDATAOUT
7018 
q_b[3] <= ram_block2a3.PORTBDATAOUT
7019 
q_b[4] <= ram_block2a4.PORTBDATAOUT
7020 
q_b[5] <= ram_block2a5.PORTBDATAOUT
7021 
q_b[6] <= ram_block2a6.PORTBDATAOUT
7022 
q_b[7] <= ram_block2a7.PORTBDATAOUT
7023 
wren_a => ram_block2a0.PORTAWE
7024 
wren_a => ram_block2a1.PORTAWE
7025 
wren_a => ram_block2a2.PORTAWE
7026 
wren_a => ram_block2a3.PORTAWE
7027 
wren_a => ram_block2a4.PORTAWE
7028 
wren_a => ram_block2a5.PORTAWE
7029 
wren_a => ram_block2a6.PORTAWE
7030 
wren_a => ram_block2a7.PORTAWE
7031 
wren_b => ram_block2a0.PORTBRE
7032 
wren_b => ram_block2a1.PORTBRE
7033 
wren_b => ram_block2a2.PORTBRE
7034 
wren_b => ram_block2a3.PORTBRE
7035 
wren_b => ram_block2a4.PORTBRE
7036 
wren_b => ram_block2a5.PORTBRE
7037 
wren_b => ram_block2a6.PORTBRE
7038 
wren_b => ram_block2a7.PORTBRE
7039 
 
7040 
 
7041 
|z80soc|rom:rom_inst
7042 
address[0] => altsyncram:altsyncram_component.address_a[0]
7043 
address[1] => altsyncram:altsyncram_component.address_a[1]
7044 
address[2] => altsyncram:altsyncram_component.address_a[2]
7045 
address[3] => altsyncram:altsyncram_component.address_a[3]
7046 
address[4] => altsyncram:altsyncram_component.address_a[4]
7047 
address[5] => altsyncram:altsyncram_component.address_a[5]
7048 
address[6] => altsyncram:altsyncram_component.address_a[6]
7049 
address[7] => altsyncram:altsyncram_component.address_a[7]
7050 
address[8] => altsyncram:altsyncram_component.address_a[8]
7051 
address[9] => altsyncram:altsyncram_component.address_a[9]
7052 
address[10] => altsyncram:altsyncram_component.address_a[10]
7053 
address[11] => altsyncram:altsyncram_component.address_a[11]
7054 
address[12] => altsyncram:altsyncram_component.address_a[12]
7055 
address[13] => altsyncram:altsyncram_component.address_a[13]
7056 
clock => altsyncram:altsyncram_component.clock0
7057 
q[0] <= altsyncram:altsyncram_component.q_a[0]
7058 
q[1] <= altsyncram:altsyncram_component.q_a[1]
7059 
q[2] <= altsyncram:altsyncram_component.q_a[2]
7060 
q[3] <= altsyncram:altsyncram_component.q_a[3]
7061 
q[4] <= altsyncram:altsyncram_component.q_a[4]
7062 
q[5] <= altsyncram:altsyncram_component.q_a[5]
7063 
q[6] <= altsyncram:altsyncram_component.q_a[6]
7064 
q[7] <= altsyncram:altsyncram_component.q_a[7]
7065 
 
7066 
 
7067 
|z80soc|rom:rom_inst|altsyncram:altsyncram_component
7068 
wren_a => ~NO_FANOUT~
7069 
rden_a => ~NO_FANOUT~
7070 
wren_b => ~NO_FANOUT~
7071 
rden_b => ~NO_FANOUT~
7072 
data_a[0] => ~NO_FANOUT~
7073 
data_a[1] => ~NO_FANOUT~
7074 
data_a[2] => ~NO_FANOUT~
7075 
data_a[3] => ~NO_FANOUT~
7076 
data_a[4] => ~NO_FANOUT~
7077 
data_a[5] => ~NO_FANOUT~
7078 
data_a[6] => ~NO_FANOUT~
7079 
data_a[7] => ~NO_FANOUT~
7080 
data_b[0] => ~NO_FANOUT~
7081 
address_a[0] => altsyncram_tr91:auto_generated.address_a[0]
7082 
address_a[1] => altsyncram_tr91:auto_generated.address_a[1]
7083 
address_a[2] => altsyncram_tr91:auto_generated.address_a[2]
7084 
address_a[3] => altsyncram_tr91:auto_generated.address_a[3]
7085 
address_a[4] => altsyncram_tr91:auto_generated.address_a[4]
7086 
address_a[5] => altsyncram_tr91:auto_generated.address_a[5]
7087 
address_a[6] => altsyncram_tr91:auto_generated.address_a[6]
7088 
address_a[7] => altsyncram_tr91:auto_generated.address_a[7]
7089 
address_a[8] => altsyncram_tr91:auto_generated.address_a[8]
7090 
address_a[9] => altsyncram_tr91:auto_generated.address_a[9]
7091 
address_a[10] => altsyncram_tr91:auto_generated.address_a[10]
7092 
address_a[11] => altsyncram_tr91:auto_generated.address_a[11]
7093 
address_a[12] => altsyncram_tr91:auto_generated.address_a[12]
7094 
address_a[13] => altsyncram_tr91:auto_generated.address_a[13]
7095 
address_b[0] => ~NO_FANOUT~
7096 
addressstall_a => ~NO_FANOUT~
7097 
addressstall_b => ~NO_FANOUT~
7098 
clock0 => altsyncram_tr91:auto_generated.clock0
7099 
clock1 => ~NO_FANOUT~
7100 
clocken0 => ~NO_FANOUT~
7101 
clocken1 => ~NO_FANOUT~
7102 
clocken2 => ~NO_FANOUT~
7103 
clocken3 => ~NO_FANOUT~
7104 
aclr0 => ~NO_FANOUT~
7105 
aclr1 => ~NO_FANOUT~
7106 
byteena_a[0] => ~NO_FANOUT~
7107 
byteena_b[0] => ~NO_FANOUT~
7108 
q_a[0] <= altsyncram_tr91:auto_generated.q_a[0]
7109 
q_a[1] <= altsyncram_tr91:auto_generated.q_a[1]
7110 
q_a[2] <= altsyncram_tr91:auto_generated.q_a[2]
7111 
q_a[3] <= altsyncram_tr91:auto_generated.q_a[3]
7112 
q_a[4] <= altsyncram_tr91:auto_generated.q_a[4]
7113 
q_a[5] <= altsyncram_tr91:auto_generated.q_a[5]
7114 
q_a[6] <= altsyncram_tr91:auto_generated.q_a[6]
7115 
q_a[7] <= altsyncram_tr91:auto_generated.q_a[7]
7116 
q_b[0] <=
7117 
eccstatus[0] <=
7118 
eccstatus[1] <=
7119 
eccstatus[2] <=
7120 
 
7121 
 
7122 
|z80soc|rom:rom_inst|altsyncram:altsyncram_component|altsyncram_tr91:auto_generated
7123 
address_a[0] => ram_block1a0.PORTAADDR
7124 
address_a[0] => ram_block1a1.PORTAADDR
7125 
address_a[0] => ram_block1a2.PORTAADDR
7126 
address_a[0] => ram_block1a3.PORTAADDR
7127 
address_a[0] => ram_block1a4.PORTAADDR
7128 
address_a[0] => ram_block1a5.PORTAADDR
7129 
address_a[0] => ram_block1a6.PORTAADDR
7130 
address_a[0] => ram_block1a7.PORTAADDR
7131 
address_a[0] => ram_block1a8.PORTAADDR
7132 
address_a[0] => ram_block1a9.PORTAADDR
7133 
address_a[0] => ram_block1a10.PORTAADDR
7134 
address_a[0] => ram_block1a11.PORTAADDR
7135 
address_a[0] => ram_block1a12.PORTAADDR
7136 
address_a[0] => ram_block1a13.PORTAADDR
7137 
address_a[0] => ram_block1a14.PORTAADDR
7138 
address_a[0] => ram_block1a15.PORTAADDR
7139 
address_a[0] => ram_block1a16.PORTAADDR
7140 
address_a[0] => ram_block1a17.PORTAADDR
7141 
address_a[0] => ram_block1a18.PORTAADDR
7142 
address_a[0] => ram_block1a19.PORTAADDR
7143 
address_a[0] => ram_block1a20.PORTAADDR
7144 
address_a[0] => ram_block1a21.PORTAADDR
7145 
address_a[0] => ram_block1a22.PORTAADDR
7146 
address_a[0] => ram_block1a23.PORTAADDR
7147 
address_a[0] => ram_block1a24.PORTAADDR
7148 
address_a[0] => ram_block1a25.PORTAADDR
7149 
address_a[0] => ram_block1a26.PORTAADDR
7150 
address_a[0] => ram_block1a27.PORTAADDR
7151 
address_a[0] => ram_block1a28.PORTAADDR
7152 
address_a[0] => ram_block1a29.PORTAADDR
7153 
address_a[0] => ram_block1a30.PORTAADDR
7154 
address_a[0] => ram_block1a31.PORTAADDR
7155 
address_a[1] => ram_block1a0.PORTAADDR1
7156 
address_a[1] => ram_block1a1.PORTAADDR1
7157 
address_a[1] => ram_block1a2.PORTAADDR1
7158 
address_a[1] => ram_block1a3.PORTAADDR1
7159 
address_a[1] => ram_block1a4.PORTAADDR1
7160 
address_a[1] => ram_block1a5.PORTAADDR1
7161 
address_a[1] => ram_block1a6.PORTAADDR1
7162 
address_a[1] => ram_block1a7.PORTAADDR1
7163 
address_a[1] => ram_block1a8.PORTAADDR1
7164 
address_a[1] => ram_block1a9.PORTAADDR1
7165 
address_a[1] => ram_block1a10.PORTAADDR1
7166 
address_a[1] => ram_block1a11.PORTAADDR1
7167 
address_a[1] => ram_block1a12.PORTAADDR1
7168 
address_a[1] => ram_block1a13.PORTAADDR1
7169 
address_a[1] => ram_block1a14.PORTAADDR1
7170 
address_a[1] => ram_block1a15.PORTAADDR1
7171 
address_a[1] => ram_block1a16.PORTAADDR1
7172 
address_a[1] => ram_block1a17.PORTAADDR1
7173 
address_a[1] => ram_block1a18.PORTAADDR1
7174 
address_a[1] => ram_block1a19.PORTAADDR1
7175 
address_a[1] => ram_block1a20.PORTAADDR1
7176 
address_a[1] => ram_block1a21.PORTAADDR1
7177 
address_a[1] => ram_block1a22.PORTAADDR1
7178 
address_a[1] => ram_block1a23.PORTAADDR1
7179 
address_a[1] => ram_block1a24.PORTAADDR1
7180 
address_a[1] => ram_block1a25.PORTAADDR1
7181 
address_a[1] => ram_block1a26.PORTAADDR1
7182 
address_a[1] => ram_block1a27.PORTAADDR1
7183 
address_a[1] => ram_block1a28.PORTAADDR1
7184 
address_a[1] => ram_block1a29.PORTAADDR1
7185 
address_a[1] => ram_block1a30.PORTAADDR1
7186 
address_a[1] => ram_block1a31.PORTAADDR1
7187 
address_a[2] => ram_block1a0.PORTAADDR2
7188 
address_a[2] => ram_block1a1.PORTAADDR2
7189 
address_a[2] => ram_block1a2.PORTAADDR2
7190 
address_a[2] => ram_block1a3.PORTAADDR2
7191 
address_a[2] => ram_block1a4.PORTAADDR2
7192 
address_a[2] => ram_block1a5.PORTAADDR2
7193 
address_a[2] => ram_block1a6.PORTAADDR2
7194 
address_a[2] => ram_block1a7.PORTAADDR2
7195 
address_a[2] => ram_block1a8.PORTAADDR2
7196 
address_a[2] => ram_block1a9.PORTAADDR2
7197 
address_a[2] => ram_block1a10.PORTAADDR2
7198 
address_a[2] => ram_block1a11.PORTAADDR2
7199 
address_a[2] => ram_block1a12.PORTAADDR2
7200 
address_a[2] => ram_block1a13.PORTAADDR2
7201 
address_a[2] => ram_block1a14.PORTAADDR2
7202 
address_a[2] => ram_block1a15.PORTAADDR2
7203 
address_a[2] => ram_block1a16.PORTAADDR2
7204 
address_a[2] => ram_block1a17.PORTAADDR2
7205 
address_a[2] => ram_block1a18.PORTAADDR2
7206 
address_a[2] => ram_block1a19.PORTAADDR2
7207 
address_a[2] => ram_block1a20.PORTAADDR2
7208 
address_a[2] => ram_block1a21.PORTAADDR2
7209 
address_a[2] => ram_block1a22.PORTAADDR2
7210 
address_a[2] => ram_block1a23.PORTAADDR2
7211 
address_a[2] => ram_block1a24.PORTAADDR2
7212 
address_a[2] => ram_block1a25.PORTAADDR2
7213 
address_a[2] => ram_block1a26.PORTAADDR2
7214 
address_a[2] => ram_block1a27.PORTAADDR2
7215 
address_a[2] => ram_block1a28.PORTAADDR2
7216 
address_a[2] => ram_block1a29.PORTAADDR2
7217 
address_a[2] => ram_block1a30.PORTAADDR2
7218 
address_a[2] => ram_block1a31.PORTAADDR2
7219 
address_a[3] => ram_block1a0.PORTAADDR3
7220 
address_a[3] => ram_block1a1.PORTAADDR3
7221 
address_a[3] => ram_block1a2.PORTAADDR3
7222 
address_a[3] => ram_block1a3.PORTAADDR3
7223 
address_a[3] => ram_block1a4.PORTAADDR3
7224 
address_a[3] => ram_block1a5.PORTAADDR3
7225 
address_a[3] => ram_block1a6.PORTAADDR3
7226 
address_a[3] => ram_block1a7.PORTAADDR3
7227 
address_a[3] => ram_block1a8.PORTAADDR3
7228 
address_a[3] => ram_block1a9.PORTAADDR3
7229 
address_a[3] => ram_block1a10.PORTAADDR3
7230 
address_a[3] => ram_block1a11.PORTAADDR3
7231 
address_a[3] => ram_block1a12.PORTAADDR3
7232 
address_a[3] => ram_block1a13.PORTAADDR3
7233 
address_a[3] => ram_block1a14.PORTAADDR3
7234 
address_a[3] => ram_block1a15.PORTAADDR3
7235 
address_a[3] => ram_block1a16.PORTAADDR3
7236 
address_a[3] => ram_block1a17.PORTAADDR3
7237 
address_a[3] => ram_block1a18.PORTAADDR3
7238 
address_a[3] => ram_block1a19.PORTAADDR3
7239 
address_a[3] => ram_block1a20.PORTAADDR3
7240 
address_a[3] => ram_block1a21.PORTAADDR3
7241 
address_a[3] => ram_block1a22.PORTAADDR3
7242 
address_a[3] => ram_block1a23.PORTAADDR3
7243 
address_a[3] => ram_block1a24.PORTAADDR3
7244 
address_a[3] => ram_block1a25.PORTAADDR3
7245 
address_a[3] => ram_block1a26.PORTAADDR3
7246 
address_a[3] => ram_block1a27.PORTAADDR3
7247 
address_a[3] => ram_block1a28.PORTAADDR3
7248 
address_a[3] => ram_block1a29.PORTAADDR3
7249 
address_a[3] => ram_block1a30.PORTAADDR3
7250 
address_a[3] => ram_block1a31.PORTAADDR3
7251 
address_a[4] => ram_block1a0.PORTAADDR4
7252 
address_a[4] => ram_block1a1.PORTAADDR4
7253 
address_a[4] => ram_block1a2.PORTAADDR4
7254 
address_a[4] => ram_block1a3.PORTAADDR4
7255 
address_a[4] => ram_block1a4.PORTAADDR4
7256 
address_a[4] => ram_block1a5.PORTAADDR4
7257 
address_a[4] => ram_block1a6.PORTAADDR4
7258 
address_a[4] => ram_block1a7.PORTAADDR4
7259 
address_a[4] => ram_block1a8.PORTAADDR4
7260 
address_a[4] => ram_block1a9.PORTAADDR4
7261 
address_a[4] => ram_block1a10.PORTAADDR4
7262 
address_a[4] => ram_block1a11.PORTAADDR4
7263 
address_a[4] => ram_block1a12.PORTAADDR4
7264 
address_a[4] => ram_block1a13.PORTAADDR4
7265 
address_a[4] => ram_block1a14.PORTAADDR4
7266 
address_a[4] => ram_block1a15.PORTAADDR4
7267 
address_a[4] => ram_block1a16.PORTAADDR4
7268 
address_a[4] => ram_block1a17.PORTAADDR4
7269 
address_a[4] => ram_block1a18.PORTAADDR4
7270 
address_a[4] => ram_block1a19.PORTAADDR4
7271 
address_a[4] => ram_block1a20.PORTAADDR4
7272 
address_a[4] => ram_block1a21.PORTAADDR4
7273 
address_a[4] => ram_block1a22.PORTAADDR4
7274 
address_a[4] => ram_block1a23.PORTAADDR4
7275 
address_a[4] => ram_block1a24.PORTAADDR4
7276 
address_a[4] => ram_block1a25.PORTAADDR4
7277 
address_a[4] => ram_block1a26.PORTAADDR4
7278 
address_a[4] => ram_block1a27.PORTAADDR4
7279 
address_a[4] => ram_block1a28.PORTAADDR4
7280 
address_a[4] => ram_block1a29.PORTAADDR4
7281 
address_a[4] => ram_block1a30.PORTAADDR4
7282 
address_a[4] => ram_block1a31.PORTAADDR4
7283 
address_a[5] => ram_block1a0.PORTAADDR5
7284 
address_a[5] => ram_block1a1.PORTAADDR5
7285 
address_a[5] => ram_block1a2.PORTAADDR5
7286 
address_a[5] => ram_block1a3.PORTAADDR5
7287 
address_a[5] => ram_block1a4.PORTAADDR5
7288 
address_a[5] => ram_block1a5.PORTAADDR5
7289 
address_a[5] => ram_block1a6.PORTAADDR5
7290 
address_a[5] => ram_block1a7.PORTAADDR5
7291 
address_a[5] => ram_block1a8.PORTAADDR5
7292 
address_a[5] => ram_block1a9.PORTAADDR5
7293 
address_a[5] => ram_block1a10.PORTAADDR5
7294 
address_a[5] => ram_block1a11.PORTAADDR5
7295 
address_a[5] => ram_block1a12.PORTAADDR5
7296 
address_a[5] => ram_block1a13.PORTAADDR5
7297 
address_a[5] => ram_block1a14.PORTAADDR5
7298 
address_a[5] => ram_block1a15.PORTAADDR5
7299 
address_a[5] => ram_block1a16.PORTAADDR5
7300 
address_a[5] => ram_block1a17.PORTAADDR5
7301 
address_a[5] => ram_block1a18.PORTAADDR5
7302 
address_a[5] => ram_block1a19.PORTAADDR5
7303 
address_a[5] => ram_block1a20.PORTAADDR5
7304 
address_a[5] => ram_block1a21.PORTAADDR5
7305 
address_a[5] => ram_block1a22.PORTAADDR5
7306 
address_a[5] => ram_block1a23.PORTAADDR5
7307 
address_a[5] => ram_block1a24.PORTAADDR5
7308 
address_a[5] => ram_block1a25.PORTAADDR5
7309 
address_a[5] => ram_block1a26.PORTAADDR5
7310 
address_a[5] => ram_block1a27.PORTAADDR5
7311 
address_a[5] => ram_block1a28.PORTAADDR5
7312 
address_a[5] => ram_block1a29.PORTAADDR5
7313 
address_a[5] => ram_block1a30.PORTAADDR5
7314 
address_a[5] => ram_block1a31.PORTAADDR5
7315 
address_a[6] => ram_block1a0.PORTAADDR6
7316 
address_a[6] => ram_block1a1.PORTAADDR6
7317 
address_a[6] => ram_block1a2.PORTAADDR6
7318 
address_a[6] => ram_block1a3.PORTAADDR6
7319 
address_a[6] => ram_block1a4.PORTAADDR6
7320 
address_a[6] => ram_block1a5.PORTAADDR6
7321 
address_a[6] => ram_block1a6.PORTAADDR6
7322 
address_a[6] => ram_block1a7.PORTAADDR6
7323 
address_a[6] => ram_block1a8.PORTAADDR6
7324 
address_a[6] => ram_block1a9.PORTAADDR6
7325 
address_a[6] => ram_block1a10.PORTAADDR6
7326 
address_a[6] => ram_block1a11.PORTAADDR6
7327 
address_a[6] => ram_block1a12.PORTAADDR6
7328 
address_a[6] => ram_block1a13.PORTAADDR6
7329 
address_a[6] => ram_block1a14.PORTAADDR6
7330 
address_a[6] => ram_block1a15.PORTAADDR6
7331 
address_a[6] => ram_block1a16.PORTAADDR6
7332 
address_a[6] => ram_block1a17.PORTAADDR6
7333 
address_a[6] => ram_block1a18.PORTAADDR6
7334 
address_a[6] => ram_block1a19.PORTAADDR6
7335 
address_a[6] => ram_block1a20.PORTAADDR6
7336 
address_a[6] => ram_block1a21.PORTAADDR6
7337 
address_a[6] => ram_block1a22.PORTAADDR6
7338 
address_a[6] => ram_block1a23.PORTAADDR6
7339 
address_a[6] => ram_block1a24.PORTAADDR6
7340 
address_a[6] => ram_block1a25.PORTAADDR6
7341 
address_a[6] => ram_block1a26.PORTAADDR6
7342 
address_a[6] => ram_block1a27.PORTAADDR6
7343 
address_a[6] => ram_block1a28.PORTAADDR6
7344 
address_a[6] => ram_block1a29.PORTAADDR6
7345 
address_a[6] => ram_block1a30.PORTAADDR6
7346 
address_a[6] => ram_block1a31.PORTAADDR6
7347 
address_a[7] => ram_block1a0.PORTAADDR7
7348 
address_a[7] => ram_block1a1.PORTAADDR7
7349 
address_a[7] => ram_block1a2.PORTAADDR7
7350 
address_a[7] => ram_block1a3.PORTAADDR7
7351 
address_a[7] => ram_block1a4.PORTAADDR7
7352 
address_a[7] => ram_block1a5.PORTAADDR7
7353 
address_a[7] => ram_block1a6.PORTAADDR7
7354 
address_a[7] => ram_block1a7.PORTAADDR7
7355 
address_a[7] => ram_block1a8.PORTAADDR7
7356 
address_a[7] => ram_block1a9.PORTAADDR7
7357 
address_a[7] => ram_block1a10.PORTAADDR7
7358 
address_a[7] => ram_block1a11.PORTAADDR7
7359 
address_a[7] => ram_block1a12.PORTAADDR7
7360 
address_a[7] => ram_block1a13.PORTAADDR7
7361 
address_a[7] => ram_block1a14.PORTAADDR7
7362 
address_a[7] => ram_block1a15.PORTAADDR7
7363 
address_a[7] => ram_block1a16.PORTAADDR7
7364 
address_a[7] => ram_block1a17.PORTAADDR7
7365 
address_a[7] => ram_block1a18.PORTAADDR7
7366 
address_a[7] => ram_block1a19.PORTAADDR7
7367 
address_a[7] => ram_block1a20.PORTAADDR7
7368 
address_a[7] => ram_block1a21.PORTAADDR7
7369 
address_a[7] => ram_block1a22.PORTAADDR7
7370 
address_a[7] => ram_block1a23.PORTAADDR7
7371 
address_a[7] => ram_block1a24.PORTAADDR7
7372 
address_a[7] => ram_block1a25.PORTAADDR7
7373 
address_a[7] => ram_block1a26.PORTAADDR7
7374 
address_a[7] => ram_block1a27.PORTAADDR7
7375 
address_a[7] => ram_block1a28.PORTAADDR7
7376 
address_a[7] => ram_block1a29.PORTAADDR7
7377 
address_a[7] => ram_block1a30.PORTAADDR7
7378 
address_a[7] => ram_block1a31.PORTAADDR7
7379 
address_a[8] => ram_block1a0.PORTAADDR8
7380 
address_a[8] => ram_block1a1.PORTAADDR8
7381 
address_a[8] => ram_block1a2.PORTAADDR8
7382 
address_a[8] => ram_block1a3.PORTAADDR8
7383 
address_a[8] => ram_block1a4.PORTAADDR8
7384 
address_a[8] => ram_block1a5.PORTAADDR8
7385 
address_a[8] => ram_block1a6.PORTAADDR8
7386 
address_a[8] => ram_block1a7.PORTAADDR8
7387 
address_a[8] => ram_block1a8.PORTAADDR8
7388 
address_a[8] => ram_block1a9.PORTAADDR8
7389 
address_a[8] => ram_block1a10.PORTAADDR8
7390 
address_a[8] => ram_block1a11.PORTAADDR8
7391 
address_a[8] => ram_block1a12.PORTAADDR8
7392 
address_a[8] => ram_block1a13.PORTAADDR8
7393 
address_a[8] => ram_block1a14.PORTAADDR8
7394 
address_a[8] => ram_block1a15.PORTAADDR8
7395 
address_a[8] => ram_block1a16.PORTAADDR8
7396 
address_a[8] => ram_block1a17.PORTAADDR8
7397 
address_a[8] => ram_block1a18.PORTAADDR8
7398 
address_a[8] => ram_block1a19.PORTAADDR8
7399 
address_a[8] => ram_block1a20.PORTAADDR8
7400 
address_a[8] => ram_block1a21.PORTAADDR8
7401 
address_a[8] => ram_block1a22.PORTAADDR8
7402 
address_a[8] => ram_block1a23.PORTAADDR8
7403 
address_a[8] => ram_block1a24.PORTAADDR8
7404 
address_a[8] => ram_block1a25.PORTAADDR8
7405 
address_a[8] => ram_block1a26.PORTAADDR8
7406 
address_a[8] => ram_block1a27.PORTAADDR8
7407 
address_a[8] => ram_block1a28.PORTAADDR8
7408 
address_a[8] => ram_block1a29.PORTAADDR8
7409 
address_a[8] => ram_block1a30.PORTAADDR8
7410 
address_a[8] => ram_block1a31.PORTAADDR8
7411 
address_a[9] => ram_block1a0.PORTAADDR9
7412 
address_a[9] => ram_block1a1.PORTAADDR9
7413 
address_a[9] => ram_block1a2.PORTAADDR9
7414 
address_a[9] => ram_block1a3.PORTAADDR9
7415 
address_a[9] => ram_block1a4.PORTAADDR9
7416 
address_a[9] => ram_block1a5.PORTAADDR9
7417 
address_a[9] => ram_block1a6.PORTAADDR9
7418 
address_a[9] => ram_block1a7.PORTAADDR9
7419 
address_a[9] => ram_block1a8.PORTAADDR9
7420 
address_a[9] => ram_block1a9.PORTAADDR9
7421 
address_a[9] => ram_block1a10.PORTAADDR9
7422 
address_a[9] => ram_block1a11.PORTAADDR9
7423 
address_a[9] => ram_block1a12.PORTAADDR9
7424 
address_a[9] => ram_block1a13.PORTAADDR9
7425 
address_a[9] => ram_block1a14.PORTAADDR9
7426 
address_a[9] => ram_block1a15.PORTAADDR9
7427 
address_a[9] => ram_block1a16.PORTAADDR9
7428 
address_a[9] => ram_block1a17.PORTAADDR9
7429 
address_a[9] => ram_block1a18.PORTAADDR9
7430 
address_a[9] => ram_block1a19.PORTAADDR9
7431 
address_a[9] => ram_block1a20.PORTAADDR9
7432 
address_a[9] => ram_block1a21.PORTAADDR9
7433 
address_a[9] => ram_block1a22.PORTAADDR9
7434 
address_a[9] => ram_block1a23.PORTAADDR9
7435 
address_a[9] => ram_block1a24.PORTAADDR9
7436 
address_a[9] => ram_block1a25.PORTAADDR9
7437 
address_a[9] => ram_block1a26.PORTAADDR9
7438 
address_a[9] => ram_block1a27.PORTAADDR9
7439 
address_a[9] => ram_block1a28.PORTAADDR9
7440 
address_a[9] => ram_block1a29.PORTAADDR9
7441 
address_a[9] => ram_block1a30.PORTAADDR9
7442 
address_a[9] => ram_block1a31.PORTAADDR9
7443 
address_a[10] => ram_block1a0.PORTAADDR10
7444 
address_a[10] => ram_block1a1.PORTAADDR10
7445 
address_a[10] => ram_block1a2.PORTAADDR10
7446 
address_a[10] => ram_block1a3.PORTAADDR10
7447 
address_a[10] => ram_block1a4.PORTAADDR10
7448 
address_a[10] => ram_block1a5.PORTAADDR10
7449 
address_a[10] => ram_block1a6.PORTAADDR10
7450 
address_a[10] => ram_block1a7.PORTAADDR10
7451 
address_a[10] => ram_block1a8.PORTAADDR10
7452 
address_a[10] => ram_block1a9.PORTAADDR10
7453 
address_a[10] => ram_block1a10.PORTAADDR10
7454 
address_a[10] => ram_block1a11.PORTAADDR10
7455 
address_a[10] => ram_block1a12.PORTAADDR10
7456 
address_a[10] => ram_block1a13.PORTAADDR10
7457 
address_a[10] => ram_block1a14.PORTAADDR10
7458 
address_a[10] => ram_block1a15.PORTAADDR10
7459 
address_a[10] => ram_block1a16.PORTAADDR10
7460 
address_a[10] => ram_block1a17.PORTAADDR10
7461 
address_a[10] => ram_block1a18.PORTAADDR10
7462 
address_a[10] => ram_block1a19.PORTAADDR10
7463 
address_a[10] => ram_block1a20.PORTAADDR10
7464 
address_a[10] => ram_block1a21.PORTAADDR10
7465 
address_a[10] => ram_block1a22.PORTAADDR10
7466 
address_a[10] => ram_block1a23.PORTAADDR10
7467 
address_a[10] => ram_block1a24.PORTAADDR10
7468 
address_a[10] => ram_block1a25.PORTAADDR10
7469 
address_a[10] => ram_block1a26.PORTAADDR10
7470 
address_a[10] => ram_block1a27.PORTAADDR10
7471 
address_a[10] => ram_block1a28.PORTAADDR10
7472 
address_a[10] => ram_block1a29.PORTAADDR10
7473 
address_a[10] => ram_block1a30.PORTAADDR10
7474 
address_a[10] => ram_block1a31.PORTAADDR10
7475 
address_a[11] => ram_block1a0.PORTAADDR11
7476 
address_a[11] => ram_block1a1.PORTAADDR11
7477 
address_a[11] => ram_block1a2.PORTAADDR11
7478 
address_a[11] => ram_block1a3.PORTAADDR11
7479 
address_a[11] => ram_block1a4.PORTAADDR11
7480 
address_a[11] => ram_block1a5.PORTAADDR11
7481 
address_a[11] => ram_block1a6.PORTAADDR11
7482 
address_a[11] => ram_block1a7.PORTAADDR11
7483 
address_a[11] => ram_block1a8.PORTAADDR11
7484 
address_a[11] => ram_block1a9.PORTAADDR11
7485 
address_a[11] => ram_block1a10.PORTAADDR11
7486 
address_a[11] => ram_block1a11.PORTAADDR11
7487 
address_a[11] => ram_block1a12.PORTAADDR11
7488 
address_a[11] => ram_block1a13.PORTAADDR11
7489 
address_a[11] => ram_block1a14.PORTAADDR11
7490 
address_a[11] => ram_block1a15.PORTAADDR11
7491 
address_a[11] => ram_block1a16.PORTAADDR11
7492 
address_a[11] => ram_block1a17.PORTAADDR11
7493 
address_a[11] => ram_block1a18.PORTAADDR11
7494 
address_a[11] => ram_block1a19.PORTAADDR11
7495 
address_a[11] => ram_block1a20.PORTAADDR11
7496 
address_a[11] => ram_block1a21.PORTAADDR11
7497 
address_a[11] => ram_block1a22.PORTAADDR11
7498 
address_a[11] => ram_block1a23.PORTAADDR11
7499 
address_a[11] => ram_block1a24.PORTAADDR11
7500 
address_a[11] => ram_block1a25.PORTAADDR11
7501 
address_a[11] => ram_block1a26.PORTAADDR11
7502 
address_a[11] => ram_block1a27.PORTAADDR11
7503 
address_a[11] => ram_block1a28.PORTAADDR11
7504 
address_a[11] => ram_block1a29.PORTAADDR11
7505 
address_a[11] => ram_block1a30.PORTAADDR11
7506 
address_a[11] => ram_block1a31.PORTAADDR11
7507 
address_a[12] => address_reg_a[0].DATAIN
7508 
address_a[12] => decode_4oa:deep_decode.data[0]
7509 
address_a[13] => address_reg_a[1].DATAIN
7510 
address_a[13] => decode_4oa:deep_decode.data[1]
7511 
clock0 => ram_block1a0.CLK0
7512 
clock0 => ram_block1a1.CLK0
7513 
clock0 => ram_block1a2.CLK0
7514 
clock0 => ram_block1a3.CLK0
7515 
clock0 => ram_block1a4.CLK0
7516 
clock0 => ram_block1a5.CLK0
7517 
clock0 => ram_block1a6.CLK0
7518 
clock0 => ram_block1a7.CLK0
7519 
clock0 => ram_block1a8.CLK0
7520 
clock0 => ram_block1a9.CLK0
7521 
clock0 => ram_block1a10.CLK0
7522 
clock0 => ram_block1a11.CLK0
7523 
clock0 => ram_block1a12.CLK0
7524 
clock0 => ram_block1a13.CLK0
7525 
clock0 => ram_block1a14.CLK0
7526 
clock0 => ram_block1a15.CLK0
7527 
clock0 => ram_block1a16.CLK0
7528 
clock0 => ram_block1a17.CLK0
7529 
clock0 => ram_block1a18.CLK0
7530 
clock0 => ram_block1a19.CLK0
7531 
clock0 => ram_block1a20.CLK0
7532 
clock0 => ram_block1a21.CLK0
7533 
clock0 => ram_block1a22.CLK0
7534 
clock0 => ram_block1a23.CLK0
7535 
clock0 => ram_block1a24.CLK0
7536 
clock0 => ram_block1a25.CLK0
7537 
clock0 => ram_block1a26.CLK0
7538 
clock0 => ram_block1a27.CLK0
7539 
clock0 => ram_block1a28.CLK0
7540 
clock0 => ram_block1a29.CLK0
7541 
clock0 => ram_block1a30.CLK0
7542 
clock0 => ram_block1a31.CLK0
7543 
clock0 => address_reg_a[1].CLK
7544 
clock0 => address_reg_a[0].CLK
7545 
clock0 => out_address_reg_a[1].CLK
7546 
clock0 => out_address_reg_a[0].CLK
7547 
q_a[0] <= mux_kib:mux2.result[0]
7548 
q_a[1] <= mux_kib:mux2.result[1]
7549 
q_a[2] <= mux_kib:mux2.result[2]
7550 
q_a[3] <= mux_kib:mux2.result[3]
7551 
q_a[4] <= mux_kib:mux2.result[4]
7552 
q_a[5] <= mux_kib:mux2.result[5]
7553 
q_a[6] <= mux_kib:mux2.result[6]
7554 
q_a[7] <= mux_kib:mux2.result[7]
7555 
 
7556 
 
7557 
|z80soc|rom:rom_inst|altsyncram:altsyncram_component|altsyncram_tr91:auto_generated|decode_4oa:deep_decode
7558 
data[0] => w_anode141w[1].IN0
7559 
data[0] => w_anode154w[1].IN1
7560 
data[0] => w_anode162w[1].IN0
7561 
data[0] => w_anode170w[1].IN1
7562 
data[1] => w_anode141w[2].IN0
7563 
data[1] => w_anode154w[2].IN0
7564 
data[1] => w_anode162w[2].IN1
7565 
data[1] => w_anode170w[2].IN1
7566 
enable => w_anode141w[1].IN0
7567 
enable => w_anode154w[1].IN0
7568 
enable => w_anode162w[1].IN0
7569 
enable => w_anode170w[1].IN0
7570 
eq[0] <= w_anode141w[2].DB_MAX_OUTPUT_PORT_TYPE
7571 
eq[1] <= w_anode154w[2].DB_MAX_OUTPUT_PORT_TYPE
7572 
eq[2] <= w_anode162w[2].DB_MAX_OUTPUT_PORT_TYPE
7573 
eq[3] <= w_anode170w[2].DB_MAX_OUTPUT_PORT_TYPE
7574 
 
7575 
 
7576 
|z80soc|rom:rom_inst|altsyncram:altsyncram_component|altsyncram_tr91:auto_generated|mux_kib:mux2
7577 
data[0] => _.IN0
7578 
data[0] => _.IN0
7579 
data[1] => _.IN0
7580 
data[1] => _.IN0
7581 
data[2] => _.IN0
7582 
data[2] => _.IN0
7583 
data[3] => _.IN0
7584 
data[3] => _.IN0
7585 
data[4] => _.IN0
7586 
data[4] => _.IN0
7587 
data[5] => _.IN0
7588 
data[5] => _.IN0
7589 
data[6] => _.IN0
7590 
data[6] => _.IN0
7591 
data[7] => _.IN0
7592 
data[7] => _.IN0
7593 
data[8] => _.IN0
7594 
data[9] => _.IN0
7595 
data[10] => _.IN0
7596 
data[11] => _.IN0
7597 
data[12] => _.IN0
7598 
data[13] => _.IN0
7599 
data[14] => _.IN0
7600 
data[15] => _.IN0
7601 
data[16] => _.IN1
7602 
data[16] => _.IN1
7603 
data[17] => _.IN1
7604 
data[17] => _.IN1
7605 
data[18] => _.IN1
7606 
data[18] => _.IN1
7607 
data[19] => _.IN1
7608 
data[19] => _.IN1
7609 
data[20] => _.IN1
7610 
data[20] => _.IN1
7611 
data[21] => _.IN1
7612 
data[21] => _.IN1
7613 
data[22] => _.IN1
7614 
data[22] => _.IN1
7615 
data[23] => _.IN1
7616 
data[23] => _.IN1
7617 
data[24] => _.IN0
7618 
data[25] => _.IN0
7619 
data[26] => _.IN0
7620 
data[27] => _.IN0
7621 
data[28] => _.IN0
7622 
data[29] => _.IN0
7623 
data[30] => _.IN0
7624 
data[31] => _.IN0
7625 
result[0] <= result_node[0].DB_MAX_OUTPUT_PORT_TYPE
7626 
result[1] <= result_node[1].DB_MAX_OUTPUT_PORT_TYPE
7627 
result[2] <= result_node[2].DB_MAX_OUTPUT_PORT_TYPE
7628 
result[3] <= result_node[3].DB_MAX_OUTPUT_PORT_TYPE
7629 
result[4] <= result_node[4].DB_MAX_OUTPUT_PORT_TYPE
7630 
result[5] <= result_node[5].DB_MAX_OUTPUT_PORT_TYPE
7631 
result[6] <= result_node[6].DB_MAX_OUTPUT_PORT_TYPE
7632 
result[7] <= result_node[7].DB_MAX_OUTPUT_PORT_TYPE
7633 
sel[0] => _.IN1
7634 
sel[0] => _.IN0
7635 
sel[0] => _.IN0
7636 
sel[0] => _.IN0
7637 
sel[0] => _.IN0
7638 
sel[0] => _.IN0
7639 
sel[0] => _.IN1
7640 
sel[0] => _.IN0
7641 
sel[0] => _.IN0
7642 
sel[0] => _.IN0
7643 
sel[0] => _.IN0
7644 
sel[0] => _.IN0
7645 
sel[0] => _.IN1
7646 
sel[0] => _.IN0
7647 
sel[0] => _.IN0
7648 
sel[0] => _.IN0
7649 
sel[0] => _.IN0
7650 
sel[0] => _.IN0
7651 
sel[0] => _.IN1
7652 
sel[0] => _.IN0
7653 
sel[0] => _.IN0
7654 
sel[0] => _.IN0
7655 
sel[0] => _.IN0
7656 
sel[0] => _.IN0
7657 
sel[0] => _.IN1
7658 
sel[0] => _.IN0
7659 
sel[0] => _.IN0
7660 
sel[0] => _.IN0
7661 
sel[0] => _.IN0
7662 
sel[0] => _.IN0
7663 
sel[0] => _.IN1
7664 
sel[0] => _.IN0
7665 
sel[0] => _.IN0
7666 
sel[0] => _.IN0
7667 
sel[0] => _.IN0
7668 
sel[0] => _.IN0
7669 
sel[0] => _.IN1
7670 
sel[0] => _.IN0
7671 
sel[0] => _.IN0
7672 
sel[0] => _.IN0
7673 
sel[0] => _.IN0
7674 
sel[0] => _.IN0
7675 
sel[0] => _.IN1
7676 
sel[0] => _.IN0
7677 
sel[0] => _.IN0
7678 
sel[0] => _.IN0
7679 
sel[0] => _.IN0
7680 
sel[0] => _.IN0
7681 
sel[1] => _.IN0
7682 
sel[1] => _.IN0
7683 
sel[1] => _.IN0
7684 
sel[1] => _.IN0
7685 
sel[1] => _.IN0
7686 
sel[1] => _.IN0
7687 
sel[1] => _.IN0
7688 
sel[1] => _.IN0
7689 
sel[1] => _.IN0
7690 
sel[1] => _.IN0
7691 
sel[1] => _.IN0
7692 
sel[1] => _.IN0
7693 
sel[1] => _.IN0
7694 
sel[1] => _.IN0
7695 
sel[1] => _.IN0
7696 
sel[1] => _.IN0
7697 
sel[1] => _.IN0
7698 
sel[1] => _.IN0
7699 
sel[1] => _.IN0
7700 
sel[1] => _.IN0
7701 
sel[1] => _.IN0
7702 
sel[1] => _.IN0
7703 
sel[1] => _.IN0
7704 
sel[1] => _.IN0
7705 
sel[1] => _.IN0
7706 
sel[1] => _.IN0
7707 
sel[1] => _.IN0
7708 
sel[1] => _.IN0
7709 
sel[1] => _.IN0
7710 
sel[1] => _.IN0
7711 
sel[1] => _.IN0
7712 
sel[1] => _.IN0
7713 
 
7714 
 
7715 
|z80soc|clk_div:clkdiv_inst
7716 
clock_in_50Mhz => clock_357Mhz_int.CLK
7717 
clock_in_50Mhz => count_357Mhz[0].CLK
7718 
clock_in_50Mhz => count_357Mhz[1].CLK
7719 
clock_in_50Mhz => count_357Mhz[2].CLK
7720 
clock_in_50Mhz => count_357Mhz[3].CLK
7721 
clock_in_50Mhz => clock_10Mhz_int.CLK
7722 
clock_in_50Mhz => count_10Mhz[0].CLK
7723 
clock_in_50Mhz => count_10Mhz[1].CLK
7724 
clock_in_50Mhz => count_10Mhz[2].CLK
7725 
clock_in_50Mhz => clock_1Hz~reg0.CLK
7726 
clock_in_50Mhz => clock_10Hz~reg0.CLK
7727 
clock_in_50Mhz => clock_100Hz~reg0.CLK
7728 
clock_in_50Mhz => clock_1KHz~reg0.CLK
7729 
clock_in_50Mhz => clock_10KHz~reg0.CLK
7730 
clock_in_50Mhz => clock_100KHz~reg0.CLK
7731 
clock_in_50Mhz => clock_1MHz~reg0.CLK
7732 
clock_in_50Mhz => clock_357Mhz~reg0.CLK
7733 
clock_in_50Mhz => clock_10MHz~reg0.CLK
7734 
clock_in_50Mhz => clock_25MHz~reg0.CLK
7735 
clock_in_50Mhz => clock_25Mhz_int.CLK
7736 
clock_25MHz <= clock_25MHz~reg0.DB_MAX_OUTPUT_PORT_TYPE
7737 
clock_10MHz <= clock_10MHz~reg0.DB_MAX_OUTPUT_PORT_TYPE
7738 
clock_357Mhz <= clock_357Mhz~reg0.DB_MAX_OUTPUT_PORT_TYPE
7739 
clock_1MHz <= clock_1MHz~reg0.DB_MAX_OUTPUT_PORT_TYPE
7740 
clock_100KHz <= clock_100KHz~reg0.DB_MAX_OUTPUT_PORT_TYPE
7741 
clock_10KHz <= clock_10KHz~reg0.DB_MAX_OUTPUT_PORT_TYPE
7742 
clock_1KHz <= clock_1KHz~reg0.DB_MAX_OUTPUT_PORT_TYPE
7743 
clock_100Hz <= clock_100Hz~reg0.DB_MAX_OUTPUT_PORT_TYPE
7744 
clock_10Hz <= clock_10Hz~reg0.DB_MAX_OUTPUT_PORT_TYPE
7745 
clock_1Hz <= clock_1Hz~reg0.DB_MAX_OUTPUT_PORT_TYPE
7746 
 
7747 
 
7748 
|z80soc|decoder_7seg:DISPHEX0
7749 
NUMBER[0] => Mux0.IN19
7750 
NUMBER[0] => Mux1.IN19
7751 
NUMBER[0] => Mux2.IN19
7752 
NUMBER[0] => Mux3.IN19
7753 
NUMBER[0] => Mux4.IN19
7754 
NUMBER[0] => Mux5.IN19
7755 
NUMBER[0] => Mux6.IN19
7756 
NUMBER[1] => Mux0.IN18
7757 
NUMBER[1] => Mux1.IN18
7758 
NUMBER[1] => Mux2.IN18
7759 
NUMBER[1] => Mux3.IN18
7760 
NUMBER[1] => Mux4.IN18
7761 
NUMBER[1] => Mux5.IN18
7762 
NUMBER[1] => Mux6.IN18
7763 
NUMBER[2] => Mux0.IN17
7764 
NUMBER[2] => Mux1.IN17
7765 
NUMBER[2] => Mux2.IN17
7766 
NUMBER[2] => Mux3.IN17
7767 
NUMBER[2] => Mux4.IN17
7768 
NUMBER[2] => Mux5.IN17
7769 
NUMBER[2] => Mux6.IN17
7770 
NUMBER[3] => Mux0.IN16
7771 
NUMBER[3] => Mux1.IN16
7772 
NUMBER[3] => Mux2.IN16
7773 
NUMBER[3] => Mux3.IN16
7774 
NUMBER[3] => Mux4.IN16
7775 
NUMBER[3] => Mux5.IN16
7776 
NUMBER[3] => Mux6.IN16
7777 
HEX_DISP[0] <= Mux6.DB_MAX_OUTPUT_PORT_TYPE
7778 
HEX_DISP[1] <= Mux5.DB_MAX_OUTPUT_PORT_TYPE
7779 
HEX_DISP[2] <= Mux4.DB_MAX_OUTPUT_PORT_TYPE
7780 
HEX_DISP[3] <= Mux3.DB_MAX_OUTPUT_PORT_TYPE
7781 
HEX_DISP[4] <= Mux2.DB_MAX_OUTPUT_PORT_TYPE
7782 
HEX_DISP[5] <= Mux1.DB_MAX_OUTPUT_PORT_TYPE
7783 
HEX_DISP[6] <= Mux0.DB_MAX_OUTPUT_PORT_TYPE
7784 
 
7785 
 
7786 
|z80soc|decoder_7seg:DISPHEX1
7787 
NUMBER[0] => Mux0.IN19
7788 
NUMBER[0] => Mux1.IN19
7789 
NUMBER[0] => Mux2.IN19
7790 
NUMBER[0] => Mux3.IN19
7791 
NUMBER[0] => Mux4.IN19
7792 
NUMBER[0] => Mux5.IN19
7793 
NUMBER[0] => Mux6.IN19
7794 
NUMBER[1] => Mux0.IN18
7795 
NUMBER[1] => Mux1.IN18
7796 
NUMBER[1] => Mux2.IN18
7797 
NUMBER[1] => Mux3.IN18
7798 
NUMBER[1] => Mux4.IN18
7799 
NUMBER[1] => Mux5.IN18
7800 
NUMBER[1] => Mux6.IN18
7801 
NUMBER[2] => Mux0.IN17
7802 
NUMBER[2] => Mux1.IN17
7803 
NUMBER[2] => Mux2.IN17
7804 
NUMBER[2] => Mux3.IN17
7805 
NUMBER[2] => Mux4.IN17
7806 
NUMBER[2] => Mux5.IN17
7807 
NUMBER[2] => Mux6.IN17
7808 
NUMBER[3] => Mux0.IN16
7809 
NUMBER[3] => Mux1.IN16
7810 
NUMBER[3] => Mux2.IN16
7811 
NUMBER[3] => Mux3.IN16
7812 
NUMBER[3] => Mux4.IN16
7813 
NUMBER[3] => Mux5.IN16
7814 
NUMBER[3] => Mux6.IN16
7815 
HEX_DISP[0] <= Mux6.DB_MAX_OUTPUT_PORT_TYPE
7816 
HEX_DISP[1] <= Mux5.DB_MAX_OUTPUT_PORT_TYPE
7817 
HEX_DISP[2] <= Mux4.DB_MAX_OUTPUT_PORT_TYPE
7818 
HEX_DISP[3] <= Mux3.DB_MAX_OUTPUT_PORT_TYPE
7819 
HEX_DISP[4] <= Mux2.DB_MAX_OUTPUT_PORT_TYPE
7820 
HEX_DISP[5] <= Mux1.DB_MAX_OUTPUT_PORT_TYPE
7821 
HEX_DISP[6] <= Mux0.DB_MAX_OUTPUT_PORT_TYPE
7822 
 
7823 
 
7824 
|z80soc|decoder_7seg:DISPHEX2
7825 
NUMBER[0] => Mux0.IN19
7826 
NUMBER[0] => Mux1.IN19
7827 
NUMBER[0] => Mux2.IN19
7828 
NUMBER[0] => Mux3.IN19
7829 
NUMBER[0] => Mux4.IN19
7830 
NUMBER[0] => Mux5.IN19
7831 
NUMBER[0] => Mux6.IN19
7832 
NUMBER[1] => Mux0.IN18
7833 
NUMBER[1] => Mux1.IN18
7834 
NUMBER[1] => Mux2.IN18
7835 
NUMBER[1] => Mux3.IN18
7836 
NUMBER[1] => Mux4.IN18
7837 
NUMBER[1] => Mux5.IN18
7838 
NUMBER[1] => Mux6.IN18
7839 
NUMBER[2] => Mux0.IN17
7840 
NUMBER[2] => Mux1.IN17
7841 
NUMBER[2] => Mux2.IN17
7842 
NUMBER[2] => Mux3.IN17
7843 
NUMBER[2] => Mux4.IN17
7844 
NUMBER[2] => Mux5.IN17
7845 
NUMBER[2] => Mux6.IN17
7846 
NUMBER[3] => Mux0.IN16
7847 
NUMBER[3] => Mux1.IN16
7848 
NUMBER[3] => Mux2.IN16
7849 
NUMBER[3] => Mux3.IN16
7850 
NUMBER[3] => Mux4.IN16
7851 
NUMBER[3] => Mux5.IN16
7852 
NUMBER[3] => Mux6.IN16
7853 
HEX_DISP[0] <= Mux6.DB_MAX_OUTPUT_PORT_TYPE
7854 
HEX_DISP[1] <= Mux5.DB_MAX_OUTPUT_PORT_TYPE
7855 
HEX_DISP[2] <= Mux4.DB_MAX_OUTPUT_PORT_TYPE
7856 
HEX_DISP[3] <= Mux3.DB_MAX_OUTPUT_PORT_TYPE
7857 
HEX_DISP[4] <= Mux2.DB_MAX_OUTPUT_PORT_TYPE
7858 
HEX_DISP[5] <= Mux1.DB_MAX_OUTPUT_PORT_TYPE
7859 
HEX_DISP[6] <= Mux0.DB_MAX_OUTPUT_PORT_TYPE
7860 
 
7861 
 
7862 
|z80soc|decoder_7seg:DISPHEX3
7863 
NUMBER[0] => Mux0.IN19
7864 
NUMBER[0] => Mux1.IN19
7865 
NUMBER[0] => Mux2.IN19
7866 
NUMBER[0] => Mux3.IN19
7867 
NUMBER[0] => Mux4.IN19
7868 
NUMBER[0] => Mux5.IN19
7869 
NUMBER[0] => Mux6.IN19
7870 
NUMBER[1] => Mux0.IN18
7871 
NUMBER[1] => Mux1.IN18
7872 
NUMBER[1] => Mux2.IN18
7873 
NUMBER[1] => Mux3.IN18
7874 
NUMBER[1] => Mux4.IN18
7875 
NUMBER[1] => Mux5.IN18
7876 
NUMBER[1] => Mux6.IN18
7877 
NUMBER[2] => Mux0.IN17
7878 
NUMBER[2] => Mux1.IN17
7879 
NUMBER[2] => Mux2.IN17
7880 
NUMBER[2] => Mux3.IN17
7881 
NUMBER[2] => Mux4.IN17
7882 
NUMBER[2] => Mux5.IN17
7883 
NUMBER[2] => Mux6.IN17
7884 
NUMBER[3] => Mux0.IN16
7885 
NUMBER[3] => Mux1.IN16
7886 
NUMBER[3] => Mux2.IN16
7887 
NUMBER[3] => Mux3.IN16
7888 
NUMBER[3] => Mux4.IN16
7889 
NUMBER[3] => Mux5.IN16
7890 
NUMBER[3] => Mux6.IN16
7891 
HEX_DISP[0] <= Mux6.DB_MAX_OUTPUT_PORT_TYPE
7892 
HEX_DISP[1] <= Mux5.DB_MAX_OUTPUT_PORT_TYPE
7893 
HEX_DISP[2] <= Mux4.DB_MAX_OUTPUT_PORT_TYPE
7894 
HEX_DISP[3] <= Mux3.DB_MAX_OUTPUT_PORT_TYPE
7895 
HEX_DISP[4] <= Mux2.DB_MAX_OUTPUT_PORT_TYPE
7896 
HEX_DISP[5] <= Mux1.DB_MAX_OUTPUT_PORT_TYPE
7897 
HEX_DISP[6] <= Mux0.DB_MAX_OUTPUT_PORT_TYPE
7898 
 
7899 
 
7900 
|z80soc|ps2kbd:ps2_kbd_inst
7901 
clock => keyboard:kbd_inst.clock
7902 
clkdelay => caps[0].CLK
7903 
clkdelay => caps[1].CLK
7904 
reset => keyboard:kbd_inst.reset
7905 
read => keyboard:kbd_inst.read
7906 
scan_ready <= keyboard:kbd_inst.scan_ready
7907 
ps2_ascii_code[0] <= WideOr6.DB_MAX_OUTPUT_PORT_TYPE
7908 
ps2_ascii_code[1] <= WideOr5.DB_MAX_OUTPUT_PORT_TYPE
7909 
ps2_ascii_code[2] <= WideOr4.DB_MAX_OUTPUT_PORT_TYPE
7910 
ps2_ascii_code[3] <= WideOr3.DB_MAX_OUTPUT_PORT_TYPE
7911 
ps2_ascii_code[4] <= WideOr2.DB_MAX_OUTPUT_PORT_TYPE
7912 
ps2_ascii_code[5] <= WideOr1.DB_MAX_OUTPUT_PORT_TYPE
7913 
ps2_ascii_code[6] <= WideOr0.DB_MAX_OUTPUT_PORT_TYPE
7914 
ps2_ascii_code[7] <= WideNor0.DB_MAX_OUTPUT_PORT_TYPE
7915 
 
7916 
 
7917 
|z80soc|ps2kbd:ps2_kbd_inst|keyboard:kbd_inst
7918 
keyboard_clk => filter[7].DATAIN
7919 
keyboard_data => SHIFTIN.DATAB
7920 
keyboard_data => process_2.IN1
7921 
clock => keyboard_clk_filtered.CLK
7922 
clock => filter[0].CLK
7923 
clock => filter[1].CLK
7924 
clock => filter[2].CLK
7925 
clock => filter[3].CLK
7926 
clock => filter[4].CLK
7927 
clock => filter[5].CLK
7928 
clock => filter[6].CLK
7929 
clock => filter[7].CLK
7930 
clock => clock_enable.CLK
7931 
reset => INCNT.OUTPUTSELECT
7932 
reset => INCNT.OUTPUTSELECT
7933 
reset => INCNT.OUTPUTSELECT
7934 
reset => INCNT.OUTPUTSELECT
7935 
reset => READ_CHAR.OUTPUTSELECT
7936 
reset => ready_set.OUTPUTSELECT
7937 
reset => scan_code[0]~reg0.ENA
7938 
reset => scan_code[1]~reg0.ENA
7939 
reset => scan_code[2]~reg0.ENA
7940 
reset => scan_code[3]~reg0.ENA
7941 
reset => scan_code[4]~reg0.ENA
7942 
reset => scan_code[5]~reg0.ENA
7943 
reset => scan_code[6]~reg0.ENA
7944 
reset => scan_code[7]~reg0.ENA
7945 
reset => SHIFTIN[0].ENA
7946 
reset => SHIFTIN[1].ENA
7947 
reset => SHIFTIN[2].ENA
7948 
reset => SHIFTIN[3].ENA
7949 
reset => SHIFTIN[4].ENA
7950 
reset => SHIFTIN[5].ENA
7951 
reset => SHIFTIN[6].ENA
7952 
reset => SHIFTIN[7].ENA
7953 
reset => SHIFTIN[8].ENA
7954 
read => scan_ready~reg0.ACLR
7955 
scan_code[0] <= scan_code[0]~reg0.DB_MAX_OUTPUT_PORT_TYPE
7956 
scan_code[1] <= scan_code[1]~reg0.DB_MAX_OUTPUT_PORT_TYPE
7957 
scan_code[2] <= scan_code[2]~reg0.DB_MAX_OUTPUT_PORT_TYPE
7958 
scan_code[3] <= scan_code[3]~reg0.DB_MAX_OUTPUT_PORT_TYPE
7959 
scan_code[4] <= scan_code[4]~reg0.DB_MAX_OUTPUT_PORT_TYPE
7960 
scan_code[5] <= scan_code[5]~reg0.DB_MAX_OUTPUT_PORT_TYPE
7961 
scan_code[6] <= scan_code[6]~reg0.DB_MAX_OUTPUT_PORT_TYPE
7962 
scan_code[7] <= scan_code[7]~reg0.DB_MAX_OUTPUT_PORT_TYPE
7963 
scan_ready <= scan_ready~reg0.DB_MAX_OUTPUT_PORT_TYPE
7964 
 
7965 
 

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