OpenCores
URL https://opencores.org/ocsvn/z80soc/z80soc/trunk

Subversion Repositories z80soc

[/] [z80soc/] [trunk/] [V0.7.3/] [DE2115/] [db/] [073DE2115d.hier_info] - Blame information for rev 46

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Line No. Rev Author Line
1 46 rrred
|Z80SOC
2
CLOCK_50 => clk_div:clkdiv_inst.clock_in_50Mhz
3
CLOCK_50 => \random:rand_temp[0].CLK
4
CLOCK_50 => \random:rand_temp[1].CLK
5
CLOCK_50 => \random:rand_temp[2].CLK
6
CLOCK_50 => \random:rand_temp[3].CLK
7
CLOCK_50 => \random:rand_temp[4].CLK
8
CLOCK_50 => \random:rand_temp[5].CLK
9
CLOCK_50 => \random:rand_temp[6].CLK
10
CLOCK_50 => \random:rand_temp[7].CLK
11
CLOCK_50 => \random:rand_temp[8].CLK
12
CLOCK_50 => \random:rand_temp[9].CLK
13
CLOCK_50 => \random:rand_temp[10].CLK
14
CLOCK_50 => \random:rand_temp[11].CLK
15
CLOCK_50 => \random:rand_temp[12].CLK
16
CLOCK_50 => \random:rand_temp[13].CLK
17
CLOCK_50 => \random:rand_temp[14].CLK
18
CLOCK_50 => \random:rand_temp[15].CLK
19
CLOCK_50 => ps2_ascii_reg1[0].CLK
20
CLOCK_50 => ps2_ascii_reg1[1].CLK
21
CLOCK_50 => ps2_ascii_reg1[2].CLK
22
CLOCK_50 => ps2_ascii_reg1[3].CLK
23
CLOCK_50 => ps2_ascii_reg1[4].CLK
24
CLOCK_50 => ps2_ascii_reg1[5].CLK
25
CLOCK_50 => ps2_ascii_reg1[6].CLK
26
CLOCK_50 => ps2_ascii_reg1[7].CLK
27
CLOCK_50 => ps2_read.CLK
28
CLOCK_50 => ps2kbd:ps2_kbd_inst.clock
29
CLOCK_50 => LCD:lcd_inst.CLOCK_50
30
KEY[0] => DI_CPU[0].DATAA
31
KEY[1] => DI_CPU[1].DATAA
32
KEY[2] => DI_CPU[2].DATAA
33
KEY[3] => DI_CPU[3].DATAA
34
SW[0] => DI_CPU[0].DATAB
35
SW[1] => DI_CPU[1].DATAB
36
SW[2] => DI_CPU[2].DATAB
37
SW[3] => DI_CPU[3].DATAB
38
SW[4] => DI_CPU[4].DATAB
39
SW[5] => DI_CPU[5].DATAB
40
SW[6] => DI_CPU[6].DATAB
41
SW[7] => DI_CPU[7].DATAB
42
SW[8] => DI_CPU[0].DATAB
43
SW[9] => DI_CPU[1].DATAB
44
SW[10] => DI_CPU[2].DATAB
45
SW[11] => DI_CPU[3].DATAB
46
SW[12] => DI_CPU[4].DATAB
47
SW[13] => DI_CPU[5].DATAB
48
SW[14] => DI_CPU[6].DATAB
49
SW[14] => LCD:lcd_inst.lcd_on_sig
50
SW[15] => Clk_Z80.OUTPUTSELECT
51
SW[15] => Clk_Z80.IN0
52
SW[15] => DI_CPU[7].DATAB
53
SW[16] => Clk_Z80.OUTPUTSELECT
54
SW[16] => Clk_Z80.IN1
55
SW[17] => T80se:z80_inst.RESET_n
56
SW[17] => ps2kbd:ps2_kbd_inst.reset
57
SW[17] => LCD:lcd_inst.reset
58
HEX0[0] <= decoder_7seg:DISPHEX0.HEX_DISP[0]
59
HEX0[1] <= decoder_7seg:DISPHEX0.HEX_DISP[1]
60
HEX0[2] <= decoder_7seg:DISPHEX0.HEX_DISP[2]
61
HEX0[3] <= decoder_7seg:DISPHEX0.HEX_DISP[3]
62
HEX0[4] <= decoder_7seg:DISPHEX0.HEX_DISP[4]
63
HEX0[5] <= decoder_7seg:DISPHEX0.HEX_DISP[5]
64
HEX0[6] <= decoder_7seg:DISPHEX0.HEX_DISP[6]
65
HEX1[0] <= decoder_7seg:DISPHEX1.HEX_DISP[0]
66
HEX1[1] <= decoder_7seg:DISPHEX1.HEX_DISP[1]
67
HEX1[2] <= decoder_7seg:DISPHEX1.HEX_DISP[2]
68
HEX1[3] <= decoder_7seg:DISPHEX1.HEX_DISP[3]
69
HEX1[4] <= decoder_7seg:DISPHEX1.HEX_DISP[4]
70
HEX1[5] <= decoder_7seg:DISPHEX1.HEX_DISP[5]
71
HEX1[6] <= decoder_7seg:DISPHEX1.HEX_DISP[6]
72
HEX2[0] <= decoder_7seg:DISPHEX2.HEX_DISP[0]
73
HEX2[1] <= decoder_7seg:DISPHEX2.HEX_DISP[1]
74
HEX2[2] <= decoder_7seg:DISPHEX2.HEX_DISP[2]
75
HEX2[3] <= decoder_7seg:DISPHEX2.HEX_DISP[3]
76
HEX2[4] <= decoder_7seg:DISPHEX2.HEX_DISP[4]
77
HEX2[5] <= decoder_7seg:DISPHEX2.HEX_DISP[5]
78
HEX2[6] <= decoder_7seg:DISPHEX2.HEX_DISP[6]
79
HEX3[0] <= decoder_7seg:DISPHEX3.HEX_DISP[0]
80
HEX3[1] <= decoder_7seg:DISPHEX3.HEX_DISP[1]
81
HEX3[2] <= decoder_7seg:DISPHEX3.HEX_DISP[2]
82
HEX3[3] <= decoder_7seg:DISPHEX3.HEX_DISP[3]
83
HEX3[4] <= decoder_7seg:DISPHEX3.HEX_DISP[4]
84
HEX3[5] <= decoder_7seg:DISPHEX3.HEX_DISP[5]
85
HEX3[6] <= decoder_7seg:DISPHEX3.HEX_DISP[6]
86
HEX4[0] <= decoder_7seg:DISPHEX4.HEX_DISP[0]
87
HEX4[1] <= decoder_7seg:DISPHEX4.HEX_DISP[1]
88
HEX4[2] <= decoder_7seg:DISPHEX4.HEX_DISP[2]
89
HEX4[3] <= decoder_7seg:DISPHEX4.HEX_DISP[3]
90
HEX4[4] <= decoder_7seg:DISPHEX4.HEX_DISP[4]
91
HEX4[5] <= decoder_7seg:DISPHEX4.HEX_DISP[5]
92
HEX4[6] <= decoder_7seg:DISPHEX4.HEX_DISP[6]
93
HEX5[0] <= decoder_7seg:DISPHEX5.HEX_DISP[0]
94
HEX5[1] <= decoder_7seg:DISPHEX5.HEX_DISP[1]
95
HEX5[2] <= decoder_7seg:DISPHEX5.HEX_DISP[2]
96
HEX5[3] <= decoder_7seg:DISPHEX5.HEX_DISP[3]
97
HEX5[4] <= decoder_7seg:DISPHEX5.HEX_DISP[4]
98
HEX5[5] <= decoder_7seg:DISPHEX5.HEX_DISP[5]
99
HEX5[6] <= decoder_7seg:DISPHEX5.HEX_DISP[6]
100
HEX6[0] <= decoder_7seg:DISPHEX6.HEX_DISP[0]
101
HEX6[1] <= decoder_7seg:DISPHEX6.HEX_DISP[1]
102
HEX6[2] <= decoder_7seg:DISPHEX6.HEX_DISP[2]
103
HEX6[3] <= decoder_7seg:DISPHEX6.HEX_DISP[3]
104
HEX6[4] <= decoder_7seg:DISPHEX6.HEX_DISP[4]
105
HEX6[5] <= decoder_7seg:DISPHEX6.HEX_DISP[5]
106
HEX6[6] <= decoder_7seg:DISPHEX6.HEX_DISP[6]
107
HEX7[0] <= decoder_7seg:DISPHEX7.HEX_DISP[0]
108
HEX7[1] <= decoder_7seg:DISPHEX7.HEX_DISP[1]
109
HEX7[2] <= decoder_7seg:DISPHEX7.HEX_DISP[2]
110
HEX7[3] <= decoder_7seg:DISPHEX7.HEX_DISP[3]
111
HEX7[4] <= decoder_7seg:DISPHEX7.HEX_DISP[4]
112
HEX7[5] <= decoder_7seg:DISPHEX7.HEX_DISP[5]
113
HEX7[6] <= decoder_7seg:DISPHEX7.HEX_DISP[6]
114
LEDG[0] <= \pinout_process:LEDG_sig[0].DB_MAX_OUTPUT_PORT_TYPE
115
LEDG[1] <= \pinout_process:LEDG_sig[1].DB_MAX_OUTPUT_PORT_TYPE
116
LEDG[2] <= \pinout_process:LEDG_sig[2].DB_MAX_OUTPUT_PORT_TYPE
117
LEDG[3] <= \pinout_process:LEDG_sig[3].DB_MAX_OUTPUT_PORT_TYPE
118
LEDG[4] <= \pinout_process:LEDG_sig[4].DB_MAX_OUTPUT_PORT_TYPE
119
LEDG[5] <= \pinout_process:LEDG_sig[5].DB_MAX_OUTPUT_PORT_TYPE
120
LEDG[6] <= \pinout_process:LEDG_sig[6].DB_MAX_OUTPUT_PORT_TYPE
121
LEDG[7] <= \pinout_process:LEDG_sig[7].DB_MAX_OUTPUT_PORT_TYPE
122
LEDG[8] <= 
123
LEDR[0] <= \pinout_process:LEDR_sig[0].DB_MAX_OUTPUT_PORT_TYPE
124
LEDR[1] <= \pinout_process:LEDR_sig[1].DB_MAX_OUTPUT_PORT_TYPE
125
LEDR[2] <= \pinout_process:LEDR_sig[2].DB_MAX_OUTPUT_PORT_TYPE
126
LEDR[3] <= \pinout_process:LEDR_sig[3].DB_MAX_OUTPUT_PORT_TYPE
127
LEDR[4] <= \pinout_process:LEDR_sig[4].DB_MAX_OUTPUT_PORT_TYPE
128
LEDR[5] <= \pinout_process:LEDR_sig[5].DB_MAX_OUTPUT_PORT_TYPE
129
LEDR[6] <= \pinout_process:LEDR_sig[6].DB_MAX_OUTPUT_PORT_TYPE
130
LEDR[7] <= \pinout_process:LEDR_sig[7].DB_MAX_OUTPUT_PORT_TYPE
131
LEDR[8] <= \pinout_process:LEDR_sig[8].DB_MAX_OUTPUT_PORT_TYPE
132
LEDR[9] <= \pinout_process:LEDR_sig[9].DB_MAX_OUTPUT_PORT_TYPE
133
LEDR[10] <= \pinout_process:LEDR_sig[10].DB_MAX_OUTPUT_PORT_TYPE
134
LEDR[11] <= \pinout_process:LEDR_sig[11].DB_MAX_OUTPUT_PORT_TYPE
135
LEDR[12] <= \pinout_process:LEDR_sig[12].DB_MAX_OUTPUT_PORT_TYPE
136
LEDR[13] <= \pinout_process:LEDR_sig[13].DB_MAX_OUTPUT_PORT_TYPE
137
LEDR[14] <= \pinout_process:LEDR_sig[14].DB_MAX_OUTPUT_PORT_TYPE
138
LEDR[15] <= \pinout_process:LEDR_sig[15].DB_MAX_OUTPUT_PORT_TYPE
139
LEDR[16] <= 
140
LEDR[17] <= 
141
UART_TXD <= UART_TXD.DB_MAX_OUTPUT_PORT_TYPE
142
UART_RXD => ~NO_FANOUT~
143
UART_RTS => ~NO_FANOUT~
144
UART_CTS => ~NO_FANOUT~
145
DRAM_BA_0 <= 
146
DRAM_BA_1 <= 
147
DRAM_DQM_0 <= 
148
DRAM_DQM_1 <= 
149
DRAM_DQM_2 <= 
150
DRAM_DQM_3 <= 
151
DRAM_WE_N <= 
152
DRAM_CAS_N <= 
153
DRAM_RAS_N <= 
154
DRAM_CS_N <= 
155
DRAM_DQ[0] <> DRAM_DQ[0]
156
DRAM_DQ[1] <> DRAM_DQ[1]
157
DRAM_DQ[2] <> DRAM_DQ[2]
158
DRAM_DQ[3] <> DRAM_DQ[3]
159
DRAM_DQ[4] <> DRAM_DQ[4]
160
DRAM_DQ[5] <> DRAM_DQ[5]
161
DRAM_DQ[6] <> DRAM_DQ[6]
162
DRAM_DQ[7] <> DRAM_DQ[7]
163
DRAM_DQ[8] <> DRAM_DQ[8]
164
DRAM_DQ[9] <> DRAM_DQ[9]
165
DRAM_DQ[10] <> DRAM_DQ[10]
166
DRAM_DQ[11] <> DRAM_DQ[11]
167
DRAM_DQ[12] <> DRAM_DQ[12]
168
DRAM_DQ[13] <> DRAM_DQ[13]
169
DRAM_DQ[14] <> DRAM_DQ[14]
170
DRAM_DQ[15] <> DRAM_DQ[15]
171
DRAM_DQ[16] <> DRAM_DQ[16]
172
DRAM_DQ[17] <> DRAM_DQ[17]
173
DRAM_DQ[18] <> DRAM_DQ[18]
174
DRAM_DQ[19] <> DRAM_DQ[19]
175
DRAM_DQ[20] <> DRAM_DQ[20]
176
DRAM_DQ[21] <> DRAM_DQ[21]
177
DRAM_DQ[22] <> DRAM_DQ[22]
178
DRAM_DQ[23] <> DRAM_DQ[23]
179
DRAM_DQ[24] <> DRAM_DQ[24]
180
DRAM_DQ[25] <> DRAM_DQ[25]
181
DRAM_DQ[26] <> DRAM_DQ[26]
182
DRAM_DQ[27] <> DRAM_DQ[27]
183
DRAM_DQ[28] <> DRAM_DQ[28]
184
DRAM_DQ[29] <> DRAM_DQ[29]
185
DRAM_DQ[30] <> DRAM_DQ[30]
186
DRAM_DQ[31] <> DRAM_DQ[31]
187
DRAM_ADDR[0] <= 
188
DRAM_ADDR[1] <= 
189
DRAM_ADDR[2] <= 
190
DRAM_ADDR[3] <= 
191
DRAM_ADDR[4] <= 
192
DRAM_ADDR[5] <= 
193
DRAM_ADDR[6] <= 
194
DRAM_ADDR[7] <= 
195
DRAM_ADDR[8] <= 
196
DRAM_ADDR[9] <= 
197
DRAM_ADDR[10] <= 
198
DRAM_ADDR[11] <= 
199
DRAM_ADDR[12] <= 
200
DRAM_CLK <= 
201
DRAM_CKE <= 
202
FL_DQ[0] <> FL_DQ[0]
203
FL_DQ[1] <> FL_DQ[1]
204
FL_DQ[2] <> FL_DQ[2]
205
FL_DQ[3] <> FL_DQ[3]
206
FL_DQ[4] <> FL_DQ[4]
207
FL_DQ[5] <> FL_DQ[5]
208
FL_DQ[6] <> FL_DQ[6]
209
FL_DQ[7] <> FL_DQ[7]
210
FL_ADDR[0] <= 
211
FL_ADDR[1] <= 
212
FL_ADDR[2] <= 
213
FL_ADDR[3] <= 
214
FL_ADDR[4] <= 
215
FL_ADDR[5] <= 
216
FL_ADDR[6] <= 
217
FL_ADDR[7] <= 
218
FL_ADDR[8] <= 
219
FL_ADDR[9] <= 
220
FL_ADDR[10] <= 
221
FL_ADDR[11] <= 
222
FL_ADDR[12] <= 
223
FL_ADDR[13] <= 
224
FL_ADDR[14] <= 
225
FL_ADDR[15] <= 
226
FL_ADDR[16] <= 
227
FL_ADDR[17] <= 
228
FL_ADDR[18] <= 
229
FL_ADDR[19] <= 
230
FL_ADDR[20] <= 
231
FL_ADDR[21] <= 
232
FL_ADDR[22] <= 
233
FL_RY => ~NO_FANOUT~
234
FL_WP_N <= FL_WP_N.DB_MAX_OUTPUT_PORT_TYPE
235
FL_WE_N <= 
236
FL_RST_N <= 
237
FL_OE_N <= 
238
FL_CE_N <= 
239
SRAM_DQ[0] <> SRAM_DQ[0]
240
SRAM_DQ[1] <> SRAM_DQ[1]
241
SRAM_DQ[2] <> SRAM_DQ[2]
242
SRAM_DQ[3] <> SRAM_DQ[3]
243
SRAM_DQ[4] <> SRAM_DQ[4]
244
SRAM_DQ[5] <> SRAM_DQ[5]
245
SRAM_DQ[6] <> SRAM_DQ[6]
246
SRAM_DQ[7] <> SRAM_DQ[7]
247
SRAM_DQ[8] <> SRAM_DQ[8]
248
SRAM_DQ[9] <> SRAM_DQ[9]
249
SRAM_DQ[10] <> SRAM_DQ[10]
250
SRAM_DQ[11] <> SRAM_DQ[11]
251
SRAM_DQ[12] <> SRAM_DQ[12]
252
SRAM_DQ[13] <> SRAM_DQ[13]
253
SRAM_DQ[14] <> SRAM_DQ[14]
254
SRAM_DQ[15] <> SRAM_DQ[15]
255
SRAM_ADDR[0] <= T80se:z80_inst.A[0]
256
SRAM_ADDR[1] <= T80se:z80_inst.A[1]
257
SRAM_ADDR[2] <= T80se:z80_inst.A[2]
258
SRAM_ADDR[3] <= T80se:z80_inst.A[3]
259
SRAM_ADDR[4] <= T80se:z80_inst.A[4]
260
SRAM_ADDR[5] <= T80se:z80_inst.A[5]
261
SRAM_ADDR[6] <= T80se:z80_inst.A[6]
262
SRAM_ADDR[7] <= T80se:z80_inst.A[7]
263
SRAM_ADDR[8] <= T80se:z80_inst.A[8]
264
SRAM_ADDR[9] <= T80se:z80_inst.A[9]
265
SRAM_ADDR[10] <= T80se:z80_inst.A[10]
266
SRAM_ADDR[11] <= T80se:z80_inst.A[11]
267
SRAM_ADDR[12] <= T80se:z80_inst.A[12]
268
SRAM_ADDR[13] <= T80se:z80_inst.A[13]
269
SRAM_ADDR[14] <= Add0.DB_MAX_OUTPUT_PORT_TYPE
270
SRAM_ADDR[15] <= Add0.DB_MAX_OUTPUT_PORT_TYPE
271
SRAM_ADDR[16] <= 
272
SRAM_ADDR[17] <= 
273
SRAM_ADDR[18] <= 
274
SRAM_ADDR[19] <= 
275
SRAM_UB_N <= 
276
SRAM_LB_N <= 
277
SRAM_WE_N <= SRAM_DQ.DB_MAX_OUTPUT_PORT_TYPE
278
SRAM_CE_N <= 
279
SRAM_OE_N <= SRAM_OE_N.DB_MAX_OUTPUT_PORT_TYPE
280
SD_DAT0 => ~NO_FANOUT~
281
SD_DAT1 <> 
282
SD_DAT2 <> 
283
SD_DAT3 <= SD_DAT3.DB_MAX_OUTPUT_PORT_TYPE
284
SD_CMD <= SD_CMD.DB_MAX_OUTPUT_PORT_TYPE
285
SD_CLK <= SD_CLK.DB_MAX_OUTPUT_PORT_TYPE
286
PS2_DAT <> ps2kbd:ps2_kbd_inst.keyboard_data
287
PS2_CLK <> ps2kbd:ps2_kbd_inst.keyboard_clk
288
PS2_DAT2 <> 
289
PS2_CLK2 <> 
290
VGA_SYNC_N <= VGA_SYNC_N.DB_MAX_OUTPUT_PORT_TYPE
291
VGA_CLK <= clk_div:clkdiv_inst.clock_25MHz
292
VGA_BLANK_N <= 
293
VGA_HS <= video:video_inst.VGA_HS
294
VGA_VS <= video:video_inst.VGA_VS
295
VGA_R[0] <= 
296
VGA_R[1] <= 
297
VGA_R[2] <= 
298
VGA_R[3] <= 
299
VGA_R[4] <= video:video_inst.VGA_R[0]
300
VGA_R[5] <= video:video_inst.VGA_R[1]
301
VGA_R[6] <= video:video_inst.VGA_R[2]
302
VGA_R[7] <= video:video_inst.VGA_R[3]
303
VGA_G[0] <= 
304
VGA_G[1] <= 
305
VGA_G[2] <= 
306
VGA_G[3] <= 
307
VGA_G[4] <= video:video_inst.VGA_G[0]
308
VGA_G[5] <= video:video_inst.VGA_G[1]
309
VGA_G[6] <= video:video_inst.VGA_G[2]
310
VGA_G[7] <= video:video_inst.VGA_G[3]
311
VGA_B[0] <= 
312
VGA_B[1] <= 
313
VGA_B[2] <= 
314
VGA_B[3] <= 
315
VGA_B[4] <= video:video_inst.VGA_B[0]
316
VGA_B[5] <= video:video_inst.VGA_B[1]
317
VGA_B[6] <= video:video_inst.VGA_B[2]
318
VGA_B[7] <= video:video_inst.VGA_B[3]
319
AUD_ADCLRCK <> AUD_ADCLRCK
320
AUD_ADCDAT => ~NO_FANOUT~
321
AUD_DACLRCK <> AUD_DACLRCK
322
AUD_DACDAT <= 
323
AUD_BCLK <> AUD_BCLK
324
AUD_XCK <= 
325
LCD_RS <= LCD:lcd_inst.LCD_RS
326
LCD_EN <= LCD:lcd_inst.LCD_EN
327
LCD_RW <= LCD:lcd_inst.LCD_RW
328
LCD_ON <= LCD:lcd_inst.LCD_ON
329
LCD_BLON <= UART_TXD.DB_MAX_OUTPUT_PORT_TYPE
330
LCD_DATA[0] <> LCD:lcd_inst.LCD_DATA[0]
331
LCD_DATA[1] <> LCD:lcd_inst.LCD_DATA[1]
332
LCD_DATA[2] <> LCD:lcd_inst.LCD_DATA[2]
333
LCD_DATA[3] <> LCD:lcd_inst.LCD_DATA[3]
334
LCD_DATA[4] <> LCD:lcd_inst.LCD_DATA[4]
335
LCD_DATA[5] <> LCD:lcd_inst.LCD_DATA[5]
336
LCD_DATA[6] <> LCD:lcd_inst.LCD_DATA[6]
337
LCD_DATA[7] <> LCD:lcd_inst.LCD_DATA[7]
338
 
339
 
340
|Z80SOC|T80se:z80_inst
341
RESET_n => T80:u0.RESET_n
342
RESET_n => DI_Reg[0].ACLR
343
RESET_n => DI_Reg[1].ACLR
344
RESET_n => DI_Reg[2].ACLR
345
RESET_n => DI_Reg[3].ACLR
346
RESET_n => DI_Reg[4].ACLR
347
RESET_n => DI_Reg[5].ACLR
348
RESET_n => DI_Reg[6].ACLR
349
RESET_n => DI_Reg[7].ACLR
350
RESET_n => MREQ_n~reg0.PRESET
351
RESET_n => IORQ_n~reg0.PRESET
352
RESET_n => WR_n~reg0.PRESET
353
RESET_n => RD_n~reg0.PRESET
354
CLK_n => T80:u0.CLK_n
355
CLK_n => DI_Reg[0].CLK
356
CLK_n => DI_Reg[1].CLK
357
CLK_n => DI_Reg[2].CLK
358
CLK_n => DI_Reg[3].CLK
359
CLK_n => DI_Reg[4].CLK
360
CLK_n => DI_Reg[5].CLK
361
CLK_n => DI_Reg[6].CLK
362
CLK_n => DI_Reg[7].CLK
363
CLK_n => MREQ_n~reg0.CLK
364
CLK_n => IORQ_n~reg0.CLK
365
CLK_n => WR_n~reg0.CLK
366
CLK_n => RD_n~reg0.CLK
367
CLKEN => T80:u0.CEN
368
CLKEN => DI_Reg[0].ENA
369
CLKEN => RD_n~reg0.ENA
370
CLKEN => WR_n~reg0.ENA
371
CLKEN => IORQ_n~reg0.ENA
372
CLKEN => MREQ_n~reg0.ENA
373
CLKEN => DI_Reg[7].ENA
374
CLKEN => DI_Reg[6].ENA
375
CLKEN => DI_Reg[5].ENA
376
CLKEN => DI_Reg[4].ENA
377
CLKEN => DI_Reg[3].ENA
378
CLKEN => DI_Reg[2].ENA
379
CLKEN => DI_Reg[1].ENA
380
WAIT_n => process_0.IN1
381
WAIT_n => T80:u0.WAIT_n
382
WAIT_n => process_0.IN1
383
INT_n => T80:u0.INT_n
384
NMI_n => T80:u0.NMI_n
385
BUSRQ_n => T80:u0.BUSRQ_n
386
M1_n <= T80:u0.M1_n
387
MREQ_n <= MREQ_n~reg0.DB_MAX_OUTPUT_PORT_TYPE
388
IORQ_n <= IORQ_n~reg0.DB_MAX_OUTPUT_PORT_TYPE
389
RD_n <= RD_n~reg0.DB_MAX_OUTPUT_PORT_TYPE
390
WR_n <= WR_n~reg0.DB_MAX_OUTPUT_PORT_TYPE
391
RFSH_n <= T80:u0.RFSH_n
392
HALT_n <= T80:u0.HALT_n
393
BUSAK_n <= T80:u0.BUSAK_n
394
A[0] <= T80:u0.A[0]
395
A[1] <= T80:u0.A[1]
396
A[2] <= T80:u0.A[2]
397
A[3] <= T80:u0.A[3]
398
A[4] <= T80:u0.A[4]
399
A[5] <= T80:u0.A[5]
400
A[6] <= T80:u0.A[6]
401
A[7] <= T80:u0.A[7]
402
A[8] <= T80:u0.A[8]
403
A[9] <= T80:u0.A[9]
404
A[10] <= T80:u0.A[10]
405
A[11] <= T80:u0.A[11]
406
A[12] <= T80:u0.A[12]
407
A[13] <= T80:u0.A[13]
408
A[14] <= T80:u0.A[14]
409
A[15] <= T80:u0.A[15]
410
DI[0] => DI_Reg.DATAB
411
DI[0] => T80:u0.DInst[0]
412
DI[1] => DI_Reg.DATAB
413
DI[1] => T80:u0.DInst[1]
414
DI[2] => DI_Reg.DATAB
415
DI[2] => T80:u0.DInst[2]
416
DI[3] => DI_Reg.DATAB
417
DI[3] => T80:u0.DInst[3]
418
DI[4] => DI_Reg.DATAB
419
DI[4] => T80:u0.DInst[4]
420
DI[5] => DI_Reg.DATAB
421
DI[5] => T80:u0.DInst[5]
422
DI[6] => DI_Reg.DATAB
423
DI[6] => T80:u0.DInst[6]
424
DI[7] => DI_Reg.DATAB
425
DI[7] => T80:u0.DInst[7]
426
DO[0] <= T80:u0.DO[0]
427
DO[1] <= T80:u0.DO[1]
428
DO[2] <= T80:u0.DO[2]
429
DO[3] <= T80:u0.DO[3]
430
DO[4] <= T80:u0.DO[4]
431
DO[5] <= T80:u0.DO[5]
432
DO[6] <= T80:u0.DO[6]
433
DO[7] <= T80:u0.DO[7]
434
 
435
 
436
|Z80SOC|T80se:z80_inst|T80:u0
437
RESET_n => XY_Ind.ACLR
438
RESET_n => PreserveC_r.ACLR
439
RESET_n => Save_ALU_r.ACLR
440
RESET_n => ALU_Op_r[0].ACLR
441
RESET_n => ALU_Op_r[1].ACLR
442
RESET_n => ALU_Op_r[2].ACLR
443
RESET_n => ALU_Op_r[3].ACLR
444
RESET_n => Z16_r.ACLR
445
RESET_n => BTR_r.ACLR
446
RESET_n => Arith16_r.ACLR
447
RESET_n => Read_To_Reg_r[0].ACLR
448
RESET_n => Read_To_Reg_r[1].ACLR
449
RESET_n => Read_To_Reg_r[2].ACLR
450
RESET_n => Read_To_Reg_r[3].ACLR
451
RESET_n => Read_To_Reg_r[4].ACLR
452
RESET_n => Alternate.ACLR
453
RESET_n => SP[0].PRESET
454
RESET_n => SP[1].PRESET
455
RESET_n => SP[2].PRESET
456
RESET_n => SP[3].PRESET
457
RESET_n => SP[4].PRESET
458
RESET_n => SP[5].PRESET
459
RESET_n => SP[6].PRESET
460
RESET_n => SP[7].PRESET
461
RESET_n => SP[8].PRESET
462
RESET_n => SP[9].PRESET
463
RESET_n => SP[10].PRESET
464
RESET_n => SP[11].PRESET
465
RESET_n => SP[12].PRESET
466
RESET_n => SP[13].PRESET
467
RESET_n => SP[14].PRESET
468
RESET_n => SP[15].PRESET
469
RESET_n => R[0].ACLR
470
RESET_n => R[1].ACLR
471
RESET_n => R[2].ACLR
472
RESET_n => R[3].ACLR
473
RESET_n => R[4].ACLR
474
RESET_n => R[5].ACLR
475
RESET_n => R[6].ACLR
476
RESET_n => R[7].ACLR
477
RESET_n => I[0].ACLR
478
RESET_n => I[1].ACLR
479
RESET_n => I[2].ACLR
480
RESET_n => I[3].ACLR
481
RESET_n => I[4].ACLR
482
RESET_n => I[5].ACLR
483
RESET_n => I[6].ACLR
484
RESET_n => I[7].ACLR
485
RESET_n => Fp[0].PRESET
486
RESET_n => Fp[1].PRESET
487
RESET_n => Fp[2].PRESET
488
RESET_n => Fp[3].PRESET
489
RESET_n => Fp[4].PRESET
490
RESET_n => Fp[5].PRESET
491
RESET_n => Fp[6].PRESET
492
RESET_n => Fp[7].PRESET
493
RESET_n => Ap[0].PRESET
494
RESET_n => Ap[1].PRESET
495
RESET_n => Ap[2].PRESET
496
RESET_n => Ap[3].PRESET
497
RESET_n => Ap[4].PRESET
498
RESET_n => Ap[5].PRESET
499
RESET_n => Ap[6].PRESET
500
RESET_n => Ap[7].PRESET
501
RESET_n => F[0].PRESET
502
RESET_n => F[1].PRESET
503
RESET_n => F[2].PRESET
504
RESET_n => F[3].PRESET
505
RESET_n => F[4].PRESET
506
RESET_n => F[5].PRESET
507
RESET_n => F[6].PRESET
508
RESET_n => F[7].PRESET
509
RESET_n => ACC[0].PRESET
510
RESET_n => ACC[1].PRESET
511
RESET_n => ACC[2].PRESET
512
RESET_n => ACC[3].PRESET
513
RESET_n => ACC[4].PRESET
514
RESET_n => ACC[5].PRESET
515
RESET_n => ACC[6].PRESET
516
RESET_n => ACC[7].PRESET
517
RESET_n => DO[0]~reg0.ACLR
518
RESET_n => DO[1]~reg0.ACLR
519
RESET_n => DO[2]~reg0.ACLR
520
RESET_n => DO[3]~reg0.ACLR
521
RESET_n => DO[4]~reg0.ACLR
522
RESET_n => DO[5]~reg0.ACLR
523
RESET_n => DO[6]~reg0.ACLR
524
RESET_n => DO[7]~reg0.ACLR
525
RESET_n => MCycles[0].ACLR
526
RESET_n => MCycles[1].ACLR
527
RESET_n => MCycles[2].ACLR
528
RESET_n => IStatus[0].ACLR
529
RESET_n => IStatus[1].ACLR
530
RESET_n => XY_State[0].ACLR
531
RESET_n => XY_State[1].ACLR
532
RESET_n => ISet[0].ACLR
533
RESET_n => ISet[1].ACLR
534
RESET_n => IR[0].ACLR
535
RESET_n => IR[1].ACLR
536
RESET_n => IR[2].ACLR
537
RESET_n => IR[3].ACLR
538
RESET_n => IR[4].ACLR
539
RESET_n => IR[5].ACLR
540
RESET_n => IR[6].ACLR
541
RESET_n => IR[7].ACLR
542
RESET_n => TmpAddr[0].ACLR
543
RESET_n => TmpAddr[1].ACLR
544
RESET_n => TmpAddr[2].ACLR
545
RESET_n => TmpAddr[3].ACLR
546
RESET_n => TmpAddr[4].ACLR
547
RESET_n => TmpAddr[5].ACLR
548
RESET_n => TmpAddr[6].ACLR
549
RESET_n => TmpAddr[7].ACLR
550
RESET_n => TmpAddr[8].ACLR
551
RESET_n => TmpAddr[9].ACLR
552
RESET_n => TmpAddr[10].ACLR
553
RESET_n => TmpAddr[11].ACLR
554
RESET_n => TmpAddr[12].ACLR
555
RESET_n => TmpAddr[13].ACLR
556
RESET_n => TmpAddr[14].ACLR
557
RESET_n => TmpAddr[15].ACLR
558
RESET_n => A[0]~reg0.ACLR
559
RESET_n => A[1]~reg0.ACLR
560
RESET_n => A[2]~reg0.ACLR
561
RESET_n => A[3]~reg0.ACLR
562
RESET_n => A[4]~reg0.ACLR
563
RESET_n => A[5]~reg0.ACLR
564
RESET_n => A[6]~reg0.ACLR
565
RESET_n => A[7]~reg0.ACLR
566
RESET_n => A[8]~reg0.ACLR
567
RESET_n => A[9]~reg0.ACLR
568
RESET_n => A[10]~reg0.ACLR
569
RESET_n => A[11]~reg0.ACLR
570
RESET_n => A[12]~reg0.ACLR
571
RESET_n => A[13]~reg0.ACLR
572
RESET_n => A[14]~reg0.ACLR
573
RESET_n => A[15]~reg0.ACLR
574
RESET_n => PC[0].ACLR
575
RESET_n => PC[1].ACLR
576
RESET_n => PC[2].ACLR
577
RESET_n => PC[3].ACLR
578
RESET_n => PC[4].ACLR
579
RESET_n => PC[5].ACLR
580
RESET_n => PC[6].ACLR
581
RESET_n => PC[7].ACLR
582
RESET_n => PC[8].ACLR
583
RESET_n => PC[9].ACLR
584
RESET_n => PC[10].ACLR
585
RESET_n => PC[11].ACLR
586
RESET_n => PC[12].ACLR
587
RESET_n => PC[13].ACLR
588
RESET_n => PC[14].ACLR
589
RESET_n => PC[15].ACLR
590
RESET_n => M1_n~reg0.PRESET
591
RESET_n => Auto_Wait_t2.ACLR
592
RESET_n => Auto_Wait_t1.ACLR
593
RESET_n => No_BTR.ACLR
594
RESET_n => IntE_FF2.ACLR
595
RESET_n => IntE_FF1.ACLR
596
RESET_n => IntCycle.ACLR
597
RESET_n => NMICycle.ACLR
598
RESET_n => BusAck.ACLR
599
RESET_n => Halt_FF.ACLR
600
RESET_n => Pre_XY_F_M[0].ACLR
601
RESET_n => Pre_XY_F_M[1].ACLR
602
RESET_n => Pre_XY_F_M[2].ACLR
603
RESET_n => TState[0].ACLR
604
RESET_n => TState[1].ACLR
605
RESET_n => TState[2].ACLR
606
RESET_n => MCycle[0].PRESET
607
RESET_n => MCycle[1].ACLR
608
RESET_n => MCycle[2].ACLR
609
RESET_n => RFSH_n~reg0.PRESET
610
RESET_n => NMI_s.ACLR
611
RESET_n => INT_s.ACLR
612
RESET_n => BusReq_s.ACLR
613
RESET_n => OldNMI_n.ACLR
614
CLK_n => T80_Reg:Regs.Clk
615
CLK_n => M1_n~reg0.CLK
616
CLK_n => Auto_Wait_t2.CLK
617
CLK_n => Auto_Wait_t1.CLK
618
CLK_n => No_BTR.CLK
619
CLK_n => IntE_FF2.CLK
620
CLK_n => IntE_FF1.CLK
621
CLK_n => IntCycle.CLK
622
CLK_n => NMICycle.CLK
623
CLK_n => BusAck.CLK
624
CLK_n => Halt_FF.CLK
625
CLK_n => Pre_XY_F_M[0].CLK
626
CLK_n => Pre_XY_F_M[1].CLK
627
CLK_n => Pre_XY_F_M[2].CLK
628
CLK_n => TState[0].CLK
629
CLK_n => TState[1].CLK
630
CLK_n => TState[2].CLK
631
CLK_n => MCycle[0].CLK
632
CLK_n => MCycle[1].CLK
633
CLK_n => MCycle[2].CLK
634
CLK_n => NMI_s.CLK
635
CLK_n => INT_s.CLK
636
CLK_n => BusReq_s.CLK
637
CLK_n => OldNMI_n.CLK
638
CLK_n => RFSH_n~reg0.CLK
639
CLK_n => BusA[0].CLK
640
CLK_n => BusA[1].CLK
641
CLK_n => BusA[2].CLK
642
CLK_n => BusA[3].CLK
643
CLK_n => BusA[4].CLK
644
CLK_n => BusA[5].CLK
645
CLK_n => BusA[6].CLK
646
CLK_n => BusA[7].CLK
647
CLK_n => BusB[0].CLK
648
CLK_n => BusB[1].CLK
649
CLK_n => BusB[2].CLK
650
CLK_n => BusB[3].CLK
651
CLK_n => BusB[4].CLK
652
CLK_n => BusB[5].CLK
653
CLK_n => BusB[6].CLK
654
CLK_n => BusB[7].CLK
655
CLK_n => RegBusA_r[0].CLK
656
CLK_n => RegBusA_r[1].CLK
657
CLK_n => RegBusA_r[2].CLK
658
CLK_n => RegBusA_r[3].CLK
659
CLK_n => RegBusA_r[4].CLK
660
CLK_n => RegBusA_r[5].CLK
661
CLK_n => RegBusA_r[6].CLK
662
CLK_n => RegBusA_r[7].CLK
663
CLK_n => RegBusA_r[8].CLK
664
CLK_n => RegBusA_r[9].CLK
665
CLK_n => RegBusA_r[10].CLK
666
CLK_n => RegBusA_r[11].CLK
667
CLK_n => RegBusA_r[12].CLK
668
CLK_n => RegBusA_r[13].CLK
669
CLK_n => RegBusA_r[14].CLK
670
CLK_n => RegBusA_r[15].CLK
671
CLK_n => IncDecZ.CLK
672
CLK_n => RegAddrC[0].CLK
673
CLK_n => RegAddrC[1].CLK
674
CLK_n => RegAddrC[2].CLK
675
CLK_n => RegAddrB_r[0].CLK
676
CLK_n => RegAddrB_r[1].CLK
677
CLK_n => RegAddrB_r[2].CLK
678
CLK_n => RegAddrA_r[0].CLK
679
CLK_n => RegAddrA_r[1].CLK
680
CLK_n => RegAddrA_r[2].CLK
681
CLK_n => XY_Ind.CLK
682
CLK_n => PreserveC_r.CLK
683
CLK_n => Save_ALU_r.CLK
684
CLK_n => ALU_Op_r[0].CLK
685
CLK_n => ALU_Op_r[1].CLK
686
CLK_n => ALU_Op_r[2].CLK
687
CLK_n => ALU_Op_r[3].CLK
688
CLK_n => Z16_r.CLK
689
CLK_n => BTR_r.CLK
690
CLK_n => Arith16_r.CLK
691
CLK_n => Read_To_Reg_r[0].CLK
692
CLK_n => Read_To_Reg_r[1].CLK
693
CLK_n => Read_To_Reg_r[2].CLK
694
CLK_n => Read_To_Reg_r[3].CLK
695
CLK_n => Read_To_Reg_r[4].CLK
696
CLK_n => Alternate.CLK
697
CLK_n => SP[0].CLK
698
CLK_n => SP[1].CLK
699
CLK_n => SP[2].CLK
700
CLK_n => SP[3].CLK
701
CLK_n => SP[4].CLK
702
CLK_n => SP[5].CLK
703
CLK_n => SP[6].CLK
704
CLK_n => SP[7].CLK
705
CLK_n => SP[8].CLK
706
CLK_n => SP[9].CLK
707
CLK_n => SP[10].CLK
708
CLK_n => SP[11].CLK
709
CLK_n => SP[12].CLK
710
CLK_n => SP[13].CLK
711
CLK_n => SP[14].CLK
712
CLK_n => SP[15].CLK
713
CLK_n => R[0].CLK
714
CLK_n => R[1].CLK
715
CLK_n => R[2].CLK
716
CLK_n => R[3].CLK
717
CLK_n => R[4].CLK
718
CLK_n => R[5].CLK
719
CLK_n => R[6].CLK
720
CLK_n => R[7].CLK
721
CLK_n => I[0].CLK
722
CLK_n => I[1].CLK
723
CLK_n => I[2].CLK
724
CLK_n => I[3].CLK
725
CLK_n => I[4].CLK
726
CLK_n => I[5].CLK
727
CLK_n => I[6].CLK
728
CLK_n => I[7].CLK
729
CLK_n => Fp[0].CLK
730
CLK_n => Fp[1].CLK
731
CLK_n => Fp[2].CLK
732
CLK_n => Fp[3].CLK
733
CLK_n => Fp[4].CLK
734
CLK_n => Fp[5].CLK
735
CLK_n => Fp[6].CLK
736
CLK_n => Fp[7].CLK
737
CLK_n => Ap[0].CLK
738
CLK_n => Ap[1].CLK
739
CLK_n => Ap[2].CLK
740
CLK_n => Ap[3].CLK
741
CLK_n => Ap[4].CLK
742
CLK_n => Ap[5].CLK
743
CLK_n => Ap[6].CLK
744
CLK_n => Ap[7].CLK
745
CLK_n => F[0].CLK
746
CLK_n => F[1].CLK
747
CLK_n => F[2].CLK
748
CLK_n => F[3].CLK
749
CLK_n => F[4].CLK
750
CLK_n => F[5].CLK
751
CLK_n => F[6].CLK
752
CLK_n => F[7].CLK
753
CLK_n => ACC[0].CLK
754
CLK_n => ACC[1].CLK
755
CLK_n => ACC[2].CLK
756
CLK_n => ACC[3].CLK
757
CLK_n => ACC[4].CLK
758
CLK_n => ACC[5].CLK
759
CLK_n => ACC[6].CLK
760
CLK_n => ACC[7].CLK
761
CLK_n => DO[0]~reg0.CLK
762
CLK_n => DO[1]~reg0.CLK
763
CLK_n => DO[2]~reg0.CLK
764
CLK_n => DO[3]~reg0.CLK
765
CLK_n => DO[4]~reg0.CLK
766
CLK_n => DO[5]~reg0.CLK
767
CLK_n => DO[6]~reg0.CLK
768
CLK_n => DO[7]~reg0.CLK
769
CLK_n => MCycles[0].CLK
770
CLK_n => MCycles[1].CLK
771
CLK_n => MCycles[2].CLK
772
CLK_n => IStatus[0].CLK
773
CLK_n => IStatus[1].CLK
774
CLK_n => XY_State[0].CLK
775
CLK_n => XY_State[1].CLK
776
CLK_n => ISet[0].CLK
777
CLK_n => ISet[1].CLK
778
CLK_n => IR[0].CLK
779
CLK_n => IR[1].CLK
780
CLK_n => IR[2].CLK
781
CLK_n => IR[3].CLK
782
CLK_n => IR[4].CLK
783
CLK_n => IR[5].CLK
784
CLK_n => IR[6].CLK
785
CLK_n => IR[7].CLK
786
CLK_n => TmpAddr[0].CLK
787
CLK_n => TmpAddr[1].CLK
788
CLK_n => TmpAddr[2].CLK
789
CLK_n => TmpAddr[3].CLK
790
CLK_n => TmpAddr[4].CLK
791
CLK_n => TmpAddr[5].CLK
792
CLK_n => TmpAddr[6].CLK
793
CLK_n => TmpAddr[7].CLK
794
CLK_n => TmpAddr[8].CLK
795
CLK_n => TmpAddr[9].CLK
796
CLK_n => TmpAddr[10].CLK
797
CLK_n => TmpAddr[11].CLK
798
CLK_n => TmpAddr[12].CLK
799
CLK_n => TmpAddr[13].CLK
800
CLK_n => TmpAddr[14].CLK
801
CLK_n => TmpAddr[15].CLK
802
CLK_n => A[0]~reg0.CLK
803
CLK_n => A[1]~reg0.CLK
804
CLK_n => A[2]~reg0.CLK
805
CLK_n => A[3]~reg0.CLK
806
CLK_n => A[4]~reg0.CLK
807
CLK_n => A[5]~reg0.CLK
808
CLK_n => A[6]~reg0.CLK
809
CLK_n => A[7]~reg0.CLK
810
CLK_n => A[8]~reg0.CLK
811
CLK_n => A[9]~reg0.CLK
812
CLK_n => A[10]~reg0.CLK
813
CLK_n => A[11]~reg0.CLK
814
CLK_n => A[12]~reg0.CLK
815
CLK_n => A[13]~reg0.CLK
816
CLK_n => A[14]~reg0.CLK
817
CLK_n => A[15]~reg0.CLK
818
CLK_n => PC[0].CLK
819
CLK_n => PC[1].CLK
820
CLK_n => PC[2].CLK
821
CLK_n => PC[3].CLK
822
CLK_n => PC[4].CLK
823
CLK_n => PC[5].CLK
824
CLK_n => PC[6].CLK
825
CLK_n => PC[7].CLK
826
CLK_n => PC[8].CLK
827
CLK_n => PC[9].CLK
828
CLK_n => PC[10].CLK
829
CLK_n => PC[11].CLK
830
CLK_n => PC[12].CLK
831
CLK_n => PC[13].CLK
832
CLK_n => PC[14].CLK
833
CLK_n => PC[15].CLK
834
CEN => ClkEn.IN1
835
CEN => RFSH_n~reg0.ENA
836
CEN => OldNMI_n.ENA
837
CEN => BusReq_s.ENA
838
CEN => INT_s.ENA
839
CEN => M1_n~reg0.ENA
840
CEN => NMI_s.ENA
841
CEN => MCycle[2].ENA
842
CEN => MCycle[1].ENA
843
CEN => MCycle[0].ENA
844
CEN => TState[2].ENA
845
CEN => TState[1].ENA
846
CEN => TState[0].ENA
847
CEN => Pre_XY_F_M[2].ENA
848
CEN => Pre_XY_F_M[1].ENA
849
CEN => Pre_XY_F_M[0].ENA
850
CEN => Halt_FF.ENA
851
CEN => BusAck.ENA
852
CEN => NMICycle.ENA
853
CEN => IntCycle.ENA
854
CEN => IntE_FF1.ENA
855
CEN => IntE_FF2.ENA
856
CEN => No_BTR.ENA
857
CEN => Auto_Wait_t1.ENA
858
CEN => Auto_Wait_t2.ENA
859
WAIT_n => process_2.IN1
860
WAIT_n => process_5.IN1
861
WAIT_n => process_7.IN1
862
WAIT_n => process_7.IN1
863
INT_n => INT_s.DATAIN
864
NMI_n => process_6.IN1
865
NMI_n => OldNMI_n.DATAIN
866
BUSRQ_n => BusReq_s.DATAIN
867
M1_n <= M1_n~reg0.DB_MAX_OUTPUT_PORT_TYPE
868
IORQ <= T80_MCode:mcode.IORQ
869
NoRead <= T80_MCode:mcode.NoRead
870
Write <= T80_MCode:mcode.Write
871
RFSH_n <= RFSH_n~reg0.DB_MAX_OUTPUT_PORT_TYPE
872
HALT_n <= Halt_FF.DB_MAX_OUTPUT_PORT_TYPE
873
BUSAK_n <= BusAck.DB_MAX_OUTPUT_PORT_TYPE
874
A[0] <= A[0]~reg0.DB_MAX_OUTPUT_PORT_TYPE
875
A[1] <= A[1]~reg0.DB_MAX_OUTPUT_PORT_TYPE
876
A[2] <= A[2]~reg0.DB_MAX_OUTPUT_PORT_TYPE
877
A[3] <= A[3]~reg0.DB_MAX_OUTPUT_PORT_TYPE
878
A[4] <= A[4]~reg0.DB_MAX_OUTPUT_PORT_TYPE
879
A[5] <= A[5]~reg0.DB_MAX_OUTPUT_PORT_TYPE
880
A[6] <= A[6]~reg0.DB_MAX_OUTPUT_PORT_TYPE
881
A[7] <= A[7]~reg0.DB_MAX_OUTPUT_PORT_TYPE
882
A[8] <= A[8]~reg0.DB_MAX_OUTPUT_PORT_TYPE
883
A[9] <= A[9]~reg0.DB_MAX_OUTPUT_PORT_TYPE
884
A[10] <= A[10]~reg0.DB_MAX_OUTPUT_PORT_TYPE
885
A[11] <= A[11]~reg0.DB_MAX_OUTPUT_PORT_TYPE
886
A[12] <= A[12]~reg0.DB_MAX_OUTPUT_PORT_TYPE
887
A[13] <= A[13]~reg0.DB_MAX_OUTPUT_PORT_TYPE
888
A[14] <= A[14]~reg0.DB_MAX_OUTPUT_PORT_TYPE
889
A[15] <= A[15]~reg0.DB_MAX_OUTPUT_PORT_TYPE
890
DInst[0] => IR.DATAA
891
DInst[0] => IR.DATAB
892
DInst[1] => IR.DATAA
893
DInst[1] => IR.DATAB
894
DInst[2] => IR.DATAA
895
DInst[2] => IR.DATAB
896
DInst[3] => IR.DATAA
897
DInst[3] => IR.DATAB
898
DInst[4] => IR.DATAA
899
DInst[4] => IR.DATAB
900
DInst[5] => IR.DATAA
901
DInst[5] => IR.DATAB
902
DInst[6] => IR.DATAA
903
DInst[6] => IR.DATAB
904
DInst[7] => IR.DATAA
905
DInst[7] => IR.DATAB
906
DI[0] => Save_Mux.DATAB
907
DI[0] => A.DATAA
908
DI[0] => Mux15.IN7
909
DI[0] => A.DATAB
910
DI[0] => PC.DATAB
911
DI[0] => Add2.IN32
912
DI[0] => Add5.IN32
913
DI[0] => TmpAddr.DATAB
914
DI[0] => TmpAddr.DATAB
915
DI[0] => F.IN0
916
DI[0] => Mux91.IN15
917
DI[0] => Mux99.IN10
918
DI[0] => Equal18.IN7
919
DI[1] => Save_Mux.DATAB
920
DI[1] => A.DATAA
921
DI[1] => Mux14.IN7
922
DI[1] => A.DATAB
923
DI[1] => PC.DATAB
924
DI[1] => Add2.IN31
925
DI[1] => Add5.IN31
926
DI[1] => TmpAddr.DATAB
927
DI[1] => TmpAddr.DATAB
928
DI[1] => F.IN1
929
DI[1] => Mux90.IN15
930
DI[1] => Mux98.IN10
931
DI[1] => Equal18.IN6
932
DI[2] => Save_Mux.DATAB
933
DI[2] => A.DATAA
934
DI[2] => Mux13.IN7
935
DI[2] => A.DATAB
936
DI[2] => PC.DATAB
937
DI[2] => Add2.IN30
938
DI[2] => Add5.IN30
939
DI[2] => TmpAddr.DATAB
940
DI[2] => TmpAddr.DATAB
941
DI[2] => F.IN1
942
DI[2] => Mux89.IN15
943
DI[2] => Mux97.IN10
944
DI[2] => Equal18.IN5
945
DI[3] => Save_Mux.DATAB
946
DI[3] => A.DATAA
947
DI[3] => Mux12.IN7
948
DI[3] => A.DATAB
949
DI[3] => PC.DATAB
950
DI[3] => Add2.IN29
951
DI[3] => Add5.IN29
952
DI[3] => TmpAddr.DATAB
953
DI[3] => TmpAddr.DATAB
954
DI[3] => F.IN1
955
DI[3] => Mux88.IN15
956
DI[3] => Mux96.IN10
957
DI[3] => Equal18.IN4
958
DI[4] => Save_Mux.DATAB
959
DI[4] => A.DATAA
960
DI[4] => Mux11.IN7
961
DI[4] => A.DATAB
962
DI[4] => PC.DATAB
963
DI[4] => Add2.IN28
964
DI[4] => Add5.IN28
965
DI[4] => TmpAddr.DATAB
966
DI[4] => TmpAddr.DATAB
967
DI[4] => F.IN1
968
DI[4] => Mux87.IN15
969
DI[4] => Mux95.IN10
970
DI[4] => Equal18.IN3
971
DI[5] => Save_Mux.DATAB
972
DI[5] => A.DATAA
973
DI[5] => Mux10.IN7
974
DI[5] => A.DATAB
975
DI[5] => PC.DATAB
976
DI[5] => Add2.IN27
977
DI[5] => Add5.IN27
978
DI[5] => TmpAddr.DATAB
979
DI[5] => TmpAddr.DATAB
980
DI[5] => F.IN1
981
DI[5] => Mux86.IN15
982
DI[5] => Mux94.IN10
983
DI[5] => Equal18.IN2
984
DI[6] => Save_Mux.DATAB
985
DI[6] => A.DATAA
986
DI[6] => Mux9.IN7
987
DI[6] => A.DATAB
988
DI[6] => PC.DATAB
989
DI[6] => Add2.IN26
990
DI[6] => Add5.IN26
991
DI[6] => TmpAddr.DATAB
992
DI[6] => TmpAddr.DATAB
993
DI[6] => F.IN1
994
DI[6] => Mux85.IN15
995
DI[6] => Mux93.IN10
996
DI[6] => Equal18.IN1
997
DI[7] => Save_Mux.DATAB
998
DI[7] => A.DATAA
999
DI[7] => Mux8.IN7
1000
DI[7] => A.DATAB
1001
DI[7] => PC.DATAB
1002
DI[7] => Add2.IN17
1003
DI[7] => Add2.IN18
1004
DI[7] => Add2.IN19
1005
DI[7] => Add2.IN20
1006
DI[7] => Add2.IN21
1007
DI[7] => Add2.IN22
1008
DI[7] => Add2.IN23
1009
DI[7] => Add2.IN24
1010
DI[7] => Add2.IN25
1011
DI[7] => Add5.IN17
1012
DI[7] => Add5.IN18
1013
DI[7] => Add5.IN19
1014
DI[7] => Add5.IN20
1015
DI[7] => Add5.IN21
1016
DI[7] => Add5.IN22
1017
DI[7] => Add5.IN23
1018
DI[7] => Add5.IN24
1019
DI[7] => Add5.IN25
1020
DI[7] => TmpAddr.DATAB
1021
DI[7] => TmpAddr.DATAB
1022
DI[7] => F.IN1
1023
DI[7] => F.DATAB
1024
DI[7] => Mux84.IN15
1025
DI[7] => Mux92.IN10
1026
DI[7] => Equal18.IN0
1027
DO[0] <= DO[0]~reg0.DB_MAX_OUTPUT_PORT_TYPE
1028
DO[1] <= DO[1]~reg0.DB_MAX_OUTPUT_PORT_TYPE
1029
DO[2] <= DO[2]~reg0.DB_MAX_OUTPUT_PORT_TYPE
1030
DO[3] <= DO[3]~reg0.DB_MAX_OUTPUT_PORT_TYPE
1031
DO[4] <= DO[4]~reg0.DB_MAX_OUTPUT_PORT_TYPE
1032
DO[5] <= DO[5]~reg0.DB_MAX_OUTPUT_PORT_TYPE
1033
DO[6] <= DO[6]~reg0.DB_MAX_OUTPUT_PORT_TYPE
1034
DO[7] <= DO[7]~reg0.DB_MAX_OUTPUT_PORT_TYPE
1035
MC[0] <= MCycle[0].DB_MAX_OUTPUT_PORT_TYPE
1036
MC[1] <= MCycle[1].DB_MAX_OUTPUT_PORT_TYPE
1037
MC[2] <= MCycle[2].DB_MAX_OUTPUT_PORT_TYPE
1038
TS[0] <= TState[0].DB_MAX_OUTPUT_PORT_TYPE
1039
TS[1] <= TState[1].DB_MAX_OUTPUT_PORT_TYPE
1040
TS[2] <= TState[2].DB_MAX_OUTPUT_PORT_TYPE
1041
IntCycle_n <= IntCycle.DB_MAX_OUTPUT_PORT_TYPE
1042
IntE <= IntE_FF1.DB_MAX_OUTPUT_PORT_TYPE
1043
Stop <= T80_MCode:mcode.I_DJNZ
1044
 
1045
 
1046
|Z80SOC|T80se:z80_inst|T80:u0|T80_MCode:mcode
1047
IR[0] => Mux5.IN7
1048
IR[0] => Mux28.IN7
1049
IR[0] => Set_BusB_To.DATAB
1050
IR[0] => Mux61.IN263
1051
IR[0] => Mux62.IN263
1052
IR[0] => Mux63.IN263
1053
IR[0] => Mux64.IN158
1054
IR[0] => Mux64.IN159
1055
IR[0] => Mux64.IN160
1056
IR[0] => Mux64.IN161
1057
IR[0] => Mux64.IN162
1058
IR[0] => Mux64.IN163
1059
IR[0] => Mux64.IN164
1060
IR[0] => Mux64.IN165
1061
IR[0] => Mux64.IN166
1062
IR[0] => Mux64.IN167
1063
IR[0] => Mux64.IN168
1064
IR[0] => Mux64.IN169
1065
IR[0] => Mux64.IN170
1066
IR[0] => Mux64.IN171
1067
IR[0] => Mux64.IN172
1068
IR[0] => Mux64.IN173
1069
IR[0] => Mux64.IN174
1070
IR[0] => Mux64.IN175
1071
IR[0] => Mux64.IN176
1072
IR[0] => Mux64.IN177
1073
IR[0] => Mux64.IN178
1074
IR[0] => Mux64.IN179
1075
IR[0] => Mux64.IN180
1076
IR[0] => Mux64.IN181
1077
IR[0] => Mux64.IN182
1078
IR[0] => Mux64.IN183
1079
IR[0] => Mux64.IN184
1080
IR[0] => Mux64.IN185
1081
IR[0] => Mux64.IN186
1082
IR[0] => Mux64.IN187
1083
IR[0] => Mux64.IN188
1084
IR[0] => Mux64.IN189
1085
IR[0] => Mux64.IN190
1086
IR[0] => Mux64.IN191
1087
IR[0] => Mux64.IN192
1088
IR[0] => Mux64.IN193
1089
IR[0] => Mux64.IN194
1090
IR[0] => Mux64.IN195
1091
IR[0] => Mux64.IN196
1092
IR[0] => Mux64.IN197
1093
IR[0] => Mux64.IN198
1094
IR[0] => Mux64.IN199
1095
IR[0] => Mux64.IN200
1096
IR[0] => Mux64.IN201
1097
IR[0] => Mux64.IN202
1098
IR[0] => Mux64.IN203
1099
IR[0] => Mux64.IN204
1100
IR[0] => Mux64.IN205
1101
IR[0] => Mux64.IN206
1102
IR[0] => Mux64.IN207
1103
IR[0] => Mux64.IN208
1104
IR[0] => Mux64.IN209
1105
IR[0] => Mux64.IN210
1106
IR[0] => Mux64.IN211
1107
IR[0] => Mux64.IN212
1108
IR[0] => Mux64.IN213
1109
IR[0] => Mux64.IN214
1110
IR[0] => Mux64.IN215
1111
IR[0] => Mux64.IN216
1112
IR[0] => Mux64.IN217
1113
IR[0] => Mux64.IN218
1114
IR[0] => Mux64.IN219
1115
IR[0] => Mux64.IN220
1116
IR[0] => Mux64.IN221
1117
IR[0] => Mux64.IN222
1118
IR[0] => Mux64.IN223
1119
IR[0] => Mux64.IN224
1120
IR[0] => Mux64.IN225
1121
IR[0] => Mux64.IN226
1122
IR[0] => Mux64.IN227
1123
IR[0] => Mux64.IN228
1124
IR[0] => Mux64.IN229
1125
IR[0] => Mux64.IN230
1126
IR[0] => Mux64.IN231
1127
IR[0] => Mux64.IN232
1128
IR[0] => Mux64.IN233
1129
IR[0] => Mux64.IN234
1130
IR[0] => Mux64.IN235
1131
IR[0] => Mux64.IN236
1132
IR[0] => Mux64.IN237
1133
IR[0] => Mux64.IN238
1134
IR[0] => Mux64.IN239
1135
IR[0] => Mux64.IN240
1136
IR[0] => Mux64.IN241
1137
IR[0] => Mux64.IN242
1138
IR[0] => Mux64.IN243
1139
IR[0] => Mux64.IN244
1140
IR[0] => Mux64.IN245
1141
IR[0] => Mux64.IN246
1142
IR[0] => Mux64.IN247
1143
IR[0] => Mux64.IN248
1144
IR[0] => Mux64.IN249
1145
IR[0] => Mux64.IN250
1146
IR[0] => Mux64.IN251
1147
IR[0] => Mux64.IN252
1148
IR[0] => Mux64.IN253
1149
IR[0] => Mux64.IN254
1150
IR[0] => Mux64.IN255
1151
IR[0] => Mux64.IN256
1152
IR[0] => Mux64.IN257
1153
IR[0] => Mux64.IN258
1154
IR[0] => Mux64.IN259
1155
IR[0] => Mux64.IN260
1156
IR[0] => Mux64.IN261
1157
IR[0] => Mux64.IN262
1158
IR[0] => Mux64.IN263
1159
IR[0] => Mux65.IN263
1160
IR[0] => Mux66.IN69
1161
IR[0] => Mux67.IN263
1162
IR[0] => Mux68.IN263
1163
IR[0] => Mux69.IN263
1164
IR[0] => Mux70.IN263
1165
IR[0] => Mux71.IN263
1166
IR[0] => Mux72.IN262
1167
IR[0] => Mux73.IN263
1168
IR[0] => Mux74.IN263
1169
IR[0] => Mux75.IN263
1170
IR[0] => Mux76.IN263
1171
IR[0] => Mux77.IN263
1172
IR[0] => Mux78.IN263
1173
IR[0] => Mux79.IN263
1174
IR[0] => Mux80.IN263
1175
IR[0] => Mux81.IN263
1176
IR[0] => Mux82.IN263
1177
IR[0] => Mux83.IN263
1178
IR[0] => Mux84.IN263
1179
IR[0] => Mux85.IN263
1180
IR[0] => Mux86.IN263
1181
IR[0] => Mux87.IN263
1182
IR[0] => Mux88.IN263
1183
IR[0] => Mux89.IN263
1184
IR[0] => Mux90.IN263
1185
IR[0] => Mux91.IN263
1186
IR[0] => Mux92.IN263
1187
IR[0] => Mux93.IN263
1188
IR[0] => Mux94.IN263
1189
IR[0] => Mux95.IN263
1190
IR[0] => Mux96.IN263
1191
IR[0] => Mux97.IN263
1192
IR[0] => Mux98.IN263
1193
IR[0] => Mux99.IN263
1194
IR[0] => Mux100.IN263
1195
IR[0] => Mux101.IN263
1196
IR[0] => Mux102.IN263
1197
IR[0] => Mux103.IN263
1198
IR[0] => Mux104.IN263
1199
IR[0] => Mux105.IN263
1200
IR[0] => Mux106.IN263
1201
IR[0] => Mux107.IN263
1202
IR[0] => Mux108.IN69
1203
IR[0] => Mux109.IN263
1204
IR[0] => Mux110.IN263
1205
IR[0] => Mux111.IN263
1206
IR[0] => Mux112.IN263
1207
IR[0] => Mux113.IN36
1208
IR[0] => Mux114.IN263
1209
IR[0] => Mux115.IN263
1210
IR[0] => Mux116.IN263
1211
IR[0] => Mux119.IN36
1212
IR[0] => Mux120.IN36
1213
IR[0] => Mux121.IN36
1214
IR[0] => Mux122.IN36
1215
IR[0] => Mux123.IN36
1216
IR[0] => Mux124.IN10
1217
IR[0] => Mux125.IN36
1218
IR[0] => Mux126.IN36
1219
IR[0] => Mux127.IN36
1220
IR[0] => Mux128.IN36
1221
IR[0] => Mux129.IN36
1222
IR[0] => Mux130.IN36
1223
IR[0] => Mux197.IN69
1224
IR[0] => Mux198.IN134
1225
IR[0] => Mux199.IN134
1226
IR[0] => Mux200.IN263
1227
IR[0] => Mux201.IN263
1228
IR[0] => Mux202.IN263
1229
IR[0] => Mux203.IN134
1230
IR[0] => Mux204.IN36
1231
IR[0] => Mux205.IN134
1232
IR[0] => Mux206.IN69
1233
IR[0] => Mux207.IN69
1234
IR[0] => Mux208.IN263
1235
IR[0] => Mux209.IN69
1236
IR[0] => Mux210.IN263
1237
IR[0] => Mux211.IN69
1238
IR[0] => Mux212.IN263
1239
IR[0] => Mux213.IN69
1240
IR[0] => Mux214.IN263
1241
IR[0] => Mux215.IN263
1242
IR[0] => Mux216.IN263
1243
IR[0] => Mux217.IN69
1244
IR[0] => Mux218.IN134
1245
IR[0] => Mux219.IN263
1246
IR[0] => Mux220.IN263
1247
IR[0] => Mux221.IN69
1248
IR[0] => Mux222.IN263
1249
IR[0] => Mux223.IN69
1250
IR[0] => Mux224.IN69
1251
IR[0] => Mux225.IN69
1252
IR[0] => Mux226.IN69
1253
IR[0] => Mux227.IN263
1254
IR[0] => Mux228.IN263
1255
IR[0] => Mux229.IN263
1256
IR[0] => Mux230.IN263
1257
IR[0] => Mux231.IN69
1258
IR[0] => Mux232.IN263
1259
IR[0] => Mux233.IN263
1260
IR[0] => Mux234.IN69
1261
IR[0] => Mux235.IN69
1262
IR[0] => Mux236.IN36
1263
IR[0] => Mux237.IN134
1264
IR[0] => Mux238.IN263
1265
IR[0] => Mux239.IN263
1266
IR[0] => Mux240.IN263
1267
IR[0] => Mux241.IN36
1268
IR[0] => Mux242.IN69
1269
IR[0] => Mux243.IN36
1270
IR[0] => Mux244.IN69
1271
IR[0] => Mux248.IN3
1272
IR[0] => Mux253.IN3
1273
IR[0] => Set_BusB_To.DATAB
1274
IR[0] => Equal5.IN7
1275
IR[0] => Equal7.IN3
1276
IR[1] => Mux4.IN7
1277
IR[1] => Mux27.IN7
1278
IR[1] => Set_BusB_To.DATAB
1279
IR[1] => Mux61.IN262
1280
IR[1] => Mux62.IN262
1281
IR[1] => Mux63.IN157
1282
IR[1] => Mux63.IN158
1283
IR[1] => Mux63.IN159
1284
IR[1] => Mux63.IN160
1285
IR[1] => Mux63.IN161
1286
IR[1] => Mux63.IN162
1287
IR[1] => Mux63.IN163
1288
IR[1] => Mux63.IN164
1289
IR[1] => Mux63.IN165
1290
IR[1] => Mux63.IN166
1291
IR[1] => Mux63.IN167
1292
IR[1] => Mux63.IN168
1293
IR[1] => Mux63.IN169
1294
IR[1] => Mux63.IN170
1295
IR[1] => Mux63.IN171
1296
IR[1] => Mux63.IN172
1297
IR[1] => Mux63.IN173
1298
IR[1] => Mux63.IN174
1299
IR[1] => Mux63.IN175
1300
IR[1] => Mux63.IN176
1301
IR[1] => Mux63.IN177
1302
IR[1] => Mux63.IN178
1303
IR[1] => Mux63.IN179
1304
IR[1] => Mux63.IN180
1305
IR[1] => Mux63.IN181
1306
IR[1] => Mux63.IN182
1307
IR[1] => Mux63.IN183
1308
IR[1] => Mux63.IN184
1309
IR[1] => Mux63.IN185
1310
IR[1] => Mux63.IN186
1311
IR[1] => Mux63.IN187
1312
IR[1] => Mux63.IN188
1313
IR[1] => Mux63.IN189
1314
IR[1] => Mux63.IN190
1315
IR[1] => Mux63.IN191
1316
IR[1] => Mux63.IN192
1317
IR[1] => Mux63.IN193
1318
IR[1] => Mux63.IN194
1319
IR[1] => Mux63.IN195
1320
IR[1] => Mux63.IN196
1321
IR[1] => Mux63.IN197
1322
IR[1] => Mux63.IN198
1323
IR[1] => Mux63.IN199
1324
IR[1] => Mux63.IN200
1325
IR[1] => Mux63.IN201
1326
IR[1] => Mux63.IN202
1327
IR[1] => Mux63.IN203
1328
IR[1] => Mux63.IN204
1329
IR[1] => Mux63.IN205
1330
IR[1] => Mux63.IN206
1331
IR[1] => Mux63.IN207
1332
IR[1] => Mux63.IN208
1333
IR[1] => Mux63.IN209
1334
IR[1] => Mux63.IN210
1335
IR[1] => Mux63.IN211
1336
IR[1] => Mux63.IN212
1337
IR[1] => Mux63.IN213
1338
IR[1] => Mux63.IN214
1339
IR[1] => Mux63.IN215
1340
IR[1] => Mux63.IN216
1341
IR[1] => Mux63.IN217
1342
IR[1] => Mux63.IN218
1343
IR[1] => Mux63.IN219
1344
IR[1] => Mux63.IN220
1345
IR[1] => Mux63.IN221
1346
IR[1] => Mux63.IN222
1347
IR[1] => Mux63.IN223
1348
IR[1] => Mux63.IN224
1349
IR[1] => Mux63.IN225
1350
IR[1] => Mux63.IN226
1351
IR[1] => Mux63.IN227
1352
IR[1] => Mux63.IN228
1353
IR[1] => Mux63.IN229
1354
IR[1] => Mux63.IN230
1355
IR[1] => Mux63.IN231
1356
IR[1] => Mux63.IN232
1357
IR[1] => Mux63.IN233
1358
IR[1] => Mux63.IN234
1359
IR[1] => Mux63.IN235
1360
IR[1] => Mux63.IN236
1361
IR[1] => Mux63.IN237
1362
IR[1] => Mux63.IN238
1363
IR[1] => Mux63.IN239
1364
IR[1] => Mux63.IN240
1365
IR[1] => Mux63.IN241
1366
IR[1] => Mux63.IN242
1367
IR[1] => Mux63.IN243
1368
IR[1] => Mux63.IN244
1369
IR[1] => Mux63.IN245
1370
IR[1] => Mux63.IN246
1371
IR[1] => Mux63.IN247
1372
IR[1] => Mux63.IN248
1373
IR[1] => Mux63.IN249
1374
IR[1] => Mux63.IN250
1375
IR[1] => Mux63.IN251
1376
IR[1] => Mux63.IN252
1377
IR[1] => Mux63.IN253
1378
IR[1] => Mux63.IN254
1379
IR[1] => Mux63.IN255
1380
IR[1] => Mux63.IN256
1381
IR[1] => Mux63.IN257
1382
IR[1] => Mux63.IN258
1383
IR[1] => Mux63.IN259
1384
IR[1] => Mux63.IN260
1385
IR[1] => Mux63.IN261
1386
IR[1] => Mux63.IN262
1387
IR[1] => Mux64.IN157
1388
IR[1] => Mux65.IN262
1389
IR[1] => Mux66.IN68
1390
IR[1] => Mux67.IN262
1391
IR[1] => Mux68.IN262
1392
IR[1] => Mux69.IN262
1393
IR[1] => Mux70.IN262
1394
IR[1] => Mux71.IN262
1395
IR[1] => Mux72.IN261
1396
IR[1] => Mux73.IN262
1397
IR[1] => Mux74.IN262
1398
IR[1] => Mux75.IN262
1399
IR[1] => Mux76.IN262
1400
IR[1] => Mux77.IN262
1401
IR[1] => Mux78.IN262
1402
IR[1] => Mux79.IN262
1403
IR[1] => Mux80.IN262
1404
IR[1] => Mux81.IN262
1405
IR[1] => Mux82.IN262
1406
IR[1] => Mux83.IN262
1407
IR[1] => Mux84.IN262
1408
IR[1] => Mux85.IN262
1409
IR[1] => Mux86.IN262
1410
IR[1] => Mux87.IN262
1411
IR[1] => Mux88.IN262
1412
IR[1] => Mux89.IN262
1413
IR[1] => Mux90.IN262
1414
IR[1] => Mux91.IN262
1415
IR[1] => Mux92.IN262
1416
IR[1] => Mux93.IN262
1417
IR[1] => Mux94.IN262
1418
IR[1] => Mux95.IN262
1419
IR[1] => Mux96.IN262
1420
IR[1] => Mux97.IN262
1421
IR[1] => Mux98.IN262
1422
IR[1] => Mux99.IN262
1423
IR[1] => Mux100.IN262
1424
IR[1] => Mux101.IN262
1425
IR[1] => Mux102.IN262
1426
IR[1] => Mux103.IN262
1427
IR[1] => Mux104.IN262
1428
IR[1] => Mux105.IN262
1429
IR[1] => Mux106.IN262
1430
IR[1] => Mux107.IN262
1431
IR[1] => Mux108.IN68
1432
IR[1] => Mux109.IN262
1433
IR[1] => Mux110.IN262
1434
IR[1] => Mux111.IN262
1435
IR[1] => Mux112.IN262
1436
IR[1] => Mux113.IN35
1437
IR[1] => Mux114.IN262
1438
IR[1] => Mux115.IN262
1439
IR[1] => Mux116.IN262
1440
IR[1] => Mux119.IN35
1441
IR[1] => Mux120.IN35
1442
IR[1] => Mux121.IN35
1443
IR[1] => Mux122.IN35
1444
IR[1] => Mux123.IN35
1445
IR[1] => Mux124.IN9
1446
IR[1] => Mux125.IN35
1447
IR[1] => Mux126.IN35
1448
IR[1] => Mux127.IN35
1449
IR[1] => Mux128.IN35
1450
IR[1] => Mux129.IN35
1451
IR[1] => Mux130.IN35
1452
IR[1] => Mux197.IN68
1453
IR[1] => Mux198.IN133
1454
IR[1] => Mux199.IN133
1455
IR[1] => Mux200.IN262
1456
IR[1] => Mux201.IN262
1457
IR[1] => Mux202.IN262
1458
IR[1] => Mux203.IN133
1459
IR[1] => Mux204.IN35
1460
IR[1] => Mux205.IN133
1461
IR[1] => Mux206.IN68
1462
IR[1] => Mux207.IN68
1463
IR[1] => Mux208.IN262
1464
IR[1] => Mux209.IN68
1465
IR[1] => Mux210.IN262
1466
IR[1] => Mux211.IN68
1467
IR[1] => Mux212.IN262
1468
IR[1] => Mux213.IN68
1469
IR[1] => Mux214.IN262
1470
IR[1] => Mux215.IN262
1471
IR[1] => Mux216.IN262
1472
IR[1] => Mux217.IN68
1473
IR[1] => Mux218.IN133
1474
IR[1] => Mux219.IN262
1475
IR[1] => Mux220.IN262
1476
IR[1] => Mux221.IN68
1477
IR[1] => Mux222.IN262
1478
IR[1] => Mux223.IN68
1479
IR[1] => Mux224.IN68
1480
IR[1] => Mux225.IN68
1481
IR[1] => Mux226.IN68
1482
IR[1] => Mux227.IN262
1483
IR[1] => Mux228.IN262
1484
IR[1] => Mux229.IN262
1485
IR[1] => Mux230.IN262
1486
IR[1] => Mux231.IN68
1487
IR[1] => Mux232.IN262
1488
IR[1] => Mux233.IN262
1489
IR[1] => Mux234.IN68
1490
IR[1] => Mux235.IN68
1491
IR[1] => Mux236.IN35
1492
IR[1] => Mux237.IN133
1493
IR[1] => Mux238.IN262
1494
IR[1] => Mux239.IN262
1495
IR[1] => Mux240.IN262
1496
IR[1] => Mux241.IN35
1497
IR[1] => Mux242.IN68
1498
IR[1] => Mux243.IN35
1499
IR[1] => Mux244.IN68
1500
IR[1] => Mux247.IN3
1501
IR[1] => Mux252.IN3
1502
IR[1] => Set_BusB_To.DATAB
1503
IR[1] => Equal5.IN6
1504
IR[1] => Equal7.IN7
1505
IR[2] => Mux3.IN7
1506
IR[2] => Mux26.IN7
1507
IR[2] => Set_BusB_To.DATAB
1508
IR[2] => Mux61.IN261
1509
IR[2] => Mux62.IN156
1510
IR[2] => Mux62.IN157
1511
IR[2] => Mux62.IN158
1512
IR[2] => Mux62.IN159
1513
IR[2] => Mux62.IN160
1514
IR[2] => Mux62.IN161
1515
IR[2] => Mux62.IN162
1516
IR[2] => Mux62.IN163
1517
IR[2] => Mux62.IN164
1518
IR[2] => Mux62.IN165
1519
IR[2] => Mux62.IN166
1520
IR[2] => Mux62.IN167
1521
IR[2] => Mux62.IN168
1522
IR[2] => Mux62.IN169
1523
IR[2] => Mux62.IN170
1524
IR[2] => Mux62.IN171
1525
IR[2] => Mux62.IN172
1526
IR[2] => Mux62.IN173
1527
IR[2] => Mux62.IN174
1528
IR[2] => Mux62.IN175
1529
IR[2] => Mux62.IN176
1530
IR[2] => Mux62.IN177
1531
IR[2] => Mux62.IN178
1532
IR[2] => Mux62.IN179
1533
IR[2] => Mux62.IN180
1534
IR[2] => Mux62.IN181
1535
IR[2] => Mux62.IN182
1536
IR[2] => Mux62.IN183
1537
IR[2] => Mux62.IN184
1538
IR[2] => Mux62.IN185
1539
IR[2] => Mux62.IN186
1540
IR[2] => Mux62.IN187
1541
IR[2] => Mux62.IN188
1542
IR[2] => Mux62.IN189
1543
IR[2] => Mux62.IN190
1544
IR[2] => Mux62.IN191
1545
IR[2] => Mux62.IN192
1546
IR[2] => Mux62.IN193
1547
IR[2] => Mux62.IN194
1548
IR[2] => Mux62.IN195
1549
IR[2] => Mux62.IN196
1550
IR[2] => Mux62.IN197
1551
IR[2] => Mux62.IN198
1552
IR[2] => Mux62.IN199
1553
IR[2] => Mux62.IN200
1554
IR[2] => Mux62.IN201
1555
IR[2] => Mux62.IN202
1556
IR[2] => Mux62.IN203
1557
IR[2] => Mux62.IN204
1558
IR[2] => Mux62.IN205
1559
IR[2] => Mux62.IN206
1560
IR[2] => Mux62.IN207
1561
IR[2] => Mux62.IN208
1562
IR[2] => Mux62.IN209
1563
IR[2] => Mux62.IN210
1564
IR[2] => Mux62.IN211
1565
IR[2] => Mux62.IN212
1566
IR[2] => Mux62.IN213
1567
IR[2] => Mux62.IN214
1568
IR[2] => Mux62.IN215
1569
IR[2] => Mux62.IN216
1570
IR[2] => Mux62.IN217
1571
IR[2] => Mux62.IN218
1572
IR[2] => Mux62.IN219
1573
IR[2] => Mux62.IN220
1574
IR[2] => Mux62.IN221
1575
IR[2] => Mux62.IN222
1576
IR[2] => Mux62.IN223
1577
IR[2] => Mux62.IN224
1578
IR[2] => Mux62.IN225
1579
IR[2] => Mux62.IN226
1580
IR[2] => Mux62.IN227
1581
IR[2] => Mux62.IN228
1582
IR[2] => Mux62.IN229
1583
IR[2] => Mux62.IN230
1584
IR[2] => Mux62.IN231
1585
IR[2] => Mux62.IN232
1586
IR[2] => Mux62.IN233
1587
IR[2] => Mux62.IN234
1588
IR[2] => Mux62.IN235
1589
IR[2] => Mux62.IN236
1590
IR[2] => Mux62.IN237
1591
IR[2] => Mux62.IN238
1592
IR[2] => Mux62.IN239
1593
IR[2] => Mux62.IN240
1594
IR[2] => Mux62.IN241
1595
IR[2] => Mux62.IN242
1596
IR[2] => Mux62.IN243
1597
IR[2] => Mux62.IN244
1598
IR[2] => Mux62.IN245
1599
IR[2] => Mux62.IN246
1600
IR[2] => Mux62.IN247
1601
IR[2] => Mux62.IN248
1602
IR[2] => Mux62.IN249
1603
IR[2] => Mux62.IN250
1604
IR[2] => Mux62.IN251
1605
IR[2] => Mux62.IN252
1606
IR[2] => Mux62.IN253
1607
IR[2] => Mux62.IN254
1608
IR[2] => Mux62.IN255
1609
IR[2] => Mux62.IN256
1610
IR[2] => Mux62.IN257
1611
IR[2] => Mux62.IN258
1612
IR[2] => Mux62.IN259
1613
IR[2] => Mux62.IN260
1614
IR[2] => Mux62.IN261
1615
IR[2] => Mux63.IN156
1616
IR[2] => Mux64.IN156
1617
IR[2] => Mux65.IN261
1618
IR[2] => Mux66.IN67
1619
IR[2] => Mux67.IN261
1620
IR[2] => Mux68.IN261
1621
IR[2] => Mux69.IN261
1622
IR[2] => Mux70.IN261
1623
IR[2] => Mux71.IN261
1624
IR[2] => Mux72.IN260
1625
IR[2] => Mux73.IN261
1626
IR[2] => Mux74.IN261
1627
IR[2] => Mux75.IN261
1628
IR[2] => Mux76.IN261
1629
IR[2] => Mux77.IN261
1630
IR[2] => Mux78.IN261
1631
IR[2] => Mux79.IN261
1632
IR[2] => Mux80.IN261
1633
IR[2] => Mux81.IN261
1634
IR[2] => Mux82.IN261
1635
IR[2] => Mux83.IN261
1636
IR[2] => Mux84.IN261
1637
IR[2] => Mux85.IN261
1638
IR[2] => Mux86.IN261
1639
IR[2] => Mux87.IN261
1640
IR[2] => Mux88.IN261
1641
IR[2] => Mux89.IN261
1642
IR[2] => Mux90.IN261
1643
IR[2] => Mux91.IN261
1644
IR[2] => Mux92.IN261
1645
IR[2] => Mux93.IN261
1646
IR[2] => Mux94.IN261
1647
IR[2] => Mux95.IN261
1648
IR[2] => Mux96.IN261
1649
IR[2] => Mux97.IN261
1650
IR[2] => Mux98.IN261
1651
IR[2] => Mux99.IN261
1652
IR[2] => Mux100.IN261
1653
IR[2] => Mux101.IN261
1654
IR[2] => Mux102.IN261
1655
IR[2] => Mux103.IN261
1656
IR[2] => Mux104.IN261
1657
IR[2] => Mux105.IN261
1658
IR[2] => Mux106.IN261
1659
IR[2] => Mux107.IN261
1660
IR[2] => Mux108.IN67
1661
IR[2] => Mux109.IN261
1662
IR[2] => Mux110.IN261
1663
IR[2] => Mux111.IN261
1664
IR[2] => Mux112.IN261
1665
IR[2] => Mux113.IN34
1666
IR[2] => Mux114.IN261
1667
IR[2] => Mux115.IN261
1668
IR[2] => Mux116.IN261
1669
IR[2] => Mux119.IN34
1670
IR[2] => Mux120.IN34
1671
IR[2] => Mux121.IN34
1672
IR[2] => Mux122.IN34
1673
IR[2] => Mux123.IN34
1674
IR[2] => Mux124.IN8
1675
IR[2] => Mux125.IN34
1676
IR[2] => Mux126.IN34
1677
IR[2] => Mux127.IN34
1678
IR[2] => Mux128.IN34
1679
IR[2] => Mux129.IN34
1680
IR[2] => Mux130.IN34
1681
IR[2] => Mux197.IN67
1682
IR[2] => Mux198.IN132
1683
IR[2] => Mux199.IN132
1684
IR[2] => Mux200.IN261
1685
IR[2] => Mux201.IN261
1686
IR[2] => Mux202.IN261
1687
IR[2] => Mux203.IN132
1688
IR[2] => Mux204.IN34
1689
IR[2] => Mux205.IN132
1690
IR[2] => Mux206.IN67
1691
IR[2] => Mux207.IN67
1692
IR[2] => Mux208.IN261
1693
IR[2] => Mux209.IN67
1694
IR[2] => Mux210.IN261
1695
IR[2] => Mux211.IN67
1696
IR[2] => Mux212.IN261
1697
IR[2] => Mux213.IN67
1698
IR[2] => Mux214.IN261
1699
IR[2] => Mux215.IN261
1700
IR[2] => Mux216.IN261
1701
IR[2] => Mux217.IN67
1702
IR[2] => Mux218.IN132
1703
IR[2] => Mux219.IN261
1704
IR[2] => Mux220.IN261
1705
IR[2] => Mux221.IN67
1706
IR[2] => Mux222.IN261
1707
IR[2] => Mux223.IN67
1708
IR[2] => Mux224.IN67
1709
IR[2] => Mux225.IN67
1710
IR[2] => Mux226.IN67
1711
IR[2] => Mux227.IN261
1712
IR[2] => Mux228.IN261
1713
IR[2] => Mux229.IN261
1714
IR[2] => Mux230.IN261
1715
IR[2] => Mux231.IN67
1716
IR[2] => Mux232.IN261
1717
IR[2] => Mux233.IN261
1718
IR[2] => Mux234.IN67
1719
IR[2] => Mux235.IN67
1720
IR[2] => Mux236.IN34
1721
IR[2] => Mux237.IN132
1722
IR[2] => Mux238.IN261
1723
IR[2] => Mux239.IN261
1724
IR[2] => Mux240.IN261
1725
IR[2] => Mux241.IN34
1726
IR[2] => Mux242.IN67
1727
IR[2] => Mux243.IN34
1728
IR[2] => Mux244.IN67
1729
IR[2] => Mux246.IN3
1730
IR[2] => Mux251.IN3
1731
IR[2] => Set_BusB_To.DATAB
1732
IR[2] => Equal5.IN2
1733
IR[2] => Equal7.IN6
1734
IR[3] => Mux2.IN7
1735
IR[3] => Mux34.IN2
1736
IR[3] => Mux34.IN3
1737
IR[3] => Mux34.IN4
1738
IR[3] => Mux34.IN5
1739
IR[3] => Mux34.IN6
1740
IR[3] => Mux34.IN7
1741
IR[3] => Mux45.IN6
1742
IR[3] => Mux61.IN260
1743
IR[3] => Mux62.IN155
1744
IR[3] => Mux63.IN155
1745
IR[3] => Mux64.IN155
1746
IR[3] => Mux65.IN260
1747
IR[3] => Mux66.IN66
1748
IR[3] => Mux67.IN260
1749
IR[3] => Mux68.IN260
1750
IR[3] => Mux69.IN197
1751
IR[3] => Mux69.IN198
1752
IR[3] => Mux69.IN199
1753
IR[3] => Mux69.IN200
1754
IR[3] => Mux69.IN201
1755
IR[3] => Mux69.IN202
1756
IR[3] => Mux69.IN203
1757
IR[3] => Mux69.IN204
1758
IR[3] => Mux69.IN205
1759
IR[3] => Mux69.IN206
1760
IR[3] => Mux69.IN207
1761
IR[3] => Mux69.IN208
1762
IR[3] => Mux69.IN209
1763
IR[3] => Mux69.IN210
1764
IR[3] => Mux69.IN211
1765
IR[3] => Mux69.IN212
1766
IR[3] => Mux69.IN213
1767
IR[3] => Mux69.IN214
1768
IR[3] => Mux69.IN215
1769
IR[3] => Mux69.IN216
1770
IR[3] => Mux69.IN217
1771
IR[3] => Mux69.IN218
1772
IR[3] => Mux69.IN219
1773
IR[3] => Mux69.IN220
1774
IR[3] => Mux69.IN221
1775
IR[3] => Mux69.IN222
1776
IR[3] => Mux69.IN223
1777
IR[3] => Mux69.IN224
1778
IR[3] => Mux69.IN225
1779
IR[3] => Mux69.IN226
1780
IR[3] => Mux69.IN227
1781
IR[3] => Mux69.IN228
1782
IR[3] => Mux69.IN229
1783
IR[3] => Mux69.IN230
1784
IR[3] => Mux69.IN231
1785
IR[3] => Mux69.IN232
1786
IR[3] => Mux69.IN233
1787
IR[3] => Mux69.IN234
1788
IR[3] => Mux69.IN235
1789
IR[3] => Mux69.IN236
1790
IR[3] => Mux69.IN237
1791
IR[3] => Mux69.IN238
1792
IR[3] => Mux69.IN239
1793
IR[3] => Mux69.IN240
1794
IR[3] => Mux69.IN241
1795
IR[3] => Mux69.IN242
1796
IR[3] => Mux69.IN243
1797
IR[3] => Mux69.IN244
1798
IR[3] => Mux69.IN245
1799
IR[3] => Mux69.IN246
1800
IR[3] => Mux69.IN247
1801
IR[3] => Mux69.IN248
1802
IR[3] => Mux69.IN249
1803
IR[3] => Mux69.IN250
1804
IR[3] => Mux69.IN251
1805
IR[3] => Mux69.IN252
1806
IR[3] => Mux69.IN253
1807
IR[3] => Mux69.IN254
1808
IR[3] => Mux69.IN255
1809
IR[3] => Mux69.IN256
1810
IR[3] => Mux69.IN257
1811
IR[3] => Mux69.IN258
1812
IR[3] => Mux69.IN259
1813
IR[3] => Mux69.IN260
1814
IR[3] => Mux70.IN260
1815
IR[3] => Mux71.IN260
1816
IR[3] => Mux72.IN259
1817
IR[3] => Mux73.IN260
1818
IR[3] => Mux74.IN260
1819
IR[3] => Mux75.IN260
1820
IR[3] => Mux76.IN260
1821
IR[3] => Mux77.IN260
1822
IR[3] => Mux78.IN260
1823
IR[3] => Mux79.IN260
1824
IR[3] => Mux80.IN260
1825
IR[3] => Mux81.IN260
1826
IR[3] => Mux82.IN260
1827
IR[3] => Mux83.IN260
1828
IR[3] => Mux84.IN260
1829
IR[3] => Mux85.IN260
1830
IR[3] => Mux86.IN260
1831
IR[3] => Mux87.IN260
1832
IR[3] => Mux88.IN260
1833
IR[3] => Mux89.IN260
1834
IR[3] => Mux90.IN260
1835
IR[3] => Mux91.IN260
1836
IR[3] => Mux92.IN260
1837
IR[3] => Mux93.IN260
1838
IR[3] => Mux94.IN260
1839
IR[3] => Mux95.IN260
1840
IR[3] => Mux96.IN260
1841
IR[3] => Mux97.IN260
1842
IR[3] => Mux98.IN260
1843
IR[3] => Mux99.IN30
1844
IR[3] => Mux99.IN31
1845
IR[3] => Mux99.IN32
1846
IR[3] => Mux99.IN33
1847
IR[3] => Mux99.IN34
1848
IR[3] => Mux99.IN35
1849
IR[3] => Mux99.IN36
1850
IR[3] => Mux99.IN37
1851
IR[3] => Mux99.IN38
1852
IR[3] => Mux99.IN39
1853
IR[3] => Mux99.IN40
1854
IR[3] => Mux99.IN41
1855
IR[3] => Mux99.IN42
1856
IR[3] => Mux99.IN43
1857
IR[3] => Mux99.IN44
1858
IR[3] => Mux99.IN45
1859
IR[3] => Mux99.IN46
1860
IR[3] => Mux99.IN47
1861
IR[3] => Mux99.IN48
1862
IR[3] => Mux99.IN49
1863
IR[3] => Mux99.IN50
1864
IR[3] => Mux99.IN51
1865
IR[3] => Mux99.IN52
1866
IR[3] => Mux99.IN53
1867
IR[3] => Mux99.IN54
1868
IR[3] => Mux99.IN55
1869
IR[3] => Mux99.IN56
1870
IR[3] => Mux99.IN57
1871
IR[3] => Mux99.IN58
1872
IR[3] => Mux99.IN59
1873
IR[3] => Mux99.IN60
1874
IR[3] => Mux99.IN61
1875
IR[3] => Mux99.IN62
1876
IR[3] => Mux99.IN63
1877
IR[3] => Mux99.IN64
1878
IR[3] => Mux99.IN65
1879
IR[3] => Mux99.IN66
1880
IR[3] => Mux99.IN67
1881
IR[3] => Mux99.IN68
1882
IR[3] => Mux99.IN69
1883
IR[3] => Mux99.IN70
1884
IR[3] => Mux99.IN71
1885
IR[3] => Mux99.IN72
1886
IR[3] => Mux99.IN73
1887
IR[3] => Mux99.IN74
1888
IR[3] => Mux99.IN75
1889
IR[3] => Mux99.IN76
1890
IR[3] => Mux99.IN77
1891
IR[3] => Mux99.IN78
1892
IR[3] => Mux99.IN79
1893
IR[3] => Mux99.IN80
1894
IR[3] => Mux99.IN81
1895
IR[3] => Mux99.IN82
1896
IR[3] => Mux99.IN83
1897
IR[3] => Mux99.IN84
1898
IR[3] => Mux99.IN85
1899
IR[3] => Mux99.IN86
1900
IR[3] => Mux99.IN87
1901
IR[3] => Mux99.IN88
1902
IR[3] => Mux99.IN89
1903
IR[3] => Mux99.IN90
1904
IR[3] => Mux99.IN91
1905
IR[3] => Mux99.IN92
1906
IR[3] => Mux99.IN93
1907
IR[3] => Mux99.IN94
1908
IR[3] => Mux99.IN95
1909
IR[3] => Mux99.IN96
1910
IR[3] => Mux99.IN97
1911
IR[3] => Mux99.IN98
1912
IR[3] => Mux99.IN99
1913
IR[3] => Mux99.IN100
1914
IR[3] => Mux99.IN101
1915
IR[3] => Mux99.IN102
1916
IR[3] => Mux99.IN103
1917
IR[3] => Mux99.IN104
1918
IR[3] => Mux99.IN105
1919
IR[3] => Mux99.IN106
1920
IR[3] => Mux99.IN107
1921
IR[3] => Mux99.IN108
1922
IR[3] => Mux99.IN109
1923
IR[3] => Mux99.IN110
1924
IR[3] => Mux99.IN111
1925
IR[3] => Mux99.IN112
1926
IR[3] => Mux99.IN113
1927
IR[3] => Mux99.IN114
1928
IR[3] => Mux99.IN115
1929
IR[3] => Mux99.IN116
1930
IR[3] => Mux99.IN117
1931
IR[3] => Mux99.IN118
1932
IR[3] => Mux99.IN119
1933
IR[3] => Mux99.IN120
1934
IR[3] => Mux99.IN121
1935
IR[3] => Mux99.IN122
1936
IR[3] => Mux99.IN123
1937
IR[3] => Mux99.IN124
1938
IR[3] => Mux99.IN125
1939
IR[3] => Mux99.IN126
1940
IR[3] => Mux99.IN127
1941
IR[3] => Mux99.IN128
1942
IR[3] => Mux99.IN129
1943
IR[3] => Mux99.IN130
1944
IR[3] => Mux99.IN131
1945
IR[3] => Mux99.IN132
1946
IR[3] => Mux99.IN133
1947
IR[3] => Mux99.IN134
1948
IR[3] => Mux99.IN135
1949
IR[3] => Mux99.IN136
1950
IR[3] => Mux99.IN137
1951
IR[3] => Mux99.IN138
1952
IR[3] => Mux99.IN139
1953
IR[3] => Mux99.IN140
1954
IR[3] => Mux99.IN141
1955
IR[3] => Mux99.IN142
1956
IR[3] => Mux99.IN143
1957
IR[3] => Mux99.IN144
1958
IR[3] => Mux99.IN145
1959
IR[3] => Mux99.IN146
1960
IR[3] => Mux99.IN147
1961
IR[3] => Mux99.IN148
1962
IR[3] => Mux99.IN149
1963
IR[3] => Mux99.IN150
1964
IR[3] => Mux99.IN151
1965
IR[3] => Mux99.IN152
1966
IR[3] => Mux99.IN153
1967
IR[3] => Mux99.IN154
1968
IR[3] => Mux99.IN155
1969
IR[3] => Mux99.IN156
1970
IR[3] => Mux99.IN157
1971
IR[3] => Mux99.IN158
1972
IR[3] => Mux99.IN159
1973
IR[3] => Mux99.IN160
1974
IR[3] => Mux99.IN161
1975
IR[3] => Mux99.IN162
1976
IR[3] => Mux99.IN163
1977
IR[3] => Mux99.IN164
1978
IR[3] => Mux99.IN165
1979
IR[3] => Mux99.IN166
1980
IR[3] => Mux99.IN167
1981
IR[3] => Mux99.IN168
1982
IR[3] => Mux99.IN169
1983
IR[3] => Mux99.IN170
1984
IR[3] => Mux99.IN171
1985
IR[3] => Mux99.IN172
1986
IR[3] => Mux99.IN173
1987
IR[3] => Mux99.IN174
1988
IR[3] => Mux99.IN175
1989
IR[3] => Mux99.IN176
1990
IR[3] => Mux99.IN177
1991
IR[3] => Mux99.IN178
1992
IR[3] => Mux99.IN179
1993
IR[3] => Mux99.IN180
1994
IR[3] => Mux99.IN181
1995
IR[3] => Mux99.IN182
1996
IR[3] => Mux99.IN183
1997
IR[3] => Mux99.IN184
1998
IR[3] => Mux99.IN185
1999
IR[3] => Mux99.IN186
2000
IR[3] => Mux99.IN187
2001
IR[3] => Mux99.IN188
2002
IR[3] => Mux99.IN189
2003
IR[3] => Mux99.IN190
2004
IR[3] => Mux99.IN191
2005
IR[3] => Mux99.IN192
2006
IR[3] => Mux99.IN193
2007
IR[3] => Mux99.IN194
2008
IR[3] => Mux99.IN195
2009
IR[3] => Mux99.IN196
2010
IR[3] => Mux99.IN197
2011
IR[3] => Mux99.IN198
2012
IR[3] => Mux99.IN199
2013
IR[3] => Mux99.IN200
2014
IR[3] => Mux99.IN201
2015
IR[3] => Mux99.IN202
2016
IR[3] => Mux99.IN203
2017
IR[3] => Mux99.IN204
2018
IR[3] => Mux99.IN205
2019
IR[3] => Mux99.IN206
2020
IR[3] => Mux99.IN207
2021
IR[3] => Mux99.IN208
2022
IR[3] => Mux99.IN209
2023
IR[3] => Mux99.IN210
2024
IR[3] => Mux99.IN211
2025
IR[3] => Mux99.IN212
2026
IR[3] => Mux99.IN213
2027
IR[3] => Mux99.IN214
2028
IR[3] => Mux99.IN215
2029
IR[3] => Mux99.IN216
2030
IR[3] => Mux99.IN217
2031
IR[3] => Mux99.IN218
2032
IR[3] => Mux99.IN219
2033
IR[3] => Mux99.IN220
2034
IR[3] => Mux99.IN221
2035
IR[3] => Mux99.IN222
2036
IR[3] => Mux99.IN223
2037
IR[3] => Mux99.IN224
2038
IR[3] => Mux99.IN225
2039
IR[3] => Mux99.IN226
2040
IR[3] => Mux99.IN227
2041
IR[3] => Mux99.IN228
2042
IR[3] => Mux99.IN229
2043
IR[3] => Mux99.IN230
2044
IR[3] => Mux99.IN231
2045
IR[3] => Mux99.IN232
2046
IR[3] => Mux99.IN233
2047
IR[3] => Mux99.IN234
2048
IR[3] => Mux99.IN235
2049
IR[3] => Mux99.IN236
2050
IR[3] => Mux99.IN237
2051
IR[3] => Mux99.IN238
2052
IR[3] => Mux99.IN239
2053
IR[3] => Mux99.IN240
2054
IR[3] => Mux99.IN241
2055
IR[3] => Mux99.IN242
2056
IR[3] => Mux99.IN243
2057
IR[3] => Mux99.IN244
2058
IR[3] => Mux99.IN245
2059
IR[3] => Mux99.IN246
2060
IR[3] => Mux99.IN247
2061
IR[3] => Mux99.IN248
2062
IR[3] => Mux99.IN249
2063
IR[3] => Mux99.IN250
2064
IR[3] => Mux99.IN251
2065
IR[3] => Mux99.IN252
2066
IR[3] => Mux99.IN253
2067
IR[3] => Mux99.IN254
2068
IR[3] => Mux99.IN255
2069
IR[3] => Mux99.IN256
2070
IR[3] => Mux99.IN257
2071
IR[3] => Mux99.IN258
2072
IR[3] => Mux99.IN259
2073
IR[3] => Mux99.IN260
2074
IR[3] => Mux100.IN260
2075
IR[3] => Mux101.IN260
2076
IR[3] => Mux102.IN260
2077
IR[3] => Mux103.IN260
2078
IR[3] => Mux104.IN260
2079
IR[3] => Mux105.IN260
2080
IR[3] => Mux106.IN260
2081
IR[3] => Mux107.IN260
2082
IR[3] => Mux108.IN66
2083
IR[3] => Mux109.IN260
2084
IR[3] => Mux110.IN260
2085
IR[3] => Mux111.IN260
2086
IR[3] => Mux112.IN260
2087
IR[3] => Mux114.IN260
2088
IR[3] => Mux115.IN260
2089
IR[3] => Mux116.IN260
2090
IR[3] => ALU_Op.DATAA
2091
IR[3] => ALU_Op.DATAA
2092
IR[3] => Mux141.IN6
2093
IR[3] => Mux141.IN7
2094
IR[3] => Mux145.IN1
2095
IR[3] => Mux145.IN2
2096
IR[3] => Mux145.IN3
2097
IR[3] => Mux145.IN4
2098
IR[3] => Mux145.IN5
2099
IR[3] => Mux145.IN6
2100
IR[3] => Mux145.IN7
2101
IR[3] => Mux147.IN7
2102
IR[3] => Mux150.IN1
2103
IR[3] => Mux150.IN2
2104
IR[3] => Mux150.IN3
2105
IR[3] => Mux150.IN4
2106
IR[3] => Mux150.IN5
2107
IR[3] => Mux150.IN6
2108
IR[3] => Mux150.IN7
2109
IR[3] => Mux158.IN1
2110
IR[3] => Mux158.IN2
2111
IR[3] => Mux158.IN3
2112
IR[3] => Mux170.IN1
2113
IR[3] => Mux170.IN2
2114
IR[3] => Mux170.IN3
2115
IR[3] => Mux170.IN4
2116
IR[3] => Mux170.IN5
2117
IR[3] => Mux170.IN6
2118
IR[3] => Mux170.IN7
2119
IR[3] => Mux175.IN1
2120
IR[3] => Mux175.IN2
2121
IR[3] => Mux175.IN3
2122
IR[3] => Mux175.IN4
2123
IR[3] => Mux175.IN5
2124
IR[3] => Mux175.IN6
2125
IR[3] => Mux175.IN7
2126
IR[3] => Set_BusA_To.DATAB
2127
IR[3] => Mux183.IN7
2128
IR[3] => Mux194.IN1
2129
IR[3] => Mux194.IN2
2130
IR[3] => Mux194.IN3
2131
IR[3] => Mux194.IN4
2132
IR[3] => Mux194.IN5
2133
IR[3] => Mux194.IN6
2134
IR[3] => Mux194.IN7
2135
IR[3] => Mux195.IN7
2136
IR[3] => Mux199.IN131
2137
IR[3] => Mux200.IN260
2138
IR[3] => Mux201.IN260
2139
IR[3] => Mux202.IN260
2140
IR[3] => Mux206.IN66
2141
IR[3] => Mux207.IN66
2142
IR[3] => Mux208.IN260
2143
IR[3] => Mux210.IN260
2144
IR[3] => Mux211.IN66
2145
IR[3] => Mux212.IN260
2146
IR[3] => Mux213.IN66
2147
IR[3] => Mux214.IN260
2148
IR[3] => Mux215.IN260
2149
IR[3] => Mux216.IN260
2150
IR[3] => Mux217.IN66
2151
IR[3] => Mux218.IN131
2152
IR[3] => Mux219.IN260
2153
IR[3] => Mux220.IN260
2154
IR[3] => Mux221.IN66
2155
IR[3] => Mux222.IN260
2156
IR[3] => Mux227.IN260
2157
IR[3] => Mux228.IN260
2158
IR[3] => Mux229.IN260
2159
IR[3] => Mux230.IN38
2160
IR[3] => Mux230.IN39
2161
IR[3] => Mux230.IN40
2162
IR[3] => Mux230.IN41
2163
IR[3] => Mux230.IN42
2164
IR[3] => Mux230.IN43
2165
IR[3] => Mux230.IN44
2166
IR[3] => Mux230.IN45
2167
IR[3] => Mux230.IN46
2168
IR[3] => Mux230.IN47
2169
IR[3] => Mux230.IN48
2170
IR[3] => Mux230.IN49
2171
IR[3] => Mux230.IN50
2172
IR[3] => Mux230.IN51
2173
IR[3] => Mux230.IN52
2174
IR[3] => Mux230.IN53
2175
IR[3] => Mux230.IN54
2176
IR[3] => Mux230.IN55
2177
IR[3] => Mux230.IN56
2178
IR[3] => Mux230.IN57
2179
IR[3] => Mux230.IN58
2180
IR[3] => Mux230.IN59
2181
IR[3] => Mux230.IN60
2182
IR[3] => Mux230.IN61
2183
IR[3] => Mux230.IN62
2184
IR[3] => Mux230.IN63
2185
IR[3] => Mux230.IN64
2186
IR[3] => Mux230.IN65
2187
IR[3] => Mux230.IN66
2188
IR[3] => Mux230.IN67
2189
IR[3] => Mux230.IN68
2190
IR[3] => Mux230.IN69
2191
IR[3] => Mux230.IN70
2192
IR[3] => Mux230.IN71
2193
IR[3] => Mux230.IN72
2194
IR[3] => Mux230.IN73
2195
IR[3] => Mux230.IN74
2196
IR[3] => Mux230.IN75
2197
IR[3] => Mux230.IN76
2198
IR[3] => Mux230.IN77
2199
IR[3] => Mux230.IN78
2200
IR[3] => Mux230.IN79
2201
IR[3] => Mux230.IN80
2202
IR[3] => Mux230.IN81
2203
IR[3] => Mux230.IN82
2204
IR[3] => Mux230.IN83
2205
IR[3] => Mux230.IN84
2206
IR[3] => Mux230.IN85
2207
IR[3] => Mux230.IN86
2208
IR[3] => Mux230.IN87
2209
IR[3] => Mux230.IN88
2210
IR[3] => Mux230.IN89
2211
IR[3] => Mux230.IN90
2212
IR[3] => Mux230.IN91
2213
IR[3] => Mux230.IN92
2214
IR[3] => Mux230.IN93
2215
IR[3] => Mux230.IN94
2216
IR[3] => Mux230.IN95
2217
IR[3] => Mux230.IN96
2218
IR[3] => Mux230.IN97
2219
IR[3] => Mux230.IN98
2220
IR[3] => Mux230.IN99
2221
IR[3] => Mux230.IN100
2222
IR[3] => Mux230.IN101
2223
IR[3] => Mux230.IN102
2224
IR[3] => Mux230.IN103
2225
IR[3] => Mux230.IN104
2226
IR[3] => Mux230.IN105
2227
IR[3] => Mux230.IN106
2228
IR[3] => Mux230.IN107
2229
IR[3] => Mux230.IN108
2230
IR[3] => Mux230.IN109
2231
IR[3] => Mux230.IN110
2232
IR[3] => Mux230.IN111
2233
IR[3] => Mux230.IN112
2234
IR[3] => Mux230.IN113
2235
IR[3] => Mux230.IN114
2236
IR[3] => Mux230.IN115
2237
IR[3] => Mux230.IN116
2238
IR[3] => Mux230.IN117
2239
IR[3] => Mux230.IN118
2240
IR[3] => Mux230.IN119
2241
IR[3] => Mux230.IN120
2242
IR[3] => Mux230.IN121
2243
IR[3] => Mux230.IN122
2244
IR[3] => Mux230.IN123
2245
IR[3] => Mux230.IN124
2246
IR[3] => Mux230.IN125
2247
IR[3] => Mux230.IN126
2248
IR[3] => Mux230.IN127
2249
IR[3] => Mux230.IN128
2250
IR[3] => Mux230.IN129
2251
IR[3] => Mux230.IN130
2252
IR[3] => Mux230.IN131
2253
IR[3] => Mux230.IN132
2254
IR[3] => Mux230.IN133
2255
IR[3] => Mux230.IN134
2256
IR[3] => Mux230.IN135
2257
IR[3] => Mux230.IN136
2258
IR[3] => Mux230.IN137
2259
IR[3] => Mux230.IN138
2260
IR[3] => Mux230.IN139
2261
IR[3] => Mux230.IN140
2262
IR[3] => Mux230.IN141
2263
IR[3] => Mux230.IN142
2264
IR[3] => Mux230.IN143
2265
IR[3] => Mux230.IN144
2266
IR[3] => Mux230.IN145
2267
IR[3] => Mux230.IN146
2268
IR[3] => Mux230.IN147
2269
IR[3] => Mux230.IN148
2270
IR[3] => Mux230.IN149
2271
IR[3] => Mux230.IN150
2272
IR[3] => Mux230.IN151
2273
IR[3] => Mux230.IN152
2274
IR[3] => Mux230.IN153
2275
IR[3] => Mux230.IN154
2276
IR[3] => Mux230.IN155
2277
IR[3] => Mux230.IN156
2278
IR[3] => Mux230.IN157
2279
IR[3] => Mux230.IN158
2280
IR[3] => Mux230.IN159
2281
IR[3] => Mux230.IN160
2282
IR[3] => Mux230.IN161
2283
IR[3] => Mux230.IN162
2284
IR[3] => Mux230.IN163
2285
IR[3] => Mux230.IN164
2286
IR[3] => Mux230.IN165
2287
IR[3] => Mux230.IN166
2288
IR[3] => Mux230.IN167
2289
IR[3] => Mux230.IN168
2290
IR[3] => Mux230.IN169
2291
IR[3] => Mux230.IN170
2292
IR[3] => Mux230.IN171
2293
IR[3] => Mux230.IN172
2294
IR[3] => Mux230.IN173
2295
IR[3] => Mux230.IN174
2296
IR[3] => Mux230.IN175
2297
IR[3] => Mux230.IN176
2298
IR[3] => Mux230.IN177
2299
IR[3] => Mux230.IN178
2300
IR[3] => Mux230.IN179
2301
IR[3] => Mux230.IN180
2302
IR[3] => Mux230.IN181
2303
IR[3] => Mux230.IN182
2304
IR[3] => Mux230.IN183
2305
IR[3] => Mux230.IN184
2306
IR[3] => Mux230.IN185
2307
IR[3] => Mux230.IN186
2308
IR[3] => Mux230.IN187
2309
IR[3] => Mux230.IN188
2310
IR[3] => Mux230.IN189
2311
IR[3] => Mux230.IN190
2312
IR[3] => Mux230.IN191
2313
IR[3] => Mux230.IN192
2314
IR[3] => Mux230.IN193
2315
IR[3] => Mux230.IN194
2316
IR[3] => Mux230.IN195
2317
IR[3] => Mux230.IN196
2318
IR[3] => Mux230.IN197
2319
IR[3] => Mux230.IN198
2320
IR[3] => Mux230.IN199
2321
IR[3] => Mux230.IN200
2322
IR[3] => Mux230.IN201
2323
IR[3] => Mux230.IN202
2324
IR[3] => Mux230.IN203
2325
IR[3] => Mux230.IN204
2326
IR[3] => Mux230.IN205
2327
IR[3] => Mux230.IN206
2328
IR[3] => Mux230.IN207
2329
IR[3] => Mux230.IN208
2330
IR[3] => Mux230.IN209
2331
IR[3] => Mux230.IN210
2332
IR[3] => Mux230.IN211
2333
IR[3] => Mux230.IN212
2334
IR[3] => Mux230.IN213
2335
IR[3] => Mux230.IN214
2336
IR[3] => Mux230.IN215
2337
IR[3] => Mux230.IN216
2338
IR[3] => Mux230.IN217
2339
IR[3] => Mux230.IN218
2340
IR[3] => Mux230.IN219
2341
IR[3] => Mux230.IN220
2342
IR[3] => Mux230.IN221
2343
IR[3] => Mux230.IN222
2344
IR[3] => Mux230.IN223
2345
IR[3] => Mux230.IN224
2346
IR[3] => Mux230.IN225
2347
IR[3] => Mux230.IN226
2348
IR[3] => Mux230.IN227
2349
IR[3] => Mux230.IN228
2350
IR[3] => Mux230.IN229
2351
IR[3] => Mux230.IN230
2352
IR[3] => Mux230.IN231
2353
IR[3] => Mux230.IN232
2354
IR[3] => Mux230.IN233
2355
IR[3] => Mux230.IN234
2356
IR[3] => Mux230.IN235
2357
IR[3] => Mux230.IN236
2358
IR[3] => Mux230.IN237
2359
IR[3] => Mux230.IN238
2360
IR[3] => Mux230.IN239
2361
IR[3] => Mux230.IN240
2362
IR[3] => Mux230.IN241
2363
IR[3] => Mux230.IN242
2364
IR[3] => Mux230.IN243
2365
IR[3] => Mux230.IN244
2366
IR[3] => Mux230.IN245
2367
IR[3] => Mux230.IN246
2368
IR[3] => Mux230.IN247
2369
IR[3] => Mux230.IN248
2370
IR[3] => Mux230.IN249
2371
IR[3] => Mux230.IN250
2372
IR[3] => Mux230.IN251
2373
IR[3] => Mux230.IN252
2374
IR[3] => Mux230.IN253
2375
IR[3] => Mux230.IN254
2376
IR[3] => Mux230.IN255
2377
IR[3] => Mux230.IN256
2378
IR[3] => Mux230.IN257
2379
IR[3] => Mux230.IN258
2380
IR[3] => Mux230.IN259
2381
IR[3] => Mux230.IN260
2382
IR[3] => Mux232.IN260
2383
IR[3] => Mux233.IN260
2384
IR[3] => Mux237.IN131
2385
IR[3] => Mux238.IN260
2386
IR[3] => Mux239.IN260
2387
IR[3] => Mux240.IN260
2388
IR[3] => Equal3.IN0
2389
IR[3] => Equal5.IN5
2390
IR[3] => Equal7.IN2
2391
IR[4] => Mux1.IN7
2392
IR[4] => Set_BusA_To.DATAA
2393
IR[4] => Mux45.IN5
2394
IR[4] => Mux61.IN259
2395
IR[4] => Mux62.IN154
2396
IR[4] => Mux63.IN154
2397
IR[4] => Mux64.IN154
2398
IR[4] => Mux65.IN259
2399
IR[4] => Mux67.IN259
2400
IR[4] => Mux68.IN196
2401
IR[4] => Mux68.IN197
2402
IR[4] => Mux68.IN198
2403
IR[4] => Mux68.IN199
2404
IR[4] => Mux68.IN200
2405
IR[4] => Mux68.IN201
2406
IR[4] => Mux68.IN202
2407
IR[4] => Mux68.IN203
2408
IR[4] => Mux68.IN204
2409
IR[4] => Mux68.IN205
2410
IR[4] => Mux68.IN206
2411
IR[4] => Mux68.IN207
2412
IR[4] => Mux68.IN208
2413
IR[4] => Mux68.IN209
2414
IR[4] => Mux68.IN210
2415
IR[4] => Mux68.IN211
2416
IR[4] => Mux68.IN212
2417
IR[4] => Mux68.IN213
2418
IR[4] => Mux68.IN214
2419
IR[4] => Mux68.IN215
2420
IR[4] => Mux68.IN216
2421
IR[4] => Mux68.IN217
2422
IR[4] => Mux68.IN218
2423
IR[4] => Mux68.IN219
2424
IR[4] => Mux68.IN220
2425
IR[4] => Mux68.IN221
2426
IR[4] => Mux68.IN222
2427
IR[4] => Mux68.IN223
2428
IR[4] => Mux68.IN224
2429
IR[4] => Mux68.IN225
2430
IR[4] => Mux68.IN226
2431
IR[4] => Mux68.IN227
2432
IR[4] => Mux68.IN228
2433
IR[4] => Mux68.IN229
2434
IR[4] => Mux68.IN230
2435
IR[4] => Mux68.IN231
2436
IR[4] => Mux68.IN232
2437
IR[4] => Mux68.IN233
2438
IR[4] => Mux68.IN234
2439
IR[4] => Mux68.IN235
2440
IR[4] => Mux68.IN236
2441
IR[4] => Mux68.IN237
2442
IR[4] => Mux68.IN238
2443
IR[4] => Mux68.IN239
2444
IR[4] => Mux68.IN240
2445
IR[4] => Mux68.IN241
2446
IR[4] => Mux68.IN242
2447
IR[4] => Mux68.IN243
2448
IR[4] => Mux68.IN244
2449
IR[4] => Mux68.IN245
2450
IR[4] => Mux68.IN246
2451
IR[4] => Mux68.IN247
2452
IR[4] => Mux68.IN248
2453
IR[4] => Mux68.IN249
2454
IR[4] => Mux68.IN250
2455
IR[4] => Mux68.IN251
2456
IR[4] => Mux68.IN252
2457
IR[4] => Mux68.IN253
2458
IR[4] => Mux68.IN254
2459
IR[4] => Mux68.IN255
2460
IR[4] => Mux68.IN256
2461
IR[4] => Mux68.IN257
2462
IR[4] => Mux68.IN258
2463
IR[4] => Mux68.IN259
2464
IR[4] => Mux69.IN196
2465
IR[4] => Mux70.IN259
2466
IR[4] => Mux71.IN259
2467
IR[4] => Mux72.IN258
2468
IR[4] => Mux73.IN259
2469
IR[4] => Mux74.IN259
2470
IR[4] => Mux75.IN259
2471
IR[4] => Mux76.IN259
2472
IR[4] => Mux77.IN259
2473
IR[4] => Mux78.IN259
2474
IR[4] => Mux79.IN259
2475
IR[4] => Mux80.IN259
2476
IR[4] => Mux81.IN259
2477
IR[4] => Mux82.IN259
2478
IR[4] => Mux83.IN259
2479
IR[4] => Mux84.IN259
2480
IR[4] => Mux85.IN259
2481
IR[4] => Mux86.IN259
2482
IR[4] => Mux87.IN259
2483
IR[4] => Mux88.IN259
2484
IR[4] => Mux89.IN259
2485
IR[4] => Mux90.IN251
2486
IR[4] => Mux90.IN252
2487
IR[4] => Mux90.IN253
2488
IR[4] => Mux90.IN254
2489
IR[4] => Mux90.IN255
2490
IR[4] => Mux90.IN256
2491
IR[4] => Mux90.IN257
2492
IR[4] => Mux90.IN258
2493
IR[4] => Mux90.IN259
2494
IR[4] => Mux91.IN259
2495
IR[4] => Mux92.IN259
2496
IR[4] => Mux93.IN259
2497
IR[4] => Mux94.IN259
2498
IR[4] => Mux95.IN259
2499
IR[4] => Mux96.IN259
2500
IR[4] => Mux97.IN259
2501
IR[4] => Mux98.IN29
2502
IR[4] => Mux98.IN30
2503
IR[4] => Mux98.IN31
2504
IR[4] => Mux98.IN32
2505
IR[4] => Mux98.IN33
2506
IR[4] => Mux98.IN34
2507
IR[4] => Mux98.IN35
2508
IR[4] => Mux98.IN36
2509
IR[4] => Mux98.IN37
2510
IR[4] => Mux98.IN38
2511
IR[4] => Mux98.IN39
2512
IR[4] => Mux98.IN40
2513
IR[4] => Mux98.IN41
2514
IR[4] => Mux98.IN42
2515
IR[4] => Mux98.IN43
2516
IR[4] => Mux98.IN44
2517
IR[4] => Mux98.IN45
2518
IR[4] => Mux98.IN46
2519
IR[4] => Mux98.IN47
2520
IR[4] => Mux98.IN48
2521
IR[4] => Mux98.IN49
2522
IR[4] => Mux98.IN50
2523
IR[4] => Mux98.IN51
2524
IR[4] => Mux98.IN52
2525
IR[4] => Mux98.IN53
2526
IR[4] => Mux98.IN54
2527
IR[4] => Mux98.IN55
2528
IR[4] => Mux98.IN56
2529
IR[4] => Mux98.IN57
2530
IR[4] => Mux98.IN58
2531
IR[4] => Mux98.IN59
2532
IR[4] => Mux98.IN60
2533
IR[4] => Mux98.IN61
2534
IR[4] => Mux98.IN62
2535
IR[4] => Mux98.IN63
2536
IR[4] => Mux98.IN64
2537
IR[4] => Mux98.IN65
2538
IR[4] => Mux98.IN66
2539
IR[4] => Mux98.IN67
2540
IR[4] => Mux98.IN68
2541
IR[4] => Mux98.IN69
2542
IR[4] => Mux98.IN70
2543
IR[4] => Mux98.IN71
2544
IR[4] => Mux98.IN72
2545
IR[4] => Mux98.IN73
2546
IR[4] => Mux98.IN74
2547
IR[4] => Mux98.IN75
2548
IR[4] => Mux98.IN76
2549
IR[4] => Mux98.IN77
2550
IR[4] => Mux98.IN78
2551
IR[4] => Mux98.IN79
2552
IR[4] => Mux98.IN80
2553
IR[4] => Mux98.IN81
2554
IR[4] => Mux98.IN82
2555
IR[4] => Mux98.IN83
2556
IR[4] => Mux98.IN84
2557
IR[4] => Mux98.IN85
2558
IR[4] => Mux98.IN86
2559
IR[4] => Mux98.IN87
2560
IR[4] => Mux98.IN88
2561
IR[4] => Mux98.IN89
2562
IR[4] => Mux98.IN90
2563
IR[4] => Mux98.IN91
2564
IR[4] => Mux98.IN92
2565
IR[4] => Mux98.IN93
2566
IR[4] => Mux98.IN94
2567
IR[4] => Mux98.IN95
2568
IR[4] => Mux98.IN96
2569
IR[4] => Mux98.IN97
2570
IR[4] => Mux98.IN98
2571
IR[4] => Mux98.IN99
2572
IR[4] => Mux98.IN100
2573
IR[4] => Mux98.IN101
2574
IR[4] => Mux98.IN102
2575
IR[4] => Mux98.IN103
2576
IR[4] => Mux98.IN104
2577
IR[4] => Mux98.IN105
2578
IR[4] => Mux98.IN106
2579
IR[4] => Mux98.IN107
2580
IR[4] => Mux98.IN108
2581
IR[4] => Mux98.IN109
2582
IR[4] => Mux98.IN110
2583
IR[4] => Mux98.IN111
2584
IR[4] => Mux98.IN112
2585
IR[4] => Mux98.IN113
2586
IR[4] => Mux98.IN114
2587
IR[4] => Mux98.IN115
2588
IR[4] => Mux98.IN116
2589
IR[4] => Mux98.IN117
2590
IR[4] => Mux98.IN118
2591
IR[4] => Mux98.IN119
2592
IR[4] => Mux98.IN120
2593
IR[4] => Mux98.IN121
2594
IR[4] => Mux98.IN122
2595
IR[4] => Mux98.IN123
2596
IR[4] => Mux98.IN124
2597
IR[4] => Mux98.IN125
2598
IR[4] => Mux98.IN126
2599
IR[4] => Mux98.IN127
2600
IR[4] => Mux98.IN128
2601
IR[4] => Mux98.IN129
2602
IR[4] => Mux98.IN130
2603
IR[4] => Mux98.IN131
2604
IR[4] => Mux98.IN132
2605
IR[4] => Mux98.IN133
2606
IR[4] => Mux98.IN134
2607
IR[4] => Mux98.IN135
2608
IR[4] => Mux98.IN136
2609
IR[4] => Mux98.IN137
2610
IR[4] => Mux98.IN138
2611
IR[4] => Mux98.IN139
2612
IR[4] => Mux98.IN140
2613
IR[4] => Mux98.IN141
2614
IR[4] => Mux98.IN142
2615
IR[4] => Mux98.IN143
2616
IR[4] => Mux98.IN144
2617
IR[4] => Mux98.IN145
2618
IR[4] => Mux98.IN146
2619
IR[4] => Mux98.IN147
2620
IR[4] => Mux98.IN148
2621
IR[4] => Mux98.IN149
2622
IR[4] => Mux98.IN150
2623
IR[4] => Mux98.IN151
2624
IR[4] => Mux98.IN152
2625
IR[4] => Mux98.IN153
2626
IR[4] => Mux98.IN154
2627
IR[4] => Mux98.IN155
2628
IR[4] => Mux98.IN156
2629
IR[4] => Mux98.IN157
2630
IR[4] => Mux98.IN158
2631
IR[4] => Mux98.IN159
2632
IR[4] => Mux98.IN160
2633
IR[4] => Mux98.IN161
2634
IR[4] => Mux98.IN162
2635
IR[4] => Mux98.IN163
2636
IR[4] => Mux98.IN164
2637
IR[4] => Mux98.IN165
2638
IR[4] => Mux98.IN166
2639
IR[4] => Mux98.IN167
2640
IR[4] => Mux98.IN168
2641
IR[4] => Mux98.IN169
2642
IR[4] => Mux98.IN170
2643
IR[4] => Mux98.IN171
2644
IR[4] => Mux98.IN172
2645
IR[4] => Mux98.IN173
2646
IR[4] => Mux98.IN174
2647
IR[4] => Mux98.IN175
2648
IR[4] => Mux98.IN176
2649
IR[4] => Mux98.IN177
2650
IR[4] => Mux98.IN178
2651
IR[4] => Mux98.IN179
2652
IR[4] => Mux98.IN180
2653
IR[4] => Mux98.IN181
2654
IR[4] => Mux98.IN182
2655
IR[4] => Mux98.IN183
2656
IR[4] => Mux98.IN184
2657
IR[4] => Mux98.IN185
2658
IR[4] => Mux98.IN186
2659
IR[4] => Mux98.IN187
2660
IR[4] => Mux98.IN188
2661
IR[4] => Mux98.IN189
2662
IR[4] => Mux98.IN190
2663
IR[4] => Mux98.IN191
2664
IR[4] => Mux98.IN192
2665
IR[4] => Mux98.IN193
2666
IR[4] => Mux98.IN194
2667
IR[4] => Mux98.IN195
2668
IR[4] => Mux98.IN196
2669
IR[4] => Mux98.IN197
2670
IR[4] => Mux98.IN198
2671
IR[4] => Mux98.IN199
2672
IR[4] => Mux98.IN200
2673
IR[4] => Mux98.IN201
2674
IR[4] => Mux98.IN202
2675
IR[4] => Mux98.IN203
2676
IR[4] => Mux98.IN204
2677
IR[4] => Mux98.IN205
2678
IR[4] => Mux98.IN206
2679
IR[4] => Mux98.IN207
2680
IR[4] => Mux98.IN208
2681
IR[4] => Mux98.IN209
2682
IR[4] => Mux98.IN210
2683
IR[4] => Mux98.IN211
2684
IR[4] => Mux98.IN212
2685
IR[4] => Mux98.IN213
2686
IR[4] => Mux98.IN214
2687
IR[4] => Mux98.IN215
2688
IR[4] => Mux98.IN216
2689
IR[4] => Mux98.IN217
2690
IR[4] => Mux98.IN218
2691
IR[4] => Mux98.IN219
2692
IR[4] => Mux98.IN220
2693
IR[4] => Mux98.IN221
2694
IR[4] => Mux98.IN222
2695
IR[4] => Mux98.IN223
2696
IR[4] => Mux98.IN224
2697
IR[4] => Mux98.IN225
2698
IR[4] => Mux98.IN226
2699
IR[4] => Mux98.IN227
2700
IR[4] => Mux98.IN228
2701
IR[4] => Mux98.IN229
2702
IR[4] => Mux98.IN230
2703
IR[4] => Mux98.IN231
2704
IR[4] => Mux98.IN232
2705
IR[4] => Mux98.IN233
2706
IR[4] => Mux98.IN234
2707
IR[4] => Mux98.IN235
2708
IR[4] => Mux98.IN236
2709
IR[4] => Mux98.IN237
2710
IR[4] => Mux98.IN238
2711
IR[4] => Mux98.IN239
2712
IR[4] => Mux98.IN240
2713
IR[4] => Mux98.IN241
2714
IR[4] => Mux98.IN242
2715
IR[4] => Mux98.IN243
2716
IR[4] => Mux98.IN244
2717
IR[4] => Mux98.IN245
2718
IR[4] => Mux98.IN246
2719
IR[4] => Mux98.IN247
2720
IR[4] => Mux98.IN248
2721
IR[4] => Mux98.IN249
2722
IR[4] => Mux98.IN250
2723
IR[4] => Mux98.IN251
2724
IR[4] => Mux98.IN252
2725
IR[4] => Mux98.IN253
2726
IR[4] => Mux98.IN254
2727
IR[4] => Mux98.IN255
2728
IR[4] => Mux98.IN256
2729
IR[4] => Mux98.IN257
2730
IR[4] => Mux98.IN258
2731
IR[4] => Mux98.IN259
2732
IR[4] => Mux99.IN29
2733
IR[4] => Mux100.IN259
2734
IR[4] => Mux101.IN259
2735
IR[4] => Mux102.IN259
2736
IR[4] => Mux103.IN259
2737
IR[4] => Mux104.IN259
2738
IR[4] => Mux105.IN259
2739
IR[4] => Mux106.IN259
2740
IR[4] => Mux107.IN259
2741
IR[4] => Mux109.IN259
2742
IR[4] => Mux110.IN259
2743
IR[4] => Mux111.IN259
2744
IR[4] => Mux112.IN259
2745
IR[4] => Mux114.IN259
2746
IR[4] => Mux115.IN259
2747
IR[4] => Mux116.IN259
2748
IR[4] => ALU_Op.DATAA
2749
IR[4] => ALU_Op.DATAA
2750
IR[4] => Set_BusA_To.DATAA
2751
IR[4] => Mux144.IN1
2752
IR[4] => Mux144.IN2
2753
IR[4] => Mux144.IN3
2754
IR[4] => Mux144.IN4
2755
IR[4] => Mux144.IN5
2756
IR[4] => Mux144.IN6
2757
IR[4] => Mux144.IN7
2758
IR[4] => Mux149.IN1
2759
IR[4] => Mux149.IN2
2760
IR[4] => Mux149.IN3
2761
IR[4] => Mux149.IN4
2762
IR[4] => Mux149.IN5
2763
IR[4] => Mux149.IN6
2764
IR[4] => Mux149.IN7
2765
IR[4] => Mux152.IN5
2766
IR[4] => Mux153.IN5
2767
IR[4] => Mux154.IN5
2768
IR[4] => Mux155.IN2
2769
IR[4] => Mux155.IN3
2770
IR[4] => Mux155.IN4
2771
IR[4] => Mux155.IN5
2772
IR[4] => Mux157.IN1
2773
IR[4] => Mux157.IN2
2774
IR[4] => Mux157.IN3
2775
IR[4] => Mux166.IN1
2776
IR[4] => Mux166.IN2
2777
IR[4] => Mux166.IN3
2778
IR[4] => Mux169.IN1
2779
IR[4] => Mux169.IN2
2780
IR[4] => Mux169.IN3
2781
IR[4] => Mux169.IN4
2782
IR[4] => Mux169.IN5
2783
IR[4] => Mux169.IN6
2784
IR[4] => Mux169.IN7
2785
IR[4] => Mux174.IN1
2786
IR[4] => Mux174.IN2
2787
IR[4] => Mux174.IN3
2788
IR[4] => Mux174.IN4
2789
IR[4] => Mux174.IN5
2790
IR[4] => Mux174.IN6
2791
IR[4] => Mux174.IN7
2792
IR[4] => Set_BusA_To.DATAB
2793
IR[4] => Mux182.IN7
2794
IR[4] => Mux193.IN1
2795
IR[4] => Mux193.IN2
2796
IR[4] => Mux193.IN3
2797
IR[4] => Mux193.IN4
2798
IR[4] => Mux193.IN5
2799
IR[4] => Mux193.IN6
2800
IR[4] => Mux193.IN7
2801
IR[4] => Mux198.IN131
2802
IR[4] => Mux200.IN259
2803
IR[4] => Mux201.IN259
2804
IR[4] => Mux202.IN259
2805
IR[4] => Mux203.IN131
2806
IR[4] => Mux205.IN131
2807
IR[4] => Mux208.IN259
2808
IR[4] => Mux210.IN259
2809
IR[4] => Mux212.IN259
2810
IR[4] => Mux214.IN259
2811
IR[4] => Mux215.IN259
2812
IR[4] => Mux216.IN259
2813
IR[4] => Mux219.IN259
2814
IR[4] => Mux220.IN259
2815
IR[4] => Mux222.IN259
2816
IR[4] => Mux227.IN259
2817
IR[4] => Mux228.IN259
2818
IR[4] => Mux229.IN37
2819
IR[4] => Mux229.IN38
2820
IR[4] => Mux229.IN39
2821
IR[4] => Mux229.IN40
2822
IR[4] => Mux229.IN41
2823
IR[4] => Mux229.IN42
2824
IR[4] => Mux229.IN43
2825
IR[4] => Mux229.IN44
2826
IR[4] => Mux229.IN45
2827
IR[4] => Mux229.IN46
2828
IR[4] => Mux229.IN47
2829
IR[4] => Mux229.IN48
2830
IR[4] => Mux229.IN49
2831
IR[4] => Mux229.IN50
2832
IR[4] => Mux229.IN51
2833
IR[4] => Mux229.IN52
2834
IR[4] => Mux229.IN53
2835
IR[4] => Mux229.IN54
2836
IR[4] => Mux229.IN55
2837
IR[4] => Mux229.IN56
2838
IR[4] => Mux229.IN57
2839
IR[4] => Mux229.IN58
2840
IR[4] => Mux229.IN59
2841
IR[4] => Mux229.IN60
2842
IR[4] => Mux229.IN61
2843
IR[4] => Mux229.IN62
2844
IR[4] => Mux229.IN63
2845
IR[4] => Mux229.IN64
2846
IR[4] => Mux229.IN65
2847
IR[4] => Mux229.IN66
2848
IR[4] => Mux229.IN67
2849
IR[4] => Mux229.IN68
2850
IR[4] => Mux229.IN69
2851
IR[4] => Mux229.IN70
2852
IR[4] => Mux229.IN71
2853
IR[4] => Mux229.IN72
2854
IR[4] => Mux229.IN73
2855
IR[4] => Mux229.IN74
2856
IR[4] => Mux229.IN75
2857
IR[4] => Mux229.IN76
2858
IR[4] => Mux229.IN77
2859
IR[4] => Mux229.IN78
2860
IR[4] => Mux229.IN79
2861
IR[4] => Mux229.IN80
2862
IR[4] => Mux229.IN81
2863
IR[4] => Mux229.IN82
2864
IR[4] => Mux229.IN83
2865
IR[4] => Mux229.IN84
2866
IR[4] => Mux229.IN85
2867
IR[4] => Mux229.IN86
2868
IR[4] => Mux229.IN87
2869
IR[4] => Mux229.IN88
2870
IR[4] => Mux229.IN89
2871
IR[4] => Mux229.IN90
2872
IR[4] => Mux229.IN91
2873
IR[4] => Mux229.IN92
2874
IR[4] => Mux229.IN93
2875
IR[4] => Mux229.IN94
2876
IR[4] => Mux229.IN95
2877
IR[4] => Mux229.IN96
2878
IR[4] => Mux229.IN97
2879
IR[4] => Mux229.IN98
2880
IR[4] => Mux229.IN99
2881
IR[4] => Mux229.IN100
2882
IR[4] => Mux229.IN101
2883
IR[4] => Mux229.IN102
2884
IR[4] => Mux229.IN103
2885
IR[4] => Mux229.IN104
2886
IR[4] => Mux229.IN105
2887
IR[4] => Mux229.IN106
2888
IR[4] => Mux229.IN107
2889
IR[4] => Mux229.IN108
2890
IR[4] => Mux229.IN109
2891
IR[4] => Mux229.IN110
2892
IR[4] => Mux229.IN111
2893
IR[4] => Mux229.IN112
2894
IR[4] => Mux229.IN113
2895
IR[4] => Mux229.IN114
2896
IR[4] => Mux229.IN115
2897
IR[4] => Mux229.IN116
2898
IR[4] => Mux229.IN117
2899
IR[4] => Mux229.IN118
2900
IR[4] => Mux229.IN119
2901
IR[4] => Mux229.IN120
2902
IR[4] => Mux229.IN121
2903
IR[4] => Mux229.IN122
2904
IR[4] => Mux229.IN123
2905
IR[4] => Mux229.IN124
2906
IR[4] => Mux229.IN125
2907
IR[4] => Mux229.IN126
2908
IR[4] => Mux229.IN127
2909
IR[4] => Mux229.IN128
2910
IR[4] => Mux229.IN129
2911
IR[4] => Mux229.IN130
2912
IR[4] => Mux229.IN131
2913
IR[4] => Mux229.IN132
2914
IR[4] => Mux229.IN133
2915
IR[4] => Mux229.IN134
2916
IR[4] => Mux229.IN135
2917
IR[4] => Mux229.IN136
2918
IR[4] => Mux229.IN137
2919
IR[4] => Mux229.IN138
2920
IR[4] => Mux229.IN139
2921
IR[4] => Mux229.IN140
2922
IR[4] => Mux229.IN141
2923
IR[4] => Mux229.IN142
2924
IR[4] => Mux229.IN143
2925
IR[4] => Mux229.IN144
2926
IR[4] => Mux229.IN145
2927
IR[4] => Mux229.IN146
2928
IR[4] => Mux229.IN147
2929
IR[4] => Mux229.IN148
2930
IR[4] => Mux229.IN149
2931
IR[4] => Mux229.IN150
2932
IR[4] => Mux229.IN151
2933
IR[4] => Mux229.IN152
2934
IR[4] => Mux229.IN153
2935
IR[4] => Mux229.IN154
2936
IR[4] => Mux229.IN155
2937
IR[4] => Mux229.IN156
2938
IR[4] => Mux229.IN157
2939
IR[4] => Mux229.IN158
2940
IR[4] => Mux229.IN159
2941
IR[4] => Mux229.IN160
2942
IR[4] => Mux229.IN161
2943
IR[4] => Mux229.IN162
2944
IR[4] => Mux229.IN163
2945
IR[4] => Mux229.IN164
2946
IR[4] => Mux229.IN165
2947
IR[4] => Mux229.IN166
2948
IR[4] => Mux229.IN167
2949
IR[4] => Mux229.IN168
2950
IR[4] => Mux229.IN169
2951
IR[4] => Mux229.IN170
2952
IR[4] => Mux229.IN171
2953
IR[4] => Mux229.IN172
2954
IR[4] => Mux229.IN173
2955
IR[4] => Mux229.IN174
2956
IR[4] => Mux229.IN175
2957
IR[4] => Mux229.IN176
2958
IR[4] => Mux229.IN177
2959
IR[4] => Mux229.IN178
2960
IR[4] => Mux229.IN179
2961
IR[4] => Mux229.IN180
2962
IR[4] => Mux229.IN181
2963
IR[4] => Mux229.IN182
2964
IR[4] => Mux229.IN183
2965
IR[4] => Mux229.IN184
2966
IR[4] => Mux229.IN185
2967
IR[4] => Mux229.IN186
2968
IR[4] => Mux229.IN187
2969
IR[4] => Mux229.IN188
2970
IR[4] => Mux229.IN189
2971
IR[4] => Mux229.IN190
2972
IR[4] => Mux229.IN191
2973
IR[4] => Mux229.IN192
2974
IR[4] => Mux229.IN193
2975
IR[4] => Mux229.IN194
2976
IR[4] => Mux229.IN195
2977
IR[4] => Mux229.IN196
2978
IR[4] => Mux229.IN197
2979
IR[4] => Mux229.IN198
2980
IR[4] => Mux229.IN199
2981
IR[4] => Mux229.IN200
2982
IR[4] => Mux229.IN201
2983
IR[4] => Mux229.IN202
2984
IR[4] => Mux229.IN203
2985
IR[4] => Mux229.IN204
2986
IR[4] => Mux229.IN205
2987
IR[4] => Mux229.IN206
2988
IR[4] => Mux229.IN207
2989
IR[4] => Mux229.IN208
2990
IR[4] => Mux229.IN209
2991
IR[4] => Mux229.IN210
2992
IR[4] => Mux229.IN211
2993
IR[4] => Mux229.IN212
2994
IR[4] => Mux229.IN213
2995
IR[4] => Mux229.IN214
2996
IR[4] => Mux229.IN215
2997
IR[4] => Mux229.IN216
2998
IR[4] => Mux229.IN217
2999
IR[4] => Mux229.IN218
3000
IR[4] => Mux229.IN219
3001
IR[4] => Mux229.IN220
3002
IR[4] => Mux229.IN221
3003
IR[4] => Mux229.IN222
3004
IR[4] => Mux229.IN223
3005
IR[4] => Mux229.IN224
3006
IR[4] => Mux229.IN225
3007
IR[4] => Mux229.IN226
3008
IR[4] => Mux229.IN227
3009
IR[4] => Mux229.IN228
3010
IR[4] => Mux229.IN229
3011
IR[4] => Mux229.IN230
3012
IR[4] => Mux229.IN231
3013
IR[4] => Mux229.IN232
3014
IR[4] => Mux229.IN233
3015
IR[4] => Mux229.IN234
3016
IR[4] => Mux229.IN235
3017
IR[4] => Mux229.IN236
3018
IR[4] => Mux229.IN237
3019
IR[4] => Mux229.IN238
3020
IR[4] => Mux229.IN239
3021
IR[4] => Mux229.IN240
3022
IR[4] => Mux229.IN241
3023
IR[4] => Mux229.IN242
3024
IR[4] => Mux229.IN243
3025
IR[4] => Mux229.IN244
3026
IR[4] => Mux229.IN245
3027
IR[4] => Mux229.IN246
3028
IR[4] => Mux229.IN247
3029
IR[4] => Mux229.IN248
3030
IR[4] => Mux229.IN249
3031
IR[4] => Mux229.IN250
3032
IR[4] => Mux229.IN251
3033
IR[4] => Mux229.IN252
3034
IR[4] => Mux229.IN253
3035
IR[4] => Mux229.IN254
3036
IR[4] => Mux229.IN255
3037
IR[4] => Mux229.IN256
3038
IR[4] => Mux229.IN257
3039
IR[4] => Mux229.IN258
3040
IR[4] => Mux229.IN259
3041
IR[4] => Mux230.IN37
3042
IR[4] => Mux232.IN259
3043
IR[4] => Mux233.IN259
3044
IR[4] => Mux237.IN130
3045
IR[4] => Mux238.IN259
3046
IR[4] => Mux239.IN259
3047
IR[4] => Mux240.IN259
3048
IR[4] => Equal2.IN1
3049
IR[4] => Equal3.IN2
3050
IR[4] => Equal5.IN1
3051
IR[4] => Equal7.IN5
3052
IR[5] => Mux0.IN7
3053
IR[5] => Set_BusA_To.DATAA
3054
IR[5] => Mux45.IN4
3055
IR[5] => Mux61.IN258
3056
IR[5] => Mux62.IN153
3057
IR[5] => Mux63.IN153
3058
IR[5] => Mux64.IN153
3059
IR[5] => Mux65.IN258
3060
IR[5] => Mux67.IN195
3061
IR[5] => Mux67.IN196
3062
IR[5] => Mux67.IN197
3063
IR[5] => Mux67.IN198
3064
IR[5] => Mux67.IN199
3065
IR[5] => Mux67.IN200
3066
IR[5] => Mux67.IN201
3067
IR[5] => Mux67.IN202
3068
IR[5] => Mux67.IN203
3069
IR[5] => Mux67.IN204
3070
IR[5] => Mux67.IN205
3071
IR[5] => Mux67.IN206
3072
IR[5] => Mux67.IN207
3073
IR[5] => Mux67.IN208
3074
IR[5] => Mux67.IN209
3075
IR[5] => Mux67.IN210
3076
IR[5] => Mux67.IN211
3077
IR[5] => Mux67.IN212
3078
IR[5] => Mux67.IN213
3079
IR[5] => Mux67.IN214
3080
IR[5] => Mux67.IN215
3081
IR[5] => Mux67.IN216
3082
IR[5] => Mux67.IN217
3083
IR[5] => Mux67.IN218
3084
IR[5] => Mux67.IN219
3085
IR[5] => Mux67.IN220
3086
IR[5] => Mux67.IN221
3087
IR[5] => Mux67.IN222
3088
IR[5] => Mux67.IN223
3089
IR[5] => Mux67.IN224
3090
IR[5] => Mux67.IN225
3091
IR[5] => Mux67.IN226
3092
IR[5] => Mux67.IN227
3093
IR[5] => Mux67.IN228
3094
IR[5] => Mux67.IN229
3095
IR[5] => Mux67.IN230
3096
IR[5] => Mux67.IN231
3097
IR[5] => Mux67.IN232
3098
IR[5] => Mux67.IN233
3099
IR[5] => Mux67.IN234
3100
IR[5] => Mux67.IN235
3101
IR[5] => Mux67.IN236
3102
IR[5] => Mux67.IN237
3103
IR[5] => Mux67.IN238
3104
IR[5] => Mux67.IN239
3105
IR[5] => Mux67.IN240
3106
IR[5] => Mux67.IN241
3107
IR[5] => Mux67.IN242
3108
IR[5] => Mux67.IN243
3109
IR[5] => Mux67.IN244
3110
IR[5] => Mux67.IN245
3111
IR[5] => Mux67.IN246
3112
IR[5] => Mux67.IN247
3113
IR[5] => Mux67.IN248
3114
IR[5] => Mux67.IN249
3115
IR[5] => Mux67.IN250
3116
IR[5] => Mux67.IN251
3117
IR[5] => Mux67.IN252
3118
IR[5] => Mux67.IN253
3119
IR[5] => Mux67.IN254
3120
IR[5] => Mux67.IN255
3121
IR[5] => Mux67.IN256
3122
IR[5] => Mux67.IN257
3123
IR[5] => Mux67.IN258
3124
IR[5] => Mux68.IN195
3125
IR[5] => Mux69.IN195
3126
IR[5] => Mux70.IN258
3127
IR[5] => Mux71.IN258
3128
IR[5] => Mux72.IN257
3129
IR[5] => Mux73.IN258
3130
IR[5] => Mux74.IN258
3131
IR[5] => Mux75.IN258
3132
IR[5] => Mux76.IN258
3133
IR[5] => Mux77.IN258
3134
IR[5] => Mux78.IN258
3135
IR[5] => Mux79.IN258
3136
IR[5] => Mux80.IN258
3137
IR[5] => Mux81.IN258
3138
IR[5] => Mux82.IN258
3139
IR[5] => Mux83.IN258
3140
IR[5] => Mux84.IN258
3141
IR[5] => Mux85.IN258
3142
IR[5] => Mux86.IN258
3143
IR[5] => Mux87.IN258
3144
IR[5] => Mux88.IN258
3145
IR[5] => Mux89.IN250
3146
IR[5] => Mux89.IN251
3147
IR[5] => Mux89.IN252
3148
IR[5] => Mux89.IN253
3149
IR[5] => Mux89.IN254
3150
IR[5] => Mux89.IN255
3151
IR[5] => Mux89.IN256
3152
IR[5] => Mux89.IN257
3153
IR[5] => Mux89.IN258
3154
IR[5] => Mux90.IN250
3155
IR[5] => Mux91.IN258
3156
IR[5] => Mux92.IN258
3157
IR[5] => Mux93.IN258
3158
IR[5] => Mux94.IN258
3159
IR[5] => Mux95.IN258
3160
IR[5] => Mux96.IN258
3161
IR[5] => Mux97.IN28
3162
IR[5] => Mux97.IN29
3163
IR[5] => Mux97.IN30
3164
IR[5] => Mux97.IN31
3165
IR[5] => Mux97.IN32
3166
IR[5] => Mux97.IN33
3167
IR[5] => Mux97.IN34
3168
IR[5] => Mux97.IN35
3169
IR[5] => Mux97.IN36
3170
IR[5] => Mux97.IN37
3171
IR[5] => Mux97.IN38
3172
IR[5] => Mux97.IN39
3173
IR[5] => Mux97.IN40
3174
IR[5] => Mux97.IN41
3175
IR[5] => Mux97.IN42
3176
IR[5] => Mux97.IN43
3177
IR[5] => Mux97.IN44
3178
IR[5] => Mux97.IN45
3179
IR[5] => Mux97.IN46
3180
IR[5] => Mux97.IN47
3181
IR[5] => Mux97.IN48
3182
IR[5] => Mux97.IN49
3183
IR[5] => Mux97.IN50
3184
IR[5] => Mux97.IN51
3185
IR[5] => Mux97.IN52
3186
IR[5] => Mux97.IN53
3187
IR[5] => Mux97.IN54
3188
IR[5] => Mux97.IN55
3189
IR[5] => Mux97.IN56
3190
IR[5] => Mux97.IN57
3191
IR[5] => Mux97.IN58
3192
IR[5] => Mux97.IN59
3193
IR[5] => Mux97.IN60
3194
IR[5] => Mux97.IN61
3195
IR[5] => Mux97.IN62
3196
IR[5] => Mux97.IN63
3197
IR[5] => Mux97.IN64
3198
IR[5] => Mux97.IN65
3199
IR[5] => Mux97.IN66
3200
IR[5] => Mux97.IN67
3201
IR[5] => Mux97.IN68
3202
IR[5] => Mux97.IN69
3203
IR[5] => Mux97.IN70
3204
IR[5] => Mux97.IN71
3205
IR[5] => Mux97.IN72
3206
IR[5] => Mux97.IN73
3207
IR[5] => Mux97.IN74
3208
IR[5] => Mux97.IN75
3209
IR[5] => Mux97.IN76
3210
IR[5] => Mux97.IN77
3211
IR[5] => Mux97.IN78
3212
IR[5] => Mux97.IN79
3213
IR[5] => Mux97.IN80
3214
IR[5] => Mux97.IN81
3215
IR[5] => Mux97.IN82
3216
IR[5] => Mux97.IN83
3217
IR[5] => Mux97.IN84
3218
IR[5] => Mux97.IN85
3219
IR[5] => Mux97.IN86
3220
IR[5] => Mux97.IN87
3221
IR[5] => Mux97.IN88
3222
IR[5] => Mux97.IN89
3223
IR[5] => Mux97.IN90
3224
IR[5] => Mux97.IN91
3225
IR[5] => Mux97.IN92
3226
IR[5] => Mux97.IN93
3227
IR[5] => Mux97.IN94
3228
IR[5] => Mux97.IN95
3229
IR[5] => Mux97.IN96
3230
IR[5] => Mux97.IN97
3231
IR[5] => Mux97.IN98
3232
IR[5] => Mux97.IN99
3233
IR[5] => Mux97.IN100
3234
IR[5] => Mux97.IN101
3235
IR[5] => Mux97.IN102
3236
IR[5] => Mux97.IN103
3237
IR[5] => Mux97.IN104
3238
IR[5] => Mux97.IN105
3239
IR[5] => Mux97.IN106
3240
IR[5] => Mux97.IN107
3241
IR[5] => Mux97.IN108
3242
IR[5] => Mux97.IN109
3243
IR[5] => Mux97.IN110
3244
IR[5] => Mux97.IN111
3245
IR[5] => Mux97.IN112
3246
IR[5] => Mux97.IN113
3247
IR[5] => Mux97.IN114
3248
IR[5] => Mux97.IN115
3249
IR[5] => Mux97.IN116
3250
IR[5] => Mux97.IN117
3251
IR[5] => Mux97.IN118
3252
IR[5] => Mux97.IN119
3253
IR[5] => Mux97.IN120
3254
IR[5] => Mux97.IN121
3255
IR[5] => Mux97.IN122
3256
IR[5] => Mux97.IN123
3257
IR[5] => Mux97.IN124
3258
IR[5] => Mux97.IN125
3259
IR[5] => Mux97.IN126
3260
IR[5] => Mux97.IN127
3261
IR[5] => Mux97.IN128
3262
IR[5] => Mux97.IN129
3263
IR[5] => Mux97.IN130
3264
IR[5] => Mux97.IN131
3265
IR[5] => Mux97.IN132
3266
IR[5] => Mux97.IN133
3267
IR[5] => Mux97.IN134
3268
IR[5] => Mux97.IN135
3269
IR[5] => Mux97.IN136
3270
IR[5] => Mux97.IN137
3271
IR[5] => Mux97.IN138
3272
IR[5] => Mux97.IN139
3273
IR[5] => Mux97.IN140
3274
IR[5] => Mux97.IN141
3275
IR[5] => Mux97.IN142
3276
IR[5] => Mux97.IN143
3277
IR[5] => Mux97.IN144
3278
IR[5] => Mux97.IN145
3279
IR[5] => Mux97.IN146
3280
IR[5] => Mux97.IN147
3281
IR[5] => Mux97.IN148
3282
IR[5] => Mux97.IN149
3283
IR[5] => Mux97.IN150
3284
IR[5] => Mux97.IN151
3285
IR[5] => Mux97.IN152
3286
IR[5] => Mux97.IN153
3287
IR[5] => Mux97.IN154
3288
IR[5] => Mux97.IN155
3289
IR[5] => Mux97.IN156
3290
IR[5] => Mux97.IN157
3291
IR[5] => Mux97.IN158
3292
IR[5] => Mux97.IN159
3293
IR[5] => Mux97.IN160
3294
IR[5] => Mux97.IN161
3295
IR[5] => Mux97.IN162
3296
IR[5] => Mux97.IN163
3297
IR[5] => Mux97.IN164
3298
IR[5] => Mux97.IN165
3299
IR[5] => Mux97.IN166
3300
IR[5] => Mux97.IN167
3301
IR[5] => Mux97.IN168
3302
IR[5] => Mux97.IN169
3303
IR[5] => Mux97.IN170
3304
IR[5] => Mux97.IN171
3305
IR[5] => Mux97.IN172
3306
IR[5] => Mux97.IN173
3307
IR[5] => Mux97.IN174
3308
IR[5] => Mux97.IN175
3309
IR[5] => Mux97.IN176
3310
IR[5] => Mux97.IN177
3311
IR[5] => Mux97.IN178
3312
IR[5] => Mux97.IN179
3313
IR[5] => Mux97.IN180
3314
IR[5] => Mux97.IN181
3315
IR[5] => Mux97.IN182
3316
IR[5] => Mux97.IN183
3317
IR[5] => Mux97.IN184
3318
IR[5] => Mux97.IN185
3319
IR[5] => Mux97.IN186
3320
IR[5] => Mux97.IN187
3321
IR[5] => Mux97.IN188
3322
IR[5] => Mux97.IN189
3323
IR[5] => Mux97.IN190
3324
IR[5] => Mux97.IN191
3325
IR[5] => Mux97.IN192
3326
IR[5] => Mux97.IN193
3327
IR[5] => Mux97.IN194
3328
IR[5] => Mux97.IN195
3329
IR[5] => Mux97.IN196
3330
IR[5] => Mux97.IN197
3331
IR[5] => Mux97.IN198
3332
IR[5] => Mux97.IN199
3333
IR[5] => Mux97.IN200
3334
IR[5] => Mux97.IN201
3335
IR[5] => Mux97.IN202
3336
IR[5] => Mux97.IN203
3337
IR[5] => Mux97.IN204
3338
IR[5] => Mux97.IN205
3339
IR[5] => Mux97.IN206
3340
IR[5] => Mux97.IN207
3341
IR[5] => Mux97.IN208
3342
IR[5] => Mux97.IN209
3343
IR[5] => Mux97.IN210
3344
IR[5] => Mux97.IN211
3345
IR[5] => Mux97.IN212
3346
IR[5] => Mux97.IN213
3347
IR[5] => Mux97.IN214
3348
IR[5] => Mux97.IN215
3349
IR[5] => Mux97.IN216
3350
IR[5] => Mux97.IN217
3351
IR[5] => Mux97.IN218
3352
IR[5] => Mux97.IN219
3353
IR[5] => Mux97.IN220
3354
IR[5] => Mux97.IN221
3355
IR[5] => Mux97.IN222
3356
IR[5] => Mux97.IN223
3357
IR[5] => Mux97.IN224
3358
IR[5] => Mux97.IN225
3359
IR[5] => Mux97.IN226
3360
IR[5] => Mux97.IN227
3361
IR[5] => Mux97.IN228
3362
IR[5] => Mux97.IN229
3363
IR[5] => Mux97.IN230
3364
IR[5] => Mux97.IN231
3365
IR[5] => Mux97.IN232
3366
IR[5] => Mux97.IN233
3367
IR[5] => Mux97.IN234
3368
IR[5] => Mux97.IN235
3369
IR[5] => Mux97.IN236
3370
IR[5] => Mux97.IN237
3371
IR[5] => Mux97.IN238
3372
IR[5] => Mux97.IN239
3373
IR[5] => Mux97.IN240
3374
IR[5] => Mux97.IN241
3375
IR[5] => Mux97.IN242
3376
IR[5] => Mux97.IN243
3377
IR[5] => Mux97.IN244
3378
IR[5] => Mux97.IN245
3379
IR[5] => Mux97.IN246
3380
IR[5] => Mux97.IN247
3381
IR[5] => Mux97.IN248
3382
IR[5] => Mux97.IN249
3383
IR[5] => Mux97.IN250
3384
IR[5] => Mux97.IN251
3385
IR[5] => Mux97.IN252
3386
IR[5] => Mux97.IN253
3387
IR[5] => Mux97.IN254
3388
IR[5] => Mux97.IN255
3389
IR[5] => Mux97.IN256
3390
IR[5] => Mux97.IN257
3391
IR[5] => Mux97.IN258
3392
IR[5] => Mux98.IN28
3393
IR[5] => Mux99.IN28
3394
IR[5] => Mux100.IN258
3395
IR[5] => Mux101.IN258
3396
IR[5] => Mux102.IN258
3397
IR[5] => Mux103.IN258
3398
IR[5] => Mux104.IN258
3399
IR[5] => Mux105.IN258
3400
IR[5] => Mux106.IN258
3401
IR[5] => Mux107.IN258
3402
IR[5] => Mux109.IN258
3403
IR[5] => Mux110.IN258
3404
IR[5] => Mux111.IN258
3405
IR[5] => Mux112.IN258
3406
IR[5] => Mux114.IN258
3407
IR[5] => Mux115.IN258
3408
IR[5] => Mux116.IN258
3409
IR[5] => ALU_Op.DATAA
3410
IR[5] => Set_BusA_To.DATAA
3411
IR[5] => Mux143.IN1
3412
IR[5] => Mux143.IN2
3413
IR[5] => Mux143.IN3
3414
IR[5] => Mux143.IN4
3415
IR[5] => Mux143.IN5
3416
IR[5] => Mux143.IN6
3417
IR[5] => Mux143.IN7
3418
IR[5] => Mux148.IN1
3419
IR[5] => Mux148.IN2
3420
IR[5] => Mux148.IN3
3421
IR[5] => Mux148.IN4
3422
IR[5] => Mux148.IN5
3423
IR[5] => Mux148.IN6
3424
IR[5] => Mux148.IN7
3425
IR[5] => Mux152.IN4
3426
IR[5] => Mux153.IN4
3427
IR[5] => Mux154.IN1
3428
IR[5] => Mux154.IN2
3429
IR[5] => Mux154.IN3
3430
IR[5] => Mux154.IN4
3431
IR[5] => Mux155.IN1
3432
IR[5] => Mux156.IN1
3433
IR[5] => Mux156.IN2
3434
IR[5] => Mux156.IN3
3435
IR[5] => Mux168.IN1
3436
IR[5] => Mux168.IN2
3437
IR[5] => Mux168.IN3
3438
IR[5] => Mux168.IN4
3439
IR[5] => Mux168.IN5
3440
IR[5] => Mux168.IN6
3441
IR[5] => Mux168.IN7
3442
IR[5] => Set_BusA_To.DATAB
3443
IR[5] => Mux181.IN7
3444
IR[5] => Mux192.IN1
3445
IR[5] => Mux192.IN2
3446
IR[5] => Mux192.IN3
3447
IR[5] => Mux192.IN4
3448
IR[5] => Mux192.IN5
3449
IR[5] => Mux192.IN6
3450
IR[5] => Mux192.IN7
3451
IR[5] => Mux197.IN66
3452
IR[5] => Mux198.IN130
3453
IR[5] => Mux199.IN130
3454
IR[5] => Mux200.IN258
3455
IR[5] => Mux201.IN258
3456
IR[5] => Mux202.IN258
3457
IR[5] => Mux203.IN130
3458
IR[5] => Mux205.IN130
3459
IR[5] => Mux208.IN258
3460
IR[5] => Mux209.IN66
3461
IR[5] => Mux210.IN258
3462
IR[5] => Mux212.IN258
3463
IR[5] => Mux214.IN258
3464
IR[5] => Mux215.IN258
3465
IR[5] => Mux216.IN258
3466
IR[5] => Mux218.IN130
3467
IR[5] => Mux219.IN258
3468
IR[5] => Mux220.IN258
3469
IR[5] => Mux222.IN258
3470
IR[5] => Mux223.IN66
3471
IR[5] => Mux224.IN66
3472
IR[5] => Mux225.IN66
3473
IR[5] => Mux226.IN66
3474
IR[5] => Mux227.IN258
3475
IR[5] => Mux228.IN36
3476
IR[5] => Mux228.IN37
3477
IR[5] => Mux228.IN38
3478
IR[5] => Mux228.IN39
3479
IR[5] => Mux228.IN40
3480
IR[5] => Mux228.IN41
3481
IR[5] => Mux228.IN42
3482
IR[5] => Mux228.IN43
3483
IR[5] => Mux228.IN44
3484
IR[5] => Mux228.IN45
3485
IR[5] => Mux228.IN46
3486
IR[5] => Mux228.IN47
3487
IR[5] => Mux228.IN48
3488
IR[5] => Mux228.IN49
3489
IR[5] => Mux228.IN50
3490
IR[5] => Mux228.IN51
3491
IR[5] => Mux228.IN52
3492
IR[5] => Mux228.IN53
3493
IR[5] => Mux228.IN54
3494
IR[5] => Mux228.IN55
3495
IR[5] => Mux228.IN56
3496
IR[5] => Mux228.IN57
3497
IR[5] => Mux228.IN58
3498
IR[5] => Mux228.IN59
3499
IR[5] => Mux228.IN60
3500
IR[5] => Mux228.IN61
3501
IR[5] => Mux228.IN62
3502
IR[5] => Mux228.IN63
3503
IR[5] => Mux228.IN64
3504
IR[5] => Mux228.IN65
3505
IR[5] => Mux228.IN66
3506
IR[5] => Mux228.IN67
3507
IR[5] => Mux228.IN68
3508
IR[5] => Mux228.IN69
3509
IR[5] => Mux228.IN70
3510
IR[5] => Mux228.IN71
3511
IR[5] => Mux228.IN72
3512
IR[5] => Mux228.IN73
3513
IR[5] => Mux228.IN74
3514
IR[5] => Mux228.IN75
3515
IR[5] => Mux228.IN76
3516
IR[5] => Mux228.IN77
3517
IR[5] => Mux228.IN78
3518
IR[5] => Mux228.IN79
3519
IR[5] => Mux228.IN80
3520
IR[5] => Mux228.IN81
3521
IR[5] => Mux228.IN82
3522
IR[5] => Mux228.IN83
3523
IR[5] => Mux228.IN84
3524
IR[5] => Mux228.IN85
3525
IR[5] => Mux228.IN86
3526
IR[5] => Mux228.IN87
3527
IR[5] => Mux228.IN88
3528
IR[5] => Mux228.IN89
3529
IR[5] => Mux228.IN90
3530
IR[5] => Mux228.IN91
3531
IR[5] => Mux228.IN92
3532
IR[5] => Mux228.IN93
3533
IR[5] => Mux228.IN94
3534
IR[5] => Mux228.IN95
3535
IR[5] => Mux228.IN96
3536
IR[5] => Mux228.IN97
3537
IR[5] => Mux228.IN98
3538
IR[5] => Mux228.IN99
3539
IR[5] => Mux228.IN100
3540
IR[5] => Mux228.IN101
3541
IR[5] => Mux228.IN102
3542
IR[5] => Mux228.IN103
3543
IR[5] => Mux228.IN104
3544
IR[5] => Mux228.IN105
3545
IR[5] => Mux228.IN106
3546
IR[5] => Mux228.IN107
3547
IR[5] => Mux228.IN108
3548
IR[5] => Mux228.IN109
3549
IR[5] => Mux228.IN110
3550
IR[5] => Mux228.IN111
3551
IR[5] => Mux228.IN112
3552
IR[5] => Mux228.IN113
3553
IR[5] => Mux228.IN114
3554
IR[5] => Mux228.IN115
3555
IR[5] => Mux228.IN116
3556
IR[5] => Mux228.IN117
3557
IR[5] => Mux228.IN118
3558
IR[5] => Mux228.IN119
3559
IR[5] => Mux228.IN120
3560
IR[5] => Mux228.IN121
3561
IR[5] => Mux228.IN122
3562
IR[5] => Mux228.IN123
3563
IR[5] => Mux228.IN124
3564
IR[5] => Mux228.IN125
3565
IR[5] => Mux228.IN126
3566
IR[5] => Mux228.IN127
3567
IR[5] => Mux228.IN128
3568
IR[5] => Mux228.IN129
3569
IR[5] => Mux228.IN130
3570
IR[5] => Mux228.IN131
3571
IR[5] => Mux228.IN132
3572
IR[5] => Mux228.IN133
3573
IR[5] => Mux228.IN134
3574
IR[5] => Mux228.IN135
3575
IR[5] => Mux228.IN136
3576
IR[5] => Mux228.IN137
3577
IR[5] => Mux228.IN138
3578
IR[5] => Mux228.IN139
3579
IR[5] => Mux228.IN140
3580
IR[5] => Mux228.IN141
3581
IR[5] => Mux228.IN142
3582
IR[5] => Mux228.IN143
3583
IR[5] => Mux228.IN144
3584
IR[5] => Mux228.IN145
3585
IR[5] => Mux228.IN146
3586
IR[5] => Mux228.IN147
3587
IR[5] => Mux228.IN148
3588
IR[5] => Mux228.IN149
3589
IR[5] => Mux228.IN150
3590
IR[5] => Mux228.IN151
3591
IR[5] => Mux228.IN152
3592
IR[5] => Mux228.IN153
3593
IR[5] => Mux228.IN154
3594
IR[5] => Mux228.IN155
3595
IR[5] => Mux228.IN156
3596
IR[5] => Mux228.IN157
3597
IR[5] => Mux228.IN158
3598
IR[5] => Mux228.IN159
3599
IR[5] => Mux228.IN160
3600
IR[5] => Mux228.IN161
3601
IR[5] => Mux228.IN162
3602
IR[5] => Mux228.IN163
3603
IR[5] => Mux228.IN164
3604
IR[5] => Mux228.IN165
3605
IR[5] => Mux228.IN166
3606
IR[5] => Mux228.IN167
3607
IR[5] => Mux228.IN168
3608
IR[5] => Mux228.IN169
3609
IR[5] => Mux228.IN170
3610
IR[5] => Mux228.IN171
3611
IR[5] => Mux228.IN172
3612
IR[5] => Mux228.IN173
3613
IR[5] => Mux228.IN174
3614
IR[5] => Mux228.IN175
3615
IR[5] => Mux228.IN176
3616
IR[5] => Mux228.IN177
3617
IR[5] => Mux228.IN178
3618
IR[5] => Mux228.IN179
3619
IR[5] => Mux228.IN180
3620
IR[5] => Mux228.IN181
3621
IR[5] => Mux228.IN182
3622
IR[5] => Mux228.IN183
3623
IR[5] => Mux228.IN184
3624
IR[5] => Mux228.IN185
3625
IR[5] => Mux228.IN186
3626
IR[5] => Mux228.IN187
3627
IR[5] => Mux228.IN188
3628
IR[5] => Mux228.IN189
3629
IR[5] => Mux228.IN190
3630
IR[5] => Mux228.IN191
3631
IR[5] => Mux228.IN192
3632
IR[5] => Mux228.IN193
3633
IR[5] => Mux228.IN194
3634
IR[5] => Mux228.IN195
3635
IR[5] => Mux228.IN196
3636
IR[5] => Mux228.IN197
3637
IR[5] => Mux228.IN198
3638
IR[5] => Mux228.IN199
3639
IR[5] => Mux228.IN200
3640
IR[5] => Mux228.IN201
3641
IR[5] => Mux228.IN202
3642
IR[5] => Mux228.IN203
3643
IR[5] => Mux228.IN204
3644
IR[5] => Mux228.IN205
3645
IR[5] => Mux228.IN206
3646
IR[5] => Mux228.IN207
3647
IR[5] => Mux228.IN208
3648
IR[5] => Mux228.IN209
3649
IR[5] => Mux228.IN210
3650
IR[5] => Mux228.IN211
3651
IR[5] => Mux228.IN212
3652
IR[5] => Mux228.IN213
3653
IR[5] => Mux228.IN214
3654
IR[5] => Mux228.IN215
3655
IR[5] => Mux228.IN216
3656
IR[5] => Mux228.IN217
3657
IR[5] => Mux228.IN218
3658
IR[5] => Mux228.IN219
3659
IR[5] => Mux228.IN220
3660
IR[5] => Mux228.IN221
3661
IR[5] => Mux228.IN222
3662
IR[5] => Mux228.IN223
3663
IR[5] => Mux228.IN224
3664
IR[5] => Mux228.IN225
3665
IR[5] => Mux228.IN226
3666
IR[5] => Mux228.IN227
3667
IR[5] => Mux228.IN228
3668
IR[5] => Mux228.IN229
3669
IR[5] => Mux228.IN230
3670
IR[5] => Mux228.IN231
3671
IR[5] => Mux228.IN232
3672
IR[5] => Mux228.IN233
3673
IR[5] => Mux228.IN234
3674
IR[5] => Mux228.IN235
3675
IR[5] => Mux228.IN236
3676
IR[5] => Mux228.IN237
3677
IR[5] => Mux228.IN238
3678
IR[5] => Mux228.IN239
3679
IR[5] => Mux228.IN240
3680
IR[5] => Mux228.IN241
3681
IR[5] => Mux228.IN242
3682
IR[5] => Mux228.IN243
3683
IR[5] => Mux228.IN244
3684
IR[5] => Mux228.IN245
3685
IR[5] => Mux228.IN246
3686
IR[5] => Mux228.IN247
3687
IR[5] => Mux228.IN248
3688
IR[5] => Mux228.IN249
3689
IR[5] => Mux228.IN250
3690
IR[5] => Mux228.IN251
3691
IR[5] => Mux228.IN252
3692
IR[5] => Mux228.IN253
3693
IR[5] => Mux228.IN254
3694
IR[5] => Mux228.IN255
3695
IR[5] => Mux228.IN256
3696
IR[5] => Mux228.IN257
3697
IR[5] => Mux228.IN258
3698
IR[5] => Mux229.IN36
3699
IR[5] => Mux230.IN36
3700
IR[5] => Mux231.IN66
3701
IR[5] => Mux232.IN258
3702
IR[5] => Mux233.IN258
3703
IR[5] => Mux234.IN66
3704
IR[5] => Mux235.IN66
3705
IR[5] => Mux238.IN258
3706
IR[5] => Mux239.IN258
3707
IR[5] => Mux240.IN258
3708
IR[5] => Mux242.IN66
3709
IR[5] => Mux244.IN66
3710
IR[5] => Equal2.IN0
3711
IR[5] => Equal3.IN1
3712
IR[5] => Equal5.IN0
3713
IR[5] => Equal7.IN4
3714
IR[6] => Mux61.IN257
3715
IR[6] => Mux62.IN152
3716
IR[6] => Mux63.IN152
3717
IR[6] => Mux64.IN152
3718
IR[6] => Mux65.IN257
3719
IR[6] => Mux66.IN65
3720
IR[6] => Mux67.IN194
3721
IR[6] => Mux68.IN194
3722
IR[6] => Mux69.IN194
3723
IR[6] => Mux70.IN257
3724
IR[6] => Mux71.IN257
3725
IR[6] => Mux72.IN256
3726
IR[6] => Mux73.IN257
3727
IR[6] => Mux74.IN257
3728
IR[6] => Mux75.IN257
3729
IR[6] => Mux76.IN257
3730
IR[6] => Mux77.IN257
3731
IR[6] => Mux78.IN257
3732
IR[6] => Mux79.IN257
3733
IR[6] => Mux80.IN257
3734
IR[6] => Mux81.IN257
3735
IR[6] => Mux82.IN257
3736
IR[6] => Mux83.IN257
3737
IR[6] => Mux84.IN257
3738
IR[6] => Mux85.IN257
3739
IR[6] => Mux86.IN257
3740
IR[6] => Mux87.IN257
3741
IR[6] => Mux88.IN257
3742
IR[6] => Mux89.IN249
3743
IR[6] => Mux90.IN249
3744
IR[6] => Mux91.IN257
3745
IR[6] => Mux92.IN257
3746
IR[6] => Mux93.IN257
3747
IR[6] => Mux94.IN257
3748
IR[6] => Mux95.IN257
3749
IR[6] => Mux96.IN257
3750
IR[6] => Mux97.IN27
3751
IR[6] => Mux98.IN27
3752
IR[6] => Mux99.IN27
3753
IR[6] => Mux100.IN257
3754
IR[6] => Mux101.IN257
3755
IR[6] => Mux102.IN257
3756
IR[6] => Mux103.IN257
3757
IR[6] => Mux104.IN257
3758
IR[6] => Mux105.IN257
3759
IR[6] => Mux106.IN257
3760
IR[6] => Mux107.IN257
3761
IR[6] => Mux108.IN65
3762
IR[6] => Mux109.IN257
3763
IR[6] => Mux110.IN257
3764
IR[6] => Mux111.IN257
3765
IR[6] => Mux112.IN257
3766
IR[6] => Mux113.IN33
3767
IR[6] => Mux114.IN257
3768
IR[6] => Mux115.IN257
3769
IR[6] => Mux116.IN257
3770
IR[6] => Mux119.IN33
3771
IR[6] => Mux120.IN33
3772
IR[6] => Mux121.IN33
3773
IR[6] => Mux122.IN33
3774
IR[6] => Mux123.IN33
3775
IR[6] => Mux125.IN33
3776
IR[6] => Mux126.IN33
3777
IR[6] => Mux127.IN33
3778
IR[6] => Mux128.IN33
3779
IR[6] => Mux129.IN33
3780
IR[6] => Mux130.IN33
3781
IR[6] => Mux197.IN65
3782
IR[6] => Mux198.IN129
3783
IR[6] => Mux199.IN129
3784
IR[6] => Mux200.IN257
3785
IR[6] => Mux201.IN257
3786
IR[6] => Mux202.IN257
3787
IR[6] => Mux203.IN129
3788
IR[6] => Mux204.IN33
3789
IR[6] => Mux205.IN129
3790
IR[6] => Mux206.IN65
3791
IR[6] => Mux207.IN65
3792
IR[6] => Mux208.IN257
3793
IR[6] => Mux209.IN65
3794
IR[6] => Mux210.IN257
3795
IR[6] => Mux211.IN65
3796
IR[6] => Mux212.IN257
3797
IR[6] => Mux213.IN65
3798
IR[6] => Mux214.IN257
3799
IR[6] => Mux215.IN257
3800
IR[6] => Mux216.IN257
3801
IR[6] => Mux217.IN65
3802
IR[6] => Mux218.IN129
3803
IR[6] => Mux219.IN257
3804
IR[6] => Mux220.IN257
3805
IR[6] => Mux221.IN65
3806
IR[6] => Mux222.IN257
3807
IR[6] => Mux223.IN65
3808
IR[6] => Mux224.IN65
3809
IR[6] => Mux225.IN65
3810
IR[6] => Mux226.IN65
3811
IR[6] => Mux227.IN257
3812
IR[6] => Mux228.IN35
3813
IR[6] => Mux229.IN35
3814
IR[6] => Mux230.IN35
3815
IR[6] => Mux231.IN65
3816
IR[6] => Mux232.IN257
3817
IR[6] => Mux233.IN257
3818
IR[6] => Mux234.IN65
3819
IR[6] => Mux235.IN65
3820
IR[6] => Mux236.IN33
3821
IR[6] => Mux237.IN129
3822
IR[6] => Mux238.IN257
3823
IR[6] => Mux239.IN257
3824
IR[6] => Mux240.IN257
3825
IR[6] => Mux241.IN33
3826
IR[6] => Mux242.IN65
3827
IR[6] => Mux243.IN33
3828
IR[6] => Mux244.IN65
3829
IR[6] => Equal5.IN4
3830
IR[6] => Equal7.IN1
3831
IR[7] => Mux61.IN256
3832
IR[7] => Mux62.IN151
3833
IR[7] => Mux63.IN151
3834
IR[7] => Mux64.IN151
3835
IR[7] => Mux65.IN256
3836
IR[7] => Mux66.IN64
3837
IR[7] => Mux67.IN193
3838
IR[7] => Mux68.IN193
3839
IR[7] => Mux69.IN193
3840
IR[7] => Mux70.IN256
3841
IR[7] => Mux71.IN256
3842
IR[7] => Mux72.IN255
3843
IR[7] => Mux73.IN256
3844
IR[7] => Mux74.IN256
3845
IR[7] => Mux75.IN256
3846
IR[7] => Mux76.IN256
3847
IR[7] => Mux77.IN256
3848
IR[7] => Mux78.IN256
3849
IR[7] => Mux79.IN256
3850
IR[7] => Mux80.IN256
3851
IR[7] => Mux81.IN256
3852
IR[7] => Mux82.IN256
3853
IR[7] => Mux83.IN256
3854
IR[7] => Mux84.IN256
3855
IR[7] => Mux85.IN256
3856
IR[7] => Mux86.IN256
3857
IR[7] => Mux87.IN256
3858
IR[7] => Mux88.IN256
3859
IR[7] => Mux89.IN248
3860
IR[7] => Mux90.IN248
3861
IR[7] => Mux91.IN256
3862
IR[7] => Mux92.IN256
3863
IR[7] => Mux93.IN256
3864
IR[7] => Mux94.IN256
3865
IR[7] => Mux95.IN256
3866
IR[7] => Mux96.IN256
3867
IR[7] => Mux97.IN26
3868
IR[7] => Mux98.IN26
3869
IR[7] => Mux99.IN26
3870
IR[7] => Mux100.IN256
3871
IR[7] => Mux101.IN256
3872
IR[7] => Mux102.IN256
3873
IR[7] => Mux103.IN256
3874
IR[7] => Mux104.IN256
3875
IR[7] => Mux105.IN256
3876
IR[7] => Mux106.IN256
3877
IR[7] => Mux107.IN256
3878
IR[7] => Mux108.IN64
3879
IR[7] => Mux109.IN256
3880
IR[7] => Mux110.IN256
3881
IR[7] => Mux111.IN256
3882
IR[7] => Mux112.IN256
3883
IR[7] => Mux113.IN32
3884
IR[7] => Mux114.IN256
3885
IR[7] => Mux115.IN256
3886
IR[7] => Mux116.IN256
3887
IR[7] => Mux119.IN32
3888
IR[7] => Mux120.IN32
3889
IR[7] => Mux121.IN32
3890
IR[7] => Mux122.IN32
3891
IR[7] => Mux123.IN32
3892
IR[7] => Mux125.IN32
3893
IR[7] => Mux126.IN32
3894
IR[7] => Mux127.IN32
3895
IR[7] => Mux128.IN32
3896
IR[7] => Mux129.IN32
3897
IR[7] => Mux130.IN32
3898
IR[7] => Mux197.IN64
3899
IR[7] => Mux198.IN128
3900
IR[7] => Mux199.IN128
3901
IR[7] => Mux200.IN256
3902
IR[7] => Mux201.IN256
3903
IR[7] => Mux202.IN256
3904
IR[7] => Mux203.IN128
3905
IR[7] => Mux204.IN32
3906
IR[7] => Mux205.IN128
3907
IR[7] => Mux206.IN64
3908
IR[7] => Mux207.IN64
3909
IR[7] => Mux208.IN256
3910
IR[7] => Mux209.IN64
3911
IR[7] => Mux210.IN256
3912
IR[7] => Mux211.IN64
3913
IR[7] => Mux212.IN256
3914
IR[7] => Mux213.IN64
3915
IR[7] => Mux214.IN256
3916
IR[7] => Mux215.IN256
3917
IR[7] => Mux216.IN256
3918
IR[7] => Mux217.IN64
3919
IR[7] => Mux218.IN128
3920
IR[7] => Mux219.IN256
3921
IR[7] => Mux220.IN256
3922
IR[7] => Mux221.IN64
3923
IR[7] => Mux222.IN256
3924
IR[7] => Mux223.IN64
3925
IR[7] => Mux224.IN64
3926
IR[7] => Mux225.IN64
3927
IR[7] => Mux226.IN64
3928
IR[7] => Mux227.IN256
3929
IR[7] => Mux228.IN34
3930
IR[7] => Mux229.IN34
3931
IR[7] => Mux230.IN34
3932
IR[7] => Mux231.IN64
3933
IR[7] => Mux232.IN256
3934
IR[7] => Mux233.IN256
3935
IR[7] => Mux234.IN64
3936
IR[7] => Mux235.IN64
3937
IR[7] => Mux236.IN32
3938
IR[7] => Mux237.IN128
3939
IR[7] => Mux238.IN256
3940
IR[7] => Mux239.IN256
3941
IR[7] => Mux240.IN256
3942
IR[7] => Mux241.IN32
3943
IR[7] => Mux242.IN64
3944
IR[7] => Mux243.IN32
3945
IR[7] => Mux244.IN64
3946
IR[7] => Equal5.IN3
3947
IR[7] => Equal7.IN0
3948
ISet[0] => Mux245.IN5
3949
ISet[0] => Mux246.IN5
3950
ISet[0] => Mux247.IN5
3951
ISet[0] => Mux248.IN5
3952
ISet[0] => Mux249.IN5
3953
ISet[0] => Mux250.IN5
3954
ISet[0] => Mux251.IN5
3955
ISet[0] => Mux252.IN5
3956
ISet[0] => Mux253.IN5
3957
ISet[0] => Mux254.IN5
3958
ISet[0] => Mux255.IN5
3959
ISet[0] => Mux256.IN5
3960
ISet[0] => Mux257.IN5
3961
ISet[0] => Mux258.IN5
3962
ISet[0] => Mux259.IN5
3963
ISet[0] => Mux260.IN5
3964
ISet[0] => Mux261.IN5
3965
ISet[0] => Mux262.IN5
3966
ISet[0] => Mux263.IN5
3967
ISet[0] => Mux264.IN5
3968
ISet[0] => Mux265.IN5
3969
ISet[0] => Mux266.IN5
3970
ISet[0] => Mux267.IN5
3971
ISet[0] => Mux268.IN5
3972
ISet[0] => Mux269.IN5
3973
ISet[0] => Mux270.IN5
3974
ISet[0] => Mux271.IN5
3975
ISet[0] => Mux272.IN5
3976
ISet[0] => Mux273.IN5
3977
ISet[0] => Mux274.IN5
3978
ISet[0] => Mux275.IN5
3979
ISet[0] => Mux276.IN5
3980
ISet[0] => Mux277.IN5
3981
ISet[0] => Mux278.IN5
3982
ISet[0] => Mux279.IN5
3983
ISet[0] => Mux280.IN5
3984
ISet[0] => Mux281.IN5
3985
ISet[0] => Mux282.IN5
3986
ISet[0] => Mux283.IN5
3987
ISet[0] => Mux284.IN5
3988
ISet[0] => Mux285.IN5
3989
ISet[0] => Mux286.IN5
3990
ISet[0] => Mux287.IN5
3991
ISet[0] => Mux288.IN5
3992
ISet[0] => Mux289.IN5
3993
ISet[0] => Mux290.IN5
3994
ISet[0] => Mux291.IN5
3995
ISet[0] => Mux292.IN5
3996
ISet[0] => Mux293.IN5
3997
ISet[0] => Mux294.IN5
3998
ISet[0] => Mux295.IN5
3999
ISet[0] => Mux296.IN5
4000
ISet[0] => Mux297.IN5
4001
ISet[0] => Mux298.IN5
4002
ISet[0] => Mux299.IN5
4003
ISet[0] => Mux300.IN5
4004
ISet[0] => Equal8.IN1
4005
ISet[1] => Mux245.IN4
4006
ISet[1] => Mux246.IN4
4007
ISet[1] => Mux247.IN4
4008
ISet[1] => Mux248.IN4
4009
ISet[1] => Mux249.IN4
4010
ISet[1] => Mux250.IN4
4011
ISet[1] => Mux251.IN4
4012
ISet[1] => Mux252.IN4
4013
ISet[1] => Mux253.IN4
4014
ISet[1] => Mux254.IN4
4015
ISet[1] => Mux255.IN4
4016
ISet[1] => Mux256.IN4
4017
ISet[1] => Mux257.IN4
4018
ISet[1] => Mux258.IN4
4019
ISet[1] => Mux259.IN4
4020
ISet[1] => Mux260.IN4
4021
ISet[1] => Mux261.IN4
4022
ISet[1] => Mux262.IN4
4023
ISet[1] => Mux263.IN4
4024
ISet[1] => Mux264.IN4
4025
ISet[1] => Mux265.IN4
4026
ISet[1] => Mux266.IN4
4027
ISet[1] => Mux267.IN4
4028
ISet[1] => Mux268.IN4
4029
ISet[1] => Mux269.IN4
4030
ISet[1] => Mux270.IN4
4031
ISet[1] => Mux271.IN4
4032
ISet[1] => Mux272.IN4
4033
ISet[1] => Mux273.IN4
4034
ISet[1] => Mux274.IN4
4035
ISet[1] => Mux275.IN4
4036
ISet[1] => Mux276.IN4
4037
ISet[1] => Mux277.IN4
4038
ISet[1] => Mux278.IN4
4039
ISet[1] => Mux279.IN4
4040
ISet[1] => Mux280.IN4
4041
ISet[1] => Mux281.IN4
4042
ISet[1] => Mux282.IN4
4043
ISet[1] => Mux283.IN4
4044
ISet[1] => Mux284.IN4
4045
ISet[1] => Mux285.IN4
4046
ISet[1] => Mux286.IN4
4047
ISet[1] => Mux287.IN4
4048
ISet[1] => Mux288.IN4
4049
ISet[1] => Mux289.IN4
4050
ISet[1] => Mux290.IN4
4051
ISet[1] => Mux291.IN4
4052
ISet[1] => Mux292.IN4
4053
ISet[1] => Mux293.IN4
4054
ISet[1] => Mux294.IN4
4055
ISet[1] => Mux295.IN4
4056
ISet[1] => Mux296.IN4
4057
ISet[1] => Mux297.IN4
4058
ISet[1] => Mux298.IN4
4059
ISet[1] => Mux299.IN4
4060
ISet[1] => Mux300.IN4
4061
ISet[1] => Special_LD.OUTPUTSELECT
4062
ISet[1] => Special_LD.OUTPUTSELECT
4063
ISet[1] => Special_LD.OUTPUTSELECT
4064
ISet[1] => I_BT.OUTPUTSELECT
4065
ISet[1] => I_BC.OUTPUTSELECT
4066
ISet[1] => IMode.OUTPUTSELECT
4067
ISet[1] => IMode.OUTPUTSELECT
4068
ISet[1] => I_RLD.OUTPUTSELECT
4069
ISet[1] => I_RRD.OUTPUTSELECT
4070
ISet[1] => I_RETN.OUTPUTSELECT
4071
ISet[1] => I_INRC.OUTPUTSELECT
4072
ISet[1] => I_BTR.OUTPUTSELECT
4073
ISet[1] => Equal8.IN0
4074
MCycle[0] => Mux0.IN10
4075
MCycle[0] => Mux1.IN10
4076
MCycle[0] => Mux2.IN10
4077
MCycle[0] => Mux3.IN10
4078
MCycle[0] => Mux4.IN10
4079
MCycle[0] => Mux5.IN10
4080
MCycle[0] => Mux6.IN10
4081
MCycle[0] => Mux7.IN10
4082
MCycle[0] => Mux8.IN10
4083
MCycle[0] => Mux9.IN10
4084
MCycle[0] => Mux10.IN10
4085
MCycle[0] => Mux11.IN10
4086
MCycle[0] => Mux12.IN10
4087
MCycle[0] => Mux13.IN10
4088
MCycle[0] => Mux14.IN10
4089
MCycle[0] => Mux15.IN10
4090
MCycle[0] => Mux16.IN10
4091
MCycle[0] => Mux17.IN10
4092
MCycle[0] => Mux18.IN10
4093
MCycle[0] => Mux19.IN10
4094
MCycle[0] => Mux20.IN10
4095
MCycle[0] => Mux21.IN10
4096
MCycle[0] => Mux22.IN10
4097
MCycle[0] => Mux23.IN10
4098
MCycle[0] => Mux24.IN10
4099
MCycle[0] => Mux25.IN10
4100
MCycle[0] => Mux26.IN10
4101
MCycle[0] => Mux27.IN10
4102
MCycle[0] => Mux28.IN10
4103
MCycle[0] => Mux29.IN10
4104
MCycle[0] => Mux30.IN10
4105
MCycle[0] => Mux31.IN10
4106
MCycle[0] => Mux32.IN10
4107
MCycle[0] => Mux33.IN10
4108
MCycle[0] => Mux34.IN10
4109
MCycle[0] => Mux35.IN9
4110
MCycle[0] => Mux36.IN10
4111
MCycle[0] => Mux37.IN10
4112
MCycle[0] => Mux38.IN9
4113
MCycle[0] => Mux39.IN10
4114
MCycle[0] => Mux40.IN5
4115
MCycle[0] => Mux41.IN5
4116
MCycle[0] => Mux42.IN5
4117
MCycle[0] => Mux43.IN10
4118
MCycle[0] => Mux44.IN10
4119
MCycle[0] => Mux46.IN10
4120
MCycle[0] => Mux47.IN10
4121
MCycle[0] => Mux48.IN10
4122
MCycle[0] => Mux49.IN10
4123
MCycle[0] => Mux50.IN10
4124
MCycle[0] => Mux51.IN10
4125
MCycle[0] => Mux52.IN10
4126
MCycle[0] => Mux53.IN10
4127
MCycle[0] => Mux54.IN10
4128
MCycle[0] => Mux55.IN10
4129
MCycle[0] => Mux56.IN10
4130
MCycle[0] => Mux57.IN10
4131
MCycle[0] => Mux58.IN10
4132
MCycle[0] => Mux59.IN10
4133
MCycle[0] => Mux60.IN10
4134
MCycle[0] => Mux117.IN10
4135
MCycle[0] => Mux118.IN10
4136
MCycle[0] => Mux133.IN10
4137
MCycle[0] => Mux134.IN10
4138
MCycle[0] => Mux135.IN10
4139
MCycle[0] => Mux136.IN10
4140
MCycle[0] => Mux137.IN10
4141
MCycle[0] => Mux138.IN10
4142
MCycle[0] => Mux139.IN10
4143
MCycle[0] => Mux140.IN10
4144
MCycle[0] => Mux141.IN10
4145
MCycle[0] => Mux142.IN10
4146
MCycle[0] => Mux143.IN10
4147
MCycle[0] => Mux144.IN10
4148
MCycle[0] => Mux145.IN10
4149
MCycle[0] => Mux146.IN10
4150
MCycle[0] => Mux147.IN10
4151
MCycle[0] => Mux148.IN10
4152
MCycle[0] => Mux149.IN10
4153
MCycle[0] => Mux150.IN10
4154
MCycle[0] => Mux151.IN10
4155
MCycle[0] => Mux159.IN10
4156
MCycle[0] => Mux160.IN10
4157
MCycle[0] => Mux161.IN10
4158
MCycle[0] => Mux162.IN10
4159
MCycle[0] => Mux163.IN10
4160
MCycle[0] => Mux164.IN10
4161
MCycle[0] => Mux165.IN10
4162
MCycle[0] => Mux168.IN10
4163
MCycle[0] => Mux169.IN10
4164
MCycle[0] => Mux170.IN10
4165
MCycle[0] => Mux171.IN10
4166
MCycle[0] => Mux172.IN10
4167
MCycle[0] => Mux173.IN10
4168
MCycle[0] => Mux174.IN10
4169
MCycle[0] => Mux175.IN10
4170
MCycle[0] => Mux176.IN10
4171
MCycle[0] => Mux177.IN10
4172
MCycle[0] => Mux178.IN10
4173
MCycle[0] => Mux179.IN10
4174
MCycle[0] => Mux180.IN10
4175
MCycle[0] => Mux181.IN10
4176
MCycle[0] => Mux182.IN10
4177
MCycle[0] => Mux183.IN10
4178
MCycle[0] => Mux184.IN10
4179
MCycle[0] => Mux185.IN10
4180
MCycle[0] => Mux186.IN10
4181
MCycle[0] => Mux187.IN10
4182
MCycle[0] => Mux188.IN10
4183
MCycle[0] => Mux189.IN10
4184
MCycle[0] => Mux190.IN10
4185
MCycle[0] => Mux191.IN10
4186
MCycle[0] => Mux192.IN10
4187
MCycle[0] => Mux193.IN10
4188
MCycle[0] => Mux194.IN10
4189
MCycle[0] => Mux195.IN10
4190
MCycle[0] => Mux196.IN10
4191
MCycle[0] => Equal0.IN2
4192
MCycle[0] => Equal1.IN1
4193
MCycle[0] => Equal4.IN0
4194
MCycle[0] => Equal6.IN2
4195
MCycle[1] => Mux0.IN9
4196
MCycle[1] => Mux1.IN9
4197
MCycle[1] => Mux2.IN9
4198
MCycle[1] => Mux3.IN9
4199
MCycle[1] => Mux4.IN9
4200
MCycle[1] => Mux5.IN9
4201
MCycle[1] => Mux6.IN9
4202
MCycle[1] => Mux7.IN9
4203
MCycle[1] => Mux8.IN9
4204
MCycle[1] => Mux9.IN9
4205
MCycle[1] => Mux10.IN9
4206
MCycle[1] => Mux11.IN9
4207
MCycle[1] => Mux12.IN9
4208
MCycle[1] => Mux13.IN9
4209
MCycle[1] => Mux14.IN9
4210
MCycle[1] => Mux15.IN9
4211
MCycle[1] => Mux16.IN9
4212
MCycle[1] => Mux17.IN9
4213
MCycle[1] => Mux18.IN9
4214
MCycle[1] => Mux19.IN9
4215
MCycle[1] => Mux20.IN9
4216
MCycle[1] => Mux21.IN9
4217
MCycle[1] => Mux22.IN9
4218
MCycle[1] => Mux23.IN9
4219
MCycle[1] => Mux24.IN9
4220
MCycle[1] => Mux25.IN9
4221
MCycle[1] => Mux26.IN9
4222
MCycle[1] => Mux27.IN9
4223
MCycle[1] => Mux28.IN9
4224
MCycle[1] => Mux29.IN9
4225
MCycle[1] => Mux30.IN9
4226
MCycle[1] => Mux31.IN9
4227
MCycle[1] => Mux32.IN9
4228
MCycle[1] => Mux33.IN9
4229
MCycle[1] => Mux34.IN9
4230
MCycle[1] => Mux35.IN8
4231
MCycle[1] => Mux36.IN9
4232
MCycle[1] => Mux37.IN9
4233
MCycle[1] => Mux38.IN8
4234
MCycle[1] => Mux39.IN9
4235
MCycle[1] => Mux43.IN9
4236
MCycle[1] => Mux44.IN9
4237
MCycle[1] => Mux46.IN9
4238
MCycle[1] => Mux47.IN9
4239
MCycle[1] => Mux48.IN9
4240
MCycle[1] => Mux49.IN9
4241
MCycle[1] => Mux50.IN9
4242
MCycle[1] => Mux51.IN9
4243
MCycle[1] => Mux52.IN9
4244
MCycle[1] => Mux53.IN9
4245
MCycle[1] => Mux54.IN9
4246
MCycle[1] => Mux55.IN9
4247
MCycle[1] => Mux56.IN9
4248
MCycle[1] => Mux57.IN9
4249
MCycle[1] => Mux58.IN9
4250
MCycle[1] => Mux59.IN9
4251
MCycle[1] => Mux60.IN9
4252
MCycle[1] => Mux117.IN9
4253
MCycle[1] => Mux118.IN9
4254
MCycle[1] => Mux131.IN5
4255
MCycle[1] => Mux132.IN5
4256
MCycle[1] => Mux133.IN9
4257
MCycle[1] => Mux134.IN9
4258
MCycle[1] => Mux135.IN9
4259
MCycle[1] => Mux136.IN9
4260
MCycle[1] => Mux137.IN9
4261
MCycle[1] => Mux138.IN9
4262
MCycle[1] => Mux139.IN9
4263
MCycle[1] => Mux140.IN9
4264
MCycle[1] => Mux141.IN9
4265
MCycle[1] => Mux142.IN9
4266
MCycle[1] => Mux143.IN9
4267
MCycle[1] => Mux144.IN9
4268
MCycle[1] => Mux145.IN9
4269
MCycle[1] => Mux146.IN9
4270
MCycle[1] => Mux147.IN9
4271
MCycle[1] => Mux148.IN9
4272
MCycle[1] => Mux149.IN9
4273
MCycle[1] => Mux150.IN9
4274
MCycle[1] => Mux151.IN9
4275
MCycle[1] => Mux156.IN5
4276
MCycle[1] => Mux157.IN5
4277
MCycle[1] => Mux158.IN5
4278
MCycle[1] => Mux159.IN9
4279
MCycle[1] => Mux160.IN9
4280
MCycle[1] => Mux161.IN9
4281
MCycle[1] => Mux162.IN9
4282
MCycle[1] => Mux163.IN9
4283
MCycle[1] => Mux164.IN9
4284
MCycle[1] => Mux165.IN9
4285
MCycle[1] => Mux166.IN5
4286
MCycle[1] => Mux167.IN5
4287
MCycle[1] => Mux168.IN9
4288
MCycle[1] => Mux169.IN9
4289
MCycle[1] => Mux170.IN9
4290
MCycle[1] => Mux171.IN9
4291
MCycle[1] => Mux172.IN9
4292
MCycle[1] => Mux173.IN9
4293
MCycle[1] => Mux174.IN9
4294
MCycle[1] => Mux175.IN9
4295
MCycle[1] => Mux176.IN9
4296
MCycle[1] => Mux177.IN9
4297
MCycle[1] => Mux178.IN9
4298
MCycle[1] => Mux179.IN9
4299
MCycle[1] => Mux180.IN9
4300
MCycle[1] => Mux181.IN9
4301
MCycle[1] => Mux182.IN9
4302
MCycle[1] => Mux183.IN9
4303
MCycle[1] => Mux184.IN9
4304
MCycle[1] => Mux185.IN9
4305
MCycle[1] => Mux186.IN9
4306
MCycle[1] => Mux187.IN9
4307
MCycle[1] => Mux188.IN9
4308
MCycle[1] => Mux189.IN9
4309
MCycle[1] => Mux190.IN9
4310
MCycle[1] => Mux191.IN9
4311
MCycle[1] => Mux192.IN9
4312
MCycle[1] => Mux193.IN9
4313
MCycle[1] => Mux194.IN9
4314
MCycle[1] => Mux195.IN9
4315
MCycle[1] => Mux196.IN9
4316
MCycle[1] => Equal0.IN1
4317
MCycle[1] => Equal1.IN2
4318
MCycle[1] => Equal4.IN2
4319
MCycle[1] => Equal6.IN1
4320
MCycle[2] => Mux0.IN8
4321
MCycle[2] => Mux1.IN8
4322
MCycle[2] => Mux2.IN8
4323
MCycle[2] => Mux3.IN8
4324
MCycle[2] => Mux4.IN8
4325
MCycle[2] => Mux5.IN8
4326
MCycle[2] => Mux6.IN8
4327
MCycle[2] => Mux7.IN8
4328
MCycle[2] => Mux8.IN8
4329
MCycle[2] => Mux9.IN8
4330
MCycle[2] => Mux10.IN8
4331
MCycle[2] => Mux11.IN8
4332
MCycle[2] => Mux12.IN8
4333
MCycle[2] => Mux13.IN8
4334
MCycle[2] => Mux14.IN8
4335
MCycle[2] => Mux15.IN8
4336
MCycle[2] => Mux16.IN8
4337
MCycle[2] => Mux17.IN8
4338
MCycle[2] => Mux18.IN8
4339
MCycle[2] => Mux19.IN8
4340
MCycle[2] => Mux20.IN8
4341
MCycle[2] => Mux21.IN8
4342
MCycle[2] => Mux22.IN8
4343
MCycle[2] => Mux23.IN8
4344
MCycle[2] => Mux24.IN8
4345
MCycle[2] => Mux25.IN8
4346
MCycle[2] => Mux26.IN8
4347
MCycle[2] => Mux27.IN8
4348
MCycle[2] => Mux28.IN8
4349
MCycle[2] => Mux29.IN8
4350
MCycle[2] => Mux30.IN8
4351
MCycle[2] => Mux31.IN8
4352
MCycle[2] => Mux32.IN8
4353
MCycle[2] => Mux33.IN8
4354
MCycle[2] => Mux34.IN8
4355
MCycle[2] => Mux35.IN7
4356
MCycle[2] => Mux36.IN8
4357
MCycle[2] => Mux37.IN8
4358
MCycle[2] => Mux38.IN7
4359
MCycle[2] => Mux39.IN8
4360
MCycle[2] => Mux40.IN4
4361
MCycle[2] => Mux41.IN4
4362
MCycle[2] => Mux42.IN4
4363
MCycle[2] => Mux43.IN8
4364
MCycle[2] => Mux44.IN8
4365
MCycle[2] => Mux46.IN8
4366
MCycle[2] => Mux47.IN8
4367
MCycle[2] => Mux48.IN8
4368
MCycle[2] => Mux49.IN8
4369
MCycle[2] => Mux50.IN8
4370
MCycle[2] => Mux51.IN8
4371
MCycle[2] => Mux52.IN8
4372
MCycle[2] => Mux53.IN8
4373
MCycle[2] => Mux54.IN8
4374
MCycle[2] => Mux55.IN8
4375
MCycle[2] => Mux56.IN8
4376
MCycle[2] => Mux57.IN8
4377
MCycle[2] => Mux58.IN8
4378
MCycle[2] => Mux59.IN8
4379
MCycle[2] => Mux60.IN8
4380
MCycle[2] => Mux117.IN8
4381
MCycle[2] => Mux118.IN8
4382
MCycle[2] => Mux131.IN4
4383
MCycle[2] => Mux132.IN4
4384
MCycle[2] => Mux133.IN8
4385
MCycle[2] => Mux134.IN8
4386
MCycle[2] => Mux135.IN8
4387
MCycle[2] => Mux136.IN8
4388
MCycle[2] => Mux137.IN8
4389
MCycle[2] => Mux138.IN8
4390
MCycle[2] => Mux139.IN8
4391
MCycle[2] => Mux140.IN8
4392
MCycle[2] => Mux141.IN8
4393
MCycle[2] => Mux142.IN8
4394
MCycle[2] => Mux143.IN8
4395
MCycle[2] => Mux144.IN8
4396
MCycle[2] => Mux145.IN8
4397
MCycle[2] => Mux146.IN8
4398
MCycle[2] => Mux147.IN8
4399
MCycle[2] => Mux148.IN8
4400
MCycle[2] => Mux149.IN8
4401
MCycle[2] => Mux150.IN8
4402
MCycle[2] => Mux151.IN8
4403
MCycle[2] => Mux156.IN4
4404
MCycle[2] => Mux157.IN4
4405
MCycle[2] => Mux158.IN4
4406
MCycle[2] => Mux159.IN8
4407
MCycle[2] => Mux160.IN8
4408
MCycle[2] => Mux161.IN8
4409
MCycle[2] => Mux162.IN8
4410
MCycle[2] => Mux163.IN8
4411
MCycle[2] => Mux164.IN8
4412
MCycle[2] => Mux165.IN8
4413
MCycle[2] => Mux166.IN4
4414
MCycle[2] => Mux167.IN4
4415
MCycle[2] => Mux168.IN8
4416
MCycle[2] => Mux169.IN8
4417
MCycle[2] => Mux170.IN8
4418
MCycle[2] => Mux171.IN8
4419
MCycle[2] => Mux172.IN8
4420
MCycle[2] => Mux173.IN8
4421
MCycle[2] => Mux174.IN8
4422
MCycle[2] => Mux175.IN8
4423
MCycle[2] => Mux176.IN8
4424
MCycle[2] => Mux177.IN8
4425
MCycle[2] => Mux178.IN8
4426
MCycle[2] => Mux179.IN8
4427
MCycle[2] => Mux180.IN8
4428
MCycle[2] => Mux181.IN8
4429
MCycle[2] => Mux182.IN8
4430
MCycle[2] => Mux183.IN8
4431
MCycle[2] => Mux184.IN8
4432
MCycle[2] => Mux185.IN8
4433
MCycle[2] => Mux186.IN8
4434
MCycle[2] => Mux187.IN8
4435
MCycle[2] => Mux188.IN8
4436
MCycle[2] => Mux189.IN8
4437
MCycle[2] => Mux190.IN8
4438
MCycle[2] => Mux191.IN8
4439
MCycle[2] => Mux192.IN8
4440
MCycle[2] => Mux193.IN8
4441
MCycle[2] => Mux194.IN8
4442
MCycle[2] => Mux195.IN8
4443
MCycle[2] => Mux196.IN8
4444
MCycle[2] => Equal0.IN0
4445
MCycle[2] => Equal1.IN0
4446
MCycle[2] => Equal4.IN1
4447
MCycle[2] => Equal6.IN0
4448
F[0] => Mux35.IN10
4449
F[0] => Mux45.IN10
4450
F[0] => Mux45.IN1
4451
F[0] => Mux37.IN7
4452
F[1] => ~NO_FANOUT~
4453
F[2] => Mux45.IN9
4454
F[2] => Mux45.IN2
4455
F[3] => ~NO_FANOUT~
4456
F[4] => ~NO_FANOUT~
4457
F[5] => ~NO_FANOUT~
4458
F[6] => Mux38.IN10
4459
F[6] => Mux45.IN8
4460
F[6] => Mux45.IN0
4461
F[6] => Mux39.IN7
4462
F[7] => Mux45.IN7
4463
F[7] => Mux45.IN3
4464
NMICycle => MCycles.OUTPUTSELECT
4465
NMICycle => TStates.OUTPUTSELECT
4466
NMICycle => TStates.OUTPUTSELECT
4467
NMICycle => TStates.OUTPUTSELECT
4468
NMICycle => IncDec_16.OUTPUTSELECT
4469
NMICycle => Set_Addr_To.OUTPUTSELECT
4470
NMICycle => Set_BusB_To.OUTPUTSELECT
4471
NMICycle => Write.OUTPUTSELECT
4472
NMICycle => LDZ.OUTPUTSELECT
4473
NMICycle => Inc_PC.OUTPUTSELECT
4474
NMICycle => Jump.OUTPUTSELECT
4475
NMICycle => Mux72.IN263
4476
IntCycle => MCycles.DATAA
4477
IntCycle => TStates.OUTPUTSELECT
4478
IntCycle => TStates.OUTPUTSELECT
4479
IntCycle => TStates.OUTPUTSELECT
4480
IntCycle => IncDec_16.OUTPUTSELECT
4481
IntCycle => Set_Addr_To.OUTPUTSELECT
4482
IntCycle => Set_BusB_To.OUTPUTSELECT
4483
IntCycle => Write.OUTPUTSELECT
4484
IntCycle => LDZ.OUTPUTSELECT
4485
IntCycle => Inc_PC.OUTPUTSELECT
4486
IntCycle => Jump.OUTPUTSELECT
4487
MCycles[0] <= Mux257.DB_MAX_OUTPUT_PORT_TYPE
4488
MCycles[1] <= Mux256.DB_MAX_OUTPUT_PORT_TYPE
4489
MCycles[2] <= Mux255.DB_MAX_OUTPUT_PORT_TYPE
4490
TStates[0] <= TStates.DB_MAX_OUTPUT_PORT_TYPE
4491
TStates[1] <= TStates.DB_MAX_OUTPUT_PORT_TYPE
4492
TStates[2] <= TStates.DB_MAX_OUTPUT_PORT_TYPE
4493
Prefix[0] <= Mux300.DB_MAX_OUTPUT_PORT_TYPE
4494
Prefix[1] <= Mux299.DB_MAX_OUTPUT_PORT_TYPE
4495
Inc_PC <= Inc_PC.DB_MAX_OUTPUT_PORT_TYPE
4496
Inc_WZ <= Mux266.DB_MAX_OUTPUT_PORT_TYPE
4497
IncDec_16[0] <= Mux274.DB_MAX_OUTPUT_PORT_TYPE
4498
IncDec_16[1] <= Mux273.DB_MAX_OUTPUT_PORT_TYPE
4499
IncDec_16[2] <= Mux272.DB_MAX_OUTPUT_PORT_TYPE
4500
IncDec_16[3] <= Mux271.DB_MAX_OUTPUT_PORT_TYPE
4501
Read_To_Reg <= Mux254.DB_MAX_OUTPUT_PORT_TYPE
4502
Read_To_Acc <= Mux263.DB_MAX_OUTPUT_PORT_TYPE
4503
Set_BusA_To[0] <= Mux253.DB_MAX_OUTPUT_PORT_TYPE
4504
Set_BusA_To[1] <= Mux252.DB_MAX_OUTPUT_PORT_TYPE
4505
Set_BusA_To[2] <= Mux251.DB_MAX_OUTPUT_PORT_TYPE
4506
Set_BusA_To[3] <= Mux250.DB_MAX_OUTPUT_PORT_TYPE
4507
Set_BusB_To[0] <= Set_BusB_To.DB_MAX_OUTPUT_PORT_TYPE
4508
Set_BusB_To[1] <= Set_BusB_To.DB_MAX_OUTPUT_PORT_TYPE
4509
Set_BusB_To[2] <= Set_BusB_To.DB_MAX_OUTPUT_PORT_TYPE
4510
Set_BusB_To[3] <= Set_BusB_To.DB_MAX_OUTPUT_PORT_TYPE
4511
ALU_Op[0] <= Mux283.DB_MAX_OUTPUT_PORT_TYPE
4512
ALU_Op[1] <= Mux282.DB_MAX_OUTPUT_PORT_TYPE
4513
ALU_Op[2] <= Mux281.DB_MAX_OUTPUT_PORT_TYPE
4514
ALU_Op[3] <= Mux280.DB_MAX_OUTPUT_PORT_TYPE
4515
Save_ALU <= Mux278.DB_MAX_OUTPUT_PORT_TYPE
4516
PreserveC <= Mux279.DB_MAX_OUTPUT_PORT_TYPE
4517
Arith16 <= Mux292.DB_MAX_OUTPUT_PORT_TYPE
4518
Set_Addr_To[0] <= Set_Addr_To.DB_MAX_OUTPUT_PORT_TYPE
4519
Set_Addr_To[1] <= Set_Addr_To.DB_MAX_OUTPUT_PORT_TYPE
4520
Set_Addr_To[2] <= Set_Addr_To.DB_MAX_OUTPUT_PORT_TYPE
4521
IORQ <= Mux298.DB_MAX_OUTPUT_PORT_TYPE
4522
Jump <= Mux287.DB_MAX_OUTPUT_PORT_TYPE
4523
JumpE <= Mux293.DB_MAX_OUTPUT_PORT_TYPE
4524
JumpXY <= Mux294.DB_MAX_OUTPUT_PORT_TYPE
4525
Call <= Mux296.DB_MAX_OUTPUT_PORT_TYPE
4526
RstP <= Mux297.DB_MAX_OUTPUT_PORT_TYPE
4527
LDZ <= Mux264.DB_MAX_OUTPUT_PORT_TYPE
4528
LDW <= Mux265.DB_MAX_OUTPUT_PORT_TYPE
4529
LDSPHL <= Mux270.DB_MAX_OUTPUT_PORT_TYPE
4530
Special_LD[0] <= Special_LD.DB_MAX_OUTPUT_PORT_TYPE
4531
Special_LD[1] <= Special_LD.DB_MAX_OUTPUT_PORT_TYPE
4532
Special_LD[2] <= Special_LD.DB_MAX_OUTPUT_PORT_TYPE
4533
ExchangeDH <= Mux275.DB_MAX_OUTPUT_PORT_TYPE
4534
ExchangeRp <= Mux249.DB_MAX_OUTPUT_PORT_TYPE
4535
ExchangeAF <= Mux276.DB_MAX_OUTPUT_PORT_TYPE
4536
ExchangeRS <= Mux277.DB_MAX_OUTPUT_PORT_TYPE
4537
I_DJNZ <= Mux295.DB_MAX_OUTPUT_PORT_TYPE
4538
I_CPL <= Mux284.DB_MAX_OUTPUT_PORT_TYPE
4539
I_CCF <= Mux285.DB_MAX_OUTPUT_PORT_TYPE
4540
I_SCF <= Mux286.DB_MAX_OUTPUT_PORT_TYPE
4541
I_RETN <= I_RETN.DB_MAX_OUTPUT_PORT_TYPE
4542
I_BT <= I_BT.DB_MAX_OUTPUT_PORT_TYPE
4543
I_BC <= I_BC.DB_MAX_OUTPUT_PORT_TYPE
4544
I_BTR <= I_BTR.DB_MAX_OUTPUT_PORT_TYPE
4545
I_RLD <= I_RLD.DB_MAX_OUTPUT_PORT_TYPE
4546
I_RRD <= I_RRD.DB_MAX_OUTPUT_PORT_TYPE
4547
I_INRC <= I_INRC.DB_MAX_OUTPUT_PORT_TYPE
4548
SetDI <= Mux289.DB_MAX_OUTPUT_PORT_TYPE
4549
SetEI <= Mux290.DB_MAX_OUTPUT_PORT_TYPE
4550
IMode[0] <= IMode.DB_MAX_OUTPUT_PORT_TYPE
4551
IMode[1] <= IMode.DB_MAX_OUTPUT_PORT_TYPE
4552
Halt <= Mux288.DB_MAX_OUTPUT_PORT_TYPE
4553
NoRead <= NoRead.DB_MAX_OUTPUT_PORT_TYPE
4554
Write <= Mux262.DB_MAX_OUTPUT_PORT_TYPE
4555
 
4556
 
4557
|Z80SOC|T80se:z80_inst|T80:u0|T80_ALU:alu
4558
Arith16 => F_Out.OUTPUTSELECT
4559
Arith16 => F_Out.OUTPUTSELECT
4560
Arith16 => F_Out.OUTPUTSELECT
4561
Z16 => F_Out.OUTPUTSELECT
4562
ALU_Op[0] => UseCarry.IN0
4563
ALU_Op[0] => Mux8.IN5
4564
ALU_Op[0] => Mux9.IN5
4565
ALU_Op[0] => Mux10.IN5
4566
ALU_Op[0] => Mux11.IN5
4567
ALU_Op[0] => Mux12.IN5
4568
ALU_Op[0] => Mux13.IN5
4569
ALU_Op[0] => Mux14.IN5
4570
ALU_Op[0] => Mux15.IN5
4571
ALU_Op[0] => Mux16.IN8
4572
ALU_Op[0] => Mux17.IN2
4573
ALU_Op[0] => Mux18.IN10
4574
ALU_Op[0] => Mux19.IN8
4575
ALU_Op[0] => Mux20.IN10
4576
ALU_Op[0] => Q_t.OUTPUTSELECT
4577
ALU_Op[0] => Q_t.OUTPUTSELECT
4578
ALU_Op[0] => Q_t.OUTPUTSELECT
4579
ALU_Op[0] => Q_t.OUTPUTSELECT
4580
ALU_Op[0] => Mux23.IN13
4581
ALU_Op[0] => Mux24.IN16
4582
ALU_Op[0] => Mux25.IN13
4583
ALU_Op[0] => Mux26.IN16
4584
ALU_Op[0] => Mux27.IN15
4585
ALU_Op[0] => Mux28.IN16
4586
ALU_Op[0] => Mux29.IN15
4587
ALU_Op[0] => Mux30.IN13
4588
ALU_Op[0] => Mux31.IN16
4589
ALU_Op[0] => Mux32.IN16
4590
ALU_Op[0] => Mux33.IN16
4591
ALU_Op[0] => Mux34.IN16
4592
ALU_Op[0] => Mux35.IN18
4593
ALU_Op[0] => Mux36.IN18
4594
ALU_Op[0] => Mux37.IN18
4595
ALU_Op[0] => Mux38.IN18
4596
ALU_Op[0] => Equal0.IN2
4597
ALU_Op[1] => comb.IN1
4598
ALU_Op[1] => B_i.OUTPUTSELECT
4599
ALU_Op[1] => B_i.OUTPUTSELECT
4600
ALU_Op[1] => B_i.OUTPUTSELECT
4601
ALU_Op[1] => B_i.OUTPUTSELECT
4602
ALU_Op[1] => B_i.OUTPUTSELECT
4603
ALU_Op[1] => B_i.OUTPUTSELECT
4604
ALU_Op[1] => B_i.OUTPUTSELECT
4605
ALU_Op[1] => B_i.OUTPUTSELECT
4606
ALU_Op[1] => Mux8.IN4
4607
ALU_Op[1] => Mux9.IN4
4608
ALU_Op[1] => Mux10.IN4
4609
ALU_Op[1] => Mux11.IN4
4610
ALU_Op[1] => Mux12.IN4
4611
ALU_Op[1] => Mux13.IN4
4612
ALU_Op[1] => Mux14.IN4
4613
ALU_Op[1] => Mux15.IN4
4614
ALU_Op[1] => Mux16.IN7
4615
ALU_Op[1] => Mux17.IN1
4616
ALU_Op[1] => Mux18.IN9
4617
ALU_Op[1] => Mux19.IN7
4618
ALU_Op[1] => Mux20.IN9
4619
ALU_Op[1] => Mux23.IN12
4620
ALU_Op[1] => Mux24.IN15
4621
ALU_Op[1] => Mux25.IN12
4622
ALU_Op[1] => Mux26.IN15
4623
ALU_Op[1] => Mux27.IN14
4624
ALU_Op[1] => Mux28.IN15
4625
ALU_Op[1] => Mux29.IN14
4626
ALU_Op[1] => Mux30.IN12
4627
ALU_Op[1] => Mux31.IN15
4628
ALU_Op[1] => Mux32.IN15
4629
ALU_Op[1] => Mux33.IN15
4630
ALU_Op[1] => Mux34.IN15
4631
ALU_Op[1] => Mux35.IN17
4632
ALU_Op[1] => Mux36.IN17
4633
ALU_Op[1] => Mux37.IN17
4634
ALU_Op[1] => Mux38.IN17
4635
ALU_Op[1] => Equal0.IN1
4636
ALU_Op[2] => Mux8.IN3
4637
ALU_Op[2] => Mux9.IN3
4638
ALU_Op[2] => Mux10.IN3
4639
ALU_Op[2] => Mux11.IN3
4640
ALU_Op[2] => Mux12.IN3
4641
ALU_Op[2] => Mux13.IN3
4642
ALU_Op[2] => Mux14.IN3
4643
ALU_Op[2] => Mux15.IN3
4644
ALU_Op[2] => Mux16.IN6
4645
ALU_Op[2] => Mux17.IN0
4646
ALU_Op[2] => Mux18.IN8
4647
ALU_Op[2] => Mux19.IN6
4648
ALU_Op[2] => Mux20.IN8
4649
ALU_Op[2] => Mux23.IN11
4650
ALU_Op[2] => Mux24.IN14
4651
ALU_Op[2] => Mux25.IN11
4652
ALU_Op[2] => Mux26.IN14
4653
ALU_Op[2] => Mux27.IN13
4654
ALU_Op[2] => Mux28.IN14
4655
ALU_Op[2] => Mux29.IN13
4656
ALU_Op[2] => Mux30.IN11
4657
ALU_Op[2] => Mux31.IN14
4658
ALU_Op[2] => Mux32.IN14
4659
ALU_Op[2] => Mux33.IN14
4660
ALU_Op[2] => Mux34.IN14
4661
ALU_Op[2] => Mux35.IN16
4662
ALU_Op[2] => Mux36.IN16
4663
ALU_Op[2] => Mux37.IN16
4664
ALU_Op[2] => Mux38.IN16
4665
ALU_Op[2] => UseCarry.IN1
4666
ALU_Op[2] => Equal0.IN0
4667
ALU_Op[3] => Mux23.IN10
4668
ALU_Op[3] => Mux24.IN13
4669
ALU_Op[3] => Mux25.IN10
4670
ALU_Op[3] => Mux26.IN13
4671
ALU_Op[3] => Mux27.IN12
4672
ALU_Op[3] => Mux28.IN13
4673
ALU_Op[3] => Mux29.IN12
4674
ALU_Op[3] => Mux30.IN10
4675
ALU_Op[3] => Mux31.IN13
4676
ALU_Op[3] => Mux32.IN13
4677
ALU_Op[3] => Mux33.IN13
4678
ALU_Op[3] => Mux34.IN13
4679
ALU_Op[3] => Mux35.IN15
4680
ALU_Op[3] => Mux36.IN15
4681
ALU_Op[3] => Mux37.IN15
4682
ALU_Op[3] => Mux38.IN15
4683
IR[0] => Equal5.IN0
4684
IR[1] => Equal5.IN2
4685
IR[2] => Equal5.IN1
4686
IR[3] => Mux0.IN10
4687
IR[3] => Mux1.IN10
4688
IR[3] => Mux2.IN10
4689
IR[3] => Mux3.IN10
4690
IR[3] => Mux4.IN10
4691
IR[3] => Mux5.IN10
4692
IR[3] => Mux6.IN10
4693
IR[3] => Mux7.IN10
4694
IR[3] => Mux21.IN3
4695
IR[3] => Q_t.OUTPUTSELECT
4696
IR[3] => Q_t.OUTPUTSELECT
4697
IR[3] => Q_t.OUTPUTSELECT
4698
IR[3] => Q_t.OUTPUTSELECT
4699
IR[3] => Q_t.OUTPUTSELECT
4700
IR[3] => Q_t.OUTPUTSELECT
4701
IR[3] => Mux22.IN4
4702
IR[3] => F_Out.OUTPUTSELECT
4703
IR[4] => Mux0.IN9
4704
IR[4] => Mux1.IN9
4705
IR[4] => Mux2.IN9
4706
IR[4] => Mux3.IN9
4707
IR[4] => Mux4.IN9
4708
IR[4] => Mux5.IN9
4709
IR[4] => Mux6.IN9
4710
IR[4] => Mux7.IN9
4711
IR[4] => Mux21.IN2
4712
IR[4] => Mux22.IN3
4713
IR[5] => Mux0.IN8
4714
IR[5] => Mux1.IN8
4715
IR[5] => Mux2.IN8
4716
IR[5] => Mux3.IN8
4717
IR[5] => Mux4.IN8
4718
IR[5] => Mux5.IN8
4719
IR[5] => Mux6.IN8
4720
IR[5] => Mux7.IN8
4721
IR[5] => Mux21.IN1
4722
IR[5] => Mux22.IN2
4723
ISet[0] => Equal7.IN1
4724
ISet[1] => Equal7.IN0
4725
BusA[0] => Add0.IN10
4726
BusA[0] => Q_t.IN0
4727
BusA[0] => Q_t.IN0
4728
BusA[0] => Q_t.IN0
4729
BusA[0] => LessThan1.IN8
4730
BusA[0] => LessThan2.IN8
4731
BusA[0] => LessThan3.IN16
4732
BusA[0] => Equal2.IN8
4733
BusA[0] => F_Out.IN1
4734
BusA[0] => Mux21.IN9
4735
BusA[0] => Q_t.DATAA
4736
BusA[0] => F_Out.DATAB
4737
BusA[0] => Mux38.IN19
4738
BusA[1] => Add0.IN9
4739
BusA[1] => Q_t.IN0
4740
BusA[1] => Q_t.IN0
4741
BusA[1] => Q_t.IN0
4742
BusA[1] => Add3.IN14
4743
BusA[1] => DAA_Q.DATAA
4744
BusA[1] => LessThan1.IN7
4745
BusA[1] => LessThan2.IN7
4746
BusA[1] => Add5.IN14
4747
BusA[1] => DAA_Q.DATAA
4748
BusA[1] => LessThan3.IN15
4749
BusA[1] => Q_t.DATAA
4750
BusA[1] => Mux22.IN6
4751
BusA[1] => Mux22.IN7
4752
BusA[1] => Mux22.IN8
4753
BusA[1] => Mux22.IN9
4754
BusA[2] => Add0.IN8
4755
BusA[2] => Q_t.IN0
4756
BusA[2] => Q_t.IN0
4757
BusA[2] => Q_t.IN0
4758
BusA[2] => Add3.IN13
4759
BusA[2] => DAA_Q.DATAA
4760
BusA[2] => LessThan1.IN6
4761
BusA[2] => LessThan2.IN6
4762
BusA[2] => Add5.IN13
4763
BusA[2] => DAA_Q.DATAA
4764
BusA[2] => LessThan3.IN14
4765
BusA[2] => Q_t.DATAA
4766
BusA[2] => Q_t.DATAB
4767
BusA[3] => Add0.IN7
4768
BusA[3] => Q_t.IN0
4769
BusA[3] => Q_t.IN0
4770
BusA[3] => Q_t.IN0
4771
BusA[3] => Add3.IN12
4772
BusA[3] => DAA_Q.DATAA
4773
BusA[3] => LessThan1.IN5
4774
BusA[3] => LessThan2.IN5
4775
BusA[3] => Add5.IN12
4776
BusA[3] => DAA_Q.DATAA
4777
BusA[3] => LessThan3.IN13
4778
BusA[3] => Q_t.DATAA
4779
BusA[3] => Q_t.DATAB
4780
BusA[4] => Add1.IN7
4781
BusA[4] => Q_t.IN0
4782
BusA[4] => Q_t.IN0
4783
BusA[4] => Q_t.IN0
4784
BusA[4] => Add3.IN11
4785
BusA[4] => DAA_Q.DATAA
4786
BusA[4] => Add5.IN11
4787
BusA[4] => DAA_Q.DATAA
4788
BusA[4] => LessThan3.IN12
4789
BusA[4] => F_Out.IN1
4790
BusA[4] => Q_t.DATAA
4791
BusA[4] => Q_t.DATAB
4792
BusA[4] => Mux34.IN17
4793
BusA[4] => Mux34.IN18
4794
BusA[4] => Equal3.IN3
4795
BusA[5] => Add1.IN6
4796
BusA[5] => Q_t.IN0
4797
BusA[5] => Q_t.IN0
4798
BusA[5] => Q_t.IN0
4799
BusA[5] => Add3.IN10
4800
BusA[5] => DAA_Q.DATAA
4801
BusA[5] => Add5.IN10
4802
BusA[5] => DAA_Q.DATAA
4803
BusA[5] => LessThan3.IN11
4804
BusA[5] => F_Out.IN1
4805
BusA[5] => Q_t.DATAA
4806
BusA[5] => Q_t.DATAB
4807
BusA[5] => Mux25.IN14
4808
BusA[5] => Mux25.IN15
4809
BusA[5] => Mux33.IN17
4810
BusA[5] => Mux33.IN18
4811
BusA[5] => Equal3.IN2
4812
BusA[6] => Add1.IN5
4813
BusA[6] => Q_t.IN0
4814
BusA[6] => Q_t.IN0
4815
BusA[6] => Q_t.IN0
4816
BusA[6] => Add3.IN9
4817
BusA[6] => DAA_Q.DATAA
4818
BusA[6] => Add5.IN9
4819
BusA[6] => DAA_Q.DATAA
4820
BusA[6] => LessThan3.IN10
4821
BusA[6] => F_Out.IN1
4822
BusA[6] => Mux21.IN5
4823
BusA[6] => Mux21.IN6
4824
BusA[6] => Mux21.IN7
4825
BusA[6] => Mux21.IN8
4826
BusA[6] => Q_t.DATAB
4827
BusA[6] => Mux32.IN17
4828
BusA[6] => Mux32.IN18
4829
BusA[6] => Equal3.IN1
4830
BusA[7] => Add2.IN3
4831
BusA[7] => Q_t.IN0
4832
BusA[7] => Q_t.IN0
4833
BusA[7] => Q_t.IN0
4834
BusA[7] => Add3.IN8
4835
BusA[7] => DAA_Q.DATAA
4836
BusA[7] => Add5.IN8
4837
BusA[7] => DAA_Q.DATAA
4838
BusA[7] => LessThan3.IN9
4839
BusA[7] => F_Out.IN1
4840
BusA[7] => Mux21.IN4
4841
BusA[7] => Q_t.DATAB
4842
BusA[7] => Mux22.IN5
4843
BusA[7] => F_Out.DATAA
4844
BusA[7] => Mux23.IN14
4845
BusA[7] => Mux23.IN15
4846
BusA[7] => Mux31.IN17
4847
BusA[7] => Mux31.IN18
4848
BusA[7] => Equal3.IN0
4849
BusB[0] => B_i.DATAA
4850
BusB[0] => Q_t.IN1
4851
BusB[0] => Q_t.IN1
4852
BusB[0] => Q_t.IN1
4853
BusB[0] => Q_t.DATAA
4854
BusB[0] => Q_t.IN1
4855
BusB[0] => Q_t.IN1
4856
BusB[0] => Q_t.IN1
4857
BusB[0] => B_i.DATAB
4858
BusB[1] => B_i.DATAA
4859
BusB[1] => Q_t.IN1
4860
BusB[1] => Q_t.IN1
4861
BusB[1] => Q_t.IN1
4862
BusB[1] => Q_t.DATAA
4863
BusB[1] => Q_t.IN1
4864
BusB[1] => Q_t.IN1
4865
BusB[1] => Q_t.IN1
4866
BusB[1] => B_i.DATAB
4867
BusB[2] => B_i.DATAA
4868
BusB[2] => Q_t.IN1
4869
BusB[2] => Q_t.IN1
4870
BusB[2] => Q_t.IN1
4871
BusB[2] => Q_t.DATAA
4872
BusB[2] => Q_t.IN1
4873
BusB[2] => Q_t.IN1
4874
BusB[2] => Q_t.IN1
4875
BusB[2] => B_i.DATAB
4876
BusB[3] => B_i.DATAA
4877
BusB[3] => Q_t.IN1
4878
BusB[3] => Q_t.IN1
4879
BusB[3] => Q_t.IN1
4880
BusB[3] => F_Out.DATAB
4881
BusB[3] => Q_t.DATAA
4882
BusB[3] => Q_t.IN1
4883
BusB[3] => F_Out.DATAB
4884
BusB[3] => Q_t.IN1
4885
BusB[3] => Q_t.IN1
4886
BusB[3] => B_i.DATAB
4887
BusB[4] => B_i.DATAA
4888
BusB[4] => Q_t.IN1
4889
BusB[4] => Q_t.IN1
4890
BusB[4] => Q_t.IN1
4891
BusB[4] => Q_t.DATAB
4892
BusB[4] => Q_t.IN1
4893
BusB[4] => Q_t.IN1
4894
BusB[4] => Q_t.IN1
4895
BusB[4] => B_i.DATAB
4896
BusB[5] => B_i.DATAA
4897
BusB[5] => Q_t.IN1
4898
BusB[5] => Q_t.IN1
4899
BusB[5] => Q_t.IN1
4900
BusB[5] => F_Out.DATAB
4901
BusB[5] => Q_t.DATAB
4902
BusB[5] => Q_t.IN1
4903
BusB[5] => F_Out.DATAB
4904
BusB[5] => Q_t.IN1
4905
BusB[5] => Q_t.IN1
4906
BusB[5] => B_i.DATAB
4907
BusB[6] => B_i.DATAA
4908
BusB[6] => Q_t.IN1
4909
BusB[6] => Q_t.IN1
4910
BusB[6] => Q_t.IN1
4911
BusB[6] => Q_t.DATAB
4912
BusB[6] => Q_t.IN1
4913
BusB[6] => Q_t.IN1
4914
BusB[6] => Q_t.IN1
4915
BusB[6] => B_i.DATAB
4916
BusB[7] => B_i.DATAA
4917
BusB[7] => Q_t.IN1
4918
BusB[7] => Q_t.IN1
4919
BusB[7] => Q_t.IN1
4920
BusB[7] => Q_t.DATAB
4921
BusB[7] => Q_t.IN1
4922
BusB[7] => Q_t.IN1
4923
BusB[7] => Q_t.IN1
4924
BusB[7] => B_i.DATAB
4925
F_In[0] => comb.IN1
4926
F_In[0] => process_1.IN1
4927
F_In[0] => process_1.IN1
4928
F_In[0] => F_Out.IN1
4929
F_In[0] => Mux21.IN10
4930
F_In[0] => Mux22.IN10
4931
F_In[0] => Mux30.IN14
4932
F_In[0] => Mux30.IN15
4933
F_In[0] => Mux30.IN16
4934
F_In[0] => Mux30.IN17
4935
F_In[0] => Mux30.IN18
4936
F_In[0] => Mux30.IN19
4937
F_In[1] => Mux29.IN16
4938
F_In[1] => Mux29.IN17
4939
F_In[1] => Mux29.IN18
4940
F_In[1] => Mux29.IN19
4941
F_In[1] => F_Out.OUTPUTSELECT
4942
F_In[1] => DAA_Q[8].OUTPUTSELECT
4943
F_In[1] => DAA_Q[7].OUTPUTSELECT
4944
F_In[1] => DAA_Q[6].OUTPUTSELECT
4945
F_In[1] => DAA_Q[5].OUTPUTSELECT
4946
F_In[1] => DAA_Q[4].OUTPUTSELECT
4947
F_In[1] => DAA_Q[3].OUTPUTSELECT
4948
F_In[1] => DAA_Q[2].OUTPUTSELECT
4949
F_In[1] => DAA_Q[1].OUTPUTSELECT
4950
F_In[2] => Mux17.IN3
4951
F_In[2] => Mux17.IN4
4952
F_In[2] => Mux17.IN5
4953
F_In[2] => F_Out.DATAB
4954
F_In[2] => F_Out.DATAB
4955
F_In[2] => Mux28.IN17
4956
F_In[2] => Mux28.IN18
4957
F_In[2] => Mux28.IN19
4958
F_In[3] => Mux27.IN16
4959
F_In[3] => Mux27.IN17
4960
F_In[3] => Mux27.IN18
4961
F_In[4] => F_Out.DATAA
4962
F_In[4] => process_1.IN1
4963
F_In[4] => F_Out.DATAA
4964
F_In[4] => F_Out.DATAA
4965
F_In[4] => Mux26.IN17
4966
F_In[4] => Mux26.IN18
4967
F_In[4] => Mux26.IN19
4968
F_In[5] => Mux25.IN16
4969
F_In[5] => Mux25.IN17
4970
F_In[5] => Mux25.IN18
4971
F_In[6] => F_Out.DATAB
4972
F_In[6] => F_Out.DATAB
4973
F_In[6] => F_Out.DATAB
4974
F_In[6] => Mux24.IN17
4975
F_In[6] => Mux24.IN18
4976
F_In[6] => Mux24.IN19
4977
F_In[7] => F_Out.DATAB
4978
F_In[7] => F_Out.DATAB
4979
F_In[7] => Mux23.IN16
4980
F_In[7] => Mux23.IN17
4981
F_In[7] => Mux23.IN18
4982
Q[0] <= Mux38.DB_MAX_OUTPUT_PORT_TYPE
4983
Q[1] <= Mux37.DB_MAX_OUTPUT_PORT_TYPE
4984
Q[2] <= Mux36.DB_MAX_OUTPUT_PORT_TYPE
4985
Q[3] <= Mux35.DB_MAX_OUTPUT_PORT_TYPE
4986
Q[4] <= Mux34.DB_MAX_OUTPUT_PORT_TYPE
4987
Q[5] <= Mux33.DB_MAX_OUTPUT_PORT_TYPE
4988
Q[6] <= Mux32.DB_MAX_OUTPUT_PORT_TYPE
4989
Q[7] <= Mux31.DB_MAX_OUTPUT_PORT_TYPE
4990
F_Out[0] <= Mux30.DB_MAX_OUTPUT_PORT_TYPE
4991
F_Out[1] <= Mux29.DB_MAX_OUTPUT_PORT_TYPE
4992
F_Out[2] <= Mux28.DB_MAX_OUTPUT_PORT_TYPE
4993
F_Out[3] <= Mux27.DB_MAX_OUTPUT_PORT_TYPE
4994
F_Out[4] <= Mux26.DB_MAX_OUTPUT_PORT_TYPE
4995
F_Out[5] <= Mux25.DB_MAX_OUTPUT_PORT_TYPE
4996
F_Out[6] <= Mux24.DB_MAX_OUTPUT_PORT_TYPE
4997
F_Out[7] <= Mux23.DB_MAX_OUTPUT_PORT_TYPE
4998
 
4999
 
5000
|Z80SOC|T80se:z80_inst|T80:u0|T80_Reg:Regs
5001
Clk => RegsL[7][0].CLK
5002
Clk => RegsL[7][1].CLK
5003
Clk => RegsL[7][2].CLK
5004
Clk => RegsL[7][3].CLK
5005
Clk => RegsL[7][4].CLK
5006
Clk => RegsL[7][5].CLK
5007
Clk => RegsL[7][6].CLK
5008
Clk => RegsL[7][7].CLK
5009
Clk => RegsL[6][0].CLK
5010
Clk => RegsL[6][1].CLK
5011
Clk => RegsL[6][2].CLK
5012
Clk => RegsL[6][3].CLK
5013
Clk => RegsL[6][4].CLK
5014
Clk => RegsL[6][5].CLK
5015
Clk => RegsL[6][6].CLK
5016
Clk => RegsL[6][7].CLK
5017
Clk => RegsL[5][0].CLK
5018
Clk => RegsL[5][1].CLK
5019
Clk => RegsL[5][2].CLK
5020
Clk => RegsL[5][3].CLK
5021
Clk => RegsL[5][4].CLK
5022
Clk => RegsL[5][5].CLK
5023
Clk => RegsL[5][6].CLK
5024
Clk => RegsL[5][7].CLK
5025
Clk => RegsL[4][0].CLK
5026
Clk => RegsL[4][1].CLK
5027
Clk => RegsL[4][2].CLK
5028
Clk => RegsL[4][3].CLK
5029
Clk => RegsL[4][4].CLK
5030
Clk => RegsL[4][5].CLK
5031
Clk => RegsL[4][6].CLK
5032
Clk => RegsL[4][7].CLK
5033
Clk => RegsL[3][0].CLK
5034
Clk => RegsL[3][1].CLK
5035
Clk => RegsL[3][2].CLK
5036
Clk => RegsL[3][3].CLK
5037
Clk => RegsL[3][4].CLK
5038
Clk => RegsL[3][5].CLK
5039
Clk => RegsL[3][6].CLK
5040
Clk => RegsL[3][7].CLK
5041
Clk => RegsL[2][0].CLK
5042
Clk => RegsL[2][1].CLK
5043
Clk => RegsL[2][2].CLK
5044
Clk => RegsL[2][3].CLK
5045
Clk => RegsL[2][4].CLK
5046
Clk => RegsL[2][5].CLK
5047
Clk => RegsL[2][6].CLK
5048
Clk => RegsL[2][7].CLK
5049
Clk => RegsL[1][0].CLK
5050
Clk => RegsL[1][1].CLK
5051
Clk => RegsL[1][2].CLK
5052
Clk => RegsL[1][3].CLK
5053
Clk => RegsL[1][4].CLK
5054
Clk => RegsL[1][5].CLK
5055
Clk => RegsL[1][6].CLK
5056
Clk => RegsL[1][7].CLK
5057
Clk => RegsL[0][0].CLK
5058
Clk => RegsL[0][1].CLK
5059
Clk => RegsL[0][2].CLK
5060
Clk => RegsL[0][3].CLK
5061
Clk => RegsL[0][4].CLK
5062
Clk => RegsL[0][5].CLK
5063
Clk => RegsL[0][6].CLK
5064
Clk => RegsL[0][7].CLK
5065
Clk => RegsH[7][0].CLK
5066
Clk => RegsH[7][1].CLK
5067
Clk => RegsH[7][2].CLK
5068
Clk => RegsH[7][3].CLK
5069
Clk => RegsH[7][4].CLK
5070
Clk => RegsH[7][5].CLK
5071
Clk => RegsH[7][6].CLK
5072
Clk => RegsH[7][7].CLK
5073
Clk => RegsH[6][0].CLK
5074
Clk => RegsH[6][1].CLK
5075
Clk => RegsH[6][2].CLK
5076
Clk => RegsH[6][3].CLK
5077
Clk => RegsH[6][4].CLK
5078
Clk => RegsH[6][5].CLK
5079
Clk => RegsH[6][6].CLK
5080
Clk => RegsH[6][7].CLK
5081
Clk => RegsH[5][0].CLK
5082
Clk => RegsH[5][1].CLK
5083
Clk => RegsH[5][2].CLK
5084
Clk => RegsH[5][3].CLK
5085
Clk => RegsH[5][4].CLK
5086
Clk => RegsH[5][5].CLK
5087
Clk => RegsH[5][6].CLK
5088
Clk => RegsH[5][7].CLK
5089
Clk => RegsH[4][0].CLK
5090
Clk => RegsH[4][1].CLK
5091
Clk => RegsH[4][2].CLK
5092
Clk => RegsH[4][3].CLK
5093
Clk => RegsH[4][4].CLK
5094
Clk => RegsH[4][5].CLK
5095
Clk => RegsH[4][6].CLK
5096
Clk => RegsH[4][7].CLK
5097
Clk => RegsH[3][0].CLK
5098
Clk => RegsH[3][1].CLK
5099
Clk => RegsH[3][2].CLK
5100
Clk => RegsH[3][3].CLK
5101
Clk => RegsH[3][4].CLK
5102
Clk => RegsH[3][5].CLK
5103
Clk => RegsH[3][6].CLK
5104
Clk => RegsH[3][7].CLK
5105
Clk => RegsH[2][0].CLK
5106
Clk => RegsH[2][1].CLK
5107
Clk => RegsH[2][2].CLK
5108
Clk => RegsH[2][3].CLK
5109
Clk => RegsH[2][4].CLK
5110
Clk => RegsH[2][5].CLK
5111
Clk => RegsH[2][6].CLK
5112
Clk => RegsH[2][7].CLK
5113
Clk => RegsH[1][0].CLK
5114
Clk => RegsH[1][1].CLK
5115
Clk => RegsH[1][2].CLK
5116
Clk => RegsH[1][3].CLK
5117
Clk => RegsH[1][4].CLK
5118
Clk => RegsH[1][5].CLK
5119
Clk => RegsH[1][6].CLK
5120
Clk => RegsH[1][7].CLK
5121
Clk => RegsH[0][0].CLK
5122
Clk => RegsH[0][1].CLK
5123
Clk => RegsH[0][2].CLK
5124
Clk => RegsH[0][3].CLK
5125
Clk => RegsH[0][4].CLK
5126
Clk => RegsH[0][5].CLK
5127
Clk => RegsH[0][6].CLK
5128
Clk => RegsH[0][7].CLK
5129
CEN => RegsL[7][0].ENA
5130
CEN => RegsL[7][1].ENA
5131
CEN => RegsL[7][2].ENA
5132
CEN => RegsL[7][3].ENA
5133
CEN => RegsL[7][4].ENA
5134
CEN => RegsL[7][5].ENA
5135
CEN => RegsL[7][6].ENA
5136
CEN => RegsL[7][7].ENA
5137
CEN => RegsL[6][0].ENA
5138
CEN => RegsL[6][1].ENA
5139
CEN => RegsL[6][2].ENA
5140
CEN => RegsL[6][3].ENA
5141
CEN => RegsL[6][4].ENA
5142
CEN => RegsL[6][5].ENA
5143
CEN => RegsL[6][6].ENA
5144
CEN => RegsL[6][7].ENA
5145
CEN => RegsL[5][0].ENA
5146
CEN => RegsL[5][1].ENA
5147
CEN => RegsL[5][2].ENA
5148
CEN => RegsL[5][3].ENA
5149
CEN => RegsL[5][4].ENA
5150
CEN => RegsL[5][5].ENA
5151
CEN => RegsL[5][6].ENA
5152
CEN => RegsL[5][7].ENA
5153
CEN => RegsL[4][0].ENA
5154
CEN => RegsL[4][1].ENA
5155
CEN => RegsL[4][2].ENA
5156
CEN => RegsL[4][3].ENA
5157
CEN => RegsL[4][4].ENA
5158
CEN => RegsL[4][5].ENA
5159
CEN => RegsL[4][6].ENA
5160
CEN => RegsL[4][7].ENA
5161
CEN => RegsL[3][0].ENA
5162
CEN => RegsL[3][1].ENA
5163
CEN => RegsL[3][2].ENA
5164
CEN => RegsL[3][3].ENA
5165
CEN => RegsL[3][4].ENA
5166
CEN => RegsL[3][5].ENA
5167
CEN => RegsL[3][6].ENA
5168
CEN => RegsL[3][7].ENA
5169
CEN => RegsL[2][0].ENA
5170
CEN => RegsL[2][1].ENA
5171
CEN => RegsL[2][2].ENA
5172
CEN => RegsL[2][3].ENA
5173
CEN => RegsL[2][4].ENA
5174
CEN => RegsL[2][5].ENA
5175
CEN => RegsL[2][6].ENA
5176
CEN => RegsL[2][7].ENA
5177
CEN => RegsL[1][0].ENA
5178
CEN => RegsL[1][1].ENA
5179
CEN => RegsL[1][2].ENA
5180
CEN => RegsL[1][3].ENA
5181
CEN => RegsL[1][4].ENA
5182
CEN => RegsL[1][5].ENA
5183
CEN => RegsL[1][6].ENA
5184
CEN => RegsL[1][7].ENA
5185
CEN => RegsL[0][0].ENA
5186
CEN => RegsL[0][1].ENA
5187
CEN => RegsL[0][2].ENA
5188
CEN => RegsL[0][3].ENA
5189
CEN => RegsL[0][4].ENA
5190
CEN => RegsL[0][5].ENA
5191
CEN => RegsL[0][6].ENA
5192
CEN => RegsL[0][7].ENA
5193
CEN => RegsH[7][0].ENA
5194
CEN => RegsH[7][1].ENA
5195
CEN => RegsH[7][2].ENA
5196
CEN => RegsH[7][3].ENA
5197
CEN => RegsH[7][4].ENA
5198
CEN => RegsH[7][5].ENA
5199
CEN => RegsH[7][6].ENA
5200
CEN => RegsH[7][7].ENA
5201
CEN => RegsH[6][0].ENA
5202
CEN => RegsH[6][1].ENA
5203
CEN => RegsH[6][2].ENA
5204
CEN => RegsH[6][3].ENA
5205
CEN => RegsH[6][4].ENA
5206
CEN => RegsH[6][5].ENA
5207
CEN => RegsH[6][6].ENA
5208
CEN => RegsH[6][7].ENA
5209
CEN => RegsH[5][0].ENA
5210
CEN => RegsH[5][1].ENA
5211
CEN => RegsH[5][2].ENA
5212
CEN => RegsH[5][3].ENA
5213
CEN => RegsH[5][4].ENA
5214
CEN => RegsH[5][5].ENA
5215
CEN => RegsH[5][6].ENA
5216
CEN => RegsH[5][7].ENA
5217
CEN => RegsH[4][0].ENA
5218
CEN => RegsH[4][1].ENA
5219
CEN => RegsH[4][2].ENA
5220
CEN => RegsH[4][3].ENA
5221
CEN => RegsH[4][4].ENA
5222
CEN => RegsH[4][5].ENA
5223
CEN => RegsH[4][6].ENA
5224
CEN => RegsH[4][7].ENA
5225
CEN => RegsH[3][0].ENA
5226
CEN => RegsH[3][1].ENA
5227
CEN => RegsH[3][2].ENA
5228
CEN => RegsH[3][3].ENA
5229
CEN => RegsH[3][4].ENA
5230
CEN => RegsH[3][5].ENA
5231
CEN => RegsH[3][6].ENA
5232
CEN => RegsH[3][7].ENA
5233
CEN => RegsH[2][0].ENA
5234
CEN => RegsH[2][1].ENA
5235
CEN => RegsH[2][2].ENA
5236
CEN => RegsH[2][3].ENA
5237
CEN => RegsH[2][4].ENA
5238
CEN => RegsH[2][5].ENA
5239
CEN => RegsH[2][6].ENA
5240
CEN => RegsH[2][7].ENA
5241
CEN => RegsH[1][0].ENA
5242
CEN => RegsH[1][1].ENA
5243
CEN => RegsH[1][2].ENA
5244
CEN => RegsH[1][3].ENA
5245
CEN => RegsH[1][4].ENA
5246
CEN => RegsH[1][5].ENA
5247
CEN => RegsH[1][6].ENA
5248
CEN => RegsH[1][7].ENA
5249
CEN => RegsH[0][0].ENA
5250
CEN => RegsH[0][1].ENA
5251
CEN => RegsH[0][2].ENA
5252
CEN => RegsH[0][3].ENA
5253
CEN => RegsH[0][4].ENA
5254
CEN => RegsH[0][5].ENA
5255
CEN => RegsH[0][6].ENA
5256
CEN => RegsH[0][7].ENA
5257
WEH => RegsH.OUTPUTSELECT
5258
WEH => RegsH.OUTPUTSELECT
5259
WEH => RegsH.OUTPUTSELECT
5260
WEH => RegsH.OUTPUTSELECT
5261
WEH => RegsH.OUTPUTSELECT
5262
WEH => RegsH.OUTPUTSELECT
5263
WEH => RegsH.OUTPUTSELECT
5264
WEH => RegsH.OUTPUTSELECT
5265
WEH => RegsH.OUTPUTSELECT
5266
WEH => RegsH.OUTPUTSELECT
5267
WEH => RegsH.OUTPUTSELECT
5268
WEH => RegsH.OUTPUTSELECT
5269
WEH => RegsH.OUTPUTSELECT
5270
WEH => RegsH.OUTPUTSELECT
5271
WEH => RegsH.OUTPUTSELECT
5272
WEH => RegsH.OUTPUTSELECT
5273
WEH => RegsH.OUTPUTSELECT
5274
WEH => RegsH.OUTPUTSELECT
5275
WEH => RegsH.OUTPUTSELECT
5276
WEH => RegsH.OUTPUTSELECT
5277
WEH => RegsH.OUTPUTSELECT
5278
WEH => RegsH.OUTPUTSELECT
5279
WEH => RegsH.OUTPUTSELECT
5280
WEH => RegsH.OUTPUTSELECT
5281
WEH => RegsH.OUTPUTSELECT
5282
WEH => RegsH.OUTPUTSELECT
5283
WEH => RegsH.OUTPUTSELECT
5284
WEH => RegsH.OUTPUTSELECT
5285
WEH => RegsH.OUTPUTSELECT
5286
WEH => RegsH.OUTPUTSELECT
5287
WEH => RegsH.OUTPUTSELECT
5288
WEH => RegsH.OUTPUTSELECT
5289
WEH => RegsH.OUTPUTSELECT
5290
WEH => RegsH.OUTPUTSELECT
5291
WEH => RegsH.OUTPUTSELECT
5292
WEH => RegsH.OUTPUTSELECT
5293
WEH => RegsH.OUTPUTSELECT
5294
WEH => RegsH.OUTPUTSELECT
5295
WEH => RegsH.OUTPUTSELECT
5296
WEH => RegsH.OUTPUTSELECT
5297
WEH => RegsH.OUTPUTSELECT
5298
WEH => RegsH.OUTPUTSELECT
5299
WEH => RegsH.OUTPUTSELECT
5300
WEH => RegsH.OUTPUTSELECT
5301
WEH => RegsH.OUTPUTSELECT
5302
WEH => RegsH.OUTPUTSELECT
5303
WEH => RegsH.OUTPUTSELECT
5304
WEH => RegsH.OUTPUTSELECT
5305
WEH => RegsH.OUTPUTSELECT
5306
WEH => RegsH.OUTPUTSELECT
5307
WEH => RegsH.OUTPUTSELECT
5308
WEH => RegsH.OUTPUTSELECT
5309
WEH => RegsH.OUTPUTSELECT
5310
WEH => RegsH.OUTPUTSELECT
5311
WEH => RegsH.OUTPUTSELECT
5312
WEH => RegsH.OUTPUTSELECT
5313
WEH => RegsH.OUTPUTSELECT
5314
WEH => RegsH.OUTPUTSELECT
5315
WEH => RegsH.OUTPUTSELECT
5316
WEH => RegsH.OUTPUTSELECT
5317
WEH => RegsH.OUTPUTSELECT
5318
WEH => RegsH.OUTPUTSELECT
5319
WEH => RegsH.OUTPUTSELECT
5320
WEH => RegsH.OUTPUTSELECT
5321
WEL => RegsL.OUTPUTSELECT
5322
WEL => RegsL.OUTPUTSELECT
5323
WEL => RegsL.OUTPUTSELECT
5324
WEL => RegsL.OUTPUTSELECT
5325
WEL => RegsL.OUTPUTSELECT
5326
WEL => RegsL.OUTPUTSELECT
5327
WEL => RegsL.OUTPUTSELECT
5328
WEL => RegsL.OUTPUTSELECT
5329
WEL => RegsL.OUTPUTSELECT
5330
WEL => RegsL.OUTPUTSELECT
5331
WEL => RegsL.OUTPUTSELECT
5332
WEL => RegsL.OUTPUTSELECT
5333
WEL => RegsL.OUTPUTSELECT
5334
WEL => RegsL.OUTPUTSELECT
5335
WEL => RegsL.OUTPUTSELECT
5336
WEL => RegsL.OUTPUTSELECT
5337
WEL => RegsL.OUTPUTSELECT
5338
WEL => RegsL.OUTPUTSELECT
5339
WEL => RegsL.OUTPUTSELECT
5340
WEL => RegsL.OUTPUTSELECT
5341
WEL => RegsL.OUTPUTSELECT
5342
WEL => RegsL.OUTPUTSELECT
5343
WEL => RegsL.OUTPUTSELECT
5344
WEL => RegsL.OUTPUTSELECT
5345
WEL => RegsL.OUTPUTSELECT
5346
WEL => RegsL.OUTPUTSELECT
5347
WEL => RegsL.OUTPUTSELECT
5348
WEL => RegsL.OUTPUTSELECT
5349
WEL => RegsL.OUTPUTSELECT
5350
WEL => RegsL.OUTPUTSELECT
5351
WEL => RegsL.OUTPUTSELECT
5352
WEL => RegsL.OUTPUTSELECT
5353
WEL => RegsL.OUTPUTSELECT
5354
WEL => RegsL.OUTPUTSELECT
5355
WEL => RegsL.OUTPUTSELECT
5356
WEL => RegsL.OUTPUTSELECT
5357
WEL => RegsL.OUTPUTSELECT
5358
WEL => RegsL.OUTPUTSELECT
5359
WEL => RegsL.OUTPUTSELECT
5360
WEL => RegsL.OUTPUTSELECT
5361
WEL => RegsL.OUTPUTSELECT
5362
WEL => RegsL.OUTPUTSELECT
5363
WEL => RegsL.OUTPUTSELECT
5364
WEL => RegsL.OUTPUTSELECT
5365
WEL => RegsL.OUTPUTSELECT
5366
WEL => RegsL.OUTPUTSELECT
5367
WEL => RegsL.OUTPUTSELECT
5368
WEL => RegsL.OUTPUTSELECT
5369
WEL => RegsL.OUTPUTSELECT
5370
WEL => RegsL.OUTPUTSELECT
5371
WEL => RegsL.OUTPUTSELECT
5372
WEL => RegsL.OUTPUTSELECT
5373
WEL => RegsL.OUTPUTSELECT
5374
WEL => RegsL.OUTPUTSELECT
5375
WEL => RegsL.OUTPUTSELECT
5376
WEL => RegsL.OUTPUTSELECT
5377
WEL => RegsL.OUTPUTSELECT
5378
WEL => RegsL.OUTPUTSELECT
5379
WEL => RegsL.OUTPUTSELECT
5380
WEL => RegsL.OUTPUTSELECT
5381
WEL => RegsL.OUTPUTSELECT
5382
WEL => RegsL.OUTPUTSELECT
5383
WEL => RegsL.OUTPUTSELECT
5384
WEL => RegsL.OUTPUTSELECT
5385
AddrA[0] => Decoder0.IN2
5386
AddrA[0] => Mux0.IN2
5387
AddrA[0] => Mux1.IN2
5388
AddrA[0] => Mux2.IN2
5389
AddrA[0] => Mux3.IN2
5390
AddrA[0] => Mux4.IN2
5391
AddrA[0] => Mux5.IN2
5392
AddrA[0] => Mux6.IN2
5393
AddrA[0] => Mux7.IN2
5394
AddrA[0] => Mux8.IN2
5395
AddrA[0] => Mux9.IN2
5396
AddrA[0] => Mux10.IN2
5397
AddrA[0] => Mux11.IN2
5398
AddrA[0] => Mux12.IN2
5399
AddrA[0] => Mux13.IN2
5400
AddrA[0] => Mux14.IN2
5401
AddrA[0] => Mux15.IN2
5402
AddrA[1] => Decoder0.IN1
5403
AddrA[1] => Mux0.IN1
5404
AddrA[1] => Mux1.IN1
5405
AddrA[1] => Mux2.IN1
5406
AddrA[1] => Mux3.IN1
5407
AddrA[1] => Mux4.IN1
5408
AddrA[1] => Mux5.IN1
5409
AddrA[1] => Mux6.IN1
5410
AddrA[1] => Mux7.IN1
5411
AddrA[1] => Mux8.IN1
5412
AddrA[1] => Mux9.IN1
5413
AddrA[1] => Mux10.IN1
5414
AddrA[1] => Mux11.IN1
5415
AddrA[1] => Mux12.IN1
5416
AddrA[1] => Mux13.IN1
5417
AddrA[1] => Mux14.IN1
5418
AddrA[1] => Mux15.IN1
5419
AddrA[2] => Decoder0.IN0
5420
AddrA[2] => Mux0.IN0
5421
AddrA[2] => Mux1.IN0
5422
AddrA[2] => Mux2.IN0
5423
AddrA[2] => Mux3.IN0
5424
AddrA[2] => Mux4.IN0
5425
AddrA[2] => Mux5.IN0
5426
AddrA[2] => Mux6.IN0
5427
AddrA[2] => Mux7.IN0
5428
AddrA[2] => Mux8.IN0
5429
AddrA[2] => Mux9.IN0
5430
AddrA[2] => Mux10.IN0
5431
AddrA[2] => Mux11.IN0
5432
AddrA[2] => Mux12.IN0
5433
AddrA[2] => Mux13.IN0
5434
AddrA[2] => Mux14.IN0
5435
AddrA[2] => Mux15.IN0
5436
AddrB[0] => Mux16.IN2
5437
AddrB[0] => Mux17.IN2
5438
AddrB[0] => Mux18.IN2
5439
AddrB[0] => Mux19.IN2
5440
AddrB[0] => Mux20.IN2
5441
AddrB[0] => Mux21.IN2
5442
AddrB[0] => Mux22.IN2
5443
AddrB[0] => Mux23.IN2
5444
AddrB[0] => Mux24.IN2
5445
AddrB[0] => Mux25.IN2
5446
AddrB[0] => Mux26.IN2
5447
AddrB[0] => Mux27.IN2
5448
AddrB[0] => Mux28.IN2
5449
AddrB[0] => Mux29.IN2
5450
AddrB[0] => Mux30.IN2
5451
AddrB[0] => Mux31.IN2
5452
AddrB[1] => Mux16.IN1
5453
AddrB[1] => Mux17.IN1
5454
AddrB[1] => Mux18.IN1
5455
AddrB[1] => Mux19.IN1
5456
AddrB[1] => Mux20.IN1
5457
AddrB[1] => Mux21.IN1
5458
AddrB[1] => Mux22.IN1
5459
AddrB[1] => Mux23.IN1
5460
AddrB[1] => Mux24.IN1
5461
AddrB[1] => Mux25.IN1
5462
AddrB[1] => Mux26.IN1
5463
AddrB[1] => Mux27.IN1
5464
AddrB[1] => Mux28.IN1
5465
AddrB[1] => Mux29.IN1
5466
AddrB[1] => Mux30.IN1
5467
AddrB[1] => Mux31.IN1
5468
AddrB[2] => Mux16.IN0
5469
AddrB[2] => Mux17.IN0
5470
AddrB[2] => Mux18.IN0
5471
AddrB[2] => Mux19.IN0
5472
AddrB[2] => Mux20.IN0
5473
AddrB[2] => Mux21.IN0
5474
AddrB[2] => Mux22.IN0
5475
AddrB[2] => Mux23.IN0
5476
AddrB[2] => Mux24.IN0
5477
AddrB[2] => Mux25.IN0
5478
AddrB[2] => Mux26.IN0
5479
AddrB[2] => Mux27.IN0
5480
AddrB[2] => Mux28.IN0
5481
AddrB[2] => Mux29.IN0
5482
AddrB[2] => Mux30.IN0
5483
AddrB[2] => Mux31.IN0
5484
AddrC[0] => Mux32.IN2
5485
AddrC[0] => Mux33.IN2
5486
AddrC[0] => Mux34.IN2
5487
AddrC[0] => Mux35.IN2
5488
AddrC[0] => Mux36.IN2
5489
AddrC[0] => Mux37.IN2
5490
AddrC[0] => Mux38.IN2
5491
AddrC[0] => Mux39.IN2
5492
AddrC[0] => Mux40.IN2
5493
AddrC[0] => Mux41.IN2
5494
AddrC[0] => Mux42.IN2
5495
AddrC[0] => Mux43.IN2
5496
AddrC[0] => Mux44.IN2
5497
AddrC[0] => Mux45.IN2
5498
AddrC[0] => Mux46.IN2
5499
AddrC[0] => Mux47.IN2
5500
AddrC[1] => Mux32.IN1
5501
AddrC[1] => Mux33.IN1
5502
AddrC[1] => Mux34.IN1
5503
AddrC[1] => Mux35.IN1
5504
AddrC[1] => Mux36.IN1
5505
AddrC[1] => Mux37.IN1
5506
AddrC[1] => Mux38.IN1
5507
AddrC[1] => Mux39.IN1
5508
AddrC[1] => Mux40.IN1
5509
AddrC[1] => Mux41.IN1
5510
AddrC[1] => Mux42.IN1
5511
AddrC[1] => Mux43.IN1
5512
AddrC[1] => Mux44.IN1
5513
AddrC[1] => Mux45.IN1
5514
AddrC[1] => Mux46.IN1
5515
AddrC[1] => Mux47.IN1
5516
AddrC[2] => Mux32.IN0
5517
AddrC[2] => Mux33.IN0
5518
AddrC[2] => Mux34.IN0
5519
AddrC[2] => Mux35.IN0
5520
AddrC[2] => Mux36.IN0
5521
AddrC[2] => Mux37.IN0
5522
AddrC[2] => Mux38.IN0
5523
AddrC[2] => Mux39.IN0
5524
AddrC[2] => Mux40.IN0
5525
AddrC[2] => Mux41.IN0
5526
AddrC[2] => Mux42.IN0
5527
AddrC[2] => Mux43.IN0
5528
AddrC[2] => Mux44.IN0
5529
AddrC[2] => Mux45.IN0
5530
AddrC[2] => Mux46.IN0
5531
AddrC[2] => Mux47.IN0
5532
DIH[0] => RegsH.DATAB
5533
DIH[0] => RegsH.DATAB
5534
DIH[0] => RegsH.DATAB
5535
DIH[0] => RegsH.DATAB
5536
DIH[0] => RegsH.DATAB
5537
DIH[0] => RegsH.DATAB
5538
DIH[0] => RegsH.DATAB
5539
DIH[0] => RegsH.DATAB
5540
DIH[1] => RegsH.DATAB
5541
DIH[1] => RegsH.DATAB
5542
DIH[1] => RegsH.DATAB
5543
DIH[1] => RegsH.DATAB
5544
DIH[1] => RegsH.DATAB
5545
DIH[1] => RegsH.DATAB
5546
DIH[1] => RegsH.DATAB
5547
DIH[1] => RegsH.DATAB
5548
DIH[2] => RegsH.DATAB
5549
DIH[2] => RegsH.DATAB
5550
DIH[2] => RegsH.DATAB
5551
DIH[2] => RegsH.DATAB
5552
DIH[2] => RegsH.DATAB
5553
DIH[2] => RegsH.DATAB
5554
DIH[2] => RegsH.DATAB
5555
DIH[2] => RegsH.DATAB
5556
DIH[3] => RegsH.DATAB
5557
DIH[3] => RegsH.DATAB
5558
DIH[3] => RegsH.DATAB
5559
DIH[3] => RegsH.DATAB
5560
DIH[3] => RegsH.DATAB
5561
DIH[3] => RegsH.DATAB
5562
DIH[3] => RegsH.DATAB
5563
DIH[3] => RegsH.DATAB
5564
DIH[4] => RegsH.DATAB
5565
DIH[4] => RegsH.DATAB
5566
DIH[4] => RegsH.DATAB
5567
DIH[4] => RegsH.DATAB
5568
DIH[4] => RegsH.DATAB
5569
DIH[4] => RegsH.DATAB
5570
DIH[4] => RegsH.DATAB
5571
DIH[4] => RegsH.DATAB
5572
DIH[5] => RegsH.DATAB
5573
DIH[5] => RegsH.DATAB
5574
DIH[5] => RegsH.DATAB
5575
DIH[5] => RegsH.DATAB
5576
DIH[5] => RegsH.DATAB
5577
DIH[5] => RegsH.DATAB
5578
DIH[5] => RegsH.DATAB
5579
DIH[5] => RegsH.DATAB
5580
DIH[6] => RegsH.DATAB
5581
DIH[6] => RegsH.DATAB
5582
DIH[6] => RegsH.DATAB
5583
DIH[6] => RegsH.DATAB
5584
DIH[6] => RegsH.DATAB
5585
DIH[6] => RegsH.DATAB
5586
DIH[6] => RegsH.DATAB
5587
DIH[6] => RegsH.DATAB
5588
DIH[7] => RegsH.DATAB
5589
DIH[7] => RegsH.DATAB
5590
DIH[7] => RegsH.DATAB
5591
DIH[7] => RegsH.DATAB
5592
DIH[7] => RegsH.DATAB
5593
DIH[7] => RegsH.DATAB
5594
DIH[7] => RegsH.DATAB
5595
DIH[7] => RegsH.DATAB
5596
DIL[0] => RegsL.DATAB
5597
DIL[0] => RegsL.DATAB
5598
DIL[0] => RegsL.DATAB
5599
DIL[0] => RegsL.DATAB
5600
DIL[0] => RegsL.DATAB
5601
DIL[0] => RegsL.DATAB
5602
DIL[0] => RegsL.DATAB
5603
DIL[0] => RegsL.DATAB
5604
DIL[1] => RegsL.DATAB
5605
DIL[1] => RegsL.DATAB
5606
DIL[1] => RegsL.DATAB
5607
DIL[1] => RegsL.DATAB
5608
DIL[1] => RegsL.DATAB
5609
DIL[1] => RegsL.DATAB
5610
DIL[1] => RegsL.DATAB
5611
DIL[1] => RegsL.DATAB
5612
DIL[2] => RegsL.DATAB
5613
DIL[2] => RegsL.DATAB
5614
DIL[2] => RegsL.DATAB
5615
DIL[2] => RegsL.DATAB
5616
DIL[2] => RegsL.DATAB
5617
DIL[2] => RegsL.DATAB
5618
DIL[2] => RegsL.DATAB
5619
DIL[2] => RegsL.DATAB
5620
DIL[3] => RegsL.DATAB
5621
DIL[3] => RegsL.DATAB
5622
DIL[3] => RegsL.DATAB
5623
DIL[3] => RegsL.DATAB
5624
DIL[3] => RegsL.DATAB
5625
DIL[3] => RegsL.DATAB
5626
DIL[3] => RegsL.DATAB
5627
DIL[3] => RegsL.DATAB
5628
DIL[4] => RegsL.DATAB
5629
DIL[4] => RegsL.DATAB
5630
DIL[4] => RegsL.DATAB
5631
DIL[4] => RegsL.DATAB
5632
DIL[4] => RegsL.DATAB
5633
DIL[4] => RegsL.DATAB
5634
DIL[4] => RegsL.DATAB
5635
DIL[4] => RegsL.DATAB
5636
DIL[5] => RegsL.DATAB
5637
DIL[5] => RegsL.DATAB
5638
DIL[5] => RegsL.DATAB
5639
DIL[5] => RegsL.DATAB
5640
DIL[5] => RegsL.DATAB
5641
DIL[5] => RegsL.DATAB
5642
DIL[5] => RegsL.DATAB
5643
DIL[5] => RegsL.DATAB
5644
DIL[6] => RegsL.DATAB
5645
DIL[6] => RegsL.DATAB
5646
DIL[6] => RegsL.DATAB
5647
DIL[6] => RegsL.DATAB
5648
DIL[6] => RegsL.DATAB
5649
DIL[6] => RegsL.DATAB
5650
DIL[6] => RegsL.DATAB
5651
DIL[6] => RegsL.DATAB
5652
DIL[7] => RegsL.DATAB
5653
DIL[7] => RegsL.DATAB
5654
DIL[7] => RegsL.DATAB
5655
DIL[7] => RegsL.DATAB
5656
DIL[7] => RegsL.DATAB
5657
DIL[7] => RegsL.DATAB
5658
DIL[7] => RegsL.DATAB
5659
DIL[7] => RegsL.DATAB
5660
DOAH[0] <= Mux7.DB_MAX_OUTPUT_PORT_TYPE
5661
DOAH[1] <= Mux6.DB_MAX_OUTPUT_PORT_TYPE
5662
DOAH[2] <= Mux5.DB_MAX_OUTPUT_PORT_TYPE
5663
DOAH[3] <= Mux4.DB_MAX_OUTPUT_PORT_TYPE
5664
DOAH[4] <= Mux3.DB_MAX_OUTPUT_PORT_TYPE
5665
DOAH[5] <= Mux2.DB_MAX_OUTPUT_PORT_TYPE
5666
DOAH[6] <= Mux1.DB_MAX_OUTPUT_PORT_TYPE
5667
DOAH[7] <= Mux0.DB_MAX_OUTPUT_PORT_TYPE
5668
DOAL[0] <= Mux15.DB_MAX_OUTPUT_PORT_TYPE
5669
DOAL[1] <= Mux14.DB_MAX_OUTPUT_PORT_TYPE
5670
DOAL[2] <= Mux13.DB_MAX_OUTPUT_PORT_TYPE
5671
DOAL[3] <= Mux12.DB_MAX_OUTPUT_PORT_TYPE
5672
DOAL[4] <= Mux11.DB_MAX_OUTPUT_PORT_TYPE
5673
DOAL[5] <= Mux10.DB_MAX_OUTPUT_PORT_TYPE
5674
DOAL[6] <= Mux9.DB_MAX_OUTPUT_PORT_TYPE
5675
DOAL[7] <= Mux8.DB_MAX_OUTPUT_PORT_TYPE
5676
DOBH[0] <= Mux23.DB_MAX_OUTPUT_PORT_TYPE
5677
DOBH[1] <= Mux22.DB_MAX_OUTPUT_PORT_TYPE
5678
DOBH[2] <= Mux21.DB_MAX_OUTPUT_PORT_TYPE
5679
DOBH[3] <= Mux20.DB_MAX_OUTPUT_PORT_TYPE
5680
DOBH[4] <= Mux19.DB_MAX_OUTPUT_PORT_TYPE
5681
DOBH[5] <= Mux18.DB_MAX_OUTPUT_PORT_TYPE
5682
DOBH[6] <= Mux17.DB_MAX_OUTPUT_PORT_TYPE
5683
DOBH[7] <= Mux16.DB_MAX_OUTPUT_PORT_TYPE
5684
DOBL[0] <= Mux31.DB_MAX_OUTPUT_PORT_TYPE
5685
DOBL[1] <= Mux30.DB_MAX_OUTPUT_PORT_TYPE
5686
DOBL[2] <= Mux29.DB_MAX_OUTPUT_PORT_TYPE
5687
DOBL[3] <= Mux28.DB_MAX_OUTPUT_PORT_TYPE
5688
DOBL[4] <= Mux27.DB_MAX_OUTPUT_PORT_TYPE
5689
DOBL[5] <= Mux26.DB_MAX_OUTPUT_PORT_TYPE
5690
DOBL[6] <= Mux25.DB_MAX_OUTPUT_PORT_TYPE
5691
DOBL[7] <= Mux24.DB_MAX_OUTPUT_PORT_TYPE
5692
DOCH[0] <= Mux39.DB_MAX_OUTPUT_PORT_TYPE
5693
DOCH[1] <= Mux38.DB_MAX_OUTPUT_PORT_TYPE
5694
DOCH[2] <= Mux37.DB_MAX_OUTPUT_PORT_TYPE
5695
DOCH[3] <= Mux36.DB_MAX_OUTPUT_PORT_TYPE
5696
DOCH[4] <= Mux35.DB_MAX_OUTPUT_PORT_TYPE
5697
DOCH[5] <= Mux34.DB_MAX_OUTPUT_PORT_TYPE
5698
DOCH[6] <= Mux33.DB_MAX_OUTPUT_PORT_TYPE
5699
DOCH[7] <= Mux32.DB_MAX_OUTPUT_PORT_TYPE
5700
DOCL[0] <= Mux47.DB_MAX_OUTPUT_PORT_TYPE
5701
DOCL[1] <= Mux46.DB_MAX_OUTPUT_PORT_TYPE
5702
DOCL[2] <= Mux45.DB_MAX_OUTPUT_PORT_TYPE
5703
DOCL[3] <= Mux44.DB_MAX_OUTPUT_PORT_TYPE
5704
DOCL[4] <= Mux43.DB_MAX_OUTPUT_PORT_TYPE
5705
DOCL[5] <= Mux42.DB_MAX_OUTPUT_PORT_TYPE
5706
DOCL[6] <= Mux41.DB_MAX_OUTPUT_PORT_TYPE
5707
DOCL[7] <= Mux40.DB_MAX_OUTPUT_PORT_TYPE
5708
 
5709
 
5710
|Z80SOC|video:video_inst
5711
CLOCK_25 => VGA_SYNC:vga_sync_inst.clock_25Mhz
5712
VRAM_DATA[0] => CRAM_ADDR[3].DATAIN
5713
VRAM_DATA[1] => CRAM_ADDR[4].DATAIN
5714
VRAM_DATA[2] => CRAM_ADDR[5].DATAIN
5715
VRAM_DATA[3] => CRAM_ADDR[6].DATAIN
5716
VRAM_DATA[4] => CRAM_ADDR[7].DATAIN
5717
VRAM_DATA[5] => CRAM_ADDR[8].DATAIN
5718
VRAM_DATA[6] => CRAM_ADDR[9].DATAIN
5719
VRAM_DATA[7] => CRAM_ADDR[10].DATAIN
5720
VRAM_ADDR[0] <= VGA_SYNC:vga_sync_inst.pixel_column[3]
5721
VRAM_ADDR[1] <= VGA_SYNC:vga_sync_inst.pixel_column[4]
5722
VRAM_ADDR[2] <= VGA_SYNC:vga_sync_inst.pixel_column[5]
5723
VRAM_ADDR[3] <= VGA_SYNC:vga_sync_inst.pixel_column[6]
5724
VRAM_ADDR[4] <= Add1.DB_MAX_OUTPUT_PORT_TYPE
5725
VRAM_ADDR[5] <= Add1.DB_MAX_OUTPUT_PORT_TYPE
5726
VRAM_ADDR[6] <= Add1.DB_MAX_OUTPUT_PORT_TYPE
5727
VRAM_ADDR[7] <= Add1.DB_MAX_OUTPUT_PORT_TYPE
5728
VRAM_ADDR[8] <= Add1.DB_MAX_OUTPUT_PORT_TYPE
5729
VRAM_ADDR[9] <= Add1.DB_MAX_OUTPUT_PORT_TYPE
5730
VRAM_ADDR[10] <= Add1.DB_MAX_OUTPUT_PORT_TYPE
5731
VRAM_ADDR[11] <= Add1.DB_MAX_OUTPUT_PORT_TYPE
5732
VRAM_ADDR[12] <= Add1.DB_MAX_OUTPUT_PORT_TYPE
5733
VRAM_ADDR[13] <= Add1.DB_MAX_OUTPUT_PORT_TYPE
5734
VRAM_CLOCK <= VGA_SYNC:vga_sync_inst.pixel_clock
5735
VRAM_WREN <= 
5736
CRAM_DATA[0] => Mux0.IN3
5737
CRAM_DATA[1] => Mux0.IN4
5738
CRAM_DATA[2] => Mux0.IN5
5739
CRAM_DATA[3] => Mux0.IN6
5740
CRAM_DATA[4] => Mux0.IN7
5741
CRAM_DATA[5] => Mux0.IN8
5742
CRAM_DATA[6] => Mux0.IN9
5743
CRAM_DATA[7] => Mux0.IN10
5744
CRAM_ADDR[0] <= VGA_SYNC:vga_sync_inst.pixel_row[0]
5745
CRAM_ADDR[1] <= VGA_SYNC:vga_sync_inst.pixel_row[1]
5746
CRAM_ADDR[2] <= VGA_SYNC:vga_sync_inst.pixel_row[2]
5747
CRAM_ADDR[3] <= VRAM_DATA[0].DB_MAX_OUTPUT_PORT_TYPE
5748
CRAM_ADDR[4] <= VRAM_DATA[1].DB_MAX_OUTPUT_PORT_TYPE
5749
CRAM_ADDR[5] <= VRAM_DATA[2].DB_MAX_OUTPUT_PORT_TYPE
5750
CRAM_ADDR[6] <= VRAM_DATA[3].DB_MAX_OUTPUT_PORT_TYPE
5751
CRAM_ADDR[7] <= VRAM_DATA[4].DB_MAX_OUTPUT_PORT_TYPE
5752
CRAM_ADDR[8] <= VRAM_DATA[5].DB_MAX_OUTPUT_PORT_TYPE
5753
CRAM_ADDR[9] <= VRAM_DATA[6].DB_MAX_OUTPUT_PORT_TYPE
5754
CRAM_ADDR[10] <= VRAM_DATA[7].DB_MAX_OUTPUT_PORT_TYPE
5755
CRAM_WEB <= 
5756
VGA_R[0] <= VGA_SYNC:vga_sync_inst.red_out[0]
5757
VGA_R[1] <= VGA_SYNC:vga_sync_inst.red_out[1]
5758
VGA_R[2] <= VGA_SYNC:vga_sync_inst.red_out[2]
5759
VGA_R[3] <= VGA_SYNC:vga_sync_inst.red_out[3]
5760
VGA_G[0] <= VGA_SYNC:vga_sync_inst.green_out[0]
5761
VGA_G[1] <= VGA_SYNC:vga_sync_inst.green_out[1]
5762
VGA_G[2] <= VGA_SYNC:vga_sync_inst.green_out[2]
5763
VGA_G[3] <= VGA_SYNC:vga_sync_inst.green_out[3]
5764
VGA_B[0] <= VGA_SYNC:vga_sync_inst.blue_out[0]
5765
VGA_B[1] <= VGA_SYNC:vga_sync_inst.blue_out[1]
5766
VGA_B[2] <= VGA_SYNC:vga_sync_inst.blue_out[2]
5767
VGA_B[3] <= VGA_SYNC:vga_sync_inst.blue_out[3]
5768
VGA_HS <= VGA_SYNC:vga_sync_inst.horiz_sync_out
5769
VGA_VS <= VGA_SYNC:vga_sync_inst.vert_sync_out
5770
 
5771
 
5772
|Z80SOC|video:video_inst|VGA_SYNC:vga_sync_inst
5773
clock_25Mhz => blue_out[0]~reg0.CLK
5774
clock_25Mhz => blue_out[1]~reg0.CLK
5775
clock_25Mhz => blue_out[2]~reg0.CLK
5776
clock_25Mhz => blue_out[3]~reg0.CLK
5777
clock_25Mhz => green_out[0]~reg0.CLK
5778
clock_25Mhz => green_out[1]~reg0.CLK
5779
clock_25Mhz => green_out[2]~reg0.CLK
5780
clock_25Mhz => green_out[3]~reg0.CLK
5781
clock_25Mhz => red_out[0]~reg0.CLK
5782
clock_25Mhz => red_out[1]~reg0.CLK
5783
clock_25Mhz => red_out[2]~reg0.CLK
5784
clock_25Mhz => red_out[3]~reg0.CLK
5785
clock_25Mhz => vert_sync_out~reg0.CLK
5786
clock_25Mhz => horiz_sync_out~reg0.CLK
5787
clock_25Mhz => pixel_row[0]~reg0.CLK
5788
clock_25Mhz => pixel_row[1]~reg0.CLK
5789
clock_25Mhz => pixel_row[2]~reg0.CLK
5790
clock_25Mhz => pixel_row[3]~reg0.CLK
5791
clock_25Mhz => pixel_row[4]~reg0.CLK
5792
clock_25Mhz => pixel_row[5]~reg0.CLK
5793
clock_25Mhz => pixel_row[6]~reg0.CLK
5794
clock_25Mhz => pixel_row[7]~reg0.CLK
5795
clock_25Mhz => pixel_row[8]~reg0.CLK
5796
clock_25Mhz => pixel_row[9]~reg0.CLK
5797
clock_25Mhz => video_on_v.CLK
5798
clock_25Mhz => pixel_column[0]~reg0.CLK
5799
clock_25Mhz => pixel_column[1]~reg0.CLK
5800
clock_25Mhz => pixel_column[2]~reg0.CLK
5801
clock_25Mhz => pixel_column[3]~reg0.CLK
5802
clock_25Mhz => pixel_column[4]~reg0.CLK
5803
clock_25Mhz => pixel_column[5]~reg0.CLK
5804
clock_25Mhz => pixel_column[6]~reg0.CLK
5805
clock_25Mhz => pixel_column[7]~reg0.CLK
5806
clock_25Mhz => pixel_column[8]~reg0.CLK
5807
clock_25Mhz => pixel_column[9]~reg0.CLK
5808
clock_25Mhz => video_on_h.CLK
5809
clock_25Mhz => vert_sync.CLK
5810
clock_25Mhz => v_count[0].CLK
5811
clock_25Mhz => v_count[1].CLK
5812
clock_25Mhz => v_count[2].CLK
5813
clock_25Mhz => v_count[3].CLK
5814
clock_25Mhz => v_count[4].CLK
5815
clock_25Mhz => v_count[5].CLK
5816
clock_25Mhz => v_count[6].CLK
5817
clock_25Mhz => v_count[7].CLK
5818
clock_25Mhz => v_count[8].CLK
5819
clock_25Mhz => v_count[9].CLK
5820
clock_25Mhz => horiz_sync.CLK
5821
clock_25Mhz => h_count[0].CLK
5822
clock_25Mhz => h_count[1].CLK
5823
clock_25Mhz => h_count[2].CLK
5824
clock_25Mhz => h_count[3].CLK
5825
clock_25Mhz => h_count[4].CLK
5826
clock_25Mhz => h_count[5].CLK
5827
clock_25Mhz => h_count[6].CLK
5828
clock_25Mhz => h_count[7].CLK
5829
clock_25Mhz => h_count[8].CLK
5830
clock_25Mhz => h_count[9].CLK
5831
clock_25Mhz => pixel_clock.DATAIN
5832
red[0] => red_out.IN1
5833
red[1] => red_out.IN1
5834
red[2] => red_out.IN1
5835
red[3] => red_out.IN1
5836
green[0] => green_out.IN1
5837
green[1] => green_out.IN1
5838
green[2] => green_out.IN1
5839
green[3] => green_out.IN1
5840
blue[0] => blue_out.IN1
5841
blue[1] => blue_out.IN1
5842
blue[2] => blue_out.IN1
5843
blue[3] => blue_out.IN1
5844
red_out[0] <= red_out[0]~reg0.DB_MAX_OUTPUT_PORT_TYPE
5845
red_out[1] <= red_out[1]~reg0.DB_MAX_OUTPUT_PORT_TYPE
5846
red_out[2] <= red_out[2]~reg0.DB_MAX_OUTPUT_PORT_TYPE
5847
red_out[3] <= red_out[3]~reg0.DB_MAX_OUTPUT_PORT_TYPE
5848
green_out[0] <= green_out[0]~reg0.DB_MAX_OUTPUT_PORT_TYPE
5849
green_out[1] <= green_out[1]~reg0.DB_MAX_OUTPUT_PORT_TYPE
5850
green_out[2] <= green_out[2]~reg0.DB_MAX_OUTPUT_PORT_TYPE
5851
green_out[3] <= green_out[3]~reg0.DB_MAX_OUTPUT_PORT_TYPE
5852
blue_out[0] <= blue_out[0]~reg0.DB_MAX_OUTPUT_PORT_TYPE
5853
blue_out[1] <= blue_out[1]~reg0.DB_MAX_OUTPUT_PORT_TYPE
5854
blue_out[2] <= blue_out[2]~reg0.DB_MAX_OUTPUT_PORT_TYPE
5855
blue_out[3] <= blue_out[3]~reg0.DB_MAX_OUTPUT_PORT_TYPE
5856
horiz_sync_out <= horiz_sync_out~reg0.DB_MAX_OUTPUT_PORT_TYPE
5857
vert_sync_out <= vert_sync_out~reg0.DB_MAX_OUTPUT_PORT_TYPE
5858
video_on <= video_on_int.DB_MAX_OUTPUT_PORT_TYPE
5859
pixel_clock <= clock_25Mhz.DB_MAX_OUTPUT_PORT_TYPE
5860
pixel_row[0] <= pixel_row[0]~reg0.DB_MAX_OUTPUT_PORT_TYPE
5861
pixel_row[1] <= pixel_row[1]~reg0.DB_MAX_OUTPUT_PORT_TYPE
5862
pixel_row[2] <= pixel_row[2]~reg0.DB_MAX_OUTPUT_PORT_TYPE
5863
pixel_row[3] <= pixel_row[3]~reg0.DB_MAX_OUTPUT_PORT_TYPE
5864
pixel_row[4] <= pixel_row[4]~reg0.DB_MAX_OUTPUT_PORT_TYPE
5865
pixel_row[5] <= pixel_row[5]~reg0.DB_MAX_OUTPUT_PORT_TYPE
5866
pixel_row[6] <= pixel_row[6]~reg0.DB_MAX_OUTPUT_PORT_TYPE
5867
pixel_row[7] <= pixel_row[7]~reg0.DB_MAX_OUTPUT_PORT_TYPE
5868
pixel_row[8] <= pixel_row[8]~reg0.DB_MAX_OUTPUT_PORT_TYPE
5869
pixel_row[9] <= pixel_row[9]~reg0.DB_MAX_OUTPUT_PORT_TYPE
5870
pixel_column[0] <= pixel_column[0]~reg0.DB_MAX_OUTPUT_PORT_TYPE
5871
pixel_column[1] <= pixel_column[1]~reg0.DB_MAX_OUTPUT_PORT_TYPE
5872
pixel_column[2] <= pixel_column[2]~reg0.DB_MAX_OUTPUT_PORT_TYPE
5873
pixel_column[3] <= pixel_column[3]~reg0.DB_MAX_OUTPUT_PORT_TYPE
5874
pixel_column[4] <= pixel_column[4]~reg0.DB_MAX_OUTPUT_PORT_TYPE
5875
pixel_column[5] <= pixel_column[5]~reg0.DB_MAX_OUTPUT_PORT_TYPE
5876
pixel_column[6] <= pixel_column[6]~reg0.DB_MAX_OUTPUT_PORT_TYPE
5877
pixel_column[7] <= pixel_column[7]~reg0.DB_MAX_OUTPUT_PORT_TYPE
5878
pixel_column[8] <= pixel_column[8]~reg0.DB_MAX_OUTPUT_PORT_TYPE
5879
pixel_column[9] <= pixel_column[9]~reg0.DB_MAX_OUTPUT_PORT_TYPE
5880
 
5881
 
5882
|Z80SOC|vram:vram_inst
5883
data[0] => altsyncram:altsyncram_component.data_a[0]
5884
data[1] => altsyncram:altsyncram_component.data_a[1]
5885
data[2] => altsyncram:altsyncram_component.data_a[2]
5886
data[3] => altsyncram:altsyncram_component.data_a[3]
5887
data[4] => altsyncram:altsyncram_component.data_a[4]
5888
data[5] => altsyncram:altsyncram_component.data_a[5]
5889
data[6] => altsyncram:altsyncram_component.data_a[6]
5890
data[7] => altsyncram:altsyncram_component.data_a[7]
5891
rdaddress[0] => altsyncram:altsyncram_component.address_b[0]
5892
rdaddress[1] => altsyncram:altsyncram_component.address_b[1]
5893
rdaddress[2] => altsyncram:altsyncram_component.address_b[2]
5894
rdaddress[3] => altsyncram:altsyncram_component.address_b[3]
5895
rdaddress[4] => altsyncram:altsyncram_component.address_b[4]
5896
rdaddress[5] => altsyncram:altsyncram_component.address_b[5]
5897
rdaddress[6] => altsyncram:altsyncram_component.address_b[6]
5898
rdaddress[7] => altsyncram:altsyncram_component.address_b[7]
5899
rdaddress[8] => altsyncram:altsyncram_component.address_b[8]
5900
rdaddress[9] => altsyncram:altsyncram_component.address_b[9]
5901
rdaddress[10] => altsyncram:altsyncram_component.address_b[10]
5902
rdaddress[11] => altsyncram:altsyncram_component.address_b[11]
5903
rdaddress[12] => altsyncram:altsyncram_component.address_b[12]
5904
rdclock => altsyncram:altsyncram_component.clock1
5905
wraddress[0] => altsyncram:altsyncram_component.address_a[0]
5906
wraddress[1] => altsyncram:altsyncram_component.address_a[1]
5907
wraddress[2] => altsyncram:altsyncram_component.address_a[2]
5908
wraddress[3] => altsyncram:altsyncram_component.address_a[3]
5909
wraddress[4] => altsyncram:altsyncram_component.address_a[4]
5910
wraddress[5] => altsyncram:altsyncram_component.address_a[5]
5911
wraddress[6] => altsyncram:altsyncram_component.address_a[6]
5912
wraddress[7] => altsyncram:altsyncram_component.address_a[7]
5913
wraddress[8] => altsyncram:altsyncram_component.address_a[8]
5914
wraddress[9] => altsyncram:altsyncram_component.address_a[9]
5915
wraddress[10] => altsyncram:altsyncram_component.address_a[10]
5916
wraddress[11] => altsyncram:altsyncram_component.address_a[11]
5917
wraddress[12] => altsyncram:altsyncram_component.address_a[12]
5918
wrclock => altsyncram:altsyncram_component.clock0
5919
wren => altsyncram:altsyncram_component.wren_a
5920
q[0] <= altsyncram:altsyncram_component.q_b[0]
5921
q[1] <= altsyncram:altsyncram_component.q_b[1]
5922
q[2] <= altsyncram:altsyncram_component.q_b[2]
5923
q[3] <= altsyncram:altsyncram_component.q_b[3]
5924
q[4] <= altsyncram:altsyncram_component.q_b[4]
5925
q[5] <= altsyncram:altsyncram_component.q_b[5]
5926
q[6] <= altsyncram:altsyncram_component.q_b[6]
5927
q[7] <= altsyncram:altsyncram_component.q_b[7]
5928
 
5929
 
5930
|Z80SOC|vram:vram_inst|altsyncram:altsyncram_component
5931
wren_a => altsyncram_oal1:auto_generated.wren_a
5932
rden_a => ~NO_FANOUT~
5933
wren_b => ~NO_FANOUT~
5934
rden_b => ~NO_FANOUT~
5935
data_a[0] => altsyncram_oal1:auto_generated.data_a[0]
5936
data_a[1] => altsyncram_oal1:auto_generated.data_a[1]
5937
data_a[2] => altsyncram_oal1:auto_generated.data_a[2]
5938
data_a[3] => altsyncram_oal1:auto_generated.data_a[3]
5939
data_a[4] => altsyncram_oal1:auto_generated.data_a[4]
5940
data_a[5] => altsyncram_oal1:auto_generated.data_a[5]
5941
data_a[6] => altsyncram_oal1:auto_generated.data_a[6]
5942
data_a[7] => altsyncram_oal1:auto_generated.data_a[7]
5943
data_b[0] => ~NO_FANOUT~
5944
data_b[1] => ~NO_FANOUT~
5945
data_b[2] => ~NO_FANOUT~
5946
data_b[3] => ~NO_FANOUT~
5947
data_b[4] => ~NO_FANOUT~
5948
data_b[5] => ~NO_FANOUT~
5949
data_b[6] => ~NO_FANOUT~
5950
data_b[7] => ~NO_FANOUT~
5951
address_a[0] => altsyncram_oal1:auto_generated.address_a[0]
5952
address_a[1] => altsyncram_oal1:auto_generated.address_a[1]
5953
address_a[2] => altsyncram_oal1:auto_generated.address_a[2]
5954
address_a[3] => altsyncram_oal1:auto_generated.address_a[3]
5955
address_a[4] => altsyncram_oal1:auto_generated.address_a[4]
5956
address_a[5] => altsyncram_oal1:auto_generated.address_a[5]
5957
address_a[6] => altsyncram_oal1:auto_generated.address_a[6]
5958
address_a[7] => altsyncram_oal1:auto_generated.address_a[7]
5959
address_a[8] => altsyncram_oal1:auto_generated.address_a[8]
5960
address_a[9] => altsyncram_oal1:auto_generated.address_a[9]
5961
address_a[10] => altsyncram_oal1:auto_generated.address_a[10]
5962
address_a[11] => altsyncram_oal1:auto_generated.address_a[11]
5963
address_a[12] => altsyncram_oal1:auto_generated.address_a[12]
5964
address_b[0] => altsyncram_oal1:auto_generated.address_b[0]
5965
address_b[1] => altsyncram_oal1:auto_generated.address_b[1]
5966
address_b[2] => altsyncram_oal1:auto_generated.address_b[2]
5967
address_b[3] => altsyncram_oal1:auto_generated.address_b[3]
5968
address_b[4] => altsyncram_oal1:auto_generated.address_b[4]
5969
address_b[5] => altsyncram_oal1:auto_generated.address_b[5]
5970
address_b[6] => altsyncram_oal1:auto_generated.address_b[6]
5971
address_b[7] => altsyncram_oal1:auto_generated.address_b[7]
5972
address_b[8] => altsyncram_oal1:auto_generated.address_b[8]
5973
address_b[9] => altsyncram_oal1:auto_generated.address_b[9]
5974
address_b[10] => altsyncram_oal1:auto_generated.address_b[10]
5975
address_b[11] => altsyncram_oal1:auto_generated.address_b[11]
5976
address_b[12] => altsyncram_oal1:auto_generated.address_b[12]
5977
addressstall_a => ~NO_FANOUT~
5978
addressstall_b => ~NO_FANOUT~
5979
clock0 => altsyncram_oal1:auto_generated.clock0
5980
clock1 => altsyncram_oal1:auto_generated.clock1
5981
clocken0 => ~NO_FANOUT~
5982
clocken1 => ~NO_FANOUT~
5983
clocken2 => ~NO_FANOUT~
5984
clocken3 => ~NO_FANOUT~
5985
aclr0 => ~NO_FANOUT~
5986
aclr1 => ~NO_FANOUT~
5987
byteena_a[0] => ~NO_FANOUT~
5988
byteena_b[0] => ~NO_FANOUT~
5989
q_a[0] <= 
5990
q_a[1] <= 
5991
q_a[2] <= 
5992
q_a[3] <= 
5993
q_a[4] <= 
5994
q_a[5] <= 
5995
q_a[6] <= 
5996
q_a[7] <= 
5997
q_b[0] <= altsyncram_oal1:auto_generated.q_b[0]
5998
q_b[1] <= altsyncram_oal1:auto_generated.q_b[1]
5999
q_b[2] <= altsyncram_oal1:auto_generated.q_b[2]
6000
q_b[3] <= altsyncram_oal1:auto_generated.q_b[3]
6001
q_b[4] <= altsyncram_oal1:auto_generated.q_b[4]
6002
q_b[5] <= altsyncram_oal1:auto_generated.q_b[5]
6003
q_b[6] <= altsyncram_oal1:auto_generated.q_b[6]
6004
q_b[7] <= altsyncram_oal1:auto_generated.q_b[7]
6005
eccstatus[0] <= 
6006
eccstatus[1] <= 
6007
eccstatus[2] <= 
6008
 
6009
 
6010
|Z80SOC|vram:vram_inst|altsyncram:altsyncram_component|altsyncram_oal1:auto_generated
6011
address_a[0] => ram_block1a0.PORTAADDR
6012
address_a[0] => ram_block1a1.PORTAADDR
6013
address_a[0] => ram_block1a2.PORTAADDR
6014
address_a[0] => ram_block1a3.PORTAADDR
6015
address_a[0] => ram_block1a4.PORTAADDR
6016
address_a[0] => ram_block1a5.PORTAADDR
6017
address_a[0] => ram_block1a6.PORTAADDR
6018
address_a[0] => ram_block1a7.PORTAADDR
6019
address_a[1] => ram_block1a0.PORTAADDR1
6020
address_a[1] => ram_block1a1.PORTAADDR1
6021
address_a[1] => ram_block1a2.PORTAADDR1
6022
address_a[1] => ram_block1a3.PORTAADDR1
6023
address_a[1] => ram_block1a4.PORTAADDR1
6024
address_a[1] => ram_block1a5.PORTAADDR1
6025
address_a[1] => ram_block1a6.PORTAADDR1
6026
address_a[1] => ram_block1a7.PORTAADDR1
6027
address_a[2] => ram_block1a0.PORTAADDR2
6028
address_a[2] => ram_block1a1.PORTAADDR2
6029
address_a[2] => ram_block1a2.PORTAADDR2
6030
address_a[2] => ram_block1a3.PORTAADDR2
6031
address_a[2] => ram_block1a4.PORTAADDR2
6032
address_a[2] => ram_block1a5.PORTAADDR2
6033
address_a[2] => ram_block1a6.PORTAADDR2
6034
address_a[2] => ram_block1a7.PORTAADDR2
6035
address_a[3] => ram_block1a0.PORTAADDR3
6036
address_a[3] => ram_block1a1.PORTAADDR3
6037
address_a[3] => ram_block1a2.PORTAADDR3
6038
address_a[3] => ram_block1a3.PORTAADDR3
6039
address_a[3] => ram_block1a4.PORTAADDR3
6040
address_a[3] => ram_block1a5.PORTAADDR3
6041
address_a[3] => ram_block1a6.PORTAADDR3
6042
address_a[3] => ram_block1a7.PORTAADDR3
6043
address_a[4] => ram_block1a0.PORTAADDR4
6044
address_a[4] => ram_block1a1.PORTAADDR4
6045
address_a[4] => ram_block1a2.PORTAADDR4
6046
address_a[4] => ram_block1a3.PORTAADDR4
6047
address_a[4] => ram_block1a4.PORTAADDR4
6048
address_a[4] => ram_block1a5.PORTAADDR4
6049
address_a[4] => ram_block1a6.PORTAADDR4
6050
address_a[4] => ram_block1a7.PORTAADDR4
6051
address_a[5] => ram_block1a0.PORTAADDR5
6052
address_a[5] => ram_block1a1.PORTAADDR5
6053
address_a[5] => ram_block1a2.PORTAADDR5
6054
address_a[5] => ram_block1a3.PORTAADDR5
6055
address_a[5] => ram_block1a4.PORTAADDR5
6056
address_a[5] => ram_block1a5.PORTAADDR5
6057
address_a[5] => ram_block1a6.PORTAADDR5
6058
address_a[5] => ram_block1a7.PORTAADDR5
6059
address_a[6] => ram_block1a0.PORTAADDR6
6060
address_a[6] => ram_block1a1.PORTAADDR6
6061
address_a[6] => ram_block1a2.PORTAADDR6
6062
address_a[6] => ram_block1a3.PORTAADDR6
6063
address_a[6] => ram_block1a4.PORTAADDR6
6064
address_a[6] => ram_block1a5.PORTAADDR6
6065
address_a[6] => ram_block1a6.PORTAADDR6
6066
address_a[6] => ram_block1a7.PORTAADDR6
6067
address_a[7] => ram_block1a0.PORTAADDR7
6068
address_a[7] => ram_block1a1.PORTAADDR7
6069
address_a[7] => ram_block1a2.PORTAADDR7
6070
address_a[7] => ram_block1a3.PORTAADDR7
6071
address_a[7] => ram_block1a4.PORTAADDR7
6072
address_a[7] => ram_block1a5.PORTAADDR7
6073
address_a[7] => ram_block1a6.PORTAADDR7
6074
address_a[7] => ram_block1a7.PORTAADDR7
6075
address_a[8] => ram_block1a0.PORTAADDR8
6076
address_a[8] => ram_block1a1.PORTAADDR8
6077
address_a[8] => ram_block1a2.PORTAADDR8
6078
address_a[8] => ram_block1a3.PORTAADDR8
6079
address_a[8] => ram_block1a4.PORTAADDR8
6080
address_a[8] => ram_block1a5.PORTAADDR8
6081
address_a[8] => ram_block1a6.PORTAADDR8
6082
address_a[8] => ram_block1a7.PORTAADDR8
6083
address_a[9] => ram_block1a0.PORTAADDR9
6084
address_a[9] => ram_block1a1.PORTAADDR9
6085
address_a[9] => ram_block1a2.PORTAADDR9
6086
address_a[9] => ram_block1a3.PORTAADDR9
6087
address_a[9] => ram_block1a4.PORTAADDR9
6088
address_a[9] => ram_block1a5.PORTAADDR9
6089
address_a[9] => ram_block1a6.PORTAADDR9
6090
address_a[9] => ram_block1a7.PORTAADDR9
6091
address_a[10] => ram_block1a0.PORTAADDR10
6092
address_a[10] => ram_block1a1.PORTAADDR10
6093
address_a[10] => ram_block1a2.PORTAADDR10
6094
address_a[10] => ram_block1a3.PORTAADDR10
6095
address_a[10] => ram_block1a4.PORTAADDR10
6096
address_a[10] => ram_block1a5.PORTAADDR10
6097
address_a[10] => ram_block1a6.PORTAADDR10
6098
address_a[10] => ram_block1a7.PORTAADDR10
6099
address_a[11] => ram_block1a0.PORTAADDR11
6100
address_a[11] => ram_block1a1.PORTAADDR11
6101
address_a[11] => ram_block1a2.PORTAADDR11
6102
address_a[11] => ram_block1a3.PORTAADDR11
6103
address_a[11] => ram_block1a4.PORTAADDR11
6104
address_a[11] => ram_block1a5.PORTAADDR11
6105
address_a[11] => ram_block1a6.PORTAADDR11
6106
address_a[11] => ram_block1a7.PORTAADDR11
6107
address_a[12] => ram_block1a0.PORTAADDR12
6108
address_a[12] => ram_block1a1.PORTAADDR12
6109
address_a[12] => ram_block1a2.PORTAADDR12
6110
address_a[12] => ram_block1a3.PORTAADDR12
6111
address_a[12] => ram_block1a4.PORTAADDR12
6112
address_a[12] => ram_block1a5.PORTAADDR12
6113
address_a[12] => ram_block1a6.PORTAADDR12
6114
address_a[12] => ram_block1a7.PORTAADDR12
6115
address_b[0] => ram_block1a0.PORTBADDR
6116
address_b[0] => ram_block1a1.PORTBADDR
6117
address_b[0] => ram_block1a2.PORTBADDR
6118
address_b[0] => ram_block1a3.PORTBADDR
6119
address_b[0] => ram_block1a4.PORTBADDR
6120
address_b[0] => ram_block1a5.PORTBADDR
6121
address_b[0] => ram_block1a6.PORTBADDR
6122
address_b[0] => ram_block1a7.PORTBADDR
6123
address_b[1] => ram_block1a0.PORTBADDR1
6124
address_b[1] => ram_block1a1.PORTBADDR1
6125
address_b[1] => ram_block1a2.PORTBADDR1
6126
address_b[1] => ram_block1a3.PORTBADDR1
6127
address_b[1] => ram_block1a4.PORTBADDR1
6128
address_b[1] => ram_block1a5.PORTBADDR1
6129
address_b[1] => ram_block1a6.PORTBADDR1
6130
address_b[1] => ram_block1a7.PORTBADDR1
6131
address_b[2] => ram_block1a0.PORTBADDR2
6132
address_b[2] => ram_block1a1.PORTBADDR2
6133
address_b[2] => ram_block1a2.PORTBADDR2
6134
address_b[2] => ram_block1a3.PORTBADDR2
6135
address_b[2] => ram_block1a4.PORTBADDR2
6136
address_b[2] => ram_block1a5.PORTBADDR2
6137
address_b[2] => ram_block1a6.PORTBADDR2
6138
address_b[2] => ram_block1a7.PORTBADDR2
6139
address_b[3] => ram_block1a0.PORTBADDR3
6140
address_b[3] => ram_block1a1.PORTBADDR3
6141
address_b[3] => ram_block1a2.PORTBADDR3
6142
address_b[3] => ram_block1a3.PORTBADDR3
6143
address_b[3] => ram_block1a4.PORTBADDR3
6144
address_b[3] => ram_block1a5.PORTBADDR3
6145
address_b[3] => ram_block1a6.PORTBADDR3
6146
address_b[3] => ram_block1a7.PORTBADDR3
6147
address_b[4] => ram_block1a0.PORTBADDR4
6148
address_b[4] => ram_block1a1.PORTBADDR4
6149
address_b[4] => ram_block1a2.PORTBADDR4
6150
address_b[4] => ram_block1a3.PORTBADDR4
6151
address_b[4] => ram_block1a4.PORTBADDR4
6152
address_b[4] => ram_block1a5.PORTBADDR4
6153
address_b[4] => ram_block1a6.PORTBADDR4
6154
address_b[4] => ram_block1a7.PORTBADDR4
6155
address_b[5] => ram_block1a0.PORTBADDR5
6156
address_b[5] => ram_block1a1.PORTBADDR5
6157
address_b[5] => ram_block1a2.PORTBADDR5
6158
address_b[5] => ram_block1a3.PORTBADDR5
6159
address_b[5] => ram_block1a4.PORTBADDR5
6160
address_b[5] => ram_block1a5.PORTBADDR5
6161
address_b[5] => ram_block1a6.PORTBADDR5
6162
address_b[5] => ram_block1a7.PORTBADDR5
6163
address_b[6] => ram_block1a0.PORTBADDR6
6164
address_b[6] => ram_block1a1.PORTBADDR6
6165
address_b[6] => ram_block1a2.PORTBADDR6
6166
address_b[6] => ram_block1a3.PORTBADDR6
6167
address_b[6] => ram_block1a4.PORTBADDR6
6168
address_b[6] => ram_block1a5.PORTBADDR6
6169
address_b[6] => ram_block1a6.PORTBADDR6
6170
address_b[6] => ram_block1a7.PORTBADDR6
6171
address_b[7] => ram_block1a0.PORTBADDR7
6172
address_b[7] => ram_block1a1.PORTBADDR7
6173
address_b[7] => ram_block1a2.PORTBADDR7
6174
address_b[7] => ram_block1a3.PORTBADDR7
6175
address_b[7] => ram_block1a4.PORTBADDR7
6176
address_b[7] => ram_block1a5.PORTBADDR7
6177
address_b[7] => ram_block1a6.PORTBADDR7
6178
address_b[7] => ram_block1a7.PORTBADDR7
6179
address_b[8] => ram_block1a0.PORTBADDR8
6180
address_b[8] => ram_block1a1.PORTBADDR8
6181
address_b[8] => ram_block1a2.PORTBADDR8
6182
address_b[8] => ram_block1a3.PORTBADDR8
6183
address_b[8] => ram_block1a4.PORTBADDR8
6184
address_b[8] => ram_block1a5.PORTBADDR8
6185
address_b[8] => ram_block1a6.PORTBADDR8
6186
address_b[8] => ram_block1a7.PORTBADDR8
6187
address_b[9] => ram_block1a0.PORTBADDR9
6188
address_b[9] => ram_block1a1.PORTBADDR9
6189
address_b[9] => ram_block1a2.PORTBADDR9
6190
address_b[9] => ram_block1a3.PORTBADDR9
6191
address_b[9] => ram_block1a4.PORTBADDR9
6192
address_b[9] => ram_block1a5.PORTBADDR9
6193
address_b[9] => ram_block1a6.PORTBADDR9
6194
address_b[9] => ram_block1a7.PORTBADDR9
6195
address_b[10] => ram_block1a0.PORTBADDR10
6196
address_b[10] => ram_block1a1.PORTBADDR10
6197
address_b[10] => ram_block1a2.PORTBADDR10
6198
address_b[10] => ram_block1a3.PORTBADDR10
6199
address_b[10] => ram_block1a4.PORTBADDR10
6200
address_b[10] => ram_block1a5.PORTBADDR10
6201
address_b[10] => ram_block1a6.PORTBADDR10
6202
address_b[10] => ram_block1a7.PORTBADDR10
6203
address_b[11] => ram_block1a0.PORTBADDR11
6204
address_b[11] => ram_block1a1.PORTBADDR11
6205
address_b[11] => ram_block1a2.PORTBADDR11
6206
address_b[11] => ram_block1a3.PORTBADDR11
6207
address_b[11] => ram_block1a4.PORTBADDR11
6208
address_b[11] => ram_block1a5.PORTBADDR11
6209
address_b[11] => ram_block1a6.PORTBADDR11
6210
address_b[11] => ram_block1a7.PORTBADDR11
6211
address_b[12] => ram_block1a0.PORTBADDR12
6212
address_b[12] => ram_block1a1.PORTBADDR12
6213
address_b[12] => ram_block1a2.PORTBADDR12
6214
address_b[12] => ram_block1a3.PORTBADDR12
6215
address_b[12] => ram_block1a4.PORTBADDR12
6216
address_b[12] => ram_block1a5.PORTBADDR12
6217
address_b[12] => ram_block1a6.PORTBADDR12
6218
address_b[12] => ram_block1a7.PORTBADDR12
6219
clock0 => ram_block1a0.CLK0
6220
clock0 => ram_block1a1.CLK0
6221
clock0 => ram_block1a2.CLK0
6222
clock0 => ram_block1a3.CLK0
6223
clock0 => ram_block1a4.CLK0
6224
clock0 => ram_block1a5.CLK0
6225
clock0 => ram_block1a6.CLK0
6226
clock0 => ram_block1a7.CLK0
6227
clock1 => ram_block1a0.CLK1
6228
clock1 => ram_block1a1.CLK1
6229
clock1 => ram_block1a2.CLK1
6230
clock1 => ram_block1a3.CLK1
6231
clock1 => ram_block1a4.CLK1
6232
clock1 => ram_block1a5.CLK1
6233
clock1 => ram_block1a6.CLK1
6234
clock1 => ram_block1a7.CLK1
6235
data_a[0] => ram_block1a0.PORTADATAIN
6236
data_a[1] => ram_block1a1.PORTADATAIN
6237
data_a[2] => ram_block1a2.PORTADATAIN
6238
data_a[3] => ram_block1a3.PORTADATAIN
6239
data_a[4] => ram_block1a4.PORTADATAIN
6240
data_a[5] => ram_block1a5.PORTADATAIN
6241
data_a[6] => ram_block1a6.PORTADATAIN
6242
data_a[7] => ram_block1a7.PORTADATAIN
6243
q_b[0] <= ram_block1a0.PORTBDATAOUT
6244
q_b[1] <= ram_block1a1.PORTBDATAOUT
6245
q_b[2] <= ram_block1a2.PORTBDATAOUT
6246
q_b[3] <= ram_block1a3.PORTBDATAOUT
6247
q_b[4] <= ram_block1a4.PORTBDATAOUT
6248
q_b[5] <= ram_block1a5.PORTBDATAOUT
6249
q_b[6] <= ram_block1a6.PORTBDATAOUT
6250
q_b[7] <= ram_block1a7.PORTBDATAOUT
6251
wren_a => ram_block1a0.PORTAWE
6252
wren_a => ram_block1a0.ENA0
6253
wren_a => ram_block1a1.PORTAWE
6254
wren_a => ram_block1a1.ENA0
6255
wren_a => ram_block1a2.PORTAWE
6256
wren_a => ram_block1a2.ENA0
6257
wren_a => ram_block1a3.PORTAWE
6258
wren_a => ram_block1a3.ENA0
6259
wren_a => ram_block1a4.PORTAWE
6260
wren_a => ram_block1a4.ENA0
6261
wren_a => ram_block1a5.PORTAWE
6262
wren_a => ram_block1a5.ENA0
6263
wren_a => ram_block1a6.PORTAWE
6264
wren_a => ram_block1a6.ENA0
6265
wren_a => ram_block1a7.PORTAWE
6266
wren_a => ram_block1a7.ENA0
6267
 
6268
 
6269
|Z80SOC|charram:cram
6270
data[0] => altsyncram:altsyncram_component.data_a[0]
6271
data[1] => altsyncram:altsyncram_component.data_a[1]
6272
data[2] => altsyncram:altsyncram_component.data_a[2]
6273
data[3] => altsyncram:altsyncram_component.data_a[3]
6274
data[4] => altsyncram:altsyncram_component.data_a[4]
6275
data[5] => altsyncram:altsyncram_component.data_a[5]
6276
data[6] => altsyncram:altsyncram_component.data_a[6]
6277
data[7] => altsyncram:altsyncram_component.data_a[7]
6278
rdaddress[0] => altsyncram:altsyncram_component.address_b[0]
6279
rdaddress[1] => altsyncram:altsyncram_component.address_b[1]
6280
rdaddress[2] => altsyncram:altsyncram_component.address_b[2]
6281
rdaddress[3] => altsyncram:altsyncram_component.address_b[3]
6282
rdaddress[4] => altsyncram:altsyncram_component.address_b[4]
6283
rdaddress[5] => altsyncram:altsyncram_component.address_b[5]
6284
rdaddress[6] => altsyncram:altsyncram_component.address_b[6]
6285
rdaddress[7] => altsyncram:altsyncram_component.address_b[7]
6286
rdaddress[8] => altsyncram:altsyncram_component.address_b[8]
6287
rdaddress[9] => altsyncram:altsyncram_component.address_b[9]
6288
rdaddress[10] => altsyncram:altsyncram_component.address_b[10]
6289
rdclock => altsyncram:altsyncram_component.clock1
6290
wraddress[0] => altsyncram:altsyncram_component.address_a[0]
6291
wraddress[1] => altsyncram:altsyncram_component.address_a[1]
6292
wraddress[2] => altsyncram:altsyncram_component.address_a[2]
6293
wraddress[3] => altsyncram:altsyncram_component.address_a[3]
6294
wraddress[4] => altsyncram:altsyncram_component.address_a[4]
6295
wraddress[5] => altsyncram:altsyncram_component.address_a[5]
6296
wraddress[6] => altsyncram:altsyncram_component.address_a[6]
6297
wraddress[7] => altsyncram:altsyncram_component.address_a[7]
6298
wraddress[8] => altsyncram:altsyncram_component.address_a[8]
6299
wraddress[9] => altsyncram:altsyncram_component.address_a[9]
6300
wraddress[10] => altsyncram:altsyncram_component.address_a[10]
6301
wrclock => altsyncram:altsyncram_component.clock0
6302
wren => altsyncram:altsyncram_component.wren_a
6303
q[0] <= altsyncram:altsyncram_component.q_b[0]
6304
q[1] <= altsyncram:altsyncram_component.q_b[1]
6305
q[2] <= altsyncram:altsyncram_component.q_b[2]
6306
q[3] <= altsyncram:altsyncram_component.q_b[3]
6307
q[4] <= altsyncram:altsyncram_component.q_b[4]
6308
q[5] <= altsyncram:altsyncram_component.q_b[5]
6309
q[6] <= altsyncram:altsyncram_component.q_b[6]
6310
q[7] <= altsyncram:altsyncram_component.q_b[7]
6311
 
6312
 
6313
|Z80SOC|charram:cram|altsyncram:altsyncram_component
6314
wren_a => altsyncram_l4o1:auto_generated.wren_a
6315
rden_a => ~NO_FANOUT~
6316
wren_b => ~NO_FANOUT~
6317
rden_b => ~NO_FANOUT~
6318
data_a[0] => altsyncram_l4o1:auto_generated.data_a[0]
6319
data_a[1] => altsyncram_l4o1:auto_generated.data_a[1]
6320
data_a[2] => altsyncram_l4o1:auto_generated.data_a[2]
6321
data_a[3] => altsyncram_l4o1:auto_generated.data_a[3]
6322
data_a[4] => altsyncram_l4o1:auto_generated.data_a[4]
6323
data_a[5] => altsyncram_l4o1:auto_generated.data_a[5]
6324
data_a[6] => altsyncram_l4o1:auto_generated.data_a[6]
6325
data_a[7] => altsyncram_l4o1:auto_generated.data_a[7]
6326
data_b[0] => ~NO_FANOUT~
6327
data_b[1] => ~NO_FANOUT~
6328
data_b[2] => ~NO_FANOUT~
6329
data_b[3] => ~NO_FANOUT~
6330
data_b[4] => ~NO_FANOUT~
6331
data_b[5] => ~NO_FANOUT~
6332
data_b[6] => ~NO_FANOUT~
6333
data_b[7] => ~NO_FANOUT~
6334
address_a[0] => altsyncram_l4o1:auto_generated.address_a[0]
6335
address_a[1] => altsyncram_l4o1:auto_generated.address_a[1]
6336
address_a[2] => altsyncram_l4o1:auto_generated.address_a[2]
6337
address_a[3] => altsyncram_l4o1:auto_generated.address_a[3]
6338
address_a[4] => altsyncram_l4o1:auto_generated.address_a[4]
6339
address_a[5] => altsyncram_l4o1:auto_generated.address_a[5]
6340
address_a[6] => altsyncram_l4o1:auto_generated.address_a[6]
6341
address_a[7] => altsyncram_l4o1:auto_generated.address_a[7]
6342
address_a[8] => altsyncram_l4o1:auto_generated.address_a[8]
6343
address_a[9] => altsyncram_l4o1:auto_generated.address_a[9]
6344
address_a[10] => altsyncram_l4o1:auto_generated.address_a[10]
6345
address_b[0] => altsyncram_l4o1:auto_generated.address_b[0]
6346
address_b[1] => altsyncram_l4o1:auto_generated.address_b[1]
6347
address_b[2] => altsyncram_l4o1:auto_generated.address_b[2]
6348
address_b[3] => altsyncram_l4o1:auto_generated.address_b[3]
6349
address_b[4] => altsyncram_l4o1:auto_generated.address_b[4]
6350
address_b[5] => altsyncram_l4o1:auto_generated.address_b[5]
6351
address_b[6] => altsyncram_l4o1:auto_generated.address_b[6]
6352
address_b[7] => altsyncram_l4o1:auto_generated.address_b[7]
6353
address_b[8] => altsyncram_l4o1:auto_generated.address_b[8]
6354
address_b[9] => altsyncram_l4o1:auto_generated.address_b[9]
6355
address_b[10] => altsyncram_l4o1:auto_generated.address_b[10]
6356
addressstall_a => ~NO_FANOUT~
6357
addressstall_b => ~NO_FANOUT~
6358
clock0 => altsyncram_l4o1:auto_generated.clock0
6359
clock1 => altsyncram_l4o1:auto_generated.clock1
6360
clocken0 => ~NO_FANOUT~
6361
clocken1 => ~NO_FANOUT~
6362
clocken2 => ~NO_FANOUT~
6363
clocken3 => ~NO_FANOUT~
6364
aclr0 => ~NO_FANOUT~
6365
aclr1 => ~NO_FANOUT~
6366
byteena_a[0] => ~NO_FANOUT~
6367
byteena_b[0] => ~NO_FANOUT~
6368
q_a[0] <= 
6369
q_a[1] <= 
6370
q_a[2] <= 
6371
q_a[3] <= 
6372
q_a[4] <= 
6373
q_a[5] <= 
6374
q_a[6] <= 
6375
q_a[7] <= 
6376
q_b[0] <= altsyncram_l4o1:auto_generated.q_b[0]
6377
q_b[1] <= altsyncram_l4o1:auto_generated.q_b[1]
6378
q_b[2] <= altsyncram_l4o1:auto_generated.q_b[2]
6379
q_b[3] <= altsyncram_l4o1:auto_generated.q_b[3]
6380
q_b[4] <= altsyncram_l4o1:auto_generated.q_b[4]
6381
q_b[5] <= altsyncram_l4o1:auto_generated.q_b[5]
6382
q_b[6] <= altsyncram_l4o1:auto_generated.q_b[6]
6383
q_b[7] <= altsyncram_l4o1:auto_generated.q_b[7]
6384
eccstatus[0] <= 
6385
eccstatus[1] <= 
6386
eccstatus[2] <= 
6387
 
6388
 
6389
|Z80SOC|charram:cram|altsyncram:altsyncram_component|altsyncram_l4o1:auto_generated
6390
address_a[0] => ram_block1a0.PORTAADDR
6391
address_a[0] => ram_block1a1.PORTAADDR
6392
address_a[0] => ram_block1a2.PORTAADDR
6393
address_a[0] => ram_block1a3.PORTAADDR
6394
address_a[0] => ram_block1a4.PORTAADDR
6395
address_a[0] => ram_block1a5.PORTAADDR
6396
address_a[0] => ram_block1a6.PORTAADDR
6397
address_a[0] => ram_block1a7.PORTAADDR
6398
address_a[1] => ram_block1a0.PORTAADDR1
6399
address_a[1] => ram_block1a1.PORTAADDR1
6400
address_a[1] => ram_block1a2.PORTAADDR1
6401
address_a[1] => ram_block1a3.PORTAADDR1
6402
address_a[1] => ram_block1a4.PORTAADDR1
6403
address_a[1] => ram_block1a5.PORTAADDR1
6404
address_a[1] => ram_block1a6.PORTAADDR1
6405
address_a[1] => ram_block1a7.PORTAADDR1
6406
address_a[2] => ram_block1a0.PORTAADDR2
6407
address_a[2] => ram_block1a1.PORTAADDR2
6408
address_a[2] => ram_block1a2.PORTAADDR2
6409
address_a[2] => ram_block1a3.PORTAADDR2
6410
address_a[2] => ram_block1a4.PORTAADDR2
6411
address_a[2] => ram_block1a5.PORTAADDR2
6412
address_a[2] => ram_block1a6.PORTAADDR2
6413
address_a[2] => ram_block1a7.PORTAADDR2
6414
address_a[3] => ram_block1a0.PORTAADDR3
6415
address_a[3] => ram_block1a1.PORTAADDR3
6416
address_a[3] => ram_block1a2.PORTAADDR3
6417
address_a[3] => ram_block1a3.PORTAADDR3
6418
address_a[3] => ram_block1a4.PORTAADDR3
6419
address_a[3] => ram_block1a5.PORTAADDR3
6420
address_a[3] => ram_block1a6.PORTAADDR3
6421
address_a[3] => ram_block1a7.PORTAADDR3
6422
address_a[4] => ram_block1a0.PORTAADDR4
6423
address_a[4] => ram_block1a1.PORTAADDR4
6424
address_a[4] => ram_block1a2.PORTAADDR4
6425
address_a[4] => ram_block1a3.PORTAADDR4
6426
address_a[4] => ram_block1a4.PORTAADDR4
6427
address_a[4] => ram_block1a5.PORTAADDR4
6428
address_a[4] => ram_block1a6.PORTAADDR4
6429
address_a[4] => ram_block1a7.PORTAADDR4
6430
address_a[5] => ram_block1a0.PORTAADDR5
6431
address_a[5] => ram_block1a1.PORTAADDR5
6432
address_a[5] => ram_block1a2.PORTAADDR5
6433
address_a[5] => ram_block1a3.PORTAADDR5
6434
address_a[5] => ram_block1a4.PORTAADDR5
6435
address_a[5] => ram_block1a5.PORTAADDR5
6436
address_a[5] => ram_block1a6.PORTAADDR5
6437
address_a[5] => ram_block1a7.PORTAADDR5
6438
address_a[6] => ram_block1a0.PORTAADDR6
6439
address_a[6] => ram_block1a1.PORTAADDR6
6440
address_a[6] => ram_block1a2.PORTAADDR6
6441
address_a[6] => ram_block1a3.PORTAADDR6
6442
address_a[6] => ram_block1a4.PORTAADDR6
6443
address_a[6] => ram_block1a5.PORTAADDR6
6444
address_a[6] => ram_block1a6.PORTAADDR6
6445
address_a[6] => ram_block1a7.PORTAADDR6
6446
address_a[7] => ram_block1a0.PORTAADDR7
6447
address_a[7] => ram_block1a1.PORTAADDR7
6448
address_a[7] => ram_block1a2.PORTAADDR7
6449
address_a[7] => ram_block1a3.PORTAADDR7
6450
address_a[7] => ram_block1a4.PORTAADDR7
6451
address_a[7] => ram_block1a5.PORTAADDR7
6452
address_a[7] => ram_block1a6.PORTAADDR7
6453
address_a[7] => ram_block1a7.PORTAADDR7
6454
address_a[8] => ram_block1a0.PORTAADDR8
6455
address_a[8] => ram_block1a1.PORTAADDR8
6456
address_a[8] => ram_block1a2.PORTAADDR8
6457
address_a[8] => ram_block1a3.PORTAADDR8
6458
address_a[8] => ram_block1a4.PORTAADDR8
6459
address_a[8] => ram_block1a5.PORTAADDR8
6460
address_a[8] => ram_block1a6.PORTAADDR8
6461
address_a[8] => ram_block1a7.PORTAADDR8
6462
address_a[9] => ram_block1a0.PORTAADDR9
6463
address_a[9] => ram_block1a1.PORTAADDR9
6464
address_a[9] => ram_block1a2.PORTAADDR9
6465
address_a[9] => ram_block1a3.PORTAADDR9
6466
address_a[9] => ram_block1a4.PORTAADDR9
6467
address_a[9] => ram_block1a5.PORTAADDR9
6468
address_a[9] => ram_block1a6.PORTAADDR9
6469
address_a[9] => ram_block1a7.PORTAADDR9
6470
address_a[10] => ram_block1a0.PORTAADDR10
6471
address_a[10] => ram_block1a1.PORTAADDR10
6472
address_a[10] => ram_block1a2.PORTAADDR10
6473
address_a[10] => ram_block1a3.PORTAADDR10
6474
address_a[10] => ram_block1a4.PORTAADDR10
6475
address_a[10] => ram_block1a5.PORTAADDR10
6476
address_a[10] => ram_block1a6.PORTAADDR10
6477
address_a[10] => ram_block1a7.PORTAADDR10
6478
address_b[0] => ram_block1a0.PORTBADDR
6479
address_b[0] => ram_block1a1.PORTBADDR
6480
address_b[0] => ram_block1a2.PORTBADDR
6481
address_b[0] => ram_block1a3.PORTBADDR
6482
address_b[0] => ram_block1a4.PORTBADDR
6483
address_b[0] => ram_block1a5.PORTBADDR
6484
address_b[0] => ram_block1a6.PORTBADDR
6485
address_b[0] => ram_block1a7.PORTBADDR
6486
address_b[1] => ram_block1a0.PORTBADDR1
6487
address_b[1] => ram_block1a1.PORTBADDR1
6488
address_b[1] => ram_block1a2.PORTBADDR1
6489
address_b[1] => ram_block1a3.PORTBADDR1
6490
address_b[1] => ram_block1a4.PORTBADDR1
6491
address_b[1] => ram_block1a5.PORTBADDR1
6492
address_b[1] => ram_block1a6.PORTBADDR1
6493
address_b[1] => ram_block1a7.PORTBADDR1
6494
address_b[2] => ram_block1a0.PORTBADDR2
6495
address_b[2] => ram_block1a1.PORTBADDR2
6496
address_b[2] => ram_block1a2.PORTBADDR2
6497
address_b[2] => ram_block1a3.PORTBADDR2
6498
address_b[2] => ram_block1a4.PORTBADDR2
6499
address_b[2] => ram_block1a5.PORTBADDR2
6500
address_b[2] => ram_block1a6.PORTBADDR2
6501
address_b[2] => ram_block1a7.PORTBADDR2
6502
address_b[3] => ram_block1a0.PORTBADDR3
6503
address_b[3] => ram_block1a1.PORTBADDR3
6504
address_b[3] => ram_block1a2.PORTBADDR3
6505
address_b[3] => ram_block1a3.PORTBADDR3
6506
address_b[3] => ram_block1a4.PORTBADDR3
6507
address_b[3] => ram_block1a5.PORTBADDR3
6508
address_b[3] => ram_block1a6.PORTBADDR3
6509
address_b[3] => ram_block1a7.PORTBADDR3
6510
address_b[4] => ram_block1a0.PORTBADDR4
6511
address_b[4] => ram_block1a1.PORTBADDR4
6512
address_b[4] => ram_block1a2.PORTBADDR4
6513
address_b[4] => ram_block1a3.PORTBADDR4
6514
address_b[4] => ram_block1a4.PORTBADDR4
6515
address_b[4] => ram_block1a5.PORTBADDR4
6516
address_b[4] => ram_block1a6.PORTBADDR4
6517
address_b[4] => ram_block1a7.PORTBADDR4
6518
address_b[5] => ram_block1a0.PORTBADDR5
6519
address_b[5] => ram_block1a1.PORTBADDR5
6520
address_b[5] => ram_block1a2.PORTBADDR5
6521
address_b[5] => ram_block1a3.PORTBADDR5
6522
address_b[5] => ram_block1a4.PORTBADDR5
6523
address_b[5] => ram_block1a5.PORTBADDR5
6524
address_b[5] => ram_block1a6.PORTBADDR5
6525
address_b[5] => ram_block1a7.PORTBADDR5
6526
address_b[6] => ram_block1a0.PORTBADDR6
6527
address_b[6] => ram_block1a1.PORTBADDR6
6528
address_b[6] => ram_block1a2.PORTBADDR6
6529
address_b[6] => ram_block1a3.PORTBADDR6
6530
address_b[6] => ram_block1a4.PORTBADDR6
6531
address_b[6] => ram_block1a5.PORTBADDR6
6532
address_b[6] => ram_block1a6.PORTBADDR6
6533
address_b[6] => ram_block1a7.PORTBADDR6
6534
address_b[7] => ram_block1a0.PORTBADDR7
6535
address_b[7] => ram_block1a1.PORTBADDR7
6536
address_b[7] => ram_block1a2.PORTBADDR7
6537
address_b[7] => ram_block1a3.PORTBADDR7
6538
address_b[7] => ram_block1a4.PORTBADDR7
6539
address_b[7] => ram_block1a5.PORTBADDR7
6540
address_b[7] => ram_block1a6.PORTBADDR7
6541
address_b[7] => ram_block1a7.PORTBADDR7
6542
address_b[8] => ram_block1a0.PORTBADDR8
6543
address_b[8] => ram_block1a1.PORTBADDR8
6544
address_b[8] => ram_block1a2.PORTBADDR8
6545
address_b[8] => ram_block1a3.PORTBADDR8
6546
address_b[8] => ram_block1a4.PORTBADDR8
6547
address_b[8] => ram_block1a5.PORTBADDR8
6548
address_b[8] => ram_block1a6.PORTBADDR8
6549
address_b[8] => ram_block1a7.PORTBADDR8
6550
address_b[9] => ram_block1a0.PORTBADDR9
6551
address_b[9] => ram_block1a1.PORTBADDR9
6552
address_b[9] => ram_block1a2.PORTBADDR9
6553
address_b[9] => ram_block1a3.PORTBADDR9
6554
address_b[9] => ram_block1a4.PORTBADDR9
6555
address_b[9] => ram_block1a5.PORTBADDR9
6556
address_b[9] => ram_block1a6.PORTBADDR9
6557
address_b[9] => ram_block1a7.PORTBADDR9
6558
address_b[10] => ram_block1a0.PORTBADDR10
6559
address_b[10] => ram_block1a1.PORTBADDR10
6560
address_b[10] => ram_block1a2.PORTBADDR10
6561
address_b[10] => ram_block1a3.PORTBADDR10
6562
address_b[10] => ram_block1a4.PORTBADDR10
6563
address_b[10] => ram_block1a5.PORTBADDR10
6564
address_b[10] => ram_block1a6.PORTBADDR10
6565
address_b[10] => ram_block1a7.PORTBADDR10
6566
clock0 => ram_block1a0.CLK0
6567
clock0 => ram_block1a1.CLK0
6568
clock0 => ram_block1a2.CLK0
6569
clock0 => ram_block1a3.CLK0
6570
clock0 => ram_block1a4.CLK0
6571
clock0 => ram_block1a5.CLK0
6572
clock0 => ram_block1a6.CLK0
6573
clock0 => ram_block1a7.CLK0
6574
clock1 => ram_block1a0.CLK1
6575
clock1 => ram_block1a1.CLK1
6576
clock1 => ram_block1a2.CLK1
6577
clock1 => ram_block1a3.CLK1
6578
clock1 => ram_block1a4.CLK1
6579
clock1 => ram_block1a5.CLK1
6580
clock1 => ram_block1a6.CLK1
6581
clock1 => ram_block1a7.CLK1
6582
data_a[0] => ram_block1a0.PORTADATAIN
6583
data_a[1] => ram_block1a1.PORTADATAIN
6584
data_a[2] => ram_block1a2.PORTADATAIN
6585
data_a[3] => ram_block1a3.PORTADATAIN
6586
data_a[4] => ram_block1a4.PORTADATAIN
6587
data_a[5] => ram_block1a5.PORTADATAIN
6588
data_a[6] => ram_block1a6.PORTADATAIN
6589
data_a[7] => ram_block1a7.PORTADATAIN
6590
q_b[0] <= ram_block1a0.PORTBDATAOUT
6591
q_b[1] <= ram_block1a1.PORTBDATAOUT
6592
q_b[2] <= ram_block1a2.PORTBDATAOUT
6593
q_b[3] <= ram_block1a3.PORTBDATAOUT
6594
q_b[4] <= ram_block1a4.PORTBDATAOUT
6595
q_b[5] <= ram_block1a5.PORTBDATAOUT
6596
q_b[6] <= ram_block1a6.PORTBDATAOUT
6597
q_b[7] <= ram_block1a7.PORTBDATAOUT
6598
wren_a => ram_block1a0.PORTAWE
6599
wren_a => ram_block1a0.ENA0
6600
wren_a => ram_block1a1.PORTAWE
6601
wren_a => ram_block1a1.ENA0
6602
wren_a => ram_block1a2.PORTAWE
6603
wren_a => ram_block1a2.ENA0
6604
wren_a => ram_block1a3.PORTAWE
6605
wren_a => ram_block1a3.ENA0
6606
wren_a => ram_block1a4.PORTAWE
6607
wren_a => ram_block1a4.ENA0
6608
wren_a => ram_block1a5.PORTAWE
6609
wren_a => ram_block1a5.ENA0
6610
wren_a => ram_block1a6.PORTAWE
6611
wren_a => ram_block1a6.ENA0
6612
wren_a => ram_block1a7.PORTAWE
6613
wren_a => ram_block1a7.ENA0
6614
 
6615
 
6616
|Z80SOC|rom:rom_inst
6617
address[0] => altsyncram:altsyncram_component.address_a[0]
6618
address[1] => altsyncram:altsyncram_component.address_a[1]
6619
address[2] => altsyncram:altsyncram_component.address_a[2]
6620
address[3] => altsyncram:altsyncram_component.address_a[3]
6621
address[4] => altsyncram:altsyncram_component.address_a[4]
6622
address[5] => altsyncram:altsyncram_component.address_a[5]
6623
address[6] => altsyncram:altsyncram_component.address_a[6]
6624
address[7] => altsyncram:altsyncram_component.address_a[7]
6625
address[8] => altsyncram:altsyncram_component.address_a[8]
6626
address[9] => altsyncram:altsyncram_component.address_a[9]
6627
address[10] => altsyncram:altsyncram_component.address_a[10]
6628
address[11] => altsyncram:altsyncram_component.address_a[11]
6629
address[12] => altsyncram:altsyncram_component.address_a[12]
6630
address[13] => altsyncram:altsyncram_component.address_a[13]
6631
clock => altsyncram:altsyncram_component.clock0
6632
q[0] <= altsyncram:altsyncram_component.q_a[0]
6633
q[1] <= altsyncram:altsyncram_component.q_a[1]
6634
q[2] <= altsyncram:altsyncram_component.q_a[2]
6635
q[3] <= altsyncram:altsyncram_component.q_a[3]
6636
q[4] <= altsyncram:altsyncram_component.q_a[4]
6637
q[5] <= altsyncram:altsyncram_component.q_a[5]
6638
q[6] <= altsyncram:altsyncram_component.q_a[6]
6639
q[7] <= altsyncram:altsyncram_component.q_a[7]
6640
 
6641
 
6642
|Z80SOC|rom:rom_inst|altsyncram:altsyncram_component
6643
wren_a => ~NO_FANOUT~
6644
rden_a => ~NO_FANOUT~
6645
wren_b => ~NO_FANOUT~
6646
rden_b => ~NO_FANOUT~
6647
data_a[0] => ~NO_FANOUT~
6648
data_a[1] => ~NO_FANOUT~
6649
data_a[2] => ~NO_FANOUT~
6650
data_a[3] => ~NO_FANOUT~
6651
data_a[4] => ~NO_FANOUT~
6652
data_a[5] => ~NO_FANOUT~
6653
data_a[6] => ~NO_FANOUT~
6654
data_a[7] => ~NO_FANOUT~
6655
data_b[0] => ~NO_FANOUT~
6656
address_a[0] => altsyncram_f0a1:auto_generated.address_a[0]
6657
address_a[1] => altsyncram_f0a1:auto_generated.address_a[1]
6658
address_a[2] => altsyncram_f0a1:auto_generated.address_a[2]
6659
address_a[3] => altsyncram_f0a1:auto_generated.address_a[3]
6660
address_a[4] => altsyncram_f0a1:auto_generated.address_a[4]
6661
address_a[5] => altsyncram_f0a1:auto_generated.address_a[5]
6662
address_a[6] => altsyncram_f0a1:auto_generated.address_a[6]
6663
address_a[7] => altsyncram_f0a1:auto_generated.address_a[7]
6664
address_a[8] => altsyncram_f0a1:auto_generated.address_a[8]
6665
address_a[9] => altsyncram_f0a1:auto_generated.address_a[9]
6666
address_a[10] => altsyncram_f0a1:auto_generated.address_a[10]
6667
address_a[11] => altsyncram_f0a1:auto_generated.address_a[11]
6668
address_a[12] => altsyncram_f0a1:auto_generated.address_a[12]
6669
address_a[13] => altsyncram_f0a1:auto_generated.address_a[13]
6670
address_b[0] => ~NO_FANOUT~
6671
addressstall_a => ~NO_FANOUT~
6672
addressstall_b => ~NO_FANOUT~
6673
clock0 => altsyncram_f0a1:auto_generated.clock0
6674
clock1 => ~NO_FANOUT~
6675
clocken0 => ~NO_FANOUT~
6676
clocken1 => ~NO_FANOUT~
6677
clocken2 => ~NO_FANOUT~
6678
clocken3 => ~NO_FANOUT~
6679
aclr0 => ~NO_FANOUT~
6680
aclr1 => ~NO_FANOUT~
6681
byteena_a[0] => ~NO_FANOUT~
6682
byteena_b[0] => ~NO_FANOUT~
6683
q_a[0] <= altsyncram_f0a1:auto_generated.q_a[0]
6684
q_a[1] <= altsyncram_f0a1:auto_generated.q_a[1]
6685
q_a[2] <= altsyncram_f0a1:auto_generated.q_a[2]
6686
q_a[3] <= altsyncram_f0a1:auto_generated.q_a[3]
6687
q_a[4] <= altsyncram_f0a1:auto_generated.q_a[4]
6688
q_a[5] <= altsyncram_f0a1:auto_generated.q_a[5]
6689
q_a[6] <= altsyncram_f0a1:auto_generated.q_a[6]
6690
q_a[7] <= altsyncram_f0a1:auto_generated.q_a[7]
6691
q_b[0] <= 
6692
eccstatus[0] <= 
6693
eccstatus[1] <= 
6694
eccstatus[2] <= 
6695
 
6696
 
6697
|Z80SOC|rom:rom_inst|altsyncram:altsyncram_component|altsyncram_f0a1:auto_generated
6698
address_a[0] => ram_block1a0.PORTAADDR
6699
address_a[0] => ram_block1a1.PORTAADDR
6700
address_a[0] => ram_block1a2.PORTAADDR
6701
address_a[0] => ram_block1a3.PORTAADDR
6702
address_a[0] => ram_block1a4.PORTAADDR
6703
address_a[0] => ram_block1a5.PORTAADDR
6704
address_a[0] => ram_block1a6.PORTAADDR
6705
address_a[0] => ram_block1a7.PORTAADDR
6706
address_a[0] => ram_block1a8.PORTAADDR
6707
address_a[0] => ram_block1a9.PORTAADDR
6708
address_a[0] => ram_block1a10.PORTAADDR
6709
address_a[0] => ram_block1a11.PORTAADDR
6710
address_a[0] => ram_block1a12.PORTAADDR
6711
address_a[0] => ram_block1a13.PORTAADDR
6712
address_a[0] => ram_block1a14.PORTAADDR
6713
address_a[0] => ram_block1a15.PORTAADDR
6714
address_a[1] => ram_block1a0.PORTAADDR1
6715
address_a[1] => ram_block1a1.PORTAADDR1
6716
address_a[1] => ram_block1a2.PORTAADDR1
6717
address_a[1] => ram_block1a3.PORTAADDR1
6718
address_a[1] => ram_block1a4.PORTAADDR1
6719
address_a[1] => ram_block1a5.PORTAADDR1
6720
address_a[1] => ram_block1a6.PORTAADDR1
6721
address_a[1] => ram_block1a7.PORTAADDR1
6722
address_a[1] => ram_block1a8.PORTAADDR1
6723
address_a[1] => ram_block1a9.PORTAADDR1
6724
address_a[1] => ram_block1a10.PORTAADDR1
6725
address_a[1] => ram_block1a11.PORTAADDR1
6726
address_a[1] => ram_block1a12.PORTAADDR1
6727
address_a[1] => ram_block1a13.PORTAADDR1
6728
address_a[1] => ram_block1a14.PORTAADDR1
6729
address_a[1] => ram_block1a15.PORTAADDR1
6730
address_a[2] => ram_block1a0.PORTAADDR2
6731
address_a[2] => ram_block1a1.PORTAADDR2
6732
address_a[2] => ram_block1a2.PORTAADDR2
6733
address_a[2] => ram_block1a3.PORTAADDR2
6734
address_a[2] => ram_block1a4.PORTAADDR2
6735
address_a[2] => ram_block1a5.PORTAADDR2
6736
address_a[2] => ram_block1a6.PORTAADDR2
6737
address_a[2] => ram_block1a7.PORTAADDR2
6738
address_a[2] => ram_block1a8.PORTAADDR2
6739
address_a[2] => ram_block1a9.PORTAADDR2
6740
address_a[2] => ram_block1a10.PORTAADDR2
6741
address_a[2] => ram_block1a11.PORTAADDR2
6742
address_a[2] => ram_block1a12.PORTAADDR2
6743
address_a[2] => ram_block1a13.PORTAADDR2
6744
address_a[2] => ram_block1a14.PORTAADDR2
6745
address_a[2] => ram_block1a15.PORTAADDR2
6746
address_a[3] => ram_block1a0.PORTAADDR3
6747
address_a[3] => ram_block1a1.PORTAADDR3
6748
address_a[3] => ram_block1a2.PORTAADDR3
6749
address_a[3] => ram_block1a3.PORTAADDR3
6750
address_a[3] => ram_block1a4.PORTAADDR3
6751
address_a[3] => ram_block1a5.PORTAADDR3
6752
address_a[3] => ram_block1a6.PORTAADDR3
6753
address_a[3] => ram_block1a7.PORTAADDR3
6754
address_a[3] => ram_block1a8.PORTAADDR3
6755
address_a[3] => ram_block1a9.PORTAADDR3
6756
address_a[3] => ram_block1a10.PORTAADDR3
6757
address_a[3] => ram_block1a11.PORTAADDR3
6758
address_a[3] => ram_block1a12.PORTAADDR3
6759
address_a[3] => ram_block1a13.PORTAADDR3
6760
address_a[3] => ram_block1a14.PORTAADDR3
6761
address_a[3] => ram_block1a15.PORTAADDR3
6762
address_a[4] => ram_block1a0.PORTAADDR4
6763
address_a[4] => ram_block1a1.PORTAADDR4
6764
address_a[4] => ram_block1a2.PORTAADDR4
6765
address_a[4] => ram_block1a3.PORTAADDR4
6766
address_a[4] => ram_block1a4.PORTAADDR4
6767
address_a[4] => ram_block1a5.PORTAADDR4
6768
address_a[4] => ram_block1a6.PORTAADDR4
6769
address_a[4] => ram_block1a7.PORTAADDR4
6770
address_a[4] => ram_block1a8.PORTAADDR4
6771
address_a[4] => ram_block1a9.PORTAADDR4
6772
address_a[4] => ram_block1a10.PORTAADDR4
6773
address_a[4] => ram_block1a11.PORTAADDR4
6774
address_a[4] => ram_block1a12.PORTAADDR4
6775
address_a[4] => ram_block1a13.PORTAADDR4
6776
address_a[4] => ram_block1a14.PORTAADDR4
6777
address_a[4] => ram_block1a15.PORTAADDR4
6778
address_a[5] => ram_block1a0.PORTAADDR5
6779
address_a[5] => ram_block1a1.PORTAADDR5
6780
address_a[5] => ram_block1a2.PORTAADDR5
6781
address_a[5] => ram_block1a3.PORTAADDR5
6782
address_a[5] => ram_block1a4.PORTAADDR5
6783
address_a[5] => ram_block1a5.PORTAADDR5
6784
address_a[5] => ram_block1a6.PORTAADDR5
6785
address_a[5] => ram_block1a7.PORTAADDR5
6786
address_a[5] => ram_block1a8.PORTAADDR5
6787
address_a[5] => ram_block1a9.PORTAADDR5
6788
address_a[5] => ram_block1a10.PORTAADDR5
6789
address_a[5] => ram_block1a11.PORTAADDR5
6790
address_a[5] => ram_block1a12.PORTAADDR5
6791
address_a[5] => ram_block1a13.PORTAADDR5
6792
address_a[5] => ram_block1a14.PORTAADDR5
6793
address_a[5] => ram_block1a15.PORTAADDR5
6794
address_a[6] => ram_block1a0.PORTAADDR6
6795
address_a[6] => ram_block1a1.PORTAADDR6
6796
address_a[6] => ram_block1a2.PORTAADDR6
6797
address_a[6] => ram_block1a3.PORTAADDR6
6798
address_a[6] => ram_block1a4.PORTAADDR6
6799
address_a[6] => ram_block1a5.PORTAADDR6
6800
address_a[6] => ram_block1a6.PORTAADDR6
6801
address_a[6] => ram_block1a7.PORTAADDR6
6802
address_a[6] => ram_block1a8.PORTAADDR6
6803
address_a[6] => ram_block1a9.PORTAADDR6
6804
address_a[6] => ram_block1a10.PORTAADDR6
6805
address_a[6] => ram_block1a11.PORTAADDR6
6806
address_a[6] => ram_block1a12.PORTAADDR6
6807
address_a[6] => ram_block1a13.PORTAADDR6
6808
address_a[6] => ram_block1a14.PORTAADDR6
6809
address_a[6] => ram_block1a15.PORTAADDR6
6810
address_a[7] => ram_block1a0.PORTAADDR7
6811
address_a[7] => ram_block1a1.PORTAADDR7
6812
address_a[7] => ram_block1a2.PORTAADDR7
6813
address_a[7] => ram_block1a3.PORTAADDR7
6814
address_a[7] => ram_block1a4.PORTAADDR7
6815
address_a[7] => ram_block1a5.PORTAADDR7
6816
address_a[7] => ram_block1a6.PORTAADDR7
6817
address_a[7] => ram_block1a7.PORTAADDR7
6818
address_a[7] => ram_block1a8.PORTAADDR7
6819
address_a[7] => ram_block1a9.PORTAADDR7
6820
address_a[7] => ram_block1a10.PORTAADDR7
6821
address_a[7] => ram_block1a11.PORTAADDR7
6822
address_a[7] => ram_block1a12.PORTAADDR7
6823
address_a[7] => ram_block1a13.PORTAADDR7
6824
address_a[7] => ram_block1a14.PORTAADDR7
6825
address_a[7] => ram_block1a15.PORTAADDR7
6826
address_a[8] => ram_block1a0.PORTAADDR8
6827
address_a[8] => ram_block1a1.PORTAADDR8
6828
address_a[8] => ram_block1a2.PORTAADDR8
6829
address_a[8] => ram_block1a3.PORTAADDR8
6830
address_a[8] => ram_block1a4.PORTAADDR8
6831
address_a[8] => ram_block1a5.PORTAADDR8
6832
address_a[8] => ram_block1a6.PORTAADDR8
6833
address_a[8] => ram_block1a7.PORTAADDR8
6834
address_a[8] => ram_block1a8.PORTAADDR8
6835
address_a[8] => ram_block1a9.PORTAADDR8
6836
address_a[8] => ram_block1a10.PORTAADDR8
6837
address_a[8] => ram_block1a11.PORTAADDR8
6838
address_a[8] => ram_block1a12.PORTAADDR8
6839
address_a[8] => ram_block1a13.PORTAADDR8
6840
address_a[8] => ram_block1a14.PORTAADDR8
6841
address_a[8] => ram_block1a15.PORTAADDR8
6842
address_a[9] => ram_block1a0.PORTAADDR9
6843
address_a[9] => ram_block1a1.PORTAADDR9
6844
address_a[9] => ram_block1a2.PORTAADDR9
6845
address_a[9] => ram_block1a3.PORTAADDR9
6846
address_a[9] => ram_block1a4.PORTAADDR9
6847
address_a[9] => ram_block1a5.PORTAADDR9
6848
address_a[9] => ram_block1a6.PORTAADDR9
6849
address_a[9] => ram_block1a7.PORTAADDR9
6850
address_a[9] => ram_block1a8.PORTAADDR9
6851
address_a[9] => ram_block1a9.PORTAADDR9
6852
address_a[9] => ram_block1a10.PORTAADDR9
6853
address_a[9] => ram_block1a11.PORTAADDR9
6854
address_a[9] => ram_block1a12.PORTAADDR9
6855
address_a[9] => ram_block1a13.PORTAADDR9
6856
address_a[9] => ram_block1a14.PORTAADDR9
6857
address_a[9] => ram_block1a15.PORTAADDR9
6858
address_a[10] => ram_block1a0.PORTAADDR10
6859
address_a[10] => ram_block1a1.PORTAADDR10
6860
address_a[10] => ram_block1a2.PORTAADDR10
6861
address_a[10] => ram_block1a3.PORTAADDR10
6862
address_a[10] => ram_block1a4.PORTAADDR10
6863
address_a[10] => ram_block1a5.PORTAADDR10
6864
address_a[10] => ram_block1a6.PORTAADDR10
6865
address_a[10] => ram_block1a7.PORTAADDR10
6866
address_a[10] => ram_block1a8.PORTAADDR10
6867
address_a[10] => ram_block1a9.PORTAADDR10
6868
address_a[10] => ram_block1a10.PORTAADDR10
6869
address_a[10] => ram_block1a11.PORTAADDR10
6870
address_a[10] => ram_block1a12.PORTAADDR10
6871
address_a[10] => ram_block1a13.PORTAADDR10
6872
address_a[10] => ram_block1a14.PORTAADDR10
6873
address_a[10] => ram_block1a15.PORTAADDR10
6874
address_a[11] => ram_block1a0.PORTAADDR11
6875
address_a[11] => ram_block1a1.PORTAADDR11
6876
address_a[11] => ram_block1a2.PORTAADDR11
6877
address_a[11] => ram_block1a3.PORTAADDR11
6878
address_a[11] => ram_block1a4.PORTAADDR11
6879
address_a[11] => ram_block1a5.PORTAADDR11
6880
address_a[11] => ram_block1a6.PORTAADDR11
6881
address_a[11] => ram_block1a7.PORTAADDR11
6882
address_a[11] => ram_block1a8.PORTAADDR11
6883
address_a[11] => ram_block1a9.PORTAADDR11
6884
address_a[11] => ram_block1a10.PORTAADDR11
6885
address_a[11] => ram_block1a11.PORTAADDR11
6886
address_a[11] => ram_block1a12.PORTAADDR11
6887
address_a[11] => ram_block1a13.PORTAADDR11
6888
address_a[11] => ram_block1a14.PORTAADDR11
6889
address_a[11] => ram_block1a15.PORTAADDR11
6890
address_a[12] => ram_block1a0.PORTAADDR12
6891
address_a[12] => ram_block1a1.PORTAADDR12
6892
address_a[12] => ram_block1a2.PORTAADDR12
6893
address_a[12] => ram_block1a3.PORTAADDR12
6894
address_a[12] => ram_block1a4.PORTAADDR12
6895
address_a[12] => ram_block1a5.PORTAADDR12
6896
address_a[12] => ram_block1a6.PORTAADDR12
6897
address_a[12] => ram_block1a7.PORTAADDR12
6898
address_a[12] => ram_block1a8.PORTAADDR12
6899
address_a[12] => ram_block1a9.PORTAADDR12
6900
address_a[12] => ram_block1a10.PORTAADDR12
6901
address_a[12] => ram_block1a11.PORTAADDR12
6902
address_a[12] => ram_block1a12.PORTAADDR12
6903
address_a[12] => ram_block1a13.PORTAADDR12
6904
address_a[12] => ram_block1a14.PORTAADDR12
6905
address_a[12] => ram_block1a15.PORTAADDR12
6906
address_a[13] => address_reg_a[0].DATAIN
6907
address_a[13] => decode_c8a:rden_decode.data[0]
6908
clock0 => ram_block1a0.CLK0
6909
clock0 => ram_block1a1.CLK0
6910
clock0 => ram_block1a2.CLK0
6911
clock0 => ram_block1a3.CLK0
6912
clock0 => ram_block1a4.CLK0
6913
clock0 => ram_block1a5.CLK0
6914
clock0 => ram_block1a6.CLK0
6915
clock0 => ram_block1a7.CLK0
6916
clock0 => ram_block1a8.CLK0
6917
clock0 => ram_block1a9.CLK0
6918
clock0 => ram_block1a10.CLK0
6919
clock0 => ram_block1a11.CLK0
6920
clock0 => ram_block1a12.CLK0
6921
clock0 => ram_block1a13.CLK0
6922
clock0 => ram_block1a14.CLK0
6923
clock0 => ram_block1a15.CLK0
6924
clock0 => address_reg_a[0].CLK
6925
clock0 => out_address_reg_a[0].CLK
6926
q_a[0] <= mux_3nb:mux2.result[0]
6927
q_a[1] <= mux_3nb:mux2.result[1]
6928
q_a[2] <= mux_3nb:mux2.result[2]
6929
q_a[3] <= mux_3nb:mux2.result[3]
6930
q_a[4] <= mux_3nb:mux2.result[4]
6931
q_a[5] <= mux_3nb:mux2.result[5]
6932
q_a[6] <= mux_3nb:mux2.result[6]
6933
q_a[7] <= mux_3nb:mux2.result[7]
6934
 
6935
 
6936
|Z80SOC|rom:rom_inst|altsyncram:altsyncram_component|altsyncram_f0a1:auto_generated|decode_c8a:rden_decode
6937
data[0] => eq_node[1].IN0
6938
data[0] => eq_node[0].IN0
6939
eq[0] <= eq_node[0].DB_MAX_OUTPUT_PORT_TYPE
6940
eq[1] <= eq_node[1].DB_MAX_OUTPUT_PORT_TYPE
6941
 
6942
 
6943
|Z80SOC|rom:rom_inst|altsyncram:altsyncram_component|altsyncram_f0a1:auto_generated|mux_3nb:mux2
6944
data[0] => result_node[0].IN1
6945
data[1] => result_node[1].IN1
6946
data[2] => result_node[2].IN1
6947
data[3] => result_node[3].IN1
6948
data[4] => result_node[4].IN1
6949
data[5] => result_node[5].IN1
6950
data[6] => result_node[6].IN1
6951
data[7] => result_node[7].IN1
6952
data[8] => result_node[0].IN1
6953
data[9] => result_node[1].IN1
6954
data[10] => result_node[2].IN1
6955
data[11] => result_node[3].IN1
6956
data[12] => result_node[4].IN1
6957
data[13] => result_node[5].IN1
6958
data[14] => result_node[6].IN1
6959
data[15] => result_node[7].IN1
6960
result[0] <= result_node[0].DB_MAX_OUTPUT_PORT_TYPE
6961
result[1] <= result_node[1].DB_MAX_OUTPUT_PORT_TYPE
6962
result[2] <= result_node[2].DB_MAX_OUTPUT_PORT_TYPE
6963
result[3] <= result_node[3].DB_MAX_OUTPUT_PORT_TYPE
6964
result[4] <= result_node[4].DB_MAX_OUTPUT_PORT_TYPE
6965
result[5] <= result_node[5].DB_MAX_OUTPUT_PORT_TYPE
6966
result[6] <= result_node[6].DB_MAX_OUTPUT_PORT_TYPE
6967
result[7] <= result_node[7].DB_MAX_OUTPUT_PORT_TYPE
6968
sel[0] => result_node[7].IN0
6969
sel[0] => _.IN0
6970
sel[0] => result_node[6].IN0
6971
sel[0] => _.IN0
6972
sel[0] => result_node[5].IN0
6973
sel[0] => _.IN0
6974
sel[0] => result_node[4].IN0
6975
sel[0] => _.IN0
6976
sel[0] => result_node[3].IN0
6977
sel[0] => _.IN0
6978
sel[0] => result_node[2].IN0
6979
sel[0] => _.IN0
6980
sel[0] => result_node[1].IN0
6981
sel[0] => _.IN0
6982
sel[0] => result_node[0].IN0
6983
sel[0] => _.IN0
6984
 
6985
 
6986
|Z80SOC|clk_div:clkdiv_inst
6987
clock_in_50Mhz => clock_357Mhz_int.CLK
6988
clock_in_50Mhz => count_357Mhz[0].CLK
6989
clock_in_50Mhz => count_357Mhz[1].CLK
6990
clock_in_50Mhz => count_357Mhz[2].CLK
6991
clock_in_50Mhz => count_357Mhz[3].CLK
6992
clock_in_50Mhz => clock_10Mhz_int.CLK
6993
clock_in_50Mhz => count_10Mhz[0].CLK
6994
clock_in_50Mhz => count_10Mhz[1].CLK
6995
clock_in_50Mhz => count_10Mhz[2].CLK
6996
clock_in_50Mhz => clock_1Hz~reg0.CLK
6997
clock_in_50Mhz => clock_10Hz~reg0.CLK
6998
clock_in_50Mhz => clock_100Hz~reg0.CLK
6999
clock_in_50Mhz => clock_1KHz~reg0.CLK
7000
clock_in_50Mhz => clock_10KHz~reg0.CLK
7001
clock_in_50Mhz => clock_100KHz~reg0.CLK
7002
clock_in_50Mhz => clock_1MHz~reg0.CLK
7003
clock_in_50Mhz => clock_357Mhz~reg0.CLK
7004
clock_in_50Mhz => clock_10MHz~reg0.CLK
7005
clock_in_50Mhz => clock_25MHz~reg0.CLK
7006
clock_in_50Mhz => clock_25Mhz_int.CLK
7007
clock_25MHz <= clock_25MHz~reg0.DB_MAX_OUTPUT_PORT_TYPE
7008
clock_10MHz <= clock_10MHz~reg0.DB_MAX_OUTPUT_PORT_TYPE
7009
clock_357Mhz <= clock_357Mhz~reg0.DB_MAX_OUTPUT_PORT_TYPE
7010
clock_1MHz <= clock_1MHz~reg0.DB_MAX_OUTPUT_PORT_TYPE
7011
clock_100KHz <= clock_100KHz~reg0.DB_MAX_OUTPUT_PORT_TYPE
7012
clock_10KHz <= clock_10KHz~reg0.DB_MAX_OUTPUT_PORT_TYPE
7013
clock_1KHz <= clock_1KHz~reg0.DB_MAX_OUTPUT_PORT_TYPE
7014
clock_100Hz <= clock_100Hz~reg0.DB_MAX_OUTPUT_PORT_TYPE
7015
clock_10Hz <= clock_10Hz~reg0.DB_MAX_OUTPUT_PORT_TYPE
7016
clock_1Hz <= clock_1Hz~reg0.DB_MAX_OUTPUT_PORT_TYPE
7017
 
7018
 
7019
|Z80SOC|decoder_7seg:DISPHEX0
7020
NUMBER[0] => Mux0.IN19
7021
NUMBER[0] => Mux1.IN19
7022
NUMBER[0] => Mux2.IN19
7023
NUMBER[0] => Mux3.IN19
7024
NUMBER[0] => Mux4.IN19
7025
NUMBER[0] => Mux5.IN19
7026
NUMBER[0] => Mux6.IN19
7027
NUMBER[1] => Mux0.IN18
7028
NUMBER[1] => Mux1.IN18
7029
NUMBER[1] => Mux2.IN18
7030
NUMBER[1] => Mux3.IN18
7031
NUMBER[1] => Mux4.IN18
7032
NUMBER[1] => Mux5.IN18
7033
NUMBER[1] => Mux6.IN18
7034
NUMBER[2] => Mux0.IN17
7035
NUMBER[2] => Mux1.IN17
7036
NUMBER[2] => Mux2.IN17
7037
NUMBER[2] => Mux3.IN17
7038
NUMBER[2] => Mux4.IN17
7039
NUMBER[2] => Mux5.IN17
7040
NUMBER[2] => Mux6.IN17
7041
NUMBER[3] => Mux0.IN16
7042
NUMBER[3] => Mux1.IN16
7043
NUMBER[3] => Mux2.IN16
7044
NUMBER[3] => Mux3.IN16
7045
NUMBER[3] => Mux4.IN16
7046
NUMBER[3] => Mux5.IN16
7047
NUMBER[3] => Mux6.IN16
7048
HEX_DISP[0] <= Mux6.DB_MAX_OUTPUT_PORT_TYPE
7049
HEX_DISP[1] <= Mux5.DB_MAX_OUTPUT_PORT_TYPE
7050
HEX_DISP[2] <= Mux4.DB_MAX_OUTPUT_PORT_TYPE
7051
HEX_DISP[3] <= Mux3.DB_MAX_OUTPUT_PORT_TYPE
7052
HEX_DISP[4] <= Mux2.DB_MAX_OUTPUT_PORT_TYPE
7053
HEX_DISP[5] <= Mux1.DB_MAX_OUTPUT_PORT_TYPE
7054
HEX_DISP[6] <= Mux0.DB_MAX_OUTPUT_PORT_TYPE
7055
 
7056
 
7057
|Z80SOC|decoder_7seg:DISPHEX1
7058
NUMBER[0] => Mux0.IN19
7059
NUMBER[0] => Mux1.IN19
7060
NUMBER[0] => Mux2.IN19
7061
NUMBER[0] => Mux3.IN19
7062
NUMBER[0] => Mux4.IN19
7063
NUMBER[0] => Mux5.IN19
7064
NUMBER[0] => Mux6.IN19
7065
NUMBER[1] => Mux0.IN18
7066
NUMBER[1] => Mux1.IN18
7067
NUMBER[1] => Mux2.IN18
7068
NUMBER[1] => Mux3.IN18
7069
NUMBER[1] => Mux4.IN18
7070
NUMBER[1] => Mux5.IN18
7071
NUMBER[1] => Mux6.IN18
7072
NUMBER[2] => Mux0.IN17
7073
NUMBER[2] => Mux1.IN17
7074
NUMBER[2] => Mux2.IN17
7075
NUMBER[2] => Mux3.IN17
7076
NUMBER[2] => Mux4.IN17
7077
NUMBER[2] => Mux5.IN17
7078
NUMBER[2] => Mux6.IN17
7079
NUMBER[3] => Mux0.IN16
7080
NUMBER[3] => Mux1.IN16
7081
NUMBER[3] => Mux2.IN16
7082
NUMBER[3] => Mux3.IN16
7083
NUMBER[3] => Mux4.IN16
7084
NUMBER[3] => Mux5.IN16
7085
NUMBER[3] => Mux6.IN16
7086
HEX_DISP[0] <= Mux6.DB_MAX_OUTPUT_PORT_TYPE
7087
HEX_DISP[1] <= Mux5.DB_MAX_OUTPUT_PORT_TYPE
7088
HEX_DISP[2] <= Mux4.DB_MAX_OUTPUT_PORT_TYPE
7089
HEX_DISP[3] <= Mux3.DB_MAX_OUTPUT_PORT_TYPE
7090
HEX_DISP[4] <= Mux2.DB_MAX_OUTPUT_PORT_TYPE
7091
HEX_DISP[5] <= Mux1.DB_MAX_OUTPUT_PORT_TYPE
7092
HEX_DISP[6] <= Mux0.DB_MAX_OUTPUT_PORT_TYPE
7093
 
7094
 
7095
|Z80SOC|decoder_7seg:DISPHEX2
7096
NUMBER[0] => Mux0.IN19
7097
NUMBER[0] => Mux1.IN19
7098
NUMBER[0] => Mux2.IN19
7099
NUMBER[0] => Mux3.IN19
7100
NUMBER[0] => Mux4.IN19
7101
NUMBER[0] => Mux5.IN19
7102
NUMBER[0] => Mux6.IN19
7103
NUMBER[1] => Mux0.IN18
7104
NUMBER[1] => Mux1.IN18
7105
NUMBER[1] => Mux2.IN18
7106
NUMBER[1] => Mux3.IN18
7107
NUMBER[1] => Mux4.IN18
7108
NUMBER[1] => Mux5.IN18
7109
NUMBER[1] => Mux6.IN18
7110
NUMBER[2] => Mux0.IN17
7111
NUMBER[2] => Mux1.IN17
7112
NUMBER[2] => Mux2.IN17
7113
NUMBER[2] => Mux3.IN17
7114
NUMBER[2] => Mux4.IN17
7115
NUMBER[2] => Mux5.IN17
7116
NUMBER[2] => Mux6.IN17
7117
NUMBER[3] => Mux0.IN16
7118
NUMBER[3] => Mux1.IN16
7119
NUMBER[3] => Mux2.IN16
7120
NUMBER[3] => Mux3.IN16
7121
NUMBER[3] => Mux4.IN16
7122
NUMBER[3] => Mux5.IN16
7123
NUMBER[3] => Mux6.IN16
7124
HEX_DISP[0] <= Mux6.DB_MAX_OUTPUT_PORT_TYPE
7125
HEX_DISP[1] <= Mux5.DB_MAX_OUTPUT_PORT_TYPE
7126
HEX_DISP[2] <= Mux4.DB_MAX_OUTPUT_PORT_TYPE
7127
HEX_DISP[3] <= Mux3.DB_MAX_OUTPUT_PORT_TYPE
7128
HEX_DISP[4] <= Mux2.DB_MAX_OUTPUT_PORT_TYPE
7129
HEX_DISP[5] <= Mux1.DB_MAX_OUTPUT_PORT_TYPE
7130
HEX_DISP[6] <= Mux0.DB_MAX_OUTPUT_PORT_TYPE
7131
 
7132
 
7133
|Z80SOC|decoder_7seg:DISPHEX3
7134
NUMBER[0] => Mux0.IN19
7135
NUMBER[0] => Mux1.IN19
7136
NUMBER[0] => Mux2.IN19
7137
NUMBER[0] => Mux3.IN19
7138
NUMBER[0] => Mux4.IN19
7139
NUMBER[0] => Mux5.IN19
7140
NUMBER[0] => Mux6.IN19
7141
NUMBER[1] => Mux0.IN18
7142
NUMBER[1] => Mux1.IN18
7143
NUMBER[1] => Mux2.IN18
7144
NUMBER[1] => Mux3.IN18
7145
NUMBER[1] => Mux4.IN18
7146
NUMBER[1] => Mux5.IN18
7147
NUMBER[1] => Mux6.IN18
7148
NUMBER[2] => Mux0.IN17
7149
NUMBER[2] => Mux1.IN17
7150
NUMBER[2] => Mux2.IN17
7151
NUMBER[2] => Mux3.IN17
7152
NUMBER[2] => Mux4.IN17
7153
NUMBER[2] => Mux5.IN17
7154
NUMBER[2] => Mux6.IN17
7155
NUMBER[3] => Mux0.IN16
7156
NUMBER[3] => Mux1.IN16
7157
NUMBER[3] => Mux2.IN16
7158
NUMBER[3] => Mux3.IN16
7159
NUMBER[3] => Mux4.IN16
7160
NUMBER[3] => Mux5.IN16
7161
NUMBER[3] => Mux6.IN16
7162
HEX_DISP[0] <= Mux6.DB_MAX_OUTPUT_PORT_TYPE
7163
HEX_DISP[1] <= Mux5.DB_MAX_OUTPUT_PORT_TYPE
7164
HEX_DISP[2] <= Mux4.DB_MAX_OUTPUT_PORT_TYPE
7165
HEX_DISP[3] <= Mux3.DB_MAX_OUTPUT_PORT_TYPE
7166
HEX_DISP[4] <= Mux2.DB_MAX_OUTPUT_PORT_TYPE
7167
HEX_DISP[5] <= Mux1.DB_MAX_OUTPUT_PORT_TYPE
7168
HEX_DISP[6] <= Mux0.DB_MAX_OUTPUT_PORT_TYPE
7169
 
7170
 
7171
|Z80SOC|decoder_7seg:DISPHEX4
7172
NUMBER[0] => Mux0.IN19
7173
NUMBER[0] => Mux1.IN19
7174
NUMBER[0] => Mux2.IN19
7175
NUMBER[0] => Mux3.IN19
7176
NUMBER[0] => Mux4.IN19
7177
NUMBER[0] => Mux5.IN19
7178
NUMBER[0] => Mux6.IN19
7179
NUMBER[1] => Mux0.IN18
7180
NUMBER[1] => Mux1.IN18
7181
NUMBER[1] => Mux2.IN18
7182
NUMBER[1] => Mux3.IN18
7183
NUMBER[1] => Mux4.IN18
7184
NUMBER[1] => Mux5.IN18
7185
NUMBER[1] => Mux6.IN18
7186
NUMBER[2] => Mux0.IN17
7187
NUMBER[2] => Mux1.IN17
7188
NUMBER[2] => Mux2.IN17
7189
NUMBER[2] => Mux3.IN17
7190
NUMBER[2] => Mux4.IN17
7191
NUMBER[2] => Mux5.IN17
7192
NUMBER[2] => Mux6.IN17
7193
NUMBER[3] => Mux0.IN16
7194
NUMBER[3] => Mux1.IN16
7195
NUMBER[3] => Mux2.IN16
7196
NUMBER[3] => Mux3.IN16
7197
NUMBER[3] => Mux4.IN16
7198
NUMBER[3] => Mux5.IN16
7199
NUMBER[3] => Mux6.IN16
7200
HEX_DISP[0] <= Mux6.DB_MAX_OUTPUT_PORT_TYPE
7201
HEX_DISP[1] <= Mux5.DB_MAX_OUTPUT_PORT_TYPE
7202
HEX_DISP[2] <= Mux4.DB_MAX_OUTPUT_PORT_TYPE
7203
HEX_DISP[3] <= Mux3.DB_MAX_OUTPUT_PORT_TYPE
7204
HEX_DISP[4] <= Mux2.DB_MAX_OUTPUT_PORT_TYPE
7205
HEX_DISP[5] <= Mux1.DB_MAX_OUTPUT_PORT_TYPE
7206
HEX_DISP[6] <= Mux0.DB_MAX_OUTPUT_PORT_TYPE
7207
 
7208
 
7209
|Z80SOC|decoder_7seg:DISPHEX5
7210
NUMBER[0] => Mux0.IN19
7211
NUMBER[0] => Mux1.IN19
7212
NUMBER[0] => Mux2.IN19
7213
NUMBER[0] => Mux3.IN19
7214
NUMBER[0] => Mux4.IN19
7215
NUMBER[0] => Mux5.IN19
7216
NUMBER[0] => Mux6.IN19
7217
NUMBER[1] => Mux0.IN18
7218
NUMBER[1] => Mux1.IN18
7219
NUMBER[1] => Mux2.IN18
7220
NUMBER[1] => Mux3.IN18
7221
NUMBER[1] => Mux4.IN18
7222
NUMBER[1] => Mux5.IN18
7223
NUMBER[1] => Mux6.IN18
7224
NUMBER[2] => Mux0.IN17
7225
NUMBER[2] => Mux1.IN17
7226
NUMBER[2] => Mux2.IN17
7227
NUMBER[2] => Mux3.IN17
7228
NUMBER[2] => Mux4.IN17
7229
NUMBER[2] => Mux5.IN17
7230
NUMBER[2] => Mux6.IN17
7231
NUMBER[3] => Mux0.IN16
7232
NUMBER[3] => Mux1.IN16
7233
NUMBER[3] => Mux2.IN16
7234
NUMBER[3] => Mux3.IN16
7235
NUMBER[3] => Mux4.IN16
7236
NUMBER[3] => Mux5.IN16
7237
NUMBER[3] => Mux6.IN16
7238
HEX_DISP[0] <= Mux6.DB_MAX_OUTPUT_PORT_TYPE
7239
HEX_DISP[1] <= Mux5.DB_MAX_OUTPUT_PORT_TYPE
7240
HEX_DISP[2] <= Mux4.DB_MAX_OUTPUT_PORT_TYPE
7241
HEX_DISP[3] <= Mux3.DB_MAX_OUTPUT_PORT_TYPE
7242
HEX_DISP[4] <= Mux2.DB_MAX_OUTPUT_PORT_TYPE
7243
HEX_DISP[5] <= Mux1.DB_MAX_OUTPUT_PORT_TYPE
7244
HEX_DISP[6] <= Mux0.DB_MAX_OUTPUT_PORT_TYPE
7245
 
7246
 
7247
|Z80SOC|decoder_7seg:DISPHEX6
7248
NUMBER[0] => Mux0.IN19
7249
NUMBER[0] => Mux1.IN19
7250
NUMBER[0] => Mux2.IN19
7251
NUMBER[0] => Mux3.IN19
7252
NUMBER[0] => Mux4.IN19
7253
NUMBER[0] => Mux5.IN19
7254
NUMBER[0] => Mux6.IN19
7255
NUMBER[1] => Mux0.IN18
7256
NUMBER[1] => Mux1.IN18
7257
NUMBER[1] => Mux2.IN18
7258
NUMBER[1] => Mux3.IN18
7259
NUMBER[1] => Mux4.IN18
7260
NUMBER[1] => Mux5.IN18
7261
NUMBER[1] => Mux6.IN18
7262
NUMBER[2] => Mux0.IN17
7263
NUMBER[2] => Mux1.IN17
7264
NUMBER[2] => Mux2.IN17
7265
NUMBER[2] => Mux3.IN17
7266
NUMBER[2] => Mux4.IN17
7267
NUMBER[2] => Mux5.IN17
7268
NUMBER[2] => Mux6.IN17
7269
NUMBER[3] => Mux0.IN16
7270
NUMBER[3] => Mux1.IN16
7271
NUMBER[3] => Mux2.IN16
7272
NUMBER[3] => Mux3.IN16
7273
NUMBER[3] => Mux4.IN16
7274
NUMBER[3] => Mux5.IN16
7275
NUMBER[3] => Mux6.IN16
7276
HEX_DISP[0] <= Mux6.DB_MAX_OUTPUT_PORT_TYPE
7277
HEX_DISP[1] <= Mux5.DB_MAX_OUTPUT_PORT_TYPE
7278
HEX_DISP[2] <= Mux4.DB_MAX_OUTPUT_PORT_TYPE
7279
HEX_DISP[3] <= Mux3.DB_MAX_OUTPUT_PORT_TYPE
7280
HEX_DISP[4] <= Mux2.DB_MAX_OUTPUT_PORT_TYPE
7281
HEX_DISP[5] <= Mux1.DB_MAX_OUTPUT_PORT_TYPE
7282
HEX_DISP[6] <= Mux0.DB_MAX_OUTPUT_PORT_TYPE
7283
 
7284
 
7285
|Z80SOC|decoder_7seg:DISPHEX7
7286
NUMBER[0] => Mux0.IN19
7287
NUMBER[0] => Mux1.IN19
7288
NUMBER[0] => Mux2.IN19
7289
NUMBER[0] => Mux3.IN19
7290
NUMBER[0] => Mux4.IN19
7291
NUMBER[0] => Mux5.IN19
7292
NUMBER[0] => Mux6.IN19
7293
NUMBER[1] => Mux0.IN18
7294
NUMBER[1] => Mux1.IN18
7295
NUMBER[1] => Mux2.IN18
7296
NUMBER[1] => Mux3.IN18
7297
NUMBER[1] => Mux4.IN18
7298
NUMBER[1] => Mux5.IN18
7299
NUMBER[1] => Mux6.IN18
7300
NUMBER[2] => Mux0.IN17
7301
NUMBER[2] => Mux1.IN17
7302
NUMBER[2] => Mux2.IN17
7303
NUMBER[2] => Mux3.IN17
7304
NUMBER[2] => Mux4.IN17
7305
NUMBER[2] => Mux5.IN17
7306
NUMBER[2] => Mux6.IN17
7307
NUMBER[3] => Mux0.IN16
7308
NUMBER[3] => Mux1.IN16
7309
NUMBER[3] => Mux2.IN16
7310
NUMBER[3] => Mux3.IN16
7311
NUMBER[3] => Mux4.IN16
7312
NUMBER[3] => Mux5.IN16
7313
NUMBER[3] => Mux6.IN16
7314
HEX_DISP[0] <= Mux6.DB_MAX_OUTPUT_PORT_TYPE
7315
HEX_DISP[1] <= Mux5.DB_MAX_OUTPUT_PORT_TYPE
7316
HEX_DISP[2] <= Mux4.DB_MAX_OUTPUT_PORT_TYPE
7317
HEX_DISP[3] <= Mux3.DB_MAX_OUTPUT_PORT_TYPE
7318
HEX_DISP[4] <= Mux2.DB_MAX_OUTPUT_PORT_TYPE
7319
HEX_DISP[5] <= Mux1.DB_MAX_OUTPUT_PORT_TYPE
7320
HEX_DISP[6] <= Mux0.DB_MAX_OUTPUT_PORT_TYPE
7321
 
7322
 
7323
|Z80SOC|ps2kbd:ps2_kbd_inst
7324
clock => keyboard:kbd_inst.clock
7325
clkdelay => caps[0].CLK
7326
clkdelay => caps[1].CLK
7327
reset => keyboard:kbd_inst.reset
7328
read => keyboard:kbd_inst.read
7329
scan_ready <= keyboard:kbd_inst.scan_ready
7330
ps2_ascii_code[0] <= WideOr6.DB_MAX_OUTPUT_PORT_TYPE
7331
ps2_ascii_code[1] <= WideOr5.DB_MAX_OUTPUT_PORT_TYPE
7332
ps2_ascii_code[2] <= WideOr4.DB_MAX_OUTPUT_PORT_TYPE
7333
ps2_ascii_code[3] <= WideOr3.DB_MAX_OUTPUT_PORT_TYPE
7334
ps2_ascii_code[4] <= WideOr2.DB_MAX_OUTPUT_PORT_TYPE
7335
ps2_ascii_code[5] <= WideOr1.DB_MAX_OUTPUT_PORT_TYPE
7336
ps2_ascii_code[6] <= WideOr0.DB_MAX_OUTPUT_PORT_TYPE
7337
ps2_ascii_code[7] <= WideNor0.DB_MAX_OUTPUT_PORT_TYPE
7338
 
7339
 
7340
|Z80SOC|ps2kbd:ps2_kbd_inst|keyboard:kbd_inst
7341
keyboard_clk => filter[7].DATAIN
7342
keyboard_data => SHIFTIN.DATAB
7343
keyboard_data => process_2.IN1
7344
clock => keyboard_clk_filtered.CLK
7345
clock => filter[0].CLK
7346
clock => filter[1].CLK
7347
clock => filter[2].CLK
7348
clock => filter[3].CLK
7349
clock => filter[4].CLK
7350
clock => filter[5].CLK
7351
clock => filter[6].CLK
7352
clock => filter[7].CLK
7353
clock => clock_enable.CLK
7354
reset => INCNT.OUTPUTSELECT
7355
reset => INCNT.OUTPUTSELECT
7356
reset => INCNT.OUTPUTSELECT
7357
reset => INCNT.OUTPUTSELECT
7358
reset => READ_CHAR.OUTPUTSELECT
7359
reset => ready_set.OUTPUTSELECT
7360
reset => scan_code[0]~reg0.ENA
7361
reset => scan_code[1]~reg0.ENA
7362
reset => scan_code[2]~reg0.ENA
7363
reset => scan_code[3]~reg0.ENA
7364
reset => scan_code[4]~reg0.ENA
7365
reset => scan_code[5]~reg0.ENA
7366
reset => scan_code[6]~reg0.ENA
7367
reset => scan_code[7]~reg0.ENA
7368
reset => SHIFTIN[0].ENA
7369
reset => SHIFTIN[1].ENA
7370
reset => SHIFTIN[2].ENA
7371
reset => SHIFTIN[3].ENA
7372
reset => SHIFTIN[4].ENA
7373
reset => SHIFTIN[5].ENA
7374
reset => SHIFTIN[6].ENA
7375
reset => SHIFTIN[7].ENA
7376
reset => SHIFTIN[8].ENA
7377
read => scan_ready~reg0.ACLR
7378
scan_code[0] <= scan_code[0]~reg0.DB_MAX_OUTPUT_PORT_TYPE
7379
scan_code[1] <= scan_code[1]~reg0.DB_MAX_OUTPUT_PORT_TYPE
7380
scan_code[2] <= scan_code[2]~reg0.DB_MAX_OUTPUT_PORT_TYPE
7381
scan_code[3] <= scan_code[3]~reg0.DB_MAX_OUTPUT_PORT_TYPE
7382
scan_code[4] <= scan_code[4]~reg0.DB_MAX_OUTPUT_PORT_TYPE
7383
scan_code[5] <= scan_code[5]~reg0.DB_MAX_OUTPUT_PORT_TYPE
7384
scan_code[6] <= scan_code[6]~reg0.DB_MAX_OUTPUT_PORT_TYPE
7385
scan_code[7] <= scan_code[7]~reg0.DB_MAX_OUTPUT_PORT_TYPE
7386
scan_ready <= scan_ready~reg0.DB_MAX_OUTPUT_PORT_TYPE
7387
 
7388
 
7389
|Z80SOC|LCD:lcd_inst
7390
reset => LCD_RW_int.ACLR
7391
reset => LCD_RS~reg0.ACLR
7392
reset => LCD_EN~reg0.PRESET
7393
reset => data_bus_value[0].ACLR
7394
reset => data_bus_value[1].ACLR
7395
reset => data_bus_value[2].ACLR
7396
reset => data_bus_value[3].PRESET
7397
reset => data_bus_value[4].PRESET
7398
reset => data_bus_value[5].PRESET
7399
reset => data_bus_value[6].ACLR
7400
reset => data_bus_value[7].ACLR
7401
reset => clk_count_400hz.OUTPUTSELECT
7402
reset => clk_count_400hz.OUTPUTSELECT
7403
reset => clk_count_400hz.OUTPUTSELECT
7404
reset => clk_count_400hz.OUTPUTSELECT
7405
reset => clk_count_400hz.OUTPUTSELECT
7406
reset => clk_count_400hz.OUTPUTSELECT
7407
reset => clk_count_400hz.OUTPUTSELECT
7408
reset => clk_count_400hz.OUTPUTSELECT
7409
reset => clk_count_400hz.OUTPUTSELECT
7410
reset => clk_count_400hz.OUTPUTSELECT
7411
reset => clk_count_400hz.OUTPUTSELECT
7412
reset => clk_count_400hz.OUTPUTSELECT
7413
reset => clk_count_400hz.OUTPUTSELECT
7414
reset => clk_count_400hz.OUTPUTSELECT
7415
reset => clk_count_400hz.OUTPUTSELECT
7416
reset => clk_count_400hz.OUTPUTSELECT
7417
reset => clk_count_400hz.OUTPUTSELECT
7418
reset => clk_count_400hz.OUTPUTSELECT
7419
reset => clk_count_400hz.OUTPUTSELECT
7420
reset => clk_count_400hz.OUTPUTSELECT
7421
reset => clk_400hz_enable.OUTPUTSELECT
7422
reset => next_command~3.DATAIN
7423
reset => state~14.DATAIN
7424
reset => LCD_ON~reg0.ENA
7425
reset => char_count_sig[4].ENA
7426
reset => char_count_sig[3].ENA
7427
reset => char_count_sig[2].ENA
7428
reset => char_count_sig[1].ENA
7429
reset => char_count_sig[0].ENA
7430
reset => LCD_BLON~reg0.ENA
7431
CLOCK_50 => LCD_ON~reg0.CLK
7432
CLOCK_50 => LCD_BLON~reg0.CLK
7433
CLOCK_50 => char_count_sig[0].CLK
7434
CLOCK_50 => char_count_sig[1].CLK
7435
CLOCK_50 => char_count_sig[2].CLK
7436
CLOCK_50 => char_count_sig[3].CLK
7437
CLOCK_50 => char_count_sig[4].CLK
7438
CLOCK_50 => LCD_RW_int.CLK
7439
CLOCK_50 => LCD_RS~reg0.CLK
7440
CLOCK_50 => LCD_EN~reg0.CLK
7441
CLOCK_50 => data_bus_value[0].CLK
7442
CLOCK_50 => data_bus_value[1].CLK
7443
CLOCK_50 => data_bus_value[2].CLK
7444
CLOCK_50 => data_bus_value[3].CLK
7445
CLOCK_50 => data_bus_value[4].CLK
7446
CLOCK_50 => data_bus_value[5].CLK
7447
CLOCK_50 => data_bus_value[6].CLK
7448
CLOCK_50 => data_bus_value[7].CLK
7449
CLOCK_50 => clk_400hz_enable.CLK
7450
CLOCK_50 => clk_count_400hz[0].CLK
7451
CLOCK_50 => clk_count_400hz[1].CLK
7452
CLOCK_50 => clk_count_400hz[2].CLK
7453
CLOCK_50 => clk_count_400hz[3].CLK
7454
CLOCK_50 => clk_count_400hz[4].CLK
7455
CLOCK_50 => clk_count_400hz[5].CLK
7456
CLOCK_50 => clk_count_400hz[6].CLK
7457
CLOCK_50 => clk_count_400hz[7].CLK
7458
CLOCK_50 => clk_count_400hz[8].CLK
7459
CLOCK_50 => clk_count_400hz[9].CLK
7460
CLOCK_50 => clk_count_400hz[10].CLK
7461
CLOCK_50 => clk_count_400hz[11].CLK
7462
CLOCK_50 => clk_count_400hz[12].CLK
7463
CLOCK_50 => clk_count_400hz[13].CLK
7464
CLOCK_50 => clk_count_400hz[14].CLK
7465
CLOCK_50 => clk_count_400hz[15].CLK
7466
CLOCK_50 => clk_count_400hz[16].CLK
7467
CLOCK_50 => clk_count_400hz[17].CLK
7468
CLOCK_50 => clk_count_400hz[18].CLK
7469
CLOCK_50 => clk_count_400hz[19].CLK
7470
CLOCK_50 => next_command~1.DATAIN
7471
CLOCK_50 => state~12.DATAIN
7472
LCD_RS <= LCD_RS~reg0.DB_MAX_OUTPUT_PORT_TYPE
7473
LCD_EN <= LCD_EN~reg0.DB_MAX_OUTPUT_PORT_TYPE
7474
LCD_RW <= LCD_RW_int.DB_MAX_OUTPUT_PORT_TYPE
7475
LCD_ON <= LCD_ON~reg0.DB_MAX_OUTPUT_PORT_TYPE
7476
LCD_BLON <= LCD_BLON~reg0.DB_MAX_OUTPUT_PORT_TYPE
7477
LCD_DATA[0] <> LCD_DATA[0]
7478
LCD_DATA[1] <> LCD_DATA[1]
7479
LCD_DATA[2] <> LCD_DATA[2]
7480
LCD_DATA[3] <> LCD_DATA[3]
7481
LCD_DATA[4] <> LCD_DATA[4]
7482
LCD_DATA[5] <> LCD_DATA[5]
7483
LCD_DATA[6] <> LCD_DATA[6]
7484
LCD_DATA[7] <> LCD_DATA[7]
7485
lcd_on_sig => LCD_ON.DATAB
7486
next_char[0] => LessThan1.IN8
7487
next_char[0] => Add1.IN8
7488
next_char[0] => data_bus_value.DATAA
7489
next_char[0] => data_bus_value.DATAB
7490
next_char[0] => Equal1.IN15
7491
next_char[1] => LessThan1.IN7
7492
next_char[1] => Add1.IN7
7493
next_char[1] => data_bus_value.DATAA
7494
next_char[1] => data_bus_value.DATAB
7495
next_char[1] => Equal1.IN14
7496
next_char[2] => LessThan1.IN6
7497
next_char[2] => Add1.IN6
7498
next_char[2] => data_bus_value.DATAA
7499
next_char[2] => data_bus_value.DATAB
7500
next_char[2] => Equal1.IN13
7501
next_char[3] => LessThan1.IN5
7502
next_char[3] => Add1.IN5
7503
next_char[3] => data_bus_value.DATAA
7504
next_char[3] => data_bus_value.DATAB
7505
next_char[3] => Equal1.IN12
7506
next_char[4] => Equal0.IN7
7507
next_char[4] => data_bus_value.DATAB
7508
next_char[4] => Equal1.IN11
7509
next_char[5] => Equal0.IN6
7510
next_char[5] => data_bus_value.DATAB
7511
next_char[5] => Equal1.IN10
7512
next_char[6] => Equal0.IN5
7513
next_char[6] => data_bus_value.DATAB
7514
next_char[6] => Equal1.IN9
7515
next_char[7] => Equal0.IN4
7516
next_char[7] => data_bus_value.DATAB
7517
next_char[7] => Equal1.IN8
7518
char_count[0] <= char_count_sig[0].DB_MAX_OUTPUT_PORT_TYPE
7519
char_count[1] <= char_count_sig[1].DB_MAX_OUTPUT_PORT_TYPE
7520
char_count[2] <= char_count_sig[2].DB_MAX_OUTPUT_PORT_TYPE
7521
char_count[3] <= char_count_sig[3].DB_MAX_OUTPUT_PORT_TYPE
7522
char_count[4] <= char_count_sig[4].DB_MAX_OUTPUT_PORT_TYPE
7523
clk400hz <= clk_400hz_enable.DB_MAX_OUTPUT_PORT_TYPE
7524
 
7525
 

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