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[/] [zet86/] [trunk/] [soc/] [vga/] [sim/] [tb.do] - Blame information for rev 39

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Line No. Rev Author Line
1 39 zeus
vdel -all -lib work
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vmap unisims /opt/Xilinx/10.1/modelsim/verilog/unisims
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vlib work
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vlog -work work -lint vdu.v vdu_tb.v  ram2k_b16_attr.v ram2k_b16.v char_rom_b16.v
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vlog -work work /opt/Xilinx/10.1/ISE/verilog/src/glbl.v
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vsim -L /opt/Xilinx/10.1/modelsim/verilog/unisims -novopt -t ns work.vdu_tb work.glbl
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add wave -radix hexadecimal /vdu_tb/vdu0/*
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