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[/] [zipcpu/] [trunk/] [bench/] [asm/] [lfsr.S] - Blame information for rev 51

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loop:
        LDI     $2408bh,R10
        LDI     $1,R9
loop:
        MOV     R9,R0
        LSR     $1,R9
        TST     $1,R0
        XOR.NE  R10,R9
        BRA     $-5
 
        HALT

Line No.	Rev	Author	Line
1	11	dgisselq	`loop:`
2			`LDI $2408bh,R10`
3			`LDI $1,R9`
4			`loop:`
5			`MOV R9,R0`
6			`LSR $1,R9`
7			`TST $1,R0`
8			`XOR.NE R10,R9`
9			`BRA $-5`
10
11			`HALT`

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[/] [zipcpu/] [trunk/] [bench/] [asm/] [lfsr.S] - Blame information for rev 51