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dgisselq |
################################################################################
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#
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# Filename: Makefile
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#
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# Project: Zip CPU -- a small, lightweight, RISC CPU soft core
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#
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# Purpose: This makefile builds a verilator simulation of the rtl
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# testbenches necessary to test certain components of the
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# ZipSystem using Verilator. It does not make the system within Icarus,
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# Vivado or Quartus.
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#
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#
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# Creator: Dan Gisselquist, Ph.D.
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# Gisselquist Technology, LLC
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#
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################################################################################
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#
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# Copyright (C) 2015-2019, Gisselquist Technology, LLC
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#
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# This program is free software (firmware): you can redistribute it and/or
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# modify it under the terms of the GNU General Public License as published
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# by the Free Software Foundation, either version 3 of the License, or (at
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# your option) any later version.
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#
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# This program is distributed in the hope that it will be useful, but WITHOUT
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# ANY WARRANTY; without even the implied warranty of MERCHANTIBILITY or
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# FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
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# for more details.
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#
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# License: GPL, v3, as defined and found on www.gnu.org,
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# http://www.gnu.org/licenses/gpl.html
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#
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#
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################################################################################
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#
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.PHONY: all
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all: zipmmu_tb
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CORED:= ../../rtl/core
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PRPHD:= ../../rtl/peripherals
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VOBJ := obj_dir
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VERILATOR := verilator
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VFLAGS := -Wall -MMD -trace -y $(PRPHD) -cc
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SUBMAKE := $(MAKE) --no-print-directory -C
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$(VOBJ)/Vzipmmu_tb.cpp: $(PRPHD)/zipmmu.v zipmmu_tb.v memdev.v
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$(VERILATOR) $(VFLAGS) zipmmu_tb.v
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$(VOBJ)/Vzipmmu_tb.h: $(VOBJ)/Vzipmmu_tb.cpp
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$(VOBJ)/Vzipmmu_tb__ALL.a: $(VOBJ)/Vzipmmu_tb.cpp $(VOBJ)/Vzipmmu_tb.h
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$(SUBMAKE) $(VOBJ) -f Vzipmmu_tb.mk
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.PHONY: zipmmu_tb
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zipmmu_tb: $(VOBJ)/Vzipmmu_tb__ALL.a
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.PHONY: clean
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clean:
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rm -rf $(VOBJ)
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DEPS := $(wildcard $(VOBJ)/*.d)
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ifneq ($(DEPS),)
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include $(DEPS)
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endif
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