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[/] [zipcpu/] [trunk/] [sw/] [zasm/] [zopcodes.cpp] - Blame information for rev 202

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1 2 dgisselq 
////////////////////////////////////////////////////////////////////////////////
2 
//
3 
// Filename:    zopcodes.cpp
4 
//
5 
// Project:     Zip CPU -- a small, lightweight, RISC CPU core
6 
//
7 13 dgisselq 
// Purpose:     A simple program to handle the disassembly and definition
8 
//              of the various Zip Assembly opcodes.  The primary function
9 202 dgisselq 
//      of this file is the zipi_to_double_string, or Zip Instruction to a
10 
//      pair of strings (disassemble) conversion.  The pair of strings is
11 
//      necessary since Zip instruction words may contain two separate
12 
//      instructions.
13 2 dgisselq 
//
14 
// Creator:     Dan Gisselquist, Ph.D.
15 69 dgisselq 
//              Gisselquist Technology, LLC
16 2 dgisselq 
//
17 
////////////////////////////////////////////////////////////////////////////////
18 
//
19 202 dgisselq 
// Copyright (C) 2015-2017, Gisselquist Technology, LLC
20 2 dgisselq 
//
21 
// This program is free software (firmware): you can redistribute it and/or
22 
// modify it under the terms of  the GNU General Public License as published
23 
// by the Free Software Foundation, either version 3 of the License, or (at
24 
// your option) any later version.
25 
//
26 
// This program is distributed in the hope that it will be useful, but WITHOUT
27 
// ANY WARRANTY; without even the implied warranty of MERCHANTIBILITY or
28 
// FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
29 
// for more details.
30 
//
31 
// You should have received a copy of the GNU General Public License along
32 202 dgisselq 
// with this program.  (It's in the $(ROOT)/doc directory.  Run make with no
33 2 dgisselq 
// target there if the PDF file isn't present.)  If not, see
34 
// <http://www.gnu.org/licenses/> for a copy.
35 
//
36 
// License:     GPL, v3, as defined and found on www.gnu.org,
37 
//              http://www.gnu.org/licenses/gpl.html
38 
//
39 
//
40 
////////////////////////////////////////////////////////////////////////////////
41 202 dgisselq 
//
42 
//
43 2 dgisselq 
#include <stdio.h>
44 
#include <strings.h>
45 
#include <string.h>
46 
#include <assert.h>
47 202 dgisselq 
#include <ctype.h>
48 2 dgisselq 
 
49 
#include "twoc.h"
50 
#include "zopcodes.h"
51 
 
52 202 dgisselq 
const   char    *zip_regstr[] = {
53 2 dgisselq 
        "R0", "R1", "R2", "R3",
54 
        "R4", "R5", "R6", "R7",
55 
        "R8", "R9", "R10","R11",
56 
        "R12","SP", "CC", "PC",
57 
        "uR0", "uR1", "uR2", "uR3",
58 
        "uR4", "uR5", "uR6", "uR7",
59 
        "uR8", "uR9", "uR10", "uR11",
60 
        "uR12", "uSP", "uCC", "uPC",
61 
        "sR0", "sR1", "sR2", "sR3",
62 
        "sR4", "sR5", "sR6", "sR7",
63 
        "sR8", "sR9", "sR10","sR11",
64 202 dgisselq 
        "sR12","sSP", "sCC", "sPC", "rILL"
65 2 dgisselq 
};
66 
 
67 202 dgisselq 
const   char    *zip_ccstr[8] = {
68 
        "",  ".Z",  ".LT", ".C",
69 
        ".V",".NZ", ".GE", ".NC"
70 2 dgisselq 
};
71 
 
72 202 dgisselq 
static const ZOPCODE    zip_oplist_raw[] = {
73 2 dgisselq 
        // Special case instructions.  These are general instructions, but with
74 
        // special opcodes
75 
        // Conditional branches
76 69 dgisselq 
        //      0.1111.0111.ccc.0.111.10iiiii--
77 
        //      0111 1011 11cc c011 110i iiii iiii iiii
78 202 dgisselq 
        { "BUSY", 0xffc7ffff, 0x7883ffff, ZIP_OPUNUSED, ZIP_OPUNUSED, ZIP_OPUNUSED, ZIP_OPUNUSED, ZIP_BITFIELD(3,19) },
79 
        { "BZ",  0xfffc0000, 0x78880000, ZIP_OPUNUSED, ZIP_OPUNUSED, ZIP_OPUNUSED, ZIP_IMMFIELD(18,0), ZIP_OPUNUSED },
80 
        { "BLT", 0xfffc0000, 0x78900000, ZIP_OPUNUSED, ZIP_OPUNUSED, ZIP_OPUNUSED, ZIP_IMMFIELD(18,0), ZIP_OPUNUSED },
81 
        { "BC",  0xfffc0000, 0x78980000, ZIP_OPUNUSED, ZIP_OPUNUSED, ZIP_OPUNUSED, ZIP_IMMFIELD(18,0), ZIP_OPUNUSED },
82 
        { "BV",  0xfffc0000, 0x78a00000, ZIP_OPUNUSED, ZIP_OPUNUSED, ZIP_OPUNUSED, ZIP_IMMFIELD(18,0), ZIP_OPUNUSED },
83 
        { "BNZ",  0xfffc0000, 0x78a80000, ZIP_OPUNUSED, ZIP_OPUNUSED, ZIP_OPUNUSED, ZIP_IMMFIELD(18,0), ZIP_OPUNUSED },
84 
        { "BGE",  0xfffc0000, 0x78b00000, ZIP_OPUNUSED, ZIP_OPUNUSED, ZIP_OPUNUSED, ZIP_IMMFIELD(18,0), ZIP_OPUNUSED },
85 
        { "BNC",  0xfffc0000, 0x78b80000, ZIP_OPUNUSED, ZIP_OPUNUSED, ZIP_OPUNUSED, ZIP_IMMFIELD(18,0), ZIP_OPUNUSED },
86 
        { "BRA",  0xffc40000, 0x78800000, ZIP_OPUNUSED, ZIP_OPUNUSED, ZIP_OPUNUSED, ZIP_IMMFIELD(18,0), ZIP_BITFIELD(3,19) },
87 
        // Changes/updates to CC, based upon LDI
88 
        { "TRAP", 0xfffffff0, 0x76000000, ZIP_OPUNUSED,ZIP_OPUNUSED, ZIP_OPUNUSED, ZIP_OPUNUSED, ZIP_OPUNUSED },
89 
        { "TRAP", 0xff800000, 0x76000000, ZIP_OPUNUSED,ZIP_OPUNUSED, ZIP_OPUNUSED, ZIP_OPUNUSED, ZIP_OPUNUSED },
90 
        // BREV based traps
91 
        { "TRAP", 0xffc7ffff, 0x72000000, ZIP_OPUNUSED, ZIP_OPUNUSED, ZIP_OPUNUSED, ZIP_IMMFIELD(18,0), ZIP_BITFIELD(3,19) },
92 
        // LDILO based traps
93 
        { "TRAP",0xffc4ffff, 0x72400000, ZIP_OPUNUSED, ZIP_OPUNUSED, ZIP_OPUNUSED, ZIP_OPUNUSED, ZIP_BITFIELD(3,19) },
94 
        { "TRAP",0xffc40000, 0x72400000, ZIP_OPUNUSED, ZIP_OPUNUSED, ZIP_OPUNUSED, ZIP_IMMFIELD(18,0), ZIP_BITFIELD(3,19) },
95 69 dgisselq 
        // CLR -- a LDI of zero
96 202 dgisselq 
        //      0.rrrr.1100.iiiiiii--
97 
        //      0rrr r110 0...
98 
        { "CLR",  0x87ffffff, 0x06000000, ZIP_REGFIELD(27),ZIP_OPUNUSED, ZIP_OPUNUSED, ZIP_OPUNUSED, ZIP_OPUNUSED },
99 
        // BREV based clears
100 
        { "CLR", 0x87c7ffff, 0x02000000, ZIP_REGFIELD(27), ZIP_REGFIELD(27), ZIP_OPUNUSED, ZIP_IMMFIELD(18,0), ZIP_BITFIELD(3,19) },
101 69 dgisselq 
        // HALT
102 
        //      0.1110.00011.ccc.0.0000000000010
103 
        //      0111.0000.11cc.c000.0000.0000.0000.0010
104 202 dgisselq 
        { "HALT", 0xffc7ffff, 0x70c00010, ZIP_OPUNUSED, ZIP_OPUNUSED, ZIP_OPUNUSED, ZIP_OPUNUSED, ZIP_BITFIELD(3,19) },
105 2 dgisselq 
        // The "wait" instruction is identical, with the only difference being
106 69 dgisselq 
        // the interrrupt context of the processor.  Well, almost.  To
107 
        // facilitate waits from supervisor mode, the wait instruction
108 
        // explicitly forces the CPU into user mode.
109 202 dgisselq 
        { "WAIT", 0xffc7ffff, 0x70c00030, ZIP_OPUNUSED, ZIP_OPUNUSED, ZIP_OPUNUSED, ZIP_OPUNUSED, ZIP_BITFIELD(3,19) },
110 
        // 1.0011.11000.000.0000...... 5f ? A carefully chosen illegal insn ??
111 
        // "INT", 0xff10007f, 0x9e00005f, ZIP_OPUNUSED, ZIP_OPUNUSED, ZIP_OPUNUSED, ZIP_OPUNUSED, ZIP_BITFIELD(3,19),
112 2 dgisselq 
        // Return to user space
113 202 dgisselq 
        { "RTU", 0xffc7ffff, 0x70c00020, ZIP_OPUNUSED, ZIP_OPUNUSED, ZIP_OPUNUSED, ZIP_OPUNUSED, ZIP_BITFIELD(3,19) },
114 
        // The return instruction: JMP R0 (possibly conditional) = MOV R0,PC
115 
        { "RTN", 0xffc7ffff, 0x7b400000, ZIP_OPUNUSED, ZIP_OPUNUSED, ZIP_OPUNUSED, ZIP_OPUNUSED, ZIP_BITFIELD(3,19) },
116 2 dgisselq 
        // JMP (possibly a conditional jump, if not covered by branches above)
117 202 dgisselq 
        // 0.1111.01101.ccc.a.rrrr.biiiiiiiiiiiiiiii
118 
        // 0111.1011.01cc.c0rr.rrbi.iiii.iiii.iiii              MOV x,PC
119 
        { "JMP",  0xffc40000, 0x7b400000, ZIP_OPUNUSED,ZIP_OPUNUSED, ZIP_REGFIELD(14), ZIP_IMMFIELD(13,0), ZIP_BITFIELD(3,19) },
120 
        // 0.1111.1100.ii.iiii.iiii.iiii.iiii.iiii.iiii
121 
        // 0111.1110.0iii.iiii.iiii.iiii.iiii.iiii              LDI x,PC
122 
        { "JMPI", 0xff800000, 0x7e000000, ZIP_REGFIELD(27),ZIP_OPUNUSED, ZIP_OPUNUSED, ZIP_IMMFIELD(23,0), ZIP_OPUNUSED },
123 188 dgisselq 
        // 0.1111.10010.000.1.1111.000000000000000
124 202 dgisselq 
        // 0111.1100.1000.0111.11ii.iiii.iiii.iiii              LOD (PC),PC
125 
        { "LJMP", 0xffffffff, 0x7c87c000, ZIP_OPUNUSED, ZIP_OPUNUSED, ZIP_OPUNUSED, ZIP_OPUNUSED, ZIP_OPUNUSED },
126 69 dgisselq 
        // NOT : XOR w/ -1
127 
        //      0.rrrr.00100.ccc.0111.11111111111
128 
        //      0rrr.r001.00cc.c011.f.f.f.f
129 202 dgisselq 
        // { "NOT", 0x87c7ffff, 0x0103ffff, ZIP_REGFIELD(27), ZIP_OPUNUSED, ZIP_OPUNUSED, ZIP_OPUNUSED, ZIP_BITFIELD(3,19) },
130 2 dgisselq 
        // General instructions
131 69 dgisselq 
        // 0rrr.rooo.oocc.cxrr.rrii.iiii.iiii.iiii
132 202 dgisselq 
        { "SUB", 0x87c40000, 0x00000000, ZIP_REGFIELD(27), ZIP_REGFIELD(27), ZIP_OPUNUSED, ZIP_IMMFIELD(18,0), ZIP_BITFIELD(3,19) },
133 
        { "SUB", 0x87c40000, 0x00040000, ZIP_REGFIELD(27), ZIP_REGFIELD(27), ZIP_REGFIELD(14), ZIP_IMMFIELD(14,0), ZIP_BITFIELD(3,19) },
134 69 dgisselq 
        //
135 202 dgisselq 
        { "AND", 0x87c40000, 0x00400000, ZIP_REGFIELD(27), ZIP_REGFIELD(27), ZIP_OPUNUSED, ZIP_IMMFIELD(18,0), ZIP_BITFIELD(3,19) },
136 
        { "AND", 0x87c40000, 0x00440000, ZIP_REGFIELD(27), ZIP_REGFIELD(27), ZIP_REGFIELD(14), ZIP_IMMFIELD(14,0), ZIP_BITFIELD(3,19) },
137 69 dgisselq 
        //
138 202 dgisselq 
        { "ADD", 0x87c40000, 0x00800000, ZIP_REGFIELD(27), ZIP_REGFIELD(27), ZIP_OPUNUSED, ZIP_IMMFIELD(18,0), ZIP_BITFIELD(3,19) },
139 
        { "ADD", 0x87c40000, 0x00840000, ZIP_REGFIELD(27), ZIP_REGFIELD(27), ZIP_REGFIELD(14), ZIP_IMMFIELD(14,0), ZIP_BITFIELD(3,19) },
140 69 dgisselq 
        //
141 202 dgisselq 
        { "OR", 0x87c40000, 0x00c00000, ZIP_REGFIELD(27), ZIP_REGFIELD(27), ZIP_OPUNUSED, ZIP_IMMFIELD(18,0), ZIP_BITFIELD(3,19) },
142 
        { "OR", 0x87c40000, 0x00c40000, ZIP_REGFIELD(27), ZIP_REGFIELD(27), ZIP_REGFIELD(14), ZIP_IMMFIELD(14,0), ZIP_BITFIELD(3,19) },
143 69 dgisselq 
        //
144 202 dgisselq 
        { "XOR", 0x87c40000, 0x01000000, ZIP_REGFIELD(27), ZIP_REGFIELD(27), ZIP_OPUNUSED, ZIP_IMMFIELD(18,0), ZIP_BITFIELD(3,19) },
145 
        { "XOR", 0x87c40000, 0x01040000, ZIP_REGFIELD(27), ZIP_REGFIELD(27), ZIP_REGFIELD(14), ZIP_IMMFIELD(14,0), ZIP_BITFIELD(3,19) },
146 69 dgisselq 
        //
147 202 dgisselq 
        { "LSR", 0x87c40000, 0x01400000, ZIP_REGFIELD(27), ZIP_REGFIELD(27), ZIP_OPUNUSED, ZIP_IMMFIELD(18,0), ZIP_BITFIELD(3,19) },
148 
        { "LSR", 0x87c40000, 0x01440000, ZIP_REGFIELD(27), ZIP_REGFIELD(27), ZIP_REGFIELD(14), ZIP_IMMFIELD(14,0), ZIP_BITFIELD(3,19) },
149 69 dgisselq 
        //
150 202 dgisselq 
        { "LSL", 0x87c40000, 0x01800000, ZIP_REGFIELD(27), ZIP_REGFIELD(27), ZIP_OPUNUSED, ZIP_IMMFIELD(18,0), ZIP_BITFIELD(3,19) },
151 
        { "LSL", 0x87c40000, 0x01840000, ZIP_REGFIELD(27), ZIP_REGFIELD(27), ZIP_REGFIELD(14), ZIP_IMMFIELD(14,0), ZIP_BITFIELD(3,19) },
152 69 dgisselq 
        //
153 202 dgisselq 
        { "ASR", 0x87c40000, 0x01c00000, ZIP_REGFIELD(27), ZIP_REGFIELD(27), ZIP_OPUNUSED, ZIP_IMMFIELD(18,0), ZIP_BITFIELD(3,19) },
154 
        { "ASR", 0x87c40000, 0x01c40000, ZIP_REGFIELD(27), ZIP_REGFIELD(27), ZIP_REGFIELD(14), ZIP_IMMFIELD(14,0), ZIP_BITFIELD(3,19) },
155 69 dgisselq 
        //
156 202 dgisselq 
        { "BREV",0x87c40000, 0x02000000, ZIP_REGFIELD(27), ZIP_REGFIELD(27), ZIP_OPUNUSED, ZIP_IMMFIELD(18,0), ZIP_BITFIELD(3,19) },
157 
        { "BREV",0x87c40000, 0x02040000, ZIP_REGFIELD(27), ZIP_REGFIELD(27), ZIP_REGFIELD(14), ZIP_IMMFIELD(14,0), ZIP_BITFIELD(3,19) },
158 69 dgisselq 
        //
159 202 dgisselq 
        { "LDILO",0x87c40000, 0x02400000, ZIP_REGFIELD(27), ZIP_REGFIELD(27), ZIP_OPUNUSED, ZIP_IMMFIELD(18,0), ZIP_BITFIELD(3,19) },
160 
        { "LDILO",0x87c40000, 0x02440000, ZIP_REGFIELD(27), ZIP_REGFIELD(27), ZIP_REGFIELD(14), ZIP_IMMFIELD(14,0), ZIP_BITFIELD(3,19) },
161 69 dgisselq 
        //
162 188 dgisselq 
        //
163 202 dgisselq 
        { "MPYUHI", 0x87c40000, 0x02800000, ZIP_REGFIELD(27), ZIP_REGFIELD(27), ZIP_OPUNUSED, ZIP_IMMFIELD(18,0), ZIP_BITFIELD(3,19) },
164 
        { "MPYUHI", 0x87c40000, 0x02840000, ZIP_REGFIELD(27), ZIP_REGFIELD(27), ZIP_REGFIELD(14), ZIP_IMMFIELD(14,0), ZIP_BITFIELD(3,19) },
165 188 dgisselq 
        //
166 202 dgisselq 
        { "MPYSHI", 0x87c40000, 0x02c00000, ZIP_REGFIELD(27), ZIP_REGFIELD(27), ZIP_OPUNUSED, ZIP_IMMFIELD(18,0), ZIP_BITFIELD(3,19) },
167 
        { "MPYSHI", 0x87c40000, 0x02c40000, ZIP_REGFIELD(27), ZIP_REGFIELD(27), ZIP_REGFIELD(14), ZIP_IMMFIELD(14,0), ZIP_BITFIELD(3,19) },
168 69 dgisselq 
        //
169 202 dgisselq 
        { "MPY", 0x87c40000, 0x03000000, ZIP_REGFIELD(27), ZIP_REGFIELD(27), ZIP_OPUNUSED, ZIP_IMMFIELD(18,0), ZIP_BITFIELD(3,19) },
170 
        { "MPY", 0x87c40000, 0x03040000, ZIP_REGFIELD(27), ZIP_REGFIELD(27), ZIP_REGFIELD(14), ZIP_IMMFIELD(14,0), ZIP_BITFIELD(3,19) },
171 69 dgisselq 
        //
172 202 dgisselq 
        { "MOV", 0x87c42000, 0x03400000, ZIP_REGFIELD(27), ZIP_OPUNUSED, ZIP_REGFIELD(14), ZIP_IMMFIELD(13,0), ZIP_BITFIELD(3,19) },
173 
        { "MOV", 0x87c42000, 0x03440000, ZIP_URGFIELD(27), ZIP_OPUNUSED, ZIP_REGFIELD(14), ZIP_IMMFIELD(13,0), ZIP_BITFIELD(3,19) },
174 
        { "MOV", 0x87c42000, 0x03402000, ZIP_REGFIELD(27), ZIP_OPUNUSED, ZIP_URGFIELD(14), ZIP_IMMFIELD(13,0), ZIP_BITFIELD(3,19) },
175 
        { "MOV", 0x87c42000, 0x03442000, ZIP_URGFIELD(27), ZIP_OPUNUSED, ZIP_URGFIELD(14), ZIP_IMMFIELD(13,0), ZIP_BITFIELD(3,19) },
176 69 dgisselq 
        //
177 202 dgisselq 
        { "DIVU", 0x87c40000, 0x03800000, ZIP_REGFIELD(27), ZIP_REGFIELD(27), ZIP_OPUNUSED, ZIP_IMMFIELD(18,0), ZIP_BITFIELD(3,19) },
178 
        { "DIVU", 0x87c40000, 0x03840000, ZIP_REGFIELD(27), ZIP_REGFIELD(27), ZIP_REGFIELD(14), ZIP_IMMFIELD(14,0), ZIP_BITFIELD(3,19) },
179 69 dgisselq 
        //
180 202 dgisselq 
        { "DIVS", 0x87c40000, 0x03c00000, ZIP_REGFIELD(27), ZIP_REGFIELD(27), ZIP_OPUNUSED, ZIP_IMMFIELD(18,0), ZIP_BITFIELD(3,19) },
181 
        { "DIVS", 0x87c40000, 0x03c40000, ZIP_REGFIELD(27), ZIP_REGFIELD(27), ZIP_REGFIELD(14), ZIP_IMMFIELD(14,0), ZIP_BITFIELD(3,19) },
182 69 dgisselq 
        //
183 202 dgisselq 
        { "CMP", 0x87c40000, 0x04000000, ZIP_OPUNUSED, ZIP_REGFIELD(27), ZIP_OPUNUSED, ZIP_IMMFIELD(18,0), ZIP_BITFIELD(3,19) },
184 
        { "CMP", 0x87c40000, 0x04040000, ZIP_OPUNUSED, ZIP_REGFIELD(27), ZIP_REGFIELD(14), ZIP_IMMFIELD(14,0), ZIP_BITFIELD(3,19) },
185 
        { "TST", 0x87c40000, 0x04400000, ZIP_OPUNUSED, ZIP_REGFIELD(27), ZIP_OPUNUSED, ZIP_IMMFIELD(18,0), ZIP_BITFIELD(3,19) },
186 
        { "TST", 0x87c40000, 0x04440000, ZIP_OPUNUSED, ZIP_REGFIELD(27), ZIP_REGFIELD(14), ZIP_IMMFIELD(14,0), ZIP_BITFIELD(3,19) },
187 2 dgisselq 
        //
188 202 dgisselq 
        { "LW", 0x87c40000, 0x04800000, ZIP_REGFIELD(27), ZIP_OPUNUSED, ZIP_OPUNUSED, ZIP_IMMFIELD(18,0), ZIP_BITFIELD(3,19) },
189 
        { "LW", 0x87c40000, 0x04840000, ZIP_REGFIELD(27), ZIP_OPUNUSED, ZIP_REGFIELD(14), ZIP_IMMFIELD(14,0), ZIP_BITFIELD(3,19) },
190 2 dgisselq 
        //
191 202 dgisselq 
        { "SW", 0x87c40000, 0x04c00000, ZIP_OPUNUSED, ZIP_REGFIELD(27), ZIP_OPUNUSED, ZIP_IMMFIELD(18,0), ZIP_BITFIELD(3,19) },
192 
        { "SW", 0x87c40000, 0x04c40000, ZIP_OPUNUSED, ZIP_REGFIELD(27), ZIP_REGFIELD(14), ZIP_IMMFIELD(14,0), ZIP_BITFIELD(3,19) },
193 2 dgisselq 
        //
194 202 dgisselq 
        { "LH", 0x87c40000, 0x05000000, ZIP_REGFIELD(27), ZIP_OPUNUSED, ZIP_OPUNUSED, ZIP_IMMFIELD(18,0), ZIP_BITFIELD(3,19) },
195 
        { "LH", 0x87c40000, 0x05040000, ZIP_REGFIELD(27), ZIP_OPUNUSED, ZIP_REGFIELD(14), ZIP_IMMFIELD(14,0), ZIP_BITFIELD(3,19) },
196 2 dgisselq 
        //
197 202 dgisselq 
        { "SH", 0x87c40000, 0x05400000, ZIP_OPUNUSED, ZIP_REGFIELD(27), ZIP_OPUNUSED, ZIP_IMMFIELD(18,0), ZIP_BITFIELD(3,19) },
198 
        { "SH", 0x87c40000, 0x05440000, ZIP_OPUNUSED, ZIP_REGFIELD(27), ZIP_REGFIELD(14), ZIP_IMMFIELD(14,0), ZIP_BITFIELD(3,19) },
199 8 dgisselq 
        //
200 202 dgisselq 
        { "LB", 0x87c40000, 0x05800000, ZIP_REGFIELD(27), ZIP_OPUNUSED, ZIP_OPUNUSED, ZIP_IMMFIELD(18,0), ZIP_BITFIELD(3,19) },
201 
        { "LB", 0x87c40000, 0x05840000, ZIP_REGFIELD(27), ZIP_OPUNUSED, ZIP_REGFIELD(14), ZIP_IMMFIELD(14,0), ZIP_BITFIELD(3,19) },
202 8 dgisselq 
        //
203 202 dgisselq 
        { "SB", 0x87c40000, 0x05c00000, ZIP_OPUNUSED, ZIP_REGFIELD(27), ZIP_OPUNUSED, ZIP_IMMFIELD(18,0), ZIP_BITFIELD(3,19) },
204 
        { "SB", 0x87c40000, 0x05c40000, ZIP_OPUNUSED, ZIP_REGFIELD(27), ZIP_REGFIELD(14), ZIP_IMMFIELD(14,0), ZIP_BITFIELD(3,19) },
205 2 dgisselq 
        //
206 202 dgisselq 
        // 0rrr.r101.1
207 
        { "LDI",  0x87800000, 0x06000000, ZIP_REGFIELD(27),ZIP_OPUNUSED, ZIP_OPUNUSED, ZIP_IMMFIELD(23,0), ZIP_OPUNUSED },
208 
        // 0111.x111.00.xxxxxxxx
209 
        { "BRK",   0xf7ffffff, 0x77000000, ZIP_OPUNUSED, ZIP_OPUNUSED, ZIP_OPUNUSED, ZIP_OPUNUSED, ZIP_OPUNUSED },
210 
        { "BRK",   0xf7c00000, 0x77000000, ZIP_OPUNUSED, ZIP_OPUNUSED, ZIP_OPUNUSED, ZIP_IMMFIELD(22,0), ZIP_OPUNUSED },
211 
        { "LOCK",  0xf7ffffff, 0x77400000, ZIP_OPUNUSED, ZIP_OPUNUSED, ZIP_OPUNUSED, ZIP_OPUNUSED, ZIP_OPUNUSED },
212 
        { "LOCK",  0xf7c00000, 0x77400000, ZIP_OPUNUSED, ZIP_OPUNUSED, ZIP_OPUNUSED, ZIP_IMMFIELD(22,0), ZIP_OPUNUSED },
213 
        // 0.111x.00000.xxx.xxx.xxxx.xxxx.xxxx.xxxx
214 
        // 0111.x111.11.xxx.xxx.xxxx.xxxx.xxxx.xxxx
215 
        // SNOOP = SIM w/ no argument(s)
216 
        { "SIM",  0xf7ffffff, 0x77800000, ZIP_OPUNUSED, ZIP_OPUNUSED,    ZIP_OPUNUSED, ZIP_OPUNUSED,       ZIP_OPUNUSED },
217 
        { "SEXIT",0xf7ffffff, 0x77800100, ZIP_OPUNUSED, ZIP_OPUNUSED,    ZIP_OPUNUSED, ZIP_OPUNUSED,       ZIP_OPUNUSED },
218 
        { "SEXIT",0xf7fffff0, 0x77800310, ZIP_OPUNUSED, ZIP_URGFIELD(0), ZIP_OPUNUSED, ZIP_OPUNUSED,       ZIP_OPUNUSED },
219 
        { "SEXIT",0xf7ffffe0, 0x77800300, ZIP_OPUNUSED, ZIP_REGFIELD(0), ZIP_OPUNUSED, ZIP_OPUNUSED,       ZIP_OPUNUSED },
220 
        { "SEXIT",0xf7ffff00, 0x77800100, ZIP_OPUNUSED, ZIP_OPUNUSED,    ZIP_OPUNUSED, ZIP_IMMFIELD( 8,0), ZIP_OPUNUSED },
221 
        { "SDUMP",0xf7ffffff, 0x778002ff, ZIP_OPUNUSED, ZIP_OPUNUSED,    ZIP_OPUNUSED, ZIP_OPUNUSED,       ZIP_OPUNUSED },
222 
        { "SDUMP",0xf7fffff0, 0x77800200, ZIP_OPUNUSED, ZIP_REGFIELD(0), ZIP_OPUNUSED, ZIP_OPUNUSED,       ZIP_OPUNUSED },
223 
        { "SDUMP",0xf7fffff0, 0x77800210, ZIP_OPUNUSED, ZIP_URGFIELD(0), ZIP_OPUNUSED, ZIP_OPUNUSED,       ZIP_OPUNUSED },
224 
        { "SOUT", 0xf7fffff0, 0x77800230, ZIP_OPUNUSED, ZIP_URGFIELD(0), ZIP_OPUNUSED, ZIP_OPUNUSED,       ZIP_OPUNUSED },
225 
        { "SOUT", 0xf7ffffe0, 0x77800220, ZIP_OPUNUSED, ZIP_REGFIELD(0), ZIP_OPUNUSED, ZIP_OPUNUSED,       ZIP_OPUNUSED },
226 
        { "SOUT", 0xf7ffff00, 0x77800400, ZIP_OPUNUSED, ZIP_OPUNUSED,    ZIP_OPUNUSED, ZIP_IMMFIELD( 8,0), ZIP_OPUNUSED },
227 
        { "SDUMP",0xf7ffff00, 0x77800200, ZIP_OPUNUSED, ZIP_OPUNUSED,    ZIP_OPUNUSED, ZIP_IMMFIELD( 8,0), ZIP_OPUNUSED },
228 
        { "SIM",  0xf7c00000, 0x77800000, ZIP_OPUNUSED, ZIP_OPUNUSED,    ZIP_OPUNUSED, ZIP_IMMFIELD(22,0), ZIP_OPUNUSED },
229 
        { "NOOP", 0xf7ffffff, 0x77c00000, ZIP_OPUNUSED, ZIP_OPUNUSED,    ZIP_OPUNUSED, ZIP_OPUNUSED,       ZIP_OPUNUSED },
230 
        { "NEXIT",0xf7ffffff, 0x77c00100, ZIP_OPUNUSED, ZIP_OPUNUSED,    ZIP_OPUNUSED, ZIP_OPUNUSED,       ZIP_OPUNUSED },
231 
        { "NEXIT",0xf7ffff00, 0x77c00100, ZIP_OPUNUSED, ZIP_OPUNUSED,    ZIP_OPUNUSED, ZIP_IMMFIELD( 8,0), ZIP_OPUNUSED },
232 
        { "NEXIT",0xf7fffff0, 0x77c00310, ZIP_OPUNUSED, ZIP_URGFIELD(0), ZIP_OPUNUSED, ZIP_OPUNUSED,       ZIP_OPUNUSED },
233 
        { "NEXIT",0xf7ffffe0, 0x77c00300, ZIP_OPUNUSED, ZIP_REGFIELD(0), ZIP_OPUNUSED, ZIP_OPUNUSED,       ZIP_OPUNUSED },
234 
        { "NDUMP",0xf7ffffff, 0x77c002ff, ZIP_OPUNUSED, ZIP_OPUNUSED,    ZIP_OPUNUSED, ZIP_OPUNUSED,       ZIP_OPUNUSED },
235 
        { "NDUMP",0xf7fffff0, 0x77c00200, ZIP_OPUNUSED, ZIP_REGFIELD(0), ZIP_OPUNUSED, ZIP_OPUNUSED,       ZIP_OPUNUSED },
236 
        { "NDUMP",0xf7fffff0, 0x77c00210, ZIP_OPUNUSED, ZIP_URGFIELD(0), ZIP_OPUNUSED, ZIP_OPUNUSED,       ZIP_OPUNUSED },
237 
 
238 
        { "NOUT", 0xf7fffff0, 0x77c00230, ZIP_OPUNUSED, ZIP_URGFIELD(0), ZIP_OPUNUSED, ZIP_OPUNUSED,       ZIP_OPUNUSED },
239 
        { "NOUT", 0xf7ffffe0, 0x77c00220, ZIP_OPUNUSED, ZIP_REGFIELD(0), ZIP_OPUNUSED, ZIP_OPUNUSED,       ZIP_OPUNUSED },
240 
        { "NOUT", 0xf7ffff00, 0x77c00400, ZIP_OPUNUSED, ZIP_OPUNUSED,    ZIP_OPUNUSED, ZIP_IMMFIELD( 8,0), ZIP_OPUNUSED },
241 
        { "NDUMP",0xf7ffff00, 0x77c00200, ZIP_OPUNUSED, ZIP_OPUNUSED,    ZIP_OPUNUSED, ZIP_OPUNUSED,       ZIP_OPUNUSED },
242 
        { "NSIM", 0xf7c00000, 0x77c00000, ZIP_OPUNUSED, ZIP_OPUNUSED,    ZIP_OPUNUSED, ZIP_IMMFIELD(22,0), ZIP_OPUNUSED },
243 
        //
244 
        //
245 69 dgisselq 
        // 0rrr.r11f.ffcc.cxrr.rrii.iiii.iiii.iiii
246 202 dgisselq 
        { "FPADD",0x87c43fff, 0x06840000, ZIP_REGFIELD(27), ZIP_REGFIELD(27), ZIP_REGFIELD(14), ZIP_OPUNUSED, ZIP_BITFIELD(3,19) },
247 
        { "FPSUB",0x87c43fff, 0x06c40000, ZIP_REGFIELD(27), ZIP_REGFIELD(27), ZIP_REGFIELD(14), ZIP_OPUNUSED, ZIP_BITFIELD(3,19) },
248 
        { "FPMPY",0x87c43fff, 0x07040000, ZIP_REGFIELD(27), ZIP_REGFIELD(27), ZIP_REGFIELD(14), ZIP_OPUNUSED, ZIP_BITFIELD(3,19) },
249 
        { "FPDIV",0x87c43fff, 0x07440000, ZIP_REGFIELD(27), ZIP_REGFIELD(27), ZIP_REGFIELD(14), ZIP_OPUNUSED, ZIP_BITFIELD(3,19) },
250 
        { "FPI2F",0x87c40000, 0x07800000, ZIP_REGFIELD(27), ZIP_OPUNUSED, ZIP_OPUNUSED, ZIP_IMMFIELD(18,0), ZIP_BITFIELD(3,19) },
251 
        { "FPI2F",0x87c40000, 0x07840000, ZIP_REGFIELD(27), ZIP_OPUNUSED, ZIP_REGFIELD(14), ZIP_IMMFIELD(14,0), ZIP_BITFIELD(3,19) },
252 
        { "FPF2I",0x87c40000, 0x07c40000, ZIP_REGFIELD(27), ZIP_OPUNUSED, ZIP_REGFIELD(14), ZIP_IMMFIELD(14,0), ZIP_BITFIELD(3,19) },
253 2 dgisselq 
        //
254 
        //
255 
        //
256 
        //
257 
        //
258 69 dgisselq 
        //      16-bit instructions, high side
259 2 dgisselq 
        //
260 95 dgisselq 
        //
261 89 dgisselq 
        //      1.1111.00010.xcc.0iiii.xxxx.xxxxx.xxxxx
262 
        //      1111.1000.10xc.c0ii.iixx.xxxx.xxxx.xxxx
263 202 dgisselq 
        // Mask, val, result, Ra, Rb, I, condition (no conditions for OP_UNDER_TEST)
264 
        // BRA: 1.1111.011.0.sssssss
265 
        { "BRA", 0xff800000, 0xf9000000, ZIP_OPUNUSED, ZIP_OPUNUSED, ZIP_OPUNUSED, ZIP_IMMFIELD(7,16), ZIP_OPUNUSED },
266 
        // CLR: 1.rrrr.110.00000000
267 
        { "CLR", 0x87ff0000, 0x86000000, ZIP_REGFIELD(27), ZIP_OPUNUSED, ZIP_OPUNUSED, ZIP_OPUNUSED, ZIP_OPUNUSED },
268 
        // RTN: 1.1111.111.0.0000.000, MOV R0,Pc
269 
        { "RTN", 0xffff0000, 0xff800000, ZIP_OPUNUSED, ZIP_OPUNUSED, ZIP_OPUNUSED, ZIP_OPUNUSED, ZIP_OPUNUSED },
270 
        // JMP: 1.1111.111.0.rrrrsss
271 
        { "JMP", 0xff800000, 0xff000000, ZIP_REGFIELD(27),ZIP_OPUNUSED, ZIP_REGFIELD(19), ZIP_IMMFIELD(3,16), ZIP_OPUNUSED },
272 
        // LJSR: 1.000_0.011_.0.111_1.001 ?.1111.110.1.1111.000
273 
        // { "LJSR",0xffffffff, 0x83797ef8, ZIP_REGFIELD(27),ZIP_OPUNUSED, ZIP_REGFIELD(19), ZIP_IMMFIELD(3,16), ZIP_OPUNUSED },
274 2 dgisselq 
        //
275 202 dgisselq 
        // 1.rrrr.000.0.sssssss
276 
        // 1rrr.r000.0sss.ssss
277 
        { "SUB", 0x87800000, 0x80000000, ZIP_REGFIELD(27), ZIP_REGFIELD(27), ZIP_OPUNUSED, ZIP_IMMFIELD(7,16), ZIP_OPUNUSED },
278 
        // 1.rrrr.000.1.rrrrsss
279 
        { "SUB", 0x87800000, 0x80800000, ZIP_REGFIELD(27), ZIP_REGFIELD(27), ZIP_REGFIELD(19), ZIP_IMMFIELD(3,16), ZIP_OPUNUSED },
280 2 dgisselq 
        //
281 202 dgisselq 
        // 1.rrrr.001.0.sssssss
282 
        // 1.rrrr.001.1.rrrrsss
283 
        { "AND", 0x87800000, 0x81000000, ZIP_REGFIELD(27), ZIP_REGFIELD(27), ZIP_OPUNUSED, ZIP_IMMFIELD(7,16), ZIP_OPUNUSED },
284 
        { "AND", 0x87800000, 0x81800000, ZIP_REGFIELD(27), ZIP_REGFIELD(27), ZIP_REGFIELD(19), ZIP_IMMFIELD(3,16), ZIP_OPUNUSED },
285 69 dgisselq 
        //
286 202 dgisselq 
        // 1.rrrr.010.0.sssssss
287 
        // 1.rrrr.010.1.rrrrsss
288 
        { "ADD", 0x87800000, 0x82000000, ZIP_REGFIELD(27), ZIP_REGFIELD(27), ZIP_OPUNUSED, ZIP_IMMFIELD(7,16), ZIP_OPUNUSED },
289 
        { "ADD", 0x87800000, 0x82800000, ZIP_REGFIELD(27), ZIP_REGFIELD(27), ZIP_REGFIELD(19), ZIP_IMMFIELD(3,16), ZIP_OPUNUSED },
290 69 dgisselq 
        //
291 202 dgisselq 
        // 1.rrrr.011.a.rrrrsss
292 
        { "CMP", 0x87800000, 0x83000000, ZIP_REGFIELD(27), ZIP_OPUNUSED, ZIP_REGFIELD(19), ZIP_IMMFIELD(7,16), ZIP_OPUNUSED },
293 
        { "CMP", 0x87800000, 0x83800000, ZIP_REGFIELD(27), ZIP_OPUNUSED, ZIP_REGFIELD(19), ZIP_IMMFIELD(3,16), ZIP_OPUNUSED },
294 69 dgisselq 
        //
295 202 dgisselq 
        // 1.rrrr.100.0.sssssss
296 
        // 1.rrrr.100.1.rrrrsss
297 
        { "LW", 0x87800000, 0x84000000, ZIP_REGFIELD(27), ZIP_OPUNUSED, ZIP_SP, ZIP_IMMFIELD(7,16), ZIP_OPUNUSED },
298 
        { "LW", 0x87800000, 0x84800000, ZIP_REGFIELD(27), ZIP_OPUNUSED, ZIP_REGFIELD(19), ZIP_IMMFIELD(3,16), ZIP_OPUNUSED },
299 
        // 1.rrrr.101.ssssssss
300 
        { "SW", 0x87800000, 0x85000000, ZIP_OPUNUSED, ZIP_REGFIELD(27), ZIP_SP, ZIP_IMMFIELD(7,16), ZIP_OPUNUSED },
301 
        // 1.rrrr.110.0.sssssss
302 
        { "SW", 0x87800000, 0x85800000, ZIP_OPUNUSED, ZIP_REGFIELD(27), ZIP_REGFIELD(19), ZIP_IMMFIELD(3,16), ZIP_OPUNUSED },
303 
        // 1.rrrr.110.iiiiiiii
304 
        { "LDI", 0x87000000, 0x86000000, ZIP_REGFIELD(27), ZIP_OPUNUSED, ZIP_OPUNUSED, ZIP_IMMFIELD(8,16), ZIP_OPUNUSED },
305 
        // 1.rrrr.111.1.sssssss
306 
        { "MOV", 0x87800000, 0x87800000, ZIP_OPUNUSED, ZIP_REGFIELD(27), ZIP_REGFIELD(19), ZIP_IMMFIELD(3,16), ZIP_OPUNUSED },
307 69 dgisselq 
        //
308 202 dgisselq 
        // 1.rrrr.111.1.rrrrsss
309 2 dgisselq 
        // Illegal instruction !!
310 202 dgisselq 
        { "ILLV", 0x80000000, 0x80000000, ZIP_OPUNUSED, ZIP_OPUNUSED, ZIP_OPUNUSED, ZIP_IMMFIELD(32,16), ZIP_OPUNUSED },
311 
        // Global illegal instruction
312 
        { "ILL", 0x00000000, 0x00000000, ZIP_OPUNUSED, ZIP_OPUNUSED, ZIP_OPUNUSED, ZIP_IMMFIELD(32,0), ZIP_OPUNUSED }
313 2 dgisselq 
};
314 
 
315 202 dgisselq 
static const ZOPCODE    zip_opbottomlist_raw[] = {
316 69 dgisselq 
        //
317 
        //
318 
        //
319 
        //      16-bit instructions, low side ... treat these as special
320 
        //
321 
        //
322 202 dgisselq 
        // Mask, val, result, Ra, Rb, I, condition (no conditions for OP_UNDER_TEST)
323 
        // BRA: 1.xxx_xxxx_xxxx_xxxx_?.111_1.011.0.sssssss
324 
        { "BRA", 0x80007f80, 0x80007900, ZIP_OPUNUSED, ZIP_OPUNUSED, ZIP_OPUNUSED, ZIP_IMMFIELD(7,0), ZIP_OPUNUSED },
325 
        // CLR: 1.xxx_xxxx_xxxx_xxxx_?.rrr_r.101.0000_0000
326 
        { "CLR", 0x800007ff, 0x80000600, ZIP_REGFIELD(11), ZIP_OPUNUSED, ZIP_OPUNUSED, ZIP_OPUNUSED, ZIP_OPUNUSED },
327 
        // RTN: 1.1111.111.0.0000.000, MOV R0,Pc
328 
        { "RTN", 0x80007fff, 0x80007f80, ZIP_OPUNUSED, ZIP_OPUNUSED, ZIP_OPUNUSED, ZIP_OPUNUSED, ZIP_OPUNUSED },
329 
        // JMP: 1.1111.111.0.rrrrsss
330 
        { "JMP", 0x80007f80, 0x80007f00, ZIP_REGFIELD(11),ZIP_OPUNUSED, ZIP_REGFIELD(3), ZIP_IMMFIELD(3,0), ZIP_OPUNUSED },
331 
        // LJMP: 1.xxx_xxxx_xxxx_xxxx_?.111_1.100._1.111_1.000
332 
        { "LJMP", 0x80007fff, 0x80007cf8, ZIP_REGFIELD(11), ZIP_OPUNUSED, ZIP_REGFIELD(3), ZIP_IMMFIELD(3,0), ZIP_OPUNUSED },
333 69 dgisselq 
        //
334 202 dgisselq 
        // 1.rrrr.000.0.sssssss
335 
        { "SUB", 0x80000780, 0x80000000, ZIP_REGFIELD(11), ZIP_REGFIELD(11), ZIP_OPUNUSED, ZIP_IMMFIELD(7,0), ZIP_OPUNUSED },
336 
        // 1.rrrr.000.1.rrrrsss
337 
        { "SUB", 0x80000780, 0x80000080, ZIP_REGFIELD(11), ZIP_REGFIELD(11), ZIP_REGFIELD(3), ZIP_IMMFIELD(3,0), ZIP_OPUNUSED },
338 69 dgisselq 
        //
339 202 dgisselq 
        // 1.rrrr.001.0.sssssss
340 
        // 1.rrrr.001.1.rrrrsss
341 
        { "AND", 0x80000780, 0x80000100, ZIP_REGFIELD(11), ZIP_REGFIELD(11), ZIP_OPUNUSED, ZIP_IMMFIELD(7,0), ZIP_OPUNUSED },
342 
        { "AND", 0x80000780, 0x80000180, ZIP_REGFIELD(11), ZIP_REGFIELD(11), ZIP_REGFIELD(3), ZIP_IMMFIELD(3,0), ZIP_OPUNUSED },
343 95 dgisselq 
        //
344 202 dgisselq 
        // 1.rrrr.010.0.sssssss
345 
        // 1.rrrr.010.1.rrrrsss
346 
        { "ADD", 0x80000780, 0x80000200, ZIP_REGFIELD(11), ZIP_REGFIELD(11), ZIP_OPUNUSED, ZIP_IMMFIELD(7,0), ZIP_OPUNUSED },
347 
        { "ADD", 0x80000780, 0x80000280, ZIP_REGFIELD(11), ZIP_REGFIELD(11), ZIP_REGFIELD(3), ZIP_IMMFIELD(3,0), ZIP_OPUNUSED },
348 69 dgisselq 
        //
349 202 dgisselq 
        // 1.rrrr.011.a.rrrrsss
350 
        { "CMP", 0x80000780, 0x80000300, ZIP_REGFIELD(11), ZIP_OPUNUSED, ZIP_OPUNUSED, ZIP_IMMFIELD(7,0), ZIP_OPUNUSED },
351 
        { "CMP", 0x80000780, 0x80000380, ZIP_REGFIELD(11), ZIP_OPUNUSED, ZIP_REGFIELD(3), ZIP_IMMFIELD(3,0), ZIP_OPUNUSED },
352 69 dgisselq 
        //
353 202 dgisselq 
        // 1.rrrr.100.0.sssssss
354 
        // 1.rrrr.100.1.rrrrsss
355 
        { "LW", 0x80000780, 0x80000400, ZIP_REGFIELD(11), ZIP_OPUNUSED, ZIP_SP, ZIP_IMMFIELD(7,0), ZIP_OPUNUSED },
356 
        { "LW", 0x80000780, 0x80000480, ZIP_REGFIELD(11), ZIP_OPUNUSED, ZIP_REGFIELD(3), ZIP_IMMFIELD(3,0), ZIP_OPUNUSED },
357 
        // 1.rrrr.101.ssssssss
358 
        { "SW", 0x80000780, 0x80000500, ZIP_OPUNUSED, ZIP_REGFIELD(11), ZIP_SP, ZIP_IMMFIELD(7,0), ZIP_OPUNUSED },
359 
        { "SW", 0x80000780, 0x80000580, ZIP_OPUNUSED, ZIP_REGFIELD(11), ZIP_REGFIELD(3), ZIP_IMMFIELD(3,0), ZIP_OPUNUSED },
360 
        // 1.rrr_r.110.ssssssss
361 
        { "LDI", 0x80000700, 0x80000600, ZIP_REGFIELD(11), ZIP_OPUNUSED, ZIP_OPUNUSED, ZIP_IMMFIELD(8,0), ZIP_OPUNUSED },
362 
        // 1.rrr_r.111_.x.rrr_rsss
363 
        { "MOV", 0x80000780, 0x80000780, ZIP_REGFIELD(11), ZIP_OPUNUSED, ZIP_REGFIELD(3), ZIP_IMMFIELD(3,0), ZIP_OPUNUSED },
364 69 dgisselq 
        //
365 
        //
366 202 dgisselq 
        // Illegal instruction !!
367 
        { "ILLV",       0x80000000, 0x80000000, ZIP_OPUNUSED, ZIP_OPUNUSED, ZIP_OPUNUSED, ZIP_IMMFIELD(15,0), ZIP_OPUNUSED },
368 
        { "ILL",        0x00000000, 0x00000000, ZIP_OPUNUSED, ZIP_OPUNUSED, ZIP_OPUNUSED, ZIP_IMMFIELD(15,0), ZIP_OPUNUSED }
369 
};
370 
 
371 
const ZOPCODE   *zip_oplist = zip_oplist_raw,
372 
                *zip_opbottomlist = zip_opbottomlist_raw;
373 
 
374 
const int       nzip_oplist = (sizeof(zip_oplist_raw)/sizeof(ZOPCODE));
375 
const int       nzip_opbottom = (sizeof(zip_opbottomlist_raw)/sizeof(ZOPCODE));
376 
 
377 
 
378 
static inline   int
379 
TWOWORD_LOAD(uint32_t one, uint32_t two) {
380 
        // BREV followed by LODILO
381 
        if (((one&0x87c40000)==0x02000000)&&((two&0x87c40000)==0x02400000)
382 
                // Must be to the same register too, and on the same condition
383 
                &&(((one^two)&0xf8380000)==0))
384 
                return 1;
385 
        return 0;
386 
}
387 
 
388 
static  inline  int
389 
OFFSET_PC_MOV(uint32_t ins) {
390 
        // 0.xxxx.01101.ccc.0.1111.0.iiiiiiiiiiiii
391 
        // 0xxx.x011.01cc.c011.110i.iiii.iiii.iiii
392 69 dgisselq 
        //
393 202 dgisselq 
        return ((ins & 0x87c7e000)==0x0343c000);
394 
}
395 
 
396 
static  inline  int
397 
TWOWORD_LJMP(uint32_t iword) {
398 
        // LJMP a long jump instruction, for which the address of the target
399 
        // is found in the next word
400 
        if (iword==0x7c87c000)
401 
                return 1;
402 
        // Now, the CIS form ... an
403 
        // Unconditional LJMP in the second half word
404 
        if ((iword&0x80007fff)==0x80007cf8)
405 
                return 1;
406 
        return 0;
407 
}
408 
 
409 
 
410 
static  inline  int
411 
TWOWORD_JSR(uint32_t iword, uint32_t nxtword) {
412 
        // First word moves the return address to R0
413 
        if (iword != 0x0343c001)
414 
                return 0;
415 
        // Second word is a BRA statement to ... anywhere
416 
        // 0.1111.00010.ccc.0.iiiiiiiiiiiiiiiiii
417 
        // 0111.1000.10cc.c0ii.iiii.iiii.iiii.iiii
418 
        if ((nxtword&0xffc40000) == 0x78800000)
419 
                return 1;
420 
        return 0;
421 
}
422 
 
423 
static  inline  int
424 
THREEWORD_LJSR(uint32_t iword, uint32_t nxtword) {
425 
        // First word moves the return address to R0
426 
        if (iword!=0x0343c002)
427 
                return 0;
428 
        // Second word is an LJMP statement
429 
        if (nxtword==0x7c87c000)
430 
                return 1;
431 
        return 0;
432 
}
433 
 
434 
static  inline  int
435 
TWOWORD_CIS_JSR(uint32_t iword) {
436 
        // MOV 2(PC) | LOD (PC),PC
437 69 dgisselq 
        //
438 202 dgisselq 
        // 1.0000.111.1.1111.010
439 
        //                      1.1111.100.1.1111.000
440 
        if (iword == 0x87fafcf8)
441 
                return 1;
442 
        return 0;
443 
}
444 
 
445 
static  inline  int
446 
CIS_JSR(uint32_t iword __attribute__((unused)) ) {
447 
        if (TWOWORD_CIS_JSR(iword))
448 
                return 1;
449 
        // MOV 1(PC) | MOV Rx,PC
450 69 dgisselq 
        //
451 202 dgisselq 
        // 1.0000.111.1.1111.001
452 
        //                      1.1111.111.1.xxxx.000
453 
        if ((iword&0xffffff87) == 0x87f9ff80)
454 
                return 1;
455 
        return 0;
456 
}
457 
 
458 
static inline   int
459 
POSSIBLE_TWOWORD_BEGINNING(uint32_t iword) {
460 
        // Unconditional LJMP
461 
        if (TWOWORD_LJMP(iword))
462 
                return 1;
463 
        // MOV 1(PC),PC
464 
        if (iword == 0x0343c001)
465 
                return 1;
466 
        // MOV 2(PC),PC
467 
        if (iword == 0x0343c002)
468 
                return 1;
469 
        if (CIS_JSR(iword))
470 
                return 1;
471 
        // The conditional LJMP is three words, which we don't handle ...
472 
        // Any BREV command could be the beginning of a twoword instruction
473 69 dgisselq 
        //
474 202 dgisselq 
        // Of course, the point here is to determine whether we should (or need
475 
        // to) read a second word from our read-memory function.  Reading a
476 
        // second word, given that the first is a BREV, isn't a problem since a
477 
        // program can't end on/with a BREV instruction.
478 69 dgisselq 
        //
479 202 dgisselq 
        // BREV #,Rx
480 
        if ((iword&0x87c40000)==0x02000000)
481 
                return 1;
482 
        return 0;
483 
}
484 69 dgisselq 
 
485 
 
486 202 dgisselq 
static uint32_t
487 
zip_bitreverse(uint32_t v) {
488 
        uint32_t r=0, b;
489 
        for(b=0; b<32; b++, v>>=1)
490 
                r = (r<<1)|(v&1);
491 
        return r;
492 
}
493 2 dgisselq 
 
494 202 dgisselq 
static inline   uint32_t
495 
TWOWORD_VALUE(uint32_t one, uint32_t two) {
496 
        return ((two&0x0ffff)|(zip_bitreverse(one&0x0ffff)));
497 
}
498 
 
499 
static long
500 
zip_sbits(const long val, const int bits) {
501 
        long    r;
502 
 
503 
        r = val & ((1l<<bits)-1);
504 
        if (r & (1l << (bits-1)))
505 
                r |= (-1l << bits);
506 
        return r;
507 
}
508 
 
509 
static unsigned long
510 
zip_ubits(const long val, const int bits) {
511 
        unsigned long r = val & ((1l<<bits)-1);
512 
        return r;
513 
}
514 
 
515 
static  int
516 
zip_getbits(const ZIPI ins, const int which)
517 
{
518 2 dgisselq 
        if (which & 0x40000000) {
519 202 dgisselq 
                return zip_sbits(ins>>(which & 0x03f), (which>>8)&0x03f);
520 70 dgisselq 
        } else { // if (which &0x03f)
521 202 dgisselq 
                return zip_ubits(ins>>(which & 0x03f), (which>>8)&0x03f)
522 2 dgisselq 
                        + ((which>>16)&0x0ff);
523 70 dgisselq 
        }
524 2 dgisselq 
}
525 
 
526 202 dgisselq 
static  void
527 
zipi_to_halfstring(const uint32_t addr, const ZIPI ins, char *line, const ZOPCODE *listp) {
528 
 
529 
        if (OFFSET_PC_MOV(ins)) {
530 
                int     cv = zip_getbits(ins, ZIP_BITFIELD(3,19));
531 
                int     dv = zip_getbits(ins, ZIP_REGFIELD(27));
532 
                int     iv = zip_sbits(ins, 13);
533 
                uint32_t        ref;
534 
 
535 
                ref = (iv<<2) + addr + 4;
536 
 
537 
                sprintf(line, "%s%s", "MOV", zip_ccstr[cv]);
538 
                sprintf(line, "%-11s", line);
539 
                sprintf(line, "%s0x%08x", line, ref);
540 
                sprintf(line, "%s,%s", line, zip_regstr[dv]);
541 
 
542 
                return;
543 
        } else if (TWOWORD_CIS_JSR(ins)) {
544 
                sprintf(line, "%-11s", "LJSR");
545 
                return;
546 
        } else if (CIS_JSR(ins)) {
547 
                int ra = zip_getbits(ins, ZIP_REGFIELD(3));
548 
                sprintf(line, "%-11s%s", "JSR", zip_regstr[ra]);
549 
                return;
550 
        }
551 
 
552 
        int     i;
553 
        for(i=0; i<nzip_oplist; i++) {
554 
                if (((~zip_oplist[i].s_mask)&zip_oplist[i].s_val)!=0) {
555 69 dgisselq 
                        printf("Instruction %d, %s, fails consistency check\n",
556 202 dgisselq 
                                i, zip_oplist[i].s_opstr);
557 
                        printf("%08x & %08x = %08x != %08x\n",
558 
                                zip_oplist[i].s_mask,
559 
                                zip_oplist[i].s_val,
560 
                                (~zip_oplist[i].s_mask)&zip_oplist[i].s_val,
561 
                                0);
562 
                        assert(((~zip_oplist[i].s_mask)&zip_oplist[i].s_val)==0);
563 69 dgisselq 
                }
564 70 dgisselq 
        } line[0] = '\0';
565 202 dgisselq 
        for(i=0; (listp[i].s_mask != 0); i++) {
566 2 dgisselq 
                // printf("%2d: %6s %08x & %08x == %08x\n",
567 202 dgisselq 
                        // i, zip_oplist[i].s_opstr, ins,
568 
                        // zip_oplist[i].s_mask, zip_oplist[i].s_val);
569 70 dgisselq 
                if ((ins & listp[i].s_mask) == listp[i].s_val) {
570 202 dgisselq 
                        // Write the opcode onto our line
571 70 dgisselq 
                        sprintf(line, "%s", listp[i].s_opstr);
572 89 dgisselq 
                        if (listp[i].s_cf != ZIP_OPUNUSED) {
573 202 dgisselq 
                                int bv = zip_getbits(ins, listp[i].s_cf);
574 
                                strcat(line, zip_ccstr[bv]);
575 
                        } sprintf(line, "%-11s", line); // Pad it to 11 chars
576 2 dgisselq 
 
577 202 dgisselq 
                        int     ra = -1, rb = -1, rr = -1, imv = 0;
578 
 
579 
                        if (listp[i].s_result != ZIP_OPUNUSED)
580 
                                rr = zip_getbits(ins, listp[i].s_result);
581 
                        if (listp[i].s_ra != ZIP_OPUNUSED)
582 
                                ra = zip_getbits(ins, listp[i].s_ra);
583 
                        if (listp[i].s_rb != ZIP_OPUNUSED)
584 
                                rb = zip_getbits(ins, listp[i].s_rb);
585 
                        if (listp[i].s_i != ZIP_OPUNUSED)
586 
                                imv = zip_getbits(ins, listp[i].s_i);
587 
 
588 
                        if ((listp[i].s_rb != ZIP_OPUNUSED)&&(rb == 15))
589 
                                imv <<= 2;
590 
 
591 2 dgisselq 
                        // Treat stores special
592 202 dgisselq 
                        if ((strncasecmp("SW",listp[i].s_opstr, 2)==0)
593 
                                ||(strncasecmp("SH",listp[i].s_opstr, 2)==0)
594 
                                ||(strncasecmp("SB",listp[i].s_opstr, 2)==0)) {
595 
                                strcat(line, zip_regstr[ra]);
596 2 dgisselq 
                                strcat(line, ",");
597 
 
598 89 dgisselq 
                                if (listp[i].s_i != ZIP_OPUNUSED) {
599 202 dgisselq 
                                        if (listp[i].s_rb == ZIP_OPUNUSED)
600 2 dgisselq 
                                                sprintf(&line[strlen(line)],
601 202 dgisselq 
                                                        "($%d)", imv);
602 2 dgisselq 
                                        else if (imv != 0)
603 
                                                sprintf(&line[strlen(line)],
604 202 dgisselq 
                                                        "$%d", imv);
605 89 dgisselq 
                                } if (listp[i].s_rb != ZIP_OPUNUSED) {
606 2 dgisselq 
                                        sprintf(&line[strlen(line)],
607 202 dgisselq 
                                                "(%s)", zip_regstr[rb]);
608 2 dgisselq 
                                }
609 202 dgisselq 
                        // Treat long jumps special
610 
                        } else if (strncasecmp("LJMP",listp[i].s_opstr, 3)==0) {
611 
                        // Treat relative jumps (branches) specially as well
612 
                        } else if ((toupper(listp[i].s_opstr[0]=='B'))
613 
                                &&(strcasecmp(listp[i].s_opstr,"BUSY")!=0)
614 
                                &&(strcasecmp(listp[i].s_opstr,"BREV")!=0)
615 
                                &&(strcasecmp(listp[i].s_opstr,"BRK")!=0)
616 
                                &&(addr != 0)) {
617 
                                // Branch instruction: starts with B and isn't
618 
                                // BREV (bit reverse), BRK (break), or
619 
                                // BUSY
620 
                                uint32_t target = addr;
621 2 dgisselq 
 
622 202 dgisselq 
                                target += zip_getbits(ins, listp[i].s_i)+4;
623 
                                sprintf(&line[strlen(line)], "@0x%08x", target);
624 2 dgisselq 
                        } else {
625 202 dgisselq 
                                int memop = 0;
626 
                                if (('L'==toupper(listp[i].s_opstr[0]))
627 
                                        &&(('W'==toupper(listp[i].s_opstr[1]))
628 
                                         ||('H'==toupper(listp[i].s_opstr[1]))
629 
                                         ||('B'==toupper(listp[i].s_opstr[1])))
630 
                                        &&(!listp[i].s_opstr[2]))
631 
                                        memop = 1;
632 
 
633 89 dgisselq 
                                if (listp[i].s_i != ZIP_OPUNUSED) {
634 202 dgisselq 
                                        if((memop)&&(listp[i].s_rb == ZIP_OPUNUSED))
635 2 dgisselq 
                                                sprintf(&line[strlen(line)],
636 202 dgisselq 
                                                        "($%d)", imv);
637 
                                        else if((memop)&&(imv != 0))
638 
                                                sprintf(&line[strlen(line)],
639 
                                                        "%d", imv);
640 
                                        else if((!memop)&&((imv != 0)||(listp[i].s_rb == ZIP_OPUNUSED)))
641 
                                                sprintf(&line[strlen(line)],
642 2 dgisselq 
                                                        "$%d%s", imv,
643 202 dgisselq 
                                                        (listp[i].s_rb!=ZIP_OPUNUSED)?"+":"");
644 89 dgisselq 
                                } if (listp[i].s_rb != ZIP_OPUNUSED) {
645 2 dgisselq 
                                        if (memop)
646 
                                                sprintf(&line[strlen(line)],
647 202 dgisselq 
                                                        "(%s)", zip_regstr[rb]);
648 2 dgisselq 
                                        else
649 202 dgisselq 
                                                strcat(line, zip_regstr[rb]);
650 89 dgisselq 
                                } if(((listp[i].s_i != ZIP_OPUNUSED)||(listp[i].s_rb != ZIP_OPUNUSED))
651 
                                        &&((listp[i].s_ra != ZIP_OPUNUSED)||(listp[i].s_result != ZIP_OPUNUSED)))
652 2 dgisselq 
                                        strcat(line, ",");
653 
 
654 89 dgisselq 
                                if (listp[i].s_ra != ZIP_OPUNUSED) {
655 202 dgisselq 
                                        strcat(line, zip_regstr[ra]);
656 89 dgisselq 
                                } else if (listp[i].s_result != ZIP_OPUNUSED) {
657 202 dgisselq 
                                        strcat(line, zip_regstr[rr]);
658 2 dgisselq 
                                }
659 
                        }
660 
                        break;
661 
                }
662 70 dgisselq 
        } if (line[0] == '\0') {
663 
                sprintf(line, "ILL %08x", ins);
664 2 dgisselq 
        }
665 
}
666 
 
667 202 dgisselq 
void
668 
zipi_to_double_string(const uint32_t addr, const ZIPI ins, char *la, char *lb) {
669 
        zipi_to_halfstring(addr, ins, la, zip_oplist);
670 70 dgisselq 
        if (lb) {
671 202 dgisselq 
                if ((ins & 0x80000000)&&(!CIS_JSR(ins))) {
672 
                        zipi_to_halfstring(addr, ins, lb, zip_opbottomlist);
673 70 dgisselq 
                } else lb[0] = '\0';
674 
        }
675 
}
676 
 
677 202 dgisselq 
unsigned int    zop_early_branch(const unsigned int pc, const ZIPI insn) {
678 
        if ((insn & 0xf8000000) != 0x78000000)
679 
                return pc+4;
680 
        if ((insn & 0xffc60000) == 0x78800000)  // BRA high bit clear
681 
                return (pc + 4 + ((insn & 0x3ffff)<<2));
682 
        if ((insn & 0xffc60000) == 0x78820000)  // BRA high bit set (negative)
683 
                return (pc + 4 + ((0x40000 - (insn & 0x3ffff))<<2));
684 
        return pc+4;
685 70 dgisselq 
}
686 
 
687 
 

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