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dgisselq |
////////////////////////////////////////////////////////////////////////////////
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//
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// Filename: zopcodes.cpp
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//
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// Project: Zip CPU -- a small, lightweight, RISC CPU core
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//
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dgisselq |
// Purpose: A simple program to handle the disassembly and definition
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// of the various Zip Assembly opcodes. The primary function
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// of this file is the zipi_to_string, or Zip Instruction to
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// string (disassemble) conversion.
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2 |
dgisselq |
//
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// Creator: Dan Gisselquist, Ph.D.
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// Gisselquist Tecnology, LLC
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//
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////////////////////////////////////////////////////////////////////////////////
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//
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// Copyright (C) 2015, Gisselquist Technology, LLC
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//
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// This program is free software (firmware): you can redistribute it and/or
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// modify it under the terms of the GNU General Public License as published
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// by the Free Software Foundation, either version 3 of the License, or (at
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// your option) any later version.
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//
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// This program is distributed in the hope that it will be useful, but WITHOUT
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// ANY WARRANTY; without even the implied warranty of MERCHANTIBILITY or
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// FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
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// for more details.
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//
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// You should have received a copy of the GNU General Public License along
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// with this program. (It's in the $(ROOT)/doc directory, run make with no
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// target there if the PDF file isn't present.) If not, see
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// <http://www.gnu.org/licenses/> for a copy.
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//
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// License: GPL, v3, as defined and found on www.gnu.org,
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// http://www.gnu.org/licenses/gpl.html
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//
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//
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////////////////////////////////////////////////////////////////////////////////
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#include <stdio.h>
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#include <strings.h>
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#include <string.h>
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#include <assert.h>
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#include "twoc.h"
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#include "zopcodes.h"
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const char *zop_regstr[] = {
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"R0", "R1", "R2", "R3",
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"R4", "R5", "R6", "R7",
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"R8", "R9", "R10","R11",
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"R12","SP", "CC", "PC",
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"uR0", "uR1", "uR2", "uR3",
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"uR4", "uR5", "uR6", "uR7",
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"uR8", "uR9", "uR10", "uR11",
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"uR12", "uSP", "uCC", "uPC",
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"sR0", "sR1", "sR2", "sR3",
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"sR4", "sR5", "sR6", "sR7",
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"sR8", "sR9", "sR10","sR11",
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"sR12","sSP", "sCC", "sPC"
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};
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const char *zop_ccstr[] = {
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"", ".Z", ".NE", ".GE", ".GT", ".LT", ".C", ".V"
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};
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const ZOPCODE zoplist[] = {
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// Special case instructions. These are general instructions, but with
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// special opcodes
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// Conditional branches
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dgisselq |
"BUSY", 0xff1fffff, 0x2f0f7fff, OPUNUSED, OPUNUSED, OPUNUSED, OPUNUSED, BITFIELD(3,21),
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dgisselq |
"BRA", 0xffff8000, 0x2f0f0000, OPUNUSED, OPUNUSED, OPUNUSED, IMMFIELD(15,0), OPUNUSED,
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"BRZ", 0xffff8000, 0x2f2f0000, OPUNUSED, OPUNUSED, OPUNUSED, IMMFIELD(15,0), OPUNUSED,
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"BNZ", 0xffff8000, 0x2f4f0000, OPUNUSED, OPUNUSED, OPUNUSED, IMMFIELD(15,0), OPUNUSED,
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"BGE", 0xffff8000, 0x2f6f0000, OPUNUSED, OPUNUSED, OPUNUSED, IMMFIELD(15,0), OPUNUSED,
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"BGT", 0xffff8000, 0x2f8f0000, OPUNUSED, OPUNUSED, OPUNUSED, IMMFIELD(15,0), OPUNUSED,
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"BLT", 0xffff8000, 0x2faf0000, OPUNUSED, OPUNUSED, OPUNUSED, IMMFIELD(15,0), OPUNUSED,
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"BRC", 0xffff8000, 0x2fcf0000, OPUNUSED, OPUNUSED, OPUNUSED, IMMFIELD(15,0), OPUNUSED,
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"BRV", 0xffff8000, 0x2fef0000, OPUNUSED, OPUNUSED, OPUNUSED, IMMFIELD(15,0), OPUNUSED,
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// CLR
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"CLRF", 0xff1f0000, 0xc0100000, REGFIELD(24), OPUNUSED, OPUNUSED, OPUNUSED, BITFIELD(3,21),
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"CLRF", 0xff1f0000, 0xc1110000, REGFIELD(24), OPUNUSED, OPUNUSED, OPUNUSED, BITFIELD(3,21),
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"CLRF", 0xff1f0000, 0xc2120000, REGFIELD(24), OPUNUSED, OPUNUSED, OPUNUSED, BITFIELD(3,21),
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"CLRF", 0xff1f0000, 0xc3130000, REGFIELD(24), OPUNUSED, OPUNUSED, OPUNUSED, BITFIELD(3,21),
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"CLRF", 0xff1f0000, 0xc4140000, REGFIELD(24), OPUNUSED, OPUNUSED, OPUNUSED, BITFIELD(3,21),
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"CLRF", 0xff1f0000, 0xc5150000, REGFIELD(24), OPUNUSED, OPUNUSED, OPUNUSED, BITFIELD(3,21),
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"CLRF", 0xff1f0000, 0xc6160000, REGFIELD(24), OPUNUSED, OPUNUSED, OPUNUSED, BITFIELD(3,21),
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"CLRF", 0xff1f0000, 0xc7170000, REGFIELD(24), OPUNUSED, OPUNUSED, OPUNUSED, BITFIELD(3,21),
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"CLRF", 0xff1f0000, 0xc8180000, REGFIELD(24), OPUNUSED, OPUNUSED, OPUNUSED, BITFIELD(3,21),
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"CLRF", 0xff1f0000, 0xc9190000, REGFIELD(24), OPUNUSED, OPUNUSED, OPUNUSED, BITFIELD(3,21),
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"CLRF", 0xff1f0000, 0xca1a0000, REGFIELD(24),OPUNUSED, OPUNUSED, OPUNUSED, BITFIELD(3,21),
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"CLRF", 0xff1f0000, 0xcb1b0000, REGFIELD(24),OPUNUSED, OPUNUSED, OPUNUSED, BITFIELD(3,21),
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"CLRF", 0xff1f0000, 0xcc1c0000, REGFIELD(24),OPUNUSED, OPUNUSED, OPUNUSED, BITFIELD(3,21),
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"CLRF", 0xff1f0000, 0xcd1d0000, REGFIELD(24),OPUNUSED, OPUNUSED, OPUNUSED, BITFIELD(3,21),
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"CLRF", 0xff1f0000, 0xce1e0000, REGFIELD(24),OPUNUSED, OPUNUSED, OPUNUSED, BITFIELD(3,21),
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"CLRF", 0xff1f0000, 0xcf1f0000, REGFIELD(24),OPUNUSED, OPUNUSED, OPUNUSED, BITFIELD(3,21),
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//
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"CLR", 0xf0ffffff, 0x30000000, REGFIELD(24),OPUNUSED, OPUNUSED, OPUNUSED, OPUNUSED,
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//
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"HALT", 0xff10007f, 0xbe000010, OPUNUSED, OPUNUSED, OPUNUSED, OPUNUSED, BITFIELD(3,21),
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// The "wait" instruction is identical, with the only difference being
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// the interrrupt context of the processor. Hence we allow both
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// instructions here.
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"WAIT", 0xff10007f, 0xbe000010, OPUNUSED, OPUNUSED, OPUNUSED, OPUNUSED, BITFIELD(3,21),
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//
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"INT", 0xff10007f, 0x9e00005f, OPUNUSED, OPUNUSED, OPUNUSED, OPUNUSED, BITFIELD(3,21),
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// Return to user space
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"RTU", 0xff10007f, 0xbe000020, OPUNUSED, OPUNUSED, OPUNUSED, OPUNUSED, BITFIELD(3,21),
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// JMP (possibly a conditional jump, if not covered by branches above)
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"JMP", 0xff108000, 0x2f000000, OPUNUSED,OPUNUSED, REGFIELD(16), IMMFIELD(15,0), BITFIELD(3,21),
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"JMP", 0xff108000, 0x2f008000, OPUNUSED,OPUNUSED, URGFIELD(16), IMMFIELD(15,0), BITFIELD(3,21),
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"LJMP", 0xff100000, 0xaf000000, OPUNUSED,OPUNUSED, OPUNUSED, IMMFIELD(19,0), BITFIELD(3,21),
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// NOT
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"NOT", 0xf01fffff, 0xc00fffff, REGFIELD(24), OPUNUSED, OPUNUSED, OPUNUSED, BITFIELD(3,21),
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// General instructions
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"CMP", 0xf0100000, 0x00000000, OPUNUSED, REGFIELD(24), OPUNUSED, IMMFIELD(19,0), BITFIELD(3,21),
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"CMP", 0xf0100000, 0x00100000, OPUNUSED, REGFIELD(24), REGFIELD(16), IMMFIELD(16,0), BITFIELD(3,21),
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"TST", 0xf0100000, 0x10000000, OPUNUSED, REGFIELD(24), OPUNUSED, IMMFIELD(19,0), BITFIELD(3,21),
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"TST", 0xf0100000, 0x10100000, OPUNUSED, REGFIELD(24), REGFIELD(16), IMMFIELD(16,0), BITFIELD(3,21),
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// map bit = 1 (interrupts enabled) specifies user reg
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"MOV", 0xf0108000, 0x20000000, REGFIELD(24),OPUNUSED, REGFIELD(16), IMMFIELD(15,0), BITFIELD(3,21),
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"MOV", 0xf0108000, 0x20100000, URGFIELD(24),OPUNUSED, REGFIELD(16), IMMFIELD(15,0), BITFIELD(3,21),
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"MOV", 0xf0108000, 0x20008000, REGFIELD(24),OPUNUSED, URGFIELD(16), IMMFIELD(15,0), BITFIELD(3,21),
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"MOV", 0xf0108000, 0x20108000, URGFIELD(24),OPUNUSED, URGFIELD(16), IMMFIELD(15,0), BITFIELD(3,21),
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//
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"LDI", 0xf0000000, 0x30000000, REGFIELD(24),OPUNUSED, OPUNUSED, IMMFIELD(24,0), OPUNUSED,
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//
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128 |
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"NOOP", 0xffffffff, 0x4e000000, OPUNUSED, OPUNUSED, OPUNUSED, OPUNUSED, OPUNUSED,
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"BRK", 0xffffffff, 0x4e000001, OPUNUSED, OPUNUSED, OPUNUSED, OPUNUSED, OPUNUSED,
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//
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"LDILO",0xff100000, 0x4f000000, REGFIELD(16),OPUNUSED, OPUNUSED, IMMFIELD(16,0), BITFIELD(3,21),
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"LDIHI",0xff100000, 0x4f100000, REGFIELD(16),OPUNUSED, OPUNUSED, IMMFIELD(16,0), BITFIELD(3,21),
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//
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dgisselq |
"MPYU", 0xf01f0000, 0x400f0000, REGFIELD(24), REGFIELD(24), OPUNUSED, IMMFIELD(15,0), BITFIELD(3,21),
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135 |
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"MPYU", 0xf0100000, 0x40000000, REGFIELD(24), REGFIELD(24), REGFIELD(16), IMMFIELD(15,0), BITFIELD(3,21),
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"MPYS", 0xf01f0000, 0x401f0000, REGFIELD(24), REGFIELD(24), OPUNUSED, IMMFIELD(15,0), BITFIELD(3,21),
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"MPYS", 0xf0100000, 0x40100000, REGFIELD(24), REGFIELD(24), REGFIELD(16), IMMFIELD(15,0), BITFIELD(3,21),
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dgisselq |
//
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"ROL", 0xf0100000, 0x50000000, REGFIELD(24), REGFIELD(24), OPUNUSED, IMMFIELD(5,0), BITFIELD(3,21),
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140 |
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"ROL", 0xf0100000, 0x50100000, REGFIELD(24), REGFIELD(24), REGFIELD(16), IMMFIELD(5,0), BITFIELD(3,21),
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//
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46 |
dgisselq |
"RETN", 0xff1fffff, 0x6f1d0001, OPUNUSED, OPUNUSED, OPUNUSED, OPUNUSED, BITFIELD(3,21),
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2 |
dgisselq |
"LOD", 0xf0100000, 0x60000000, REGFIELD(24), OPUNUSED, OPUNUSED, IMMFIELD(19,0), BITFIELD(3,21),
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"LOD", 0xf0100000, 0x60100000, REGFIELD(24), OPUNUSED, REGFIELD(16), IMMFIELD(16,0), BITFIELD(3,21),
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//
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"STO", 0xf0100000, 0x70000000, OPUNUSED, REGFIELD(24), OPUNUSED, IMMFIELD(19,0), BITFIELD(3,21),
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"STO", 0xf0100000, 0x70100000, OPUNUSED, REGFIELD(24), REGFIELD(16), IMMFIELD(16,0), BITFIELD(3,21),
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148 |
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//
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149 |
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"SUB", 0xf0100000, 0x80000000, REGFIELD(24), REGFIELD(24), OPUNUSED, IMMFIELD(19,0), BITFIELD(3,21),
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150 |
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"SUB", 0xf0100000, 0x80100000, REGFIELD(24), REGFIELD(24), REGFIELD(16), IMMFIELD(16,0), BITFIELD(3,21),
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151 |
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//
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152 |
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"AND", 0xf0100000, 0x90000000, REGFIELD(24), REGFIELD(24), OPUNUSED, IMMFIELD(19,0), BITFIELD(3,21),
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153 |
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"AND", 0xf0100000, 0x90100000, REGFIELD(24), REGFIELD(24), REGFIELD(16), IMMFIELD(16,0), BITFIELD(3,21),
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154 |
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//
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155 |
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"ADD", 0xf0100000, 0xa0000000, REGFIELD(24), REGFIELD(24), OPUNUSED, IMMFIELD(19,0), BITFIELD(3,21),
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156 |
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"ADD", 0xf0100000, 0xa0100000, REGFIELD(24), REGFIELD(24), REGFIELD(16), IMMFIELD(16,0), BITFIELD(3,21),
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157 |
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//
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158 |
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"OR", 0xf0100000, 0xb0000000, REGFIELD(24), REGFIELD(24), OPUNUSED, IMMFIELD(19,0), BITFIELD(3,21),
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159 |
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"OR", 0xf0100000, 0xb0100000, REGFIELD(24), REGFIELD(24), REGFIELD(16), IMMFIELD(16,0), BITFIELD(3,21),
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160 |
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//
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161 |
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"XOR", 0xf0100000, 0xc0000000, REGFIELD(24), REGFIELD(24), OPUNUSED, IMMFIELD(19,0), BITFIELD(3,21),
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162 |
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"XOR", 0xf0100000, 0xc0100000, REGFIELD(24), REGFIELD(24), REGFIELD(16), IMMFIELD(16,0), BITFIELD(3,21),
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163 |
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//
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164 |
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"LSL", 0xf0100000, 0xd0000000, REGFIELD(24), REGFIELD(24), OPUNUSED, IMMFIELD(19,0), BITFIELD(3,21),
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165 |
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"LSL", 0xf0100000, 0xd0100000, REGFIELD(24), REGFIELD(24), REGFIELD(16), IMMFIELD(16,0), BITFIELD(3,21),
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166 |
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//
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167 |
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"ASR", 0xf0100000, 0xe0000000, REGFIELD(24), REGFIELD(24), OPUNUSED, IMMFIELD(19,0), BITFIELD(3,21),
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168 |
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"ASR", 0xf0100000, 0xe0100000, REGFIELD(24), REGFIELD(24), REGFIELD(16), IMMFIELD(16,0), BITFIELD(3,21),
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169 |
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//
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170 |
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"LSR", 0xf0100000, 0xf0000000, REGFIELD(24), REGFIELD(24), OPUNUSED, IMMFIELD(19,0), BITFIELD(3,21),
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171 |
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"LSR", 0xf0100000, 0xf0100000, REGFIELD(24), REGFIELD(24), REGFIELD(16), IMMFIELD(16,0), BITFIELD(3,21),
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172 |
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// Illegal instruction !!
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173 |
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"ILL", 0x00000000, 0x00000000, OPUNUSED, OPUNUSED, OPUNUSED, IMMFIELD(32,0), OPUNUSED
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174 |
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};
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175 |
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176 |
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const int nzoplist = (sizeof(zoplist)/sizeof(ZOPCODE));
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177 |
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|
178 |
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static int getbits(const ZIPI ins, const int which) {
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179 |
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if (which & 0x40000000) {
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180 |
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// printf("SBITS: %08x, %08x = %08lx\n", ins, which,
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181 |
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// sbits(ins>>(which & 0x03f), (which>>8)&0x03f));
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182 |
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return sbits(ins>>(which & 0x03f), (which>>8)&0x03f);
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183 |
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} else if (which &0x03f) {
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184 |
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return ubits(ins>>(which & 0x03f), (which>>8)&0x03f)
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185 |
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+ ((which>>16)&0x0ff);
|
186 |
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} else
|
187 |
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return which;
|
188 |
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}
|
189 |
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|
190 |
|
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void zipi_to_string(const ZIPI ins, char *line) {
|
191 |
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for(int i=0; i<nzoplist; i++)
|
192 |
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assert(((~zoplist[i].s_mask)&zoplist[i].s_val)==0);
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193 |
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for(int i=0; i<nzoplist; i++) {
|
194 |
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// printf("%2d: %6s %08x & %08x == %08x\n",
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195 |
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// i, zoplist[i].s_opstr, ins,
|
196 |
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// zoplist[i].s_mask, zoplist[i].s_val);
|
197 |
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if ((ins & zoplist[i].s_mask) == zoplist[i].s_val) {
|
198 |
17 |
dgisselq |
sprintf(line, " %s", zoplist[i].s_opstr);
|
199 |
2 |
dgisselq |
if (zoplist[i].s_cf != OPUNUSED) {
|
200 |
|
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int bv = getbits(ins, zoplist[i].s_cf);
|
201 |
|
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strcat(line, zop_ccstr[bv]);
|
202 |
17 |
dgisselq |
} sprintf(line, "%-13s", line);
|
203 |
2 |
dgisselq |
|
204 |
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// Treat stores special
|
205 |
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if (strncasecmp("STO",zoplist[i].s_opstr, 3)==0) {
|
206 |
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int ra = getbits(ins, zoplist[i].s_ra);
|
207 |
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strcat(line, zop_regstr[ra]);
|
208 |
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strcat(line, ",");
|
209 |
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|
210 |
|
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if (zoplist[i].s_i != OPUNUSED) {
|
211 |
|
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int imv = 0;
|
212 |
|
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imv = getbits(ins, zoplist[i].s_i);
|
213 |
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if ((imv != 0)&&(zoplist[i].s_rb != OPUNUSED))
|
214 |
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sprintf(&line[strlen(line)],
|
215 |
|
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"$%d", imv);
|
216 |
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else if (imv != 0)
|
217 |
|
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sprintf(&line[strlen(line)],
|
218 |
|
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"($%d)", imv);
|
219 |
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} if (zoplist[i].s_rb != OPUNUSED) {
|
220 |
|
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int rb = getbits(ins, zoplist[i].s_rb);
|
221 |
|
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sprintf(&line[strlen(line)],
|
222 |
|
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"(%s)", zop_regstr[rb]);
|
223 |
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}
|
224 |
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|
225 |
|
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} else {
|
226 |
|
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bool memop = (strncasecmp("LOD",
|
227 |
|
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zoplist[i].s_opstr, 3)==0);
|
228 |
|
|
if (zoplist[i].s_i != OPUNUSED) {
|
229 |
|
|
int imv = 0;
|
230 |
|
|
imv = getbits(ins, zoplist[i].s_i);
|
231 |
|
|
if ((imv != 0)||(zoplist[i].s_rb == OPUNUSED))
|
232 |
|
|
sprintf(&line[strlen(line)],
|
233 |
|
|
"$%d%s", imv,
|
234 |
|
|
((!memop)&&(zoplist[i].s_rb!=OPUNUSED))?"+":"");
|
235 |
|
|
} if (zoplist[i].s_rb != OPUNUSED) {
|
236 |
|
|
int rb = getbits(ins, zoplist[i].s_rb);
|
237 |
|
|
if (memop)
|
238 |
|
|
sprintf(&line[strlen(line)],
|
239 |
|
|
"(%s)", zop_regstr[rb]);
|
240 |
|
|
else
|
241 |
|
|
strcat(line, zop_regstr[rb]);
|
242 |
|
|
} if(((zoplist[i].s_i != OPUNUSED)||(zoplist[i].s_rb != OPUNUSED))
|
243 |
|
|
&&((zoplist[i].s_ra != OPUNUSED)||(zoplist[i].s_result != OPUNUSED)))
|
244 |
|
|
strcat(line, ",");
|
245 |
|
|
|
246 |
|
|
if (zoplist[i].s_ra != OPUNUSED) {
|
247 |
|
|
int ra = getbits(ins, zoplist[i].s_ra);
|
248 |
|
|
strcat(line, zop_regstr[ra]);
|
249 |
|
|
} else if (zoplist[i].s_result != OPUNUSED) {
|
250 |
|
|
int ra = getbits(ins, zoplist[i].s_result);
|
251 |
|
|
strcat(line, zop_regstr[ra]);
|
252 |
|
|
}
|
253 |
|
|
|
254 |
|
|
}
|
255 |
|
|
break;
|
256 |
|
|
}
|
257 |
|
|
}
|
258 |
|
|
}
|
259 |
|
|
|