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[/] [zpu/] [trunk/] [zpu/] [example/] [simzpu_small.do] - Blame information for rev 95

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1 93 oharboe
# Xilinx WebPack modelsim script
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#
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#
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# cd C:/workspace/zpu/zpu/hdl/example
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# do simzpu_small.do
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#
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# after 5ms simulated time ends and log.txt is produced
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# with the hello world text output from a simulated
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# uart/debug port output
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set BreakOnAssertion 1
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vlib work
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vcom -93 -explicit  zpu_config.vhd
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vcom -93 -explicit  ../zpu4/core/zpupkg.vhd
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vcom -93 -explicit  ../zpu4/src/txt_util.vhd
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vcom -93 -explicit  sim_small_fpga_top_noint.vhd
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vcom -93 -explicit  ../zpu4/core/zpu_core_small.vhd
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vcom -93 -explicit  helloworld.vhd
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vcom -93 -explicit  ../zpu4/src/timer.vhd
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vcom -93 -explicit  ../zpu4/src/io.vhd
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vcom -93 -explicit  ../zpu4/src/trace.vhd
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# run ZPU
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vsim fpga_top
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view wave
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add wave -recursive fpga_top/zpu/*
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#add wave -recursive fpga_top/*
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view structure
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#view signals
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# Enough to run tiny programs
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run 5 ms

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