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oharboe |
library ieee;
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use ieee.std_logic_1164.all;
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use ieee.numeric_std.all;
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use std.textio.all;
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library work;
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use work.zpu_config.all;
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use work.zpupkg.all;
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use work.txt_util.all;
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entity zpu_io is
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generic (
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log_file: string := "log.txt"
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);
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port(
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clk : in std_logic;
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areset : in std_logic;
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busy : out std_logic;
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writeEnable : in std_logic;
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readEnable : in std_logic;
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write : in std_logic_vector(wordSize-1 downto 0);
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read : out std_logic_vector(wordSize-1 downto 0);
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addr : in std_logic_vector(maxAddrBit downto minAddrBit)
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);
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end zpu_io;
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architecture behave of zpu_io is
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signal timer_read : std_logic_vector(7 downto 0);
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--signal timer_write : std_logic_vector(7 downto 0);
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signal timer_we : std_logic;
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signal serving : std_logic;
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file l_file : TEXT open write_mode is log_file;
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constant lowAddrBits: std_logic_vector(minAddrBit-1 downto 0) := (others=>'0');
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constant tx_full: std_logic := '0';
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constant rx_empty: std_logic := '1';
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begin
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timerinst: timer port map (
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clk => clk,
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areset => areset,
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we => timer_we,
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din => write(7 downto 0),
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adr => addr(4 downto 2),
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dout => timer_read);
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busy <= writeEnable or readEnable;
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timer_we <= writeEnable and addr(12);
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process(areset, clk)
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variable taddr : std_logic_vector(maxAddrBit downto 0);
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begin
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taddr := (others => '0');
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taddr(maxAddrBit downto minAddrBit) := addr;
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if (areset = '1') then
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-- timer_we <= '0';
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elsif (clk'event and clk = '1') then
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-- timer_we <= '0';
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if writeEnable = '1' then
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-- external interface (fixed address)
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--<JK> extend compare to avoid waring messages
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if ("1" & addr & lowAddrBits)=x"80a000c" then
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report "Write to UART[0]" & " :0x" & hstr(write);
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-- Write to UART
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-- report "" & character'image(conv_integer(memBint)) severity note;
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print(l_file, character'val(to_integer(unsigned(write))));
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elsif addr(12)='1' then
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report "Write to TIMER" & " :0x" & hstr(write);
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-- report "xxx" severity failure;
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-- timer_we <= '1';
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else
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print(l_file, character'val(to_integer(unsigned(write))));
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report "Illegal IO write @" & "0x" & hstr(taddr) severity warning;
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end if;
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end if;
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read <= (others => '0');
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if (readEnable = '1') then
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--<JK> extend compare to avoid waring messages
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if ("1" & addr & lowAddrBits)=x"80a000c" then
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report "Read UART[0]";
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read(8) <= not tx_full; -- output fifo not full
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read(9) <= not rx_empty; -- receiver not empty
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elsif ("1" & addr & lowAddrBits)=x"80a0010" then
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report "Read UART[1]";
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read(8) <= not rx_empty; -- receiver not empty
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read(7 downto 0) <= (others => '0');
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elsif addr(12)='1' then
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report "Read TIMER";
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read(7 downto 0) <= timer_read;
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elsif addr(11)='1' then
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report "Read ZPU Freq";
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read(7 downto 0) <= ZPU_Frequency;
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else
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report "Illegal IO read @" & "0x" & hstr(taddr) severity warning;
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end if;
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end if;
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end if;
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end process;
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end behave;
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