URL https://opencores.org/ocsvn/10_100m_ethernet-fifo_convertor/10_100m_ethernet-fifo_convertor/trunk

Subversion Repositories 10_100m_ethernet-fifo_convertor

[/] [10_100m_ethernet-fifo_convertor/] [testbench/] [wavefile/] [InitModule.vwf] - Blame information for rev 12

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/*
WARNING: Do NOT edit the input and output ports in this file in a text
editor if you plan to continue editing the block that represents it in
the Block Editor! File corruption is VERY likely to occur.
*/
 
/*
Copyright (C) 1991-2009 Altera Corporation
Your use of Altera Corporation's design tools, logic functions
and other software and tools, and its AMPP partner logic
functions, and any output files from any of the foregoing
(including device programming or simulation files), and any
associated documentation or information are expressly subject
to the terms and conditions of the Altera Program License
Subscription Agreement, Altera MegaCore Function License
Agreement, or other applicable license agreement, including,
without limitation, that your use is for the sole purpose of
programming logic devices manufactured by Altera and sold by
Altera or its authorized distributors.  Please refer to the
applicable agreement for further details.
*/
 
HEADER
{
        VERSION = 1;
        TIME_UNIT = ns;
        DATA_OFFSET = 0.0;
        DATA_DURATION = 1000000000.0;
        SIMULATION_TIME = 1000000000.0;
        GRID_PHASE = 0.0;
        GRID_PERIOD = 10.0;
        GRID_DUTY_CYCLE = 50;
}
 
SIGNAL("begin_input")
{
        VALUE_TYPE = NINE_LEVEL_BIT;
        SIGNAL_TYPE = SINGLE_BIT;
        WIDTH = 1;
        LSB_INDEX = -1;
        DIRECTION = OUTPUT;
        PARENT = "";
}
 
SIGNAL("init_clk")
{
        VALUE_TYPE = NINE_LEVEL_BIT;
        SIGNAL_TYPE = SINGLE_BIT;
        WIDTH = 1;
        LSB_INDEX = -1;
        DIRECTION = INPUT;
        PARENT = "";
}
 
SIGNAL("init_cnt")
{
        VALUE_TYPE = NINE_LEVEL_BIT;
        SIGNAL_TYPE = BUS;
        WIDTH = 7;
        LSB_INDEX = 0;
        DIRECTION = REGISTERED;
        PARENT = "";
}
 
SIGNAL("init_cnt[6]")
{
        VALUE_TYPE = NINE_LEVEL_BIT;
        SIGNAL_TYPE = SINGLE_BIT;
        WIDTH = 1;
        LSB_INDEX = -1;
        DIRECTION = REGISTERED;
        PARENT = "init_cnt";
}
 
SIGNAL("init_cnt[5]")
{
        VALUE_TYPE = NINE_LEVEL_BIT;
        SIGNAL_TYPE = SINGLE_BIT;
        WIDTH = 1;
        LSB_INDEX = -1;
        DIRECTION = REGISTERED;
        PARENT = "init_cnt";
}
 
SIGNAL("init_cnt[4]")
{
        VALUE_TYPE = NINE_LEVEL_BIT;
        SIGNAL_TYPE = SINGLE_BIT;
        WIDTH = 1;
        LSB_INDEX = -1;
        DIRECTION = REGISTERED;
        PARENT = "init_cnt";
}
 
SIGNAL("init_cnt[3]")
{
        VALUE_TYPE = NINE_LEVEL_BIT;
        SIGNAL_TYPE = SINGLE_BIT;
        WIDTH = 1;
        LSB_INDEX = -1;
        DIRECTION = REGISTERED;
        PARENT = "init_cnt";
}
 
SIGNAL("init_cnt[2]")
{
        VALUE_TYPE = NINE_LEVEL_BIT;
        SIGNAL_TYPE = SINGLE_BIT;
        WIDTH = 1;
        LSB_INDEX = -1;
        DIRECTION = REGISTERED;
        PARENT = "init_cnt";
}
 
SIGNAL("init_cnt[1]")
{
        VALUE_TYPE = NINE_LEVEL_BIT;
        SIGNAL_TYPE = SINGLE_BIT;
        WIDTH = 1;
        LSB_INDEX = -1;
        DIRECTION = REGISTERED;
        PARENT = "init_cnt";
}
 
SIGNAL("init_cnt[0]")
{
        VALUE_TYPE = NINE_LEVEL_BIT;
        SIGNAL_TYPE = SINGLE_BIT;
        WIDTH = 1;
        LSB_INDEX = -1;
        DIRECTION = REGISTERED;
        PARENT = "init_cnt";
}
 
SIGNAL("phy_reset")
{
        VALUE_TYPE = NINE_LEVEL_BIT;
        SIGNAL_TYPE = SINGLE_BIT;
        WIDTH = 1;
        LSB_INDEX = -1;
        DIRECTION = OUTPUT;
        PARENT = "";
}
 
TRANSITION_LIST("begin_input")
{
        NODE
        {
                REPEAT = 1;
                LEVEL 0 FOR 10850000.0;
                LEVEL 1 FOR 989150000.0;
        }
}
 
TRANSITION_LIST("init_clk")
{
        NODE
        {
                REPEAT = 1;
                NODE
                {
                        REPEAT = 10000;
                        LEVEL 0 FOR 50000.0;
                        LEVEL 1 FOR 50000.0;
                }
        }
}
 
TRANSITION_LIST("init_cnt[6]")
{
        NODE
        {
                REPEAT = 1;
                LEVEL 0 FOR 6350000.0;
                LEVEL 1 FOR 993650000.0;
        }
}
 
TRANSITION_LIST("init_cnt[5]")
{
        NODE
        {
                REPEAT = 1;
                LEVEL 0 FOR 3150000.0;
                LEVEL 1 FOR 3200000.0;
                LEVEL 0 FOR 3200000.0;
                LEVEL 1 FOR 990450000.0;
        }
}
 
TRANSITION_LIST("init_cnt[4]")
{
        NODE
        {
                REPEAT = 1;
                LEVEL 0 FOR 1550000.0;
                NODE
                {
                        REPEAT = 3;
                        LEVEL 1 FOR 1600000.0;
                        LEVEL 0 FOR 1600000.0;
                }
                LEVEL 1 FOR 988850000.0;
        }
}
 
TRANSITION_LIST("init_cnt[3]")
{
        NODE
        {
                REPEAT = 1;
                LEVEL 0 FOR 750000.0;
                NODE
                {
                        REPEAT = 6;
                        LEVEL 1 FOR 800000.0;
                        LEVEL 0 FOR 800000.0;
                }
                LEVEL 1 FOR 800000.0;
                LEVEL 0 FOR 988850000.0;
        }
}
 
TRANSITION_LIST("init_cnt[2]")
{
        NODE
        {
                REPEAT = 1;
                LEVEL 0 FOR 350000.0;
                NODE
                {
                        REPEAT = 13;
                        LEVEL 1 FOR 400000.0;
                        LEVEL 0 FOR 400000.0;
                }
                LEVEL 1 FOR 400000.0;
                LEVEL 0 FOR 988850000.0;
        }
}
 
TRANSITION_LIST("init_cnt[1]")
{
        NODE
        {
                REPEAT = 1;
                LEVEL 0 FOR 150000.0;
                NODE
                {
                        REPEAT = 27;
                        LEVEL 1 FOR 200000.0;
                        LEVEL 0 FOR 200000.0;
                }
                LEVEL 1 FOR 200000.0;
                LEVEL 0 FOR 988850000.0;
        }
}
 
TRANSITION_LIST("init_cnt[0]")
{
        NODE
        {
                REPEAT = 1;
                LEVEL 0 FOR 50000.0;
                NODE
                {
                        REPEAT = 55;
                        LEVEL 1 FOR 100000.0;
                        LEVEL 0 FOR 100000.0;
                }
                LEVEL 1 FOR 100000.0;
                LEVEL 0 FOR 988850000.0;
        }
}
 
TRANSITION_LIST("phy_reset")
{
        NODE
        {
                REPEAT = 1;
                LEVEL 0 FOR 10250000.0;
                LEVEL 1 FOR 989750000.0;
        }
}
 
DISPLAY_LINE
{
        CHANNEL = "init_clk";
        EXPAND_STATUS = COLLAPSED;
        RADIX = ASCII;
        TREE_INDEX = 0;
        TREE_LEVEL = 0;
}
 
DISPLAY_LINE
{
        CHANNEL = "begin_input";
        EXPAND_STATUS = COLLAPSED;
        RADIX = ASCII;
        TREE_INDEX = 1;
        TREE_LEVEL = 0;
}
 
DISPLAY_LINE
{
        CHANNEL = "init_cnt";
        EXPAND_STATUS = COLLAPSED;
        RADIX = ASCII;
        TREE_INDEX = 2;
        TREE_LEVEL = 0;
        CHILDREN = 3, 4, 5, 6, 7, 8, 9;
}
 
DISPLAY_LINE
{
        CHANNEL = "init_cnt[6]";
        EXPAND_STATUS = COLLAPSED;
        RADIX = ASCII;
        TREE_INDEX = 3;
        TREE_LEVEL = 1;
        PARENT = 2;
}
 
DISPLAY_LINE
{
        CHANNEL = "init_cnt[5]";
        EXPAND_STATUS = COLLAPSED;
        RADIX = ASCII;
        TREE_INDEX = 4;
        TREE_LEVEL = 1;
        PARENT = 2;
}
 
DISPLAY_LINE
{
        CHANNEL = "init_cnt[4]";
        EXPAND_STATUS = COLLAPSED;
        RADIX = ASCII;
        TREE_INDEX = 5;
        TREE_LEVEL = 1;
        PARENT = 2;
}
 
DISPLAY_LINE
{
        CHANNEL = "init_cnt[3]";
        EXPAND_STATUS = COLLAPSED;
        RADIX = ASCII;
        TREE_INDEX = 6;
        TREE_LEVEL = 1;
        PARENT = 2;
}
 
DISPLAY_LINE
{
        CHANNEL = "init_cnt[2]";
        EXPAND_STATUS = COLLAPSED;
        RADIX = ASCII;
        TREE_INDEX = 7;
        TREE_LEVEL = 1;
        PARENT = 2;
}
 
DISPLAY_LINE
{
        CHANNEL = "init_cnt[1]";
        EXPAND_STATUS = COLLAPSED;
        RADIX = ASCII;
        TREE_INDEX = 8;
        TREE_LEVEL = 1;
        PARENT = 2;
}
 
DISPLAY_LINE
{
        CHANNEL = "init_cnt[0]";
        EXPAND_STATUS = COLLAPSED;
        RADIX = ASCII;
        TREE_INDEX = 9;
        TREE_LEVEL = 1;
        PARENT = 2;
}
 
DISPLAY_LINE
{
        CHANNEL = "phy_reset";
        EXPAND_STATUS = COLLAPSED;
        RADIX = ASCII;
        TREE_INDEX = 10;
        TREE_LEVEL = 0;
}
 
TIME_BAR
{
        TIME = 102400000;
        MASTER = TRUE;
}
;

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Subversion Repositories 10_100m_ethernet-fifo_convertor

[/] [10_100m_ethernet-fifo_convertor/] [testbench/] [wavefile/] [InitModule.vwf] - Blame information for rev 12

Line No.	Rev	Author	Line
1	12	antiquity	`/*`
2			`WARNING: Do NOT edit the input and output ports in this file in a text`
3			`editor if you plan to continue editing the block that represents it in`
4			`the Block Editor! File corruption is VERY likely to occur.`
5			`*/`
6
7			`/*`
8			`Copyright (C) 1991-2009 Altera Corporation`
9			`Your use of Altera Corporation's design tools, logic functions`
10			`and other software and tools, and its AMPP partner logic`
11			`functions, and any output files from any of the foregoing`
12			`(including device programming or simulation files), and any`
13			`associated documentation or information are expressly subject`
14			`to the terms and conditions of the Altera Program License`
15			`Subscription Agreement, Altera MegaCore Function License`
16			`Agreement, or other applicable license agreement, including,`
17			`without limitation, that your use is for the sole purpose of`
18			`programming logic devices manufactured by Altera and sold by`
19			`Altera or its authorized distributors. Please refer to the`
20			`applicable agreement for further details.`
21			`*/`
22
23			`HEADER`
24			`{`
25			`VERSION = 1;`
26			`TIME_UNIT = ns;`
27			`DATA_OFFSET = 0.0;`
28			`DATA_DURATION = 1000000000.0;`
29			`SIMULATION_TIME = 1000000000.0;`
30			`GRID_PHASE = 0.0;`
31			`GRID_PERIOD = 10.0;`
32			`GRID_DUTY_CYCLE = 50;`
33			`}`
34
35			`SIGNAL("begin_input")`
36			`{`
37			`VALUE_TYPE = NINE_LEVEL_BIT;`
38			`SIGNAL_TYPE = SINGLE_BIT;`
39			`WIDTH = 1;`
40			`LSB_INDEX = -1;`
41			`DIRECTION = OUTPUT;`
42			`PARENT = "";`
43			`}`
44
45			`SIGNAL("init_clk")`
46			`{`
47			`VALUE_TYPE = NINE_LEVEL_BIT;`
48			`SIGNAL_TYPE = SINGLE_BIT;`
49			`WIDTH = 1;`
50			`LSB_INDEX = -1;`
51			`DIRECTION = INPUT;`
52			`PARENT = "";`
53			`}`
54
55			`SIGNAL("init_cnt")`
56			`{`
57			`VALUE_TYPE = NINE_LEVEL_BIT;`
58			`SIGNAL_TYPE = BUS;`
59			`WIDTH = 7;`
60			`LSB_INDEX = 0;`
61			`DIRECTION = REGISTERED;`
62			`PARENT = "";`
63			`}`
64
65			`SIGNAL("init_cnt[6]")`
66			`{`
67			`VALUE_TYPE = NINE_LEVEL_BIT;`
68			`SIGNAL_TYPE = SINGLE_BIT;`
69			`WIDTH = 1;`
70			`LSB_INDEX = -1;`
71			`DIRECTION = REGISTERED;`
72			`PARENT = "init_cnt";`
73			`}`
74
75			`SIGNAL("init_cnt[5]")`
76			`{`
77			`VALUE_TYPE = NINE_LEVEL_BIT;`
78			`SIGNAL_TYPE = SINGLE_BIT;`
79			`WIDTH = 1;`
80			`LSB_INDEX = -1;`
81			`DIRECTION = REGISTERED;`
82			`PARENT = "init_cnt";`
83			`}`
84
85			`SIGNAL("init_cnt[4]")`
86			`{`
87			`VALUE_TYPE = NINE_LEVEL_BIT;`
88			`SIGNAL_TYPE = SINGLE_BIT;`
89			`WIDTH = 1;`
90			`LSB_INDEX = -1;`
91			`DIRECTION = REGISTERED;`
92			`PARENT = "init_cnt";`
93			`}`
94
95			`SIGNAL("init_cnt[3]")`
96			`{`
97			`VALUE_TYPE = NINE_LEVEL_BIT;`
98			`SIGNAL_TYPE = SINGLE_BIT;`
99			`WIDTH = 1;`
100			`LSB_INDEX = -1;`
101			`DIRECTION = REGISTERED;`
102			`PARENT = "init_cnt";`
103			`}`
104
105			`SIGNAL("init_cnt[2]")`
106			`{`
107			`VALUE_TYPE = NINE_LEVEL_BIT;`
108			`SIGNAL_TYPE = SINGLE_BIT;`
109			`WIDTH = 1;`
110			`LSB_INDEX = -1;`
111			`DIRECTION = REGISTERED;`
112			`PARENT = "init_cnt";`
113			`}`
114
115			`SIGNAL("init_cnt[1]")`
116			`{`
117			`VALUE_TYPE = NINE_LEVEL_BIT;`
118			`SIGNAL_TYPE = SINGLE_BIT;`
119			`WIDTH = 1;`
120			`LSB_INDEX = -1;`
121			`DIRECTION = REGISTERED;`
122			`PARENT = "init_cnt";`
123			`}`
124
125			`SIGNAL("init_cnt[0]")`
126			`{`
127			`VALUE_TYPE = NINE_LEVEL_BIT;`
128			`SIGNAL_TYPE = SINGLE_BIT;`
129			`WIDTH = 1;`
130			`LSB_INDEX = -1;`
131			`DIRECTION = REGISTERED;`
132			`PARENT = "init_cnt";`
133			`}`
134
135			`SIGNAL("phy_reset")`
136			`{`
137			`VALUE_TYPE = NINE_LEVEL_BIT;`
138			`SIGNAL_TYPE = SINGLE_BIT;`
139			`WIDTH = 1;`
140			`LSB_INDEX = -1;`
141			`DIRECTION = OUTPUT;`
142			`PARENT = "";`
143			`}`
144
145			`TRANSITION_LIST("begin_input")`
146			`{`
147			`NODE`
148			`{`
149			`REPEAT = 1;`
150			`LEVEL 0 FOR 10850000.0;`
151			`LEVEL 1 FOR 989150000.0;`
152			`}`
153			`}`
154
155			`TRANSITION_LIST("init_clk")`
156			`{`
157			`NODE`
158			`{`
159			`REPEAT = 1;`
160			`NODE`
161			`{`
162			`REPEAT = 10000;`
163			`LEVEL 0 FOR 50000.0;`
164			`LEVEL 1 FOR 50000.0;`
165			`}`
166			`}`
167			`}`
168
169			`TRANSITION_LIST("init_cnt[6]")`
170			`{`
171			`NODE`
172			`{`
173			`REPEAT = 1;`
174			`LEVEL 0 FOR 6350000.0;`
175			`LEVEL 1 FOR 993650000.0;`
176			`}`
177			`}`
178
179			`TRANSITION_LIST("init_cnt[5]")`
180			`{`
181			`NODE`
182			`{`
183			`REPEAT = 1;`
184			`LEVEL 0 FOR 3150000.0;`
185			`LEVEL 1 FOR 3200000.0;`
186			`LEVEL 0 FOR 3200000.0;`
187			`LEVEL 1 FOR 990450000.0;`
188			`}`
189			`}`
190
191			`TRANSITION_LIST("init_cnt[4]")`
192			`{`
193			`NODE`
194			`{`
195			`REPEAT = 1;`
196			`LEVEL 0 FOR 1550000.0;`
197			`NODE`
198			`{`
199			`REPEAT = 3;`
200			`LEVEL 1 FOR 1600000.0;`
201			`LEVEL 0 FOR 1600000.0;`
202			`}`
203			`LEVEL 1 FOR 988850000.0;`
204			`}`
205			`}`
206
207			`TRANSITION_LIST("init_cnt[3]")`
208			`{`
209			`NODE`
210			`{`
211			`REPEAT = 1;`
212			`LEVEL 0 FOR 750000.0;`
213			`NODE`
214			`{`
215			`REPEAT = 6;`
216			`LEVEL 1 FOR 800000.0;`
217			`LEVEL 0 FOR 800000.0;`
218			`}`
219			`LEVEL 1 FOR 800000.0;`
220			`LEVEL 0 FOR 988850000.0;`
221			`}`
222			`}`
223
224			`TRANSITION_LIST("init_cnt[2]")`
225			`{`
226			`NODE`
227			`{`
228			`REPEAT = 1;`
229			`LEVEL 0 FOR 350000.0;`
230			`NODE`
231			`{`
232			`REPEAT = 13;`
233			`LEVEL 1 FOR 400000.0;`
234			`LEVEL 0 FOR 400000.0;`
235			`}`
236			`LEVEL 1 FOR 400000.0;`
237			`LEVEL 0 FOR 988850000.0;`
238			`}`
239			`}`
240
241			`TRANSITION_LIST("init_cnt[1]")`
242			`{`
243			`NODE`
244			`{`
245			`REPEAT = 1;`
246			`LEVEL 0 FOR 150000.0;`
247			`NODE`
248			`{`
249			`REPEAT = 27;`
250			`LEVEL 1 FOR 200000.0;`
251			`LEVEL 0 FOR 200000.0;`
252			`}`
253			`LEVEL 1 FOR 200000.0;`
254			`LEVEL 0 FOR 988850000.0;`
255			`}`
256			`}`
257
258			`TRANSITION_LIST("init_cnt[0]")`
259			`{`
260			`NODE`
261			`{`
262			`REPEAT = 1;`
263			`LEVEL 0 FOR 50000.0;`
264			`NODE`
265			`{`
266			`REPEAT = 55;`
267			`LEVEL 1 FOR 100000.0;`
268			`LEVEL 0 FOR 100000.0;`
269			`}`
270			`LEVEL 1 FOR 100000.0;`
271			`LEVEL 0 FOR 988850000.0;`
272			`}`
273			`}`
274
275			`TRANSITION_LIST("phy_reset")`
276			`{`
277			`NODE`
278			`{`
279			`REPEAT = 1;`
280			`LEVEL 0 FOR 10250000.0;`
281			`LEVEL 1 FOR 989750000.0;`
282			`}`
283			`}`
284
285			`DISPLAY_LINE`
286			`{`
287			`CHANNEL = "init_clk";`
288			`EXPAND_STATUS = COLLAPSED;`
289			`RADIX = ASCII;`
290			`TREE_INDEX = 0;`
291			`TREE_LEVEL = 0;`
292			`}`
293
294			`DISPLAY_LINE`
295			`{`
296			`CHANNEL = "begin_input";`
297			`EXPAND_STATUS = COLLAPSED;`
298			`RADIX = ASCII;`
299			`TREE_INDEX = 1;`
300			`TREE_LEVEL = 0;`
301			`}`
302
303			`DISPLAY_LINE`
304			`{`
305			`CHANNEL = "init_cnt";`
306			`EXPAND_STATUS = COLLAPSED;`
307			`RADIX = ASCII;`
308			`TREE_INDEX = 2;`
309			`TREE_LEVEL = 0;`
310			`CHILDREN = 3, 4, 5, 6, 7, 8, 9;`
311			`}`
312
313			`DISPLAY_LINE`
314			`{`
315			`CHANNEL = "init_cnt[6]";`
316			`EXPAND_STATUS = COLLAPSED;`
317			`RADIX = ASCII;`
318			`TREE_INDEX = 3;`
319			`TREE_LEVEL = 1;`
320			`PARENT = 2;`
321			`}`
322
323			`DISPLAY_LINE`
324			`{`
325			`CHANNEL = "init_cnt[5]";`
326			`EXPAND_STATUS = COLLAPSED;`
327			`RADIX = ASCII;`
328			`TREE_INDEX = 4;`
329			`TREE_LEVEL = 1;`
330			`PARENT = 2;`
331			`}`
332
333			`DISPLAY_LINE`
334			`{`
335			`CHANNEL = "init_cnt[4]";`
336			`EXPAND_STATUS = COLLAPSED;`
337			`RADIX = ASCII;`
338			`TREE_INDEX = 5;`
339			`TREE_LEVEL = 1;`
340			`PARENT = 2;`
341			`}`
342
343			`DISPLAY_LINE`
344			`{`
345			`CHANNEL = "init_cnt[3]";`
346			`EXPAND_STATUS = COLLAPSED;`
347			`RADIX = ASCII;`
348			`TREE_INDEX = 6;`
349			`TREE_LEVEL = 1;`
350			`PARENT = 2;`
351			`}`
352
353			`DISPLAY_LINE`
354			`{`
355			`CHANNEL = "init_cnt[2]";`
356			`EXPAND_STATUS = COLLAPSED;`
357			`RADIX = ASCII;`
358			`TREE_INDEX = 7;`
359			`TREE_LEVEL = 1;`
360			`PARENT = 2;`
361			`}`
362
363			`DISPLAY_LINE`
364			`{`
365			`CHANNEL = "init_cnt[1]";`
366			`EXPAND_STATUS = COLLAPSED;`
367			`RADIX = ASCII;`
368			`TREE_INDEX = 8;`
369			`TREE_LEVEL = 1;`
370			`PARENT = 2;`
371			`}`
372
373			`DISPLAY_LINE`
374			`{`
375			`CHANNEL = "init_cnt[0]";`
376			`EXPAND_STATUS = COLLAPSED;`
377			`RADIX = ASCII;`
378			`TREE_INDEX = 9;`
379			`TREE_LEVEL = 1;`
380			`PARENT = 2;`
381			`}`
382
383			`DISPLAY_LINE`
384			`{`
385			`CHANNEL = "phy_reset";`
386			`EXPAND_STATUS = COLLAPSED;`
387			`RADIX = ASCII;`
388			`TREE_INDEX = 10;`
389			`TREE_LEVEL = 0;`
390			`}`
391
392			`TIME_BAR`
393			`{`
394			`TIME = 102400000;`
395			`MASTER = TRUE;`
396			`}`
397			`;`