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[/] [1g_ethernet_dpi/] [tags/] [vmblite_base/] [hw/] [src/] [tb/] [uart_rx_if.sv] - Blame information for rev 7

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Line No. Rev Author Line
1 7 kuzmi4
//////////////////////////////////////////////////////////////////////////////////
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// Company:
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// Engineer:        IK
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//
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// Create Date:     11:35:01 03/21/2013
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// Design Name:
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// Module Name:     uart_rx_if
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// Project Name:
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// Target Devices:
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// Tool versions:
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// Description:
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//
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//
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// Revision:
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// Revision 0.01 - File Created, {8N1}-cfg
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//
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//////////////////////////////////////////////////////////////////////////////////
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`timescale 1ns / 1ps
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interface uart_rx_if
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(
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    input   i_rxd
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);
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//////////////////////////////////////////////////////////////////////////////////
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//
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typedef struct {
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    int speed_bod;
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    int speed_ns;
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    int speed_ns_half;
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} cfg_t;
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//////////////////////////////////////////////////////////////////////////////////
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    // RXD
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    bit [ 7:0]  sv_rxd;
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    // ??
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    cfg_t   sv_cfg;
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//////////////////////////////////////////////////////////////////////////////////
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//
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task init(input int ii_speed=115_200);
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    //
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    sv_rxd = 0;
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    //
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    sv_cfg.speed_bod = ii_speed;
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    sv_cfg.speed_ns  = (10**9)/ii_speed;
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    sv_cfg.speed_ns_half = sv_cfg.speed_ns/2;
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    // Final
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endtask : init
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task rxd;
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    // dec vars
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    bit s_done;
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    // wait
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    @(negedge i_rxd);
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    // Data framing
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    s_done = 0;
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    for (int i = 0 ; i < 1+8+1; i++) // => sta+[0:7]+stp
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        begin   :   DFRAME
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            case(i)
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                // START
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                            #(sv_cfg.speed_ns_half*1ns);
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                            if (i_rxd) // must be LOW
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                                break; //   exit-loop
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                        end
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                // STOP
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                9   :   begin
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                            #(sv_cfg.speed_ns*1ns);
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                            if (i_rxd) // must be HIGH
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                                s_done = 1;
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                        end
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                // DATA
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                default :   begin
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                                #(sv_cfg.speed_ns*1ns);
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                                sv_rxd[i-1] = i_rxd;
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                            end
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            endcase
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        end
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    //
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    if (s_done)
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        $display("[%t]: %m: rxd=%x / %c", $time, sv_rxd, (sv_rxd == 8'h0a)? " " : sv_rxd);
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    else
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        $display("[%t]: %m: rx-err", $time);
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    // Final
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endtask : rxd
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//////////////////////////////////////////////////////////////////////////////////
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endinterface : uart_rx_if

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