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Subversion Repositories 6809_6309_compatible_core

[/] [6809_6309_compatible_core/] [trunk/] [sim/] [instructions_test.asm] - Blame information for rev 18

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; simple instruction excerciser
 
        lds #$00ff
        andcc #$af  ; enable interrupts
                ldd     #$AABB
                mul
                ldx     #$1234
                ldy     #$5678
                exg     a,b
                ;exg    a,x
                exg     y,x
                tfr     x,u     ; 16 bit transfer
                tfr     a,u     ; high to high
                tfr     b,u
                tfr     x,a     ; gets high byte
                tfr     x,b     ; gets low byte
                bra     eatests
addr:           fcb     0, 4    ; an address
 
eatests:        lda     #$02
                ldb     #$00
                sta     $0
                stb     $1
                ldx     $0      ; load saved value
                ldy     #$0
                cmpx    ,y      ; compare
                beq     test_push_pull
 
error:          bra     error
 
test_push_pull: lds     #$00ff
                pshs    a,b
                puls    x
                cmpx    ,y      ; compare again
                bne     error
 
                bsr     test_bsr
                bne     error   ; push/pull with sub don't work
                lbsr    test_lea
                bne     error
ok:             bra     ok
 
test_bsr:       pshs    y
                puls    y
                cmpx    0,y
                rts
 
test_lea:       leau    1,y
                leay    0,y
                rts
 
_boot:          ldx     #100
_loop0:         ldd     #$4100
_loop1:         sta     b,x
                incb
                cmpb    #16
                bne     _loop1
                inca
_loop2:         incb
                bne     _loop2  ; delay
                cmpa    #128
                beq     _loop1  ; another row of characters
                bra     _loop0
 
_interrupt: nop
            nop
            rti
 

Line No.	Rev	Author	Line
1	4	ale500
2			`; simple instruction excerciser`
3	5	ale500
4	18	ale500	`lds #$00ff`
5			`andcc #$af ; enable interrupts`
6	5	ale500	`ldd #$AABB`
7	6	ale500	`mul`
8	5	ale500	`ldx #$1234`
9			`ldy #$5678`
10	7	ale500	`exg a,b`
11			`;exg a,x`
12			`exg y,x`
13	5	ale500	`tfr x,u ; 16 bit transfer`
14			`tfr a,u ; high to high`
15			`tfr b,u`
16			`tfr x,a ; gets high byte`
17			`tfr x,b ; gets low byte`
18	7	ale500	`bra eatests`
19			`addr: fcb 0, 4 ; an address`
20	5	ale500
21	7	ale500	`eatests: lda #$02`
22	4	ale500	`ldb #$00`
23			`sta $0`
24			`stb $1`
25			`ldx $0 ; load saved value`
26			`ldy #$0`
27			`cmpx ,y ; compare`
28			`beq test_push_pull`
29
30			`error: bra error`
31
32			`test_push_pull: lds #$00ff`
33			`pshs a,b`
34			`puls x`
35			`cmpx ,y ; compare again`
36			`bne error`
37
38			`bsr test_bsr`
39			`bne error ; push/pull with sub don't work`
40			`lbsr test_lea`
41			`bne error`
42			`ok: bra ok`
43
44			`test_bsr: pshs y`
45			`puls y`
46			`cmpx 0,y`
47			`rts`
48
49			`test_lea: leau 1,y`
50			`leay 0,y`
51			`rts`
52	7	ale500
53			`_boot: ldx #100`
54			`_loop0: ldd #$4100`
55			`_loop1: sta b,x`
56			`incb`
57			`cmpb #16`
58			`bne _loop1`
59			`inca`
60			`_loop2: incb`
61			`bne _loop2 ; delay`
62			`cmpa #128`
63			`beq _loop1 ; another row of characters`
64			`bra _loop0`
65
66	18	ale500	`_interrupt: nop`
67			`nop`
68			`rti`
69	7	ale500

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[/] [6809_6309_compatible_core/] [trunk/] [sim/] [instructions_test.asm] - Blame information for rev 18