URL https://opencores.org/ocsvn/6809_6309_compatible_core/6809_6309_compatible_core/trunk

Subversion Repositories 6809_6309_compatible_core

[/] [6809_6309_compatible_core/] [trunk/] [syn/] [lattice/] [P6809/] [P6809_P6809_map.hrr] - Blame information for rev 10

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---------------------------------------------------
Report for cell CC3_top
   Instance path: CC3_top
                     Cell usage:
                                  cell        count    Res Usage(%)
                                  SLIC      1208.00        100.0
                                 IOLGC        10.00        100.0
                                  LUT4      2034.00        100.0
                                 IOREG           10        100.0
                                 IOBUF           69        100.0
                                PFUREG          570        100.0
                                RIPPLE          186        100.0
                                   EBR           10        100.0
SUB MODULES
                                  cell        count    SLC Usage(%)
                               vgatext            1         6.9
                                bios2k            1         0.0
                            MC6809_cpu            1        92.8
---------------------------------------------------
Report for cell vgatext
   Instance path: CC3_top/textctrl
                     Cell usage:
                                  cell        count    Res Usage(%)
                                  SLIC        83.17         6.9
                                  LUT4        92.00         4.5
                                PFUREG           80        14.0
                                RIPPLE           36        19.4
                                   EBR            8        80.0
SUB MODULES
                                  cell        count    SLC Usage(%)
                             textmem4k            1         0.0
                               fontrom            1         0.0
---------------------------------------------------
Report for cell textmem4k
   Instance path: CC3_top/textctrl/chars
                     Cell usage:
                                  cell        count    Res Usage(%)
                                   EBR            4        40.0
---------------------------------------------------
Report for cell fontrom
   Instance path: CC3_top/textctrl/font
                     Cell usage:
                                  cell        count    Res Usage(%)
                                   EBR            4        40.0
---------------------------------------------------
Report for cell bios2k
   Instance path: CC3_top/bios
                     Cell usage:
                                  cell        count    Res Usage(%)
                                   EBR            2        20.0
---------------------------------------------------
Report for cell MC6809_cpu
   Instance path: CC3_top/cpu0
                     Cell usage:
                                  cell        count    Res Usage(%)
                                  SLIC      1121.00        92.8
                                  LUT4      1939.00        95.3
                                PFUREG          484        84.9
                                RIPPLE          150        80.6
SUB MODULES
                                  cell        count    SLC Usage(%)
                        test_condition            1         3.7
                              regblock            1        37.7
                            decode_alu            1         2.2
                             decode_op            1         2.5
                           decode_regs            1        10.1
                             decode_ea            1         2.1
                                   alu            1        25.7
---------------------------------------------------
Report for cell test_condition
   Instance path: CC3_top/cpu0/test_cond
                     Cell usage:
                                  cell        count    Res Usage(%)
                                  SLIC        44.33         3.7
                                  LUT4        97.17         4.8
---------------------------------------------------
Report for cell decode_alu
   Instance path: CC3_top/cpu0/dec_alu
                     Cell usage:
                                  cell        count    Res Usage(%)
                                  SLIC        27.00         2.2
                                  LUT4        57.50         2.8
---------------------------------------------------
Report for cell decode_ea
   Instance path: CC3_top/cpu0/dec_ea
                     Cell usage:
                                  cell        count    Res Usage(%)
                                  SLIC        25.42         2.1
                                  LUT4        56.00         2.8
---------------------------------------------------
Report for cell decode_op
   Instance path: CC3_top/cpu0/dec_op
                     Cell usage:
                                  cell        count    Res Usage(%)
                                  SLIC        30.58         2.5
                                  LUT4        62.00         3.0
---------------------------------------------------
Report for cell decode_regs
   Instance path: CC3_top/cpu0/dec_regs
                     Cell usage:
                                  cell        count    Res Usage(%)
                                  SLIC       121.57        10.1
                                  LUT4       249.50        12.3
                                PFUREG           12         2.1
---------------------------------------------------
Report for cell regblock
   Instance path: CC3_top/cpu0/regs
                     Cell usage:
                                  cell        count    Res Usage(%)
                                  SLIC       455.25        37.7
                                  LUT4       847.33        41.7
                                PFUREG          255        44.7
                                RIPPLE           45        24.2
SUB MODULES
                                  cell        count    SLC Usage(%)
                               calc_ea            1        10.4
---------------------------------------------------
Report for cell calc_ea
   Instance path: CC3_top/cpu0/regs/ea
                     Cell usage:
                                  cell        count    Res Usage(%)
                                  SLIC       125.75        10.4
                                  LUT4       239.33        11.8
                                PFUREG            8         1.4
                                RIPPLE           18         9.7
---------------------------------------------------
Report for cell alu
   Instance path: CC3_top/cpu0/alu
                     Cell usage:
                                  cell        count    Res Usage(%)
                                  SLIC       310.80        25.7
                                  LUT4       452.50        22.2
                                PFUREG           73        12.8
                                RIPPLE           87        46.8
SUB MODULES
                                  cell        count    SLC Usage(%)
                                 alu16            1        15.2
                                  alu8            1         8.0
---------------------------------------------------
Report for cell alu16
   Instance path: CC3_top/cpu0/alu/alu16
                     Cell usage:
                                  cell        count    Res Usage(%)
                                  SLIC       183.35        15.2
                                  LUT4       227.83        11.2
                                PFUREG           32         5.6
                                RIPPLE           72        38.7
SUB MODULES
                                  cell        count    SLC Usage(%)
                                mul8x8            1         5.3
                               arith16            1         5.1
---------------------------------------------------
Report for cell arith16
   Instance path: CC3_top/cpu0/alu/alu16/a16
                     Cell usage:
                                  cell        count    Res Usage(%)
                                  SLIC        62.08         5.1
                                  LUT4        53.00         2.6
                                RIPPLE           36        19.4
---------------------------------------------------
Report for cell mul8x8
   Instance path: CC3_top/cpu0/alu/alu16/mulu
                     Cell usage:
                                  cell        count    Res Usage(%)
                                  SLIC        64.07         5.3
                                  LUT4        58.50         2.9
                                PFUREG           30         5.3
                                RIPPLE           36        19.4
---------------------------------------------------
Report for cell alu8
   Instance path: CC3_top/cpu0/alu/alu8
                     Cell usage:
                                  cell        count    Res Usage(%)
                                  SLIC        96.53         8.0
                                  LUT4       172.67         8.5
                                PFUREG            4         0.7
                                RIPPLE           15         8.1
SUB MODULES
                                  cell        count    SLC Usage(%)
                                shift8            1         0.4
                                logic8            1         0.3
                                arith8            1         1.3
---------------------------------------------------
Report for cell shift8
   Instance path: CC3_top/cpu0/alu/alu8/s8
                     Cell usage:
                                  cell        count    Res Usage(%)
                                  SLIC         4.83         0.4
                                  LUT4        10.00         0.5
---------------------------------------------------
Report for cell arith8
   Instance path: CC3_top/cpu0/alu/alu8/a8
                     Cell usage:
                                  cell        count    Res Usage(%)
                                  SLIC        15.87         1.3
                                  LUT4        12.00         0.6
                                PFUREG            2         0.4
                                RIPPLE           10         5.4
---------------------------------------------------
Report for cell logic8
   Instance path: CC3_top/cpu0/alu/alu8/l8
                     Cell usage:
                                  cell        count    Res Usage(%)
                                  SLIC         3.50         0.3
                                  LUT4         7.00         0.3

Line No.	Rev	Author	Line
1	9	ale500	`---------------------------------------------------`
2			`Report for cell CC3_top`
3			`Instance path: CC3_top`
4			`Cell usage:`
5			`cell count Res Usage(%)`
6	10	ale500	`SLIC 1208.00 100.0`
7	9	ale500	`IOLGC 10.00 100.0`
8	10	ale500	`LUT4 2034.00 100.0`
9	9	ale500	`IOREG 10 100.0`
10	10	ale500	`IOBUF 69 100.0`
11			`PFUREG 570 100.0`
12			`RIPPLE 186 100.0`
13	9	ale500	`EBR 10 100.0`
14			`SUB MODULES`
15			`cell count SLC Usage(%)`
16	10	ale500	`vgatext 1 6.9`
17	9	ale500	`bios2k 1 0.0`
18	10	ale500	`MC6809_cpu 1 92.8`
19	9	ale500	`---------------------------------------------------`
20			`Report for cell vgatext`
21			`Instance path: CC3_top/textctrl`
22			`Cell usage:`
23			`cell count Res Usage(%)`
24	10	ale500	`SLIC 83.17 6.9`
25			`LUT4 92.00 4.5`
26			`PFUREG 80 14.0`
27			`RIPPLE 36 19.4`
28	9	ale500	`EBR 8 80.0`
29			`SUB MODULES`
30			`cell count SLC Usage(%)`
31	10	ale500	`textmem4k 1 0.0`
32	9	ale500	`fontrom 1 0.0`
33			`---------------------------------------------------`
34			`Report for cell textmem4k`
35			`Instance path: CC3_top/textctrl/chars`
36			`Cell usage:`
37			`cell count Res Usage(%)`
38			`EBR 4 40.0`
39			`---------------------------------------------------`
40			`Report for cell fontrom`
41			`Instance path: CC3_top/textctrl/font`
42			`Cell usage:`
43			`cell count Res Usage(%)`
44			`EBR 4 40.0`
45			`---------------------------------------------------`
46			`Report for cell bios2k`
47			`Instance path: CC3_top/bios`
48			`Cell usage:`
49			`cell count Res Usage(%)`
50			`EBR 2 20.0`
51			`---------------------------------------------------`
52			`Report for cell MC6809_cpu`
53			`Instance path: CC3_top/cpu0`
54			`Cell usage:`
55			`cell count Res Usage(%)`
56	10	ale500	`SLIC 1121.00 92.8`
57			`LUT4 1939.00 95.3`
58			`PFUREG 484 84.9`
59			`RIPPLE 150 80.6`
60	9	ale500	`SUB MODULES`
61			`cell count SLC Usage(%)`
62	10	ale500	`test_condition 1 3.7`
63			`regblock 1 37.7`
64			`decode_alu 1 2.2`
65			`decode_op 1 2.5`
66			`decode_regs 1 10.1`
67			`decode_ea 1 2.1`
68			`alu 1 25.7`
69	9	ale500	`---------------------------------------------------`
70			`Report for cell test_condition`
71			`Instance path: CC3_top/cpu0/test_cond`
72			`Cell usage:`
73			`cell count Res Usage(%)`
74	10	ale500	`SLIC 44.33 3.7`
75			`LUT4 97.17 4.8`
76	9	ale500	`---------------------------------------------------`
77			`Report for cell decode_alu`
78			`Instance path: CC3_top/cpu0/dec_alu`
79			`Cell usage:`
80			`cell count Res Usage(%)`
81	10	ale500	`SLIC 27.00 2.2`
82			`LUT4 57.50 2.8`
83	9	ale500	`---------------------------------------------------`
84			`Report for cell decode_ea`
85			`Instance path: CC3_top/cpu0/dec_ea`
86			`Cell usage:`
87			`cell count Res Usage(%)`
88	10	ale500	`SLIC 25.42 2.1`
89			`LUT4 56.00 2.8`
90	9	ale500	`---------------------------------------------------`
91			`Report for cell decode_op`
92			`Instance path: CC3_top/cpu0/dec_op`
93			`Cell usage:`
94			`cell count Res Usage(%)`
95	10	ale500	`SLIC 30.58 2.5`
96			`LUT4 62.00 3.0`
97	9	ale500	`---------------------------------------------------`
98			`Report for cell decode_regs`
99			`Instance path: CC3_top/cpu0/dec_regs`
100			`Cell usage:`
101			`cell count Res Usage(%)`
102	10	ale500	`SLIC 121.57 10.1`
103			`LUT4 249.50 12.3`
104			`PFUREG 12 2.1`
105	9	ale500	`---------------------------------------------------`
106			`Report for cell regblock`
107			`Instance path: CC3_top/cpu0/regs`
108			`Cell usage:`
109			`cell count Res Usage(%)`
110	10	ale500	`SLIC 455.25 37.7`
111			`LUT4 847.33 41.7`
112			`PFUREG 255 44.7`
113			`RIPPLE 45 24.2`
114	9	ale500	`SUB MODULES`
115			`cell count SLC Usage(%)`
116	10	ale500	`calc_ea 1 10.4`
117	9	ale500	`---------------------------------------------------`
118			`Report for cell calc_ea`
119			`Instance path: CC3_top/cpu0/regs/ea`
120			`Cell usage:`
121			`cell count Res Usage(%)`
122	10	ale500	`SLIC 125.75 10.4`
123			`LUT4 239.33 11.8`
124			`PFUREG 8 1.4`
125			`RIPPLE 18 9.7`
126	9	ale500	`---------------------------------------------------`
127			`Report for cell alu`
128			`Instance path: CC3_top/cpu0/alu`
129			`Cell usage:`
130			`cell count Res Usage(%)`
131	10	ale500	`SLIC 310.80 25.7`
132			`LUT4 452.50 22.2`
133			`PFUREG 73 12.8`
134			`RIPPLE 87 46.8`
135	9	ale500	`SUB MODULES`
136			`cell count SLC Usage(%)`
137	10	ale500	`alu16 1 15.2`
138			`alu8 1 8.0`
139	9	ale500	`---------------------------------------------------`
140			`Report for cell alu16`
141			`Instance path: CC3_top/cpu0/alu/alu16`
142			`Cell usage:`
143			`cell count Res Usage(%)`
144	10	ale500	`SLIC 183.35 15.2`
145			`LUT4 227.83 11.2`
146			`PFUREG 32 5.6`
147			`RIPPLE 72 38.7`
148	9	ale500	`SUB MODULES`
149			`cell count SLC Usage(%)`
150	10	ale500	`mul8x8 1 5.3`
151			`arith16 1 5.1`
152	9	ale500	`---------------------------------------------------`
153			`Report for cell arith16`
154			`Instance path: CC3_top/cpu0/alu/alu16/a16`
155			`Cell usage:`
156			`cell count Res Usage(%)`
157	10	ale500	`SLIC 62.08 5.1`
158			`LUT4 53.00 2.6`
159			`RIPPLE 36 19.4`
160	9	ale500	`---------------------------------------------------`
161			`Report for cell mul8x8`
162			`Instance path: CC3_top/cpu0/alu/alu16/mulu`
163			`Cell usage:`
164			`cell count Res Usage(%)`
165	10	ale500	`SLIC 64.07 5.3`
166			`LUT4 58.50 2.9`
167			`PFUREG 30 5.3`
168			`RIPPLE 36 19.4`
169	9	ale500	`---------------------------------------------------`
170			`Report for cell alu8`
171			`Instance path: CC3_top/cpu0/alu/alu8`
172			`Cell usage:`
173			`cell count Res Usage(%)`
174	10	ale500	`SLIC 96.53 8.0`
175			`LUT4 172.67 8.5`
176			`PFUREG 4 0.7`
177			`RIPPLE 15 8.1`
178	9	ale500	`SUB MODULES`
179			`cell count SLC Usage(%)`
180			`shift8 1 0.4`
181	10	ale500	`logic8 1 0.3`
182			`arith8 1 1.3`
183	9	ale500	`---------------------------------------------------`
184			`Report for cell shift8`
185			`Instance path: CC3_top/cpu0/alu/alu8/s8`
186			`Cell usage:`
187			`cell count Res Usage(%)`
188	10	ale500	`SLIC 4.83 0.4`
189	9	ale500	`LUT4 10.00 0.5`
190			`---------------------------------------------------`
191			`Report for cell arith8`
192			`Instance path: CC3_top/cpu0/alu/alu8/a8`
193			`Cell usage:`
194			`cell count Res Usage(%)`
195	10	ale500	`SLIC 15.87 1.3`
196			`LUT4 12.00 0.6`
197			`PFUREG 2 0.4`
198			`RIPPLE 10 5.4`
199	9	ale500	`---------------------------------------------------`
200			`Report for cell logic8`
201			`Instance path: CC3_top/cpu0/alu/alu8/l8`
202			`Cell usage:`
203			`cell count Res Usage(%)`
204	10	ale500	`SLIC 3.50 0.3`
205			`LUT4 7.00 0.3`

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Subversion Repositories 6809_6309_compatible_core

[/] [6809_6309_compatible_core/] [trunk/] [syn/] [lattice/] [P6809/] [P6809_P6809_map.hrr] - Blame information for rev 10