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URL https://opencores.org/ocsvn/6809_6309_compatible_core/6809_6309_compatible_core/trunk

Subversion Repositories 6809_6309_compatible_core

[/] [6809_6309_compatible_core/] [trunk/] [syn/] [lattice/] [P6809/] [stdout.log] - Blame information for rev 14

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Line No. Rev Author Line
1 12 ale500 
Running in Lattice mode
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Starting:    C:\lscc\diamond\3.1_x64\synpbase\win64\mbin\synbatch.exe
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Install:     C:\lscc\diamond\3.1_x64\synpbase
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Date:        Sun Jul 06 07:46:25 2014
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Version:     I-2013.09L
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Arguments:   -product synplify_pro  -batch P6809_P6809_synplify.tcl
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ProductType: synplify_pro
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log file: "C:\02_Elektronik\020_V6809\trunk\syn\lattice\P6809\P6809_P6809.srr"
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Running proj_1|P6809
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Running: Compile on proj_1|P6809
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Running: Compile Process on proj_1|P6809
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Running: Compile Input on proj_1|P6809
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Copied C:\02_Elektronik\020_V6809\trunk\syn\lattice\P6809\synwork\P6809_P6809_comp.srs to C:\02_Elektronik\020_V6809\trunk\syn\lattice\P6809\P6809_P6809.srs
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compiler Completed with warnings
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Return Code: 1
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Run Time:0h:00m:04s
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Copied C:\02_Elektronik\020_V6809\trunk\syn\lattice\P6809\P6809_P6809.srr to C:\02_Elektronik\020_V6809\trunk\syn\lattice\P6809\P6809_P6809.srf
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Complete: Compile Process on proj_1|P6809
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Running: Premap on proj_1|P6809
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premap Completed with warnings
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Return Code: 1
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Run Time:0h:00m:01s
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Complete: Compile on proj_1|P6809
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Running: Map on proj_1|P6809
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Running: Map & Optimize on proj_1|P6809
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fpga_mapper Completed with warnings
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Return Code: 1
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Run Time:0h:00m:18s
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Complete: Map on proj_1|P6809
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Copied C:\02_Elektronik\020_V6809\trunk\syn\lattice\P6809\P6809_P6809.srr to C:\02_Elektronik\020_V6809\trunk\syn\lattice\P6809\P6809_P6809.srf
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Complete: Logic Synthesis on proj_1|P6809
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TCL script complete: "P6809_P6809_synplify.tcl"
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exit status=0
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exit status=0
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Save changes for project:
81 14 ale500 
C:\02_Elektronik\020_V6809\trunk\synlog file: "C:\02_Elektronik\020_V6809\trunk\syn\lattice\P6809\P6809.srr"
82 12 ale500 
 
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Running P6809_syn|P6809
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Running: Compile on P6809_syn|P6809
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Running: Compile Process on P6809_syn|P6809
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Running: Compile Input on P6809_syn|P6809
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Copied C:\02_Elektronik\020_V6809\trunk\syn\lattice\P6809\synwork\P6809_comp.srs to C:\02_Elektronik\020_V6809\trunk\syn\lattice\P6809\P6809.srs
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compiler Completed with warnings
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Return Code: 1
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Run Time:0h:00m:04s
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Complete: Compile Process on P6809_syn|P6809
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Running: Premap on P6809_syn|P6809
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premap Completed with warnings
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Return Code: 1
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Run Time:0h:00m:01s
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Complete: Compile on P6809_syn|P6809
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Running: Map on P6809_syn|P6809
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Running: Map & Optimize on P6809_syn|P6809
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fpga_mapper Completed with warnings
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Return Code: 1
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Run Time:0h:00m:22s
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Complete: Map on P6809_syn|P6809
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Complete: Logic Synthesis on P6809_syn|P6809
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Opening object source file c:\02_elektronik\020_v6809\trunk\syn\lattice\..\..\rtl\verilog\alu16.v
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Opening object source file c:\02_elektronik\020_v6809\trunk\syn\lattice\..\..\rtl\verilog\mc6809_cpu.v
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Opening object source file c:\02_elektronik\020_v6809\trunk\syn\lattice\..\..\rtl\verilog\alu16.v
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Opening object source file c:\02_elektronik\020_v6809\trunk\syn\lattice\..\..\rtl\verilog\alu16.v
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exit status=0
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