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[/] [System09/] [trunk/] [rtl/] [System09_Digilent_Atlys/] [Makefile] - Blame information for rev 149

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Line No. Rev Author Line
1 141 davidgb
#===================================================================
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# File:        Makefile
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# Author:      David Burnette
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# Created:     July 5, 2007
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#
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# Description:
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#  Makefile to build the System09 by John Kent
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#
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#  This makefile will build John Kent's entire System09 project
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#  (RTL synthesis and monitor ROMs) and even download the final
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#  bitstream to the prototype board.
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#
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#  You can use Xilinx ISE interactively to add new RTL source files
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#  to this project.
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#
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# Usage:
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#  Use 'make help' to get a list of options.
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#
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# Dependencies:
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#  Depends on makefile fragments in the 'MKFRAGS' directory.
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#
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# Revision History:
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#   dgb  2007-07-05  Original version
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#
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#   dgb  2008-04-07  Split out files into fragments. Modified
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#                    ROM source generation to be per src directory.
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#
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#===================================================================
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MKFRAGS := ../../mkfiles
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export MKFRAGS
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BRAM_TYPE := b16
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export BRAM_TYPE
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#===================================================================
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# User-modifiable variables
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#
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# This name must match the name of the design in Xilinx ISE (case
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# sensitive).
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DESIGN_NAME := system09
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#
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# Constraint file (unfortunately it cannot be extracted from ISE)
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UCF_FILE    := system09.ucf
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#
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# Technology family (unfortunately it cannot be extracted from ISE)
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FAMILY      := spartan6
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# List of ROM VHDL files
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.PHONY: roms
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roms:
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        @$(MAKE) -C ../../Tools/as09
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        @$(MAKE) -C ../../Tools/s19tovhd
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        @$(MAKE) -C ../../src/sys09bug sys09swt.vhd
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        @$(MAKE) -C ../../src/Flex9 flex9ram.vhd
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#===================================================================
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# You should not need to edit anything below this line
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# XESS Tools
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ifeq "$(findstring CYGWIN_NT,$(shell uname -s))" "CYGWIN_NT"
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XESSPATH := $(shell cygpath "$(XSTOOLS_BIN_DIR)")
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else
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XESSPATH := $(XSTOOLS_BIN_DIR)
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endif
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XSLOAD     := "$(XESSPATH)/xsload.exe"
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include ../../mkfiles/xilinx_rules.mk
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#===================================================================
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# TARGETS
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.PHONY: all
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all: bit
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.PHONY: bit
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bit: roms $(DESIGN_NAME).bit
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.PHONY: impact
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impact: roms bit do_impact
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prom: roms $(DESIGN_NAME).mcs
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.PHONY: xsload
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xsload: roms $(DESIGN_NAME).bit
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        @$(ECHO)
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        @$(ECHO) "======= Downloading bitstream to XSA-3S1000 using XSLOAD (parallel) ="
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        $(XSLOAD) -p 0 -b xsa-3s1000 -fpga $<
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usbxsload.bit: roms $(DESIGN_NAME).bit
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        @$(ECHO)
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        @$(ECHO) "======= Generating special bitstream with StartUpClk=JtagClk ========"
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        $(GREP) -v StartUpClk $(BITGEN_OPTIONS_FILE) >tmp.ut
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        $(ECHO) "-g StartUpClk:JtagClk" >>tmp.ut
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        $(BITGEN) $(BITGEN_FLAGS) -f tmp.ut $(DESIGN_NAME).ncd usbxsload.bit
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.PHONY: usbxsload
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usbxsload: roms usbxsload.bit
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        @$(ECHO)
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        @$(ECHO) "======= Downloading bitstream to XSA-3S1000 using XSLOAD (USB) ======"
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        $(XSLOAD) -usb 0 -b xsa-3s1000 -fpga usbxsload.bit
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.PHONY: usbflash0
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usbflash0: roms prom $(DESIGN_NAME).bit
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        $(XSLOAD) -usb 0 -b xsa-3s1000 -flash $(DESIGN_NAME).mcs
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.PHONY: help
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help:
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        @$(ECHO) "Use this Makefile to regenerate the entire System09 bitstream"
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        @$(ECHO) "after modifying any of the source RTL or 6809 assembler code."
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        @$(ECHO) ""
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        @$(ECHO) "This makefile uses the following project files from the Xilinx ISE"
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        @$(ECHO) "   $(XST_FILE)"
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        @$(ECHO) ""
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        @$(ECHO) "You use Xilinx ISE interactively to add new RTL source files."
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        @$(ECHO) ""
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        @$(ECHO) "            Availiable targets"
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        @$(ECHO)
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        @$(ECHO) "  For building all or part of the system:"
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        @$(ECHO) "    roms      - Run asm09 and then generate the VHDL RTL rom files"
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        @$(ECHO) "    bit       - Rebuild the entire system and generate the bitstream file"
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        @$(ECHO) "    all       - Rebuild everything"
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        @$(ECHO) "    prom      - Rebuild the entire system and generate an MCS prom file"
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        @$(ECHO) "    exo       - Rebuild the entire system and generate an EXO prom file"
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        @$(ECHO)
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        @$(ECHO) "  For downloading the bitstream to the board:"
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        @$(ECHO) "    xsload    - Download the bitstream to the FPGA via XSLOAD"
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        @$(ECHO) "    usbxsload - Download the bitstream to the FPGA via usbXSLOAD"
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        @$(ECHO) "    usbflash0 - Download the bitstream Flash slot 0 via usbXSLOAD"
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        @$(ECHO) "    impact    - Download the bitstream to the FPGA via iMPACT"
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        @$(ECHO)
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        @$(ECHO) "  For project maintenance:"
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        @$(ECHO) "    help      - Print this help text"
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        @$(ECHO) "    clean     - Clean up the ISE files"
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        @$(ECHO) "    cleanall  - Clean up the ISE files and the Tools directories"
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        @$(ECHO) ""
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.PHONY: clean
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clean:
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        -$(MAKE) -C ../../src/sys09bug clean
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        -$(MAKE) -C ../../src/Flex9 clean
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        -$(RM) *.cfi *_bitgen.xwbt *.ncd *.ngc *.ngd *.twr *.bit *.mcs *.stx *.ucf.untf *.mrp *.ptwx *_map.map
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        -$(RM) *.ncl *.ngm *.prm *_pad.txt *.twx *.log *.syr *.par *.exo *.xpi *.xrpt *.xml
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        -$(RM) *.cmd_log *.ngr *.bld *_summary.html *.nc1 *.pcf *.bgn tmp.ut
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        -$(RM) *.pad *.placed_ncd_tracker *.routed_ncd_tracker *_pad.csv *.drc
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        -$(RM) *.pad_txt $(DESIGN_NAME)_impact.cmd *.unroutes $(DESIGN_NAME)_vhdl.prj
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        -$(RMDIR) _ngo _xmsgs xst xlnx_auto_0_xdb xst_tmp_dirs
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.PHONY: cleanall
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cleanall: clean
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        -$(MAKE) -C ../../Tools/as09 clean
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        -$(MAKE) -C ../../Tools/s19tovhd clean
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