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Line No.	Rev	Author	Line
1	3	gdevic	`<!DOCTYPE html PUBLIC "-//W3C//DTD HTML 4.01//EN">`
2			`<HTML><HEAD><TITLE>Z80 Instructions Timing</TITLE></HEAD><BODY>`
3			`<H1>Opcodes with ED prefix</H1>`
4			`ED 40 .. <A href="#40">IN B,(C)</A><BR>`
5			`ED 41 .. <A href="#41">OUT (C),B</A><BR>`
6			`ED 42 .. <A href="#42">SBC HL,BC</A><BR>`
7			`ED 43 .. <A href="#43">LD (nn),BC</A><BR>`
8			`ED 44 .. <A href="#44">NEG</A><BR>`
9			`ED 45 .. <A href="#45">RETN</A><BR>`
10			`ED 46 .. <A href="#46">IM 0</A><BR>`
11			`ED 47 .. <A href="#47">LD I,A</A><BR>`
12			`ED 48 .. <A href="#48">IN C,(C)</A><BR>`
13			`ED 49 .. <A href="#49">OUT (C),C</A><BR>`
14			`ED 4A .. <A href="#4A">ADC HL,BC</A><BR>`
15			`ED 4B .. <A href="#4B">LD BC,(nn)</A><BR>`
16			`ED 4C .. <A href="#4C">NEG*</A><BR>`
17			`ED 4D .. <A href="#4D">RETI</A><BR>`
18			`ED 4E .. <A href="#4E">IM 0*</A><BR>`
19			`ED 4F .. <A href="#4F">LD R,A</A><BR>`
20			`ED 50 .. <A href="#50">IN D,(C)</A><BR>`
21			`ED 51 .. <A href="#51">OUT (C),D</A><BR>`
22			`ED 52 .. <A href="#52">SBC HL,DE</A><BR>`
23			`ED 53 .. <A href="#53">LD (nn),DE</A><BR>`
24			`ED 54 .. <A href="#54">NEG*</A><BR>`
25			`ED 55 .. <A href="#55">RETN*</A><BR>`
26			`ED 56 .. <A href="#56">IM 1</A><BR>`
27			`ED 57 .. <A href="#57">LD A,I</A><BR>`
28			`ED 58 .. <A href="#58">IN E,(C)</A><BR>`
29			`ED 59 .. <A href="#59">OUT (C),E</A><BR>`
30			`ED 5A .. <A href="#5A">ADC HL,DE</A><BR>`
31			`ED 5B .. <A href="#5B">LD DE,(nn)</A><BR>`
32			`ED 5C .. <A href="#5C">NEG*</A><BR>`
33			`ED 5D .. <A href="#5D">RETN*</A><BR>`
34			`ED 5E .. <A href="#5E">IM 2</A><BR>`
35			`ED 5F .. <A href="#5F">LD A,R</A><BR>`
36			`ED 60 .. <A href="#60">IN H,(C)</A><BR>`
37			`ED 61 .. <A href="#61">OUT (C),H</A><BR>`
38			`ED 62 .. <A href="#62">SBC HL,HL</A><BR>`
39			`ED 63 .. <A href="#63">LD (nn),HL</A><BR>`
40			`ED 64 .. <A href="#64">NEG*</A><BR>`
41			`ED 65 .. <A href="#65">RETN*</A><BR>`
42			`ED 66 .. <A href="#66">IM 0*</A><BR>`
43			`ED 67 .. <A href="#67">RRD</A><BR>`
44			`ED 68 .. <A href="#68">IN L,(C)</A><BR>`
45			`ED 69 .. <A href="#69">OUT (C),L</A><BR>`
46			`ED 6A .. <A href="#6A">ADC HL,HL</A><BR>`
47			`ED 6B .. <A href="#6B">LD HL,(nn)</A><BR>`
48			`ED 6C .. <A href="#6C">NEG*</A><BR>`
49			`ED 6D .. <A href="#6D">RETN*</A><BR>`
50			`ED 6E .. <A href="#6E">IM 0*</A><BR>`
51			`ED 6F .. <A href="#6F">RLD</A><BR>`
52			`ED 70 .. <A href="#70">IN F,(C)*</A><BR>`
53			`ED 71 .. <A href="#71">OUT (C),0*</A><BR>`
54			`ED 72 .. <A href="#72">SBC HL,SP</A><BR>`
55			`ED 73 .. <A href="#73">LD (nn),SP</A><BR>`
56			`ED 74 .. <A href="#74">NEG*</A><BR>`
57			`ED 75 .. <A href="#75">RETN*</A><BR>`
58			`ED 76 .. <A href="#76">IM 1*</A><BR>`
59			`ED 78 .. <A href="#78">IN A,(C)</A><BR>`
60			`ED 79 .. <A href="#79">OUT (C),A</A><BR>`
61			`ED 7A .. <A href="#7A">ADC HL,SP</A><BR>`
62			`ED 7B .. <A href="#7B">LD SP,(nn)</A><BR>`
63			`ED 7C .. <A href="#7C">NEG*</A><BR>`
64			`ED 7D .. <A href="#7D">RETN*</A><BR>`
65			`ED 7E .. <A href="#7E">IM 2*</A><BR>`
66			`ED A0 .. <A href="#A0">LDI</A><BR>`
67			`ED A1 .. <A href="#A1">CPI</A><BR>`
68			`ED A2 .. <A href="#A2">INI</A><BR>`
69			`ED A3 .. <A href="#A3">OUTI</A><BR>`
70			`ED A8 .. <A href="#A8">LDD</A><BR>`
71			`ED A9 .. <A href="#A9">CPD</A><BR>`
72			`ED AA .. <A href="#AA">IND</A><BR>`
73			`ED AB .. <A href="#AB">OUTD</A><BR>`
74			`ED B0 .. <A href="#B0">LDIR</A><BR>`
75			`ED B1 .. <A href="#B1">CPIR</A><BR>`
76			`ED B2 .. <A href="#B2">INIR</A><BR>`
77			`ED B3 .. <A href="#B3">OTIR</A><BR>`
78			`ED B8 .. <A href="#B8">LDDR</A><BR>`
79			`ED B9 .. <A href="#B9">CPDR</A><BR>`
80			`ED BA .. <A href="#BA">INDR</A><BR>`
81			`ED BB .. <A href="#BB">OTDR</A><BR>`
82			`<H1>Instructions Timing</H1>`
83			`<H3 id="40">Opcode: ED 40 => IN B,(C)</H3>`
84			`<PRE>`
85			`-----------------------------------------------------------+`
86			`#001H T1 AB:000 DB:-- M1 \|`
87			`#002H T2 AB:000 DB:ED M1 MREQ RD \| Opcode read from 000 -> ED`
88			`#003H T3 AB:000 DB:-- RFSH \|`
89			`#004H T4 AB:000 DB:-- RFSH MREQ \| Refresh address 000`
90			`-----------------------------------------------------------+`
91			`#005H T1 AB:001 DB:-- M1 \|`
92			`#006H T2 AB:001 DB:40 M1 MREQ RD \| Opcode read from 001 -> 40`
93			`#007H T3 AB:001 DB:-- RFSH \|`
94			`#008H T4 AB:001 DB:-- RFSH MREQ \| Refresh address 001`
95			`#009H T5 AB:0FF DB:-- \|`
96			`#010H T6 AB:0FF DB:-- RD IORQ \| I/O read from 0FF`
97			`#011H T7 AB:0FF DB:-- RD IORQ \| I/O read from 0FF`
98			`#012H T8 AB:0FF DB:-- RD IORQ \| I/O read from 0FF`
99			`-----------------------------------------------------------+`
100			`</PRE>`
101			`<H3 id="41">Opcode: ED 41 => OUT (C),B</H3>`
102			`<PRE>`
103			`-----------------------------------------------------------+`
104			`#001H T1 AB:000 DB:-- M1 \|`
105			`#002H T2 AB:000 DB:ED M1 MREQ RD \| Opcode read from 000 -> ED`
106			`#003H T3 AB:000 DB:-- RFSH \|`
107			`#004H T4 AB:000 DB:-- RFSH MREQ \| Refresh address 000`
108			`-----------------------------------------------------------+`
109			`#005H T1 AB:001 DB:-- M1 \|`
110			`#006H T2 AB:001 DB:41 M1 MREQ RD \| Opcode read from 001 -> 41`
111			`#007H T3 AB:001 DB:-- RFSH \|`
112			`#008H T4 AB:001 DB:-- RFSH MREQ \| Refresh address 001`
113			`#009H T5 AB:0FF DB:-- \|`
114			`#010H T6 AB:0FF DB:C3 WR IORQ \| I/O write to 0FF <- C3`
115			`#011H T7 AB:0FF DB:C3 WR IORQ \| I/O write to 0FF <- C3`
116			`#012H T8 AB:0FF DB:C3 WR IORQ \| I/O write to 0FF <- C3`
117			`-----------------------------------------------------------+`
118			`</PRE>`
119			`<H3 id="42">Opcode: ED 42 => SBC HL,BC</H3>`
120			`<PRE>`
121			`-----------------------------------------------------------+`
122			`#001H T1 AB:000 DB:-- M1 \|`
123			`#002H T2 AB:000 DB:ED M1 MREQ RD \| Opcode read from 000 -> ED`
124			`#003H T3 AB:000 DB:-- RFSH \|`
125			`#004H T4 AB:000 DB:-- RFSH MREQ \| Refresh address 000`
126			`-----------------------------------------------------------+`
127			`#005H T1 AB:001 DB:-- M1 \|`
128			`#006H T2 AB:001 DB:42 M1 MREQ RD \| Opcode read from 001 -> 42`
129			`#007H T3 AB:001 DB:-- RFSH \|`
130			`#008H T4 AB:001 DB:-- RFSH MREQ \| Refresh address 001`
131			`#009H T5 AB:001 DB:-- \|`
132			`#010H T6 AB:001 DB:-- \|`
133			`#011H T7 AB:001 DB:-- \|`
134			`#012H T8 AB:001 DB:-- \|`
135			`#013H T9 AB:001 DB:-- \|`
136			`#014H T10 AB:001 DB:-- \|`
137			`#015H T11 AB:001 DB:-- \|`
138			`-----------------------------------------------------------+`
139			`</PRE>`
140			`<H3 id="43">Opcode: ED 43 n n => LD (nn),BC</H3>`
141			`<PRE>`
142			`-----------------------------------------------------------+`
143			`#001H T1 AB:000 DB:-- M1 \|`
144			`#002H T2 AB:000 DB:ED M1 MREQ RD \| Opcode read from 000 -> ED`
145			`#003H T3 AB:000 DB:-- RFSH \|`
146			`#004H T4 AB:000 DB:-- RFSH MREQ \| Refresh address 000`
147			`-----------------------------------------------------------+`
148			`#005H T1 AB:001 DB:-- M1 \|`
149			`#006H T2 AB:001 DB:43 M1 MREQ RD \| Opcode read from 001 -> 43`
150			`#007H T3 AB:001 DB:-- RFSH \|`
151			`#008H T4 AB:001 DB:-- RFSH MREQ \| Refresh address 001`
152			`#009H T5 AB:002 DB:-- \|`
153			`#010H T6 AB:002 DB:01 MREQ RD \| Memory read from 002 -> 01`
154			`#011H T7 AB:002 DB:01 MREQ RD \| Memory read from 002 -> 01`
155			`#012H T8 AB:003 DB:-- \|`
156			`#013H T9 AB:003 DB:02 MREQ RD \| Memory read from 003 -> 02`
157			`#014H T10 AB:003 DB:02 MREQ RD \| Memory read from 003 -> 02`
158			`#015H T11 AB:001 DB:-- \|`
159			`#016H T12 AB:001 DB:FF MREQ \|`
160			`#017H T13 AB:001 DB:FF MREQ WR \| Memory write to 001 <- FF`
161			`#018H T14 AB:002 DB:-- \|`
162			`#019H T15 AB:002 DB:C3 MREQ \|`
163			`#020H T16 AB:002 DB:C3 MREQ WR \| Memory write to 002 <- C3`
164			`-----------------------------------------------------------+`
165			`</PRE>`
166			`<H3 id="44">Opcode: ED 44 => NEG</H3>`
167			`<PRE>`
168			`-----------------------------------------------------------+`
169			`#001H T1 AB:000 DB:-- M1 \|`
170			`#002H T2 AB:000 DB:ED M1 MREQ RD \| Opcode read from 000 -> ED`
171			`#003H T3 AB:000 DB:-- RFSH \|`
172			`#004H T4 AB:000 DB:-- RFSH MREQ \| Refresh address 000`
173			`-----------------------------------------------------------+`
174			`#005H T1 AB:001 DB:-- M1 \|`
175			`#006H T2 AB:001 DB:44 M1 MREQ RD \| Opcode read from 001 -> 44`
176			`#007H T3 AB:001 DB:-- RFSH \|`
177			`#008H T4 AB:001 DB:-- RFSH MREQ \| Refresh address 001`
178			`-----------------------------------------------------------+`
179			`</PRE>`
180			`<H3 id="45">Opcode: ED 45 => RETN</H3>`
181			`<PRE>`
182			`-----------------------------------------------------------+`
183			`#001H T1 AB:000 DB:-- M1 \|`
184			`#002H T2 AB:000 DB:ED M1 MREQ RD \| Opcode read from 000 -> ED`
185			`#003H T3 AB:000 DB:-- RFSH \|`
186			`#004H T4 AB:000 DB:-- RFSH MREQ \| Refresh address 000`
187			`-----------------------------------------------------------+`
188			`#005H T1 AB:001 DB:-- M1 \|`
189			`#006H T2 AB:001 DB:45 M1 MREQ RD \| Opcode read from 001 -> 45`
190			`#007H T3 AB:001 DB:-- RFSH \|`
191			`#008H T4 AB:001 DB:-- RFSH MREQ \| Refresh address 001`
192			`#009H T5 AB:001 DB:-- \|`
193			`#010H T6 AB:001 DB:45 MREQ RD \| Memory read from 001 -> 45`
194			`#011H T7 AB:001 DB:45 MREQ RD \| Memory read from 001 -> 45`
195			`#012H T8 AB:002 DB:-- \|`
196			`#013H T9 AB:002 DB:01 MREQ RD \| Memory read from 002 -> 01`
197			`#014H T10 AB:002 DB:01 MREQ RD \| Memory read from 002 -> 01`
198			`-----------------------------------------------------------+`
199			`</PRE>`
200			`<H3 id="46">Opcode: ED 46 => IM 0</H3>`
201			`<PRE>`
202			`-----------------------------------------------------------+`
203			`#001H T1 AB:000 DB:-- M1 \|`
204			`#002H T2 AB:000 DB:ED M1 MREQ RD \| Opcode read from 000 -> ED`
205			`#003H T3 AB:000 DB:-- RFSH \|`
206			`#004H T4 AB:000 DB:-- RFSH MREQ \| Refresh address 000`
207			`-----------------------------------------------------------+`
208			`#005H T1 AB:001 DB:-- M1 \|`
209			`#006H T2 AB:001 DB:46 M1 MREQ RD \| Opcode read from 001 -> 46`
210			`#007H T3 AB:001 DB:-- RFSH \|`
211			`#008H T4 AB:001 DB:-- RFSH MREQ \| Refresh address 001`
212			`-----------------------------------------------------------+`
213			`</PRE>`
214			`<H3 id="47">Opcode: ED 47 => LD I,A</H3>`
215			`<PRE>`
216			`-----------------------------------------------------------+`
217			`#001H T1 AB:000 DB:-- M1 \|`
218			`#002H T2 AB:000 DB:ED M1 MREQ RD \| Opcode read from 000 -> ED`
219			`#003H T3 AB:000 DB:-- RFSH \|`
220			`#004H T4 AB:000 DB:-- RFSH MREQ \| Refresh address 000`
221			`-----------------------------------------------------------+`
222			`#005H T1 AB:001 DB:-- M1 \|`
223			`#006H T2 AB:001 DB:47 M1 MREQ RD \| Opcode read from 001 -> 47`
224			`#007H T3 AB:001 DB:-- RFSH \|`
225			`#008H T4 AB:001 DB:-- RFSH MREQ \| Refresh address 001`
226			`#009H T5 AB:001 DB:-- \|`
227			`-----------------------------------------------------------+`
228			`</PRE>`
229			`<H3 id="48">Opcode: ED 48 => IN C,(C)</H3>`
230			`<PRE>`
231			`-----------------------------------------------------------+`
232			`#001H T1 AB:000 DB:-- M1 \|`
233			`#002H T2 AB:000 DB:ED M1 MREQ RD \| Opcode read from 000 -> ED`
234			`#003H T3 AB:000 DB:-- RFSH \|`
235			`#004H T4 AB:000 DB:-- RFSH MREQ \| Refresh address 000`
236			`-----------------------------------------------------------+`
237			`#005H T1 AB:001 DB:-- M1 \|`
238			`#006H T2 AB:001 DB:48 M1 MREQ RD \| Opcode read from 001 -> 48`
239			`#007H T3 AB:001 DB:-- RFSH \|`
240			`#008H T4 AB:001 DB:-- RFSH MREQ \| Refresh address 001`
241			`#009H T5 AB:0FF DB:-- \|`
242			`#010H T6 AB:0FF DB:-- RD IORQ \| I/O read from 0FF`
243			`#011H T7 AB:0FF DB:-- RD IORQ \| I/O read from 0FF`
244			`#012H T8 AB:0FF DB:-- RD IORQ \| I/O read from 0FF`
245			`-----------------------------------------------------------+`
246			`</PRE>`
247			`<H3 id="49">Opcode: ED 49 => OUT (C),C</H3>`
248			`<PRE>`
249			`-----------------------------------------------------------+`
250			`#001H T1 AB:000 DB:-- M1 \|`
251			`#002H T2 AB:000 DB:ED M1 MREQ RD \| Opcode read from 000 -> ED`
252			`#003H T3 AB:000 DB:-- RFSH \|`
253			`#004H T4 AB:000 DB:-- RFSH MREQ \| Refresh address 000`
254			`-----------------------------------------------------------+`
255			`#005H T1 AB:001 DB:-- M1 \|`
256			`#006H T2 AB:001 DB:49 M1 MREQ RD \| Opcode read from 001 -> 49`
257			`#007H T3 AB:001 DB:-- RFSH \|`
258			`#008H T4 AB:001 DB:-- RFSH MREQ \| Refresh address 001`
259			`#009H T5 AB:0CB DB:-- \|`
260			`#010H T6 AB:0CB DB:CB WR IORQ \| I/O write to 0CB <- CB`
261			`#011H T7 AB:0CB DB:CB WR IORQ \| I/O write to 0CB <- CB`
262			`#012H T8 AB:0CB DB:CB WR IORQ \| I/O write to 0CB <- CB`
263			`-----------------------------------------------------------+`
264			`</PRE>`
265			`<H3 id="4A">Opcode: ED 4A => ADC HL,BC</H3>`
266			`<PRE>`
267			`-----------------------------------------------------------+`
268			`#001H T1 AB:000 DB:-- M1 \|`
269			`#002H T2 AB:000 DB:ED M1 MREQ RD \| Opcode read from 000 -> ED`
270			`#003H T3 AB:000 DB:-- RFSH \|`
271			`#004H T4 AB:000 DB:-- RFSH MREQ \| Refresh address 000`
272			`-----------------------------------------------------------+`
273			`#005H T1 AB:001 DB:-- M1 \|`
274			`#006H T2 AB:001 DB:4A M1 MREQ RD \| Opcode read from 001 -> 4A`
275			`#007H T3 AB:001 DB:-- RFSH \|`
276			`#008H T4 AB:001 DB:-- RFSH MREQ \| Refresh address 001`
277			`#009H T5 AB:001 DB:-- \|`
278			`#010H T6 AB:001 DB:-- \|`
279			`#011H T7 AB:001 DB:-- \|`
280			`#012H T8 AB:001 DB:-- \|`
281			`#013H T9 AB:001 DB:-- \|`
282			`#014H T10 AB:001 DB:-- \|`
283			`#015H T11 AB:001 DB:-- \|`
284			`-----------------------------------------------------------+`
285			`</PRE>`
286			`<H3 id="4B">Opcode: ED 4B n n => LD BC,(nn)</H3>`
287			`<PRE>`
288			`-----------------------------------------------------------+`
289			`#001H T1 AB:000 DB:-- M1 \|`
290			`#002H T2 AB:000 DB:ED M1 MREQ RD \| Opcode read from 000 -> ED`
291			`#003H T3 AB:000 DB:-- RFSH \|`
292			`#004H T4 AB:000 DB:-- RFSH MREQ \| Refresh address 000`
293			`-----------------------------------------------------------+`
294			`#005H T1 AB:001 DB:-- M1 \|`
295			`#006H T2 AB:001 DB:4B M1 MREQ RD \| Opcode read from 001 -> 4B`
296			`#007H T3 AB:001 DB:-- RFSH \|`
297			`#008H T4 AB:001 DB:-- RFSH MREQ \| Refresh address 001`
298			`#009H T5 AB:002 DB:-- \|`
299			`#010H T6 AB:002 DB:01 MREQ RD \| Memory read from 002 -> 01`
300			`#011H T7 AB:002 DB:01 MREQ RD \| Memory read from 002 -> 01`
301			`#012H T8 AB:003 DB:-- \|`
302			`#013H T9 AB:003 DB:02 MREQ RD \| Memory read from 003 -> 02`
303			`#014H T10 AB:003 DB:02 MREQ RD \| Memory read from 003 -> 02`
304			`#015H T11 AB:001 DB:-- \|`
305			`#016H T12 AB:001 DB:4B MREQ RD \| Memory read from 001 -> 4B`
306			`#017H T13 AB:001 DB:4B MREQ RD \| Memory read from 001 -> 4B`
307			`#018H T14 AB:002 DB:-- \|`
308			`#019H T15 AB:002 DB:01 MREQ RD \| Memory read from 002 -> 01`
309			`#020H T16 AB:002 DB:01 MREQ RD \| Memory read from 002 -> 01`
310			`-----------------------------------------------------------+`
311			`</PRE>`
312			`<H3 id="4C">Opcode: ED 4C => NEG*</H3>`
313			`<PRE>`
314			`-----------------------------------------------------------+`
315			`#001H T1 AB:000 DB:-- M1 \|`
316			`#002H T2 AB:000 DB:ED M1 MREQ RD \| Opcode read from 000 -> ED`
317			`#003H T3 AB:000 DB:-- RFSH \|`
318			`#004H T4 AB:000 DB:-- RFSH MREQ \| Refresh address 000`
319			`-----------------------------------------------------------+`
320			`#005H T1 AB:001 DB:-- M1 \|`
321			`#006H T2 AB:001 DB:4C M1 MREQ RD \| Opcode read from 001 -> 4C`
322			`#007H T3 AB:001 DB:-- RFSH \|`
323			`#008H T4 AB:001 DB:-- RFSH MREQ \| Refresh address 001`
324			`-----------------------------------------------------------+`
325			`</PRE>`
326			`<H3 id="4D">Opcode: ED 4D => RETI</H3>`
327			`<PRE>`
328			`-----------------------------------------------------------+`
329			`#001H T1 AB:000 DB:-- M1 \|`
330			`#002H T2 AB:000 DB:ED M1 MREQ RD \| Opcode read from 000 -> ED`
331			`#003H T3 AB:000 DB:-- RFSH \|`
332			`#004H T4 AB:000 DB:-- RFSH MREQ \| Refresh address 000`
333			`-----------------------------------------------------------+`
334			`#005H T1 AB:001 DB:-- M1 \|`
335			`#006H T2 AB:001 DB:4D M1 MREQ RD \| Opcode read from 001 -> 4D`
336			`#007H T3 AB:001 DB:-- RFSH \|`
337			`#008H T4 AB:001 DB:-- RFSH MREQ \| Refresh address 001`
338			`#009H T5 AB:003 DB:-- \|`
339			`#010H T6 AB:003 DB:02 MREQ RD \| Memory read from 003 -> 02`
340			`#011H T7 AB:003 DB:02 MREQ RD \| Memory read from 003 -> 02`
341			`#012H T8 AB:004 DB:-- \|`
342			`#013H T9 AB:004 DB:03 MREQ RD \| Memory read from 004 -> 03`
343			`#014H T10 AB:004 DB:03 MREQ RD \| Memory read from 004 -> 03`
344			`-----------------------------------------------------------+`
345			`</PRE>`
346			`<H3 id="4E">Opcode: ED 4E => IM 0*</H3>`
347			`<PRE>`
348			`-----------------------------------------------------------+`
349			`#001H T1 AB:000 DB:-- M1 \|`
350			`#002H T2 AB:000 DB:ED M1 MREQ RD \| Opcode read from 000 -> ED`
351			`#003H T3 AB:000 DB:-- RFSH \|`
352			`#004H T4 AB:000 DB:-- RFSH MREQ \| Refresh address 000`
353			`-----------------------------------------------------------+`
354			`#005H T1 AB:001 DB:-- M1 \|`
355			`#006H T2 AB:001 DB:4E M1 MREQ RD \| Opcode read from 001 -> 4E`
356			`#007H T3 AB:001 DB:-- RFSH \|`
357			`#008H T4 AB:001 DB:-- RFSH MREQ \| Refresh address 001`
358			`-----------------------------------------------------------+`
359			`</PRE>`
360			`<H3 id="4F">Opcode: ED 4F => LD R,A</H3>`
361			`<PRE>`
362			`-----------------------------------------------------------+`
363			`#001H T1 AB:000 DB:-- M1 \|`
364			`#002H T2 AB:000 DB:ED M1 MREQ RD \| Opcode read from 000 -> ED`
365			`#003H T3 AB:000 DB:-- RFSH \|`
366			`#004H T4 AB:000 DB:-- RFSH MREQ \| Refresh address 000`
367			`-----------------------------------------------------------+`
368			`#005H T1 AB:001 DB:-- M1 \|`
369			`#006H T2 AB:001 DB:4F M1 MREQ RD \| Opcode read from 001 -> 4F`
370			`#007H T3 AB:001 DB:-- RFSH \|`
371			`#008H T4 AB:001 DB:-- RFSH MREQ \| Refresh address 001`
372			`#009H T5 AB:001 DB:-- \|`
373			`-----------------------------------------------------------+`
374			`</PRE>`
375			`<H3 id="50">Opcode: ED 50 => IN D,(C)</H3>`
376			`<PRE>`
377			`-----------------------------------------------------------+`
378			`#001H T1 AB:000 DB:-- M1 \|`
379			`#002H T2 AB:000 DB:ED M1 MREQ RD \| Opcode read from 000 -> ED`
380			`#003H T3 AB:000 DB:-- RFSH \|`
381			`#004H T4 AB:000 DB:-- RFSH MREQ \| Refresh address 000`
382			`-----------------------------------------------------------+`
383			`#005H T1 AB:001 DB:-- M1 \|`
384			`#006H T2 AB:001 DB:50 M1 MREQ RD \| Opcode read from 001 -> 50`
385			`#007H T3 AB:001 DB:-- RFSH \|`
386			`#008H T4 AB:001 DB:-- RFSH MREQ \| Refresh address 001`
387			`#009H T5 AB:04B DB:-- \|`
388			`#010H T6 AB:04B DB:-- RD IORQ \| I/O read from 04B`
389			`#011H T7 AB:04B DB:-- RD IORQ \| I/O read from 04B`
390			`#012H T8 AB:04B DB:-- RD IORQ \| I/O read from 04B`
391			`-----------------------------------------------------------+`
392			`</PRE>`
393			`<H3 id="51">Opcode: ED 51 => OUT (C),D</H3>`
394			`<PRE>`
395			`-----------------------------------------------------------+`
396			`#001H T1 AB:000 DB:-- M1 \|`
397			`#002H T2 AB:000 DB:ED M1 MREQ RD \| Opcode read from 000 -> ED`
398			`#003H T3 AB:000 DB:-- RFSH \|`
399			`#004H T4 AB:000 DB:-- RFSH MREQ \| Refresh address 000`
400			`-----------------------------------------------------------+`
401			`#005H T1 AB:001 DB:-- M1 \|`
402			`#006H T2 AB:001 DB:51 M1 MREQ RD \| Opcode read from 001 -> 51`
403			`#007H T3 AB:001 DB:-- RFSH \|`
404			`#008H T4 AB:001 DB:-- RFSH MREQ \| Refresh address 001`
405			`#009H T5 AB:04B DB:-- \|`
406			`#010H T6 AB:04B DB:D3 WR IORQ \| I/O write to 04B <- D3`
407			`#011H T7 AB:04B DB:D3 WR IORQ \| I/O write to 04B <- D3`
408			`#012H T8 AB:04B DB:D3 WR IORQ \| I/O write to 04B <- D3`
409			`-----------------------------------------------------------+`
410			`</PRE>`
411			`<H3 id="52">Opcode: ED 52 => SBC HL,DE</H3>`
412			`<PRE>`
413			`-----------------------------------------------------------+`
414			`#001H T1 AB:000 DB:-- M1 \|`
415			`#002H T2 AB:000 DB:ED M1 MREQ RD \| Opcode read from 000 -> ED`
416			`#003H T3 AB:000 DB:-- RFSH \|`
417			`#004H T4 AB:000 DB:-- RFSH MREQ \| Refresh address 000`
418			`-----------------------------------------------------------+`
419			`#005H T1 AB:001 DB:-- M1 \|`
420			`#006H T2 AB:001 DB:52 M1 MREQ RD \| Opcode read from 001 -> 52`
421			`#007H T3 AB:001 DB:-- RFSH \|`
422			`#008H T4 AB:001 DB:-- RFSH MREQ \| Refresh address 001`
423			`#009H T5 AB:001 DB:-- \|`
424			`#010H T6 AB:001 DB:-- \|`
425			`#011H T7 AB:001 DB:-- \|`
426			`#012H T8 AB:001 DB:-- \|`
427			`#013H T9 AB:001 DB:-- \|`
428			`#014H T10 AB:001 DB:-- \|`
429			`#015H T11 AB:001 DB:-- \|`
430			`-----------------------------------------------------------+`
431			`</PRE>`
432			`<H3 id="53">Opcode: ED 53 n n => LD (nn),DE</H3>`
433			`<PRE>`
434			`-----------------------------------------------------------+`
435			`#001H T1 AB:000 DB:-- M1 \|`
436			`#002H T2 AB:000 DB:ED M1 MREQ RD \| Opcode read from 000 -> ED`
437			`#003H T3 AB:000 DB:-- RFSH \|`
438			`#004H T4 AB:000 DB:-- RFSH MREQ \| Refresh address 000`
439			`-----------------------------------------------------------+`
440			`#005H T1 AB:001 DB:-- M1 \|`
441			`#006H T2 AB:001 DB:53 M1 MREQ RD \| Opcode read from 001 -> 53`
442			`#007H T3 AB:001 DB:-- RFSH \|`
443			`#008H T4 AB:001 DB:-- RFSH MREQ \| Refresh address 001`
444			`#009H T5 AB:002 DB:-- \|`
445			`#010H T6 AB:002 DB:01 MREQ RD \| Memory read from 002 -> 01`
446			`#011H T7 AB:002 DB:01 MREQ RD \| Memory read from 002 -> 01`
447			`#012H T8 AB:003 DB:-- \|`
448			`#013H T9 AB:003 DB:02 MREQ RD \| Memory read from 003 -> 02`
449			`#014H T10 AB:003 DB:02 MREQ RD \| Memory read from 003 -> 02`
450			`#015H T11 AB:001 DB:-- \|`
451			`#016H T12 AB:001 DB:FF MREQ \|`
452			`#017H T13 AB:001 DB:FF MREQ WR \| Memory write to 001 <- FF`
453			`#018H T14 AB:002 DB:-- \|`
454			`#019H T15 AB:002 DB:D3 MREQ \|`
455			`#020H T16 AB:002 DB:D3 MREQ WR \| Memory write to 002 <- D3`
456			`-----------------------------------------------------------+`
457			`</PRE>`
458			`<H3 id="54">Opcode: ED 54 => NEG*</H3>`
459			`<PRE>`
460			`-----------------------------------------------------------+`
461			`#001H T1 AB:000 DB:-- M1 \|`
462			`#002H T2 AB:000 DB:ED M1 MREQ RD \| Opcode read from 000 -> ED`
463			`#003H T3 AB:000 DB:-- RFSH \|`
464			`#004H T4 AB:000 DB:-- RFSH MREQ \| Refresh address 000`
465			`-----------------------------------------------------------+`
466			`#005H T1 AB:001 DB:-- M1 \|`
467			`#006H T2 AB:001 DB:54 M1 MREQ RD \| Opcode read from 001 -> 54`
468			`#007H T3 AB:001 DB:-- RFSH \|`
469			`#008H T4 AB:001 DB:-- RFSH MREQ \| Refresh address 001`
470			`-----------------------------------------------------------+`
471			`</PRE>`
472			`<H3 id="55">Opcode: ED 55 => RETN*</H3>`
473			`<PRE>`
474			`-----------------------------------------------------------+`
475			`#001H T1 AB:000 DB:-- M1 \|`
476			`#002H T2 AB:000 DB:ED M1 MREQ RD \| Opcode read from 000 -> ED`
477			`#003H T3 AB:000 DB:-- RFSH \|`
478			`#004H T4 AB:000 DB:-- RFSH MREQ \| Refresh address 000`
479			`-----------------------------------------------------------+`
480			`#005H T1 AB:001 DB:-- M1 \|`
481			`#006H T2 AB:001 DB:55 M1 MREQ RD \| Opcode read from 001 -> 55`
482			`#007H T3 AB:001 DB:-- RFSH \|`
483			`#008H T4 AB:001 DB:-- RFSH MREQ \| Refresh address 001`
484			`#009H T5 AB:005 DB:-- \|`
485			`#010H T6 AB:005 DB:04 MREQ RD \| Memory read from 005 -> 04`
486			`#011H T7 AB:005 DB:04 MREQ RD \| Memory read from 005 -> 04`
487			`#012H T8 AB:006 DB:-- \|`
488			`#013H T9 AB:006 DB:05 MREQ RD \| Memory read from 006 -> 05`
489			`#014H T10 AB:006 DB:05 MREQ RD \| Memory read from 006 -> 05`
490			`-----------------------------------------------------------+`
491			`</PRE>`
492			`<H3 id="56">Opcode: ED 56 => IM 1</H3>`
493			`<PRE>`
494			`-----------------------------------------------------------+`
495			`#001H T1 AB:000 DB:-- M1 \|`
496			`#002H T2 AB:000 DB:ED M1 MREQ RD \| Opcode read from 000 -> ED`
497			`#003H T3 AB:000 DB:-- RFSH \|`
498			`#004H T4 AB:000 DB:-- RFSH MREQ \| Refresh address 000`
499			`-----------------------------------------------------------+`
500			`#005H T1 AB:001 DB:-- M1 \|`
501			`#006H T2 AB:001 DB:56 M1 MREQ RD \| Opcode read from 001 -> 56`
502			`#007H T3 AB:001 DB:-- RFSH \|`
503			`#008H T4 AB:001 DB:-- RFSH MREQ \| Refresh address 001`
504			`-----------------------------------------------------------+`
505			`</PRE>`
506			`<H3 id="57">Opcode: ED 57 => LD A,I</H3>`
507			`<PRE>`
508			`-----------------------------------------------------------+`
509			`#001H T1 AB:000 DB:-- M1 \|`
510			`#002H T2 AB:000 DB:ED M1 MREQ RD \| Opcode read from 000 -> ED`
511			`#003H T3 AB:000 DB:-- RFSH \|`
512			`#004H T4 AB:000 DB:-- RFSH MREQ \| Refresh address 000`
513			`-----------------------------------------------------------+`
514			`#005H T1 AB:001 DB:-- M1 \|`
515			`#006H T2 AB:001 DB:57 M1 MREQ RD \| Opcode read from 001 -> 57`
516			`#007H T3 AB:001 DB:-- RFSH \|`
517			`#008H T4 AB:001 DB:-- RFSH MREQ \| Refresh address 001`
518			`#009H T5 AB:001 DB:-- \|`
519			`-----------------------------------------------------------+`
520			`</PRE>`
521			`<H3 id="58">Opcode: ED 58 => IN E,(C)</H3>`
522			`<PRE>`
523			`-----------------------------------------------------------+`
524			`#001H T1 AB:000 DB:-- M1 \|`
525			`#002H T2 AB:000 DB:ED M1 MREQ RD \| Opcode read from 000 -> ED`
526			`#003H T3 AB:000 DB:-- RFSH \|`
527			`#004H T4 AB:000 DB:-- RFSH MREQ \| Refresh address 000`
528			`-----------------------------------------------------------+`
529			`#005H T1 AB:001 DB:-- M1 \|`
530			`#006H T2 AB:001 DB:58 M1 MREQ RD \| Opcode read from 001 -> 58`
531			`#007H T3 AB:001 DB:-- RFSH \|`
532			`#008H T4 AB:001 DB:-- RFSH MREQ \| Refresh address 001`
533			`#009H T5 AB:04B DB:-- \|`
534			`#010H T6 AB:04B DB:-- RD IORQ \| I/O read from 04B`
535			`#011H T7 AB:04B DB:-- RD IORQ \| I/O read from 04B`
536			`#012H T8 AB:04B DB:-- RD IORQ \| I/O read from 04B`
537			`-----------------------------------------------------------+`
538			`</PRE>`
539			`<H3 id="59">Opcode: ED 59 => OUT (C),E</H3>`
540			`<PRE>`
541			`-----------------------------------------------------------+`
542			`#001H T1 AB:000 DB:-- M1 \|`
543			`#002H T2 AB:000 DB:ED M1 MREQ RD \| Opcode read from 000 -> ED`
544			`#003H T3 AB:000 DB:-- RFSH \|`
545			`#004H T4 AB:000 DB:-- RFSH MREQ \| Refresh address 000`
546			`-----------------------------------------------------------+`
547			`#005H T1 AB:001 DB:-- M1 \|`
548			`#006H T2 AB:001 DB:59 M1 MREQ RD \| Opcode read from 001 -> 59`
549			`#007H T3 AB:001 DB:-- RFSH \|`
550			`#008H T4 AB:001 DB:-- RFSH MREQ \| Refresh address 001`
551			`#009H T5 AB:04B DB:-- \|`
552			`#010H T6 AB:04B DB:DB WR IORQ \| I/O write to 04B <- DB`
553			`#011H T7 AB:04B DB:DB WR IORQ \| I/O write to 04B <- DB`
554			`#012H T8 AB:04B DB:DB WR IORQ \| I/O write to 04B <- DB`
555			`-----------------------------------------------------------+`
556			`</PRE>`
557			`<H3 id="5A">Opcode: ED 5A => ADC HL,DE</H3>`
558			`<PRE>`
559			`-----------------------------------------------------------+`
560			`#001H T1 AB:000 DB:-- M1 \|`
561			`#002H T2 AB:000 DB:ED M1 MREQ RD \| Opcode read from 000 -> ED`
562			`#003H T3 AB:000 DB:-- RFSH \|`
563			`#004H T4 AB:000 DB:-- RFSH MREQ \| Refresh address 000`
564			`-----------------------------------------------------------+`
565			`#005H T1 AB:001 DB:-- M1 \|`
566			`#006H T2 AB:001 DB:5A M1 MREQ RD \| Opcode read from 001 -> 5A`
567			`#007H T3 AB:001 DB:-- RFSH \|`
568			`#008H T4 AB:001 DB:-- RFSH MREQ \| Refresh address 001`
569			`#009H T5 AB:001 DB:-- \|`
570			`#010H T6 AB:001 DB:-- \|`
571			`#011H T7 AB:001 DB:-- \|`
572			`#012H T8 AB:001 DB:-- \|`
573			`#013H T9 AB:001 DB:-- \|`
574			`#014H T10 AB:001 DB:-- \|`
575			`#015H T11 AB:001 DB:-- \|`
576			`-----------------------------------------------------------+`
577			`</PRE>`
578			`<H3 id="5B">Opcode: ED 5B n n => LD DE,(nn)</H3>`
579			`<PRE>`
580			`-----------------------------------------------------------+`
581			`#001H T1 AB:000 DB:-- M1 \|`
582			`#002H T2 AB:000 DB:ED M1 MREQ RD \| Opcode read from 000 -> ED`
583			`#003H T3 AB:000 DB:-- RFSH \|`
584			`#004H T4 AB:000 DB:-- RFSH MREQ \| Refresh address 000`
585			`-----------------------------------------------------------+`
586			`#005H T1 AB:001 DB:-- M1 \|`
587			`#006H T2 AB:001 DB:5B M1 MREQ RD \| Opcode read from 001 -> 5B`
588			`#007H T3 AB:001 DB:-- RFSH \|`
589			`#008H T4 AB:001 DB:-- RFSH MREQ \| Refresh address 001`
590			`#009H T5 AB:002 DB:-- \|`
591			`#010H T6 AB:002 DB:01 MREQ RD \| Memory read from 002 -> 01`
592			`#011H T7 AB:002 DB:01 MREQ RD \| Memory read from 002 -> 01`
593			`#012H T8 AB:003 DB:-- \|`
594			`#013H T9 AB:003 DB:02 MREQ RD \| Memory read from 003 -> 02`
595			`#014H T10 AB:003 DB:02 MREQ RD \| Memory read from 003 -> 02`
596			`#015H T11 AB:001 DB:-- \|`
597			`#016H T12 AB:001 DB:5B MREQ RD \| Memory read from 001 -> 5B`
598			`#017H T13 AB:001 DB:5B MREQ RD \| Memory read from 001 -> 5B`
599			`#018H T14 AB:002 DB:-- \|`
600			`#019H T15 AB:002 DB:01 MREQ RD \| Memory read from 002 -> 01`
601			`#020H T16 AB:002 DB:01 MREQ RD \| Memory read from 002 -> 01`
602			`-----------------------------------------------------------+`
603			`</PRE>`
604			`<H3 id="5C">Opcode: ED 5C => NEG*</H3>`
605			`<PRE>`
606			`-----------------------------------------------------------+`
607			`#001H T1 AB:000 DB:-- M1 \|`
608			`#002H T2 AB:000 DB:ED M1 MREQ RD \| Opcode read from 000 -> ED`
609			`#003H T3 AB:000 DB:-- RFSH \|`
610			`#004H T4 AB:000 DB:-- RFSH MREQ \| Refresh address 000`
611			`-----------------------------------------------------------+`
612			`#005H T1 AB:001 DB:-- M1 \|`
613			`#006H T2 AB:001 DB:5C M1 MREQ RD \| Opcode read from 001 -> 5C`
614			`#007H T3 AB:001 DB:-- RFSH \|`
615			`#008H T4 AB:001 DB:-- RFSH MREQ \| Refresh address 001`
616			`-----------------------------------------------------------+`
617			`</PRE>`
618			`<H3 id="5D">Opcode: ED 5D => RETN*</H3>`
619			`<PRE>`
620			`-----------------------------------------------------------+`
621			`#001H T1 AB:000 DB:-- M1 \|`
622			`#002H T2 AB:000 DB:ED M1 MREQ RD \| Opcode read from 000 -> ED`
623			`#003H T3 AB:000 DB:-- RFSH \|`
624			`#004H T4 AB:000 DB:-- RFSH MREQ \| Refresh address 000`
625			`-----------------------------------------------------------+`
626			`#005H T1 AB:001 DB:-- M1 \|`
627			`#006H T2 AB:001 DB:5D M1 MREQ RD \| Opcode read from 001 -> 5D`
628			`#007H T3 AB:001 DB:-- RFSH \|`
629			`#008H T4 AB:001 DB:-- RFSH MREQ \| Refresh address 001`
630			`#009H T5 AB:007 DB:-- \|`
631			`#010H T6 AB:007 DB:06 MREQ RD \| Memory read from 007 -> 06`
632			`#011H T7 AB:007 DB:06 MREQ RD \| Memory read from 007 -> 06`
633			`#012H T8 AB:008 DB:-- \|`
634			`#013H T9 AB:008 DB:07 MREQ RD \| Memory read from 008 -> 07`
635			`#014H T10 AB:008 DB:07 MREQ RD \| Memory read from 008 -> 07`
636			`-----------------------------------------------------------+`
637			`</PRE>`
638			`<H3 id="5E">Opcode: ED 5E => IM 2</H3>`
639			`<PRE>`
640			`-----------------------------------------------------------+`
641			`#001H T1 AB:000 DB:-- M1 \|`
642			`#002H T2 AB:000 DB:ED M1 MREQ RD \| Opcode read from 000 -> ED`
643			`#003H T3 AB:000 DB:-- RFSH \|`
644			`#004H T4 AB:000 DB:-- RFSH MREQ \| Refresh address 000`
645			`-----------------------------------------------------------+`
646			`#005H T1 AB:001 DB:-- M1 \|`
647			`#006H T2 AB:001 DB:5E M1 MREQ RD \| Opcode read from 001 -> 5E`
648			`#007H T3 AB:001 DB:-- RFSH \|`
649			`#008H T4 AB:001 DB:-- RFSH MREQ \| Refresh address 001`
650			`-----------------------------------------------------------+`
651			`</PRE>`
652			`<H3 id="5F">Opcode: ED 5F => LD A,R</H3>`
653			`<PRE>`
654			`-----------------------------------------------------------+`
655			`#001H T1 AB:000 DB:-- M1 \|`
656			`#002H T2 AB:000 DB:ED M1 MREQ RD \| Opcode read from 000 -> ED`
657			`#003H T3 AB:000 DB:-- RFSH \|`
658			`#004H T4 AB:000 DB:-- RFSH MREQ \| Refresh address 000`
659			`-----------------------------------------------------------+`
660			`#005H T1 AB:001 DB:-- M1 \|`
661			`#006H T2 AB:001 DB:5F M1 MREQ RD \| Opcode read from 001 -> 5F`
662			`#007H T3 AB:001 DB:-- RFSH \|`
663			`#008H T4 AB:001 DB:-- RFSH MREQ \| Refresh address 001`
664			`#009H T5 AB:001 DB:-- \|`
665			`-----------------------------------------------------------+`
666			`</PRE>`
667			`<H3 id="60">Opcode: ED 60 => IN H,(C)</H3>`
668			`<PRE>`
669			`-----------------------------------------------------------+`
670			`#001H T1 AB:000 DB:-- M1 \|`
671			`#002H T2 AB:000 DB:ED M1 MREQ RD \| Opcode read from 000 -> ED`
672			`#003H T3 AB:000 DB:-- RFSH \|`
673			`#004H T4 AB:000 DB:-- RFSH MREQ \| Refresh address 000`
674			`-----------------------------------------------------------+`
675			`#005H T1 AB:001 DB:-- M1 \|`
676			`#006H T2 AB:001 DB:60 M1 MREQ RD \| Opcode read from 001 -> 60`
677			`#007H T3 AB:001 DB:-- RFSH \|`
678			`#008H T4 AB:001 DB:-- RFSH MREQ \| Refresh address 001`
679			`#009H T5 AB:04B DB:-- \|`
680			`#010H T6 AB:04B DB:-- RD IORQ \| I/O read from 04B`
681			`#011H T7 AB:04B DB:-- RD IORQ \| I/O read from 04B`
682			`#012H T8 AB:04B DB:-- RD IORQ \| I/O read from 04B`
683			`-----------------------------------------------------------+`
684			`</PRE>`
685			`<H3 id="61">Opcode: ED 61 => OUT (C),H</H3>`
686			`<PRE>`
687			`-----------------------------------------------------------+`
688			`#001H T1 AB:000 DB:-- M1 \|`
689			`#002H T2 AB:000 DB:ED M1 MREQ RD \| Opcode read from 000 -> ED`
690			`#003H T3 AB:000 DB:-- RFSH \|`
691			`#004H T4 AB:000 DB:-- RFSH MREQ \| Refresh address 000`
692			`-----------------------------------------------------------+`
693			`#005H T1 AB:001 DB:-- M1 \|`
694			`#006H T2 AB:001 DB:61 M1 MREQ RD \| Opcode read from 001 -> 61`
695			`#007H T3 AB:001 DB:-- RFSH \|`
696			`#008H T4 AB:001 DB:-- RFSH MREQ \| Refresh address 001`
697			`#009H T5 AB:04B DB:-- \|`
698			`#010H T6 AB:04B DB:E3 WR IORQ \| I/O write to 04B <- E3`
699			`#011H T7 AB:04B DB:E3 WR IORQ \| I/O write to 04B <- E3`
700			`#012H T8 AB:04B DB:E3 WR IORQ \| I/O write to 04B <- E3`
701			`-----------------------------------------------------------+`
702			`</PRE>`
703			`<H3 id="62">Opcode: ED 62 => SBC HL,HL</H3>`
704			`<PRE>`
705			`-----------------------------------------------------------+`
706			`#001H T1 AB:000 DB:-- M1 \|`
707			`#002H T2 AB:000 DB:ED M1 MREQ RD \| Opcode read from 000 -> ED`
708			`#003H T3 AB:000 DB:-- RFSH \|`
709			`#004H T4 AB:000 DB:-- RFSH MREQ \| Refresh address 000`
710			`-----------------------------------------------------------+`
711			`#005H T1 AB:001 DB:-- M1 \|`
712			`#006H T2 AB:001 DB:62 M1 MREQ RD \| Opcode read from 001 -> 62`
713			`#007H T3 AB:001 DB:-- RFSH \|`
714			`#008H T4 AB:001 DB:-- RFSH MREQ \| Refresh address 001`
715			`#009H T5 AB:001 DB:-- \|`
716			`#010H T6 AB:001 DB:-- \|`
717			`#011H T7 AB:001 DB:-- \|`
718			`#012H T8 AB:001 DB:-- \|`
719			`#013H T9 AB:001 DB:-- \|`
720			`#014H T10 AB:001 DB:-- \|`
721			`#015H T11 AB:001 DB:-- \|`
722			`-----------------------------------------------------------+`
723			`</PRE>`
724			`<H3 id="63">Opcode: ED 63 n n => LD (nn),HL</H3>`
725			`<PRE>`
726			`-----------------------------------------------------------+`
727			`#001H T1 AB:000 DB:-- M1 \|`
728			`#002H T2 AB:000 DB:ED M1 MREQ RD \| Opcode read from 000 -> ED`
729			`#003H T3 AB:000 DB:-- RFSH \|`
730			`#004H T4 AB:000 DB:-- RFSH MREQ \| Refresh address 000`
731			`-----------------------------------------------------------+`
732			`#005H T1 AB:001 DB:-- M1 \|`
733			`#006H T2 AB:001 DB:63 M1 MREQ RD \| Opcode read from 001 -> 63`
734			`#007H T3 AB:001 DB:-- RFSH \|`
735			`#008H T4 AB:001 DB:-- RFSH MREQ \| Refresh address 001`
736			`#009H T5 AB:002 DB:-- \|`
737			`#010H T6 AB:002 DB:01 MREQ RD \| Memory read from 002 -> 01`
738			`#011H T7 AB:002 DB:01 MREQ RD \| Memory read from 002 -> 01`
739			`#012H T8 AB:003 DB:-- \|`
740			`#013H T9 AB:003 DB:02 MREQ RD \| Memory read from 003 -> 02`
741			`#014H T10 AB:003 DB:02 MREQ RD \| Memory read from 003 -> 02`
742			`#015H T11 AB:001 DB:-- \|`
743			`#016H T12 AB:001 DB:00 MREQ \|`
744			`#017H T13 AB:001 DB:00 MREQ WR \| Memory write to 001 <- 00`
745			`#018H T14 AB:002 DB:-- \|`
746			`#019H T15 AB:002 DB:00 MREQ \|`
747			`#020H T16 AB:002 DB:00 MREQ WR \| Memory write to 002 <- 00`
748			`-----------------------------------------------------------+`
749			`</PRE>`
750			`<H3 id="64">Opcode: ED 64 => NEG*</H3>`
751			`<PRE>`
752			`-----------------------------------------------------------+`
753			`#001H T1 AB:000 DB:-- M1 \|`
754			`#002H T2 AB:000 DB:ED M1 MREQ RD \| Opcode read from 000 -> ED`
755			`#003H T3 AB:000 DB:-- RFSH \|`
756			`#004H T4 AB:000 DB:-- RFSH MREQ \| Refresh address 000`
757			`-----------------------------------------------------------+`
758			`#005H T1 AB:001 DB:-- M1 \|`
759			`#006H T2 AB:001 DB:64 M1 MREQ RD \| Opcode read from 001 -> 64`
760			`#007H T3 AB:001 DB:-- RFSH \|`
761			`#008H T4 AB:001 DB:-- RFSH MREQ \| Refresh address 001`
762			`-----------------------------------------------------------+`
763			`</PRE>`
764			`<H3 id="65">Opcode: ED 65 => RETN*</H3>`
765			`<PRE>`
766			`-----------------------------------------------------------+`
767			`#001H T1 AB:000 DB:-- M1 \|`
768			`#002H T2 AB:000 DB:ED M1 MREQ RD \| Opcode read from 000 -> ED`
769			`#003H T3 AB:000 DB:-- RFSH \|`
770			`#004H T4 AB:000 DB:-- RFSH MREQ \| Refresh address 000`
771			`-----------------------------------------------------------+`
772			`#005H T1 AB:001 DB:-- M1 \|`
773			`#006H T2 AB:001 DB:65 M1 MREQ RD \| Opcode read from 001 -> 65`
774			`#007H T3 AB:001 DB:-- RFSH \|`
775			`#008H T4 AB:001 DB:-- RFSH MREQ \| Refresh address 001`
776			`#009H T5 AB:009 DB:-- \|`
777			`#010H T6 AB:009 DB:08 MREQ RD \| Memory read from 009 -> 08`
778			`#011H T7 AB:009 DB:08 MREQ RD \| Memory read from 009 -> 08`
779			`#012H T8 AB:00A DB:-- \|`
780			`#013H T9 AB:00A DB:09 MREQ RD \| Memory read from 00A -> 09`
781			`#014H T10 AB:00A DB:09 MREQ RD \| Memory read from 00A -> 09`
782			`-----------------------------------------------------------+`
783			`</PRE>`
784			`<H3 id="66">Opcode: ED 66 => IM 0*</H3>`
785			`<PRE>`
786			`-----------------------------------------------------------+`
787			`#001H T1 AB:000 DB:-- M1 \|`
788			`#002H T2 AB:000 DB:ED M1 MREQ RD \| Opcode read from 000 -> ED`
789			`#003H T3 AB:000 DB:-- RFSH \|`
790			`#004H T4 AB:000 DB:-- RFSH MREQ \| Refresh address 000`
791			`-----------------------------------------------------------+`
792			`#005H T1 AB:001 DB:-- M1 \|`
793			`#006H T2 AB:001 DB:66 M1 MREQ RD \| Opcode read from 001 -> 66`
794			`#007H T3 AB:001 DB:-- RFSH \|`
795			`#008H T4 AB:001 DB:-- RFSH MREQ \| Refresh address 001`
796			`-----------------------------------------------------------+`
797			`</PRE>`
798			`<H3 id="67">Opcode: ED 67 => RRD</H3>`
799			`<PRE>`
800			`-----------------------------------------------------------+`
801			`#001H T1 AB:000 DB:-- M1 \|`
802			`#002H T2 AB:000 DB:ED M1 MREQ RD \| Opcode read from 000 -> ED`
803			`#003H T3 AB:000 DB:-- RFSH \|`
804			`#004H T4 AB:000 DB:-- RFSH MREQ \| Refresh address 000`
805			`-----------------------------------------------------------+`
806			`#005H T1 AB:001 DB:-- M1 \|`
807			`#006H T2 AB:001 DB:67 M1 MREQ RD \| Opcode read from 001 -> 67`
808			`#007H T3 AB:001 DB:-- RFSH \|`
809			`#008H T4 AB:001 DB:-- RFSH MREQ \| Refresh address 001`
810			`#009H T5 AB:000 DB:-- \|`
811			`#010H T6 AB:000 DB:ED MREQ RD \| Memory read from 000 -> ED`
812			`#011H T7 AB:000 DB:ED MREQ RD \| Memory read from 000 -> ED`
813			`#012H T8 AB:000 DB:-- \|`
814			`#013H T9 AB:000 DB:-- \|`
815			`#014H T10 AB:000 DB:-- \|`
816			`#015H T11 AB:000 DB:-- \|`
817			`#016H T12 AB:000 DB:-- \|`
818			`#017H T13 AB:000 DB:EE MREQ \|`
819			`#018H T14 AB:000 DB:EE MREQ WR \| Memory write to 000 <- EE`
820			`-----------------------------------------------------------+`
821			`</PRE>`
822			`<H3 id="68">Opcode: ED 68 => IN L,(C)</H3>`
823			`<PRE>`
824			`-----------------------------------------------------------+`
825			`#001H T1 AB:000 DB:-- M1 \|`
826			`#002H T2 AB:000 DB:ED M1 MREQ RD \| Opcode read from 000 -> ED`
827			`#003H T3 AB:000 DB:-- RFSH \|`
828			`#004H T4 AB:000 DB:-- RFSH MREQ \| Refresh address 000`
829			`-----------------------------------------------------------+`
830			`#005H T1 AB:001 DB:-- M1 \|`
831			`#006H T2 AB:001 DB:68 M1 MREQ RD \| Opcode read from 001 -> 68`
832			`#007H T3 AB:001 DB:-- RFSH \|`
833			`#008H T4 AB:001 DB:-- RFSH MREQ \| Refresh address 001`
834			`#009H T5 AB:04B DB:-- \|`
835			`#010H T6 AB:04B DB:-- RD IORQ \| I/O read from 04B`
836			`#011H T7 AB:04B DB:-- RD IORQ \| I/O read from 04B`
837			`#012H T8 AB:04B DB:-- RD IORQ \| I/O read from 04B`
838			`-----------------------------------------------------------+`
839			`</PRE>`
840			`<H3 id="69">Opcode: ED 69 => OUT (C),L</H3>`
841			`<PRE>`
842			`-----------------------------------------------------------+`
843			`#001H T1 AB:000 DB:-- M1 \|`
844			`#002H T2 AB:000 DB:ED M1 MREQ RD \| Opcode read from 000 -> ED`
845			`#003H T3 AB:000 DB:-- RFSH \|`
846			`#004H T4 AB:000 DB:-- RFSH MREQ \| Refresh address 000`
847			`-----------------------------------------------------------+`
848			`#005H T1 AB:001 DB:-- M1 \|`
849			`#006H T2 AB:001 DB:69 M1 MREQ RD \| Opcode read from 001 -> 69`
850			`#007H T3 AB:001 DB:-- RFSH \|`
851			`#008H T4 AB:001 DB:-- RFSH MREQ \| Refresh address 001`
852			`#009H T5 AB:04B DB:-- \|`
853			`#010H T6 AB:04B DB:EB WR IORQ \| I/O write to 04B <- EB`
854			`#011H T7 AB:04B DB:EB WR IORQ \| I/O write to 04B <- EB`
855			`#012H T8 AB:04B DB:EB WR IORQ \| I/O write to 04B <- EB`
856			`-----------------------------------------------------------+`
857			`</PRE>`
858			`<H3 id="6A">Opcode: ED 6A => ADC HL,HL</H3>`
859			`<PRE>`
860			`-----------------------------------------------------------+`
861			`#001H T1 AB:000 DB:-- M1 \|`
862			`#002H T2 AB:000 DB:ED M1 MREQ RD \| Opcode read from 000 -> ED`
863			`#003H T3 AB:000 DB:-- RFSH \|`
864			`#004H T4 AB:000 DB:-- RFSH MREQ \| Refresh address 000`
865			`-----------------------------------------------------------+`
866			`#005H T1 AB:001 DB:-- M1 \|`
867			`#006H T2 AB:001 DB:6A M1 MREQ RD \| Opcode read from 001 -> 6A`
868			`#007H T3 AB:001 DB:-- RFSH \|`
869			`#008H T4 AB:001 DB:-- RFSH MREQ \| Refresh address 001`
870			`#009H T5 AB:001 DB:-- \|`
871			`#010H T6 AB:001 DB:-- \|`
872			`#011H T7 AB:001 DB:-- \|`
873			`#012H T8 AB:001 DB:-- \|`
874			`#013H T9 AB:001 DB:-- \|`
875			`#014H T10 AB:001 DB:-- \|`
876			`#015H T11 AB:001 DB:-- \|`
877			`-----------------------------------------------------------+`
878			`</PRE>`
879			`<H3 id="6B">Opcode: ED 6B n n => LD HL,(nn)</H3>`
880			`<PRE>`
881			`-----------------------------------------------------------+`
882			`#001H T1 AB:000 DB:-- M1 \|`
883			`#002H T2 AB:000 DB:ED M1 MREQ RD \| Opcode read from 000 -> ED`
884			`#003H T3 AB:000 DB:-- RFSH \|`
885			`#004H T4 AB:000 DB:-- RFSH MREQ \| Refresh address 000`
886			`-----------------------------------------------------------+`
887			`#005H T1 AB:001 DB:-- M1 \|`
888			`#006H T2 AB:001 DB:6B M1 MREQ RD \| Opcode read from 001 -> 6B`
889			`#007H T3 AB:001 DB:-- RFSH \|`
890			`#008H T4 AB:001 DB:-- RFSH MREQ \| Refresh address 001`
891			`#009H T5 AB:002 DB:-- \|`
892			`#010H T6 AB:002 DB:01 MREQ RD \| Memory read from 002 -> 01`
893			`#011H T7 AB:002 DB:01 MREQ RD \| Memory read from 002 -> 01`
894			`#012H T8 AB:003 DB:-- \|`
895			`#013H T9 AB:003 DB:02 MREQ RD \| Memory read from 003 -> 02`
896			`#014H T10 AB:003 DB:02 MREQ RD \| Memory read from 003 -> 02`
897			`#015H T11 AB:001 DB:-- \|`
898			`#016H T12 AB:001 DB:6B MREQ RD \| Memory read from 001 -> 6B`
899			`#017H T13 AB:001 DB:6B MREQ RD \| Memory read from 001 -> 6B`
900			`#018H T14 AB:002 DB:-- \|`
901			`#019H T15 AB:002 DB:01 MREQ RD \| Memory read from 002 -> 01`
902			`#020H T16 AB:002 DB:01 MREQ RD \| Memory read from 002 -> 01`
903			`-----------------------------------------------------------+`
904			`</PRE>`
905			`<H3 id="6C">Opcode: ED 6C => NEG*</H3>`
906			`<PRE>`
907			`-----------------------------------------------------------+`
908			`#001H T1 AB:000 DB:-- M1 \|`
909			`#002H T2 AB:000 DB:ED M1 MREQ RD \| Opcode read from 000 -> ED`
910			`#003H T3 AB:000 DB:-- RFSH \|`
911			`#004H T4 AB:000 DB:-- RFSH MREQ \| Refresh address 000`
912			`-----------------------------------------------------------+`
913			`#005H T1 AB:001 DB:-- M1 \|`
914			`#006H T2 AB:001 DB:6C M1 MREQ RD \| Opcode read from 001 -> 6C`
915			`#007H T3 AB:001 DB:-- RFSH \|`
916			`#008H T4 AB:001 DB:-- RFSH MREQ \| Refresh address 001`
917			`-----------------------------------------------------------+`
918			`</PRE>`
919			`<H3 id="6D">Opcode: ED 6D => RETN*</H3>`
920			`<PRE>`
921			`-----------------------------------------------------------+`
922			`#001H T1 AB:000 DB:-- M1 \|`
923			`#002H T2 AB:000 DB:ED M1 MREQ RD \| Opcode read from 000 -> ED`
924			`#003H T3 AB:000 DB:-- RFSH \|`
925			`#004H T4 AB:000 DB:-- RFSH MREQ \| Refresh address 000`
926			`-----------------------------------------------------------+`
927			`#005H T1 AB:001 DB:-- M1 \|`
928			`#006H T2 AB:001 DB:6D M1 MREQ RD \| Opcode read from 001 -> 6D`
929			`#007H T3 AB:001 DB:-- RFSH \|`
930			`#008H T4 AB:001 DB:-- RFSH MREQ \| Refresh address 001`
931			`#009H T5 AB:00B DB:-- \|`
932			`#010H T6 AB:00B DB:0A MREQ RD \| Memory read from 00B -> 0A`
933			`#011H T7 AB:00B DB:0A MREQ RD \| Memory read from 00B -> 0A`
934			`#012H T8 AB:00C DB:-- \|`
935			`#013H T9 AB:00C DB:0B MREQ RD \| Memory read from 00C -> 0B`
936			`#014H T10 AB:00C DB:0B MREQ RD \| Memory read from 00C -> 0B`
937			`-----------------------------------------------------------+`
938			`</PRE>`
939			`<H3 id="6E">Opcode: ED 6E => IM 0*</H3>`
940			`<PRE>`
941			`-----------------------------------------------------------+`
942			`#001H T1 AB:000 DB:-- M1 \|`
943			`#002H T2 AB:000 DB:ED M1 MREQ RD \| Opcode read from 000 -> ED`
944			`#003H T3 AB:000 DB:-- RFSH \|`
945			`#004H T4 AB:000 DB:-- RFSH MREQ \| Refresh address 000`
946			`-----------------------------------------------------------+`
947			`#005H T1 AB:001 DB:-- M1 \|`
948			`#006H T2 AB:001 DB:6E M1 MREQ RD \| Opcode read from 001 -> 6E`
949			`#007H T3 AB:001 DB:-- RFSH \|`
950			`#008H T4 AB:001 DB:-- RFSH MREQ \| Refresh address 001`
951			`-----------------------------------------------------------+`
952			`</PRE>`
953			`<H3 id="6F">Opcode: ED 6F => RLD</H3>`
954			`<PRE>`
955			`-----------------------------------------------------------+`
956			`#001H T1 AB:000 DB:-- M1 \|`
957			`#002H T2 AB:000 DB:ED M1 MREQ RD \| Opcode read from 000 -> ED`
958			`#003H T3 AB:000 DB:-- RFSH \|`
959			`#004H T4 AB:000 DB:-- RFSH MREQ \| Refresh address 000`
960			`-----------------------------------------------------------+`
961			`#005H T1 AB:001 DB:-- M1 \|`
962			`#006H T2 AB:001 DB:6F M1 MREQ RD \| Opcode read from 001 -> 6F`
963			`#007H T3 AB:001 DB:-- RFSH \|`
964			`#008H T4 AB:001 DB:-- RFSH MREQ \| Refresh address 001`
965			`#009H T5 AB:06B DB:-- \|`
966			`#010H T6 AB:06B DB:00 MREQ RD \| Memory read from 06B -> 00`
967			`#011H T7 AB:06B DB:00 MREQ RD \| Memory read from 06B -> 00`
968			`#012H T8 AB:06B DB:-- \|`
969			`#013H T9 AB:06B DB:-- \|`
970			`#014H T10 AB:06B DB:-- \|`
971			`#015H T11 AB:06B DB:-- \|`
972			`#016H T12 AB:06B DB:-- \|`
973			`#017H T13 AB:06B DB:03 MREQ \|`
974			`#018H T14 AB:06B DB:03 MREQ WR \| Memory write to 06B <- 03`
975			`-----------------------------------------------------------+`
976			`</PRE>`
977			`<H3 id="70">Opcode: ED 70 => IN F,(C)*</H3>`
978			`<PRE>`
979			`-----------------------------------------------------------+`
980			`#001H T1 AB:000 DB:-- M1 \|`
981			`#002H T2 AB:000 DB:ED M1 MREQ RD \| Opcode read from 000 -> ED`
982			`#003H T3 AB:000 DB:-- RFSH \|`
983			`#004H T4 AB:000 DB:-- RFSH MREQ \| Refresh address 000`
984			`-----------------------------------------------------------+`
985			`#005H T1 AB:001 DB:-- M1 \|`
986			`#006H T2 AB:001 DB:70 M1 MREQ RD \| Opcode read from 001 -> 70`
987			`#007H T3 AB:001 DB:-- RFSH \|`
988			`#008H T4 AB:001 DB:-- RFSH MREQ \| Refresh address 001`
989			`#009H T5 AB:04B DB:-- \|`
990			`#010H T6 AB:04B DB:-- RD IORQ \| I/O read from 04B`
991			`#011H T7 AB:04B DB:-- RD IORQ \| I/O read from 04B`
992			`#012H T8 AB:04B DB:-- RD IORQ \| I/O read from 04B`
993			`-----------------------------------------------------------+`
994			`</PRE>`
995			`<H3 id="71">Opcode: ED 71 => OUT (C),0*</H3>`
996			`<PRE>`
997			`-----------------------------------------------------------+`
998			`#001H T1 AB:000 DB:-- M1 \|`
999			`#002H T2 AB:000 DB:ED M1 MREQ RD \| Opcode read from 000 -> ED`
1000			`#003H T3 AB:000 DB:-- RFSH \|`
1001			`#004H T4 AB:000 DB:-- RFSH MREQ \| Refresh address 000`
1002			`-----------------------------------------------------------+`
1003			`#005H T1 AB:001 DB:-- M1 \|`
1004			`#006H T2 AB:001 DB:71 M1 MREQ RD \| Opcode read from 001 -> 71`
1005			`#007H T3 AB:001 DB:-- RFSH \|`
1006			`#008H T4 AB:001 DB:-- RFSH MREQ \| Refresh address 001`
1007			`#009H T5 AB:04B DB:-- \|`
1008			`#010H T6 AB:04B DB:00 WR IORQ \| I/O write to 04B <- 00`
1009			`#011H T7 AB:04B DB:00 WR IORQ \| I/O write to 04B <- 00`
1010			`#012H T8 AB:04B DB:00 WR IORQ \| I/O write to 04B <- 00`
1011			`-----------------------------------------------------------+`
1012			`</PRE>`
1013			`<H3 id="72">Opcode: ED 72 => SBC HL,SP</H3>`
1014			`<PRE>`
1015			`-----------------------------------------------------------+`
1016			`#001H T1 AB:000 DB:-- M1 \|`
1017			`#002H T2 AB:000 DB:ED M1 MREQ RD \| Opcode read from 000 -> ED`
1018			`#003H T3 AB:000 DB:-- RFSH \|`
1019			`#004H T4 AB:000 DB:-- RFSH MREQ \| Refresh address 000`
1020			`-----------------------------------------------------------+`
1021			`#005H T1 AB:001 DB:-- M1 \|`
1022			`#006H T2 AB:001 DB:72 M1 MREQ RD \| Opcode read from 001 -> 72`
1023			`#007H T3 AB:001 DB:-- RFSH \|`
1024			`#008H T4 AB:001 DB:-- RFSH MREQ \| Refresh address 001`
1025			`#009H T5 AB:001 DB:-- \|`
1026			`#010H T6 AB:001 DB:-- \|`
1027			`#011H T7 AB:001 DB:-- \|`
1028			`#012H T8 AB:001 DB:-- \|`
1029			`#013H T9 AB:001 DB:-- \|`
1030			`#014H T10 AB:001 DB:-- \|`
1031			`#015H T11 AB:001 DB:-- \|`
1032			`-----------------------------------------------------------+`
1033			`</PRE>`
1034			`<H3 id="73">Opcode: ED 73 n n => LD (nn),SP</H3>`
1035			`<PRE>`
1036			`-----------------------------------------------------------+`
1037			`#001H T1 AB:000 DB:-- M1 \|`
1038			`#002H T2 AB:000 DB:ED M1 MREQ RD \| Opcode read from 000 -> ED`
1039			`#003H T3 AB:000 DB:-- RFSH \|`
1040			`#004H T4 AB:000 DB:-- RFSH MREQ \| Refresh address 000`
1041			`-----------------------------------------------------------+`
1042			`#005H T1 AB:001 DB:-- M1 \|`
1043			`#006H T2 AB:001 DB:73 M1 MREQ RD \| Opcode read from 001 -> 73`
1044			`#007H T3 AB:001 DB:-- RFSH \|`
1045			`#008H T4 AB:001 DB:-- RFSH MREQ \| Refresh address 001`
1046			`#009H T5 AB:002 DB:-- \|`
1047			`#010H T6 AB:002 DB:01 MREQ RD \| Memory read from 002 -> 01`
1048			`#011H T7 AB:002 DB:01 MREQ RD \| Memory read from 002 -> 01`
1049			`#012H T8 AB:003 DB:-- \|`
1050			`#013H T9 AB:003 DB:02 MREQ RD \| Memory read from 003 -> 02`
1051			`#014H T10 AB:003 DB:02 MREQ RD \| Memory read from 003 -> 02`
1052			`#015H T11 AB:001 DB:-- \|`
1053			`#016H T12 AB:001 DB:0D MREQ \|`
1054			`#017H T13 AB:001 DB:0D MREQ WR \| Memory write to 001 <- 0D`
1055			`#018H T14 AB:002 DB:-- \|`
1056			`#019H T15 AB:002 DB:D1 MREQ \|`
1057			`#020H T16 AB:002 DB:D1 MREQ WR \| Memory write to 002 <- D1`
1058			`-----------------------------------------------------------+`
1059			`</PRE>`
1060			`<H3 id="74">Opcode: ED 74 => NEG*</H3>`
1061			`<PRE>`
1062			`-----------------------------------------------------------+`
1063			`#001H T1 AB:000 DB:-- M1 \|`
1064			`#002H T2 AB:000 DB:ED M1 MREQ RD \| Opcode read from 000 -> ED`
1065			`#003H T3 AB:000 DB:-- RFSH \|`
1066			`#004H T4 AB:000 DB:-- RFSH MREQ \| Refresh address 000`
1067			`-----------------------------------------------------------+`
1068			`#005H T1 AB:001 DB:-- M1 \|`
1069			`#006H T2 AB:001 DB:74 M1 MREQ RD \| Opcode read from 001 -> 74`
1070			`#007H T3 AB:001 DB:-- RFSH \|`
1071			`#008H T4 AB:001 DB:-- RFSH MREQ \| Refresh address 001`
1072			`-----------------------------------------------------------+`
1073			`</PRE>`
1074			`<H3 id="75">Opcode: ED 75 => RETN*</H3>`
1075			`<PRE>`
1076			`-----------------------------------------------------------+`
1077			`#001H T1 AB:000 DB:-- M1 \|`
1078			`#002H T2 AB:000 DB:ED M1 MREQ RD \| Opcode read from 000 -> ED`
1079			`#003H T3 AB:000 DB:-- RFSH \|`
1080			`#004H T4 AB:000 DB:-- RFSH MREQ \| Refresh address 000`
1081			`-----------------------------------------------------------+`
1082			`#005H T1 AB:001 DB:-- M1 \|`
1083			`#006H T2 AB:001 DB:75 M1 MREQ RD \| Opcode read from 001 -> 75`
1084			`#007H T3 AB:001 DB:-- RFSH \|`
1085			`#008H T4 AB:001 DB:-- RFSH MREQ \| Refresh address 001`
1086			`#009H T5 AB:00D DB:-- \|`
1087			`#010H T6 AB:00D DB:0C MREQ RD \| Memory read from 00D -> 0C`
1088			`#011H T7 AB:00D DB:0C MREQ RD \| Memory read from 00D -> 0C`
1089			`#012H T8 AB:00E DB:-- \|`
1090			`#013H T9 AB:00E DB:0D MREQ RD \| Memory read from 00E -> 0D`
1091			`#014H T10 AB:00E DB:0D MREQ RD \| Memory read from 00E -> 0D`
1092			`-----------------------------------------------------------+`
1093			`</PRE>`
1094			`<H3 id="76">Opcode: ED 76 => IM 1*</H3>`
1095			`<PRE>`
1096			`-----------------------------------------------------------+`
1097			`#001H T1 AB:000 DB:-- M1 \|`
1098			`#002H T2 AB:000 DB:ED M1 MREQ RD \| Opcode read from 000 -> ED`
1099			`#003H T3 AB:000 DB:-- RFSH \|`
1100			`#004H T4 AB:000 DB:-- RFSH MREQ \| Refresh address 000`
1101			`-----------------------------------------------------------+`
1102			`#005H T1 AB:001 DB:-- M1 \|`
1103			`#006H T2 AB:001 DB:76 M1 MREQ RD \| Opcode read from 001 -> 76`
1104			`#007H T3 AB:001 DB:-- RFSH \|`
1105			`#008H T4 AB:001 DB:-- RFSH MREQ \| Refresh address 001`
1106			`-----------------------------------------------------------+`
1107			`</PRE>`
1108			`<H3 id="78">Opcode: ED 78 => IN A,(C)</H3>`
1109			`<PRE>`
1110			`-----------------------------------------------------------+`
1111			`#001H T1 AB:000 DB:-- M1 \|`
1112			`#002H T2 AB:000 DB:ED M1 MREQ RD \| Opcode read from 000 -> ED`
1113			`#003H T3 AB:000 DB:-- RFSH \|`
1114			`#004H T4 AB:000 DB:-- RFSH MREQ \| Refresh address 000`
1115			`-----------------------------------------------------------+`
1116			`#005H T1 AB:001 DB:-- M1 \|`
1117			`#006H T2 AB:001 DB:78 M1 MREQ RD \| Opcode read from 001 -> 78`
1118			`#007H T3 AB:001 DB:-- RFSH \|`
1119			`#008H T4 AB:001 DB:-- RFSH MREQ \| Refresh address 001`
1120			`#009H T5 AB:04B DB:-- \|`
1121			`#010H T6 AB:04B DB:-- RD IORQ \| I/O read from 04B`
1122			`#011H T7 AB:04B DB:-- RD IORQ \| I/O read from 04B`
1123			`#012H T8 AB:04B DB:-- RD IORQ \| I/O read from 04B`
1124			`-----------------------------------------------------------+`
1125			`</PRE>`
1126			`<H3 id="79">Opcode: ED 79 => OUT (C),A</H3>`
1127			`<PRE>`
1128			`-----------------------------------------------------------+`
1129			`#001H T1 AB:000 DB:-- M1 \|`
1130			`#002H T2 AB:000 DB:ED M1 MREQ RD \| Opcode read from 000 -> ED`
1131			`#003H T3 AB:000 DB:-- RFSH \|`
1132			`#004H T4 AB:000 DB:-- RFSH MREQ \| Refresh address 000`
1133			`-----------------------------------------------------------+`
1134			`#005H T1 AB:001 DB:-- M1 \|`
1135			`#006H T2 AB:001 DB:79 M1 MREQ RD \| Opcode read from 001 -> 79`
1136			`#007H T3 AB:001 DB:-- RFSH \|`
1137			`#008H T4 AB:001 DB:-- RFSH MREQ \| Refresh address 001`
1138			`#009H T5 AB:04B DB:-- \|`
1139			`#010H T6 AB:04B DB:FB WR IORQ \| I/O write to 04B <- FB`
1140			`#011H T7 AB:04B DB:FB WR IORQ \| I/O write to 04B <- FB`
1141			`#012H T8 AB:04B DB:FB WR IORQ \| I/O write to 04B <- FB`
1142			`-----------------------------------------------------------+`
1143			`</PRE>`
1144			`<H3 id="7A">Opcode: ED 7A => ADC HL,SP</H3>`
1145			`<PRE>`
1146			`-----------------------------------------------------------+`
1147			`#001H T1 AB:000 DB:-- M1 \|`
1148			`#002H T2 AB:000 DB:ED M1 MREQ RD \| Opcode read from 000 -> ED`
1149			`#003H T3 AB:000 DB:-- RFSH \|`
1150			`#004H T4 AB:000 DB:-- RFSH MREQ \| Refresh address 000`
1151			`-----------------------------------------------------------+`
1152			`#005H T1 AB:001 DB:-- M1 \|`
1153			`#006H T2 AB:001 DB:7A M1 MREQ RD \| Opcode read from 001 -> 7A`
1154			`#007H T3 AB:001 DB:-- RFSH \|`
1155			`#008H T4 AB:001 DB:-- RFSH MREQ \| Refresh address 001`
1156			`#009H T5 AB:001 DB:-- \|`
1157			`#010H T6 AB:001 DB:-- \|`
1158			`#011H T7 AB:001 DB:-- \|`
1159			`#012H T8 AB:001 DB:-- \|`
1160			`#013H T9 AB:001 DB:-- \|`
1161			`#014H T10 AB:001 DB:-- \|`
1162			`#015H T11 AB:001 DB:-- \|`
1163			`-----------------------------------------------------------+`
1164			`</PRE>`
1165			`<H3 id="7B">Opcode: ED 7B n n => LD SP,(nn)</H3>`
1166			`<PRE>`
1167			`-----------------------------------------------------------+`
1168			`#001H T1 AB:000 DB:-- M1 \|`
1169			`#002H T2 AB:000 DB:ED M1 MREQ RD \| Opcode read from 000 -> ED`
1170			`#003H T3 AB:000 DB:-- RFSH \|`
1171			`#004H T4 AB:000 DB:-- RFSH MREQ \| Refresh address 000`
1172			`-----------------------------------------------------------+`
1173			`#005H T1 AB:001 DB:-- M1 \|`
1174			`#006H T2 AB:001 DB:7B M1 MREQ RD \| Opcode read from 001 -> 7B`
1175			`#007H T3 AB:001 DB:-- RFSH \|`
1176			`#008H T4 AB:001 DB:-- RFSH MREQ \| Refresh address 001`
1177			`#009H T5 AB:002 DB:-- \|`
1178			`#010H T6 AB:002 DB:01 MREQ RD \| Memory read from 002 -> 01`
1179			`#011H T7 AB:002 DB:01 MREQ RD \| Memory read from 002 -> 01`
1180			`#012H T8 AB:003 DB:-- \|`
1181			`#013H T9 AB:003 DB:02 MREQ RD \| Memory read from 003 -> 02`
1182			`#014H T10 AB:003 DB:02 MREQ RD \| Memory read from 003 -> 02`
1183			`#015H T11 AB:001 DB:-- \|`
1184			`#016H T12 AB:001 DB:7B MREQ RD \| Memory read from 001 -> 7B`
1185			`#017H T13 AB:001 DB:7B MREQ RD \| Memory read from 001 -> 7B`
1186			`#018H T14 AB:002 DB:-- \|`
1187			`#019H T15 AB:002 DB:01 MREQ RD \| Memory read from 002 -> 01`
1188			`#020H T16 AB:002 DB:01 MREQ RD \| Memory read from 002 -> 01`
1189			`-----------------------------------------------------------+`
1190			`</PRE>`
1191			`<H3 id="7C">Opcode: ED 7C => NEG*</H3>`
1192			`<PRE>`
1193			`-----------------------------------------------------------+`
1194			`#001H T1 AB:000 DB:-- M1 \|`
1195			`#002H T2 AB:000 DB:ED M1 MREQ RD \| Opcode read from 000 -> ED`
1196			`#003H T3 AB:000 DB:-- RFSH \|`
1197			`#004H T4 AB:000 DB:-- RFSH MREQ \| Refresh address 000`
1198			`-----------------------------------------------------------+`
1199			`#005H T1 AB:001 DB:-- M1 \|`
1200			`#006H T2 AB:001 DB:7C M1 MREQ RD \| Opcode read from 001 -> 7C`
1201			`#007H T3 AB:001 DB:-- RFSH \|`
1202			`#008H T4 AB:001 DB:-- RFSH MREQ \| Refresh address 001`
1203			`-----------------------------------------------------------+`
1204			`</PRE>`
1205			`<H3 id="7D">Opcode: ED 7D => RETN*</H3>`
1206			`<PRE>`
1207			`-----------------------------------------------------------+`
1208			`#001H T1 AB:000 DB:-- M1 \|`
1209			`#002H T2 AB:000 DB:ED M1 MREQ RD \| Opcode read from 000 -> ED`
1210			`#003H T3 AB:000 DB:-- RFSH \|`
1211			`#004H T4 AB:000 DB:-- RFSH MREQ \| Refresh address 000`
1212			`-----------------------------------------------------------+`
1213			`#005H T1 AB:001 DB:-- M1 \|`
1214			`#006H T2 AB:001 DB:7D M1 MREQ RD \| Opcode read from 001 -> 7D`
1215			`#007H T3 AB:001 DB:-- RFSH \|`
1216			`#008H T4 AB:001 DB:-- RFSH MREQ \| Refresh address 001`
1217			`#009H T5 AB:07B DB:-- \|`
1218			`#010H T6 AB:07B DB:00 MREQ RD \| Memory read from 07B -> 00`
1219			`#011H T7 AB:07B DB:00 MREQ RD \| Memory read from 07B -> 00`
1220			`#012H T8 AB:07C DB:-- \|`
1221			`#013H T9 AB:07C DB:00 MREQ RD \| Memory read from 07C -> 00`
1222			`#014H T10 AB:07C DB:00 MREQ RD \| Memory read from 07C -> 00`
1223			`-----------------------------------------------------------+`
1224			`</PRE>`
1225			`<H3 id="7E">Opcode: ED 7E => IM 2*</H3>`
1226			`<PRE>`
1227			`-----------------------------------------------------------+`
1228			`#001H T1 AB:000 DB:-- M1 \|`
1229			`#002H T2 AB:000 DB:ED M1 MREQ RD \| Opcode read from 000 -> ED`
1230			`#003H T3 AB:000 DB:-- RFSH \|`
1231			`#004H T4 AB:000 DB:-- RFSH MREQ \| Refresh address 000`
1232			`-----------------------------------------------------------+`
1233			`#005H T1 AB:001 DB:-- M1 \|`
1234			`#006H T2 AB:001 DB:7E M1 MREQ RD \| Opcode read from 001 -> 7E`
1235			`#007H T3 AB:001 DB:-- RFSH \|`
1236			`#008H T4 AB:001 DB:-- RFSH MREQ \| Refresh address 001`
1237			`-----------------------------------------------------------+`
1238			`</PRE>`
1239			`<H3 id="A0">Opcode: ED A0 => LDI</H3>`
1240			`<PRE>`
1241			`-----------------------------------------------------------+`
1242			`#001H T1 AB:000 DB:-- M1 \|`
1243			`#002H T2 AB:000 DB:ED M1 MREQ RD \| Opcode read from 000 -> ED`
1244			`#003H T3 AB:000 DB:-- RFSH \|`
1245			`#004H T4 AB:000 DB:-- RFSH MREQ \| Refresh address 000`
1246			`-----------------------------------------------------------+`
1247			`#005H T1 AB:001 DB:-- M1 \|`
1248			`#006H T2 AB:001 DB:A0 M1 MREQ RD \| Opcode read from 001 -> A0`
1249			`#007H T3 AB:001 DB:-- RFSH \|`
1250			`#008H T4 AB:001 DB:-- RFSH MREQ \| Refresh address 001`
1251			`#009H T5 AB:06C DB:-- \|`
1252			`#010H T6 AB:06C DB:00 MREQ RD \| Memory read from 06C -> 00`
1253			`#011H T7 AB:06C DB:00 MREQ RD \| Memory read from 06C -> 00`
1254			`#012H T8 AB:05B DB:-- \|`
1255			`#013H T9 AB:05B DB:00 MREQ \|`
1256			`#014H T10 AB:05B DB:00 MREQ WR \| Memory write to 05B <- 00`
1257			`#015H T11 AB:05B DB:00 \|`
1258			`#016H T12 AB:05B DB:00 \|`
1259			`-----------------------------------------------------------+`
1260			`</PRE>`
1261			`<H3 id="A1">Opcode: ED A1 => CPI</H3>`
1262			`<PRE>`
1263			`-----------------------------------------------------------+`
1264			`#001H T1 AB:000 DB:-- M1 \|`
1265			`#002H T2 AB:000 DB:ED M1 MREQ RD \| Opcode read from 000 -> ED`
1266			`#003H T3 AB:000 DB:-- RFSH \|`
1267			`#004H T4 AB:000 DB:-- RFSH MREQ \| Refresh address 000`
1268			`-----------------------------------------------------------+`
1269			`#005H T1 AB:001 DB:-- M1 \|`
1270			`#006H T2 AB:001 DB:A1 M1 MREQ RD \| Opcode read from 001 -> A1`
1271			`#007H T3 AB:001 DB:-- RFSH \|`
1272			`#008H T4 AB:001 DB:-- RFSH MREQ \| Refresh address 001`
1273			`#009H T5 AB:06D DB:-- \|`
1274			`#010H T6 AB:06D DB:00 MREQ RD \| Memory read from 06D -> 00`
1275			`#011H T7 AB:06D DB:00 MREQ RD \| Memory read from 06D -> 00`
1276			`#012H T8 AB:06D DB:-- \|`
1277			`#013H T9 AB:06D DB:-- \|`
1278			`#014H T10 AB:06D DB:-- \|`
1279			`#015H T11 AB:06D DB:-- \|`
1280			`#016H T12 AB:06D DB:-- \|`
1281			`-----------------------------------------------------------+`
1282			`</PRE>`
1283			`<H3 id="A2">Opcode: ED A2 => INI</H3>`
1284			`<PRE>`
1285			`-----------------------------------------------------------+`
1286			`#001H T1 AB:000 DB:-- M1 \|`
1287			`#002H T2 AB:000 DB:ED M1 MREQ RD \| Opcode read from 000 -> ED`
1288			`#003H T3 AB:000 DB:-- RFSH \|`
1289			`#004H T4 AB:000 DB:-- RFSH MREQ \| Refresh address 000`
1290			`-----------------------------------------------------------+`
1291			`#005H T1 AB:001 DB:-- M1 \|`
1292			`#006H T2 AB:001 DB:A2 M1 MREQ RD \| Opcode read from 001 -> A2`
1293			`#007H T3 AB:001 DB:-- RFSH \|`
1294			`#008H T4 AB:001 DB:-- RFSH MREQ \| Refresh address 001`
1295			`#009H T5 AB:001 DB:-- \|`
1296			`#010H T6 AB:049 DB:-- \|`
1297			`#011H T7 AB:049 DB:-- RD IORQ \| I/O read from 049`
1298			`#012H T8 AB:049 DB:-- RD IORQ \| I/O read from 049`
1299			`#013H T9 AB:049 DB:-- RD IORQ \| I/O read from 049`
1300			`#014H T10 AB:06E DB:-- \|`
1301			`#015H T11 AB:06E DB:A3 MREQ \|`
1302			`#016H T12 AB:06E DB:A3 MREQ WR \| Memory write to 06E <- A3`
1303			`-----------------------------------------------------------+`
1304			`</PRE>`
1305			`<H3 id="A3">Opcode: ED A3 => OUTI</H3>`
1306			`<PRE>`
1307			`-----------------------------------------------------------+`
1308			`#001H T1 AB:000 DB:-- M1 \|`
1309			`#002H T2 AB:000 DB:ED M1 MREQ RD \| Opcode read from 000 -> ED`
1310			`#003H T3 AB:000 DB:-- RFSH \|`
1311			`#004H T4 AB:000 DB:-- RFSH MREQ \| Refresh address 000`
1312			`-----------------------------------------------------------+`
1313			`#005H T1 AB:001 DB:-- M1 \|`
1314			`#006H T2 AB:001 DB:A3 M1 MREQ RD \| Opcode read from 001 -> A3`
1315			`#007H T3 AB:001 DB:-- RFSH \|`
1316			`#008H T4 AB:001 DB:-- RFSH MREQ \| Refresh address 001`
1317			`#009H T5 AB:001 DB:-- \|`
1318			`#010H T6 AB:06F DB:-- \|`
1319			`#011H T7 AB:06F DB:00 MREQ RD \| Memory read from 06F -> 00`
1320			`#012H T8 AB:06F DB:00 MREQ RD \| Memory read from 06F -> 00`
1321			`#013H T9 AB:049 DB:-- \|`
1322			`#014H T10 AB:049 DB:00 WR IORQ \| I/O write to 049 <- 00`
1323			`#015H T11 AB:049 DB:00 WR IORQ \| I/O write to 049 <- 00`
1324			`#016H T12 AB:049 DB:00 WR IORQ \| I/O write to 049 <- 00`
1325			`-----------------------------------------------------------+`
1326			`</PRE>`
1327			`<H3 id="A8">Opcode: ED A8 => LDD</H3>`
1328			`<PRE>`
1329			`-----------------------------------------------------------+`
1330			`#001H T1 AB:000 DB:-- M1 \|`
1331			`#002H T2 AB:000 DB:ED M1 MREQ RD \| Opcode read from 000 -> ED`
1332			`#003H T3 AB:000 DB:-- RFSH \|`
1333			`#004H T4 AB:000 DB:-- RFSH MREQ \| Refresh address 000`
1334			`-----------------------------------------------------------+`
1335			`#005H T1 AB:001 DB:-- M1 \|`
1336			`#006H T2 AB:001 DB:A8 M1 MREQ RD \| Opcode read from 001 -> A8`
1337			`#007H T3 AB:001 DB:-- RFSH \|`
1338			`#008H T4 AB:001 DB:-- RFSH MREQ \| Refresh address 001`
1339			`#009H T5 AB:070 DB:-- \|`
1340			`#010H T6 AB:070 DB:00 MREQ RD \| Memory read from 070 -> 00`
1341			`#011H T7 AB:070 DB:00 MREQ RD \| Memory read from 070 -> 00`
1342			`#012H T8 AB:05C DB:-- \|`
1343			`#013H T9 AB:05C DB:00 MREQ \|`
1344			`#014H T10 AB:05C DB:00 MREQ WR \| Memory write to 05C <- 00`
1345			`#015H T11 AB:05C DB:00 \|`
1346			`#016H T12 AB:05C DB:00 \|`
1347			`-----------------------------------------------------------+`
1348			`</PRE>`
1349			`<H3 id="A9">Opcode: ED A9 => CPD</H3>`
1350			`<PRE>`
1351			`-----------------------------------------------------------+`
1352			`#001H T1 AB:000 DB:-- M1 \|`
1353			`#002H T2 AB:000 DB:ED M1 MREQ RD \| Opcode read from 000 -> ED`
1354			`#003H T3 AB:000 DB:-- RFSH \|`
1355			`#004H T4 AB:000 DB:-- RFSH MREQ \| Refresh address 000`
1356			`-----------------------------------------------------------+`
1357			`#005H T1 AB:001 DB:-- M1 \|`
1358			`#006H T2 AB:001 DB:A9 M1 MREQ RD \| Opcode read from 001 -> A9`
1359			`#007H T3 AB:001 DB:-- RFSH \|`
1360			`#008H T4 AB:001 DB:-- RFSH MREQ \| Refresh address 001`
1361			`#009H T5 AB:06F DB:-- \|`
1362			`#010H T6 AB:06F DB:00 MREQ RD \| Memory read from 06F -> 00`
1363			`#011H T7 AB:06F DB:00 MREQ RD \| Memory read from 06F -> 00`
1364			`#012H T8 AB:06F DB:-- \|`
1365			`#013H T9 AB:06F DB:-- \|`
1366			`#014H T10 AB:06F DB:-- \|`
1367			`#015H T11 AB:06F DB:-- \|`
1368			`#016H T12 AB:06F DB:-- \|`
1369			`-----------------------------------------------------------+`
1370			`</PRE>`
1371			`<H3 id="AA">Opcode: ED AA => IND</H3>`
1372			`<PRE>`
1373			`-----------------------------------------------------------+`
1374			`#001H T1 AB:000 DB:-- M1 \|`
1375			`#002H T2 AB:000 DB:ED M1 MREQ RD \| Opcode read from 000 -> ED`
1376			`#003H T3 AB:000 DB:-- RFSH \|`
1377			`#004H T4 AB:000 DB:-- RFSH MREQ \| Refresh address 000`
1378			`-----------------------------------------------------------+`
1379			`#005H T1 AB:001 DB:-- M1 \|`
1380			`#006H T2 AB:001 DB:AA M1 MREQ RD \| Opcode read from 001 -> AA`
1381			`#007H T3 AB:001 DB:-- RFSH \|`
1382			`#008H T4 AB:001 DB:-- RFSH MREQ \| Refresh address 001`
1383			`#009H T5 AB:001 DB:-- \|`
1384			`#010H T6 AB:047 DB:-- \|`
1385			`#011H T7 AB:047 DB:-- RD IORQ \| I/O read from 047`
1386			`#012H T8 AB:047 DB:-- RD IORQ \| I/O read from 047`
1387			`#013H T9 AB:047 DB:-- RD IORQ \| I/O read from 047`
1388			`#014H T10 AB:06E DB:-- \|`
1389			`#015H T11 AB:06E DB:AB MREQ \|`
1390			`#016H T12 AB:06E DB:AB MREQ WR \| Memory write to 06E <- AB`
1391			`-----------------------------------------------------------+`
1392			`</PRE>`
1393			`<H3 id="AB">Opcode: ED AB => OUTD</H3>`
1394			`<PRE>`
1395			`-----------------------------------------------------------+`
1396			`#001H T1 AB:000 DB:-- M1 \|`
1397			`#002H T2 AB:000 DB:ED M1 MREQ RD \| Opcode read from 000 -> ED`
1398			`#003H T3 AB:000 DB:-- RFSH \|`
1399			`#004H T4 AB:000 DB:-- RFSH MREQ \| Refresh address 000`
1400			`-----------------------------------------------------------+`
1401			`#005H T1 AB:001 DB:-- M1 \|`
1402			`#006H T2 AB:001 DB:AB M1 MREQ RD \| Opcode read from 001 -> AB`
1403			`#007H T3 AB:001 DB:-- RFSH \|`
1404			`#008H T4 AB:001 DB:-- RFSH MREQ \| Refresh address 001`
1405			`#009H T5 AB:001 DB:-- \|`
1406			`#010H T6 AB:06D DB:-- \|`
1407			`#011H T7 AB:06D DB:00 MREQ RD \| Memory read from 06D -> 00`
1408			`#012H T8 AB:06D DB:00 MREQ RD \| Memory read from 06D -> 00`
1409			`#013H T9 AB:047 DB:-- \|`
1410			`#014H T10 AB:047 DB:00 WR IORQ \| I/O write to 047 <- 00`
1411			`#015H T11 AB:047 DB:00 WR IORQ \| I/O write to 047 <- 00`
1412			`#016H T12 AB:047 DB:00 WR IORQ \| I/O write to 047 <- 00`
1413			`-----------------------------------------------------------+`
1414			`</PRE>`
1415			`<H3 id="B0">Opcode: ED B0 => LDIR</H3>`
1416			`<PRE>`
1417			`-----------------------------------------------------------+`
1418			`#001H T1 AB:000 DB:-- M1 \|`
1419			`#002H T2 AB:000 DB:ED M1 MREQ RD \| Opcode read from 000 -> ED`
1420			`#003H T3 AB:000 DB:-- RFSH \|`
1421			`#004H T4 AB:000 DB:-- RFSH MREQ \| Refresh address 000`
1422			`-----------------------------------------------------------+`
1423			`#005H T1 AB:001 DB:-- M1 \|`
1424			`#006H T2 AB:001 DB:B0 M1 MREQ RD \| Opcode read from 001 -> B0`
1425			`#007H T3 AB:001 DB:-- RFSH \|`
1426			`#008H T4 AB:001 DB:-- RFSH MREQ \| Refresh address 001`
1427			`#009H T5 AB:06C DB:-- \|`
1428			`#010H T6 AB:06C DB:00 MREQ RD \| Memory read from 06C -> 00`
1429			`#011H T7 AB:06C DB:00 MREQ RD \| Memory read from 06C -> 00`
1430			`#012H T8 AB:05B DB:-- \|`
1431			`#013H T9 AB:05B DB:00 MREQ \|`
1432			`#014H T10 AB:05B DB:00 MREQ WR \| Memory write to 05B <- 00`
1433			`#015H T11 AB:05B DB:00 \|`
1434			`#016H T12 AB:05B DB:00 \|`
1435			`#017H T13 AB:05B DB:-- \|`
1436			`#018H T14 AB:05B DB:-- \|`
1437			`#019H T15 AB:05B DB:-- \|`
1438			`#020H T16 AB:05B DB:-- \|`
1439			`#021H T17 AB:05B DB:-- \|`
1440			`-----------------------------------------------------------+`
1441			`</PRE>`
1442			`<H3 id="B1">Opcode: ED B1 => CPIR</H3>`
1443			`<PRE>`
1444			`-----------------------------------------------------------+`
1445			`#001H T1 AB:000 DB:-- M1 \|`
1446			`#002H T2 AB:000 DB:ED M1 MREQ RD \| Opcode read from 000 -> ED`
1447			`#003H T3 AB:000 DB:-- RFSH \|`
1448			`#004H T4 AB:000 DB:-- RFSH MREQ \| Refresh address 000`
1449			`-----------------------------------------------------------+`
1450			`#005H T1 AB:001 DB:-- M1 \|`
1451			`#006H T2 AB:001 DB:B1 M1 MREQ RD \| Opcode read from 001 -> B1`
1452			`#007H T3 AB:001 DB:-- RFSH \|`
1453			`#008H T4 AB:001 DB:-- RFSH MREQ \| Refresh address 001`
1454			`#009H T5 AB:06D DB:-- \|`
1455			`#010H T6 AB:06D DB:00 MREQ RD \| Memory read from 06D -> 00`
1456			`#011H T7 AB:06D DB:00 MREQ RD \| Memory read from 06D -> 00`
1457			`#012H T8 AB:06D DB:-- \|`
1458			`#013H T9 AB:06D DB:-- \|`
1459			`#014H T10 AB:06D DB:-- \|`
1460			`#015H T11 AB:06D DB:-- \|`
1461			`#016H T12 AB:06D DB:-- \|`
1462			`#017H T13 AB:06D DB:-- \|`
1463			`#018H T14 AB:06D DB:-- \|`
1464			`#019H T15 AB:06D DB:-- \|`
1465			`#020H T16 AB:06D DB:-- \|`
1466			`#021H T17 AB:06D DB:-- \|`
1467			`-----------------------------------------------------------+`
1468			`</PRE>`
1469			`<H3 id="B2">Opcode: ED B2 => INIR</H3>`
1470			`<PRE>`
1471			`-----------------------------------------------------------+`
1472			`#001H T1 AB:000 DB:-- M1 \|`
1473			`#002H T2 AB:000 DB:ED M1 MREQ RD \| Opcode read from 000 -> ED`
1474			`#003H T3 AB:000 DB:-- RFSH \|`
1475			`#004H T4 AB:000 DB:-- RFSH MREQ \| Refresh address 000`
1476			`-----------------------------------------------------------+`
1477			`#005H T1 AB:001 DB:-- M1 \|`
1478			`#006H T2 AB:001 DB:B2 M1 MREQ RD \| Opcode read from 001 -> B2`
1479			`#007H T3 AB:001 DB:-- RFSH \|`
1480			`#008H T4 AB:001 DB:-- RFSH MREQ \| Refresh address 001`
1481			`#009H T5 AB:001 DB:-- \|`
1482			`#010H T6 AB:045 DB:-- \|`
1483			`#011H T7 AB:045 DB:-- RD IORQ \| I/O read from 045`
1484			`#012H T8 AB:045 DB:-- RD IORQ \| I/O read from 045`
1485			`#013H T9 AB:045 DB:-- RD IORQ \| I/O read from 045`
1486			`#014H T10 AB:06E DB:-- \|`
1487			`#015H T11 AB:06E DB:B3 MREQ \|`
1488			`#016H T12 AB:06E DB:B3 MREQ WR \| Memory write to 06E <- B3`
1489			`#017H T13 AB:06E DB:-- \|`
1490			`#018H T14 AB:06E DB:-- \|`
1491			`#019H T15 AB:06E DB:-- \|`
1492			`#020H T16 AB:06E DB:-- \|`
1493			`#021H T17 AB:06E DB:-- \|`
1494			`-----------------------------------------------------------+`
1495			`</PRE>`
1496			`<H3 id="B3">Opcode: ED B3 => OTIR</H3>`
1497			`<PRE>`
1498			`-----------------------------------------------------------+`
1499			`#001H T1 AB:000 DB:-- M1 \|`
1500			`#002H T2 AB:000 DB:ED M1 MREQ RD \| Opcode read from 000 -> ED`
1501			`#003H T3 AB:000 DB:-- RFSH \|`
1502			`#004H T4 AB:000 DB:-- RFSH MREQ \| Refresh address 000`
1503			`-----------------------------------------------------------+`
1504			`#005H T1 AB:001 DB:-- M1 \|`
1505			`#006H T2 AB:001 DB:B3 M1 MREQ RD \| Opcode read from 001 -> B3`
1506			`#007H T3 AB:001 DB:-- RFSH \|`
1507			`#008H T4 AB:001 DB:-- RFSH MREQ \| Refresh address 001`
1508			`#009H T5 AB:001 DB:-- \|`
1509			`#010H T6 AB:06F DB:-- \|`
1510			`#011H T7 AB:06F DB:00 MREQ RD \| Memory read from 06F -> 00`
1511			`#012H T8 AB:06F DB:00 MREQ RD \| Memory read from 06F -> 00`
1512			`#013H T9 AB:045 DB:-- \|`
1513			`#014H T10 AB:045 DB:00 WR IORQ \| I/O write to 045 <- 00`
1514			`#015H T11 AB:045 DB:00 WR IORQ \| I/O write to 045 <- 00`
1515			`#016H T12 AB:045 DB:00 WR IORQ \| I/O write to 045 <- 00`
1516			`#017H T13 AB:045 DB:-- \|`
1517			`#018H T14 AB:045 DB:-- \|`
1518			`#019H T15 AB:045 DB:-- \|`
1519			`#020H T16 AB:045 DB:-- \|`
1520			`#021H T17 AB:045 DB:-- \|`
1521			`-----------------------------------------------------------+`
1522			`</PRE>`
1523			`<H3 id="B8">Opcode: ED B8 => LDDR</H3>`
1524			`<PRE>`
1525			`-----------------------------------------------------------+`
1526			`#001H T1 AB:000 DB:-- M1 \|`
1527			`#002H T2 AB:000 DB:ED M1 MREQ RD \| Opcode read from 000 -> ED`
1528			`#003H T3 AB:000 DB:-- RFSH \|`
1529			`#004H T4 AB:000 DB:-- RFSH MREQ \| Refresh address 000`
1530			`-----------------------------------------------------------+`
1531			`#005H T1 AB:001 DB:-- M1 \|`
1532			`#006H T2 AB:001 DB:B8 M1 MREQ RD \| Opcode read from 001 -> B8`
1533			`#007H T3 AB:001 DB:-- RFSH \|`
1534			`#008H T4 AB:001 DB:-- RFSH MREQ \| Refresh address 001`
1535			`#009H T5 AB:070 DB:-- \|`
1536			`#010H T6 AB:070 DB:00 MREQ RD \| Memory read from 070 -> 00`
1537			`#011H T7 AB:070 DB:00 MREQ RD \| Memory read from 070 -> 00`
1538			`#012H T8 AB:05C DB:-- \|`
1539			`#013H T9 AB:05C DB:00 MREQ \|`
1540			`#014H T10 AB:05C DB:00 MREQ WR \| Memory write to 05C <- 00`
1541			`#015H T11 AB:05C DB:00 \|`
1542			`#016H T12 AB:05C DB:00 \|`
1543			`#017H T13 AB:05C DB:-- \|`
1544			`#018H T14 AB:05C DB:-- \|`
1545			`#019H T15 AB:05C DB:-- \|`
1546			`#020H T16 AB:05C DB:-- \|`
1547			`#021H T17 AB:05C DB:-- \|`
1548			`-----------------------------------------------------------+`
1549			`</PRE>`
1550			`<H3 id="B9">Opcode: ED B9 => CPDR</H3>`
1551			`<PRE>`
1552			`-----------------------------------------------------------+`
1553			`#001H T1 AB:000 DB:-- M1 \|`
1554			`#002H T2 AB:000 DB:ED M1 MREQ RD \| Opcode read from 000 -> ED`
1555			`#003H T3 AB:000 DB:-- RFSH \|`
1556			`#004H T4 AB:000 DB:-- RFSH MREQ \| Refresh address 000`
1557			`-----------------------------------------------------------+`
1558			`#005H T1 AB:001 DB:-- M1 \|`
1559			`#006H T2 AB:001 DB:B9 M1 MREQ RD \| Opcode read from 001 -> B9`
1560			`#007H T3 AB:001 DB:-- RFSH \|`
1561			`#008H T4 AB:001 DB:-- RFSH MREQ \| Refresh address 001`
1562			`#009H T5 AB:06F DB:-- \|`
1563			`#010H T6 AB:06F DB:00 MREQ RD \| Memory read from 06F -> 00`
1564			`#011H T7 AB:06F DB:00 MREQ RD \| Memory read from 06F -> 00`
1565			`#012H T8 AB:06F DB:-- \|`
1566			`#013H T9 AB:06F DB:-- \|`
1567			`#014H T10 AB:06F DB:-- \|`
1568			`#015H T11 AB:06F DB:-- \|`
1569			`#016H T12 AB:06F DB:-- \|`
1570			`#017H T13 AB:06F DB:-- \|`
1571			`#018H T14 AB:06F DB:-- \|`
1572			`#019H T15 AB:06F DB:-- \|`
1573			`#020H T16 AB:06F DB:-- \|`
1574			`#021H T17 AB:06F DB:-- \|`
1575			`-----------------------------------------------------------+`
1576			`</PRE>`
1577			`<H3 id="BA">Opcode: ED BA => INDR</H3>`
1578			`<PRE>`
1579			`-----------------------------------------------------------+`
1580			`#001H T1 AB:000 DB:-- M1 \|`
1581			`#002H T2 AB:000 DB:ED M1 MREQ RD \| Opcode read from 000 -> ED`
1582			`#003H T3 AB:000 DB:-- RFSH \|`
1583			`#004H T4 AB:000 DB:-- RFSH MREQ \| Refresh address 000`
1584			`-----------------------------------------------------------+`
1585			`#005H T1 AB:001 DB:-- M1 \|`
1586			`#006H T2 AB:001 DB:BA M1 MREQ RD \| Opcode read from 001 -> BA`
1587			`#007H T3 AB:001 DB:-- RFSH \|`
1588			`#008H T4 AB:001 DB:-- RFSH MREQ \| Refresh address 001`
1589			`#009H T5 AB:001 DB:-- \|`
1590			`#010H T6 AB:043 DB:-- \|`
1591			`#011H T7 AB:043 DB:-- RD IORQ \| I/O read from 043`
1592			`#012H T8 AB:043 DB:-- RD IORQ \| I/O read from 043`
1593			`#013H T9 AB:043 DB:-- RD IORQ \| I/O read from 043`
1594			`#014H T10 AB:06E DB:-- \|`
1595			`#015H T11 AB:06E DB:BB MREQ \|`
1596			`#016H T12 AB:06E DB:BB MREQ WR \| Memory write to 06E <- BB`
1597			`#017H T13 AB:06E DB:-- \|`
1598			`#018H T14 AB:06E DB:-- \|`
1599			`#019H T15 AB:06E DB:-- \|`
1600			`#020H T16 AB:06E DB:-- \|`
1601			`#021H T17 AB:06E DB:-- \|`
1602			`-----------------------------------------------------------+`
1603			`</PRE>`
1604			`<H3 id="BB">Opcode: ED BB => OTDR</H3>`
1605			`<PRE>`
1606			`-----------------------------------------------------------+`
1607			`#001H T1 AB:000 DB:-- M1 \|`
1608			`#002H T2 AB:000 DB:ED M1 MREQ RD \| Opcode read from 000 -> ED`
1609			`#003H T3 AB:000 DB:-- RFSH \|`
1610			`#004H T4 AB:000 DB:-- RFSH MREQ \| Refresh address 000`
1611			`-----------------------------------------------------------+`
1612			`#005H T1 AB:001 DB:-- M1 \|`
1613			`#006H T2 AB:001 DB:BB M1 MREQ RD \| Opcode read from 001 -> BB`
1614			`#007H T3 AB:001 DB:-- RFSH \|`
1615			`#008H T4 AB:001 DB:-- RFSH MREQ \| Refresh address 001`
1616			`#009H T5 AB:001 DB:-- \|`
1617			`#010H T6 AB:06D DB:-- \|`
1618			`#011H T7 AB:06D DB:00 MREQ RD \| Memory read from 06D -> 00`
1619			`#012H T8 AB:06D DB:00 MREQ RD \| Memory read from 06D -> 00`
1620			`#013H T9 AB:043 DB:-- \|`
1621			`#014H T10 AB:043 DB:00 WR IORQ \| I/O write to 043 <- 00`
1622			`#015H T11 AB:043 DB:00 WR IORQ \| I/O write to 043 <- 00`
1623			`#016H T12 AB:043 DB:00 WR IORQ \| I/O write to 043 <- 00`
1624			`#017H T13 AB:043 DB:-- \|`
1625			`#018H T14 AB:043 DB:-- \|`
1626			`#019H T15 AB:043 DB:-- \|`
1627			`#020H T16 AB:043 DB:-- \|`
1628			`#021H T17 AB:043 DB:-- \|`
1629			`-----------------------------------------------------------+`
1630			`</PRE>`
1631			`</BODY></HTML>`

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