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Subversion Repositories aes-128-ecb-encoder

[/] [aes-128-ecb-encoder/] [trunk/] [fpga/] [aes128_ecb_2017/] [aes128_ecb.ip_user_files/] [sim_scripts/] [axi_uartlite_module_sim/] [questa/] [simulate.do] - Blame information for rev 2

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Line No. Rev Author Line
1 2 vv_gulyaev
onbreak {quit -f}
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onerror {quit -f}
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vsim -t 1ps -lib xil_defaultlib axi_uartlite_module_sim_opt
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do {wave.do}
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view wave
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view structure
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view signals
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do {axi_uartlite_module_sim.udo}
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run -all
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quit -force

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