URL https://opencores.org/ocsvn/aes-128-ecb-encoder/aes-128-ecb-encoder/trunk

Subversion Repositories aes-128-ecb-encoder

[/] [aes-128-ecb-encoder/] [trunk/] [fpga/] [aes128_ecb_2017/] [aes128_ecb.srcs/] [constrs_1/] [new/] [timings.xdc] - Blame information for rev 2

Details | Compare with Previous | View Log


 
set_property BITSTREAM.CONFIG.CONFIGRATE 33 [current_design]
set_property CONFIG_VOLTAGE 2.5 [current_design]
set_property CONFIG_MODE BPI16 [current_design]
 
set_property CFGBVS VCCO [current_design]
 
set_property BITSTREAM.CONFIG.EXTMASTERCCLK_EN DIV-2 [current_design]
set_property BITSTREAM.CONFIG.BPI_SYNC_MODE TYPE2 [current_design]
 
 
create_generated_clock -name clk_gen -source [get_pins clkgen/clk_in1_p] -divide_by 2 -add -master_clock CLK_IN_P [get_pins clkgen/clk_out1]
set_input_delay -clock [get_clocks clk_gen] 1.000 [get_ports uart_rx]
set_output_delay -clock [get_clocks clk_gen] 1.000 [get_ports uart_tx]

Line No.	Rev	Author	Line
1	2	vv_gulyaev
2			`set_property BITSTREAM.CONFIG.CONFIGRATE 33 [current_design]`
3			`set_property CONFIG_VOLTAGE 2.5 [current_design]`
4			`set_property CONFIG_MODE BPI16 [current_design]`
5
6			`set_property CFGBVS VCCO [current_design]`
7
8			`set_property BITSTREAM.CONFIG.EXTMASTERCCLK_EN DIV-2 [current_design]`
9			`set_property BITSTREAM.CONFIG.BPI_SYNC_MODE TYPE2 [current_design]`
10
11
12			`create_generated_clock -name clk_gen -source [get_pins clkgen/clk_in1_p] -divide_by 2 -add -master_clock CLK_IN_P [get_pins clkgen/clk_out1]`
13			`set_input_delay -clock [get_clocks clk_gen] 1.000 [get_ports uart_rx]`
14			`set_output_delay -clock [get_clocks clk_gen] 1.000 [get_ports uart_tx]`

Browse

Tools

Subversion Repositories aes-128-ecb-encoder

[/] [aes-128-ecb-encoder/] [trunk/] [fpga/] [aes128_ecb_2017/] [aes128_ecb.srcs/] [constrs_1/] [new/] [timings.xdc] - Blame information for rev 2