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[/] [aes-128-ecb-encoder/] [trunk/] [fpga/] [aes128_ecb_2017/] [vivado_4863.backup.log] - Blame information for rev 2

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1 2 vv_gulyaev 
#-----------------------------------------------------------
2 
# Vivado v2017.4 (64-bit)
3 
# SW Build 2086221 on Fri Dec 15 20:54:30 MST 2017
4 
# IP Build 2085800 on Fri Dec 15 22:25:07 MST 2017
5 
# Start of session at: Wed Jul 29 15:46:45 2020
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# Process ID: 4863
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# Current directory: /home/user/aes/fpga/aec128_ecb_2017
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# Command line: vivado
9 
# Log file: /home/user/aes/fpga/aec128_ecb_2017/vivado.log
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# Journal file: /home/user/aes/fpga/aec128_ecb_2017/vivado.jou
11 
#-----------------------------------------------------------
12 
start_gui
13 
open_project /home/user/aes/fpga/aec128_ecb_2017/aes128_ecb.xpr
14 
Scanning sources...
15 
Finished scanning sources
16 
INFO: [IP_Flow 19-234] Refreshing IP repositories
17 
INFO: [IP_Flow 19-1704] No user IP repositories specified
18 
INFO: [IP_Flow 19-2313] Loaded Vivado IP repository '/opt/Xilinx/Vivado/2017.4/data/ip'.
19 
open_project: Time (s): cpu = 00:00:10 ; elapsed = 00:00:05 . Memory (MB): peak = 6099.070 ; gain = 91.531 ; free physical = 4110 ; free virtual = 8048
20 
update_compile_order -fileset sources_1
21 
open_hw
22 
connect_hw_server
23 
INFO: [Labtools 27-2285] Connecting to hw_server url TCP:localhost:3121
24 
INFO: [Labtools 27-2222] Launching hw_server...
25 
INFO: [Labtools 27-2221] Launch Output:
26 
 
27 
****** Xilinx hw_server v2017.4
28 
  **** Build date : Dec 15 2017-21:02:11
29 
    ** Copyright 1986-2017 Xilinx, Inc. All Rights Reserved.
30 
 
31 
 
32 
connect_hw_server: Time (s): cpu = 00:00:03 ; elapsed = 00:00:09 . Memory (MB): peak = 6150.004 ; gain = 13.148 ; free physical = 4053 ; free virtual = 7999
33 
open_hw_target
34 
INFO: [Labtoolstcl 44-466] Opening hw_target localhost:3121/xilinx_tcf/Xilinx/000014d2ca8601
35 
ERROR: [Labtools 27-2269] No devices detected on target localhost:3121/xilinx_tcf/Xilinx/000014d2ca8601.
36 
Check cable connectivity and that the target board is powered up then
37 
use the disconnect_hw_server and connect_hw_server to re-register this hardware target.
38 
ERROR: [Common 17-39] 'open_hw_target' failed due to earlier errors.
39 
create_hw_cfgmem -hw_device [lindex [get_hw_devices xc7k325t_0] 0] [lindex [get_cfgmem_parts {28f00ap30t-bpi-x16}] 0]
40 
set_property PROGRAM.BLANK_CHECK  0 [ get_property PROGRAM.HW_CFGMEM [lindex [get_hw_devices xc7k325t_0] 0]]
41 
set_property PROGRAM.ERASE  1 [ get_property PROGRAM.HW_CFGMEM [lindex [get_hw_devices xc7k325t_0] 0]]
42 
set_property PROGRAM.CFG_PROGRAM  1 [ get_property PROGRAM.HW_CFGMEM [lindex [get_hw_devices xc7k325t_0] 0]]
43 
set_property PROGRAM.VERIFY  1 [ get_property PROGRAM.HW_CFGMEM [lindex [get_hw_devices xc7k325t_0] 0]]
44 
set_property PROGRAM.CHECKSUM  0 [ get_property PROGRAM.HW_CFGMEM [lindex [get_hw_devices xc7k325t_0] 0]]
45 
refresh_hw_device [lindex [get_hw_devices xc7k325t_0] 0]
46 
INFO: [Labtools 27-1434] Device xc7k325t (JTAG device index = 0) is programmed with a design that has no supported debug core(s) in it.
47 
WARNING: [Labtools 27-3361] The debug hub core was not detected.
48 
Resolution:
49 
1. Make sure the clock connected to the debug hub (dbg_hub) core is a free running clock and is active.
50 
2. Make sure the BSCAN_SWITCH_USER_MASK device property in Vivado Hardware Manager reflects the user scan chain setting in the design and refresh the device.  To determine the user scan chain setting in the design, open the implemented design and use 'get_property C_USER_SCAN_CHAIN [get_debug_cores dbg_hub]'.
51 
For more details on setting the scan chain property, consult the Vivado Debug and Programming User Guide (UG908).
52 
set_property PROGRAM.ADDRESS_RANGE  {use_file} [ get_property PROGRAM.HW_CFGMEM [lindex [get_hw_devices xc7k325t_0] 0]]
53 
set_property PROGRAM.FILES [list "/home/user/aes/fpga/aec128_ecb_2017/aes128_ecb.mcs" ] [ get_property PROGRAM.HW_CFGMEM [lindex [get_hw_devices xc7k325t_0] 0]]
54 
set_property PROGRAM.PRM_FILE {} [ get_property PROGRAM.HW_CFGMEM [lindex [get_hw_devices xc7k325t_0] 0]]
55 
set_property PROGRAM.BPI_RS_PINS {none} [ get_property PROGRAM.HW_CFGMEM [lindex [get_hw_devices xc7k325t_0] 0]]
56 
set_property PROGRAM.UNUSED_PIN_TERMINATION {pull-none} [ get_property PROGRAM.HW_CFGMEM [lindex [get_hw_devices xc7k325t_0] 0]]
57 
set_property PROGRAM.BLANK_CHECK  0 [ get_property PROGRAM.HW_CFGMEM [lindex [get_hw_devices xc7k325t_0] 0]]
58 
set_property PROGRAM.ERASE  1 [ get_property PROGRAM.HW_CFGMEM [lindex [get_hw_devices xc7k325t_0] 0]]
59 
set_property PROGRAM.CFG_PROGRAM  1 [ get_property PROGRAM.HW_CFGMEM [lindex [get_hw_devices xc7k325t_0] 0]]
60 
set_property PROGRAM.VERIFY  1 [ get_property PROGRAM.HW_CFGMEM [lindex [get_hw_devices xc7k325t_0] 0]]
61 
set_property PROGRAM.CHECKSUM  0 [ get_property PROGRAM.HW_CFGMEM [lindex [get_hw_devices xc7k325t_0] 0]]
62 
startgroup
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if {![string equal [get_property PROGRAM.HW_CFGMEM_TYPE  [lindex [get_hw_devices xc7k325t_0] 0]] [get_property MEM_TYPE [get_property CFGMEM_PART [ get_property PROGRAM.HW_CFGMEM [lindex [get_hw_devices xc7k325t_0] 0]]]]] }  { create_hw_bitstream -hw_device [lindex [get_hw_devices xc7k325t_0] 0] [get_property PROGRAM.HW_CFGMEM_BITFILE [ lindex [get_hw_devices xc7k325t_0] 0]]; program_hw_devices [lindex [get_hw_devices xc7k325t_0] 0]; };
64 
INFO: [Labtools 27-3164] End of startup status: HIGH
65 
program_hw_devices: Time (s): cpu = 00:00:04 ; elapsed = 00:00:05 . Memory (MB): peak = 6653.648 ; gain = 0.000 ; free physical = 3188 ; free virtual = 7345
66 
program_hw_cfgmem -hw_cfgmem [ get_property PROGRAM.HW_CFGMEM [lindex [get_hw_devices xc7k325t_0] 0]]
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Mfg ID : 89   Memory Type : 8962   Memory Capacity : 0   Device ID 1 : 0   Device ID 2 : 0
68 
Performing Erase Operation...
69 
Erase Operation successful.
70 
Performing Program and Verify Operations...
71 
Program/Verify Operation successful.
72 
INFO: [Labtoolstcl 44-377] Flash programming completed successfully
73 
program_hw_cfgmem: Time (s): cpu = 00:00:11 ; elapsed = 00:04:28 . Memory (MB): peak = 6677.645 ; gain = 23.996 ; free physical = 3208 ; free virtual = 7367
74 
endgroup
75 
ERROR: [Labtoolstcl 44-513] HW Target shutdown. Closing target: localhost:3121/xilinx_tcf/Xilinx/000014d2ca8601
76 
INFO: [Labtoolstcl 44-466] Opening hw_target localhost:3121/xilinx_tcf/Xilinx/000014d2ca8601
77 
INFO: [Labtools 27-1434] Device xc7k325t (JTAG device index = 0) is programmed with a design that has no supported debug core(s) in it.
78 
WARNING: [Labtools 27-3361] The debug hub core was not detected.
79 
Resolution:
80 
1. Make sure the clock connected to the debug hub (dbg_hub) core is a free running clock and is active.
81 
2. Make sure the BSCAN_SWITCH_USER_MASK device property in Vivado Hardware Manager reflects the user scan chain setting in the design and refresh the device.  To determine the user scan chain setting in the design, open the implemented design and use 'get_property C_USER_SCAN_CHAIN [get_debug_cores dbg_hub]'.
82 
For more details on setting the scan chain property, consult the Vivado Debug and Programming User Guide (UG908).
83 
WARNING: [Labtoolstcl 44-129] No matching hw_ila_data was found.
84 
close_hw
85 
reset_run synth_1
86 
launch_runs impl_1 -to_step write_bitstream -jobs 2
87 
[Wed Jul 29 16:03:24 2020] Launched synth_1...
88 
Run output will be captured here: /home/user/aes/fpga/aec128_ecb_2017/aes128_ecb.runs/synth_1/runme.log
89 
[Wed Jul 29 16:03:24 2020] Launched impl_1...
90 
Run output will be captured here: /home/user/aes/fpga/aec128_ecb_2017/aes128_ecb.runs/impl_1/runme.log
91 
reset_run synth_1
92 
launch_runs impl_1 -to_step write_bitstream -jobs 2
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[Wed Jul 29 16:05:14 2020] Launched synth_1...
94 
Run output will be captured here: /home/user/aes/fpga/aec128_ecb_2017/aes128_ecb.runs/synth_1/runme.log
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[Wed Jul 29 16:05:14 2020] Launched impl_1...
96 
Run output will be captured here: /home/user/aes/fpga/aec128_ecb_2017/aes128_ecb.runs/impl_1/runme.log
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write_cfgmem  -format mcs -size 128 -interface BPIx16 -loadbit {up 0x00000000 "/home/user/aes/fpga/aec128_ecb_2017/aes128_ecb.runs/impl_1/aes128_ecb_fpga_wrap.bit" } -force -file "/home/user/aes/fpga/aec128_ecb_2017/aes128_ecb.mcs"
98 
Command: write_cfgmem -format mcs -size 128 -interface BPIx16 -loadbit {up 0x00000000 "/home/user/aes/fpga/aec128_ecb_2017/aes128_ecb.runs/impl_1/aes128_ecb_fpga_wrap.bit" } -force -file /home/user/aes/fpga/aec128_ecb_2017/aes128_ecb.mcs
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Creating config memory files...
100 
INFO: [Writecfgmem 68-23] Start address provided has been multiplied by a factor of 2 due to the use of interface BPIX16.
101 
Creating bitstream load up from address 0x00000000
102 
Loading bitfile /home/user/aes/fpga/aec128_ecb_2017/aes128_ecb.runs/impl_1/aes128_ecb_fpga_wrap.bit
103 
Writing file /home/user/aes/fpga/aec128_ecb_2017/aes128_ecb.mcs
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Writing log file /home/user/aes/fpga/aec128_ecb_2017/aes128_ecb.prm
105 
===================================
106 
Configuration Memory information
107 
===================================
108 
File Format        MCS
109 
Interface          BPIX16
110 
Size               128M
111 
Start Address      0x00000000
112 
End Address        0x07FFFFFF
113 
 
114 
Addr1         Addr2         Date                    File(s)
115 
0x00000000    0x00AE9D9B    Jul 29 16:09:50 2020    /home/user/aes/fpga/aec128_ecb_2017/aes128_ecb.runs/impl_1/aes128_ecb_fpga_wrap.bit
116 
1 Infos, 0 Warnings, 0 Critical Warnings and 0 Errors encountered.
117 
write_cfgmem completed successfully
118 
open_hw
119 
connect_hw_server
120 
INFO: [Labtools 27-2285] Connecting to hw_server url TCP:localhost:3121
121 
INFO: [Labtools 27-2222] Launching hw_server...
122 
INFO: [Labtools 27-2221] Launch Output:
123 
 
124 
****** Xilinx hw_server v2017.4
125 
  **** Build date : Dec 15 2017-21:02:11
126 
    ** Copyright 1986-2017 Xilinx, Inc. All Rights Reserved.
127 
 
128 
 
129 
open_hw_target
130 
INFO: [Labtoolstcl 44-466] Opening hw_target localhost:3121/xilinx_tcf/Xilinx/000014d2ca8601
131 
ERROR: [Labtools 27-2269] No devices detected on target localhost:3121/xilinx_tcf/Xilinx/000014d2ca8601.
132 
Check cable connectivity and that the target board is powered up then
133 
use the disconnect_hw_server and connect_hw_server to re-register this hardware target.
134 
ERROR: [Common 17-39] 'open_hw_target' failed due to earlier errors.
135 
refresh_hw_target {localhost:3121/xilinx_tcf/Xilinx/000014d2ca8601}
136 
ERROR: [Labtools 27-2269] No devices detected on target localhost:3121/xilinx_tcf/Xilinx/000014d2ca8601.
137 
Check cable connectivity and that the target board is powered up then
138 
use the disconnect_hw_server and connect_hw_server to re-register this hardware target.
139 
ERROR: [Common 17-39] 'refresh_hw_target' failed due to earlier errors.
140 
ERROR: [Labtoolstcl 44-513] HW Target shutdown. Closing target: localhost:3121/xilinx_tcf/Xilinx/000014d2ca8601
141 
disconnect_hw_server localhost:3121
142 
connect_hw_server
143 
INFO: [Labtools 27-2285] Connecting to hw_server url TCP:localhost:3121
144 
open_hw_target
145 
INFO: [Labtoolstcl 44-466] Opening hw_target localhost:3121/xilinx_tcf/Xilinx/000014d2ca8601
146 
ERROR: [Labtools 27-2269] No devices detected on target localhost:3121/xilinx_tcf/Xilinx/000014d2ca8601.
147 
Check cable connectivity and that the target board is powered up then
148 
use the disconnect_hw_server and connect_hw_server to re-register this hardware target.
149 
ERROR: [Common 17-39] 'open_hw_target' failed due to earlier errors.
150 
refresh_hw_target {localhost:3121/xilinx_tcf/Xilinx/000014d2ca8601}
151 
ERROR: [Labtools 27-2269] No devices detected on target localhost:3121/xilinx_tcf/Xilinx/000014d2ca8601.
152 
Check cable connectivity and that the target board is powered up then
153 
use the disconnect_hw_server and connect_hw_server to re-register this hardware target.
154 
ERROR: [Common 17-39] 'refresh_hw_target' failed due to earlier errors.
155 
close_hw_target {localhost:3121/xilinx_tcf/Xilinx/000014d2ca8601}
156 
INFO: [Labtoolstcl 44-464] Closing hw_target localhost:3121/xilinx_tcf/Xilinx/000014d2ca8601
157 
disconnect_hw_server localhost:3121
158 
connect_hw_server
159 
INFO: [Labtools 27-2285] Connecting to hw_server url TCP:localhost:3121
160 
open_hw_target
161 
INFO: [Labtoolstcl 44-466] Opening hw_target localhost:3121/xilinx_tcf/Xilinx/000014d2ca8601
162 
ERROR: [Labtools 27-2269] No devices detected on target localhost:3121/xilinx_tcf/Xilinx/000014d2ca8601.
163 
Check cable connectivity and that the target board is powered up then
164 
use the disconnect_hw_server and connect_hw_server to re-register this hardware target.
165 
ERROR: [Common 17-39] 'open_hw_target' failed due to earlier errors.
166 
ERROR: [Labtoolstcl 44-513] HW Target shutdown. Closing target: localhost:3121/xilinx_tcf/Xilinx/000014d2ca8601
167 
INFO: [Labtoolstcl 44-466] Opening hw_target localhost:3121/xilinx_tcf/Xilinx/000014d2ca8601
168 
INFO: [Labtools 27-1434] Device xc7k325t (JTAG device index = 0) is programmed with a design that has no supported debug core(s) in it.
169 
WARNING: [Labtools 27-3361] The debug hub core was not detected.
170 
Resolution:
171 
1. Make sure the clock connected to the debug hub (dbg_hub) core is a free running clock and is active.
172 
2. Make sure the BSCAN_SWITCH_USER_MASK device property in Vivado Hardware Manager reflects the user scan chain setting in the design and refresh the device.  To determine the user scan chain setting in the design, open the implemented design and use 'get_property C_USER_SCAN_CHAIN [get_debug_cores dbg_hub]'.
173 
For more details on setting the scan chain property, consult the Vivado Debug and Programming User Guide (UG908).
174 
WARNING: [Labtoolstcl 44-129] No matching hw_ila_data was found.
175 
set_property PROGRAM.ADDRESS_RANGE  {use_file} [ get_property PROGRAM.HW_CFGMEM [lindex [get_hw_devices xc7k325t_0] 0]]
176 
set_property PROGRAM.FILES [list "/home/user/aes/fpga/aec128_ecb_2017/aes128_ecb.mcs" ] [ get_property PROGRAM.HW_CFGMEM [lindex [get_hw_devices xc7k325t_0] 0]]
177 
set_property PROGRAM.PRM_FILE {} [ get_property PROGRAM.HW_CFGMEM [lindex [get_hw_devices xc7k325t_0] 0]]
178 
set_property PROGRAM.BPI_RS_PINS {none} [ get_property PROGRAM.HW_CFGMEM [lindex [get_hw_devices xc7k325t_0] 0]]
179 
set_property PROGRAM.UNUSED_PIN_TERMINATION {pull-none} [ get_property PROGRAM.HW_CFGMEM [lindex [get_hw_devices xc7k325t_0] 0]]
180 
set_property PROGRAM.BLANK_CHECK  0 [ get_property PROGRAM.HW_CFGMEM [lindex [get_hw_devices xc7k325t_0] 0]]
181 
set_property PROGRAM.ERASE  1 [ get_property PROGRAM.HW_CFGMEM [lindex [get_hw_devices xc7k325t_0] 0]]
182 
set_property PROGRAM.CFG_PROGRAM  1 [ get_property PROGRAM.HW_CFGMEM [lindex [get_hw_devices xc7k325t_0] 0]]
183 
set_property PROGRAM.VERIFY  1 [ get_property PROGRAM.HW_CFGMEM [lindex [get_hw_devices xc7k325t_0] 0]]
184 
set_property PROGRAM.CHECKSUM  0 [ get_property PROGRAM.HW_CFGMEM [lindex [get_hw_devices xc7k325t_0] 0]]
185 
startgroup
186 
if {![string equal [get_property PROGRAM.HW_CFGMEM_TYPE  [lindex [get_hw_devices xc7k325t_0] 0]] [get_property MEM_TYPE [get_property CFGMEM_PART [ get_property PROGRAM.HW_CFGMEM [lindex [get_hw_devices xc7k325t_0] 0]]]]] }  { create_hw_bitstream -hw_device [lindex [get_hw_devices xc7k325t_0] 0] [get_property PROGRAM.HW_CFGMEM_BITFILE [ lindex [get_hw_devices xc7k325t_0] 0]]; program_hw_devices [lindex [get_hw_devices xc7k325t_0] 0]; };
187 
INFO: [Labtools 27-3164] End of startup status: HIGH
188 
program_hw_devices: Time (s): cpu = 00:00:04 ; elapsed = 00:00:05 . Memory (MB): peak = 6913.473 ; gain = 0.000 ; free physical = 3206 ; free virtual = 7343
189 
program_hw_cfgmem -hw_cfgmem [ get_property PROGRAM.HW_CFGMEM [lindex [get_hw_devices xc7k325t_0] 0]]
190 
Mfg ID : 89   Memory Type : 8962   Memory Capacity : 0   Device ID 1 : 0   Device ID 2 : 0
191 
Performing Erase Operation...
192 
Erase Operation successful.
193 
Performing Program and Verify Operations...
194 
Program/Verify Operation successful.
195 
INFO: [Labtoolstcl 44-377] Flash programming completed successfully
196 
program_hw_cfgmem: Time (s): cpu = 00:00:08 ; elapsed = 00:04:30 . Memory (MB): peak = 6913.473 ; gain = 0.000 ; free physical = 3201 ; free virtual = 7328
197 
endgroup
198 
ERROR: [Labtoolstcl 44-513] HW Target shutdown. Closing target: localhost:3121/xilinx_tcf/Xilinx/000014d2ca8601
199 
INFO: [Labtoolstcl 44-466] Opening hw_target localhost:3121/xilinx_tcf/Xilinx/000014d2ca8601
200 
INFO: [Labtools 27-1434] Device xc7k325t (JTAG device index = 0) is programmed with a design that has no supported debug core(s) in it.
201 
WARNING: [Labtools 27-3361] The debug hub core was not detected.
202 
Resolution:
203 
1. Make sure the clock connected to the debug hub (dbg_hub) core is a free running clock and is active.
204 
2. Make sure the BSCAN_SWITCH_USER_MASK device property in Vivado Hardware Manager reflects the user scan chain setting in the design and refresh the device.  To determine the user scan chain setting in the design, open the implemented design and use 'get_property C_USER_SCAN_CHAIN [get_debug_cores dbg_hub]'.
205 
For more details on setting the scan chain property, consult the Vivado Debug and Programming User Guide (UG908).
206 
WARNING: [Labtoolstcl 44-129] No matching hw_ila_data was found.
207 
ERROR: [Labtoolstcl 44-513] HW Target shutdown. Closing target: localhost:3121/xilinx_tcf/Xilinx/000014d2ca8601
208 
exit
209 
INFO: [Common 17-206] Exiting Vivado at Wed Jul 29 16:21:33 2020...

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