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URL https://opencores.org/ocsvn/aes-128-ecb-encoder/aes-128-ecb-encoder/trunk

Subversion Repositories aes-128-ecb-encoder

[/] [aes-128-ecb-encoder/] [trunk/] [fpga/] [aes128_ecb_2017/] [xsim.ini.map] - Blame information for rev 2

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Line No. Rev Author Line
1 2 vv_gulyaev
std=$RDI_DATADIR/xsim/vhdl/std
2
ieee=$RDI_DATADIR/xsim/vhdl/ieee
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ieee_proposed=$RDI_DATADIR/xsim/vhdl/ieee_proposed
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vl=$RDI_DATADIR/xsim/vhdl/vl
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synopsys=$RDI_DATADIR/xsim/vhdl/synopsys
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secureip=$RDI_DATADIR/xsim/verilog/secureip
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simprims_ver=$RDI_DATADIR/xsim/verilog/simprims_ver
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xpm=$RDI_DATADIR/xsim/ip/xpm

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