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[/] [ahbmaster/] [trunk/] [test79_AHBmaster/] [component/] [Actel/] [DirectCore/] [CoreAHBLite/] [5.3.101/] [mti/] [scripts/] [coreahblite_usertb_ahb_master2.bfm] - Blame information for rev 3

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1 3 uson
// ********************************************************************
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// Actel Corporation Proprietary and Confidential
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//  Copyright 2010 Actel Corporation.  All rights reserved.
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//
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// ANY USE OR REDISTRIBUTION IN PART OR IN WHOLE MUST BE HANDLED IN
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// ACCORDANCE WITH THE ACTEL LICENSE AGREEMENT AND MUST BE APPROVED
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// IN ADVANCE IN WRITING.
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//
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// Description: User testbench AHBLite master 2 BFM script for CoreAHBLite
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//
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// Revision Information:
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// Date     Description
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// 10Feb10              Production Release Version 3.1
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//
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// SVN Revision Information:
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// SVN $Revision: 21356 $
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// SVN $Date: 2013-10-24 00:02:49 +0530 (Thu, 24 Oct 2013) $
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//
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// Resolved SARs
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// SAR      Date     Who   Description
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//
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// Notes:
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// 1. best viewed with tabstops set to "4"
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// 2. Most of the behavior is driven from the BFM script for the AHBLite master.
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//    Consult the Actel AMBA BFM documentation for more information.
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// 3. All procedures, variables, and constants used by the 'main' procedure
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//    are declared in the include file "coreahblite_usertb_include.bfm"
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//
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// History:             11/05/08  - TFB created
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//
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// *********************************************************************
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// include constants, and miscellaneous procedures used in this main file
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include "coreahblite_usertb_include.bfm"
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procedure main
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        int i
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        int j
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        int k
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        int dtmp[4]
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        int atmp
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    int slot_incr
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        header "User Testbench for CoreAHBLite: BFM AHBLite Master 2 Test Harness"
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        print "(c) Copyright 2010 Actel Corporation. All rights reserved."
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        call pr_underscores
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        debug 1                 // only text strings printed
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        timeout 2000    // timeout in cycles, in case BFM stalls
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        wait 400
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        // initialize local variables passed from testbench HDL to the
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        // ARGVALUE* BFM parameters
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        call init_parameter_vars
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        wait 2
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# Set slot increment based on MEMSPACE parameter
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if MEMSPACE == 0
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        call pr_underscores
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        print "Master 2, memory space: 16 64KB slave slots, one huge slave slot, testing beginning at: %0d ns." $TIME
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        call pr_underscores
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    set slot_incr       0x00010000;
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endif
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if MEMSPACE == 1
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        call pr_underscores
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        print "Master 2, memory space = 4GB, 16 256MB slave slots, testing beginning at: %0d ns." $TIME
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        call pr_underscores
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    set slot_incr       0x10000000;
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endif
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if MEMSPACE == 2
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        call pr_underscores
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        print "Master 2, memory space = 256MB, 16 16MB slave slots, testing beginning at: %0d ns." $TIME
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        call pr_underscores
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    set slot_incr       0x01000000;
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endif
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if MEMSPACE == 3
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        call pr_underscores
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        print "Master 2, memory space = 16MB, 16 1MB slave slots, testing beginning at: %0d ns." $TIME
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        call pr_underscores
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    set slot_incr       0x00100000;
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endif
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if MEMSPACE == 4
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        call pr_underscores
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        print "Master 2, memory space = 1MB, 16 64KB slave slots, testing beginning at: %0d ns." $TIME
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        call pr_underscores
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    set slot_incr       0x00010000;
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endif
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if MEMSPACE == 5
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        call pr_underscores
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        print "Master 2, memory space = 64KB, 16 4KB slave slots, testing beginning at: %0d ns." $TIME
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        call pr_underscores
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    set slot_incr       0x00001000;
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endif
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if MEMSPACE == 6
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        call pr_underscores
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        print "Master 2, memory space = 4KB, 16 256B slave slots, testing beginning at: %0d ns." $TIME
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        call pr_underscores
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    set slot_incr       0x00000100;
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endif
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//=========================================================================
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# Test byte/halfword/word writes and reads for all enabled slots
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        loop i 0 15 1
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      if SC[i] == 0
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                if M2_AHBSLOTENABLE[i]
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                        call pr_underscores
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                        print "Master 2 testing AHBLite slot:%0d at: %0d ns." i $TIME
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                        call pr_underscores
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                        // write/read 32-bit word
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                        set atmp i * slot_incr + 0x0
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                        set dtmp[0] 0x12345678
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                        print "Master 2 writes:%08x to AHBLite slave:%0d at: %0d ns." dtmp[0] i $TIME
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                        write w BASE atmp dtmp[0]
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                        print "Master 2 verifying (reading):%08x from AHBLite slave:%0d at: %0d ns." dtmp[0] i $TIME
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                        readcheck w BASE atmp dtmp[0]
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                        wait 8
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                        // write/read 16-bit halfwords
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                        set dtmp[0] 0xdead
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                        set dtmp[1] 0xbeef
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                        loop j 0 1 1
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                                set k j * 2
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                                set atmp i * slot_incr + k
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                                print "Master 2 writes:%04x to AHBLite slave:%0d at: %0d ns." dtmp[j] i $TIME
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                                write h BASE atmp dtmp[j]
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                        endloop
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                        loop j 0 1 1
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                                set k j * 2
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                                set atmp i * slot_incr + k
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                                print "Master 2 verifying (reading):%04x from AHBLite slave:%0d at: %0d ns." dtmp[j] i $TIME
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                                readcheck h BASE atmp dtmp[j]
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                        endloop
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                        wait 8
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                        // write/read 8-bit bytes
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                        set dtmp[0] 0x9a
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                        set dtmp[1] 0x56
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                        set dtmp[2] 0x34
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                        set dtmp[3] 0x12
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                        loop j 0 3 1
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                                set k j * 1
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                                set atmp i * slot_incr + k
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                                print "Master 2 writes:%02x to AHBLite slave:%0d at: %0d ns." dtmp[j] i $TIME
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                                write b BASE atmp dtmp[j]
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                        endloop
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                        loop j 0 3 1
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                                set k j * 1
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                                set atmp i * slot_incr + k
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                                print "Master 2 verifying (reading):%02x from AHBLite slave:%0d at: %0d ns." dtmp[j] i $TIME
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                                readcheck b BASE atmp dtmp[j]
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                        endloop
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                        wait 8
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                        // write/read 32-bit word 0xaaaaaaaa
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                        set atmp i * slot_incr + 0x0
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                        set dtmp[0] 0xaaaaaaaa
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                        print "Master 2 writes:%08x to AHBLite slave:%0d at: %0d ns." dtmp[0] i $TIME
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                        write w BASE atmp dtmp[0]
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                        print "Master 2 verifying (reading):%08x from AHBLite slave:%0d at: %0d ns." dtmp[0] i $TIME
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                        readcheck w BASE atmp dtmp[0]
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                        wait 8
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                        // write/read 32-bit word 0x55555555
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                        set atmp i * slot_incr + 0x0
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                        set dtmp[0] 0x55555555
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                        print "Master 2 writes:%08x to AHBLite slave:%0d at: %0d ns." dtmp[0] i $TIME
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                        write w BASE atmp dtmp[0]
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                        print "Master 2 verifying (reading):%08x from AHBLite slave:%0d at: %0d ns." dtmp[0] i $TIME
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                        readcheck w BASE atmp dtmp[0]
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                        wait 8
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                        print "Master 2 done testing AHBLite slot:%0d at: %0d ns." i $TIME
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                        call pr_underscores
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                else
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                        call pr_underscores
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                        print "Master 2 skipping test of AHBLite slot:%0d at: %0d ns." i $TIME
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                        call pr_underscores
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                endif
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      else
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        call pr_underscores
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        print "Master 2 skipping test of AHBLite slot:%0d at: %0d ns." i $TIME
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        call pr_underscores
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      endif
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                // wait here between loops
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        endloop
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//=========================================================================
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    quit
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return

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