OpenCores
URL https://opencores.org/ocsvn/an-fpga-implementation-of-low-latency-noc-based-mpsoc/an-fpga-implementation-of-low-latency-noc-based-mpsoc/trunk

Subversion Repositories an-fpga-implementation-of-low-latency-noc-based-mpsoc

[/] [an-fpga-implementation-of-low-latency-noc-based-mpsoc/] [trunk/] [mpsoc/] [src_processor/] [mor1kx-3.1/] [sw/] [linkvar.ld] - Blame information for rev 48

Details | Compare with Previous | View Log

Line No. Rev Author Line
1 48 alirezamon
 
2
/* Rom information variables */
3
_Rom_start      = 0x0;
4
_Rom_end        = 0xc000;
5
_Rom_size       = 0xc000; /* 48 K B- Rom space  */
6
 
7
_Ram_start      = 0xc000;
8
_Ram_end        = 0x10000;
9
_Ram_size       = 0x4000;  /* 16 K B- Ram space  */
10
 

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.