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[/] [ao486/] [trunk/] [bochs486/] [cpu/] [arith32.cc] - Blame information for rev 2

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/////////////////////////////////////////////////////////////////////////
// $Id: arith32.cc 11313 2012-08-05 13:52:40Z sshwarts $
/////////////////////////////////////////////////////////////////////////
//
//  Copyright (C) 2001-2012  The Bochs Project
//
//  This library is free software; you can redistribute it and/or
//  modify it under the terms of the GNU Lesser General Public
//  License as published by the Free Software Foundation; either
//  version 2 of the License, or (at your option) any later version.
//
//  This library is distributed in the hope that it will be useful,
//  but WITHOUT ANY WARRANTY; without even the implied warranty of
//  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
//  Lesser General Public License for more details.
//
//  You should have received a copy of the GNU Lesser General Public
//  License along with this library; if not, write to the Free Software
//  Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA B 02110-1301 USA
/////////////////////////////////////////////////////////////////////////
 
#define NEED_CPU_REG_SHORTCUTS 1
#include "bochs.h"
#include "cpu.h"
#define LOG_THIS BX_CPU_THIS_PTR
 
BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::INC_ERX(bxInstruction_c *i)
{
  Bit32u erx = ++BX_READ_32BIT_REG(i->dst());
  SET_FLAGS_OSZAP_ADD_32(erx - 1, 0, erx);
  BX_CLEAR_64BIT_HIGH(i->dst());
 
  BX_NEXT_INSTR(i);
}
 
BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::DEC_ERX(bxInstruction_c *i)
{
  Bit32u erx = --BX_READ_32BIT_REG(i->dst());
  SET_FLAGS_OSZAP_SUB_32(erx + 1, 0, erx);
  BX_CLEAR_64BIT_HIGH(i->dst());
 
  BX_NEXT_INSTR(i);
}
 
BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::ADD_EdGdM(bxInstruction_c *i)
{
  Bit32u op1_32, op2_32, sum_32;
 
  bx_address eaddr = BX_CPU_CALL_METHODR(i->ResolveModrm, (i));
 
  op1_32 = read_RMW_virtual_dword(i->seg(), eaddr);
  op2_32 = BX_READ_32BIT_REG(i->src());
  sum_32 = op1_32 + op2_32;
  write_RMW_virtual_dword(sum_32);
 
  SET_FLAGS_OSZAPC_ADD_32(op1_32, op2_32, sum_32);
 
  BX_NEXT_INSTR(i);
}
 
BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::ADD_GdEdR(bxInstruction_c *i)
{
  Bit32u op1_32, op2_32, sum_32;
 
  op1_32 = BX_READ_32BIT_REG(i->dst());
  op2_32 = BX_READ_32BIT_REG(i->src());
  sum_32 = op1_32 + op2_32;
 
  BX_WRITE_32BIT_REGZ(i->dst(), sum_32);
 
  SET_FLAGS_OSZAPC_ADD_32(op1_32, op2_32, sum_32);
 
  BX_NEXT_INSTR(i);
}
 
BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::ADD_GdEdM(bxInstruction_c *i)
{
  Bit32u op1_32, op2_32, sum_32;
 
  bx_address eaddr = BX_CPU_CALL_METHODR(i->ResolveModrm, (i));
 
  op1_32 = BX_READ_32BIT_REG(i->dst());
  op2_32 = read_virtual_dword(i->seg(), eaddr);
  sum_32 = op1_32 + op2_32;
 
  BX_WRITE_32BIT_REGZ(i->dst(), sum_32);
 
  SET_FLAGS_OSZAPC_ADD_32(op1_32, op2_32, sum_32);
 
  BX_NEXT_INSTR(i);
}
 
BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::ADC_EdGdM(bxInstruction_c *i)
{
  bx_bool temp_CF = getB_CF();
 
  Bit32u op1_32, op2_32, sum_32;
 
  bx_address eaddr = BX_CPU_CALL_METHODR(i->ResolveModrm, (i));
 
  op1_32 = read_RMW_virtual_dword(i->seg(), eaddr);
  op2_32 = BX_READ_32BIT_REG(i->src());
  sum_32 = op1_32 + op2_32 + temp_CF;
  write_RMW_virtual_dword(sum_32);
 
  SET_FLAGS_OSZAPC_ADD_32(op1_32, op2_32, sum_32);
 
  BX_NEXT_INSTR(i);
}
 
BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::ADC_GdEdR(bxInstruction_c *i)
{
  bx_bool temp_CF = getB_CF();
 
  Bit32u op1_32, op2_32, sum_32;
 
  op1_32 = BX_READ_32BIT_REG(i->dst());
  op2_32 = BX_READ_32BIT_REG(i->src());
  sum_32 = op1_32 + op2_32 + temp_CF;
  BX_WRITE_32BIT_REGZ(i->dst(), sum_32);
 
  SET_FLAGS_OSZAPC_ADD_32(op1_32, op2_32, sum_32);
 
  BX_NEXT_INSTR(i);
}
 
BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::ADC_GdEdM(bxInstruction_c *i)
{
  bx_bool temp_CF = getB_CF();
 
  Bit32u op1_32, op2_32, sum_32;
 
  bx_address eaddr = BX_CPU_CALL_METHODR(i->ResolveModrm, (i));
 
  op1_32 = BX_READ_32BIT_REG(i->dst());
  op2_32 = read_virtual_dword(i->seg(), eaddr);
  sum_32 = op1_32 + op2_32 + temp_CF;
  BX_WRITE_32BIT_REGZ(i->dst(), sum_32);
 
  SET_FLAGS_OSZAPC_ADD_32(op1_32, op2_32, sum_32);
 
  BX_NEXT_INSTR(i);
}
 
BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::SBB_EdGdM(bxInstruction_c *i)
{
  bx_bool temp_CF = getB_CF();
 
  Bit32u op1_32, op2_32, diff_32;
 
  bx_address eaddr = BX_CPU_CALL_METHODR(i->ResolveModrm, (i));
 
  op1_32 = read_RMW_virtual_dword(i->seg(), eaddr);
  op2_32 = BX_READ_32BIT_REG(i->src());
  diff_32 = op1_32 - (op2_32 + temp_CF);
  write_RMW_virtual_dword(diff_32);
 
  SET_FLAGS_OSZAPC_SUB_32(op1_32, op2_32, diff_32);
 
  BX_NEXT_INSTR(i);
}
 
BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::SBB_GdEdR(bxInstruction_c *i)
{
  bx_bool temp_CF = getB_CF();
 
  Bit32u op1_32, op2_32, diff_32;
 
  op1_32 = BX_READ_32BIT_REG(i->dst());
  op2_32 = BX_READ_32BIT_REG(i->src());
  diff_32 = op1_32 - (op2_32 + temp_CF);
  BX_WRITE_32BIT_REGZ(i->dst(), diff_32);
 
  SET_FLAGS_OSZAPC_SUB_32(op1_32, op2_32, diff_32);
 
  BX_NEXT_INSTR(i);
}
 
BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::SBB_GdEdM(bxInstruction_c *i)
{
  bx_bool temp_CF = getB_CF();
 
  Bit32u op1_32, op2_32, diff_32;
 
  bx_address eaddr = BX_CPU_CALL_METHODR(i->ResolveModrm, (i));
 
  op1_32 = BX_READ_32BIT_REG(i->dst());
  op2_32 = read_virtual_dword(i->seg(), eaddr);
  diff_32 = op1_32 - (op2_32 + temp_CF);
  BX_WRITE_32BIT_REGZ(i->dst(), diff_32);
 
  SET_FLAGS_OSZAPC_SUB_32(op1_32, op2_32, diff_32);
 
  BX_NEXT_INSTR(i);
}
 
BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::SBB_EdIdM(bxInstruction_c *i)
{
  bx_bool temp_CF = getB_CF();
 
  Bit32u op1_32, op2_32 = i->Id(), diff_32;
 
  bx_address eaddr = BX_CPU_CALL_METHODR(i->ResolveModrm, (i));
 
  op1_32 = read_RMW_virtual_dword(i->seg(), eaddr);
  diff_32 = op1_32 - (op2_32 + temp_CF);
  write_RMW_virtual_dword(diff_32);
 
  SET_FLAGS_OSZAPC_SUB_32(op1_32, op2_32, diff_32);
 
  BX_NEXT_INSTR(i);
}
 
BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::SBB_EdIdR(bxInstruction_c *i)
{
  bx_bool temp_CF = getB_CF();
 
  Bit32u op1_32, op2_32 = i->Id(), diff_32;
 
  op1_32 = BX_READ_32BIT_REG(i->dst());
  diff_32 = op1_32 - (op2_32 + temp_CF);
  BX_WRITE_32BIT_REGZ(i->dst(), diff_32);
 
  SET_FLAGS_OSZAPC_SUB_32(op1_32, op2_32, diff_32);
 
  BX_NEXT_INSTR(i);
}
 
BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::SUB_EdGdM(bxInstruction_c *i)
{
  Bit32u op1_32, op2_32, diff_32;
 
  bx_address eaddr = BX_CPU_CALL_METHODR(i->ResolveModrm, (i));
 
  op1_32 = read_RMW_virtual_dword(i->seg(), eaddr);
  op2_32 = BX_READ_32BIT_REG(i->src());
  diff_32 = op1_32 - op2_32;
  write_RMW_virtual_dword(diff_32);
 
  SET_FLAGS_OSZAPC_SUB_32(op1_32, op2_32, diff_32);
 
  BX_NEXT_INSTR(i);
}
 
BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::SUB_GdEdR(bxInstruction_c *i)
{
  Bit32u op1_32, op2_32, diff_32;
 
  op1_32 = BX_READ_32BIT_REG(i->dst());
  op2_32 = BX_READ_32BIT_REG(i->src());
  diff_32 = op1_32 - op2_32;
  BX_WRITE_32BIT_REGZ(i->dst(), diff_32);
 
  SET_FLAGS_OSZAPC_SUB_32(op1_32, op2_32, diff_32);
 
  BX_NEXT_INSTR(i);
}
 
BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::SUB_GdEdM(bxInstruction_c *i)
{
  Bit32u op1_32, op2_32, diff_32;
 
  bx_address eaddr = BX_CPU_CALL_METHODR(i->ResolveModrm, (i));
 
  op1_32 = BX_READ_32BIT_REG(i->dst());
  op2_32 = read_virtual_dword(i->seg(), eaddr);
  diff_32 = op1_32 - op2_32;
  BX_WRITE_32BIT_REGZ(i->dst(), diff_32);
 
  SET_FLAGS_OSZAPC_SUB_32(op1_32, op2_32, diff_32);
 
  BX_NEXT_INSTR(i);
}
 
BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::CMP_EdGdM(bxInstruction_c *i)
{
  Bit32u op1_32, op2_32, diff_32;
 
  bx_address eaddr = BX_CPU_CALL_METHODR(i->ResolveModrm, (i));
 
  op1_32 = read_virtual_dword(i->seg(), eaddr);
  op2_32 = BX_READ_32BIT_REG(i->src());
  diff_32 = op1_32 - op2_32;
 
  SET_FLAGS_OSZAPC_SUB_32(op1_32, op2_32, diff_32);
 
  BX_NEXT_INSTR(i);
}
 
BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::CMP_GdEdR(bxInstruction_c *i)
{
  Bit32u op1_32, op2_32, diff_32;
 
  op1_32 = BX_READ_32BIT_REG(i->dst());
  op2_32 = BX_READ_32BIT_REG(i->src());
  diff_32 = op1_32 - op2_32;
 
  SET_FLAGS_OSZAPC_SUB_32(op1_32, op2_32, diff_32);
 
  BX_NEXT_INSTR(i);
}
 
BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::CMP_GdEdM(bxInstruction_c *i)
{
  Bit32u op1_32, op2_32, diff_32;
 
  bx_address eaddr = BX_CPU_CALL_METHODR(i->ResolveModrm, (i));
 
  op1_32 = BX_READ_32BIT_REG(i->dst());
  op2_32 = read_virtual_dword(i->seg(), eaddr);
  diff_32 = op1_32 - op2_32;
 
  SET_FLAGS_OSZAPC_SUB_32(op1_32, op2_32, diff_32);
 
  BX_NEXT_INSTR(i);
}
 
BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::CWDE(bxInstruction_c *i)
{
  /* CWDE: no flags are effected */
  Bit32u tmp = (Bit16s) AX;
  RAX = tmp;
 
  BX_NEXT_INSTR(i);
}
 
BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::CDQ(bxInstruction_c *i)
{
  /* CDQ: no flags are affected */
  if (EAX & 0x80000000) {
    RDX = 0xFFFFFFFF;
  }
  else {
    RDX = 0x00000000;
  }
 
  BX_NEXT_INSTR(i);
}
 
BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::XADD_EdGdM(bxInstruction_c *i)
{
  Bit32u op1_32, op2_32, sum_32;
 
  /* XADD dst(r/m), src(r)
   * temp <-- src + dst         | sum = op2 + op1
   * src  <-- dst               | op2 = op1
   * dst  <-- tmp               | op1 = sum
   */
 
  bx_address eaddr = BX_CPU_CALL_METHODR(i->ResolveModrm, (i));
 
  op1_32 = read_RMW_virtual_dword(i->seg(), eaddr);
  op2_32 = BX_READ_32BIT_REG(i->src());
  sum_32 = op1_32 + op2_32;
  write_RMW_virtual_dword(sum_32);
 
  /* and write destination into source */
  BX_WRITE_32BIT_REGZ(i->src(), op1_32);
 
  SET_FLAGS_OSZAPC_ADD_32(op1_32, op2_32, sum_32);
 
  BX_NEXT_INSTR(i);
}
 
BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::XADD_EdGdR(bxInstruction_c *i)
{
  Bit32u op1_32, op2_32, sum_32;
 
  /* XADD dst(r/m), src(r)
   * temp <-- src + dst         | sum = op2 + op1
   * src  <-- dst               | op2 = op1
   * dst  <-- tmp               | op1 = sum
   */
 
  op1_32 = BX_READ_32BIT_REG(i->dst());
  op2_32 = BX_READ_32BIT_REG(i->src());
  sum_32 = op1_32 + op2_32;
 
  // and write destination into source
  // Note: if both op1 & op2 are registers, the last one written
  //       should be the sum, as op1 & op2 may be the same register.
  //       For example:  XADD AL, AL
  BX_WRITE_32BIT_REGZ(i->src(), op1_32);
  BX_WRITE_32BIT_REGZ(i->dst(), sum_32);
 
  SET_FLAGS_OSZAPC_ADD_32(op1_32, op2_32, sum_32);
 
  BX_NEXT_INSTR(i);
}
 
BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::ADD_EdIdM(bxInstruction_c *i)
{
  Bit32u op1_32, op2_32, sum_32;
 
  bx_address eaddr = BX_CPU_CALL_METHODR(i->ResolveModrm, (i));
 
  op1_32 = read_RMW_virtual_dword(i->seg(), eaddr);
  op2_32 = i->Id();
  sum_32 = op1_32 + op2_32;
  write_RMW_virtual_dword(sum_32);
 
  SET_FLAGS_OSZAPC_ADD_32(op1_32, op2_32, sum_32);
 
  BX_NEXT_INSTR(i);
}
 
BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::ADD_EdIdR(bxInstruction_c *i)
{
  Bit32u op1_32, op2_32, sum_32;
 
  op1_32 = BX_READ_32BIT_REG(i->dst());
  op2_32 = i->Id();
  sum_32 = op1_32 + op2_32;
 
  BX_WRITE_32BIT_REGZ(i->dst(), sum_32);
 
  SET_FLAGS_OSZAPC_ADD_32(op1_32, op2_32, sum_32);
 
  BX_NEXT_INSTR(i);
}
 
BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::ADC_EdIdM(bxInstruction_c *i)
{
  bx_bool temp_CF = getB_CF();
 
  Bit32u op1_32, op2_32 = i->Id(), sum_32;
 
  bx_address eaddr = BX_CPU_CALL_METHODR(i->ResolveModrm, (i));
 
  op1_32 = read_RMW_virtual_dword(i->seg(), eaddr);
  sum_32 = op1_32 + op2_32 + temp_CF;
  write_RMW_virtual_dword(sum_32);
 
  SET_FLAGS_OSZAPC_ADD_32(op1_32, op2_32, sum_32);
 
  BX_NEXT_INSTR(i);
}
 
BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::ADC_EdIdR(bxInstruction_c *i)
{
  bx_bool temp_CF = getB_CF();
 
  Bit32u op1_32, op2_32 = i->Id(), sum_32;
 
  op1_32 = BX_READ_32BIT_REG(i->dst());
  sum_32 = op1_32 + op2_32 + temp_CF;
  BX_WRITE_32BIT_REGZ(i->dst(), sum_32);
 
  SET_FLAGS_OSZAPC_ADD_32(op1_32, op2_32, sum_32);
 
  BX_NEXT_INSTR(i);
}
 
BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::SUB_EdIdM(bxInstruction_c *i)
{
  Bit32u op1_32, op2_32 = i->Id(), diff_32;
 
  bx_address eaddr = BX_CPU_CALL_METHODR(i->ResolveModrm, (i));
 
  op1_32 = read_RMW_virtual_dword(i->seg(), eaddr);
  diff_32 = op1_32 - op2_32;
  write_RMW_virtual_dword(diff_32);
 
  SET_FLAGS_OSZAPC_SUB_32(op1_32, op2_32, diff_32);
 
  BX_NEXT_INSTR(i);
}
 
BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::SUB_EdIdR(bxInstruction_c *i)
{
  Bit32u op1_32, op2_32 = i->Id(), diff_32;
 
  op1_32 = BX_READ_32BIT_REG(i->dst());
  diff_32 = op1_32 - op2_32;
  BX_WRITE_32BIT_REGZ(i->dst(), diff_32);
 
  SET_FLAGS_OSZAPC_SUB_32(op1_32, op2_32, diff_32);
 
  BX_NEXT_INSTR(i);
}
 
BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::CMP_EdIdM(bxInstruction_c *i)
{
  Bit32u op1_32, op2_32, diff_32;
 
  bx_address eaddr = BX_CPU_CALL_METHODR(i->ResolveModrm, (i));
 
  op1_32 = read_virtual_dword(i->seg(), eaddr);
  op2_32 = i->Id();
  diff_32 = op1_32 - op2_32;
 
  SET_FLAGS_OSZAPC_SUB_32(op1_32, op2_32, diff_32);
 
  BX_NEXT_INSTR(i);
}
 
BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::CMP_EdIdR(bxInstruction_c *i)
{
  Bit32u op1_32, op2_32, diff_32;
 
  op1_32 = BX_READ_32BIT_REG(i->dst());
  op2_32 = i->Id();
  diff_32 = op1_32 - op2_32;
 
  SET_FLAGS_OSZAPC_SUB_32(op1_32, op2_32, diff_32);
 
  BX_NEXT_INSTR(i);
}
 
BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::NEG_EdM(bxInstruction_c *i)
{
  bx_address eaddr = BX_CPU_CALL_METHODR(i->ResolveModrm, (i));
 
  Bit32u op1_32 = read_RMW_virtual_dword(i->seg(), eaddr);
  op1_32 = - (Bit32s)(op1_32);
  write_RMW_virtual_dword(op1_32);
 
  SET_FLAGS_OSZAPC_SUB_32(0, 0 - op1_32, op1_32);
 
  BX_NEXT_INSTR(i);
}
 
BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::NEG_EdR(bxInstruction_c *i)
{
  Bit32u op1_32 = BX_READ_32BIT_REG(i->dst());
  op1_32 = - (Bit32s)(op1_32);
  BX_WRITE_32BIT_REGZ(i->dst(), op1_32);
 
  SET_FLAGS_OSZAPC_SUB_32(0, 0 - op1_32, op1_32);
 
  BX_NEXT_INSTR(i);
}
 
BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::INC_EdM(bxInstruction_c *i)
{
  bx_address eaddr = BX_CPU_CALL_METHODR(i->ResolveModrm, (i));
 
  Bit32u op1_32 = read_RMW_virtual_dword(i->seg(), eaddr);
  op1_32++;
  write_RMW_virtual_dword(op1_32);
 
  SET_FLAGS_OSZAP_ADD_32(op1_32 - 1, 0, op1_32);
 
  BX_NEXT_INSTR(i);
}
 
BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::DEC_EdM(bxInstruction_c *i)
{
  bx_address eaddr = BX_CPU_CALL_METHODR(i->ResolveModrm, (i));
 
  Bit32u op1_32 = read_RMW_virtual_dword(i->seg(), eaddr);
  op1_32--;
  write_RMW_virtual_dword(op1_32);
 
  SET_FLAGS_OSZAP_SUB_32(op1_32 + 1, 0, op1_32);
 
  BX_NEXT_INSTR(i);
}
 
BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::CMPXCHG_EdGdM(bxInstruction_c *i)
{
  bx_address eaddr = BX_CPU_CALL_METHODR(i->ResolveModrm, (i));
 
  Bit32u op1_32 = read_RMW_virtual_dword(i->seg(), eaddr);
  Bit32u diff_32 = EAX - op1_32;
  SET_FLAGS_OSZAPC_SUB_32(EAX, op1_32, diff_32);
 
  if (diff_32 == 0) {  // if accumulator == dest
    // dest <-- src
    write_RMW_virtual_dword(BX_READ_32BIT_REG(i->src()));
  }
  else {
    // accumulator <-- dest
    RAX = op1_32;
  }
 
  BX_NEXT_INSTR(i);
}
 
BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::CMPXCHG_EdGdR(bxInstruction_c *i)
{
  Bit32u op1_32 = BX_READ_32BIT_REG(i->dst());
  Bit32u diff_32 = EAX - op1_32;
  SET_FLAGS_OSZAPC_SUB_32(EAX, op1_32, diff_32);
 
  if (diff_32 == 0) {  // if accumulator == dest
    // dest <-- src
    BX_WRITE_32BIT_REGZ(i->dst(), BX_READ_32BIT_REG(i->src()));
  }
  else {
    // accumulator <-- dest
    RAX = op1_32;
  }
 
  BX_NEXT_INSTR(i);
}
 
BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::CMPXCHG8B(bxInstruction_c *i)
{
  bx_address eaddr = BX_CPU_CALL_METHODR(i->ResolveModrm, (i));
 
  // check write permission for following write
  Bit64u op1_64 = read_RMW_virtual_qword(i->seg(), eaddr);
  Bit64u op2_64 = ((Bit64u) EDX << 32) | EAX;
 
  if (op1_64 == op2_64) {  // if accumulator == dest
    // dest <-- src (ECX:EBX)
    op2_64 = ((Bit64u) ECX << 32) | EBX;
    write_RMW_virtual_qword(op2_64);
    assert_ZF();
  }
  else {
    // accumulator <-- dest
    RAX = GET32L(op1_64);
    RDX = GET32H(op1_64);
    clear_ZF();
  }
 
  BX_NEXT_INSTR(i);
}

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[/] [ao486/] [trunk/] [bochs486/] [cpu/] [arith32.cc] - Blame information for rev 2

Line No.	Rev	Author	Line
1	2	alfik	`/////////////////////////////////////////////////////////////////////////`
2			`// $Id: arith32.cc 11313 2012-08-05 13:52:40Z sshwarts $`
3			`/////////////////////////////////////////////////////////////////////////`
4			`//`
5			`// Copyright (C) 2001-2012 The Bochs Project`
6			`//`
7			`// This library is free software; you can redistribute it and/or`
8			`// modify it under the terms of the GNU Lesser General Public`
9			`// License as published by the Free Software Foundation; either`
10			`// version 2 of the License, or (at your option) any later version.`
11			`//`
12			`// This library is distributed in the hope that it will be useful,`
13			`// but WITHOUT ANY WARRANTY; without even the implied warranty of`
14			`// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU`
15			`// Lesser General Public License for more details.`
16			`//`
17			`// You should have received a copy of the GNU Lesser General Public`
18			`// License along with this library; if not, write to the Free Software`
19			`// Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA B 02110-1301 USA`
20			`/////////////////////////////////////////////////////////////////////////`
21
22			`#define NEED_CPU_REG_SHORTCUTS 1`
23			`#include "bochs.h"`
24			`#include "cpu.h"`
25			`#define LOG_THIS BX_CPU_THIS_PTR`
26
27			`BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::INC_ERX(bxInstruction_c *i)`
28			`{`
29			`Bit32u erx = ++BX_READ_32BIT_REG(i->dst());`
30			`SET_FLAGS_OSZAP_ADD_32(erx - 1, 0, erx);`
31			`BX_CLEAR_64BIT_HIGH(i->dst());`
32
33			`BX_NEXT_INSTR(i);`
34			`}`
35
36			`BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::DEC_ERX(bxInstruction_c *i)`
37			`{`
38			`Bit32u erx = --BX_READ_32BIT_REG(i->dst());`
39			`SET_FLAGS_OSZAP_SUB_32(erx + 1, 0, erx);`
40			`BX_CLEAR_64BIT_HIGH(i->dst());`
41
42			`BX_NEXT_INSTR(i);`
43			`}`
44
45			`BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::ADD_EdGdM(bxInstruction_c *i)`
46			`{`
47			`Bit32u op1_32, op2_32, sum_32;`
48
49			`bx_address eaddr = BX_CPU_CALL_METHODR(i->ResolveModrm, (i));`
50
51			`op1_32 = read_RMW_virtual_dword(i->seg(), eaddr);`
52			`op2_32 = BX_READ_32BIT_REG(i->src());`
53			`sum_32 = op1_32 + op2_32;`
54			`write_RMW_virtual_dword(sum_32);`
55
56			`SET_FLAGS_OSZAPC_ADD_32(op1_32, op2_32, sum_32);`
57
58			`BX_NEXT_INSTR(i);`
59			`}`
60
61			`BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::ADD_GdEdR(bxInstruction_c *i)`
62			`{`
63			`Bit32u op1_32, op2_32, sum_32;`
64
65			`op1_32 = BX_READ_32BIT_REG(i->dst());`
66			`op2_32 = BX_READ_32BIT_REG(i->src());`
67			`sum_32 = op1_32 + op2_32;`
68
69			`BX_WRITE_32BIT_REGZ(i->dst(), sum_32);`
70
71			`SET_FLAGS_OSZAPC_ADD_32(op1_32, op2_32, sum_32);`
72
73			`BX_NEXT_INSTR(i);`
74			`}`
75
76			`BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::ADD_GdEdM(bxInstruction_c *i)`
77			`{`
78			`Bit32u op1_32, op2_32, sum_32;`
79
80			`bx_address eaddr = BX_CPU_CALL_METHODR(i->ResolveModrm, (i));`
81
82			`op1_32 = BX_READ_32BIT_REG(i->dst());`
83			`op2_32 = read_virtual_dword(i->seg(), eaddr);`
84			`sum_32 = op1_32 + op2_32;`
85
86			`BX_WRITE_32BIT_REGZ(i->dst(), sum_32);`
87
88			`SET_FLAGS_OSZAPC_ADD_32(op1_32, op2_32, sum_32);`
89
90			`BX_NEXT_INSTR(i);`
91			`}`
92
93			`BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::ADC_EdGdM(bxInstruction_c *i)`
94			`{`
95			`bx_bool temp_CF = getB_CF();`
96
97			`Bit32u op1_32, op2_32, sum_32;`
98
99			`bx_address eaddr = BX_CPU_CALL_METHODR(i->ResolveModrm, (i));`
100
101			`op1_32 = read_RMW_virtual_dword(i->seg(), eaddr);`
102			`op2_32 = BX_READ_32BIT_REG(i->src());`
103			`sum_32 = op1_32 + op2_32 + temp_CF;`
104			`write_RMW_virtual_dword(sum_32);`
105
106			`SET_FLAGS_OSZAPC_ADD_32(op1_32, op2_32, sum_32);`
107
108			`BX_NEXT_INSTR(i);`
109			`}`
110
111			`BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::ADC_GdEdR(bxInstruction_c *i)`
112			`{`
113			`bx_bool temp_CF = getB_CF();`
114
115			`Bit32u op1_32, op2_32, sum_32;`
116
117			`op1_32 = BX_READ_32BIT_REG(i->dst());`
118			`op2_32 = BX_READ_32BIT_REG(i->src());`
119			`sum_32 = op1_32 + op2_32 + temp_CF;`
120			`BX_WRITE_32BIT_REGZ(i->dst(), sum_32);`
121
122			`SET_FLAGS_OSZAPC_ADD_32(op1_32, op2_32, sum_32);`
123
124			`BX_NEXT_INSTR(i);`
125			`}`
126
127			`BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::ADC_GdEdM(bxInstruction_c *i)`
128			`{`
129			`bx_bool temp_CF = getB_CF();`
130
131			`Bit32u op1_32, op2_32, sum_32;`
132
133			`bx_address eaddr = BX_CPU_CALL_METHODR(i->ResolveModrm, (i));`
134
135			`op1_32 = BX_READ_32BIT_REG(i->dst());`
136			`op2_32 = read_virtual_dword(i->seg(), eaddr);`
137			`sum_32 = op1_32 + op2_32 + temp_CF;`
138			`BX_WRITE_32BIT_REGZ(i->dst(), sum_32);`
139
140			`SET_FLAGS_OSZAPC_ADD_32(op1_32, op2_32, sum_32);`
141
142			`BX_NEXT_INSTR(i);`
143			`}`
144
145			`BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::SBB_EdGdM(bxInstruction_c *i)`
146			`{`
147			`bx_bool temp_CF = getB_CF();`
148
149			`Bit32u op1_32, op2_32, diff_32;`
150
151			`bx_address eaddr = BX_CPU_CALL_METHODR(i->ResolveModrm, (i));`
152
153			`op1_32 = read_RMW_virtual_dword(i->seg(), eaddr);`
154			`op2_32 = BX_READ_32BIT_REG(i->src());`
155			`diff_32 = op1_32 - (op2_32 + temp_CF);`
156			`write_RMW_virtual_dword(diff_32);`
157
158			`SET_FLAGS_OSZAPC_SUB_32(op1_32, op2_32, diff_32);`
159
160			`BX_NEXT_INSTR(i);`
161			`}`
162
163			`BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::SBB_GdEdR(bxInstruction_c *i)`
164			`{`
165			`bx_bool temp_CF = getB_CF();`
166
167			`Bit32u op1_32, op2_32, diff_32;`
168
169			`op1_32 = BX_READ_32BIT_REG(i->dst());`
170			`op2_32 = BX_READ_32BIT_REG(i->src());`
171			`diff_32 = op1_32 - (op2_32 + temp_CF);`
172			`BX_WRITE_32BIT_REGZ(i->dst(), diff_32);`
173
174			`SET_FLAGS_OSZAPC_SUB_32(op1_32, op2_32, diff_32);`
175
176			`BX_NEXT_INSTR(i);`
177			`}`
178
179			`BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::SBB_GdEdM(bxInstruction_c *i)`
180			`{`
181			`bx_bool temp_CF = getB_CF();`
182
183			`Bit32u op1_32, op2_32, diff_32;`
184
185			`bx_address eaddr = BX_CPU_CALL_METHODR(i->ResolveModrm, (i));`
186
187			`op1_32 = BX_READ_32BIT_REG(i->dst());`
188			`op2_32 = read_virtual_dword(i->seg(), eaddr);`
189			`diff_32 = op1_32 - (op2_32 + temp_CF);`
190			`BX_WRITE_32BIT_REGZ(i->dst(), diff_32);`
191
192			`SET_FLAGS_OSZAPC_SUB_32(op1_32, op2_32, diff_32);`
193
194			`BX_NEXT_INSTR(i);`
195			`}`
196
197			`BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::SBB_EdIdM(bxInstruction_c *i)`
198			`{`
199			`bx_bool temp_CF = getB_CF();`
200
201			`Bit32u op1_32, op2_32 = i->Id(), diff_32;`
202
203			`bx_address eaddr = BX_CPU_CALL_METHODR(i->ResolveModrm, (i));`
204
205			`op1_32 = read_RMW_virtual_dword(i->seg(), eaddr);`
206			`diff_32 = op1_32 - (op2_32 + temp_CF);`
207			`write_RMW_virtual_dword(diff_32);`
208
209			`SET_FLAGS_OSZAPC_SUB_32(op1_32, op2_32, diff_32);`
210
211			`BX_NEXT_INSTR(i);`
212			`}`
213
214			`BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::SBB_EdIdR(bxInstruction_c *i)`
215			`{`
216			`bx_bool temp_CF = getB_CF();`
217
218			`Bit32u op1_32, op2_32 = i->Id(), diff_32;`
219
220			`op1_32 = BX_READ_32BIT_REG(i->dst());`
221			`diff_32 = op1_32 - (op2_32 + temp_CF);`
222			`BX_WRITE_32BIT_REGZ(i->dst(), diff_32);`
223
224			`SET_FLAGS_OSZAPC_SUB_32(op1_32, op2_32, diff_32);`
225
226			`BX_NEXT_INSTR(i);`
227			`}`
228
229			`BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::SUB_EdGdM(bxInstruction_c *i)`
230			`{`
231			`Bit32u op1_32, op2_32, diff_32;`
232
233			`bx_address eaddr = BX_CPU_CALL_METHODR(i->ResolveModrm, (i));`
234
235			`op1_32 = read_RMW_virtual_dword(i->seg(), eaddr);`
236			`op2_32 = BX_READ_32BIT_REG(i->src());`
237			`diff_32 = op1_32 - op2_32;`
238			`write_RMW_virtual_dword(diff_32);`
239
240			`SET_FLAGS_OSZAPC_SUB_32(op1_32, op2_32, diff_32);`
241
242			`BX_NEXT_INSTR(i);`
243			`}`
244
245			`BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::SUB_GdEdR(bxInstruction_c *i)`
246			`{`
247			`Bit32u op1_32, op2_32, diff_32;`
248
249			`op1_32 = BX_READ_32BIT_REG(i->dst());`
250			`op2_32 = BX_READ_32BIT_REG(i->src());`
251			`diff_32 = op1_32 - op2_32;`
252			`BX_WRITE_32BIT_REGZ(i->dst(), diff_32);`
253
254			`SET_FLAGS_OSZAPC_SUB_32(op1_32, op2_32, diff_32);`
255
256			`BX_NEXT_INSTR(i);`
257			`}`
258
259			`BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::SUB_GdEdM(bxInstruction_c *i)`
260			`{`
261			`Bit32u op1_32, op2_32, diff_32;`
262
263			`bx_address eaddr = BX_CPU_CALL_METHODR(i->ResolveModrm, (i));`
264
265			`op1_32 = BX_READ_32BIT_REG(i->dst());`
266			`op2_32 = read_virtual_dword(i->seg(), eaddr);`
267			`diff_32 = op1_32 - op2_32;`
268			`BX_WRITE_32BIT_REGZ(i->dst(), diff_32);`
269
270			`SET_FLAGS_OSZAPC_SUB_32(op1_32, op2_32, diff_32);`
271
272			`BX_NEXT_INSTR(i);`
273			`}`
274
275			`BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::CMP_EdGdM(bxInstruction_c *i)`
276			`{`
277			`Bit32u op1_32, op2_32, diff_32;`
278
279			`bx_address eaddr = BX_CPU_CALL_METHODR(i->ResolveModrm, (i));`
280
281			`op1_32 = read_virtual_dword(i->seg(), eaddr);`
282			`op2_32 = BX_READ_32BIT_REG(i->src());`
283			`diff_32 = op1_32 - op2_32;`
284
285			`SET_FLAGS_OSZAPC_SUB_32(op1_32, op2_32, diff_32);`
286
287			`BX_NEXT_INSTR(i);`
288			`}`
289
290			`BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::CMP_GdEdR(bxInstruction_c *i)`
291			`{`
292			`Bit32u op1_32, op2_32, diff_32;`
293
294			`op1_32 = BX_READ_32BIT_REG(i->dst());`
295			`op2_32 = BX_READ_32BIT_REG(i->src());`
296			`diff_32 = op1_32 - op2_32;`
297
298			`SET_FLAGS_OSZAPC_SUB_32(op1_32, op2_32, diff_32);`
299
300			`BX_NEXT_INSTR(i);`
301			`}`
302
303			`BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::CMP_GdEdM(bxInstruction_c *i)`
304			`{`
305			`Bit32u op1_32, op2_32, diff_32;`
306
307			`bx_address eaddr = BX_CPU_CALL_METHODR(i->ResolveModrm, (i));`
308
309			`op1_32 = BX_READ_32BIT_REG(i->dst());`
310			`op2_32 = read_virtual_dword(i->seg(), eaddr);`
311			`diff_32 = op1_32 - op2_32;`
312
313			`SET_FLAGS_OSZAPC_SUB_32(op1_32, op2_32, diff_32);`
314
315			`BX_NEXT_INSTR(i);`
316			`}`
317
318			`BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::CWDE(bxInstruction_c *i)`
319			`{`
320			`/* CWDE: no flags are effected */`
321			`Bit32u tmp = (Bit16s) AX;`
322			`RAX = tmp;`
323
324			`BX_NEXT_INSTR(i);`
325			`}`
326
327			`BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::CDQ(bxInstruction_c *i)`
328			`{`
329			`/* CDQ: no flags are affected */`
330			`if (EAX & 0x80000000) {`
331			`RDX = 0xFFFFFFFF;`
332			`}`
333			`else {`
334			`RDX = 0x00000000;`
335			`}`
336
337			`BX_NEXT_INSTR(i);`
338			`}`
339
340			`BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::XADD_EdGdM(bxInstruction_c *i)`
341			`{`
342			`Bit32u op1_32, op2_32, sum_32;`
343
344			`/* XADD dst(r/m), src(r)`
345			`* temp <-- src + dst \| sum = op2 + op1`
346			`* src <-- dst \| op2 = op1`
347			`* dst <-- tmp \| op1 = sum`
348			`*/`
349
350			`bx_address eaddr = BX_CPU_CALL_METHODR(i->ResolveModrm, (i));`
351
352			`op1_32 = read_RMW_virtual_dword(i->seg(), eaddr);`
353			`op2_32 = BX_READ_32BIT_REG(i->src());`
354			`sum_32 = op1_32 + op2_32;`
355			`write_RMW_virtual_dword(sum_32);`
356
357			`/* and write destination into source */`
358			`BX_WRITE_32BIT_REGZ(i->src(), op1_32);`
359
360			`SET_FLAGS_OSZAPC_ADD_32(op1_32, op2_32, sum_32);`
361
362			`BX_NEXT_INSTR(i);`
363			`}`
364
365			`BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::XADD_EdGdR(bxInstruction_c *i)`
366			`{`
367			`Bit32u op1_32, op2_32, sum_32;`
368
369			`/* XADD dst(r/m), src(r)`
370			`* temp <-- src + dst \| sum = op2 + op1`
371			`* src <-- dst \| op2 = op1`
372			`* dst <-- tmp \| op1 = sum`
373			`*/`
374
375			`op1_32 = BX_READ_32BIT_REG(i->dst());`
376			`op2_32 = BX_READ_32BIT_REG(i->src());`
377			`sum_32 = op1_32 + op2_32;`
378
379			`// and write destination into source`
380			`// Note: if both op1 & op2 are registers, the last one written`
381			`// should be the sum, as op1 & op2 may be the same register.`
382			`// For example: XADD AL, AL`
383			`BX_WRITE_32BIT_REGZ(i->src(), op1_32);`
384			`BX_WRITE_32BIT_REGZ(i->dst(), sum_32);`
385
386			`SET_FLAGS_OSZAPC_ADD_32(op1_32, op2_32, sum_32);`
387
388			`BX_NEXT_INSTR(i);`
389			`}`
390
391			`BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::ADD_EdIdM(bxInstruction_c *i)`
392			`{`
393			`Bit32u op1_32, op2_32, sum_32;`
394
395			`bx_address eaddr = BX_CPU_CALL_METHODR(i->ResolveModrm, (i));`
396
397			`op1_32 = read_RMW_virtual_dword(i->seg(), eaddr);`
398			`op2_32 = i->Id();`
399			`sum_32 = op1_32 + op2_32;`
400			`write_RMW_virtual_dword(sum_32);`
401
402			`SET_FLAGS_OSZAPC_ADD_32(op1_32, op2_32, sum_32);`
403
404			`BX_NEXT_INSTR(i);`
405			`}`
406
407			`BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::ADD_EdIdR(bxInstruction_c *i)`
408			`{`
409			`Bit32u op1_32, op2_32, sum_32;`
410
411			`op1_32 = BX_READ_32BIT_REG(i->dst());`
412			`op2_32 = i->Id();`
413			`sum_32 = op1_32 + op2_32;`
414
415			`BX_WRITE_32BIT_REGZ(i->dst(), sum_32);`
416
417			`SET_FLAGS_OSZAPC_ADD_32(op1_32, op2_32, sum_32);`
418
419			`BX_NEXT_INSTR(i);`
420			`}`
421
422			`BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::ADC_EdIdM(bxInstruction_c *i)`
423			`{`
424			`bx_bool temp_CF = getB_CF();`
425
426			`Bit32u op1_32, op2_32 = i->Id(), sum_32;`
427
428			`bx_address eaddr = BX_CPU_CALL_METHODR(i->ResolveModrm, (i));`
429
430			`op1_32 = read_RMW_virtual_dword(i->seg(), eaddr);`
431			`sum_32 = op1_32 + op2_32 + temp_CF;`
432			`write_RMW_virtual_dword(sum_32);`
433
434			`SET_FLAGS_OSZAPC_ADD_32(op1_32, op2_32, sum_32);`
435
436			`BX_NEXT_INSTR(i);`
437			`}`
438
439			`BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::ADC_EdIdR(bxInstruction_c *i)`
440			`{`
441			`bx_bool temp_CF = getB_CF();`
442
443			`Bit32u op1_32, op2_32 = i->Id(), sum_32;`
444
445			`op1_32 = BX_READ_32BIT_REG(i->dst());`
446			`sum_32 = op1_32 + op2_32 + temp_CF;`
447			`BX_WRITE_32BIT_REGZ(i->dst(), sum_32);`
448
449			`SET_FLAGS_OSZAPC_ADD_32(op1_32, op2_32, sum_32);`
450
451			`BX_NEXT_INSTR(i);`
452			`}`
453
454			`BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::SUB_EdIdM(bxInstruction_c *i)`
455			`{`
456			`Bit32u op1_32, op2_32 = i->Id(), diff_32;`
457
458			`bx_address eaddr = BX_CPU_CALL_METHODR(i->ResolveModrm, (i));`
459
460			`op1_32 = read_RMW_virtual_dword(i->seg(), eaddr);`
461			`diff_32 = op1_32 - op2_32;`
462			`write_RMW_virtual_dword(diff_32);`
463
464			`SET_FLAGS_OSZAPC_SUB_32(op1_32, op2_32, diff_32);`
465
466			`BX_NEXT_INSTR(i);`
467			`}`
468
469			`BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::SUB_EdIdR(bxInstruction_c *i)`
470			`{`
471			`Bit32u op1_32, op2_32 = i->Id(), diff_32;`
472
473			`op1_32 = BX_READ_32BIT_REG(i->dst());`
474			`diff_32 = op1_32 - op2_32;`
475			`BX_WRITE_32BIT_REGZ(i->dst(), diff_32);`
476
477			`SET_FLAGS_OSZAPC_SUB_32(op1_32, op2_32, diff_32);`
478
479			`BX_NEXT_INSTR(i);`
480			`}`
481
482			`BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::CMP_EdIdM(bxInstruction_c *i)`
483			`{`
484			`Bit32u op1_32, op2_32, diff_32;`
485
486			`bx_address eaddr = BX_CPU_CALL_METHODR(i->ResolveModrm, (i));`
487
488			`op1_32 = read_virtual_dword(i->seg(), eaddr);`
489			`op2_32 = i->Id();`
490			`diff_32 = op1_32 - op2_32;`
491
492			`SET_FLAGS_OSZAPC_SUB_32(op1_32, op2_32, diff_32);`
493
494			`BX_NEXT_INSTR(i);`
495			`}`
496
497			`BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::CMP_EdIdR(bxInstruction_c *i)`
498			`{`
499			`Bit32u op1_32, op2_32, diff_32;`
500
501			`op1_32 = BX_READ_32BIT_REG(i->dst());`
502			`op2_32 = i->Id();`
503			`diff_32 = op1_32 - op2_32;`
504
505			`SET_FLAGS_OSZAPC_SUB_32(op1_32, op2_32, diff_32);`
506
507			`BX_NEXT_INSTR(i);`
508			`}`
509
510			`BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::NEG_EdM(bxInstruction_c *i)`
511			`{`
512			`bx_address eaddr = BX_CPU_CALL_METHODR(i->ResolveModrm, (i));`
513
514			`Bit32u op1_32 = read_RMW_virtual_dword(i->seg(), eaddr);`
515			`op1_32 = - (Bit32s)(op1_32);`
516			`write_RMW_virtual_dword(op1_32);`
517
518			`SET_FLAGS_OSZAPC_SUB_32(0, 0 - op1_32, op1_32);`
519
520			`BX_NEXT_INSTR(i);`
521			`}`
522
523			`BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::NEG_EdR(bxInstruction_c *i)`
524			`{`
525			`Bit32u op1_32 = BX_READ_32BIT_REG(i->dst());`
526			`op1_32 = - (Bit32s)(op1_32);`
527			`BX_WRITE_32BIT_REGZ(i->dst(), op1_32);`
528
529			`SET_FLAGS_OSZAPC_SUB_32(0, 0 - op1_32, op1_32);`
530
531			`BX_NEXT_INSTR(i);`
532			`}`
533
534			`BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::INC_EdM(bxInstruction_c *i)`
535			`{`
536			`bx_address eaddr = BX_CPU_CALL_METHODR(i->ResolveModrm, (i));`
537
538			`Bit32u op1_32 = read_RMW_virtual_dword(i->seg(), eaddr);`
539			`op1_32++;`
540			`write_RMW_virtual_dword(op1_32);`
541
542			`SET_FLAGS_OSZAP_ADD_32(op1_32 - 1, 0, op1_32);`
543
544			`BX_NEXT_INSTR(i);`
545			`}`
546
547			`BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::DEC_EdM(bxInstruction_c *i)`
548			`{`
549			`bx_address eaddr = BX_CPU_CALL_METHODR(i->ResolveModrm, (i));`
550
551			`Bit32u op1_32 = read_RMW_virtual_dword(i->seg(), eaddr);`
552			`op1_32--;`
553			`write_RMW_virtual_dword(op1_32);`
554
555			`SET_FLAGS_OSZAP_SUB_32(op1_32 + 1, 0, op1_32);`
556
557			`BX_NEXT_INSTR(i);`
558			`}`
559
560			`BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::CMPXCHG_EdGdM(bxInstruction_c *i)`
561			`{`
562			`bx_address eaddr = BX_CPU_CALL_METHODR(i->ResolveModrm, (i));`
563
564			`Bit32u op1_32 = read_RMW_virtual_dword(i->seg(), eaddr);`
565			`Bit32u diff_32 = EAX - op1_32;`
566			`SET_FLAGS_OSZAPC_SUB_32(EAX, op1_32, diff_32);`
567
568			`if (diff_32 == 0) { // if accumulator == dest`
569			`// dest <-- src`
570			`write_RMW_virtual_dword(BX_READ_32BIT_REG(i->src()));`
571			`}`
572			`else {`
573			`// accumulator <-- dest`
574			`RAX = op1_32;`
575			`}`
576
577			`BX_NEXT_INSTR(i);`
578			`}`
579
580			`BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::CMPXCHG_EdGdR(bxInstruction_c *i)`
581			`{`
582			`Bit32u op1_32 = BX_READ_32BIT_REG(i->dst());`
583			`Bit32u diff_32 = EAX - op1_32;`
584			`SET_FLAGS_OSZAPC_SUB_32(EAX, op1_32, diff_32);`
585
586			`if (diff_32 == 0) { // if accumulator == dest`
587			`// dest <-- src`
588			`BX_WRITE_32BIT_REGZ(i->dst(), BX_READ_32BIT_REG(i->src()));`
589			`}`
590			`else {`
591			`// accumulator <-- dest`
592			`RAX = op1_32;`
593			`}`
594
595			`BX_NEXT_INSTR(i);`
596			`}`
597
598			`BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::CMPXCHG8B(bxInstruction_c *i)`
599			`{`
600			`bx_address eaddr = BX_CPU_CALL_METHODR(i->ResolveModrm, (i));`
601
602			`// check write permission for following write`
603			`Bit64u op1_64 = read_RMW_virtual_qword(i->seg(), eaddr);`
604			`Bit64u op2_64 = ((Bit64u) EDX << 32) \| EAX;`
605
606			`if (op1_64 == op2_64) { // if accumulator == dest`
607			`// dest <-- src (ECX:EBX)`
608			`op2_64 = ((Bit64u) ECX << 32) \| EBX;`
609			`write_RMW_virtual_qword(op2_64);`
610			`assert_ZF();`
611			`}`
612			`else {`
613			`// accumulator <-- dest`
614			`RAX = GET32L(op1_64);`
615			`RDX = GET32H(op1_64);`
616			`clear_ZF();`
617			`}`
618
619			`BX_NEXT_INSTR(i);`
620			`}`