OpenCores
URL https://opencores.org/ocsvn/ao486/ao486/trunk

Subversion Repositories ao486

[/] [ao486/] [trunk/] [bochs486/] [cpu/] [data_xfer32.cc] - Blame information for rev 2

Details | Compare with Previous | View Log

Line No. Rev Author Line
1 2 alfik 
/////////////////////////////////////////////////////////////////////////
2 
// $Id: data_xfer32.cc 11313 2012-08-05 13:52:40Z sshwarts $
3 
/////////////////////////////////////////////////////////////////////////
4 
//
5 
//  Copyright (C) 2001-2012  The Bochs Project
6 
//
7 
//  This library is free software; you can redistribute it and/or
8 
//  modify it under the terms of the GNU Lesser General Public
9 
//  License as published by the Free Software Foundation; either
10 
//  version 2 of the License, or (at your option) any later version.
11 
//
12 
//  This library is distributed in the hope that it will be useful,
13 
//  but WITHOUT ANY WARRANTY; without even the implied warranty of
14 
//  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
15 
//  Lesser General Public License for more details.
16 
//
17 
//  You should have received a copy of the GNU Lesser General Public
18 
//  License along with this library; if not, write to the Free Software
19 
//  Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA B 02110-1301 USA
20 
/////////////////////////////////////////////////////////////////////////
21 
 
22 
#define NEED_CPU_REG_SHORTCUTS 1
23 
#include "bochs.h"
24 
#include "cpu.h"
25 
#define LOG_THIS BX_CPU_THIS_PTR
26 
 
27 
BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::XCHG_ERXEAX(bxInstruction_c *i)
28 
{
29 
#if BX_SUPPORT_X86_64
30 
  if (i->dst() == 0) { // 'xchg eax, eax' is NOP even in 64-bit mode
31 
    BX_NEXT_INSTR(i);
32 
  }
33 
#endif
34 
 
35 
  Bit32u temp32 = EAX;
36 
  RAX = BX_READ_32BIT_REG(i->dst());
37 
  BX_WRITE_32BIT_REGZ(i->dst(), temp32);
38 
 
39 
  BX_NEXT_INSTR(i);
40 
}
41 
 
42 
BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::MOV_ERXId(bxInstruction_c *i)
43 
{
44 
  BX_WRITE_32BIT_REGZ(i->dst(), i->Id());
45 
 
46 
  BX_NEXT_INSTR(i);
47 
}
48 
 
49 
BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::MOV32_EdGdM(bxInstruction_c *i)
50 
{
51 
  Bit32u eaddr = (Bit32u) BX_CPU_CALL_METHODR(i->ResolveModrm, (i));
52 
 
53 
  write_virtual_dword_32(i->seg(), eaddr, BX_READ_32BIT_REG(i->src()));
54 
 
55 
  BX_NEXT_INSTR(i);
56 
}
57 
 
58 
BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::MOV32S_EdGdM(bxInstruction_c *i)
59 
{
60 
  Bit32u eaddr = (Bit32u) BX_CPU_CALL_METHODR(i->ResolveModrm, (i));
61 
 
62 
  stack_write_dword(eaddr, BX_READ_32BIT_REG(i->src()));
63 
 
64 
  BX_NEXT_INSTR(i);
65 
}
66 
 
67 
BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::MOV_GdEdR(bxInstruction_c *i)
68 
{
69 
  BX_WRITE_32BIT_REGZ(i->dst(), BX_READ_32BIT_REG(i->src()));
70 
 
71 
  BX_NEXT_INSTR(i);
72 
}
73 
 
74 
BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::MOV32_GdEdM(bxInstruction_c *i)
75 
{
76 
  Bit32u eaddr = (Bit32u) BX_CPU_CALL_METHODR(i->ResolveModrm, (i));
77 
  Bit32u val32 = read_virtual_dword_32(i->seg(), eaddr);
78 
 
79 
  BX_WRITE_32BIT_REGZ(i->dst(), val32);
80 
 
81 
  BX_NEXT_INSTR(i);
82 
}
83 
 
84 
BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::MOV32S_GdEdM(bxInstruction_c *i)
85 
{
86 
  Bit32u eaddr = (Bit32u) BX_CPU_CALL_METHODR(i->ResolveModrm, (i));
87 
  Bit32u val32 = stack_read_dword(eaddr);
88 
 
89 
  BX_WRITE_32BIT_REGZ(i->dst(), val32);
90 
 
91 
  BX_NEXT_INSTR(i);
92 
}
93 
 
94 
BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::LEA_GdM(bxInstruction_c *i)
95 
{
96 
  Bit32u eaddr = (Bit32u) BX_CPU_CALL_METHODR(i->ResolveModrm, (i));
97 
 
98 
  BX_WRITE_32BIT_REGZ(i->dst(), eaddr);
99 
 
100 
  BX_NEXT_INSTR(i);
101 
}
102 
 
103 
BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::MOV_EAXOd(bxInstruction_c *i)
104 
{
105 
  RAX = read_virtual_dword_32(i->seg(), i->Id());
106 
 
107 
  BX_NEXT_INSTR(i);
108 
}
109 
 
110 
BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::MOV_OdEAX(bxInstruction_c *i)
111 
{
112 
  write_virtual_dword_32(i->seg(), i->Id(), EAX);
113 
 
114 
  BX_NEXT_INSTR(i);
115 
}
116 
 
117 
BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::MOV_EdIdM(bxInstruction_c *i)
118 
{
119 
  bx_address eaddr = BX_CPU_CALL_METHODR(i->ResolveModrm, (i));
120 
 
121 
  write_virtual_dword(i->seg(), eaddr, i->Id());
122 
 
123 
  BX_NEXT_INSTR(i);
124 
}
125 
 
126 
BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::MOVZX_GdEbM(bxInstruction_c *i)
127 
{
128 
  bx_address eaddr = BX_CPU_CALL_METHODR(i->ResolveModrm, (i));
129 
 
130 
  Bit8u op2_8 = read_virtual_byte(i->seg(), eaddr);
131 
 
132 
  /* zero extend byte op2 into dword op1 */
133 
  BX_WRITE_32BIT_REGZ(i->dst(), (Bit32u) op2_8);
134 
 
135 
  BX_NEXT_INSTR(i);
136 
}
137 
 
138 
BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::MOVZX_GdEbR(bxInstruction_c *i)
139 
{
140 
  Bit8u op2_8 = BX_READ_8BIT_REGx(i->src(), i->extend8bitL());
141 
 
142 
  /* zero extend byte op2 into dword op1 */
143 
  BX_WRITE_32BIT_REGZ(i->dst(), (Bit32u) op2_8);
144 
 
145 
  BX_NEXT_INSTR(i);
146 
}
147 
 
148 
BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::MOVZX_GdEwM(bxInstruction_c *i)
149 
{
150 
  bx_address eaddr = BX_CPU_CALL_METHODR(i->ResolveModrm, (i));
151 
 
152 
  Bit16u op2_16 = read_virtual_word(i->seg(), eaddr);
153 
 
154 
  /* zero extend word op2 into dword op1 */
155 
  BX_WRITE_32BIT_REGZ(i->dst(), (Bit32u) op2_16);
156 
 
157 
  BX_NEXT_INSTR(i);
158 
}
159 
 
160 
BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::MOVZX_GdEwR(bxInstruction_c *i)
161 
{
162 
  Bit16u op2_16 = BX_READ_16BIT_REG(i->src());
163 
 
164 
  /* zero extend word op2 into dword op1 */
165 
  BX_WRITE_32BIT_REGZ(i->dst(), (Bit32u) op2_16);
166 
 
167 
  BX_NEXT_INSTR(i);
168 
}
169 
 
170 
BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::MOVSX_GdEbM(bxInstruction_c *i)
171 
{
172 
  bx_address eaddr = BX_CPU_CALL_METHODR(i->ResolveModrm, (i));
173 
 
174 
  Bit8u op2_8 = read_virtual_byte(i->seg(), eaddr);
175 
 
176 
  /* sign extend byte op2 into dword op1 */
177 
  BX_WRITE_32BIT_REGZ(i->dst(), (Bit8s) op2_8);
178 
 
179 
  BX_NEXT_INSTR(i);
180 
}
181 
 
182 
BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::MOVSX_GdEbR(bxInstruction_c *i)
183 
{
184 
  Bit8u op2_8 = BX_READ_8BIT_REGx(i->src(), i->extend8bitL());
185 
 
186 
  /* sign extend byte op2 into dword op1 */
187 
  BX_WRITE_32BIT_REGZ(i->dst(), (Bit8s) op2_8);
188 
 
189 
  BX_NEXT_INSTR(i);
190 
}
191 
 
192 
BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::MOVSX_GdEwM(bxInstruction_c *i)
193 
{
194 
  bx_address eaddr = BX_CPU_CALL_METHODR(i->ResolveModrm, (i));
195 
 
196 
  Bit16u op2_16 = read_virtual_word(i->seg(), eaddr);
197 
 
198 
  /* sign extend word op2 into dword op1 */
199 
  BX_WRITE_32BIT_REGZ(i->dst(), (Bit16s) op2_16);
200 
 
201 
  BX_NEXT_INSTR(i);
202 
}
203 
 
204 
BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::MOVSX_GdEwR(bxInstruction_c *i)
205 
{
206 
  Bit16u op2_16 = BX_READ_16BIT_REG(i->src());
207 
 
208 
  /* sign extend word op2 into dword op1 */
209 
  BX_WRITE_32BIT_REGZ(i->dst(), (Bit16s) op2_16);
210 
 
211 
  BX_NEXT_INSTR(i);
212 
}
213 
 
214 
BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::XCHG_EdGdM(bxInstruction_c *i)
215 
{
216 
  bx_address eaddr = BX_CPU_CALL_METHODR(i->ResolveModrm, (i));
217 
 
218 
  Bit32u op1_32 = read_RMW_virtual_dword(i->seg(), eaddr);
219 
  Bit32u op2_32 = BX_READ_32BIT_REG(i->src());
220 
  write_RMW_virtual_dword(op2_32);
221 
  BX_WRITE_32BIT_REGZ(i->src(), op1_32);
222 
 
223 
  BX_NEXT_INSTR(i);
224 
}
225 
 
226 
BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::XCHG_EdGdR(bxInstruction_c *i)
227 
{
228 
  Bit32u op1_32 = BX_READ_32BIT_REG(i->dst());
229 
  Bit32u op2_32 = BX_READ_32BIT_REG(i->src());
230 
 
231 
  BX_WRITE_32BIT_REGZ(i->src(), op1_32);
232 
  BX_WRITE_32BIT_REGZ(i->dst(), op2_32);
233 
 
234 
  BX_NEXT_INSTR(i);
235 
}
236 
 
237 
// Note: CMOV accesses a memory source operand (read), regardless
238 
//       of whether condition is true or not.  Thus, exceptions may
239 
//       occur even if the MOV does not take place.
240 
 
241 
BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::CMOVO_GdEdR(bxInstruction_c *i)
242 
{
243 
  if (get_OF())
244 
    BX_WRITE_32BIT_REGZ(i->dst(), BX_READ_32BIT_REG(i->src()));
245 
 
246 
  BX_CLEAR_64BIT_HIGH(i->dst()); // always clear upper part of the register
247 
 
248 
  BX_NEXT_INSTR(i);
249 
}
250 
 
251 
BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::CMOVNO_GdEdR(bxInstruction_c *i)
252 
{
253 
  if (!get_OF())
254 
    BX_WRITE_32BIT_REGZ(i->dst(), BX_READ_32BIT_REG(i->src()));
255 
 
256 
  BX_CLEAR_64BIT_HIGH(i->dst()); // always clear upper part of the register
257 
 
258 
  BX_NEXT_INSTR(i);
259 
}
260 
 
261 
BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::CMOVB_GdEdR(bxInstruction_c *i)
262 
{
263 
  if (get_CF())
264 
    BX_WRITE_32BIT_REGZ(i->dst(), BX_READ_32BIT_REG(i->src()));
265 
 
266 
  BX_CLEAR_64BIT_HIGH(i->dst()); // always clear upper part of the register
267 
 
268 
  BX_NEXT_INSTR(i);
269 
}
270 
 
271 
BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::CMOVNB_GdEdR(bxInstruction_c *i)
272 
{
273 
  if (!get_CF())
274 
    BX_WRITE_32BIT_REGZ(i->dst(), BX_READ_32BIT_REG(i->src()));
275 
 
276 
  BX_CLEAR_64BIT_HIGH(i->dst()); // always clear upper part of the register
277 
 
278 
  BX_NEXT_INSTR(i);
279 
}
280 
 
281 
BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::CMOVZ_GdEdR(bxInstruction_c *i)
282 
{
283 
  if (get_ZF())
284 
    BX_WRITE_32BIT_REGZ(i->dst(), BX_READ_32BIT_REG(i->src()));
285 
 
286 
  BX_CLEAR_64BIT_HIGH(i->dst()); // always clear upper part of the register
287 
 
288 
  BX_NEXT_INSTR(i);
289 
}
290 
 
291 
BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::CMOVNZ_GdEdR(bxInstruction_c *i)
292 
{
293 
  if (!get_ZF())
294 
    BX_WRITE_32BIT_REGZ(i->dst(), BX_READ_32BIT_REG(i->src()));
295 
 
296 
  BX_CLEAR_64BIT_HIGH(i->dst()); // always clear upper part of the register
297 
 
298 
  BX_NEXT_INSTR(i);
299 
}
300 
 
301 
BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::CMOVBE_GdEdR(bxInstruction_c *i)
302 
{
303 
  if (get_CF() || get_ZF())
304 
    BX_WRITE_32BIT_REGZ(i->dst(), BX_READ_32BIT_REG(i->src()));
305 
 
306 
  BX_CLEAR_64BIT_HIGH(i->dst()); // always clear upper part of the register
307 
 
308 
  BX_NEXT_INSTR(i);
309 
}
310 
 
311 
BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::CMOVNBE_GdEdR(bxInstruction_c *i)
312 
{
313 
  if (! (get_CF() || get_ZF()))
314 
    BX_WRITE_32BIT_REGZ(i->dst(), BX_READ_32BIT_REG(i->src()));
315 
 
316 
  BX_CLEAR_64BIT_HIGH(i->dst()); // always clear upper part of the register
317 
 
318 
  BX_NEXT_INSTR(i);
319 
}
320 
 
321 
BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::CMOVS_GdEdR(bxInstruction_c *i)
322 
{
323 
  if (get_SF())
324 
    BX_WRITE_32BIT_REGZ(i->dst(), BX_READ_32BIT_REG(i->src()));
325 
 
326 
  BX_CLEAR_64BIT_HIGH(i->dst()); // always clear upper part of the register
327 
 
328 
  BX_NEXT_INSTR(i);
329 
}
330 
 
331 
BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::CMOVNS_GdEdR(bxInstruction_c *i)
332 
{
333 
  if (!get_SF())
334 
    BX_WRITE_32BIT_REGZ(i->dst(), BX_READ_32BIT_REG(i->src()));
335 
 
336 
  BX_CLEAR_64BIT_HIGH(i->dst()); // always clear upper part of the register
337 
 
338 
  BX_NEXT_INSTR(i);
339 
}
340 
 
341 
BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::CMOVP_GdEdR(bxInstruction_c *i)
342 
{
343 
  if (get_PF())
344 
    BX_WRITE_32BIT_REGZ(i->dst(), BX_READ_32BIT_REG(i->src()));
345 
 
346 
  BX_CLEAR_64BIT_HIGH(i->dst()); // always clear upper part of the register
347 
 
348 
  BX_NEXT_INSTR(i);
349 
}
350 
 
351 
BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::CMOVNP_GdEdR(bxInstruction_c *i)
352 
{
353 
  if (!get_PF())
354 
    BX_WRITE_32BIT_REGZ(i->dst(), BX_READ_32BIT_REG(i->src()));
355 
 
356 
  BX_CLEAR_64BIT_HIGH(i->dst()); // always clear upper part of the register
357 
 
358 
  BX_NEXT_INSTR(i);
359 
}
360 
 
361 
BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::CMOVL_GdEdR(bxInstruction_c *i)
362 
{
363 
  if (getB_SF() != getB_OF())
364 
    BX_WRITE_32BIT_REGZ(i->dst(), BX_READ_32BIT_REG(i->src()));
365 
 
366 
  BX_CLEAR_64BIT_HIGH(i->dst()); // always clear upper part of the register
367 
 
368 
  BX_NEXT_INSTR(i);
369 
}
370 
 
371 
BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::CMOVNL_GdEdR(bxInstruction_c *i)
372 
{
373 
  if (getB_SF() == getB_OF())
374 
    BX_WRITE_32BIT_REGZ(i->dst(), BX_READ_32BIT_REG(i->src()));
375 
 
376 
  BX_CLEAR_64BIT_HIGH(i->dst()); // always clear upper part of the register
377 
 
378 
  BX_NEXT_INSTR(i);
379 
}
380 
 
381 
BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::CMOVLE_GdEdR(bxInstruction_c *i)
382 
{
383 
  if (get_ZF() || (getB_SF() != getB_OF()))
384 
    BX_WRITE_32BIT_REGZ(i->dst(), BX_READ_32BIT_REG(i->src()));
385 
 
386 
  BX_CLEAR_64BIT_HIGH(i->dst()); // always clear upper part of the register
387 
 
388 
  BX_NEXT_INSTR(i);
389 
}
390 
 
391 
BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::CMOVNLE_GdEdR(bxInstruction_c *i)
392 
{
393 
  if (! get_ZF() && (getB_SF() == getB_OF()))
394 
    BX_WRITE_32BIT_REGZ(i->dst(), BX_READ_32BIT_REG(i->src()));
395 
 
396 
  BX_CLEAR_64BIT_HIGH(i->dst()); // always clear upper part of the register
397 
 
398 
  BX_NEXT_INSTR(i);
399 
}

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.