OpenCores
URL https://opencores.org/ocsvn/ao486/ao486/trunk

Subversion Repositories ao486

[/] [ao486/] [trunk/] [bochs486/] [cpu/] [logical16.cc] - Blame information for rev 2

Details | Compare with Previous | View Log

Line No. Rev Author Line
1 2 alfik 
/////////////////////////////////////////////////////////////////////////
2 
// $Id: logical16.cc 11313 2012-08-05 13:52:40Z sshwarts $
3 
/////////////////////////////////////////////////////////////////////////
4 
//
5 
//  Copyright (C) 2001-2012  The Bochs Project
6 
//
7 
//  This library is free software; you can redistribute it and/or
8 
//  modify it under the terms of the GNU Lesser General Public
9 
//  License as published by the Free Software Foundation; either
10 
//  version 2 of the License, or (at your option) any later version.
11 
//
12 
//  This library is distributed in the hope that it will be useful,
13 
//  but WITHOUT ANY WARRANTY; without even the implied warranty of
14 
//  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
15 
//  Lesser General Public License for more details.
16 
//
17 
//  You should have received a copy of the GNU Lesser General Public
18 
//  License along with this library; if not, write to the Free Software
19 
//  Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA B 02110-1301 USA
20 
/////////////////////////////////////////////////////////////////////////
21 
 
22 
#define NEED_CPU_REG_SHORTCUTS 1
23 
#include "bochs.h"
24 
#include "cpu.h"
25 
#define LOG_THIS BX_CPU_THIS_PTR
26 
 
27 
BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::XOR_EwGwM(bxInstruction_c *i)
28 
{
29 
  Bit16u op1_16, op2_16;
30 
 
31 
  bx_address eaddr = BX_CPU_CALL_METHODR(i->ResolveModrm, (i));
32 
 
33 
  op1_16 = read_RMW_virtual_word(i->seg(), eaddr);
34 
  op2_16 = BX_READ_16BIT_REG(i->src());
35 
  op1_16 ^= op2_16;
36 
  write_RMW_virtual_word(op1_16);
37 
 
38 
  SET_FLAGS_OSZAPC_LOGIC_16(op1_16);
39 
 
40 
  BX_NEXT_INSTR(i);
41 
}
42 
 
43 
BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::XOR_GwEwR(bxInstruction_c *i)
44 
{
45 
  Bit16u op1_16, op2_16;
46 
 
47 
  op1_16 = BX_READ_16BIT_REG(i->dst());
48 
  op2_16 = BX_READ_16BIT_REG(i->src());
49 
  op1_16 ^= op2_16;
50 
  BX_WRITE_16BIT_REG(i->dst(), op1_16);
51 
 
52 
  SET_FLAGS_OSZAPC_LOGIC_16(op1_16);
53 
 
54 
  BX_NEXT_INSTR(i);
55 
}
56 
 
57 
BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::XOR_GwEwM(bxInstruction_c *i)
58 
{
59 
  Bit16u op1_16, op2_16;
60 
 
61 
  bx_address eaddr = BX_CPU_CALL_METHODR(i->ResolveModrm, (i));
62 
 
63 
  op1_16 = BX_READ_16BIT_REG(i->dst());
64 
  op2_16 = read_virtual_word(i->seg(), eaddr);
65 
  op1_16 ^= op2_16;
66 
  BX_WRITE_16BIT_REG(i->dst(), op1_16);
67 
 
68 
  SET_FLAGS_OSZAPC_LOGIC_16(op1_16);
69 
 
70 
  BX_NEXT_INSTR(i);
71 
}
72 
 
73 
BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::XOR_EwIwM(bxInstruction_c *i)
74 
{
75 
  Bit16u op1_16;
76 
 
77 
  bx_address eaddr = BX_CPU_CALL_METHODR(i->ResolveModrm, (i));
78 
 
79 
  op1_16 = read_RMW_virtual_word(i->seg(), eaddr);
80 
  op1_16 ^= i->Iw();
81 
  write_RMW_virtual_word(op1_16);
82 
 
83 
  SET_FLAGS_OSZAPC_LOGIC_16(op1_16);
84 
 
85 
  BX_NEXT_INSTR(i);
86 
}
87 
 
88 
BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::XOR_EwIwR(bxInstruction_c *i)
89 
{
90 
  Bit16u op1_16 = BX_READ_16BIT_REG(i->dst());
91 
  op1_16 ^= i->Iw();
92 
  BX_WRITE_16BIT_REG(i->dst(), op1_16);
93 
 
94 
  SET_FLAGS_OSZAPC_LOGIC_16(op1_16);
95 
 
96 
  BX_NEXT_INSTR(i);
97 
}
98 
 
99 
BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::OR_EwIwM(bxInstruction_c *i)
100 
{
101 
  Bit16u op1_16;
102 
 
103 
  bx_address eaddr = BX_CPU_CALL_METHODR(i->ResolveModrm, (i));
104 
 
105 
  op1_16 = read_RMW_virtual_word(i->seg(), eaddr);
106 
  op1_16 |= i->Iw();
107 
  write_RMW_virtual_word(op1_16);
108 
 
109 
  SET_FLAGS_OSZAPC_LOGIC_16(op1_16);
110 
 
111 
  BX_NEXT_INSTR(i);
112 
}
113 
 
114 
BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::OR_EwIwR(bxInstruction_c *i)
115 
{
116 
  Bit16u op1_16 = BX_READ_16BIT_REG(i->dst());
117 
  op1_16 |= i->Iw();
118 
  BX_WRITE_16BIT_REG(i->dst(), op1_16);
119 
 
120 
  SET_FLAGS_OSZAPC_LOGIC_16(op1_16);
121 
 
122 
  BX_NEXT_INSTR(i);
123 
}
124 
 
125 
BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::NOT_EwM(bxInstruction_c *i)
126 
{
127 
  bx_address eaddr = BX_CPU_CALL_METHODR(i->ResolveModrm, (i));
128 
 
129 
  Bit16u op1_16 = read_RMW_virtual_word(i->seg(), eaddr);
130 
  op1_16 = ~op1_16;
131 
  write_RMW_virtual_word(op1_16);
132 
 
133 
  BX_NEXT_INSTR(i);
134 
}
135 
 
136 
BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::NOT_EwR(bxInstruction_c *i)
137 
{
138 
  Bit16u op1_16 = BX_READ_16BIT_REG(i->dst());
139 
  op1_16 = ~op1_16;
140 
  BX_WRITE_16BIT_REG(i->dst(), op1_16);
141 
 
142 
  BX_NEXT_INSTR(i);
143 
}
144 
 
145 
BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::OR_EwGwM(bxInstruction_c *i)
146 
{
147 
  Bit16u op1_16, op2_16;
148 
 
149 
  bx_address eaddr = BX_CPU_CALL_METHODR(i->ResolveModrm, (i));
150 
 
151 
  op1_16 = read_RMW_virtual_word(i->seg(), eaddr);
152 
  op2_16 = BX_READ_16BIT_REG(i->src());
153 
  op1_16 |= op2_16;
154 
  write_RMW_virtual_word(op1_16);
155 
 
156 
  SET_FLAGS_OSZAPC_LOGIC_16(op1_16);
157 
 
158 
  BX_NEXT_INSTR(i);
159 
}
160 
 
161 
BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::OR_GwEwR(bxInstruction_c *i)
162 
{
163 
  Bit16u op1_16, op2_16;
164 
 
165 
  op1_16 = BX_READ_16BIT_REG(i->dst());
166 
  op2_16 = BX_READ_16BIT_REG(i->src());
167 
  op1_16 |= op2_16;
168 
  BX_WRITE_16BIT_REG(i->dst(), op1_16);
169 
 
170 
  SET_FLAGS_OSZAPC_LOGIC_16(op1_16);
171 
 
172 
  BX_NEXT_INSTR(i);
173 
}
174 
 
175 
BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::OR_GwEwM(bxInstruction_c *i)
176 
{
177 
  Bit16u op1_16, op2_16;
178 
 
179 
  bx_address eaddr = BX_CPU_CALL_METHODR(i->ResolveModrm, (i));
180 
 
181 
  op1_16 = BX_READ_16BIT_REG(i->dst());
182 
  op2_16 = read_virtual_word(i->seg(), eaddr);
183 
  op1_16 |= op2_16;
184 
  BX_WRITE_16BIT_REG(i->dst(), op1_16);
185 
 
186 
  SET_FLAGS_OSZAPC_LOGIC_16(op1_16);
187 
 
188 
  BX_NEXT_INSTR(i);
189 
}
190 
 
191 
BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::AND_EwGwM(bxInstruction_c *i)
192 
{
193 
  Bit16u op1_16, op2_16;
194 
 
195 
  bx_address eaddr = BX_CPU_CALL_METHODR(i->ResolveModrm, (i));
196 
 
197 
  op1_16 = read_RMW_virtual_word(i->seg(), eaddr);
198 
  op2_16 = BX_READ_16BIT_REG(i->src());
199 
  op1_16 &= op2_16;
200 
  write_RMW_virtual_word(op1_16);
201 
 
202 
  SET_FLAGS_OSZAPC_LOGIC_16(op1_16);
203 
 
204 
  BX_NEXT_INSTR(i);
205 
}
206 
 
207 
BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::AND_GwEwR(bxInstruction_c *i)
208 
{
209 
  Bit16u op1_16, op2_16;
210 
 
211 
  op1_16 = BX_READ_16BIT_REG(i->dst());
212 
  op2_16 = BX_READ_16BIT_REG(i->src());
213 
  op1_16 &= op2_16;
214 
  BX_WRITE_16BIT_REG(i->dst(), op1_16);
215 
 
216 
  SET_FLAGS_OSZAPC_LOGIC_16(op1_16);
217 
 
218 
  BX_NEXT_INSTR(i);
219 
}
220 
 
221 
BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::AND_GwEwM(bxInstruction_c *i)
222 
{
223 
  Bit16u op1_16, op2_16;
224 
 
225 
  bx_address eaddr = BX_CPU_CALL_METHODR(i->ResolveModrm, (i));
226 
 
227 
  op1_16 = BX_READ_16BIT_REG(i->dst());
228 
  op2_16 = read_virtual_word(i->seg(), eaddr);
229 
  op1_16 &= op2_16;
230 
  BX_WRITE_16BIT_REG(i->dst(), op1_16);
231 
 
232 
  SET_FLAGS_OSZAPC_LOGIC_16(op1_16);
233 
 
234 
  BX_NEXT_INSTR(i);
235 
}
236 
 
237 
BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::AND_EwIwM(bxInstruction_c *i)
238 
{
239 
  Bit16u op1_16;
240 
 
241 
  bx_address eaddr = BX_CPU_CALL_METHODR(i->ResolveModrm, (i));
242 
 
243 
  op1_16 = read_RMW_virtual_word(i->seg(), eaddr);
244 
  op1_16 &= i->Iw();
245 
  write_RMW_virtual_word(op1_16);
246 
 
247 
  SET_FLAGS_OSZAPC_LOGIC_16(op1_16);
248 
 
249 
  BX_NEXT_INSTR(i);
250 
}
251 
 
252 
BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::AND_EwIwR(bxInstruction_c *i)
253 
{
254 
  Bit16u op1_16 = BX_READ_16BIT_REG(i->dst());
255 
  op1_16 &= i->Iw();
256 
  BX_WRITE_16BIT_REG(i->dst(), op1_16);
257 
 
258 
  SET_FLAGS_OSZAPC_LOGIC_16(op1_16);
259 
 
260 
  BX_NEXT_INSTR(i);
261 
}
262 
 
263 
BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::TEST_EwGwR(bxInstruction_c *i)
264 
{
265 
  Bit16u op1_16, op2_16;
266 
 
267 
  op1_16 = BX_READ_16BIT_REG(i->dst());
268 
  op2_16 = BX_READ_16BIT_REG(i->src());
269 
  op1_16 &= op2_16;
270 
  SET_FLAGS_OSZAPC_LOGIC_16(op1_16);
271 
 
272 
  BX_NEXT_INSTR(i);
273 
}
274 
 
275 
BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::TEST_EwGwM(bxInstruction_c *i)
276 
{
277 
  Bit16u op1_16, op2_16;
278 
 
279 
  bx_address eaddr = BX_CPU_CALL_METHODR(i->ResolveModrm, (i));
280 
 
281 
  op1_16 = read_virtual_word(i->seg(), eaddr);
282 
  op2_16 = BX_READ_16BIT_REG(i->src());
283 
  op1_16 &= op2_16;
284 
  SET_FLAGS_OSZAPC_LOGIC_16(op1_16);
285 
 
286 
  BX_NEXT_INSTR(i);
287 
}
288 
 
289 
BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::TEST_EwIwR(bxInstruction_c *i)
290 
{
291 
  Bit16u op1_16 = BX_READ_16BIT_REG(i->dst());
292 
  op1_16 &= i->Iw();
293 
  SET_FLAGS_OSZAPC_LOGIC_16(op1_16);
294 
 
295 
  BX_NEXT_INSTR(i);
296 
}
297 
 
298 
BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::TEST_EwIwM(bxInstruction_c *i)
299 
{
300 
  bx_address eaddr = BX_CPU_CALL_METHODR(i->ResolveModrm, (i));
301 
 
302 
  Bit16u op1_16 = read_virtual_word(i->seg(), eaddr);
303 
  op1_16 &= i->Iw();
304 
  SET_FLAGS_OSZAPC_LOGIC_16(op1_16);
305 
 
306 
  BX_NEXT_INSTR(i);
307 
}

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.