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[/] [ao486/] [trunk/] [bochs486/] [cpu/] [logical32.cc] - Blame information for rev 2

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1 2 alfik 
/////////////////////////////////////////////////////////////////////////
2 
// $Id: logical32.cc 11313 2012-08-05 13:52:40Z sshwarts $
3 
/////////////////////////////////////////////////////////////////////////
4 
//
5 
//  Copyright (C) 2001-2012  The Bochs Project
6 
//
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//  This library is free software; you can redistribute it and/or
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//  modify it under the terms of the GNU Lesser General Public
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//  License as published by the Free Software Foundation; either
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//  version 2 of the License, or (at your option) any later version.
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//
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//  This library is distributed in the hope that it will be useful,
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//  but WITHOUT ANY WARRANTY; without even the implied warranty of
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//  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
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//  Lesser General Public License for more details.
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//
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//  You should have received a copy of the GNU Lesser General Public
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//  License along with this library; if not, write to the Free Software
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//  Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA B 02110-1301 USA
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/////////////////////////////////////////////////////////////////////////
21 
 
22 
#define NEED_CPU_REG_SHORTCUTS 1
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#include "bochs.h"
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#include "cpu.h"
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#define LOG_THIS BX_CPU_THIS_PTR
26 
 
27 
BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::XOR_EdGdM(bxInstruction_c *i)
28 
{
29 
  Bit32u op1_32, op2_32;
30 
 
31 
  bx_address eaddr = BX_CPU_CALL_METHODR(i->ResolveModrm, (i));
32 
 
33 
  op1_32 = read_RMW_virtual_dword(i->seg(), eaddr);
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  op2_32 = BX_READ_32BIT_REG(i->src());
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  op1_32 ^= op2_32;
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  write_RMW_virtual_dword(op1_32);
37 
 
38 
  SET_FLAGS_OSZAPC_LOGIC_32(op1_32);
39 
 
40 
  BX_NEXT_INSTR(i);
41 
}
42 
 
43 
BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::XOR_GdEdR(bxInstruction_c *i)
44 
{
45 
  Bit32u op1_32, op2_32;
46 
 
47 
  op1_32 = BX_READ_32BIT_REG(i->dst());
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  op2_32 = BX_READ_32BIT_REG(i->src());
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  op1_32 ^= op2_32;
50 
  BX_WRITE_32BIT_REGZ(i->dst(), op1_32);
51 
 
52 
  SET_FLAGS_OSZAPC_LOGIC_32(op1_32);
53 
 
54 
  BX_NEXT_INSTR(i);
55 
}
56 
 
57 
BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::XOR_GdEdM(bxInstruction_c *i)
58 
{
59 
  Bit32u op1_32, op2_32;
60 
 
61 
  bx_address eaddr = BX_CPU_CALL_METHODR(i->ResolveModrm, (i));
62 
 
63 
  op1_32 = BX_READ_32BIT_REG(i->dst());
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  op2_32 = read_virtual_dword(i->seg(), eaddr);
65 
  op1_32 ^= op2_32;
66 
  BX_WRITE_32BIT_REGZ(i->dst(), op1_32);
67 
 
68 
  SET_FLAGS_OSZAPC_LOGIC_32(op1_32);
69 
 
70 
  BX_NEXT_INSTR(i);
71 
}
72 
 
73 
BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::XOR_EdIdM(bxInstruction_c *i)
74 
{
75 
  Bit32u op1_32;
76 
 
77 
  bx_address eaddr = BX_CPU_CALL_METHODR(i->ResolveModrm, (i));
78 
 
79 
  op1_32 = read_RMW_virtual_dword(i->seg(), eaddr);
80 
  op1_32 ^= i->Id();
81 
  write_RMW_virtual_dword(op1_32);
82 
 
83 
  SET_FLAGS_OSZAPC_LOGIC_32(op1_32);
84 
 
85 
  BX_NEXT_INSTR(i);
86 
}
87 
 
88 
BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::XOR_EdIdR(bxInstruction_c *i)
89 
{
90 
  Bit32u op1_32 = BX_READ_32BIT_REG(i->dst());
91 
  op1_32 ^= i->Id();
92 
  BX_WRITE_32BIT_REGZ(i->dst(), op1_32);
93 
 
94 
  SET_FLAGS_OSZAPC_LOGIC_32(op1_32);
95 
 
96 
  BX_NEXT_INSTR(i);
97 
}
98 
 
99 
BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::OR_EdIdM(bxInstruction_c *i)
100 
{
101 
  Bit32u op1_32;
102 
 
103 
  bx_address eaddr = BX_CPU_CALL_METHODR(i->ResolveModrm, (i));
104 
 
105 
  op1_32 = read_RMW_virtual_dword(i->seg(), eaddr);
106 
  op1_32 |= i->Id();
107 
  write_RMW_virtual_dword(op1_32);
108 
 
109 
  SET_FLAGS_OSZAPC_LOGIC_32(op1_32);
110 
 
111 
  BX_NEXT_INSTR(i);
112 
}
113 
 
114 
BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::OR_EdIdR(bxInstruction_c *i)
115 
{
116 
  Bit32u op1_32 = BX_READ_32BIT_REG(i->dst());
117 
  op1_32 |= i->Id();
118 
  BX_WRITE_32BIT_REGZ(i->dst(), op1_32);
119 
 
120 
  SET_FLAGS_OSZAPC_LOGIC_32(op1_32);
121 
 
122 
  BX_NEXT_INSTR(i);
123 
}
124 
 
125 
BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::NOT_EdM(bxInstruction_c *i)
126 
{
127 
  bx_address eaddr = BX_CPU_CALL_METHODR(i->ResolveModrm, (i));
128 
 
129 
  Bit32u op1_32 = read_RMW_virtual_dword(i->seg(), eaddr);
130 
  op1_32 = ~op1_32;
131 
  write_RMW_virtual_dword(op1_32);
132 
 
133 
  BX_NEXT_INSTR(i);
134 
}
135 
 
136 
BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::NOT_EdR(bxInstruction_c *i)
137 
{
138 
  Bit32u op1_32 = BX_READ_32BIT_REG(i->dst());
139 
  op1_32 = ~op1_32;
140 
  BX_WRITE_32BIT_REGZ(i->dst(), op1_32);
141 
 
142 
  BX_NEXT_INSTR(i);
143 
}
144 
 
145 
BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::OR_EdGdM(bxInstruction_c *i)
146 
{
147 
  Bit32u op1_32, op2_32;
148 
 
149 
  bx_address eaddr = BX_CPU_CALL_METHODR(i->ResolveModrm, (i));
150 
 
151 
  op1_32 = read_RMW_virtual_dword(i->seg(), eaddr);
152 
  op2_32 = BX_READ_32BIT_REG(i->src());
153 
  op1_32 |= op2_32;
154 
  write_RMW_virtual_dword(op1_32);
155 
 
156 
  SET_FLAGS_OSZAPC_LOGIC_32(op1_32);
157 
 
158 
  BX_NEXT_INSTR(i);
159 
}
160 
 
161 
BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::OR_GdEdR(bxInstruction_c *i)
162 
{
163 
  Bit32u op1_32, op2_32;
164 
 
165 
  op1_32 = BX_READ_32BIT_REG(i->dst());
166 
  op2_32 = BX_READ_32BIT_REG(i->src());
167 
  op1_32 |= op2_32;
168 
  BX_WRITE_32BIT_REGZ(i->dst(), op1_32);
169 
 
170 
  SET_FLAGS_OSZAPC_LOGIC_32(op1_32);
171 
 
172 
  BX_NEXT_INSTR(i);
173 
}
174 
 
175 
BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::OR_GdEdM(bxInstruction_c *i)
176 
{
177 
  Bit32u op1_32, op2_32;
178 
 
179 
  bx_address eaddr = BX_CPU_CALL_METHODR(i->ResolveModrm, (i));
180 
 
181 
  op1_32 = BX_READ_32BIT_REG(i->dst());
182 
  op2_32 = read_virtual_dword(i->seg(), eaddr);
183 
  op1_32 |= op2_32;
184 
  BX_WRITE_32BIT_REGZ(i->dst(), op1_32);
185 
 
186 
  SET_FLAGS_OSZAPC_LOGIC_32(op1_32);
187 
 
188 
  BX_NEXT_INSTR(i);
189 
}
190 
 
191 
BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::AND_EdGdM(bxInstruction_c *i)
192 
{
193 
  Bit32u op1_32, op2_32;
194 
 
195 
  bx_address eaddr = BX_CPU_CALL_METHODR(i->ResolveModrm, (i));
196 
 
197 
  op1_32 = read_RMW_virtual_dword(i->seg(), eaddr);
198 
  op2_32 = BX_READ_32BIT_REG(i->src());
199 
  op1_32 &= op2_32;
200 
  write_RMW_virtual_dword(op1_32);
201 
 
202 
  SET_FLAGS_OSZAPC_LOGIC_32(op1_32);
203 
 
204 
  BX_NEXT_INSTR(i);
205 
}
206 
 
207 
BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::AND_GdEdR(bxInstruction_c *i)
208 
{
209 
  Bit32u op1_32, op2_32;
210 
 
211 
  op1_32 = BX_READ_32BIT_REG(i->dst());
212 
  op2_32 = BX_READ_32BIT_REG(i->src());
213 
  op1_32 &= op2_32;
214 
  BX_WRITE_32BIT_REGZ(i->dst(), op1_32);
215 
 
216 
  SET_FLAGS_OSZAPC_LOGIC_32(op1_32);
217 
 
218 
  BX_NEXT_INSTR(i);
219 
}
220 
 
221 
BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::AND_GdEdM(bxInstruction_c *i)
222 
{
223 
  Bit32u op1_32, op2_32;
224 
 
225 
  bx_address eaddr = BX_CPU_CALL_METHODR(i->ResolveModrm, (i));
226 
 
227 
  op1_32 = BX_READ_32BIT_REG(i->dst());
228 
  op2_32 = read_virtual_dword(i->seg(), eaddr);
229 
  op1_32 &= op2_32;
230 
  BX_WRITE_32BIT_REGZ(i->dst(), op1_32);
231 
 
232 
  SET_FLAGS_OSZAPC_LOGIC_32(op1_32);
233 
 
234 
  BX_NEXT_INSTR(i);
235 
}
236 
 
237 
BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::AND_EdIdM(bxInstruction_c *i)
238 
{
239 
  Bit32u op1_32;
240 
 
241 
  bx_address eaddr = BX_CPU_CALL_METHODR(i->ResolveModrm, (i));
242 
 
243 
  op1_32 = read_RMW_virtual_dword(i->seg(), eaddr);
244 
  op1_32 &= i->Id();
245 
  write_RMW_virtual_dword(op1_32);
246 
 
247 
  SET_FLAGS_OSZAPC_LOGIC_32(op1_32);
248 
 
249 
  BX_NEXT_INSTR(i);
250 
}
251 
 
252 
BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::AND_EdIdR(bxInstruction_c *i)
253 
{
254 
  Bit32u op1_32 = BX_READ_32BIT_REG(i->dst());
255 
  op1_32 &= i->Id();
256 
  BX_WRITE_32BIT_REGZ(i->dst(), op1_32);
257 
 
258 
  SET_FLAGS_OSZAPC_LOGIC_32(op1_32);
259 
 
260 
  BX_NEXT_INSTR(i);
261 
}
262 
 
263 
BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::TEST_EdGdR(bxInstruction_c *i)
264 
{
265 
  Bit32u op1_32, op2_32;
266 
 
267 
  op1_32 = BX_READ_32BIT_REG(i->dst());
268 
  op2_32 = BX_READ_32BIT_REG(i->src());
269 
  op1_32 &= op2_32;
270 
 
271 
  SET_FLAGS_OSZAPC_LOGIC_32(op1_32);
272 
 
273 
  BX_NEXT_INSTR(i);
274 
}
275 
 
276 
BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::TEST_EdGdM(bxInstruction_c *i)
277 
{
278 
  Bit32u op1_32, op2_32;
279 
 
280 
  bx_address eaddr = BX_CPU_CALL_METHODR(i->ResolveModrm, (i));
281 
 
282 
  op1_32 = read_virtual_dword(i->seg(), eaddr);
283 
  op2_32 = BX_READ_32BIT_REG(i->src());
284 
  op1_32 &= op2_32;
285 
 
286 
  SET_FLAGS_OSZAPC_LOGIC_32(op1_32);
287 
 
288 
  BX_NEXT_INSTR(i);
289 
}
290 
 
291 
BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::TEST_EdIdR(bxInstruction_c *i)
292 
{
293 
  Bit32u op1_32 = BX_READ_32BIT_REG(i->dst());
294 
  op1_32 &= i->Id();
295 
  SET_FLAGS_OSZAPC_LOGIC_32(op1_32);
296 
 
297 
  BX_NEXT_INSTR(i);
298 
}
299 
 
300 
BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::TEST_EdIdM(bxInstruction_c *i)
301 
{
302 
  bx_address eaddr = BX_CPU_CALL_METHODR(i->ResolveModrm, (i));
303 
 
304 
  Bit32u op1_32 = read_virtual_dword(i->seg(), eaddr);
305 
  op1_32 &= i->Id();
306 
  SET_FLAGS_OSZAPC_LOGIC_32(op1_32);
307 
 
308 
  BX_NEXT_INSTR(i);
309 
}

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