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[/] [ao486/] [trunk/] [rtl/] [ao486/] [autogen/] [microcode_commands.v] - Blame information for rev 2

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Line No. Rev Author Line
1 2 alfik 
//======================================================== conditions
2 
wire cond_0 = mc_cmd == `CMD_XADD && mc_cmdex_last == `CMDEX_XADD_FIRST;
3 
wire cond_1 = mc_cmd == `CMD_CALL && mc_cmdex_last == `CMDEX_CALL_Ev_STEP_0;
4 
wire cond_2 = mc_cmd == `CMD_CALL && mc_cmdex_last == `CMDEX_CALL_Jv_STEP_0;
5 
wire cond_3 = mc_cmd == `CMD_CALL && mc_cmdex_last == `CMDEX_CALL_Ep_STEP_0;
6 
wire cond_4 = mc_cmd == `CMD_CALL && mc_cmdex_last == `CMDEX_CALL_Ap_STEP_0;
7 
wire cond_5 = mc_cmd == `CMD_CALL && (mc_cmdex_last == `CMDEX_CALL_Ep_STEP_1 || mc_cmdex_last == `CMDEX_CALL_Ap_STEP_1) && (real_mode || v8086_mode);
8 
wire cond_6 = mc_cmd == `CMD_CALL && mc_cmdex_last == `CMDEX_CALL_real_v8086_STEP_0;
9 
wire cond_7 = mc_cmd == `CMD_CALL && mc_cmdex_last == `CMDEX_CALL_real_v8086_STEP_1;
10 
wire cond_8 = mc_cmd == `CMD_CALL && mc_cmdex_last == `CMDEX_CALL_real_v8086_STEP_2;
11 
wire cond_9 = mc_cmd == `CMD_CALL && (mc_cmdex_last == `CMDEX_CALL_Ep_STEP_1 || mc_cmdex_last == `CMDEX_CALL_Ap_STEP_1) && (protected_mode);
12 
wire cond_10 = mc_cmd == `CMD_CALL && mc_cmdex_last == `CMDEX_CALL_protected_STEP_0;
13 
wire cond_11 = mc_cmd == `CMD_CALL && mc_cmdex_last == `CMDEX_CALL_protected_STEP_1 && glob_descriptor[`DESC_BIT_SEG];
14 
wire cond_12 = mc_cmd == `CMD_CALL && mc_cmdex_last == `CMDEX_CALL_protected_seg_STEP_0;
15 
wire cond_13 = mc_cmd == `CMD_CALL && mc_cmdex_last == `CMDEX_CALL_protected_seg_STEP_1;
16 
wire cond_14 = mc_cmd == `CMD_CALL && mc_cmdex_last == `CMDEX_CALL_protected_seg_STEP_2;
17 
wire cond_15 = mc_cmd == `CMD_CALL_2 && mc_cmdex_last == `CMDEX_CALL_2_protected_seg_STEP_3;
18 
wire cond_16 = mc_cmd == `CMD_CALL && mc_cmdex_last == `CMDEX_CALL_protected_STEP_1 && glob_descriptor[`DESC_BIT_SEG] == `FALSE && (glob_descriptor[`DESC_BITS_TYPE] == `DESC_TSS_AVAIL_386 || glob_descriptor[`DESC_BITS_TYPE] == `DESC_TSS_AVAIL_286);
19 
wire cond_17 = mc_cmd == `CMD_CALL_2 && mc_cmdex_last == `CMDEX_CALL_2_task_switch_STEP_0 && glob_param_3[21:18] == 4'd0;
20 
wire cond_18 = mc_cmd == `CMD_CALL_2 && mc_cmdex_last == `CMDEX_CALL_2_task_switch_STEP_0 && glob_param_3[21:18] != 4'd0;
21 
wire cond_19 = mc_cmd == `CMD_CALL && mc_cmdex_last == `CMDEX_CALL_protected_STEP_1 && glob_descriptor[`DESC_BIT_SEG] == `FALSE && glob_descriptor[`DESC_BITS_TYPE] == `DESC_TASK_GATE;
22 
wire cond_20 = mc_cmd == `CMD_CALL_2 && mc_cmdex_last == `CMDEX_CALL_2_task_gate_STEP_0;
23 
wire cond_21 = mc_cmd == `CMD_CALL_2 && mc_cmdex_last == `CMDEX_CALL_2_task_gate_STEP_1;
24 
wire cond_22 = mc_cmd == `CMD_CALL && mc_cmdex_last == `CMDEX_CALL_protected_STEP_1 && glob_descriptor[`DESC_BIT_SEG] == `FALSE && (glob_descriptor[`DESC_BITS_TYPE] == `DESC_CALL_GATE_386 || glob_descriptor[`DESC_BITS_TYPE] == `DESC_CALL_GATE_286);
25 
wire cond_23 = mc_cmd == `CMD_CALL_2 && mc_cmdex_last == `CMDEX_CALL_2_call_gate_STEP_0;
26 
wire cond_24 = mc_cmd == `CMD_CALL_2 && mc_cmdex_last == `CMDEX_CALL_2_call_gate_STEP_1;
27 
wire cond_25 = mc_cmd == `CMD_CALL_2 && mc_cmdex_last == `CMDEX_CALL_2_call_gate_STEP_2 && `DESC_IS_CODE_NON_CONFORMING(glob_descriptor) && glob_descriptor[`DESC_BITS_DPL] < cpl;
28 
wire cond_26 = mc_cmd == `CMD_CALL_2 && mc_cmdex_last == `CMDEX_CALL_2_call_gate_more_STEP_0;
29 
wire cond_27 = mc_cmd == `CMD_CALL_2 && mc_cmdex_last == `CMDEX_CALL_2_call_gate_more_STEP_1;
30 
wire cond_28 = mc_cmd == `CMD_CALL_2 && mc_cmdex_last == `CMDEX_CALL_2_call_gate_more_STEP_2;
31 
wire cond_29 = mc_cmd == `CMD_CALL_2 && mc_cmdex_last == `CMDEX_CALL_2_call_gate_more_STEP_3 && glob_param_3[24:20] != 5'd0;
32 
wire cond_30 = mc_cmd == `CMD_CALL_3 && mc_cmdex_last == `CMDEX_CALL_3_call_gate_more_STEP_4 && glob_param_3[24:20] == 5'd1;
33 
wire cond_31 = mc_cmd == `CMD_CALL_3 && mc_cmdex_last == `CMDEX_CALL_3_call_gate_more_STEP_4 && glob_param_3[24:20] != 5'd1;
34 
wire cond_32 = mc_cmd == `CMD_CALL_3 && mc_cmdex_last == `CMDEX_CALL_3_call_gate_more_STEP_5 && glob_param_3[24:20] == 5'd1;
35 
wire cond_33 = mc_cmd == `CMD_CALL_3 && mc_cmdex_last == `CMDEX_CALL_3_call_gate_more_STEP_5 && glob_param_3[24:20] != 5'd1;
36 
wire cond_34 = mc_cmd == `CMD_CALL_2 && mc_cmdex_last == `CMDEX_CALL_2_call_gate_more_STEP_3 && glob_param_3[24:20] == 5'd0;
37 
wire cond_35 = mc_cmd == `CMD_CALL_3 && mc_cmdex_last == `CMDEX_CALL_3_call_gate_more_STEP_6;
38 
wire cond_36 = mc_cmd == `CMD_CALL_3 && mc_cmdex_last == `CMDEX_CALL_3_call_gate_more_STEP_7;
39 
wire cond_37 = mc_cmd == `CMD_CALL_3 && mc_cmdex_last == `CMDEX_CALL_3_call_gate_more_STEP_8;
40 
wire cond_38 = mc_cmd == `CMD_CALL_3 && mc_cmdex_last == `CMDEX_CALL_3_call_gate_more_STEP_9;
41 
wire cond_39 = mc_cmd == `CMD_CALL_2 && mc_cmdex_last == `CMDEX_CALL_2_call_gate_STEP_2 && ~(`DESC_IS_CODE_NON_CONFORMING(glob_descriptor) && glob_descriptor[`DESC_BITS_DPL] < cpl);
42 
wire cond_40 = mc_cmd == `CMD_CALL_2 && mc_cmdex_last == `CMDEX_CALL_2_call_gate_same_STEP_0;
43 
wire cond_41 = mc_cmd == `CMD_CALL_2 && mc_cmdex_last == `CMDEX_CALL_2_call_gate_same_STEP_1;
44 
wire cond_42 = mc_cmd == `CMD_CALL_2 && mc_cmdex_last == `CMDEX_CALL_2_call_gate_same_STEP_2;
45 
wire cond_43 = mc_cmd == `CMD_INVD && mc_cmdex_last == `CMDEX_INVD_STEP_0;
46 
wire cond_44 = mc_cmd == `CMD_INVD && mc_cmdex_last == `CMDEX_INVD_STEP_1;
47 
wire cond_45 = mc_cmd == `CMD_INVLPG && mc_cmdex_last == `CMDEX_INVLPG_STEP_0;
48 
wire cond_46 = mc_cmd == `CMD_INVLPG && mc_cmdex_last == `CMDEX_INVLPG_STEP_1;
49 
wire cond_47 = mc_cmd == `CMD_io_allow && mc_cmdex_last == `CMDEX_io_allow_1;
50 
wire cond_48 = mc_cmd == `CMD_io_allow && mc_cmdex_last == `CMDEX_io_allow_2;
51 
wire cond_49 = mc_cmd == `CMD_RET_near && mc_cmdex_last == `CMDEX_RET_near_imm;
52 
wire cond_50 = mc_cmd == `CMD_RET_near && mc_cmdex_last == `CMDEX_RET_near;
53 
wire cond_51 = mc_cmd == `CMD_LxS && mc_cmdex_last == `CMDEX_LxS_STEP_1;
54 
wire cond_52 = mc_cmd == `CMD_LxS && mc_cmdex_last == `CMDEX_LxS_STEP_2;
55 
wire cond_53 = mc_cmd == `CMD_LxS && mc_cmdex_last == `CMDEX_LxS_STEP_3;
56 
wire cond_54 = (mc_cmd == `CMD_MOV_to_seg || mc_cmd == `CMD_LLDT || mc_cmd == `CMD_LTR) && mc_cmdex_last != `CMDEX_MOV_to_seg_LLDT_LTR_STEP_LAST;
57 
wire cond_55 = (mc_cmd == `CMD_MOV_to_seg || mc_cmd == `CMD_LLDT || mc_cmd == `CMD_LTR) && mc_cmdex_last == `CMDEX_MOV_to_seg_LLDT_LTR_STEP_LAST;
58 
wire cond_56 = mc_cmd == `CMD_int && mc_cmdex_last == `CMDEX_int_STEP_0;
59 
wire cond_57 = mc_cmd == `CMD_int && mc_cmdex_last == `CMDEX_int_STEP_1 && real_mode;
60 
wire cond_58 = mc_cmd == `CMD_int && mc_cmdex_last == `CMDEX_int_real_STEP_0;
61 
wire cond_59 = mc_cmd == `CMD_int && mc_cmdex_last == `CMDEX_int_real_STEP_1;
62 
wire cond_60 = mc_cmd == `CMD_int && mc_cmdex_last == `CMDEX_int_real_STEP_2;
63 
wire cond_61 = mc_cmd == `CMD_int && mc_cmdex_last == `CMDEX_int_real_STEP_3;
64 
wire cond_62 = mc_cmd == `CMD_int && mc_cmdex_last == `CMDEX_int_real_STEP_4;
65 
wire cond_63 = mc_cmd == `CMD_int && mc_cmdex_last == `CMDEX_int_STEP_1 && ~(real_mode);
66 
wire cond_64 = mc_cmd == `CMD_int && mc_cmdex_last == `CMDEX_int_protected_STEP_0;
67 
wire cond_65 = mc_cmd == `CMD_int && mc_cmdex_last == `CMDEX_int_protected_STEP_1;
68 
wire cond_66 = mc_cmd == `CMD_int && mc_cmdex_last == `CMDEX_int_protected_STEP_2 && glob_descriptor[`DESC_BITS_TYPE] == `DESC_TASK_GATE;
69 
wire cond_67 = mc_cmd == `CMD_int && mc_cmdex_last == `CMDEX_int_task_gate_STEP_0;
70 
wire cond_68 = mc_cmd == `CMD_int && mc_cmdex_last == `CMDEX_int_task_gate_STEP_1;
71 
wire cond_69 = mc_cmd == `CMD_int && mc_cmdex_last == `CMDEX_int_protected_STEP_2 && glob_descriptor[`DESC_BITS_TYPE] != `DESC_TASK_GATE;
72 
wire cond_70 = mc_cmd == `CMD_int && mc_cmdex_last == `CMDEX_int_int_trap_gate_STEP_0;
73 
wire cond_71 = mc_cmd == `CMD_int && mc_cmdex_last == `CMDEX_int_int_trap_gate_STEP_1;
74 
wire cond_72 = mc_cmd == `CMD_int && mc_cmdex_last == `CMDEX_int_int_trap_gate_STEP_2 && `DESC_IS_CODE_NON_CONFORMING(glob_descriptor) && glob_descriptor[`DESC_BITS_DPL] < cpl;
75 
wire cond_73 = mc_cmd == `CMD_int_2 && mc_cmdex_last == `CMDEX_int_2_int_trap_gate_more_STEP_0;
76 
wire cond_74 = mc_cmd == `CMD_int_2 && mc_cmdex_last == `CMDEX_int_2_int_trap_gate_more_STEP_1;
77 
wire cond_75 = mc_cmd == `CMD_int_2 && mc_cmdex_last == `CMDEX_int_2_int_trap_gate_more_STEP_2;
78 
wire cond_76 = mc_cmd == `CMD_int_2 && mc_cmdex_last == `CMDEX_int_2_int_trap_gate_more_STEP_3 && v8086_mode;
79 
wire cond_77 = mc_cmd == `CMD_int_2 && mc_cmdex_last == `CMDEX_int_2_int_trap_gate_more_STEP_4;
80 
wire cond_78 = mc_cmd == `CMD_int_2 && mc_cmdex_last == `CMDEX_int_2_int_trap_gate_more_STEP_5;
81 
wire cond_79 = mc_cmd == `CMD_int_2 && mc_cmdex_last == `CMDEX_int_2_int_trap_gate_more_STEP_6;
82 
wire cond_80 = mc_cmd == `CMD_int_2 && mc_cmdex_last == `CMDEX_int_2_int_trap_gate_more_STEP_7;
83 
wire cond_81 = mc_cmd == `CMD_int_2 && mc_cmdex_last == `CMDEX_int_2_int_trap_gate_more_STEP_3 && ~(v8086_mode);
84 
wire cond_82 = mc_cmd == `CMD_int_2 && mc_cmdex_last == `CMDEX_int_2_int_trap_gate_more_STEP_8;
85 
wire cond_83 = mc_cmd == `CMD_int_2 && mc_cmdex_last == `CMDEX_int_2_int_trap_gate_more_STEP_9;
86 
wire cond_84 = mc_cmd == `CMD_int_3 && mc_cmdex_last == `CMDEX_int_3_int_trap_gate_more_STEP_0;
87 
wire cond_85 = mc_cmd == `CMD_int_3 && mc_cmdex_last == `CMDEX_int_3_int_trap_gate_more_STEP_1;
88 
wire cond_86 = mc_cmd == `CMD_int_3 && mc_cmdex_last == `CMDEX_int_3_int_trap_gate_more_STEP_2 && exc_push_error;
89 
wire cond_87 = mc_cmd == `CMD_int_3 && mc_cmdex_last == `CMDEX_int_3_int_trap_gate_more_STEP_3;
90 
wire cond_88 = mc_cmd == `CMD_int_3 && mc_cmdex_last == `CMDEX_int_3_int_trap_gate_more_STEP_2 && ~(exc_push_error);
91 
wire cond_89 = mc_cmd == `CMD_int_3 && mc_cmdex_last == `CMDEX_int_3_int_trap_gate_more_STEP_4;
92 
wire cond_90 = mc_cmd == `CMD_int_3 && mc_cmdex_last == `CMDEX_int_3_int_trap_gate_more_STEP_5;
93 
wire cond_91 = mc_cmd == `CMD_int && mc_cmdex_last == `CMDEX_int_int_trap_gate_STEP_2 && ~(`DESC_IS_CODE_NON_CONFORMING(glob_descriptor) && glob_descriptor[`DESC_BITS_DPL] < cpl);
94 
wire cond_92 = mc_cmd == `CMD_int_2 && mc_cmdex_last == `CMDEX_int_2_int_trap_gate_same_STEP_0;
95 
wire cond_93 = mc_cmd == `CMD_int_2 && mc_cmdex_last == `CMDEX_int_2_int_trap_gate_same_STEP_1;
96 
wire cond_94 = mc_cmd == `CMD_int_2 && mc_cmdex_last == `CMDEX_int_2_int_trap_gate_same_STEP_2 && exc_push_error;
97 
wire cond_95 = mc_cmd == `CMD_int_2 && mc_cmdex_last == `CMDEX_int_2_int_trap_gate_same_STEP_3;
98 
wire cond_96 = mc_cmd == `CMD_int_2 && mc_cmdex_last == `CMDEX_int_2_int_trap_gate_same_STEP_2 && ~(exc_push_error);
99 
wire cond_97 = mc_cmd == `CMD_int_2 && mc_cmdex_last == `CMDEX_int_2_int_trap_gate_same_STEP_4;
100 
wire cond_98 = mc_cmd == `CMD_load_seg && (~(protected_mode) || (protected_mode && mc_cmdex_last == `CMDEX_load_seg_STEP_2));
101 
wire cond_99 = mc_cmd == `CMD_load_seg && protected_mode && mc_cmdex_last == `CMDEX_load_seg_STEP_1;
102 
wire cond_100 = mc_cmd == `CMD_POP_seg && mc_cmdex_last == `CMDEX_POP_seg_STEP_1;
103 
wire cond_101 = mc_cmd == `CMD_IRET && mc_cmdex_last == `CMDEX_IRET_real_v86_STEP_0;
104 
wire cond_102 = mc_cmd == `CMD_IRET && mc_cmdex_last == `CMDEX_IRET_real_v86_STEP_1;
105 
wire cond_103 = mc_cmd == `CMD_IRET && mc_cmdex_last == `CMDEX_IRET_real_v86_STEP_2;
106 
wire cond_104 = mc_cmd == `CMD_IRET && mc_cmdex_last == `CMDEX_IRET_protected_STEP_0 && ntflag;
107 
wire cond_105 = mc_cmd == `CMD_IRET && mc_cmdex_last == `CMDEX_IRET_task_switch_STEP_0;
108 
wire cond_106 = mc_cmd == `CMD_IRET && mc_cmdex_last == `CMDEX_IRET_task_switch_STEP_1;
109 
wire cond_107 = mc_cmd == `CMD_IRET && mc_cmdex_last == `CMDEX_IRET_protected_STEP_0 && ~(ntflag);
110 
wire cond_108 = mc_cmd == `CMD_IRET && mc_cmdex_last == `CMDEX_IRET_protected_STEP_1;
111 
wire cond_109 = mc_cmd == `CMD_IRET && mc_cmdex_last == `CMDEX_IRET_protected_STEP_2;
112 
wire cond_110 = mc_cmd == `CMD_IRET && mc_cmdex_last == `CMDEX_IRET_protected_STEP_3 && mc_operand_32bit && glob_param_3[`EFLAGS_BIT_VM] && cpl == 2'd0;
113 
wire cond_111 = mc_cmd == `CMD_IRET && mc_cmdex_last >= `CMDEX_IRET_protected_to_v86_STEP_0 && mc_cmdex_last < `CMDEX_IRET_protected_to_v86_STEP_5;
114 
wire cond_112 = mc_cmd == `CMD_IRET && mc_cmdex_last == `CMDEX_IRET_protected_to_v86_STEP_5;
115 
wire cond_113 = mc_cmd == `CMD_IRET_2 && mc_cmdex_last == `CMDEX_IRET_2_protected_to_v86_STEP_6;
116 
wire cond_114 = mc_cmd == `CMD_IRET && mc_cmdex_last == `CMDEX_IRET_protected_STEP_3 && ~(mc_operand_32bit && glob_param_3[`EFLAGS_BIT_VM] && cpl == 2'd0);
117 
wire cond_115 = mc_cmd == `CMD_IRET_2 && mc_cmdex_last == `CMDEX_IRET_2_protected_same_STEP_0;
118 
wire cond_116 = mc_cmd == `CMD_IRET_2 && mc_cmdex_last == `CMDEX_IRET_2_protected_same_STEP_1;
119 
wire cond_117 = mc_cmd == `CMD_IRET_2 && mc_cmdex_last == `CMDEX_IRET_2_protected_outer_STEP_0;
120 
wire cond_118 = mc_cmd == `CMD_IRET_2 && mc_cmdex_last >= `CMDEX_IRET_2_protected_outer_STEP_1 && mc_cmdex_last < `CMDEX_IRET_2_protected_outer_STEP_6;
121 
wire cond_119 = mc_cmd == `CMD_IRET_2 && mc_cmdex_last == `CMDEX_IRET_2_protected_outer_STEP_6;
122 
wire cond_120 = mc_cmd == `CMD_POP && mc_cmdex_last == `CMDEX_POP_modregrm_STEP_0;
123 
wire cond_121 = mc_cmd == `CMD_CMPS && mc_cmdex_last == `CMDEX_CMPS_FIRST;
124 
wire cond_122 = mc_cmd == `CMD_CMPS && mc_cmdex_last == `CMDEX_CMPS_LAST;
125 
wire cond_123 = mc_cmd == `CMD_control_reg && mc_cmdex_last == `CMDEX_control_reg_LMSW_STEP_0;
126 
wire cond_124 = mc_cmd == `CMD_control_reg && mc_cmdex_last == `CMDEX_control_reg_MOV_load_STEP_0;
127 
wire cond_125 = (mc_cmd == `CMD_LGDT || mc_cmd == `CMD_LIDT) && mc_cmdex_last == `CMDEX_LGDT_LIDT_STEP_1;
128 
wire cond_126 = (mc_cmd == `CMD_LGDT || mc_cmd == `CMD_LIDT) && mc_cmdex_last == `CMDEX_LGDT_LIDT_STEP_2;
129 
wire cond_127 = (mc_cmd == `CMD_LGDT || mc_cmd == `CMD_LIDT) && mc_cmdex_last == `CMDEX_LGDT_LIDT_STEP_LAST;
130 
wire cond_128 = mc_cmd == `CMD_PUSHA && mc_step < 6'd7;
131 
wire cond_129 = mc_cmd == `CMD_PUSHA && mc_step == 6'd7;
132 
wire cond_130 = mc_cmd == `CMD_ENTER && ((mc_step == 6'd1 && mc_decoder[28:24] == 5'd0) || (mc_step == 6'd2 && mc_decoder[28:24] == 5'd1) || (mc_step > { 1'b0, mc_decoder[28:24] } && mc_decoder[28:24] > 5'd1));
133 
wire cond_131 = mc_cmd == `CMD_ENTER && ((mc_step == 6'd1 && mc_decoder[28:24] == 5'd1) || (mc_step == { 1'b0, mc_decoder[28:24] } && mc_decoder[28:24] > 5'd1));
134 
wire cond_132 = mc_cmd == `CMD_ENTER && (mc_step < { 1'b0, mc_decoder[28:24] } && mc_decoder[28:24] > 5'd1);
135 
wire cond_133 = mc_cmd == `CMD_WBINVD && mc_cmdex_last == `CMDEX_WBINVD_STEP_0;
136 
wire cond_134 = mc_cmd == `CMD_WBINVD && mc_cmdex_last == `CMDEX_WBINVD_STEP_1;
137 
wire cond_135 = mc_cmd == `CMD_CLTS && mc_cmdex_last == `CMDEX_CLTS_STEP_FIRST;
138 
wire cond_136 = mc_cmd == `CMD_RET_far && mc_cmdex_last == `CMDEX_RET_far_STEP_1;
139 
wire cond_137 = mc_cmd == `CMD_RET_far && mc_cmdex_last == `CMDEX_RET_far_STEP_2;
140 
wire cond_138 = mc_cmd == `CMD_RET_far && mc_cmdex_last == `CMDEX_RET_far_real_STEP_3;
141 
wire cond_139 = mc_cmd == `CMD_RET_far && mc_cmdex_last == `CMDEX_RET_far_same_STEP_3;
142 
wire cond_140 = mc_cmd == `CMD_RET_far && mc_cmdex_last == `CMDEX_RET_far_outer_STEP_3;
143 
wire cond_141 = mc_cmd == `CMD_RET_far && mc_cmdex_last == `CMDEX_RET_far_outer_STEP_4;
144 
wire cond_142 = mc_cmd == `CMD_RET_far && mc_cmdex_last == `CMDEX_RET_far_outer_STEP_5;
145 
wire cond_143 = mc_cmd == `CMD_RET_far && mc_cmdex_last == `CMDEX_RET_far_outer_STEP_6;
146 
wire cond_144 = mc_cmd == `CMD_XCHG && mc_cmdex_last == `CMDEX_XCHG_modregrm;
147 
wire cond_145 = mc_cmd == `CMD_INT_INTO && (mc_cmdex_last == `CMDEX_INT_INTO_INT_STEP_0 || mc_cmdex_last == `CMDEX_INT_INTO_INT3_STEP_0 || mc_cmdex_last == `CMDEX_INT_INTO_INT1_STEP_0);
148 
wire cond_146 = mc_cmd == `CMD_INT_INTO && mc_cmdex_last == `CMDEX_INT_INTO_INTO_STEP_0 && oflag;
149 
wire cond_147 = mc_cmd == `CMD_INT_INTO && mc_cmdex_last == `CMDEX_INT_INTO_INTO_STEP_0 && ~(oflag);
150 
wire cond_148 = mc_cmd == `CMD_IN && (mc_cmdex_last == `CMDEX_IN_imm || mc_cmdex_last == `CMDEX_IN_dx) && ~(io_allow_check_needed);
151 
wire cond_149 = mc_cmd == `CMD_IN && (mc_cmdex_last == `CMDEX_IN_imm || mc_cmdex_last == `CMDEX_IN_dx) && io_allow_check_needed;
152 
wire cond_150 = mc_cmd == `CMD_IN && mc_cmdex_last == `CMDEX_IN_protected;
153 
wire cond_151 = (mc_cmd == `CMD_LAR || mc_cmd == `CMD_LSL || mc_cmd == `CMD_VERR || mc_cmd == `CMD_VERW) && mc_cmdex_last == `CMDEX_LAR_LSL_VERR_VERW_STEP_1;
154 
wire cond_152 = (mc_cmd == `CMD_LAR || mc_cmd == `CMD_LSL || mc_cmd == `CMD_VERR || mc_cmd == `CMD_VERW) && mc_cmdex_last == `CMDEX_LAR_LSL_VERR_VERW_STEP_2;
155 
wire cond_153 = mc_cmd == `CMD_INS && mc_cmdex_last == `CMDEX_INS_real_1 && ~(io_allow_check_needed);
156 
wire cond_154 = mc_cmd == `CMD_INS && mc_cmdex_last == `CMDEX_INS_real_2;
157 
wire cond_155 = mc_cmd == `CMD_INS && mc_cmdex_last == `CMDEX_INS_real_1 && io_allow_check_needed;
158 
wire cond_156 = mc_cmd == `CMD_INS && mc_cmdex_last == `CMDEX_INS_protected_1;
159 
wire cond_157 = mc_cmd == `CMD_INS && mc_cmdex_last == `CMDEX_INS_protected_2;
160 
wire cond_158 = mc_cmd == `CMD_OUTS && mc_cmdex_last == `CMDEX_OUTS_first && ~(io_allow_check_needed);
161 
wire cond_159 = mc_cmd == `CMD_OUTS && mc_cmdex_last == `CMDEX_OUTS_first && io_allow_check_needed;
162 
wire cond_160 = mc_cmd == `CMD_JMP && mc_cmdex_last == `CMDEX_JMP_Jv_STEP_0;
163 
wire cond_161 = mc_cmd == `CMD_JMP && mc_cmdex_last == `CMDEX_JMP_Ev_STEP_0;
164 
wire cond_162 = mc_cmd == `CMD_JMP && mc_cmdex_last == `CMDEX_JMP_Ep_STEP_0;
165 
wire cond_163 = mc_cmd == `CMD_JMP && mc_cmdex_last == `CMDEX_JMP_Ap_STEP_0;
166 
wire cond_164 = mc_cmd == `CMD_JMP && (mc_cmdex_last == `CMDEX_JMP_Ep_STEP_1 || mc_cmdex_last == `CMDEX_JMP_Ap_STEP_1) && (real_mode || v8086_mode);
167 
wire cond_165 = mc_cmd == `CMD_JMP && mc_cmdex_last == `CMDEX_JMP_real_v8086_STEP_0;
168 
wire cond_166 = mc_cmd == `CMD_JMP && (mc_cmdex_last == `CMDEX_JMP_Ep_STEP_1 || mc_cmdex_last == `CMDEX_JMP_Ap_STEP_1) && (protected_mode);
169 
wire cond_167 = mc_cmd == `CMD_JMP && mc_cmdex_last == `CMDEX_JMP_protected_STEP_0;
170 
wire cond_168 = mc_cmd == `CMD_JMP && mc_cmdex_last == `CMDEX_JMP_protected_STEP_1 && glob_descriptor[`DESC_BIT_SEG];
171 
wire cond_169 = mc_cmd == `CMD_JMP && mc_cmdex_last == `CMDEX_JMP_protected_seg_STEP_0;
172 
wire cond_170 = mc_cmd == `CMD_JMP && mc_cmdex_last == `CMDEX_JMP_protected_STEP_1 && glob_descriptor[`DESC_BIT_SEG] == `FALSE && (glob_descriptor[`DESC_BITS_TYPE] == `DESC_TSS_AVAIL_386 || glob_descriptor[`DESC_BITS_TYPE] == `DESC_TSS_AVAIL_286);
173 
wire cond_171 = mc_cmd == `CMD_JMP && mc_cmdex_last == `CMDEX_JMP_task_switch_STEP_0 && glob_param_3[21:18] == 4'd0;
174 
wire cond_172 = mc_cmd == `CMD_JMP && mc_cmdex_last == `CMDEX_JMP_task_switch_STEP_0 && glob_param_3[21:18] != 4'd0;
175 
wire cond_173 = mc_cmd == `CMD_JMP && mc_cmdex_last == `CMDEX_JMP_protected_STEP_1 && glob_descriptor[`DESC_BIT_SEG] == `FALSE && glob_descriptor[`DESC_BITS_TYPE] == `DESC_TASK_GATE;
176 
wire cond_174 = mc_cmd == `CMD_JMP && mc_cmdex_last == `CMDEX_JMP_task_gate_STEP_0;
177 
wire cond_175 = mc_cmd == `CMD_JMP && mc_cmdex_last == `CMDEX_JMP_task_gate_STEP_1;
178 
wire cond_176 = mc_cmd == `CMD_JMP && mc_cmdex_last == `CMDEX_JMP_protected_STEP_1 && glob_descriptor[`DESC_BIT_SEG] == `FALSE && (glob_descriptor[`DESC_BITS_TYPE] == `DESC_CALL_GATE_386 || glob_descriptor[`DESC_BITS_TYPE] == `DESC_CALL_GATE_286);
179 
wire cond_177 = mc_cmd == `CMD_JMP_2 && mc_cmdex_last == `CMDEX_JMP_2_call_gate_STEP_0;
180 
wire cond_178 = mc_cmd == `CMD_JMP_2 && mc_cmdex_last == `CMDEX_JMP_2_call_gate_STEP_1;
181 
wire cond_179 = mc_cmd == `CMD_JMP_2 && mc_cmdex_last == `CMDEX_JMP_2_call_gate_STEP_2;
182 
wire cond_180 = mc_cmd == `CMD_OUT && (mc_cmdex_last == `CMDEX_OUT_imm || mc_cmdex_last == `CMDEX_OUT_dx) && ~(io_allow_check_needed);
183 
wire cond_181 = mc_cmd == `CMD_OUT && (mc_cmdex_last == `CMDEX_OUT_imm || mc_cmdex_last == `CMDEX_OUT_dx) && io_allow_check_needed;
184 
wire cond_182 = mc_cmd == `CMD_OUT && mc_cmdex_last == `CMDEX_OUT_protected;
185 
wire cond_183 = mc_cmd == `CMD_POPF && mc_cmdex_last == `CMDEX_POPF_STEP_0;
186 
wire cond_184 = mc_cmd == `CMD_BOUND && mc_cmdex_last == `CMDEX_BOUND_STEP_FIRST;
187 
wire cond_185 = mc_cmd == `CMD_task_switch && mc_cmdex_last == `CMDEX_task_switch_STEP_1 && cr0_pg;
188 
wire cond_186 = mc_cmd == `CMD_task_switch && mc_cmdex_last == `CMDEX_task_switch_STEP_2;
189 
wire cond_187 = mc_cmd == `CMD_task_switch && mc_cmdex_last == `CMDEX_task_switch_STEP_3 && (glob_param_1[`TASK_SWITCH_SOURCE_BITS] == `TASK_SWITCH_FROM_CALL || glob_param_1[`TASK_SWITCH_SOURCE_BITS] == `TASK_SWITCH_FROM_INT);
190 
wire cond_188 = mc_cmd == `CMD_task_switch && mc_cmdex_last == `CMDEX_task_switch_STEP_4;
191 
wire cond_189 = mc_cmd == `CMD_task_switch && mc_cmdex_last == `CMDEX_task_switch_STEP_5;
192 
wire cond_190 = mc_cmd == `CMD_task_switch && mc_cmdex_last == `CMDEX_task_switch_STEP_3 && ~(glob_param_1[`TASK_SWITCH_SOURCE_BITS] == `TASK_SWITCH_FROM_CALL || glob_param_1[`TASK_SWITCH_SOURCE_BITS] == `TASK_SWITCH_FROM_INT);
193 
wire cond_191 = mc_cmd == `CMD_task_switch && mc_cmdex_last == `CMDEX_task_switch_STEP_1 && ~(cr0_pg);
194 
wire cond_192 = mc_cmd == `CMD_task_switch && mc_cmdex_last == `CMDEX_task_switch_STEP_6 && cr0_pg;
195 
wire cond_193 = mc_cmd == `CMD_task_switch && mc_cmdex_last == `CMDEX_task_switch_STEP_7;
196 
wire cond_194 = mc_cmd == `CMD_task_switch && mc_cmdex_last == `CMDEX_task_switch_STEP_8;
197 
wire cond_195 = mc_cmd == `CMD_task_switch && mc_cmdex_last == `CMDEX_task_switch_STEP_6 && ~(cr0_pg);
198 
wire cond_196 = mc_cmd == `CMD_task_switch && mc_cmdex_last == `CMDEX_task_switch_STEP_9;
199 
wire cond_197 = mc_cmd == `CMD_task_switch && mc_cmdex_last == `CMDEX_task_switch_STEP_10;
200 
wire cond_198 = mc_cmd == `CMD_task_switch_2 && mc_cmdex_last < `CMDEX_task_switch_2_STEP_13;
201 
wire cond_199 = mc_cmd == `CMD_task_switch_2 && mc_cmdex_last == `CMDEX_task_switch_2_STEP_13;
202 
wire cond_200 = mc_cmd == `CMD_task_switch && mc_cmdex_last == `CMDEX_task_switch_STEP_11;
203 
wire cond_201 = mc_cmd == `CMD_task_switch && mc_cmdex_last == `CMDEX_task_switch_STEP_12;
204 
wire cond_202 = mc_cmd == `CMD_task_switch && mc_cmdex_last == `CMDEX_task_switch_STEP_13;
205 
wire cond_203 = mc_cmd == `CMD_task_switch && mc_cmdex_last == `CMDEX_task_switch_STEP_14;
206 
wire cond_204 = mc_cmd == `CMD_task_switch_3;
207 
wire cond_205 = mc_cmd == `CMD_task_switch_3 && mc_cmdex_last == `CMDEX_task_switch_3_STEP_15;
208 
wire cond_206 = mc_cmd == `CMD_task_switch_4 && mc_cmdex_last < `CMDEX_task_switch_4_STEP_10;
209 
wire cond_207 = mc_cmd == `CMD_SGDT || mc_cmd == `CMD_SIDT;
210 
wire cond_208 = mc_cmd == `CMD_POPA && mc_step < 6'd7;
211 
wire cond_209 = mc_cmd == `CMD_POPA && mc_step == 6'd7;
212 
wire cond_210 = mc_cmd == `CMD_debug_reg && mc_cmdex_last == `CMDEX_debug_reg_MOV_load_STEP_0;
213 
wire cond_211 =
214 
(mc_cmd == `CMD_CALL && mc_cmdex_last == `CMDEX_CALL_Ev_Jv_STEP_1) ||
215 
(mc_cmd == `CMD_CALL && mc_cmdex_last == `CMDEX_CALL_real_v8086_STEP_3) ||
216 
(mc_cmd == `CMD_CALL_2 && mc_cmdex_last == `CMDEX_CALL_2_protected_seg_STEP_4) ||
217 
(mc_cmd == `CMD_CALL_3 && mc_cmdex_last == `CMDEX_CALL_3_call_gate_more_STEP_10) ||
218 
(mc_cmd == `CMD_CALL_2 && mc_cmdex_last == `CMDEX_CALL_2_call_gate_same_STEP_3) ||
219 
(mc_cmd == `CMD_INVD && mc_cmdex_last == `CMDEX_INVD_STEP_2) ||
220 
(mc_cmd == `CMD_INVLPG && mc_cmdex_last == `CMDEX_INVLPG_STEP_2) ||
221 
(mc_cmd == `CMD_HLT && mc_cmdex_last == `CMDEX_HLT_STEP_0) ||
222 
(mc_cmd == `CMD_SCAS && mc_cmdex_last == `CMDEX_SCAS_STEP_0) ||
223 
(mc_cmd == `CMD_LxS && mc_cmdex_last == `CMDEX_LxS_STEP_LAST) ||
224 
(mc_cmd == `CMD_int && mc_cmdex_last == `CMDEX_int_real_STEP_5) ||
225 
(mc_cmd == `CMD_int_3 && mc_cmdex_last == `CMDEX_int_3_int_trap_gate_more_STEP_6) ||
226 
(mc_cmd == `CMD_int_2 && mc_cmdex_last == `CMDEX_int_2_int_trap_gate_same_STEP_5) ||
227 
(mc_cmd == `CMD_POP_seg && mc_cmdex_last == `CMDEX_POP_seg_STEP_LAST) ||
228 
(mc_cmd == `CMD_IRET && mc_cmdex_last == `CMDEX_IRET_real_v86_STEP_3) ||
229 
(mc_cmd == `CMD_IRET_2 && mc_cmdex_last == `CMDEX_IRET_2_idle) ||
230 
(mc_cmd == `CMD_control_reg && mc_cmdex_last == `CMDEX_control_reg_LMSW_STEP_1) ||
231 
(mc_cmd == `CMD_control_reg && mc_cmdex_last == `CMDEX_control_reg_MOV_load_STEP_1) ||
232 
(mc_cmd == `CMD_WBINVD && mc_cmdex_last == `CMDEX_WBINVD_STEP_2) ||
233 
(mc_cmd == `CMD_CLTS && mc_cmdex_last == `CMDEX_CLTS_STEP_LAST) ||
234 
(mc_cmd == `CMD_RET_far && mc_cmdex_last == `CMDEX_RET_far_real_STEP_3) ||
235 
(mc_cmd == `CMD_RET_far && mc_cmdex_last == `CMDEX_RET_far_same_STEP_4) ||
236 
(mc_cmd == `CMD_RET_far && mc_cmdex_last == `CMDEX_RET_far_outer_STEP_7) ||
237 
(mc_cmd == `CMD_LODS && mc_cmdex_last == `CMDEX_LODS_STEP_0) ||
238 
(mc_cmd == `CMD_CPUID && mc_cmdex_last == `CMDEX_CPUID_STEP_LAST) ||
239 
(mc_cmd == `CMD_IN && mc_cmdex_last == `CMDEX_IN_idle) ||
240 
(mc_cmd == `CMD_STOS && mc_cmdex_last == `CMDEX_STOS_STEP_0) ||
241 
(mc_cmd == `CMD_OUTS && mc_cmdex_last == `CMDEX_OUTS_protected) ||
242 
(mc_cmd == `CMD_JMP && mc_cmdex_last == `CMDEX_JMP_Ev_Jv_STEP_1) ||
243 
(mc_cmd == `CMD_JMP && mc_cmdex_last == `CMDEX_JMP_real_v8086_STEP_1) ||
244 
(mc_cmd == `CMD_JMP && mc_cmdex_last == `CMDEX_JMP_protected_seg_STEP_1) ||
245 
(mc_cmd == `CMD_JMP_2 && mc_cmdex_last == `CMDEX_JMP_2_call_gate_STEP_3) ||
246 
(mc_cmd == `CMD_OUT && mc_cmdex_last == `CMDEX_OUT_idle) ||
247 
(mc_cmd == `CMD_POPF && mc_cmdex_last == `CMDEX_POPF_STEP_1) ||
248 
(mc_cmd == `CMD_MOVS && mc_cmdex_last == `CMDEX_MOVS_STEP_0) ||
249 
(mc_cmd == `CMD_debug_reg && mc_cmdex_last == `CMDEX_debug_reg_MOV_load_STEP_1)
250 
;
251 
//======================================================== saves
252 
wire [6:0] mc_saved_command_to_reg =
253 
    (cond_8)? ( `CMD_CALL) :
254 
    (cond_53)? ( `CMD_LxS) :
255 
    (cond_54)? ( `CMD_MOV_to_seg) :
256 
    (cond_62)? ( `CMD_int) :
257 
    (cond_100)? ( `CMD_POP_seg) :
258 
    (cond_103)? ( `CMD_IRET) :
259 
    (cond_114)? ( `CMD_IRET_2) :
260 
    (cond_117)? ( `CMD_IRET_2) :
261 
    (cond_137)? ( `CMD_RET_far) :
262 
    (cond_141)? ( `CMD_RET_far) :
263 
    (cond_149)? ( `CMD_IN) :
264 
    (cond_155)? ( `CMD_INS) :
265 
    (cond_159)? ( `CMD_OUTS) :
266 
    (cond_165)? ( `CMD_JMP) :
267 
    (cond_181)? ( `CMD_OUT) :
268 
    mc_saved_command;
269 
wire [3:0] mc_saved_cmdex_to_reg =
270 
    (cond_8)? (   `CMDEX_CALL_real_v8086_STEP_3) :
271 
    (cond_53)? (   `CMDEX_LxS_STEP_LAST) :
272 
    (cond_54)? (   `CMDEX_MOV_to_seg_LLDT_LTR_STEP_LAST) :
273 
    (cond_62)? (   `CMDEX_int_real_STEP_5) :
274 
    (cond_100)? (   `CMDEX_POP_seg_STEP_LAST) :
275 
    (cond_103)? (   `CMDEX_IRET_real_v86_STEP_3) :
276 
    (cond_114)? (    (glob_param_1[`SELECTOR_BITS_RPL] == cpl)? `CMDEX_IRET_2_protected_same_STEP_0 : `CMDEX_IRET_2_protected_outer_STEP_0) :
277 
    (cond_117)? (   `CMDEX_IRET_2_protected_outer_STEP_1) :
278 
    (cond_137)? (    (real_mode || v8086_mode)? `CMDEX_RET_far_real_STEP_3 : (glob_param_1[`SELECTOR_BITS_RPL] == cpl)? `CMDEX_RET_far_same_STEP_3 : `CMDEX_RET_far_outer_STEP_3) :
279 
    (cond_141)? (   `CMDEX_RET_far_outer_STEP_5) :
280 
    (cond_149)? (   `CMDEX_IN_protected) :
281 
    (cond_155)? (   `CMDEX_INS_protected_1) :
282 
    (cond_159)? (   `CMDEX_OUTS_protected) :
283 
    (cond_165)? (   `CMDEX_JMP_real_v8086_STEP_1) :
284 
    (cond_181)? (   `CMDEX_OUT_protected) :
285 
    mc_saved_cmdex;
286 
//======================================================== always
287 
always @(posedge clk or negedge rst_n) begin
288 
    if(rst_n == 1'b0) mc_saved_command <= 7'd0;
289 
    else              mc_saved_command <= mc_saved_command_to_reg;
290 
end
291 
always @(posedge clk or negedge rst_n) begin
292 
    if(rst_n == 1'b0) mc_saved_cmdex <= 4'd0;
293 
    else              mc_saved_cmdex <= mc_saved_cmdex_to_reg;
294 
end
295 
//======================================================== sets
296 
assign mc_cmd_next =
297 
    (cond_1)? (      `CMD_CALL) :
298 
    (cond_2)? (      `CMD_CALL) :
299 
    (cond_3)? (      `CMD_CALL) :
300 
    (cond_4)? (      `CMD_CALL) :
301 
    (cond_5)? (      `CMD_CALL) :
302 
    (cond_6)? (      `CMD_CALL) :
303 
    (cond_7)? (      `CMD_CALL) :
304 
    (cond_8)? (      `CMD_load_seg) :
305 
    (cond_9)? (      `CMD_CALL) :
306 
    (cond_10)? (      `CMD_CALL) :
307 
    (cond_11)? (      `CMD_CALL) :
308 
    (cond_12)? (      `CMD_CALL) :
309 
    (cond_13)? (      `CMD_CALL) :
310 
    (cond_14)? (      `CMD_CALL_2) :
311 
    (cond_15)? (      `CMD_CALL_2) :
312 
    (cond_16)? (      `CMD_CALL_2) :
313 
    (cond_17)? (      `CMD_CALL_2) :
314 
    (cond_18)? (      `CMD_task_switch) :
315 
    (cond_19)? (      `CMD_CALL_2) :
316 
    (cond_20)? (      `CMD_CALL_2) :
317 
    (cond_21)? (      `CMD_task_switch) :
318 
    (cond_22)? (      `CMD_CALL_2) :
319 
    (cond_23)? (      `CMD_CALL_2) :
320 
    (cond_24)? (      `CMD_CALL_2) :
321 
    (cond_25)? (      `CMD_CALL_2) :
322 
    (cond_26)? (      `CMD_CALL_2) :
323 
    (cond_27)? (      `CMD_CALL_2) :
324 
    (cond_28)? (      `CMD_CALL_2) :
325 
    (cond_29)? (      `CMD_CALL_3) :
326 
    (cond_30)? (      `CMD_CALL_3) :
327 
    (cond_31)? (      `CMD_CALL_3) :
328 
    (cond_32)? (      `CMD_CALL_3) :
329 
    (cond_33)? (      `CMD_CALL_3) :
330 
    (cond_34)? (      `CMD_CALL_3) :
331 
    (cond_35)? (      `CMD_CALL_3) :
332 
    (cond_36)? (      `CMD_CALL_3) :
333 
    (cond_37)? (      `CMD_CALL_3) :
334 
    (cond_38)? (      `CMD_CALL_3) :
335 
    (cond_39)? (      `CMD_CALL_2) :
336 
    (cond_40)? (      `CMD_CALL_2) :
337 
    (cond_41)? (      `CMD_CALL_2) :
338 
    (cond_42)? (      `CMD_CALL_2) :
339 
    (cond_43)? (      `CMD_INVD) :
340 
    (cond_44)? (      `CMD_INVD) :
341 
    (cond_45)? (      `CMD_INVLPG) :
342 
    (cond_46)? (      `CMD_INVLPG) :
343 
    (cond_47)? (      `CMD_io_allow) :
344 
    (cond_48)? (      mc_saved_command) :
345 
    (cond_51)? (      `CMD_LxS) :
346 
    (cond_52)? (      `CMD_LxS) :
347 
    (cond_53)? (      `CMD_load_seg) :
348 
    (cond_54)? (      `CMD_load_seg) :
349 
    (cond_55)? (      `CMD_MOV_to_seg) :
350 
    (cond_56)? (      `CMD_int) :
351 
    (cond_57)? (      `CMD_int) :
352 
    (cond_58)? (      `CMD_int) :
353 
    (cond_59)? (      `CMD_int) :
354 
    (cond_60)? (      `CMD_int) :
355 
    (cond_61)? (      `CMD_int) :
356 
    (cond_62)? (      `CMD_load_seg) :
357 
    (cond_63)? (      `CMD_int) :
358 
    (cond_64)? (      `CMD_int) :
359 
    (cond_65)? (      `CMD_int) :
360 
    (cond_66)? (      `CMD_int) :
361 
    (cond_67)? (      `CMD_int) :
362 
    (cond_68)? (      `CMD_task_switch) :
363 
    (cond_69)? (      `CMD_int) :
364 
    (cond_70)? (      `CMD_int) :
365 
    (cond_71)? (      `CMD_int) :
366 
    (cond_72)? (      `CMD_int_2) :
367 
    (cond_73)? (      `CMD_int_2) :
368 
    (cond_74)? (      `CMD_int_2) :
369 
    (cond_75)? (      `CMD_int_2) :
370 
    (cond_76)? (      `CMD_int_2) :
371 
    (cond_77)? (      `CMD_int_2) :
372 
    (cond_78)? (      `CMD_int_2) :
373 
    (cond_79)? (      `CMD_int_2) :
374 
    (cond_80)? (      `CMD_int_2) :
375 
    (cond_81)? (      `CMD_int_2) :
376 
    (cond_82)? (      `CMD_int_2) :
377 
    (cond_83)? (      `CMD_int_3) :
378 
    (cond_84)? (      `CMD_int_3) :
379 
    (cond_85)? (      `CMD_int_3) :
380 
    (cond_86)? (      `CMD_int_3) :
381 
    (cond_87)? (      `CMD_int_3) :
382 
    (cond_88)? (      `CMD_int_3) :
383 
    (cond_89)? (      `CMD_int_3) :
384 
    (cond_90)? (      `CMD_int_3) :
385 
    (cond_91)? (      `CMD_int_2) :
386 
    (cond_92)? (      `CMD_int_2) :
387 
    (cond_93)? (      `CMD_int_2) :
388 
    (cond_94)? (      `CMD_int_2) :
389 
    (cond_95)? (      `CMD_int_2) :
390 
    (cond_96)? (      `CMD_int_2) :
391 
    (cond_97)? (      `CMD_int_2) :
392 
    (cond_98)? (      mc_saved_command) :
393 
    (cond_99)? (      `CMD_load_seg) :
394 
    (cond_100)? (      `CMD_load_seg) :
395 
    (cond_101)? (      `CMD_IRET) :
396 
    (cond_102)? (      `CMD_IRET) :
397 
    (cond_103)? (      `CMD_load_seg) :
398 
    (cond_104)? (      `CMD_IRET) :
399 
    (cond_105)? (      `CMD_IRET) :
400 
    (cond_106)? (      `CMD_task_switch) :
401 
    (cond_107)? (      `CMD_IRET) :
402 
    (cond_108)? (      `CMD_IRET) :
403 
    (cond_109)? (      `CMD_IRET) :
404 
    (cond_110)? (      `CMD_IRET) :
405 
    (cond_111)? (      `CMD_IRET) :
406 
    (cond_112)? (      `CMD_IRET_2) :
407 
    (cond_113)? (      `CMD_IRET_2) :
408 
    (cond_114)? (      `CMD_load_seg) :
409 
    (cond_115)? (      `CMD_IRET_2) :
410 
    (cond_116)? (      `CMD_IRET_2) :
411 
    (cond_117)? (      `CMD_load_seg) :
412 
    (cond_118)? (      `CMD_IRET_2) :
413 
    (cond_119)? (      `CMD_IRET_2) :
414 
    (cond_121)? (      `CMD_CMPS) :
415 
    (cond_122)? (      `CMD_CMPS) :
416 
    (cond_123)? (      `CMD_control_reg) :
417 
    (cond_124)? (      `CMD_control_reg) :
418 
    (cond_125)? (      mc_cmd) :
419 
    (cond_126)? (      mc_cmd) :
420 
    (cond_127)? (      mc_cmd) :
421 
    (cond_128)? (      mc_cmd) :
422 
    (cond_131)? (      `CMD_ENTER) :
423 
    (cond_132)? (      `CMD_ENTER) :
424 
    (cond_133)? (      `CMD_WBINVD) :
425 
    (cond_134)? (      `CMD_WBINVD) :
426 
    (cond_135)? (      `CMD_CLTS) :
427 
    (cond_136)? (      `CMD_RET_far) :
428 
    (cond_137)? (      `CMD_load_seg) :
429 
    (cond_138)? (      `CMD_RET_far) :
430 
    (cond_139)? (      `CMD_RET_far) :
431 
    (cond_140)? (      `CMD_RET_far) :
432 
    (cond_141)? (      `CMD_load_seg) :
433 
    (cond_142)? (      `CMD_RET_far) :
434 
    (cond_143)? (      `CMD_RET_far) :
435 
    (cond_145)? (      `CMD_int) :
436 
    (cond_146)? (      `CMD_int) :
437 
    (cond_147)? (      `CMD_INT_INTO) :
438 
    (cond_148)? (      `CMD_IN) :
439 
    (cond_149)? (      `CMD_io_allow) :
440 
    (cond_150)? (      `CMD_IN) :
441 
    (cond_151)? (      mc_cmd) :
442 
    (cond_153)? (      `CMD_INS) :
443 
    (cond_154)? (      `CMD_INS) :
444 
    (cond_155)? (      `CMD_io_allow) :
445 
    (cond_156)? (      `CMD_INS) :
446 
    (cond_157)? (      `CMD_INS) :
447 
    (cond_158)? (      `CMD_OUTS) :
448 
    (cond_159)? (      `CMD_io_allow) :
449 
    (cond_160)? (      `CMD_JMP) :
450 
    (cond_161)? (      `CMD_JMP) :
451 
    (cond_162)? (      `CMD_JMP) :
452 
    (cond_163)? (      `CMD_JMP) :
453 
    (cond_164)? (      `CMD_JMP) :
454 
    (cond_165)? (      `CMD_load_seg) :
455 
    (cond_166)? (      `CMD_JMP) :
456 
    (cond_167)? (      `CMD_JMP) :
457 
    (cond_168)? (      `CMD_JMP) :
458 
    (cond_169)? (      `CMD_JMP) :
459 
    (cond_170)? (      `CMD_JMP) :
460 
    (cond_171)? (      `CMD_JMP) :
461 
    (cond_172)? (      `CMD_task_switch) :
462 
    (cond_173)? (      `CMD_JMP) :
463 
    (cond_174)? (      `CMD_JMP) :
464 
    (cond_175)? (      `CMD_task_switch) :
465 
    (cond_176)? (      `CMD_JMP_2) :
466 
    (cond_177)? (      `CMD_JMP_2) :
467 
    (cond_178)? (      `CMD_JMP_2) :
468 
    (cond_179)? (      `CMD_JMP_2) :
469 
    (cond_180)? (      `CMD_OUT) :
470 
    (cond_181)? (      `CMD_io_allow) :
471 
    (cond_182)? (      `CMD_OUT) :
472 
    (cond_183)? (      `CMD_POPF) :
473 
    (cond_185)? (      `CMD_task_switch) :
474 
    (cond_186)? (      `CMD_task_switch) :
475 
    (cond_187)? (      `CMD_task_switch) :
476 
    (cond_188)? (      `CMD_task_switch) :
477 
    (cond_189)? (      `CMD_task_switch) :
478 
    (cond_190)? (      `CMD_task_switch) :
479 
    (cond_191)? (      `CMD_task_switch) :
480 
    (cond_192)? (      `CMD_task_switch) :
481 
    (cond_193)? (      `CMD_task_switch) :
482 
    (cond_194)? (      `CMD_task_switch) :
483 
    (cond_195)? (      `CMD_task_switch) :
484 
    (cond_196)? (      `CMD_task_switch) :
485 
    (cond_197)? (      `CMD_task_switch_2) :
486 
    (cond_198)? (      mc_cmd) :
487 
    (cond_199)? (      `CMD_task_switch) :
488 
    (cond_200)? (      `CMD_task_switch) :
489 
    (cond_201)? (      `CMD_task_switch) :
490 
    (cond_202)? (      `CMD_task_switch) :
491 
    (cond_203)? (      `CMD_task_switch_3) :
492 
    (cond_204)? (      mc_cmd) :
493 
    (cond_205)? (      `CMD_task_switch_4) :
494 
    (cond_206)? (      mc_cmd) :
495 
    (cond_208)? (      mc_cmd) :
496 
    (cond_210)? (      `CMD_debug_reg) :
497 
    (cond_211)? (      mc_cmd) :
498 
    7'd0;
499 
assign mc_cmdex_current =
500 
    (cond_0)? ( `CMDEX_XADD_LAST) :
501 
    (cond_1)? ( `CMDEX_CALL_Ev_Jv_STEP_1) :
502 
    (cond_2)? ( `CMDEX_CALL_Ev_Jv_STEP_1) :
503 
    (cond_3)? ( `CMDEX_CALL_Ep_STEP_1) :
504 
    (cond_4)? ( `CMDEX_CALL_Ap_STEP_1) :
505 
    (cond_5)? ( `CMDEX_CALL_real_v8086_STEP_0) :
506 
    (cond_6)? ( `CMDEX_CALL_real_v8086_STEP_1) :
507 
    (cond_7)? ( `CMDEX_CALL_real_v8086_STEP_2) :
508 
    (cond_8)? ( `CMDEX_load_seg_STEP_1) :
509 
    (cond_9)? ( `CMDEX_CALL_protected_STEP_0) :
510 
    (cond_10)? ( `CMDEX_CALL_protected_STEP_1) :
511 
    (cond_11)? ( `CMDEX_CALL_protected_seg_STEP_0) :
512 
    (cond_12)? ( `CMDEX_CALL_protected_seg_STEP_1) :
513 
    (cond_13)? ( `CMDEX_CALL_protected_seg_STEP_2) :
514 
    (cond_14)? ( `CMDEX_CALL_2_protected_seg_STEP_3) :
515 
    (cond_15)? ( `CMDEX_CALL_2_protected_seg_STEP_4) :
516 
    (cond_16)? ( `CMDEX_CALL_2_task_switch_STEP_0) :
517 
    (cond_17)? ( `CMDEX_CALL_2_task_switch_STEP_0) :
518 
    (cond_18)? ( `CMDEX_task_switch_STEP_1) :
519 
    (cond_19)? ( `CMDEX_CALL_2_task_gate_STEP_0) :
520 
    (cond_20)? ( `CMDEX_CALL_2_task_gate_STEP_1) :
521 
    (cond_21)? ( `CMDEX_task_switch_STEP_1) :
522 
    (cond_22)? ( `CMDEX_CALL_2_call_gate_STEP_0) :
523 
    (cond_23)? ( `CMDEX_CALL_2_call_gate_STEP_1) :
524 
    (cond_24)? ( `CMDEX_CALL_2_call_gate_STEP_2) :
525 
    (cond_25)? ( `CMDEX_CALL_2_call_gate_more_STEP_0) :
526 
    (cond_26)? ( `CMDEX_CALL_2_call_gate_more_STEP_1) :
527 
    (cond_27)? ( `CMDEX_CALL_2_call_gate_more_STEP_2) :
528 
    (cond_28)? ( `CMDEX_CALL_2_call_gate_more_STEP_3) :
529 
    (cond_29)? ( `CMDEX_CALL_3_call_gate_more_STEP_4) :
530 
    (cond_30)? ( `CMDEX_CALL_3_call_gate_more_STEP_6) :
531 
    (cond_31)? ( `CMDEX_CALL_3_call_gate_more_STEP_5) :
532 
    (cond_32)? ( `CMDEX_CALL_3_call_gate_more_STEP_6) :
533 
    (cond_33)? ( `CMDEX_CALL_3_call_gate_more_STEP_5) :
534 
    (cond_34)? ( `CMDEX_CALL_3_call_gate_more_STEP_6) :
535 
    (cond_35)? ( `CMDEX_CALL_3_call_gate_more_STEP_7) :
536 
    (cond_36)? ( `CMDEX_CALL_3_call_gate_more_STEP_8) :
537 
    (cond_37)? ( `CMDEX_CALL_3_call_gate_more_STEP_9) :
538 
    (cond_38)? ( `CMDEX_CALL_3_call_gate_more_STEP_10) :
539 
    (cond_39)? ( `CMDEX_CALL_2_call_gate_same_STEP_0) :
540 
    (cond_40)? ( `CMDEX_CALL_2_call_gate_same_STEP_1) :
541 
    (cond_41)? ( `CMDEX_CALL_2_call_gate_same_STEP_2) :
542 
    (cond_42)? ( `CMDEX_CALL_2_call_gate_same_STEP_3) :
543 
    (cond_43)? ( `CMDEX_INVD_STEP_1) :
544 
    (cond_44)? ( `CMDEX_INVD_STEP_2) :
545 
    (cond_45)? ( `CMDEX_INVLPG_STEP_1) :
546 
    (cond_46)? ( `CMDEX_INVLPG_STEP_2) :
547 
    (cond_47)? ( `CMDEX_io_allow_2) :
548 
    (cond_48)? ( mc_saved_cmdex) :
549 
    (cond_49)? ( `CMDEX_RET_near_LAST) :
550 
    (cond_50)? ( `CMDEX_RET_near_LAST) :
551 
    (cond_51)? ( `CMDEX_LxS_STEP_2) :
552 
    (cond_52)? ( `CMDEX_LxS_STEP_3) :
553 
    (cond_53)? ( `CMDEX_load_seg_STEP_1) :
554 
    (cond_54)? ( `CMDEX_load_seg_STEP_1) :
555 
    (cond_55)? ( `CMDEX_MOV_to_seg_LLDT_LTR_STEP_LAST) :
556 
    (cond_56)? ( `CMDEX_int_STEP_1) :
557 
    (cond_57)? ( `CMDEX_int_real_STEP_0) :
558 
    (cond_58)? ( `CMDEX_int_real_STEP_1) :
559 
    (cond_59)? ( `CMDEX_int_real_STEP_2) :
560 
    (cond_60)? ( `CMDEX_int_real_STEP_3) :
561 
    (cond_61)? ( `CMDEX_int_real_STEP_4) :
562 
    (cond_62)? ( `CMDEX_load_seg_STEP_1) :
563 
    (cond_63)? ( `CMDEX_int_protected_STEP_0) :
564 
    (cond_64)? ( `CMDEX_int_protected_STEP_1) :
565 
    (cond_65)? ( `CMDEX_int_protected_STEP_2) :
566 
    (cond_66)? ( `CMDEX_int_task_gate_STEP_0) :
567 
    (cond_67)? ( `CMDEX_int_task_gate_STEP_1) :
568 
    (cond_68)? ( `CMDEX_task_switch_STEP_1) :
569 
    (cond_69)? ( `CMDEX_int_int_trap_gate_STEP_0) :
570 
    (cond_70)? ( `CMDEX_int_int_trap_gate_STEP_1) :
571 
    (cond_71)? ( `CMDEX_int_int_trap_gate_STEP_2) :
572 
    (cond_72)? ( `CMDEX_int_2_int_trap_gate_more_STEP_0) :
573 
    (cond_73)? ( `CMDEX_int_2_int_trap_gate_more_STEP_1) :
574 
    (cond_74)? ( `CMDEX_int_2_int_trap_gate_more_STEP_2) :
575 
    (cond_75)? ( `CMDEX_int_2_int_trap_gate_more_STEP_3) :
576 
    (cond_76)? ( `CMDEX_int_2_int_trap_gate_more_STEP_4) :
577 
    (cond_77)? ( `CMDEX_int_2_int_trap_gate_more_STEP_5) :
578 
    (cond_78)? ( `CMDEX_int_2_int_trap_gate_more_STEP_6) :
579 
    (cond_79)? ( `CMDEX_int_2_int_trap_gate_more_STEP_7) :
580 
    (cond_80)? ( `CMDEX_int_2_int_trap_gate_more_STEP_8) :
581 
    (cond_81)? ( `CMDEX_int_2_int_trap_gate_more_STEP_8) :
582 
    (cond_82)? ( `CMDEX_int_2_int_trap_gate_more_STEP_9) :
583 
    (cond_83)? ( `CMDEX_int_3_int_trap_gate_more_STEP_0) :
584 
    (cond_84)? ( `CMDEX_int_3_int_trap_gate_more_STEP_1) :
585 
    (cond_85)? ( `CMDEX_int_3_int_trap_gate_more_STEP_2) :
586 
    (cond_86)? ( `CMDEX_int_3_int_trap_gate_more_STEP_3) :
587 
    (cond_87)? ( `CMDEX_int_3_int_trap_gate_more_STEP_4) :
588 
    (cond_88)? ( `CMDEX_int_3_int_trap_gate_more_STEP_4) :
589 
    (cond_89)? ( `CMDEX_int_3_int_trap_gate_more_STEP_5) :
590 
    (cond_90)? ( `CMDEX_int_3_int_trap_gate_more_STEP_6) :
591 
    (cond_91)? ( `CMDEX_int_2_int_trap_gate_same_STEP_0) :
592 
    (cond_92)? ( `CMDEX_int_2_int_trap_gate_same_STEP_1) :
593 
    (cond_93)? ( `CMDEX_int_2_int_trap_gate_same_STEP_2) :
594 
    (cond_94)? ( `CMDEX_int_2_int_trap_gate_same_STEP_3) :
595 
    (cond_95)? ( `CMDEX_int_2_int_trap_gate_same_STEP_4) :
596 
    (cond_96)? ( `CMDEX_int_2_int_trap_gate_same_STEP_4) :
597 
    (cond_97)? ( `CMDEX_int_2_int_trap_gate_same_STEP_5) :
598 
    (cond_98)? ( mc_saved_cmdex) :
599 
    (cond_99)? ( `CMDEX_load_seg_STEP_2) :
600 
    (cond_100)? ( `CMDEX_load_seg_STEP_1) :
601 
    (cond_101)? ( `CMDEX_IRET_real_v86_STEP_1) :
602 
    (cond_102)? ( `CMDEX_IRET_real_v86_STEP_2) :
603 
    (cond_103)? ( `CMDEX_load_seg_STEP_1) :
604 
    (cond_104)? ( `CMDEX_IRET_task_switch_STEP_0) :
605 
    (cond_105)? ( `CMDEX_IRET_task_switch_STEP_1) :
606 
    (cond_106)? ( `CMDEX_task_switch_STEP_1) :
607 
    (cond_107)? ( `CMDEX_IRET_protected_STEP_1) :
608 
    (cond_108)? ( `CMDEX_IRET_protected_STEP_2) :
609 
    (cond_109)? ( `CMDEX_IRET_protected_STEP_3) :
610 
    (cond_110)? ( `CMDEX_IRET_protected_to_v86_STEP_0) :
611 
    (cond_111)? (  mc_cmdex_last + 4'd1) :
612 
    (cond_112)? ( `CMDEX_IRET_2_protected_to_v86_STEP_6) :
613 
    (cond_113)? ( `CMDEX_IRET_2_idle) :
614 
    (cond_114)? ( `CMDEX_load_seg_STEP_1) :
615 
    (cond_115)? ( `CMDEX_IRET_2_protected_same_STEP_1) :
616 
    (cond_116)? ( `CMDEX_IRET_2_idle) :
617 
    (cond_117)? ( `CMDEX_load_seg_STEP_1) :
618 
    (cond_118)? (  mc_cmdex_last + 4'd1) :
619 
    (cond_119)? ( `CMDEX_IRET_2_idle) :
620 
    (cond_120)? ( `CMDEX_POP_modregrm_STEP_1) :
621 
    (cond_121)? ( `CMDEX_CMPS_LAST) :
622 
    (cond_122)? ( `CMDEX_CMPS_FIRST) :
623 
    (cond_123)? ( `CMDEX_control_reg_LMSW_STEP_1) :
624 
    (cond_124)? ( `CMDEX_control_reg_MOV_load_STEP_1) :
625 
    (cond_125)? (  `CMDEX_LGDT_LIDT_STEP_2) :
626 
    (cond_126)? (  `CMDEX_LGDT_LIDT_STEP_LAST) :
627 
    (cond_127)? (  `CMDEX_LGDT_LIDT_STEP_LAST) :
628 
    (cond_128)? (  mc_step[3:0]) :
629 
    (cond_129)? ( `CMDEX_PUSHA_STEP_7) :
630 
    (cond_130)? ( `CMDEX_ENTER_LAST) :
631 
    (cond_131)? ( `CMDEX_ENTER_PUSH) :
632 
    (cond_132)? ( `CMDEX_ENTER_LOOP) :
633 
    (cond_133)? ( `CMDEX_WBINVD_STEP_1) :
634 
    (cond_134)? ( `CMDEX_WBINVD_STEP_2) :
635 
    (cond_135)? ( `CMDEX_CLTS_STEP_LAST) :
636 
    (cond_136)? ( `CMDEX_RET_far_STEP_2) :
637 
    (cond_137)? ( `CMDEX_load_seg_STEP_1) :
638 
    (cond_138)? ( `CMDEX_RET_far_real_STEP_3) :
639 
    (cond_139)? ( `CMDEX_RET_far_same_STEP_4) :
640 
    (cond_140)? ( `CMDEX_RET_far_outer_STEP_4) :
641 
    (cond_141)? ( `CMDEX_load_seg_STEP_1) :
642 
    (cond_142)? ( `CMDEX_RET_far_outer_STEP_6) :
643 
    (cond_143)? ( `CMDEX_RET_far_outer_STEP_7) :
644 
    (cond_144)? ( `CMDEX_XCHG_modregrm_LAST) :
645 
    (cond_145)? ( `CMDEX_int_STEP_0) :
646 
    (cond_146)? ( `CMDEX_int_STEP_0) :
647 
    (cond_147)? ( `CMDEX_INT_INTO_INTO_STEP_0) :
648 
    (cond_148)? ( `CMDEX_IN_idle) :
649 
    (cond_149)? ( `CMDEX_io_allow_1) :
650 
    (cond_150)? ( `CMDEX_IN_idle) :
651 
    (cond_151)? (  `CMDEX_LAR_LSL_VERR_VERW_STEP_2) :
652 
    (cond_152)? (  `CMDEX_LAR_LSL_VERR_VERW_STEP_LAST) :
653 
    (cond_153)? ( `CMDEX_INS_real_2) :
654 
    (cond_154)? ( `CMDEX_INS_real_1) :
655 
    (cond_155)? ( `CMDEX_io_allow_1) :
656 
    (cond_156)? ( `CMDEX_INS_protected_2) :
657 
    (cond_157)? ( `CMDEX_INS_protected_1) :
658 
    (cond_158)? ( `CMDEX_OUTS_first) :
659 
    (cond_159)? ( `CMDEX_io_allow_1) :
660 
    (cond_160)? ( `CMDEX_JMP_Ev_Jv_STEP_1) :
661 
    (cond_161)? ( `CMDEX_JMP_Ev_Jv_STEP_1) :
662 
    (cond_162)? ( `CMDEX_JMP_Ep_STEP_1) :
663 
    (cond_163)? ( `CMDEX_JMP_Ap_STEP_1) :
664 
    (cond_164)? ( `CMDEX_JMP_real_v8086_STEP_0) :
665 
    (cond_165)? ( `CMDEX_load_seg_STEP_1) :
666 
    (cond_166)? ( `CMDEX_JMP_protected_STEP_0) :
667 
    (cond_167)? ( `CMDEX_JMP_protected_STEP_1) :
668 
    (cond_168)? ( `CMDEX_JMP_protected_seg_STEP_0) :
669 
    (cond_169)? ( `CMDEX_JMP_protected_seg_STEP_1) :
670 
    (cond_170)? ( `CMDEX_JMP_task_switch_STEP_0) :
671 
    (cond_171)? ( `CMDEX_JMP_task_switch_STEP_0) :
672 
    (cond_172)? ( `CMDEX_task_switch_STEP_1) :
673 
    (cond_173)? ( `CMDEX_JMP_task_gate_STEP_0) :
674 
    (cond_174)? ( `CMDEX_JMP_task_gate_STEP_1) :
675 
    (cond_175)? ( `CMDEX_task_switch_STEP_1) :
676 
    (cond_176)? ( `CMDEX_JMP_2_call_gate_STEP_0) :
677 
    (cond_177)? ( `CMDEX_JMP_2_call_gate_STEP_1) :
678 
    (cond_178)? ( `CMDEX_JMP_2_call_gate_STEP_2) :
679 
    (cond_179)? ( `CMDEX_JMP_2_call_gate_STEP_3) :
680 
    (cond_180)? ( `CMDEX_OUT_idle) :
681 
    (cond_181)? ( `CMDEX_io_allow_1) :
682 
    (cond_182)? ( `CMDEX_OUT_idle) :
683 
    (cond_183)? ( `CMDEX_POPF_STEP_1) :
684 
    (cond_184)? ( `CMDEX_BOUND_STEP_LAST) :
685 
    (cond_185)? ( `CMDEX_task_switch_STEP_2) :
686 
    (cond_186)? ( `CMDEX_task_switch_STEP_3) :
687 
    (cond_187)? ( `CMDEX_task_switch_STEP_4) :
688 
    (cond_188)? ( `CMDEX_task_switch_STEP_5) :
689 
    (cond_189)? ( `CMDEX_task_switch_STEP_6) :
690 
    (cond_190)? ( `CMDEX_task_switch_STEP_6) :
691 
    (cond_191)? ( `CMDEX_task_switch_STEP_6) :
692 
    (cond_192)? ( `CMDEX_task_switch_STEP_7) :
693 
    (cond_193)? ( `CMDEX_task_switch_STEP_8) :
694 
    (cond_194)? ( `CMDEX_task_switch_STEP_9) :
695 
    (cond_195)? ( `CMDEX_task_switch_STEP_9) :
696 
    (cond_196)? ( `CMDEX_task_switch_STEP_10) :
697 
    (cond_197)? ( `CMDEX_task_switch_2_STEP_0) :
698 
    (cond_198)? (  mc_cmdex_last + 4'd1) :
699 
    (cond_199)? ( `CMDEX_task_switch_STEP_11) :
700 
    (cond_200)? ( `CMDEX_task_switch_STEP_12) :
701 
    (cond_201)? ( `CMDEX_task_switch_STEP_13) :
702 
    (cond_202)? ( `CMDEX_task_switch_STEP_14) :
703 
    (cond_203)? ( `CMDEX_task_switch_3_STEP_0) :
704 
    (cond_204)? (  mc_cmdex_last + 4'd1) :
705 
    (cond_205)? ( `CMDEX_task_switch_4_STEP_0) :
706 
    (cond_206)? (  mc_cmdex_last + 4'd1) :
707 
    (cond_207)? (  `CMDEX_SGDT_SIDT_STEP_2) :
708 
    (cond_208)? (  mc_step[3:0]) :
709 
    (cond_209)? ( `CMDEX_POPA_STEP_7) :
710 
    (cond_210)? ( `CMDEX_debug_reg_MOV_load_STEP_1) :
711 
    (cond_211)? ( mc_cmdex_last) :
712 
    4'd0;
713 
assign mc_cmd_current =
714 
    (cond_0)? (   `CMD_XADD) :
715 
    (cond_1)? (   `CMD_CALL) :
716 
    (cond_2)? (   `CMD_CALL) :
717 
    (cond_3)? (   `CMD_CALL) :
718 
    (cond_4)? (   `CMD_CALL) :
719 
    (cond_5)? (   `CMD_CALL) :
720 
    (cond_6)? (   `CMD_CALL) :
721 
    (cond_7)? (   `CMD_CALL) :
722 
    (cond_8)? (   `CMD_load_seg) :
723 
    (cond_9)? (   `CMD_CALL) :
724 
    (cond_10)? (   `CMD_CALL) :
725 
    (cond_11)? (   `CMD_CALL) :
726 
    (cond_12)? (   `CMD_CALL) :
727 
    (cond_13)? (   `CMD_CALL) :
728 
    (cond_14)? (   `CMD_CALL_2) :
729 
    (cond_15)? (   `CMD_CALL_2) :
730 
    (cond_16)? (   `CMD_CALL_2) :
731 
    (cond_17)? (   `CMD_CALL_2) :
732 
    (cond_18)? (   `CMD_task_switch) :
733 
    (cond_19)? (   `CMD_CALL_2) :
734 
    (cond_20)? (   `CMD_CALL_2) :
735 
    (cond_21)? (   `CMD_task_switch) :
736 
    (cond_22)? (   `CMD_CALL_2) :
737 
    (cond_23)? (   `CMD_CALL_2) :
738 
    (cond_24)? (   `CMD_CALL_2) :
739 
    (cond_25)? (   `CMD_CALL_2) :
740 
    (cond_26)? (   `CMD_CALL_2) :
741 
    (cond_27)? (   `CMD_CALL_2) :
742 
    (cond_28)? (   `CMD_CALL_2) :
743 
    (cond_29)? (   `CMD_CALL_3) :
744 
    (cond_30)? (   `CMD_CALL_3) :
745 
    (cond_31)? (   `CMD_CALL_3) :
746 
    (cond_32)? (   `CMD_CALL_3) :
747 
    (cond_33)? (   `CMD_CALL_3) :
748 
    (cond_34)? (   `CMD_CALL_3) :
749 
    (cond_35)? (   `CMD_CALL_3) :
750 
    (cond_36)? (   `CMD_CALL_3) :
751 
    (cond_37)? (   `CMD_CALL_3) :
752 
    (cond_38)? (   `CMD_CALL_3) :
753 
    (cond_39)? (   `CMD_CALL_2) :
754 
    (cond_40)? (   `CMD_CALL_2) :
755 
    (cond_41)? (   `CMD_CALL_2) :
756 
    (cond_42)? (   `CMD_CALL_2) :
757 
    (cond_43)? (   `CMD_INVD) :
758 
    (cond_44)? (   `CMD_INVD) :
759 
    (cond_45)? (   `CMD_INVLPG) :
760 
    (cond_46)? (   `CMD_INVLPG) :
761 
    (cond_47)? (   `CMD_io_allow) :
762 
    (cond_48)? (   mc_saved_command) :
763 
    (cond_49)? (   `CMD_RET_near) :
764 
    (cond_50)? (   `CMD_RET_near) :
765 
    (cond_51)? (   `CMD_LxS) :
766 
    (cond_52)? (   `CMD_LxS) :
767 
    (cond_53)? (   `CMD_load_seg) :
768 
    (cond_54)? (   `CMD_load_seg) :
769 
    (cond_55)? (   `CMD_MOV_to_seg) :
770 
    (cond_56)? (   `CMD_int) :
771 
    (cond_57)? (   `CMD_int) :
772 
    (cond_58)? (   `CMD_int) :
773 
    (cond_59)? (   `CMD_int) :
774 
    (cond_60)? (   `CMD_int) :
775 
    (cond_61)? (   `CMD_int) :
776 
    (cond_62)? (   `CMD_load_seg) :
777 
    (cond_63)? (   `CMD_int) :
778 
    (cond_64)? (   `CMD_int) :
779 
    (cond_65)? (   `CMD_int) :
780 
    (cond_66)? (   `CMD_int) :
781 
    (cond_67)? (   `CMD_int) :
782 
    (cond_68)? (   `CMD_task_switch) :
783 
    (cond_69)? (   `CMD_int) :
784 
    (cond_70)? (   `CMD_int) :
785 
    (cond_71)? (   `CMD_int) :
786 
    (cond_72)? (   `CMD_int_2) :
787 
    (cond_73)? (   `CMD_int_2) :
788 
    (cond_74)? (   `CMD_int_2) :
789 
    (cond_75)? (   `CMD_int_2) :
790 
    (cond_76)? (   `CMD_int_2) :
791 
    (cond_77)? (   `CMD_int_2) :
792 
    (cond_78)? (   `CMD_int_2) :
793 
    (cond_79)? (   `CMD_int_2) :
794 
    (cond_80)? (   `CMD_int_2) :
795 
    (cond_81)? (   `CMD_int_2) :
796 
    (cond_82)? (   `CMD_int_2) :
797 
    (cond_83)? (   `CMD_int_3) :
798 
    (cond_84)? (   `CMD_int_3) :
799 
    (cond_85)? (   `CMD_int_3) :
800 
    (cond_86)? (   `CMD_int_3) :
801 
    (cond_87)? (   `CMD_int_3) :
802 
    (cond_88)? (   `CMD_int_3) :
803 
    (cond_89)? (   `CMD_int_3) :
804 
    (cond_90)? (   `CMD_int_3) :
805 
    (cond_91)? (   `CMD_int_2) :
806 
    (cond_92)? (   `CMD_int_2) :
807 
    (cond_93)? (   `CMD_int_2) :
808 
    (cond_94)? (   `CMD_int_2) :
809 
    (cond_95)? (   `CMD_int_2) :
810 
    (cond_96)? (   `CMD_int_2) :
811 
    (cond_97)? (   `CMD_int_2) :
812 
    (cond_98)? (   mc_saved_command) :
813 
    (cond_99)? (   `CMD_load_seg) :
814 
    (cond_100)? (   `CMD_load_seg) :
815 
    (cond_101)? (   `CMD_IRET) :
816 
    (cond_102)? (   `CMD_IRET) :
817 
    (cond_103)? (   `CMD_load_seg) :
818 
    (cond_104)? (   `CMD_IRET) :
819 
    (cond_105)? (   `CMD_IRET) :
820 
    (cond_106)? (   `CMD_task_switch) :
821 
    (cond_107)? (   `CMD_IRET) :
822 
    (cond_108)? (   `CMD_IRET) :
823 
    (cond_109)? (   `CMD_IRET) :
824 
    (cond_110)? (   `CMD_IRET) :
825 
    (cond_111)? (   `CMD_IRET) :
826 
    (cond_112)? (   `CMD_IRET_2) :
827 
    (cond_113)? (   `CMD_IRET_2) :
828 
    (cond_114)? (   `CMD_load_seg) :
829 
    (cond_115)? (   `CMD_IRET_2) :
830 
    (cond_116)? (   `CMD_IRET_2) :
831 
    (cond_117)? (   `CMD_load_seg) :
832 
    (cond_118)? (   `CMD_IRET_2) :
833 
    (cond_119)? (   `CMD_IRET_2) :
834 
    (cond_120)? (   `CMD_POP) :
835 
    (cond_121)? (   `CMD_CMPS) :
836 
    (cond_122)? (   `CMD_CMPS) :
837 
    (cond_123)? (   `CMD_control_reg) :
838 
    (cond_124)? (   `CMD_control_reg) :
839 
    (cond_125)? (   mc_cmd) :
840 
    (cond_126)? (   mc_cmd) :
841 
    (cond_127)? (   mc_cmd) :
842 
    (cond_128)? (   mc_cmd) :
843 
    (cond_129)? (   `CMD_PUSHA) :
844 
    (cond_130)? (   `CMD_ENTER) :
845 
    (cond_131)? (   `CMD_ENTER) :
846 
    (cond_132)? (   `CMD_ENTER) :
847 
    (cond_133)? (   `CMD_WBINVD) :
848 
    (cond_134)? (   `CMD_WBINVD) :
849 
    (cond_135)? (   `CMD_CLTS) :
850 
    (cond_136)? (   `CMD_RET_far) :
851 
    (cond_137)? (   `CMD_load_seg) :
852 
    (cond_138)? (   `CMD_RET_far) :
853 
    (cond_139)? (   `CMD_RET_far) :
854 
    (cond_140)? (   `CMD_RET_far) :
855 
    (cond_141)? (   `CMD_load_seg) :
856 
    (cond_142)? (   `CMD_RET_far) :
857 
    (cond_143)? (   `CMD_RET_far) :
858 
    (cond_144)? (   `CMD_XCHG) :
859 
    (cond_145)? (   `CMD_int) :
860 
    (cond_146)? (   `CMD_int) :
861 
    (cond_147)? (   `CMD_INT_INTO) :
862 
    (cond_148)? (   `CMD_IN) :
863 
    (cond_149)? (   `CMD_io_allow) :
864 
    (cond_150)? (   `CMD_IN) :
865 
    (cond_151)? (   mc_cmd) :
866 
    (cond_152)? (   mc_cmd) :
867 
    (cond_153)? (   `CMD_INS) :
868 
    (cond_154)? (   `CMD_INS) :
869 
    (cond_155)? (   `CMD_io_allow) :
870 
    (cond_156)? (   `CMD_INS) :
871 
    (cond_157)? (   `CMD_INS) :
872 
    (cond_158)? (   `CMD_OUTS) :
873 
    (cond_159)? (   `CMD_io_allow) :
874 
    (cond_160)? (   `CMD_JMP) :
875 
    (cond_161)? (   `CMD_JMP) :
876 
    (cond_162)? (   `CMD_JMP) :
877 
    (cond_163)? (   `CMD_JMP) :
878 
    (cond_164)? (   `CMD_JMP) :
879 
    (cond_165)? (   `CMD_load_seg) :
880 
    (cond_166)? (   `CMD_JMP) :
881 
    (cond_167)? (   `CMD_JMP) :
882 
    (cond_168)? (   `CMD_JMP) :
883 
    (cond_169)? (   `CMD_JMP) :
884 
    (cond_170)? (   `CMD_JMP) :
885 
    (cond_171)? (   `CMD_JMP) :
886 
    (cond_172)? (   `CMD_task_switch) :
887 
    (cond_173)? (   `CMD_JMP) :
888 
    (cond_174)? (   `CMD_JMP) :
889 
    (cond_175)? (   `CMD_task_switch) :
890 
    (cond_176)? (   `CMD_JMP_2) :
891 
    (cond_177)? (   `CMD_JMP_2) :
892 
    (cond_178)? (   `CMD_JMP_2) :
893 
    (cond_179)? (   `CMD_JMP_2) :
894 
    (cond_180)? (   `CMD_OUT) :
895 
    (cond_181)? (   `CMD_io_allow) :
896 
    (cond_182)? (   `CMD_OUT) :
897 
    (cond_183)? (   `CMD_POPF) :
898 
    (cond_184)? (   `CMD_BOUND) :
899 
    (cond_185)? (   `CMD_task_switch) :
900 
    (cond_186)? (   `CMD_task_switch) :
901 
    (cond_187)? (   `CMD_task_switch) :
902 
    (cond_188)? (   `CMD_task_switch) :
903 
    (cond_189)? (   `CMD_task_switch) :
904 
    (cond_190)? (   `CMD_task_switch) :
905 
    (cond_191)? (   `CMD_task_switch) :
906 
    (cond_192)? (   `CMD_task_switch) :
907 
    (cond_193)? (   `CMD_task_switch) :
908 
    (cond_194)? (   `CMD_task_switch) :
909 
    (cond_195)? (   `CMD_task_switch) :
910 
    (cond_196)? (   `CMD_task_switch) :
911 
    (cond_197)? (   `CMD_task_switch_2) :
912 
    (cond_198)? (   mc_cmd) :
913 
    (cond_199)? (   `CMD_task_switch) :
914 
    (cond_200)? (   `CMD_task_switch) :
915 
    (cond_201)? (   `CMD_task_switch) :
916 
    (cond_202)? (   `CMD_task_switch) :
917 
    (cond_203)? (   `CMD_task_switch_3) :
918 
    (cond_204)? (   mc_cmd) :
919 
    (cond_205)? (   `CMD_task_switch_4) :
920 
    (cond_206)? (   mc_cmd) :
921 
    (cond_207)? (   mc_cmd) :
922 
    (cond_208)? (   mc_cmd) :
923 
    (cond_209)? (   `CMD_POPA) :
924 
    (cond_210)? (   `CMD_debug_reg) :
925 
    (cond_211)? (   mc_cmd) :
926 
    7'd0;

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