Subversion Repositories ao486

`define CMD_CMPXCHG     #AUTOGEN_NEXT_CMD

dec_ready_2byte_modregrm && { decoder[7:1], 1'b0 } == 8'hB0

prefix_group_1_lock && `DEC_MODREGRM_IS_MOD_11

`CMD_CMPXCHG

IF(decoder[0] == 1'b0); SET(dec_is_8bit); ENDIF();

SET(consume_modregrm_one);

IF(rd_cmd == `CMD_CMPXCHG);

    SET(rd_src_is_reg);

    SET(rd_req_eflags);

    SET(rd_req_eax);

    // dst: reg, src: reg

    IF(rd_modregrm_mod == 2'b11);

        IF(rd_mutex_busy_modregrm_reg || rd_mutex_busy_modregrm_rm); SET(rd_waiting);

        ELSE();

            SET(rd_dst_is_rm);

            SET(rd_req_rm);

        ENDIF();

    ENDIF();

    // dst: memory, src: reg

    IF(rd_modregrm_mod != 2'b11);

        IF(rd_mutex_busy_modregrm_reg || rd_mutex_busy_memory); SET(rd_waiting);

        ELSE();

            SET(rd_dst_is_memory);

            SET(rd_req_memory);

            SET(read_rmw_virtual);

            IF(~(read_for_rd_ready)); SET(rd_waiting); ENDIF();

        ENDIF();

    ENDIF();

ENDIF();

//------------------------------- CMPXCHG

wire        e_cmpxchg_eq;

wire [32:0] e_cmpxchg_sub;

wire [31:0] e_cmpxchg_result;

assign e_cmpxchg_eq =

    (exe_is_8bit       && eax[7:0]  == dst[7:0]) ||

    (exe_operand_16bit && eax[15:0] == dst[15:0]) ||

    (exe_operand_32bit && eax[31:0] == dst[31:0]);

assign e_cmpxchg_sub = eax - dst;

assign e_cmpxchg_result = (e_cmpxchg_eq)? src : e_cmpxchg_sub[31:0];

IF(exe_cmd == `CMD_CMPXCHG);

    SET(exe_arith_index, (`ARITH_VALID | `ARITH_SUB));

    SET(exe_result,  e_cmpxchg_result);

    SET(exe_result2, dst);

    SET(exe_result_signals, { 4'd0, e_cmpxchg_eq });

    SET(exe_cmpxchg_switch);

    SET(exe_cmpxchg_switch_carry, e_cmpxchg_sub[32]);

    IF(exe_mutex_current[`MUTEX_EAX_BIT]); SET(exe_waiting); ENDIF();

ENDIF();

IF(wr_cmd == `CMD_CMPXCHG);

    IF(result_signals[0]); // eq -> write dst

        IF(wr_dst_is_memory && ~(write_for_wr_ready)); SET(wr_waiting); ENDIF();

        SET(write_regrm,             wr_dst_is_rm);

        SET(write_rmw_virtual,       wr_dst_is_memory);

        SAVE(zflag, `TRUE);

        SAVE(sflag, `FALSE);

        SAVE(pflag, `TRUE);

        SAVE(aflag, `FALSE);

        SAVE(cflag, `FALSE);

        SAVE(oflag, `FALSE);

    ELSE();

        SAVE(eax, (wr_is_8bit)? { eax[31:8], result2[7:0] } : (wr_operand_16bit)? { eax[31:16], result2[15:0] } : result2);

        SAVE(zflag, zflag_result);

        SAVE(sflag, sflag_result);

        SAVE(pflag, pflag_result);

        SAVE(aflag, aflag_arith);

        SAVE(cflag, cflag_arith);

        SAVE(oflag, oflag_arith);

    ENDIF();

ENDIF();