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[/] [ao486/] [trunk/] [rtl/] [ao486/] [commands/] [CMD_LAR_LSL_VERR_VERW.txt] - Blame information for rev 2

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`define CMD_LAR         #AUTOGEN_NEXT_CMD
 
`define CMD_LSL         #AUTOGEN_NEXT_CMD
 
`define CMD_VERR        #AUTOGEN_NEXT_CMD
 
`define CMD_VERW        #AUTOGEN_NEXT_CMD
 
`define CMDEX_LAR_LSL_VERR_VERW_STEP_1      4'd0
 
`define CMDEX_LAR_LSL_VERR_VERW_STEP_2      4'd1
// glob_param_1[15:0] --> selector
// glob_param_2[x:0]  --> selector and descriptor check bits
 
`define CMDEX_LAR_LSL_VERR_VERW_STEP_LAST   4'd2

 
 

dec_ready_2byte_modregrm && decoder[7:0] == 8'h00 && decoder[13:11] == 3'd4
prefix_group_1_lock || ~(protected_mode)
`CMD_VERR
SET(dec_cmdex, `CMDEX_LAR_LSL_VERR_VERW_STEP_1);
SET(consume_modregrm_one);
SET(dec_is_complex);

 

dec_ready_2byte_modregrm && decoder[7:0] == 8'h00 && decoder[13:11] == 3'd5
prefix_group_1_lock || ~(protected_mode)
`CMD_VERW
SET(dec_cmdex, `CMDEX_LAR_LSL_VERR_VERW_STEP_1);
SET(consume_modregrm_one);
SET(dec_is_complex);

 

dec_ready_2byte_modregrm && decoder[7:0] == 8'h02
prefix_group_1_lock || ~(protected_mode)
`CMD_LAR
SET(dec_cmdex,`CMDEX_LAR_LSL_VERR_VERW_STEP_1);
SET(consume_modregrm_one);
SET(dec_is_complex);

 

dec_ready_2byte_modregrm && decoder[7:0] == 8'h03
prefix_group_1_lock || ~(protected_mode)
`CMD_LSL
SET(dec_cmdex, `CMDEX_LAR_LSL_VERR_VERW_STEP_1);
SET(consume_modregrm_one);
SET(dec_is_complex);

 

IF((mc_cmd == `CMD_LAR || mc_cmd == `CMD_LSL || mc_cmd == `CMD_VERR || mc_cmd == `CMD_VERW) && mc_cmdex_last == `CMDEX_LAR_LSL_VERR_VERW_STEP_1);
    DIRECT(mc_cmd, `CMDEX_LAR_LSL_VERR_VERW_STEP_2);
ENDIF();
 
IF((mc_cmd == `CMD_LAR || mc_cmd == `CMD_LSL || mc_cmd == `CMD_VERR || mc_cmd == `CMD_VERW) && mc_cmdex_last == `CMDEX_LAR_LSL_VERR_VERW_STEP_2);
    LAST_DIRECT(mc_cmd, `CMDEX_LAR_LSL_VERR_VERW_STEP_LAST);
ENDIF();

 

IF((rd_cmd == `CMD_LAR || rd_cmd == `CMD_LSL || rd_cmd == `CMD_VERR || rd_cmd == `CMD_VERW) && rd_cmdex == `CMDEX_LAR_LSL_VERR_VERW_STEP_1);
 
    // src: rm
    IF(rd_modregrm_mod == 2'b11);
 
        IF(rd_mutex_busy_modregrm_rm); SET(rd_waiting);
        ELSE();
            SET(rd_dst_is_rm);
 
            SET(rd_glob_param_1_set);
            SET(rd_glob_param_1_value, { 16'd0, dst_wire[15:0] });
        ENDIF();
    ENDIF();
 
    // src: memory
    IF(rd_modregrm_mod != 2'b11);
 
        SET(read_length_word);
 
        IF(rd_mutex_busy_memory); SET(rd_waiting);
        ELSE();
            SET(rd_glob_param_1_set);
            SET(rd_glob_param_1_value, { 16'd0, read_4[15:0] });
 
            SET(read_virtual);
 
            IF(~(read_for_rd_ready)); SET(rd_waiting); ENDIF();
        ENDIF();
    ENDIF();
ENDIF();

 

IF((rd_cmd == `CMD_LAR || rd_cmd == `CMD_LSL || rd_cmd == `CMD_VERR || rd_cmd == `CMD_VERW) && rd_cmdex == `CMDEX_LAR_LSL_VERR_VERW_STEP_2);
 
    IF(~(glob_param_1[15:2] == 14'd0) && ~(rd_descriptor_not_in_limits)); // load null; not in limits
 
        SET(read_length_word);
 
        IF(rd_mutex_busy_memory); SET(rd_waiting);
        ELSE();
 
            SET(rd_glob_descriptor_set);
            SET(rd_glob_descriptor_value, read_8);
 
            SET(rd_glob_param_2_set);
            SET(rd_glob_param_2_value, 32'd0);
 
            SET(read_system_descriptor);
 
            IF(~(read_for_rd_ready)); SET(rd_waiting); ENDIF();
        ENDIF();
 
    ELSE();
        SET(rd_glob_param_2_set);
        SET(rd_glob_param_2_value, { 30'd0, rd_descriptor_not_in_limits, glob_param_1[15:2] == 14'd0 });
    ENDIF();
ENDIF();

 

IF((rd_cmd == `CMD_LAR || rd_cmd == `CMD_LSL) && rd_cmdex == `CMDEX_LAR_LSL_VERR_VERW_STEP_LAST);
 
    SET(rd_req_eflags);
 
    IF(rd_cmd == `CMD_LAR); SET(rd_extra_wire, { 8'd0, glob_descriptor[55:40], 8'd0 });
    ELSE();                 SET(rd_extra_wire, glob_desc_limit);
    ENDIF();
 
    IF(exe_mutex[`MUTEX_ACTIVE_BIT]); SET(rd_waiting); // wait for descriptor check in exe stage
    ELSE();
 
        IF(glob_param_2[1:0] == 2'd0 && ((glob_param_2[2] == 1'd0 && rd_cmd == `CMD_LAR) || (glob_param_2[3] == 1'd0 && rd_cmd == `CMD_LSL)));
            SET(rd_dst_is_reg);
            SET(rd_req_reg);
        ENDIF();
    ENDIF();
ENDIF();

 

IF((rd_cmd == `CMD_VERR || rd_cmd == `CMD_VERW) && rd_cmdex == `CMDEX_LAR_LSL_VERR_VERW_STEP_LAST);
 
    SET(rd_req_eflags);
 
    IF(exe_mutex[`MUTEX_ACTIVE_BIT]); SET(rd_waiting); // wait for descriptor check in exe stage
    ELSE();
 
        IF(glob_param_2[1:0] == 2'd0 && ((glob_param_2[4] == 1'd0 && rd_cmd == `CMD_VERR) || (glob_param_2[5] == 1'd0 && rd_cmd == `CMD_VERW)));
            SET(rd_dst_is_reg); // only to signal
        ENDIF();
    ENDIF();
ENDIF();

 

wire exe_cmd_lar_desc_invalid;
wire exe_cmd_lsl_desc_invalid;
wire exe_cmd_verr_desc_invalid;
wire exe_cmd_verw_desc_invalid;
 
assign exe_cmd_lar_desc_invalid =
// descriptor type not valid
    (~(exe_descriptor[`DESC_BIT_SEG]) &&
        (exe_descriptor[`DESC_BITS_TYPE] == 4'd0  || exe_descriptor[`DESC_BITS_TYPE] == 4'd8 ||
         exe_descriptor[`DESC_BITS_TYPE] == 4'd10 || exe_descriptor[`DESC_BITS_TYPE] == 4'd13)
    ) ||
// segment descriptor
    (exe_descriptor[`DESC_BIT_SEG] && (`DESC_IS_DATA(exe_descriptor) || `DESC_IS_CODE_NON_CONFORMING(exe_descriptor)) && exe_privilege_not_accepted
    ) ||
// descriptor system descriptor type not valid
    (~(exe_descriptor[`DESC_BIT_SEG]) &&
        (exe_descriptor[`DESC_BITS_TYPE] == `DESC_INTERRUPT_GATE_386 || exe_descriptor[`DESC_BITS_TYPE] == `DESC_INTERRUPT_GATE_286 ||
         exe_descriptor[`DESC_BITS_TYPE] == `DESC_TRAP_GATE_386      || exe_descriptor[`DESC_BITS_TYPE] == `DESC_TRAP_GATE_286)
    ) ||
// system descriptor privilege
    (~(exe_descriptor[`DESC_BIT_SEG]) && exe_privilege_not_accepted
    );
 
assign exe_cmd_lsl_desc_invalid =
// descriptor type not valid
    (~(exe_descriptor[`DESC_BIT_SEG]) &&
        (exe_descriptor[`DESC_BITS_TYPE] != `DESC_TSS_AVAIL_386 && exe_descriptor[`DESC_BITS_TYPE] != `DESC_TSS_BUSY_386 &&
         exe_descriptor[`DESC_BITS_TYPE] != `DESC_TSS_AVAIL_286 && exe_descriptor[`DESC_BITS_TYPE] != `DESC_TSS_BUSY_286 &&
         exe_descriptor[`DESC_BITS_TYPE] != `DESC_LDT)
    ) ||
// system descriptor privilege
    (~(exe_descriptor[`DESC_BIT_SEG]) && exe_privilege_not_accepted
    ) ||
// segment descriptor
    (exe_descriptor[`DESC_BIT_SEG] && (`DESC_IS_DATA(exe_descriptor) || `DESC_IS_CODE_NON_CONFORMING(exe_descriptor)) && exe_privilege_not_accepted
    );
 
assign exe_cmd_verr_desc_invalid =
// system descriptor
    (~(exe_descriptor[`DESC_BIT_SEG])
    ) ||
// code segment
    (`DESC_IS_CODE_EO(exe_descriptor) || (`DESC_IS_CODE_NON_CONFORMING(exe_descriptor) && exe_privilege_not_accepted)
    ) ||
// data segment
    (`DESC_IS_DATA(exe_descriptor) && exe_privilege_not_accepted
    );
 
assign exe_cmd_verw_desc_invalid =
// system descriptor
    (~(exe_descriptor[`DESC_BIT_SEG])
    ) ||
// code segment
    (`DESC_IS_CODE(exe_descriptor)
    ) ||
// data segment
    (`DESC_IS_DATA_RO(exe_descriptor) || exe_privilege_not_accepted
    );

 

IF((exe_cmd == `CMD_LAR || exe_cmd == `CMD_LSL) && exe_cmdex == `CMDEX_LAR_LSL_VERR_VERW_STEP_LAST);
 
    SET(exe_result, exe_extra);
ENDIF();

 

IF((exe_cmd == `CMD_LAR || exe_cmd == `CMD_LSL || exe_cmd == `CMD_VERR || exe_cmd == `CMD_VERW) && exe_cmdex == `CMDEX_LAR_LSL_VERR_VERW_STEP_2);
    SET(exe_glob_param_2_set);
    SET(exe_glob_param_2_value, { 26'd0, exe_cmd_verw_desc_invalid, exe_cmd_verr_desc_invalid, exe_cmd_lsl_desc_invalid, exe_cmd_lar_desc_invalid, glob_param_2[1:0] });
ENDIF();

 

IF((wr_cmd == `CMD_LAR || wr_cmd == `CMD_LSL || wr_cmd == `CMD_VERR || wr_cmd == `CMD_VERW) && (wr_cmdex == `CMDEX_LAR_LSL_VERR_VERW_STEP_1 || wr_cmdex == `CMDEX_LAR_LSL_VERR_VERW_STEP_2));
    SET(wr_not_finished);
ENDIF();

 

IF((wr_cmd == `CMD_LAR || wr_cmd == `CMD_LSL) && wr_cmdex == `CMDEX_LAR_LSL_VERR_VERW_STEP_LAST);
 
    IF(wr_dst_is_reg);
        SAVE(zflag, `TRUE);
 
        SET(write_regrm);
    ELSE();
        SAVE(zflag, `FALSE);
    ENDIF();
ENDIF();

 

IF((wr_cmd == `CMD_VERR || wr_cmd == `CMD_VERW) && wr_cmdex == `CMDEX_LAR_LSL_VERR_VERW_STEP_LAST);
    SAVE(zflag, wr_dst_is_reg);
ENDIF();

 

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[/] [ao486/] [trunk/] [rtl/] [ao486/] [commands/] [CMD_LAR_LSL_VERR_VERW.txt] - Blame information for rev 2

Line No.	Rev	Author	Line
1	2	alfik
2
3			`define CMD_LAR #AUTOGEN_NEXT_CMD
4
5			`define CMD_LSL #AUTOGEN_NEXT_CMD
6
7			`define CMD_VERR #AUTOGEN_NEXT_CMD
8
9			`define CMD_VERW #AUTOGEN_NEXT_CMD
10
11			`define CMDEX_LAR_LSL_VERR_VERW_STEP_1 4'd0
12
13			`define CMDEX_LAR_LSL_VERR_VERW_STEP_2 4'd1
14			`// glob_param_1[15:0] --> selector`
15			`// glob_param_2[x:0] --> selector and descriptor check bits`
16
17			`define CMDEX_LAR_LSL_VERR_VERW_STEP_LAST 4'd2
18
19
20
21
22			`dec_ready_2byte_modregrm && decoder[7:0] == 8'h00 && decoder[13:11] == 3'd4`
23			`prefix_group_1_lock \|\| ~(protected_mode)`
24			`CMD_VERR
25			SET(dec_cmdex, `CMDEX_LAR_LSL_VERR_VERW_STEP_1);
26			`SET(consume_modregrm_one);`
27			`SET(dec_is_complex);`
28
29
30
31			`dec_ready_2byte_modregrm && decoder[7:0] == 8'h00 && decoder[13:11] == 3'd5`
32			`prefix_group_1_lock \|\| ~(protected_mode)`
33			`CMD_VERW
34			SET(dec_cmdex, `CMDEX_LAR_LSL_VERR_VERW_STEP_1);
35			`SET(consume_modregrm_one);`
36			`SET(dec_is_complex);`
37
38
39
40			`dec_ready_2byte_modregrm && decoder[7:0] == 8'h02`
41			`prefix_group_1_lock \|\| ~(protected_mode)`
42			`CMD_LAR
43			SET(dec_cmdex,`CMDEX_LAR_LSL_VERR_VERW_STEP_1);
44			`SET(consume_modregrm_one);`
45			`SET(dec_is_complex);`
46
47
48
49			`dec_ready_2byte_modregrm && decoder[7:0] == 8'h03`
50			`prefix_group_1_lock \|\| ~(protected_mode)`
51			`CMD_LSL
52			SET(dec_cmdex, `CMDEX_LAR_LSL_VERR_VERW_STEP_1);
53			`SET(consume_modregrm_one);`
54			`SET(dec_is_complex);`
55
56
57
58			IF((mc_cmd == `CMD_LAR \|\| mc_cmd == `CMD_LSL \|\| mc_cmd == `CMD_VERR \|\| mc_cmd == `CMD_VERW) && mc_cmdex_last == `CMDEX_LAR_LSL_VERR_VERW_STEP_1);
59			DIRECT(mc_cmd, `CMDEX_LAR_LSL_VERR_VERW_STEP_2);
60			`ENDIF();`
61
62			IF((mc_cmd == `CMD_LAR \|\| mc_cmd == `CMD_LSL \|\| mc_cmd == `CMD_VERR \|\| mc_cmd == `CMD_VERW) && mc_cmdex_last == `CMDEX_LAR_LSL_VERR_VERW_STEP_2);
63			LAST_DIRECT(mc_cmd, `CMDEX_LAR_LSL_VERR_VERW_STEP_LAST);
64			`ENDIF();`
65
66
67
68			IF((rd_cmd == `CMD_LAR \|\| rd_cmd == `CMD_LSL \|\| rd_cmd == `CMD_VERR \|\| rd_cmd == `CMD_VERW) && rd_cmdex == `CMDEX_LAR_LSL_VERR_VERW_STEP_1);
69
70			`// src: rm`
71			`IF(rd_modregrm_mod == 2'b11);`
72
73			`IF(rd_mutex_busy_modregrm_rm); SET(rd_waiting);`
74			`ELSE();`
75			`SET(rd_dst_is_rm);`
76
77			`SET(rd_glob_param_1_set);`
78			`SET(rd_glob_param_1_value, { 16'd0, dst_wire[15:0] });`
79			`ENDIF();`
80			`ENDIF();`
81
82			`// src: memory`
83			`IF(rd_modregrm_mod != 2'b11);`
84
85			`SET(read_length_word);`
86
87			`IF(rd_mutex_busy_memory); SET(rd_waiting);`
88			`ELSE();`
89			`SET(rd_glob_param_1_set);`
90			`SET(rd_glob_param_1_value, { 16'd0, read_4[15:0] });`
91
92			`SET(read_virtual);`
93
94			`IF(~(read_for_rd_ready)); SET(rd_waiting); ENDIF();`
95			`ENDIF();`
96			`ENDIF();`
97			`ENDIF();`
98
99
100
101			IF((rd_cmd == `CMD_LAR \|\| rd_cmd == `CMD_LSL \|\| rd_cmd == `CMD_VERR \|\| rd_cmd == `CMD_VERW) && rd_cmdex == `CMDEX_LAR_LSL_VERR_VERW_STEP_2);
102
103			`IF(~(glob_param_1[15:2] == 14'd0) && ~(rd_descriptor_not_in_limits)); // load null; not in limits`
104
105			`SET(read_length_word);`
106
107			`IF(rd_mutex_busy_memory); SET(rd_waiting);`
108			`ELSE();`
109
110			`SET(rd_glob_descriptor_set);`
111			`SET(rd_glob_descriptor_value, read_8);`
112
113			`SET(rd_glob_param_2_set);`
114			`SET(rd_glob_param_2_value, 32'd0);`
115
116			`SET(read_system_descriptor);`
117
118			`IF(~(read_for_rd_ready)); SET(rd_waiting); ENDIF();`
119			`ENDIF();`
120
121			`ELSE();`
122			`SET(rd_glob_param_2_set);`
123			`SET(rd_glob_param_2_value, { 30'd0, rd_descriptor_not_in_limits, glob_param_1[15:2] == 14'd0 });`
124			`ENDIF();`
125			`ENDIF();`
126
127
128
129			IF((rd_cmd == `CMD_LAR \|\| rd_cmd == `CMD_LSL) && rd_cmdex == `CMDEX_LAR_LSL_VERR_VERW_STEP_LAST);
130
131			`SET(rd_req_eflags);`
132
133			IF(rd_cmd == `CMD_LAR); SET(rd_extra_wire, { 8'd0, glob_descriptor[55:40], 8'd0 });
134			`ELSE(); SET(rd_extra_wire, glob_desc_limit);`
135			`ENDIF();`
136
137			IF(exe_mutex[`MUTEX_ACTIVE_BIT]); SET(rd_waiting); // wait for descriptor check in exe stage
138			`ELSE();`
139
140			IF(glob_param_2[1:0] == 2'd0 && ((glob_param_2[2] == 1'd0 && rd_cmd == `CMD_LAR) \|\| (glob_param_2[3] == 1'd0 && rd_cmd == `CMD_LSL)));
141			`SET(rd_dst_is_reg);`
142			`SET(rd_req_reg);`
143			`ENDIF();`
144			`ENDIF();`
145			`ENDIF();`
146
147
148
149			IF((rd_cmd == `CMD_VERR \|\| rd_cmd == `CMD_VERW) && rd_cmdex == `CMDEX_LAR_LSL_VERR_VERW_STEP_LAST);
150
151			`SET(rd_req_eflags);`
152
153			IF(exe_mutex[`MUTEX_ACTIVE_BIT]); SET(rd_waiting); // wait for descriptor check in exe stage
154			`ELSE();`
155
156			IF(glob_param_2[1:0] == 2'd0 && ((glob_param_2[4] == 1'd0 && rd_cmd == `CMD_VERR) \|\| (glob_param_2[5] == 1'd0 && rd_cmd == `CMD_VERW)));
157			`SET(rd_dst_is_reg); // only to signal`
158			`ENDIF();`
159			`ENDIF();`
160			`ENDIF();`
161
162
163
164			`wire exe_cmd_lar_desc_invalid;`
165			`wire exe_cmd_lsl_desc_invalid;`
166			`wire exe_cmd_verr_desc_invalid;`
167			`wire exe_cmd_verw_desc_invalid;`
168
169			`assign exe_cmd_lar_desc_invalid =`
170			`// descriptor type not valid`
171			(~(exe_descriptor[`DESC_BIT_SEG]) &&
172			(exe_descriptor[`DESC_BITS_TYPE] == 4'd0 \|\| exe_descriptor[`DESC_BITS_TYPE] == 4'd8 \|\|
173			exe_descriptor[`DESC_BITS_TYPE] == 4'd10 \|\| exe_descriptor[`DESC_BITS_TYPE] == 4'd13)
174			`) \|\|`
175			`// segment descriptor`
176			(exe_descriptor[`DESC_BIT_SEG] && (`DESC_IS_DATA(exe_descriptor) \|\| `DESC_IS_CODE_NON_CONFORMING(exe_descriptor)) && exe_privilege_not_accepted
177			`) \|\|`
178			`// descriptor system descriptor type not valid`
179			(~(exe_descriptor[`DESC_BIT_SEG]) &&
180			(exe_descriptor[`DESC_BITS_TYPE] == `DESC_INTERRUPT_GATE_386 \|\| exe_descriptor[`DESC_BITS_TYPE] == `DESC_INTERRUPT_GATE_286 \|\|
181			exe_descriptor[`DESC_BITS_TYPE] == `DESC_TRAP_GATE_386 \|\| exe_descriptor[`DESC_BITS_TYPE] == `DESC_TRAP_GATE_286)
182			`) \|\|`
183			`// system descriptor privilege`
184			(~(exe_descriptor[`DESC_BIT_SEG]) && exe_privilege_not_accepted
185			`);`
186
187			`assign exe_cmd_lsl_desc_invalid =`
188			`// descriptor type not valid`
189			(~(exe_descriptor[`DESC_BIT_SEG]) &&
190			(exe_descriptor[`DESC_BITS_TYPE] != `DESC_TSS_AVAIL_386 && exe_descriptor[`DESC_BITS_TYPE] != `DESC_TSS_BUSY_386 &&
191			exe_descriptor[`DESC_BITS_TYPE] != `DESC_TSS_AVAIL_286 && exe_descriptor[`DESC_BITS_TYPE] != `DESC_TSS_BUSY_286 &&
192			exe_descriptor[`DESC_BITS_TYPE] != `DESC_LDT)
193			`) \|\|`
194			`// system descriptor privilege`
195			(~(exe_descriptor[`DESC_BIT_SEG]) && exe_privilege_not_accepted
196			`) \|\|`
197			`// segment descriptor`
198			(exe_descriptor[`DESC_BIT_SEG] && (`DESC_IS_DATA(exe_descriptor) \|\| `DESC_IS_CODE_NON_CONFORMING(exe_descriptor)) && exe_privilege_not_accepted
199			`);`
200
201			`assign exe_cmd_verr_desc_invalid =`
202			`// system descriptor`
203			(~(exe_descriptor[`DESC_BIT_SEG])
204			`) \|\|`
205			`// code segment`
206			(`DESC_IS_CODE_EO(exe_descriptor) \|\| (`DESC_IS_CODE_NON_CONFORMING(exe_descriptor) && exe_privilege_not_accepted)
207			`) \|\|`
208			`// data segment`
209			(`DESC_IS_DATA(exe_descriptor) && exe_privilege_not_accepted
210			`);`
211
212			`assign exe_cmd_verw_desc_invalid =`
213			`// system descriptor`
214			(~(exe_descriptor[`DESC_BIT_SEG])
215			`) \|\|`
216			`// code segment`
217			(`DESC_IS_CODE(exe_descriptor)
218			`) \|\|`
219			`// data segment`
220			(`DESC_IS_DATA_RO(exe_descriptor) \|\| exe_privilege_not_accepted
221			`);`
222
223
224
225			IF((exe_cmd == `CMD_LAR \|\| exe_cmd == `CMD_LSL) && exe_cmdex == `CMDEX_LAR_LSL_VERR_VERW_STEP_LAST);
226
227			`SET(exe_result, exe_extra);`
228			`ENDIF();`
229
230
231
232			IF((exe_cmd == `CMD_LAR \|\| exe_cmd == `CMD_LSL \|\| exe_cmd == `CMD_VERR \|\| exe_cmd == `CMD_VERW) && exe_cmdex == `CMDEX_LAR_LSL_VERR_VERW_STEP_2);
233			`SET(exe_glob_param_2_set);`
234			`SET(exe_glob_param_2_value, { 26'd0, exe_cmd_verw_desc_invalid, exe_cmd_verr_desc_invalid, exe_cmd_lsl_desc_invalid, exe_cmd_lar_desc_invalid, glob_param_2[1:0] });`
235			`ENDIF();`
236
237
238
239			IF((wr_cmd == `CMD_LAR \|\| wr_cmd == `CMD_LSL \|\| wr_cmd == `CMD_VERR \|\| wr_cmd == `CMD_VERW) && (wr_cmdex == `CMDEX_LAR_LSL_VERR_VERW_STEP_1 \|\| wr_cmdex == `CMDEX_LAR_LSL_VERR_VERW_STEP_2));
240			`SET(wr_not_finished);`
241			`ENDIF();`
242
243
244
245			IF((wr_cmd == `CMD_LAR \|\| wr_cmd == `CMD_LSL) && wr_cmdex == `CMDEX_LAR_LSL_VERR_VERW_STEP_LAST);
246
247			`IF(wr_dst_is_reg);`
248			SAVE(zflag, `TRUE);
249
250			`SET(write_regrm);`
251			`ELSE();`
252			SAVE(zflag, `FALSE);
253			`ENDIF();`
254			`ENDIF();`
255
256
257
258			IF((wr_cmd == `CMD_VERR \|\| wr_cmd == `CMD_VERW) && wr_cmdex == `CMDEX_LAR_LSL_VERR_VERW_STEP_LAST);
259			`SAVE(zflag, wr_dst_is_reg);`
260			`ENDIF();`
261
262