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[/] [ao486/] [trunk/] [rtl/] [ao486/] [commands/] [CMD_PUSH.txt] - Blame information for rev 2

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Line No. Rev Author Line
1 2 alfik
 
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`define CMD_PUSH        #AUTOGEN_NEXT_CMD
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`define CMDEX_PUSH_implicit     4'd0
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`define CMDEX_PUSH_immediate_se 4'd1
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`define CMDEX_PUSH_immediate    4'd2
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`define CMDEX_PUSH_modregrm     4'd3
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dec_ready_one && { decoder[7:3], 3'b0 } == 8'h50
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`CMD_PUSH
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SET(dec_cmdex, `CMDEX_PUSH_implicit);
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SET(consume_one);
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dec_ready_one_imm && (decoder[7:0] == 8'h6A || decoder[7:0] == 8'h68)
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`CMD_PUSH
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IF(decoder[1]); SET(dec_cmdex, `CMDEX_PUSH_immediate_se); ELSE(); SET(dec_cmdex, `CMDEX_PUSH_immediate); ENDIF();
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SET(consume_one_imm);
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dec_ready_modregrm_one && decoder[7:0] == 8'hFF && decoder[13:11] == 3'd6
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`CMD_PUSH
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SET(dec_cmdex, `CMDEX_PUSH_modregrm);
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SET(consume_modregrm_one);
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IF(rd_cmd == `CMD_PUSH && (rd_cmdex == `CMDEX_PUSH_immediate || rd_cmdex == `CMDEX_PUSH_immediate_se));
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    SET(rd_src_is_imm);
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    SET(rd_req_memory);
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    SET(rd_req_esp);
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ENDIF();
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IF(rd_cmd == `CMD_PUSH && rd_cmdex == `CMDEX_PUSH_implicit);
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    SET(rd_src_is_implicit_reg);
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    SET(rd_req_memory);
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    SET(rd_req_esp);
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    IF(rd_mutex_busy_implicit_reg); SET(rd_waiting); ENDIF();
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ENDIF();
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IF(rd_cmd == `CMD_PUSH && rd_cmdex == `CMDEX_PUSH_modregrm);
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    SET(rd_req_memory);
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    SET(rd_req_esp);
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    // dst: reg
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    IF(rd_modregrm_mod == 2'b11);
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        SET(rd_src_is_rm);
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        IF(rd_mutex_busy_modregrm_rm); SET(rd_waiting); ENDIF();
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    ENDIF();
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    // dst: memory
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    IF(rd_modregrm_mod != 2'b11);
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        SET(rd_src_is_memory);
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        IF(rd_mutex_busy_memory); SET(rd_waiting);
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        ELSE();
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            SET(read_virtual);
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            IF(~(read_for_rd_ready)); SET(rd_waiting); ENDIF();
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        ENDIF();
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    ENDIF();
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ENDIF();
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IF(exe_cmd == `CMD_PUSH);
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    IF(exe_cmdex == `CMDEX_PUSH_immediate_se);
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        SET(exe_result_push, { {24{src[7]}}, src[7:0] });
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    ELSE();
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        SET(exe_result_push, src);
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    ENDIF();
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    IF(exe_mutex_current[`MUTEX_ESP_BIT]); SET(exe_waiting); ENDIF();
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ENDIF();
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IF(wr_cmd == `CMD_PUSH);
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    SET(wr_push_ss_fault_check);
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    SET(wr_one_cycle_wait);
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    IF(~(write_for_wr_ready)); SET(wr_waiting); ENDIF();
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    IF(~(wr_push_ss_fault));
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        SET(write_stack_virtual);
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    ENDIF();
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    IF(write_for_wr_ready && ~(wr_push_ss_fault));
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        SAVE(esp, wr_stack_esp);
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    ENDIF();
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ENDIF();
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