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[/] [ao486/] [trunk/] [rtl/] [ao486/] [commands/] [CMD_XCHG.txt] - Blame information for rev 2

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`define CMD_XCHG        #AUTOGEN_NEXT_CMD
 
`define CMDEX_XCHG_implicit         4'd0
`define CMDEX_XCHG_modregrm         4'd1
`define CMDEX_XCHG_modregrm_LAST    4'd2

 

dec_ready_one && { decoder[7:3], 3'b0 } == 8'h90
`CMD_XCHG
SET(dec_cmdex, `CMDEX_XCHG_implicit);
SET(consume_one);

 

dec_ready_modregrm_one && { decoder[7:1], 1'b0 } == 8'h86
prefix_group_1_lock && `DEC_MODREGRM_IS_MOD_11
`CMD_XCHG
SET(dec_cmdex, `CMDEX_XCHG_modregrm);
IF(decoder[0] == 1'b0); SET(dec_is_8bit); ENDIF();
SET(consume_modregrm_one);
SET(dec_is_complex);

 

`CMDEX_XCHG_modregrm
LAST(`CMDEX_XCHG_modregrm_LAST);

 

IF(rd_cmd == `CMD_XCHG && rd_cmdex == `CMDEX_XCHG_implicit);
 
    SET(rd_src_is_eax);
    SET(rd_dst_is_implicit_reg);
 
    SET(rd_req_implicit_reg);
    SET(rd_req_eax);
 
    IF(rd_mutex_busy_implicit_reg || rd_mutex_busy_eax); SET(rd_waiting); ENDIF();
ENDIF();

 

IF(rd_cmd == `CMD_XCHG && rd_cmdex == `CMDEX_XCHG_modregrm);
 
    SET(rd_src_is_reg);
 
    // dst: reg, src: reg
    IF(rd_modregrm_mod == 2'b11);
 
        SET(rd_dst_is_rm);
 
        IF(rd_mutex_busy_modregrm_reg || rd_mutex_busy_modregrm_rm); SET(rd_waiting); ENDIF();
    ENDIF();
 
    // dst: memory, src: reg
    IF(rd_modregrm_mod != 2'b11);
 
        SET(rd_dst_is_memory);
 
        IF(rd_mutex_busy_modregrm_reg || rd_mutex_busy_memory); SET(rd_waiting);
        ELSE();
            SET(read_rmw_virtual);
 
            IF(~(read_for_rd_ready)); SET(rd_waiting); ENDIF();
        ENDIF();
    ENDIF();
ENDIF();

 

IF(rd_cmd == `CMD_XCHG && rd_cmdex == `CMDEX_XCHG_modregrm_LAST);
 
    SET(rd_dst_is_reg);
    SET(rd_req_reg);
 
    IF(rd_modregrm_mod == 2'b11);
        SET(rd_req_rm);
    ENDIF();
 
    IF(rd_modregrm_mod != 2'b11);
        SET(rd_req_memory);
    ENDIF();
ENDIF();

 

IF(exe_cmd == `CMD_XCHG && exe_cmdex == `CMDEX_XCHG_implicit);
 
    SET(exe_result,  src);
    SET(exe_result2, dst);
 
ENDIF();

 

IF(exe_cmd == `CMD_XCHG && exe_cmdex == `CMDEX_XCHG_modregrm);
 
    SET(exe_result,  src);
    SAVE(exe_buffer, dst);
ENDIF();

 

IF(exe_cmd == `CMD_XCHG && exe_cmdex == `CMDEX_XCHG_modregrm_LAST);
 
    SET(exe_result, exe_buffer);
 
ENDIF();

 

IF(wr_cmd == `CMD_XCHG && wr_cmdex == `CMDEX_XCHG_implicit);
    SET(write_regrm);
 
    SAVE(eax, (wr_operand_16bit)? { eax[31:16], result2[15:0] } : result2);
ENDIF();

 

IF(wr_cmd == `CMD_XCHG && wr_cmdex == `CMDEX_XCHG_modregrm);
    IF(wr_dst_is_memory && ~(write_for_wr_ready)); SET(wr_waiting); ENDIF();
 
    SET(write_regrm,             wr_dst_is_rm);
    SET(write_rmw_virtual,       wr_dst_is_memory);
 
    SET(wr_not_finished);
ENDIF();

 

IF(wr_cmd == `CMD_XCHG && wr_cmdex == `CMDEX_XCHG_modregrm_LAST);
 
    SET(write_regrm);
ENDIF();

 

Line No.	Rev	Author	Line
1	2	alfik
2
3			`define CMD_XCHG #AUTOGEN_NEXT_CMD
4
5			`define CMDEX_XCHG_implicit 4'd0
6			`define CMDEX_XCHG_modregrm 4'd1
7			`define CMDEX_XCHG_modregrm_LAST 4'd2
8
9
10
11			`dec_ready_one && { decoder[7:3], 3'b0 } == 8'h90`
12			`CMD_XCHG
13			SET(dec_cmdex, `CMDEX_XCHG_implicit);
14			`SET(consume_one);`
15
16
17
18			`dec_ready_modregrm_one && { decoder[7:1], 1'b0 } == 8'h86`
19			prefix_group_1_lock && `DEC_MODREGRM_IS_MOD_11
20			`CMD_XCHG
21			SET(dec_cmdex, `CMDEX_XCHG_modregrm);
22			`IF(decoder[0] == 1'b0); SET(dec_is_8bit); ENDIF();`
23			`SET(consume_modregrm_one);`
24			`SET(dec_is_complex);`
25
26
27
28			`CMDEX_XCHG_modregrm
29			LAST(`CMDEX_XCHG_modregrm_LAST);
30
31
32
33			IF(rd_cmd == `CMD_XCHG && rd_cmdex == `CMDEX_XCHG_implicit);
34
35			`SET(rd_src_is_eax);`
36			`SET(rd_dst_is_implicit_reg);`
37
38			`SET(rd_req_implicit_reg);`
39			`SET(rd_req_eax);`
40
41			`IF(rd_mutex_busy_implicit_reg \|\| rd_mutex_busy_eax); SET(rd_waiting); ENDIF();`
42			`ENDIF();`
43
44
45
46			IF(rd_cmd == `CMD_XCHG && rd_cmdex == `CMDEX_XCHG_modregrm);
47
48			`SET(rd_src_is_reg);`
49
50			`// dst: reg, src: reg`
51			`IF(rd_modregrm_mod == 2'b11);`
52
53			`SET(rd_dst_is_rm);`
54
55			`IF(rd_mutex_busy_modregrm_reg \|\| rd_mutex_busy_modregrm_rm); SET(rd_waiting); ENDIF();`
56			`ENDIF();`
57
58			`// dst: memory, src: reg`
59			`IF(rd_modregrm_mod != 2'b11);`
60
61			`SET(rd_dst_is_memory);`
62
63			`IF(rd_mutex_busy_modregrm_reg \|\| rd_mutex_busy_memory); SET(rd_waiting);`
64			`ELSE();`
65			`SET(read_rmw_virtual);`
66
67			`IF(~(read_for_rd_ready)); SET(rd_waiting); ENDIF();`
68			`ENDIF();`
69			`ENDIF();`
70			`ENDIF();`
71
72
73
74			IF(rd_cmd == `CMD_XCHG && rd_cmdex == `CMDEX_XCHG_modregrm_LAST);
75
76			`SET(rd_dst_is_reg);`
77			`SET(rd_req_reg);`
78
79			`IF(rd_modregrm_mod == 2'b11);`
80			`SET(rd_req_rm);`
81			`ENDIF();`
82
83			`IF(rd_modregrm_mod != 2'b11);`
84			`SET(rd_req_memory);`
85			`ENDIF();`
86			`ENDIF();`
87
88
89
90			IF(exe_cmd == `CMD_XCHG && exe_cmdex == `CMDEX_XCHG_implicit);
91
92			`SET(exe_result, src);`
93			`SET(exe_result2, dst);`
94
95			`ENDIF();`
96
97
98
99			IF(exe_cmd == `CMD_XCHG && exe_cmdex == `CMDEX_XCHG_modregrm);
100
101			`SET(exe_result, src);`
102			`SAVE(exe_buffer, dst);`
103			`ENDIF();`
104
105
106
107			IF(exe_cmd == `CMD_XCHG && exe_cmdex == `CMDEX_XCHG_modregrm_LAST);
108
109			`SET(exe_result, exe_buffer);`
110
111			`ENDIF();`
112
113
114
115			IF(wr_cmd == `CMD_XCHG && wr_cmdex == `CMDEX_XCHG_implicit);
116			`SET(write_regrm);`
117
118			`SAVE(eax, (wr_operand_16bit)? { eax[31:16], result2[15:0] } : result2);`
119			`ENDIF();`
120
121
122
123			IF(wr_cmd == `CMD_XCHG && wr_cmdex == `CMDEX_XCHG_modregrm);
124			`IF(wr_dst_is_memory && ~(write_for_wr_ready)); SET(wr_waiting); ENDIF();`
125
126			`SET(write_regrm, wr_dst_is_rm);`
127			`SET(write_rmw_virtual, wr_dst_is_memory);`
128
129			`SET(wr_not_finished);`
130			`ENDIF();`
131
132
133
134			IF(wr_cmd == `CMD_XCHG && wr_cmdex == `CMDEX_XCHG_modregrm_LAST);
135
136			`SET(write_regrm);`
137			`ENDIF();`
138
139

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[/] [ao486/] [trunk/] [rtl/] [ao486/] [commands/] [CMD_XCHG.txt] - Blame information for rev 2