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[/] [ao486/] [trunk/] [rtl/] [ao486/] [commands/] [CMD_int.txt] - Blame information for rev 2

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1 2 alfik 
 
2
3 
`define CMD_int         #AUTOGEN_NEXT_CMD
4 
 
5 
// need to set:
6 
//-------------
7 
// exc_soft_int          -- is software interrupt
8 
// exc_soft_int_ib       -- is software interrupt from INT Ib
9 
// exc_push_error        --
10 
// exc_error_code        --
11 
// exc_vector            --
12 
`define CMDEX_int_STEP_0        4'd0
13 
`define CMDEX_int_STEP_1        4'd1
14 
 
15 
`define CMDEX_int_real_STEP_0   4'd2
16 
`define CMDEX_int_real_STEP_1   4'd3
17 
`define CMDEX_int_real_STEP_2   4'd4
18 
 
19 
// glob_param_2   -- eip
20 
`define CMDEX_int_real_STEP_3   4'd5
21 
`define CMDEX_int_real_STEP_4   4'd6
22 
`define CMDEX_int_real_STEP_5   4'd7
23 
 
24 
`define CMDEX_int_protected_STEP_0  4'd8
25 
`define CMDEX_int_protected_STEP_1  4'd9
26 
// wait for gate descriptor
27 
`define CMDEX_int_protected_STEP_2  4'd10
28 
 
29 
`define CMDEX_int_task_gate_STEP_0  4'd11
30 
`define CMDEX_int_task_gate_STEP_1  4'd12
31 
 
32 
`define CMDEX_int_int_trap_gate_STEP_0  4'd13
33 
// glob_param_1[15:0]  -- CS selector
34 
// glob_param_1[18:16] -- CS segment type
35 
// glob_param_1[19]    -- 0: 286, 1: 386 GATE
36 
// glob_param_1[20]    -- 0: interrupt, 1: trap
37 
// glob_param_2        -- eip
38 
 
39 
// glob_descriptor -- new cs descriptor
40 
 
41 
`define CMDEX_int_int_trap_gate_STEP_1  4'd14
42 
`define CMDEX_int_int_trap_gate_STEP_2  4'd15
43 
 
44 
//------------------------------------------------------------------------------
45 
 
46 
`define CMD_int_2       #AUTOGEN_NEXT_CMD
47 
 
48 
`define CMDEX_int_2_int_trap_gate_same_STEP_0   4'd0
49 
`define CMDEX_int_2_int_trap_gate_same_STEP_1   4'd1
50 
`define CMDEX_int_2_int_trap_gate_same_STEP_2   4'd2
51 
`define CMDEX_int_2_int_trap_gate_same_STEP_3   4'd3
52 
 
53 
`define CMDEX_int_2_int_trap_gate_same_STEP_4   4'd4
54 
`define CMDEX_int_2_int_trap_gate_same_STEP_5   4'd5
55 
 
56 
`define CMDEX_int_2_int_trap_gate_more_STEP_0   4'd6
57 
`define CMDEX_int_2_int_trap_gate_more_STEP_1   4'd7
58 
 
59 
// glob_param_1[15:0]  -- CS selector
60 
// glob_param_1[18:16] -- CS segment type
61 
// glob_param_1[19]    -- 0: 286, 1: 386 GATE
62 
// glob_param_1[20]    -- 0: interrupt, 1: trap
63 
// glob_param_2        -- eip
64 
// glob_param_3[15:0]  -- new ss
65 
// glob_param_4        -- new esp
66 
 
67 
// mc_descriptor -- new cs descriptor
68 
 
69 
//after exe:
70 
// glob_param_1[15:0]  -- new ss
71 
// glob_param_1[18:16] -- SS type
72 
// glob_param_2        -- new eip
73 
// glob_param_3        -- cs selector, type, 286/386 interrupt/trap
74 
// glob_param_4        -- new esp
75 
 
76 
// glob_descriptor_2   -- new cs descriptor
77 
 
78 
`define CMDEX_int_2_int_trap_gate_more_STEP_2   4'd8
79 
`define CMDEX_int_2_int_trap_gate_more_STEP_3   4'd9
80 
 
81 
//v8086 mode
82 
`define CMDEX_int_2_int_trap_gate_more_STEP_4   4'd10
83 
`define CMDEX_int_2_int_trap_gate_more_STEP_5   4'd11
84 
`define CMDEX_int_2_int_trap_gate_more_STEP_6   4'd12
85 
`define CMDEX_int_2_int_trap_gate_more_STEP_7   4'd13
86 
 
87 
//push interrupt data
88 
`define CMDEX_int_2_int_trap_gate_more_STEP_8   4'd14
89 
`define CMDEX_int_2_int_trap_gate_more_STEP_9   4'd15
90 
 
91 
//------------------------------------------------------------------------------
92 
 
93 
`define CMD_int_3       #AUTOGEN_NEXT_CMD
94 
 
95 
//push interrupt data
96 
`define CMDEX_int_3_int_trap_gate_more_STEP_0   4'd0
97 
`define CMDEX_int_3_int_trap_gate_more_STEP_1   4'd1
98 
`define CMDEX_int_3_int_trap_gate_more_STEP_2   4'd2
99 
 
100 
// push error code
101 
`define CMDEX_int_3_int_trap_gate_more_STEP_3   4'd3
102 
 
103 
// save cs
104 
`define CMDEX_int_3_int_trap_gate_more_STEP_4   4'd4
105 
 
106 
//after exe:
107 
// glob_param_1[15:0]  -- CS selector
108 
// glob_param_1[18:16] -- CS segment type
109 
// glob_param_1[19]    -- 0: 286, 1: 386 GATE
110 
// glob_param_1[20]    -- 0: interrupt, 1: trap
111 
// glob_param_2        -- eip
112 
// glob_param_3[15:0]  -- new ss
113 
// glob_param_3[18:16] -- SS type
114 
// glob_param_4        -- new esp
115 
 
116 
// glob_descriptor    -- new cs descriptor
117 
// glob_descriptor_2  -- new ss descriptor
118 
 
119 
 
120 
// save ss
121 
`define CMDEX_int_3_int_trap_gate_more_STEP_5   4'd5
122 
 
123 
// save eip; if v8086 - invalidate seg reg
124 
`define CMDEX_int_3_int_trap_gate_more_STEP_6   4'd6
125
126 
 
127 
 
128
129 
`CMDEX_int_STEP_0
130 
`CMDEX_int_STEP_1
131 
 
132 
//real mode
133 
IF(`CMDEX_int_STEP_1 && real_mode);
134 
    `CMDEX_int_real_STEP_0
135 
    `CMDEX_int_real_STEP_1
136 
    `CMDEX_int_real_STEP_2
137 
    `CMDEX_int_real_STEP_3
138 
    `CMDEX_int_real_STEP_4
139 
    CALL(`CMDEX_load_seg_STEP_1);
140 
    LOOP(`CMDEX_int_real_STEP_5);
141 
ENDIF();
142 
 
143 
// v8086 / protected mode
144 
IF(`CMDEX_int_STEP_1 && ~(real_mode));
145 
    `CMDEX_int_protected_STEP_0
146 
    `CMDEX_int_protected_STEP_1
147 
    `CMDEX_int_protected_STEP_2
148 
 
149 
    IF(`CMDEX_int_protected_STEP_2 && glob_descriptor[`DESC_BITS_TYPE] == `DESC_TASK_GATE);
150 
        `CMDEX_int_task_gate_STEP_0
151 
        `CMDEX_int_task_gate_STEP_1
152 
        JMP(`CMDEX_task_switch_STEP_1);
153 
    ENDIF();
154 
 
155 
    IF(`CMDEX_int_protected_STEP_2 && glob_descriptor[`DESC_BITS_TYPE] != `DESC_TASK_GATE);
156 
        `CMDEX_int_int_trap_gate_STEP_0
157 
        `CMDEX_int_int_trap_gate_STEP_1
158 
        `CMDEX_int_int_trap_gate_STEP_2
159 
 
160 
        //interrupt trap gate more
161 
        IF(`CMDEX_int_int_trap_gate_STEP_2 && `DESC_IS_CODE_NON_CONFORMING(glob_descriptor) && glob_descriptor[`DESC_BITS_DPL] < cpl);
162 
            `CMDEX_int_2_int_trap_gate_more_STEP_0
163 
            `CMDEX_int_2_int_trap_gate_more_STEP_1
164 
            `CMDEX_int_2_int_trap_gate_more_STEP_2
165 
            `CMDEX_int_2_int_trap_gate_more_STEP_3
166 
 
167 
            IF(`CMDEX_int_2_int_trap_gate_more_STEP_3 && v8086_mode);
168 
                `CMDEX_int_2_int_trap_gate_more_STEP_4
169 
                `CMDEX_int_2_int_trap_gate_more_STEP_5
170 
                `CMDEX_int_2_int_trap_gate_more_STEP_6
171 
                `CMDEX_int_2_int_trap_gate_more_STEP_7
172 
                `CMDEX_int_2_int_trap_gate_more_STEP_8
173 
            ENDIF();
174 
 
175 
            IF(`CMDEX_int_2_int_trap_gate_more_STEP_3 && ~(v8086_mode));
176 
                `CMDEX_int_2_int_trap_gate_more_STEP_8
177 
            ENDIF();
178 
 
179 
            `CMDEX_int_2_int_trap_gate_more_STEP_9
180 
            `CMDEX_int_3_int_trap_gate_more_STEP_0
181 
            `CMDEX_int_3_int_trap_gate_more_STEP_1
182 
            `CMDEX_int_3_int_trap_gate_more_STEP_2
183 
 
184 
            IF(`CMDEX_int_3_int_trap_gate_more_STEP_2 && exc_push_error);
185 
                `CMDEX_int_3_int_trap_gate_more_STEP_3
186 
                `CMDEX_int_3_int_trap_gate_more_STEP_4
187 
            ENDIF();
188 
 
189 
            IF(`CMDEX_int_3_int_trap_gate_more_STEP_2 && ~(exc_push_error));
190 
                `CMDEX_int_3_int_trap_gate_more_STEP_4
191 
            ENDIF();
192 
 
193 
            `CMDEX_int_3_int_trap_gate_more_STEP_5
194 
            LOOP(`CMDEX_int_3_int_trap_gate_more_STEP_6);
195 
 
196 
        ENDIF();
197 
 
198 
        //interrupt trap gate same
199 
        IF(`CMDEX_int_int_trap_gate_STEP_2 && ~(`DESC_IS_CODE_NON_CONFORMING(glob_descriptor) && glob_descriptor[`DESC_BITS_DPL] < cpl));
200 
            `CMDEX_int_2_int_trap_gate_same_STEP_0
201 
            `CMDEX_int_2_int_trap_gate_same_STEP_1
202 
            `CMDEX_int_2_int_trap_gate_same_STEP_2
203 
 
204 
            IF(`CMDEX_int_2_int_trap_gate_same_STEP_2 && exc_push_error);
205 
                `CMDEX_int_2_int_trap_gate_same_STEP_3
206 
                `CMDEX_int_2_int_trap_gate_same_STEP_4
207 
            ENDIF();
208 
 
209 
            IF(`CMDEX_int_2_int_trap_gate_same_STEP_2 && ~(exc_push_error));
210 
                `CMDEX_int_2_int_trap_gate_same_STEP_4
211 
            ENDIF();
212 
 
213 
            LOOP(`CMDEX_int_2_int_trap_gate_same_STEP_5);
214 
        ENDIF();
215 
 
216 
    ENDIF();
217 
ENDIF();
218
219 
 
220 
 
221
222 
IF(rd_cmd == `CMD_int && rd_cmdex == `CMDEX_int_task_gate_STEP_0);
223 
 
224 
    IF(rd_mutex_busy_active); SET(rd_waiting);  // wait for previous step -- loading glob_param_1
225 
    ELSE();
226 
        SET(rd_glob_param_1_set);
227 
        SET(rd_glob_param_1_value, { 16'd0, glob_descriptor[31:16] });
228 
    ENDIF();
229 
ENDIF();
230
231 
 
232
233 
IF(rd_cmd == `CMD_int && rd_cmdex == `CMDEX_int_task_gate_STEP_1);
234 
 
235 
//TODO: null not checked
236 
    IF(glob_param_1[`SELECTOR_BIT_TI] == 1'b0); // skip if TI set
237 
 
238 
        SET(rd_error_code, `SELECTOR_FOR_CODE(glob_param_1));
239 
 
240 
        SET(rd_glob_descriptor_set);
241 
        SET(rd_glob_descriptor_value, read_8);
242 
 
243 
        SET(read_system_descriptor);
244 
 
245 
        IF(~(read_for_rd_ready)); SET(rd_waiting); ENDIF();
246 
    ENDIF();
247 
ENDIF();
248
249 
 
250
251 
IF(rd_cmd == `CMD_int && rd_cmdex == `CMDEX_int_int_trap_gate_STEP_1);
252 
 
253 
    IF(rd_mutex_busy_active); SET(rd_waiting); // wait for previous step -- loading glob_param_1
254 
    ELSE();
255 
 
256 
        IF(glob_param_1[15:2] != 14'd0); // load null
257 
 
258 
            SET(rd_error_code, `SELECTOR_FOR_CODE(glob_param_1));
259 
 
260 
            SET(rd_glob_descriptor_set);
261 
            SET(rd_glob_descriptor_value, read_8);
262 
 
263 
            SET(read_system_descriptor);
264 
 
265 
            IF(~(read_for_rd_ready)); SET(rd_waiting);
266 
            ENDIF();
267 
        ENDIF();
268 
    ENDIF();
269 
ENDIF();
270
271 
 
272
273 
IF(rd_cmd == `CMD_int && rd_cmdex == `CMDEX_int_real_STEP_3);
274 
 
275 
    SET(rd_system_linear, idtr_base + { 22'd0, exc_vector[7:0], 2'b00 });
276 
 
277 
    SET(rd_glob_param_2_set);
278 
    SET(rd_glob_param_2_value, { 16'd0, read_4[15:0] });
279 
 
280 
    IF(rd_mutex_busy_active); SET(rd_waiting); // wait for previous step -- push on stack
281 
    ELSE();
282 
 
283 
        SET(read_system_word);
284 
 
285 
        IF(~(read_for_rd_ready)); SET(rd_waiting); ENDIF();
286 
    ENDIF();
287 
ENDIF();
288
289 
 
290
291 
IF(rd_cmd == `CMD_int && rd_cmdex == `CMDEX_int_real_STEP_4);
292 
 
293 
    SET(rd_system_linear, idtr_base + { 22'd0, exc_vector[7:0], 2'b10 });
294 
 
295 
    SET(rd_glob_param_1_set);
296 
    SET(rd_glob_param_1_value, { 13'd0, `SEGMENT_CS, read_4[15:0] });
297 
 
298 
    IF(rd_mutex_busy_active); SET(rd_waiting);  // wait for previous step -- exception possible
299 
    ELSE();
300 
 
301 
        SET(read_system_word);
302 
 
303 
        IF(~(read_for_rd_ready)); SET(rd_waiting); ENDIF();
304 
    ENDIF();
305 
ENDIF();
306
307 
 
308
309 
IF(rd_cmd == `CMD_int && rd_cmdex == `CMDEX_int_protected_STEP_1);
310 
 
311 
    SET(rd_system_linear, idtr_base + { 21'd0, exc_vector[7:0], 3'b000 });
312 
 
313 
    SET(rd_glob_descriptor_set);
314 
    SET(rd_glob_descriptor_value, read_8);
315 
 
316 
    IF(rd_mutex_busy_active); SET(rd_waiting);  // wait for previous step -- exception possible
317 
    ELSE();
318 
        SET(read_system_qword);
319 
 
320 
        IF(~(read_for_rd_ready)); SET(rd_waiting); ENDIF();
321 
    ENDIF();
322 
ENDIF();
323
324 
 
325
326 
IF(exe_cmd == `CMD_int && exe_cmdex == `CMDEX_int_int_trap_gate_STEP_0);
327 
 
328 
    SET(exe_glob_param_1_set);
329 
    SET(exe_glob_param_1_value, { 11'd0, glob_descriptor[`DESC_BIT_TYPE_BIT_0], glob_descriptor[`DESC_BITS_TYPE] >= `DESC_INTERRUPT_GATE_386, `SEGMENT_CS, glob_descriptor[31:16] });
330 
 
331 
    SET(exe_glob_param_2_set);
332 
    SET(exe_glob_param_2_value, (glob_descriptor[`DESC_BITS_TYPE] >= `DESC_INTERRUPT_GATE_386)? { glob_descriptor[63:48], glob_descriptor[15:0] } : { 16'd0, glob_descriptor[15:0] });
333 
ENDIF();
334
335 
 
336
337 
IF(exe_cmd == `CMD_int_2 && exe_cmdex == `CMDEX_int_2_int_trap_gate_more_STEP_1);
338 
 
339 
    IF(v8086_mode && exe_descriptor[`DESC_BITS_DPL] != 2'd0);
340 
        SET(exe_waiting);
341 
        SET(exe_trigger_gp_fault); //exception GP(val)
342 
        SET(exe_error_code, `SELECTOR_FOR_CODE(glob_param_1));
343 
    ENDIF();
344 
 
345 
    IF(~(exe_trigger_gp_fault) && glob_param_3[15:2] == 14'd0);
346 
        SET(exe_waiting);
347 
        SET(exe_trigger_ts_fault); //exception TS(0)
348 
    ENDIF();
349 
 
350 
    IF(exe_ready);
351 
        SET(exe_glob_param_1_set);
352 
        SET(exe_glob_param_1_value, { 13'd0, `SEGMENT_SS, glob_param_3[15:0] });
353 
 
354 
        SET(exe_glob_param_3_set);
355 
        SET(exe_glob_param_3_value, glob_param_1);
356 
 
357 
        SET(exe_glob_descriptor_2_set);
358 
        SET(exe_glob_descriptor_2_value, glob_descriptor);
359 
    ENDIF();
360 
ENDIF();
361
362 
 
363
364 
IF(exe_cmd == `CMD_int_2 && exe_cmdex == `CMDEX_int_2_int_trap_gate_more_STEP_3);
365 
 
366 
    SET(offset_new_stack);
367 
 
368 
    IF(glob_param_2 > glob_desc_2_limit);
369 
        SET(exe_waiting);
370 
        SET(exe_trigger_gp_fault); //exception GP(0)
371 
    ENDIF();
372 
ENDIF();
373
374 
 
375
376 
IF(exe_cmd == `CMD_int_2 && exe_cmdex == `CMDEX_int_2_int_trap_gate_same_STEP_5);
377 
    SET(exe_eip_from_glob_param_2);
378 
ENDIF();
379
380 
 
381
382 
IF(exe_cmd == `CMD_int_3 && (exe_cmdex == `CMDEX_int_3_int_trap_gate_more_STEP_4 || exe_cmdex == `CMDEX_int_3_int_trap_gate_more_STEP_5));
383 
 
384 
    IF(exe_mutex_current[`MUTEX_ACTIVE_BIT]); SET(exe_waiting); ENDIF();
385 
 
386 
    IF(~(exe_mutex_current[`MUTEX_ACTIVE_BIT]) && exe_ready);
387 
 
388 
        SET(exe_glob_param_1_set);
389 
        SET(exe_glob_param_1_value, glob_param_3);
390 
 
391 
        SET(exe_glob_param_3_set);
392 
        SET(exe_glob_param_3_value, glob_param_1);
393 
 
394 
        SET(exe_glob_descriptor_2_set);
395 
        SET(exe_glob_descriptor_2_value, glob_descriptor);
396 
 
397 
        SET(exe_glob_descriptor_set);
398 
        SET(exe_glob_descriptor_value, glob_descriptor_2);
399 
    ENDIF();
400 
ENDIF();
401
402 
 
403
404 
IF(exe_cmd == `CMD_int_3 && exe_cmdex == `CMDEX_int_3_int_trap_gate_more_STEP_6);
405 
    SET(exe_eip_from_glob_param_2);
406 
ENDIF();
407
408 
 
409
410 
IF(exe_cmd == `CMD_int && exe_cmdex == `CMDEX_int_STEP_0);
411 
 
412 
    IF(exe_mutex_current[`MUTEX_ACTIVE_BIT]); SET(exe_waiting);  ENDIF(); // wait for finish
413 
ENDIF();
414
415 
 
416
417 
IF(exe_cmd == `CMD_int && exe_cmdex == `CMDEX_int_STEP_1);
418 
 
419 
    IF(exc_soft_int_ib && v8086_mode && iopl < 2'd3);
420 
        SET(exe_waiting);
421 
        SET(exe_trigger_gp_fault); //exception GP(0)
422 
    ENDIF();
423 
ENDIF();
424
425 
 
426
427 
IF(exe_cmd == `CMD_int && exe_cmdex == `CMDEX_int_real_STEP_0);
428 
 
429 
    SET(exe_result_push, exe_push_eflags);
430 
    SET(offset_int_real);
431 
 
432 
    IF({ 6'd0, exc_vector[7:0], 2'b11 } > idtr_limit);
433 
        SET(exe_waiting);
434 
        SET(exe_trigger_gp_fault); //exception GP(0)
435 
    ENDIF();
436 
ENDIF();
437
438 
 
439
440 
IF(exe_cmd == `CMD_int && exe_cmdex == `CMDEX_int_real_STEP_1);
441 
    SET(offset_int_real_next);
442 
    SET(exe_result_push, { 16'd0, cs[15:0] });
443 
ENDIF();
444
445 
 
446
447 
IF(exe_cmd == `CMD_int && exe_cmdex == `CMDEX_int_real_STEP_2);
448 
    SET(offset_int_real_next);
449 
    SET(exe_result_push, exe_eip);
450 
ENDIF();
451
452 
 
453
454 
IF(exe_cmd == `CMD_int && exe_cmdex == `CMDEX_int_real_STEP_3);
455 
 
456 
    IF(glob_param_2 > cs_limit);
457 
        SET(exe_waiting);
458 
        SET(exe_trigger_gp_fault); //exception GP(0)
459 
    ENDIF();
460 
ENDIF();
461
462 
 
463
464 
IF(exe_cmd == `CMD_int && exe_cmdex == `CMDEX_int_real_STEP_5);
465 
    SET(exe_eip_from_glob_param_2);
466 
ENDIF();
467
468 
 
469
470 
IF(exe_cmd == `CMD_int && exe_cmdex == `CMDEX_int_protected_STEP_0);
471 
 
472 
    IF({ 5'd0, exc_vector[7:0], 3'b111 } > idtr_limit);
473 
        SET(exe_waiting);
474 
        SET(exe_trigger_gp_fault); //exception GP(vector*8 +2)
475 
        SET(exe_error_code, { 5'd0, exc_vector[7:0], 3'b010 });
476 
    ENDIF();
477 
ENDIF();
478
479 
 
480
481 
IF(exe_cmd == `CMD_int && exe_cmdex == `CMDEX_int_protected_STEP_1);
482 
 
483 
    IF(exe_descriptor[`DESC_BIT_SEG] || (
484 
        (   exe_descriptor[`DESC_BITS_TYPE] != `DESC_TASK_GATE &&
485 
            exe_descriptor[`DESC_BITS_TYPE] != `DESC_INTERRUPT_GATE_386 && exe_descriptor[`DESC_BITS_TYPE] != `DESC_INTERRUPT_GATE_286 &&
486 
            exe_descriptor[`DESC_BITS_TYPE] != `DESC_TRAP_GATE_386      && exe_descriptor[`DESC_BITS_TYPE] != `DESC_TRAP_GATE_286
487 
        ) ||
488 
        (exc_soft_int && exe_descriptor[`DESC_BITS_DPL] < cpl)
489 
    ));
490 
        SET(exe_waiting);
491 
        SET(exe_trigger_gp_fault); //exception GP(val)
492 
        SET(exe_error_code, { 5'd0, exc_vector[7:0], 3'b010 });
493 
    ENDIF();
494 
 
495 
    IF(~(exe_trigger_gp_fault) && exe_descriptor[`DESC_BIT_P] == `FALSE);
496 
        SET(exe_waiting);
497 
        SET(exe_trigger_np_fault); //exception GP(val)
498 
        SET(exe_error_code, { 5'd0, exc_vector[7:0], 3'b010 });
499 
    ENDIF();
500 
ENDIF();
501
502 
 
503
504 
wire exe_int_2_int_trap_same_exception;
505 
 
506 
assign exe_int_2_int_trap_same_exception = (v8086_mode && (`DESC_IS_CODE_CONFORMING(exe_descriptor) || exe_descriptor[`DESC_BITS_DPL] != 2'd0));
507
508 
 
509
510 
IF(exe_cmd == `CMD_int_2 && exe_cmdex == `CMDEX_int_2_int_trap_gate_same_STEP_0);
511 
 
512 
    SET(exe_result_push, exe_push_eflags);
513 
    SET(offset_call_int_same_first);
514 
 
515 
    IF(exe_int_2_int_trap_same_exception || (glob_param_2 > glob_desc_limit));
516 
 
517 
        SET(exe_waiting);
518 
        SET(exe_trigger_gp_fault); //exception GP(val)
519 
        SET(exe_error_code, (exe_int_2_int_trap_same_exception)? `SELECTOR_FOR_CODE(glob_param_1) : 16'd0);
520 
    ENDIF();
521 
ENDIF();
522
523 
 
524
525 
IF(exe_cmd == `CMD_int_2 && exe_cmdex == `CMDEX_int_2_int_trap_gate_same_STEP_1);
526 
    SET(exe_result_push, { 16'd0, cs[15:0] });
527 
    SET(offset_call_int_same_next);
528 
ENDIF();
529
530 
 
531
532 
IF(exe_cmd == `CMD_int_2 && exe_cmdex == `CMDEX_int_2_int_trap_gate_same_STEP_2);
533 
    SET(exe_result_push, exe_eip);
534 
    SET(offset_call_int_same_next);
535 
ENDIF();
536
537 
 
538
539 
IF(exe_cmd == `CMD_int_2 && exe_cmdex == `CMDEX_int_2_int_trap_gate_same_STEP_3);
540 
    SET(exe_result_push, { 16'd0, exc_error_code[15:0] });
541 
    SET(offset_call_int_same_next);
542 
ENDIF();
543
544 
 
545
546 
IF(exe_cmd == `CMD_int_2  && exe_cmdex >= `CMDEX_int_2_int_trap_gate_more_STEP_4);
547 
    SET(exe_result_push,    (exe_cmdex == `CMDEX_int_2_int_trap_gate_more_STEP_4)?  { 16'd0, gs } :
548 
                            (exe_cmdex == `CMDEX_int_2_int_trap_gate_more_STEP_5)?  { 16'd0, fs } :
549 
                            (exe_cmdex == `CMDEX_int_2_int_trap_gate_more_STEP_6)?  { 16'd0, ds } :
550 
                            (exe_cmdex == `CMDEX_int_2_int_trap_gate_more_STEP_7)?  { 16'd0, es } :
551 
                            (exe_cmdex == `CMDEX_int_2_int_trap_gate_more_STEP_8)?  { 16'd0, ss } :
552 
                                                                                    esp);
553 
 
554 
    SET(offset_new_stack_continue);
555 
ENDIF();
556
557 
 
558
559 
IF(exe_cmd == `CMD_int_3  && exe_cmdex == `CMDEX_int_3_int_trap_gate_more_STEP_0);
560 
    SET(exe_result_push, exe_push_eflags);
561 
    SET(offset_new_stack_continue);
562 
ENDIF();
563
564 
 
565
566 
IF(exe_cmd == `CMD_int_3  && exe_cmdex == `CMDEX_int_3_int_trap_gate_more_STEP_1);
567 
    SET(exe_result_push, { 16'd0, cs[15:0] });
568 
    SET(offset_new_stack_continue);
569 
ENDIF();
570
571 
 
572
573 
IF(exe_cmd == `CMD_int_3  && exe_cmdex == `CMDEX_int_3_int_trap_gate_more_STEP_2);
574 
    SET(exe_result_push, exe_eip);
575 
    SET(offset_new_stack_continue);
576 
ENDIF();
577
578 
 
579
580 
IF(exe_cmd == `CMD_int_3  && exe_cmdex == `CMDEX_int_3_int_trap_gate_more_STEP_3);
581 
    SET(exe_result_push, { 16'd0, exc_error_code[15:0] });
582 
    SET(offset_new_stack_continue);
583 
ENDIF();
584
585 
 
586
587 
IF(wr_cmd == `CMD_int_2  && wr_cmdex == `CMDEX_int_2_int_trap_gate_more_STEP_2);
588 
    SET(wr_not_finished);
589 
ENDIF();
590
591 
 
592
593 
IF(wr_cmd == `CMD_int_2  && wr_cmdex == `CMDEX_int_2_int_trap_gate_more_STEP_3);
594 
    SET(wr_not_finished);
595 
ENDIF();
596
597 
 
598
599 
IF(wr_cmd == `CMD_int_2 && (
600 
    wr_cmdex == `CMDEX_int_2_int_trap_gate_more_STEP_4 || wr_cmdex == `CMDEX_int_2_int_trap_gate_more_STEP_5 ||
601 
    wr_cmdex == `CMDEX_int_2_int_trap_gate_more_STEP_6 || wr_cmdex == `CMDEX_int_2_int_trap_gate_more_STEP_7 ||
602 
    wr_cmdex == `CMDEX_int_2_int_trap_gate_more_STEP_8 || wr_cmdex == `CMDEX_int_2_int_trap_gate_more_STEP_9));
603 
 
604 
    SET(wr_not_finished);
605 
 
606 
    SET(wr_new_push_ss_fault_check);
607 
    SET(wr_one_cycle_wait);
608 
 
609 
    SET(wr_push_length_word,  ~(glob_param_3[19]));
610 
    SET(wr_push_length_dword, glob_param_3[19]);
611 
 
612 
    SET(wr_error_code, (glob_param_1[`SELECTOR_BITS_RPL] != cpl)? `SELECTOR_FOR_CODE(glob_param_1) : 16'd0);
613 
 
614 
    IF(~(write_for_wr_ready)); SET(wr_waiting); ENDIF();
615 
 
616 
    IF(~(wr_new_push_ss_fault));
617 
        SET(write_new_stack_virtual);
618 
 
619 
        //esp not yet updated
620 
    ENDIF();
621 
ENDIF();
622
623 
 
624
625 
IF(wr_cmd == `CMD_int_3 && (
626 
    wr_cmdex == `CMDEX_int_3_int_trap_gate_more_STEP_0 || wr_cmdex == `CMDEX_int_3_int_trap_gate_more_STEP_1 ||
627 
    wr_cmdex == `CMDEX_int_3_int_trap_gate_more_STEP_2 || wr_cmdex == `CMDEX_int_3_int_trap_gate_more_STEP_3));
628 
 
629 
    SET(wr_not_finished);
630 
 
631 
    SET(wr_new_push_ss_fault_check);
632 
    SET(wr_one_cycle_wait);
633 
 
634 
    SET(wr_push_length_word, ~(glob_param_3[19]));
635 
    SET(wr_push_length_dword, glob_param_3[19]);
636 
 
637 
    SET(wr_error_code, (glob_param_1[`SELECTOR_BITS_RPL] != cpl)? `SELECTOR_FOR_CODE(glob_param_1) : 16'd0);
638 
 
639 
    IF(~(write_for_wr_ready)); SET(wr_waiting); ENDIF();
640 
 
641 
    IF(~(wr_new_push_ss_fault));
642 
        SET(write_new_stack_virtual);
643 
 
644 
        IF((wr_cmdex == `CMDEX_int_3_int_trap_gate_more_STEP_2 && ~(exc_push_error)) || wr_cmdex == `CMDEX_int_3_int_trap_gate_more_STEP_3);
645 
            SAVE(esp, wr_new_stack_esp); // speculative set before
646 
        ENDIF();
647 
    ENDIF();
648 
ENDIF();
649
650 
 
651
652 
IF(wr_cmd == `CMD_int && wr_cmdex == `CMDEX_int_STEP_0);
653 
    SET(wr_not_finished);
654 
 
655 
    SET(wr_debug_trap_clear);
656 
 
657 
    SET(wr_make_esp_speculative);
658 
ENDIF();
659
660 
 
661
662 
IF(wr_cmd == `CMD_int && wr_cmdex == `CMDEX_int_STEP_1);
663 
    SET(wr_not_finished);
664 
ENDIF();
665
666 
 
667
668 
IF(wr_cmd == `CMD_int && (wr_cmdex == `CMDEX_int_real_STEP_3 || wr_cmdex == `CMDEX_int_real_STEP_4));
669 
    SET(wr_not_finished);
670 
ENDIF();
671
672 
 
673
674 
IF(wr_cmd == `CMD_int && wr_cmdex == `CMDEX_int_real_STEP_5);
675 
 
676 
    SET(wr_make_esp_commit);
677 
 
678 
    SAVE(iflag,  `FALSE);
679 
    SAVE(tflag,  `FALSE);
680 
    SAVE(acflag, `FALSE);
681 
    SAVE(rflag,  `FALSE);
682 
 
683 
    // clear pipeline
684 
    SET(wr_req_reset_pr);
685 
    SET(wr_req_reset_dec);
686 
    SET(wr_req_reset_micro);
687 
    SET(wr_req_reset_rd);
688 
    SET(wr_req_reset_exe);
689 
 
690 
    // finish exception/interrupt
691 
    SET(wr_exception_finished);
692 
ENDIF();
693
694 
 
695
696 
IF(wr_cmd == `CMD_int && (wr_cmdex == `CMDEX_int_protected_STEP_0 || wr_cmdex == `CMDEX_int_protected_STEP_1 || wr_cmdex == `CMDEX_int_protected_STEP_2));
697 
    SET(wr_not_finished);
698 
ENDIF();
699
700 
 
701
702 
IF(wr_cmd == `CMD_int_2 && wr_cmdex == `CMDEX_int_2_int_trap_gate_same_STEP_5);
703 
 
704 
    SET(wr_make_esp_commit);
705 
 
706 
    SAVE(iflag,  (glob_param_1[20] == 1'b0)? `FALSE : iflag);
707 
    SAVE(tflag,  `FALSE);
708 
    SAVE(ntflag, `FALSE);
709 
    SAVE(vmflag, `FALSE);
710 
    SAVE(rflag,  `FALSE);
711 
 
712 
    // clear pipeline
713 
    SET(wr_req_reset_pr);
714 
    SET(wr_req_reset_dec);
715 
    SET(wr_req_reset_micro);
716 
    SET(wr_req_reset_rd);
717 
    SET(wr_req_reset_exe);
718 
 
719 
    // finish exception/interrupt
720 
    SET(wr_exception_finished);
721 
ENDIF();
722
723 
 
724
725 
IF(wr_cmd == `CMD_int_3 && wr_cmdex == `CMDEX_int_3_int_trap_gate_more_STEP_6);
726 
 
727 
    SET(wr_make_esp_commit);
728 
 
729 
    SAVE(iflag,  (glob_param_3[20] == 1'b0)? `FALSE : iflag); // glob_param_3 -- cs info, interrupt/trap
730 
    SAVE(tflag,  `FALSE);
731 
    SAVE(ntflag, `FALSE);
732 
    SAVE(vmflag, `FALSE);
733 
    SAVE(rflag,  `FALSE);
734 
 
735 
    IF(v8086_mode);
736 
        SAVE(ds,             16'd0);
737 
        SAVE(ds_cache_valid, `FALSE);
738 
        SAVE(es,             16'd0);
739 
        SAVE(es_cache_valid, `FALSE);
740 
        SAVE(fs,             16'd0);
741 
        SAVE(fs_cache_valid, `FALSE);
742 
        SAVE(gs,             16'd0);
743 
        SAVE(gs_cache_valid, `FALSE);
744 
    ENDIF();
745 
 
746 
    // clear pipeline
747 
    SET(wr_req_reset_pr);
748 
    SET(wr_req_reset_dec);
749 
    SET(wr_req_reset_micro);
750 
    SET(wr_req_reset_rd);
751 
    SET(wr_req_reset_exe);
752 
 
753 
    // finish exception/interrupt
754 
    SET(wr_exception_finished);
755 
ENDIF();
756
757 
 
758
759 
IF(wr_cmd == `CMD_int && (wr_cmdex == `CMDEX_int_real_STEP_0 || wr_cmdex == `CMDEX_int_real_STEP_1 || wr_cmdex == `CMDEX_int_real_STEP_2));
760 
    SET(wr_not_finished);
761 
 
762 
    SET(wr_push_length_word);
763 
    SET(wr_push_ss_fault_check);
764 
    SET(wr_one_cycle_wait);
765 
 
766 
    IF(~(write_for_wr_ready)); SET(wr_waiting); ENDIF();
767 
 
768 
    IF(~(wr_push_ss_fault));
769 
        SET(write_stack_virtual);
770 
 
771 
        SAVE(esp, wr_stack_esp);
772 
    ENDIF();
773 
ENDIF();
774

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