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[/] [ao486/] [trunk/] [rtl/] [ao486/] [global_regs.v] - Blame information for rev 2

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1 2 alfik 
/*
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 * Copyright (c) 2014, Aleksander Osman
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 * All rights reserved.
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 *
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 * Redistribution and use in source and binary forms, with or without
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 * modification, are permitted provided that the following conditions are met:
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 *
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 * * Redistributions of source code must retain the above copyright notice, this
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 *   list of conditions and the following disclaimer.
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 *
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 * * Redistributions in binary form must reproduce the above copyright notice,
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 *   this list of conditions and the following disclaimer in the documentation
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 *   and/or other materials provided with the distribution.
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 *
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 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
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 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
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 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
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 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
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 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
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 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
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 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
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 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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 */
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`include "defines.v"
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module global_regs(
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    input               clk,
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    input               rst_n,
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    input               glob_param_1_set,
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    input       [31:0]  glob_param_1_value,
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    input               glob_param_2_set,
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    input       [31:0]  glob_param_2_value,
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    input               glob_param_3_set,
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    input       [31:0]  glob_param_3_value,
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    input               glob_param_4_set,
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    input       [31:0]  glob_param_4_value,
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    input               glob_param_5_set,
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    input       [31:0]  glob_param_5_value,
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    input               glob_descriptor_set,
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    input       [63:0]  glob_descriptor_value,
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    input               glob_descriptor_2_set,
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    input       [63:0]  glob_descriptor_2_value,
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    //output
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    output reg  [31:0]  glob_param_1,
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    output reg  [31:0]  glob_param_2,
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    output reg  [31:0]  glob_param_3,
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    output reg  [31:0]  glob_param_4,
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    output reg  [31:0]  glob_param_5,
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    output reg  [63:0]  glob_descriptor,
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    output reg  [63:0]  glob_descriptor_2,
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    output      [31:0]  glob_desc_base,
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    output      [31:0]  glob_desc_limit,
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    output      [31:0]  glob_desc_2_limit
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);
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//------------------------------------------------------------------------------
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assign glob_desc_limit = glob_descriptor[`DESC_BIT_G]? { glob_descriptor[51:48], glob_descriptor[15:0], 12'hFFF } : { 12'd0, glob_descriptor[51:48], glob_descriptor[15:0] };
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assign glob_desc_base  = { glob_descriptor[63:56], glob_descriptor[39:16] };
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assign glob_desc_2_limit = glob_descriptor_2[`DESC_BIT_G]? { glob_descriptor_2[51:48], glob_descriptor_2[15:0], 12'hFFF } : { 12'd0, glob_descriptor_2[51:48], glob_descriptor_2[15:0] };
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//------------------------------------------------------------------------------
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always @(posedge clk or negedge rst_n) begin
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    if(rst_n == 1'b0)           glob_param_1 <= 32'd0;
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    else if(glob_param_1_set)   glob_param_1 <= glob_param_1_value;
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end
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always @(posedge clk or negedge rst_n) begin
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    if(rst_n == 1'b0)           glob_param_2 <= 32'd0;
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    else if(glob_param_2_set)   glob_param_2 <= glob_param_2_value;
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end
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always @(posedge clk or negedge rst_n) begin
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    if(rst_n == 1'b0)           glob_param_3 <= 32'd0;
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    else if(glob_param_3_set)   glob_param_3 <= glob_param_3_value;
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end
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always @(posedge clk or negedge rst_n) begin
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    if(rst_n == 1'b0)           glob_param_4 <= 32'd0;
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    else if(glob_param_4_set)   glob_param_4 <= glob_param_4_value;
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end
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always @(posedge clk or negedge rst_n) begin
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    if(rst_n == 1'b0)           glob_param_5 <= 32'd0;
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    else if(glob_param_5_set)   glob_param_5 <= glob_param_5_value;
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end
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always @(posedge clk or negedge rst_n) begin
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    if(rst_n == 1'b0)               glob_descriptor <= 64'd0;
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    else if(glob_descriptor_set)    glob_descriptor <= glob_descriptor_value;
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end
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always @(posedge clk or negedge rst_n) begin
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    if(rst_n == 1'b0)               glob_descriptor_2 <= 64'd0;
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    else if(glob_descriptor_2_set)  glob_descriptor_2 <= glob_descriptor_2_value;
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end
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//------------------------------------------------------------------------------
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endmodule

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