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[/] [ao486/] [trunk/] [sim/] [verilator/] [soc/] [rtc/] [main.cpp] - Blame information for rev 2

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#include <cstdio>
#include <cstdlib>
 
#include "Vrtc.h"
#include "verilated.h"
#include "verilated_vcd_c.h"
 
//------------------------------------------------------------------------------
 
typedef unsigned int uint32;
typedef unsigned char uint8;
 
//------------------------------------------------------------------------------
 
enum state_t {
    S_IDLE,
 
    S_IO_READ_1,
    S_IO_READ_2,
    S_IO_READ_3,
 
    S_IO_WRITE_1,
    S_IO_WRITE_2,
    S_IO_WRITE_3,
 
    S_DELAY
};
 
uint32  address_base;
uint32  address;
uint32  byteena;
uint32  value_base;
uint32  value;
state_t state = S_IDLE;
uint32  shifted;
uint32  shifted_read;
uint32  length;
uint32  value_read;
 
uint32  delay;
 
void check_byteena(uint32 byteena) {
    if(byteena == 0 || byteena == 5 || byteena == 9 || byteena == 10 || byteena == 11 || byteena == 13) {
        printf("ERROR: invalid byteena: %x\n", byteena);
        exit(-1);
    }
 
    if((byteena & 0xC) != 0) {
        printf("ERROR: access to byteena: %x\n", byteena);
        exit(-1);
    }
 
    value_read = 0;
    address_base = address;
    value_base = value;
    shifted_read = 0;
 
    shifted = 0;
    for(uint32 i=0; i<4; i++) {
        if(byteena & 1) break;
 
        shifted++;
        address++;
        byteena >>= 1;
        value >>= 8;
    }
 
    length = 0;
    for(uint32 i=0; i<4; i++) {
        if(byteena & 1) length++;
 
        byteena >>= 1;
    }
}
 
bool is_address_ok(uint32 address) {
    if(address >= 0x0070 && address <= 0x071) return true;
 
    return false;
}
 
bool next_record() {
    static FILE *fp = NULL;
 
    if(fp == NULL) {
        fp = fopen("./../../../../backup/run-3/track.txt", "rb");
        if(fp == NULL) {
            printf("ERROR: can not open file.\n");
            exit(-1);
        }
    }
 
    do {
        char line[256];
        memset(line, 0, sizeof(line));
 
        char *res = fgets(line, sizeof(line), fp);
        if(res == NULL) {
            fclose(fp);
            fp = NULL;
            return false;
        }
 
//printf("line: %s\n", line);
 
        int count;
 
        count = sscanf(line, "io rd %x %x %x", &address, &byteena, &value);
        if(count == 3 && is_address_ok(address)) {
            check_byteena(byteena);
            state = S_IO_READ_1;
printf("line: %s", line);
            return true;
        }
        count = sscanf(line, "io wr %x %x %x", &address, &byteena, &value);
        if(count == 3 && is_address_ok(address)) {
            check_byteena(byteena);
            state = S_IO_WRITE_1;
printf("line: %s", line);
            return true;
        }
 
    } while(true);
 
    return false;
}
 
//------------------------------------------------------------------------------
 
uint32 fdd_type = 0x40;
uint32 hd_cylinders = 1024;
uint32 hd_heads = 16;
uint32 hd_spt = 63;
bool boot_from_floppy = true;
 
uint32 translate_byte = 0;
 
//rtc contents 0-127
unsigned int cmos[128] = {
    0x00, //0x00: SEC BCD
    0x00, //0x01: ALARM SEC BCD
    0x00, //0x02: MIN BCD
    0x00, //0x03: ALARM MIN BCD
    0x12, //0x04: HOUR BCD 24h
    0x12, //0x05: ALARM HOUR BCD 24h
    0x01, //0x06: DAY OF WEEK Sunday=1
    0x03, //0x07: DAY OF MONTH BCD from 1
    0x11, //0x08: MONTH BCD from 1
    0x13, //0x09: YEAR BCD
    0x26, //0x0A: REG A
    0x02, //0x0B: REG B
    0x00, //0x0C: REG C
    0x80, //0x0D: REG D
    0x00, //0x0E: REG E - POST status
    0x00, //0x0F: REG F - shutdown status
 
    fdd_type, //0x10: floppy drive type; 0-none, 1-360K, 2-1.2M, 3-720K, 4-1.44M, 5-2.88M
    0x00, //0x11: configuration bits; not used
    0xF0, //0x12: hard disk types; 0-none, 1:E-type, F-type 16+
    0x00, //0x13: advanced configuration bits; not used
    0x0D, //0x14: equipment bits
    0x80, //0x15: base memory in 1k LSB
    0x02, //0x16: base memory in 1k MSB
    0x00, //0x17: memory size above 1m in 1k LSB
    0xFC, //0x18: memory size above 1m in 1k MSB
    0x2F, //0x19: extended hd types 1/2; type 47d
    0x00, //0x1A: extended hd types 2/2
 
    hd_cylinders & 0xFF,        //0x1B: hd 0 configuration 1/9; cylinders low
    (hd_cylinders >> 8) & 0xFF, //0x1C: hd 0 configuration 2/9; cylinders high
    hd_heads,                   //0x1D: hd 0 configuration 3/9; heads
    0xFF,                       //0x1E: hd 0 configuration 4/9; write pre-comp low
    0xFF,                       //0x1F: hd 0 configuration 5/9; write pre-comp high
    0xC8,                       //0x20: hd 0 configuration 6/9; retries/bad map/heads>8
    hd_cylinders & 0xFF,        //0x21: hd 0 configuration 7/9; landing zone low
    (hd_cylinders >> 8) & 0xFF, //0x22: hd 0 configuration 8/9; landing zone high
    hd_spt,                     //0x23: hd 0 configuration 9/9; sectors/track
 
    0x00, //0x24: hd 1 configuration 1/9
    0x00, //0x25: hd 1 configuration 2/9
    0x00, //0x26: hd 1 configuration 3/9
    0x00, //0x27: hd 1 configuration 4/9
    0x00, //0x28: hd 1 configuration 5/9
    0x00, //0x29: hd 1 configuration 6/9
    0x00, //0x2A: hd 1 configuration 7/9
    0x00, //0x2B: hd 1 configuration 8/9
    0x00, //0x2C: hd 1 configuration 9/9
 
    (boot_from_floppy)? 0x20u : 0x00u, //0x2D: boot sequence
 
    0x00, //0x2E: checksum MSB
    0x00, //0x2F: checksum LSB
 
    0x00, //0x30: memory size above 1m in 1k LSB
    0xFC, //0x31: memory size above 1m in 1k MSB
 
    0x20, //0x32: IBM century
    0x00, //0x33: ?
 
    0x00, //0x34: memory size above 16m in 64k LSB
    0x07, //0x35: memory size above 16m in 64k MSB; 128 MB
 
    0x00, //0x36: ?
    0x20, //0x37: IBM PS/2 century
 
    0x00,           //0x38: eltorito boot sequence; not used
    translate_byte, //0x39: ata translation policy 1/2
    0x00,           //0x3A: ata translation policy 2/2
 
    0x00, //0x3B: ?
    0x00, //0x3C: ?
 
    0x00, //0x3D: eltorito boot sequence; not used
 
    0x00, //0x3E: ?
    0x00, //0x3F: ?
 
    0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
    0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
    0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
    0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0
};
 
//------------------------------------------------------------------------------
 
int main(int argc, char **argv) {
    Verilated::commandArgs(argc, argv);
 
    Verilated::traceEverOn(true);
    VerilatedVcdC* tracer = new VerilatedVcdC;
 
    Vrtc *top = new Vrtc();
    top->trace (tracer, 99);
    //tracer->rolloverMB(1000000);
    tracer->open("rtc.vcd");
 
    bool dump = true;
 
    //reset
    top->clk = 0; top->rst_n = 1; top->eval();
    top->clk = 1; top->rst_n = 1; top->eval();
    top->clk = 1; top->rst_n = 0; top->eval();
    top->clk = 0; top->rst_n = 0; top->eval();
    top->clk = 0; top->rst_n = 1; top->eval();
 
    uint32 cycle = 0;
 
    for(uint32 i=0; i<128; i++) {
 
        top->mgmt_write = 1;
        top->mgmt_address = i;
        top->mgmt_writedata = cmos[i];
 
        top->clk = 0;
        top->eval();
        if(dump) tracer->dump(cycle++);
 
        top->clk = 1;
        top->eval();
        if(dump) tracer->dump(cycle++);
 
        tracer->flush();
    }
    top->mgmt_write = 0;
 
    while(!Verilated::gotFinish()) {
 
        //----------------------------------------------------------------------
 
        if(state == S_IDLE) {
            bool res = next_record();
            if(res == false) {
                printf("End of file.\n");
                break;
            }
        }
 
        //----------------------------------------------------------------------
 
        if(state == S_DELAY) {
            delay--;
 
            if(delay == 0) {
                state = S_IDLE;
            }
        }
        else if(state == S_IO_READ_1) {
            top->io_address = address & 0x1;
            top->io_read = 1;
 
            state = S_IO_READ_2;
        }
        else if(state == S_IO_READ_2) {
            length--;
            shifted_read++;
 
            uint32 top_readdata = 0;
 
            top_readdata = top->io_readdata & 0xFF;
 
            if(length > 0) {
                address++;
 
                top->io_address = address & 0x1;
 
                value_read |= (top_readdata & 0xFF) << 24;
                value_read >>= 8;
 
                top->io_read = 0;
                state = S_IO_READ_3;
            }
            else {
                top->io_read = 0;
 
                value_read |= (top_readdata & 0xFF) << 24;
                value_read >>= 8*(4 - shifted_read - shifted);
 
                if(value_read != value_base) {
                    printf("mismatch io rd %08x %x %08x != %08x\n", address_base, byteena, value_base, value_read);
 
                    static int ign_cnt = 0;
                    ign_cnt++;
//if(! ((address_base ==  && byteena == )))
//if(ign_cnt >= 2)
//exit(0);
                }
 
                delay = 5;
                state = S_DELAY;
            }
        }
        else if(state == S_IO_READ_3) {
            top->io_read = 1;
 
            state = S_IO_READ_2;
        }
        else if(state == S_IO_WRITE_1) {
            top->io_address = address & 1;
            top->io_write = 1;
            top->io_writedata = value & 0xFF;
 
            state = S_IO_WRITE_2;
        }
        else if(state == S_IO_WRITE_2) {
            length--;
 
            if(length > 0) {
                address++;
                value >>= 8;
 
                top->io_address = address & 0x1;
                top->io_writedata = value & 0xFF;
 
                top->io_write = 0;
                state = S_IO_WRITE_3;
            }
            else {
                top->io_write = 0;
 
                delay = 5;
                state = S_DELAY;
            }
        }
        else if(state == S_IO_WRITE_3) {
            top->io_write = 0;
 
            state = S_IO_WRITE_2;
        }
 
        //----------------------------------------------------------------------
 
        top->clk = 0;
        top->eval();
        if(dump) tracer->dump(cycle++);
 
        top->clk = 1;
        top->eval();
        if(dump) tracer->dump(cycle++);
 
        tracer->flush();
 
        if(top->irq) {
            printf("ERROR: irq signaled.\n");
            exit(-1);
        }
    }
    tracer->close();
    delete tracer;
    delete top;
 
    return 0;
}
 
//------------------------------------------------------------------------------
 
/*
    input               clk,
    input               rst_n,
 
    output reg          irq,
 
    //io slave 0x70-0x71
    input               io_address,
    input               io_read,
    output reg  [7:0]   io_readdata,
    input               io_write,
    input       [7:0]   io_writedata,
 
    //mgmt slave
    //128.[26:0]: cycles in second
    //129.[12:0]: cycles in 122.07031 us
 
    input       [7:0]   mgmt_address,
    input               mgmt_write,
    input       [31:0]  mgmt_writedata
*/

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[/] [ao486/] [trunk/] [sim/] [verilator/] [soc/] [rtc/] [main.cpp] - Blame information for rev 2

Line No.	Rev	Author	Line
1	2	alfik	`#include <cstdio>`
2			`#include <cstdlib>`
3
4			`#include "Vrtc.h"`
5			`#include "verilated.h"`
6			`#include "verilated_vcd_c.h"`
7
8			`//------------------------------------------------------------------------------`
9
10			`typedef unsigned int uint32;`
11			`typedef unsigned char uint8;`
12
13			`//------------------------------------------------------------------------------`
14
15			`enum state_t {`
16			`S_IDLE,`
17
18			`S_IO_READ_1,`
19			`S_IO_READ_2,`
20			`S_IO_READ_3,`
21
22			`S_IO_WRITE_1,`
23			`S_IO_WRITE_2,`
24			`S_IO_WRITE_3,`
25
26			`S_DELAY`
27			`};`
28
29			`uint32 address_base;`
30			`uint32 address;`
31			`uint32 byteena;`
32			`uint32 value_base;`
33			`uint32 value;`
34			`state_t state = S_IDLE;`
35			`uint32 shifted;`
36			`uint32 shifted_read;`
37			`uint32 length;`
38			`uint32 value_read;`
39
40			`uint32 delay;`
41
42			`void check_byteena(uint32 byteena) {`
43			`if(byteena == 0 \|\| byteena == 5 \|\| byteena == 9 \|\| byteena == 10 \|\| byteena == 11 \|\| byteena == 13) {`
44			`printf("ERROR: invalid byteena: %x\n", byteena);`
45			`exit(-1);`
46			`}`
47
48			`if((byteena & 0xC) != 0) {`
49			`printf("ERROR: access to byteena: %x\n", byteena);`
50			`exit(-1);`
51			`}`
52
53			`value_read = 0;`
54			`address_base = address;`
55			`value_base = value;`
56			`shifted_read = 0;`
57
58			`shifted = 0;`
59			`for(uint32 i=0; i<4; i++) {`
60			`if(byteena & 1) break;`
61
62			`shifted++;`
63			`address++;`
64			`byteena >>= 1;`
65			`value >>= 8;`
66			`}`
67
68			`length = 0;`
69			`for(uint32 i=0; i<4; i++) {`
70			`if(byteena & 1) length++;`
71
72			`byteena >>= 1;`
73			`}`
74			`}`
75
76			`bool is_address_ok(uint32 address) {`
77			`if(address >= 0x0070 && address <= 0x071) return true;`
78
79			`return false;`
80			`}`
81
82			`bool next_record() {`
83			`static FILE *fp = NULL;`
84
85			`if(fp == NULL) {`
86			`fp = fopen("./../../../../backup/run-3/track.txt", "rb");`
87			`if(fp == NULL) {`
88			`printf("ERROR: can not open file.\n");`
89			`exit(-1);`
90			`}`
91			`}`
92
93			`do {`
94			`char line[256];`
95			`memset(line, 0, sizeof(line));`
96
97			`char *res = fgets(line, sizeof(line), fp);`
98			`if(res == NULL) {`
99			`fclose(fp);`
100			`fp = NULL;`
101			`return false;`
102			`}`
103
104			`//printf("line: %s\n", line);`
105
106			`int count;`
107
108			`count = sscanf(line, "io rd %x %x %x", &address, &byteena, &value);`
109			`if(count == 3 && is_address_ok(address)) {`
110			`check_byteena(byteena);`
111			`state = S_IO_READ_1;`
112			`printf("line: %s", line);`
113			`return true;`
114			`}`
115			`count = sscanf(line, "io wr %x %x %x", &address, &byteena, &value);`
116			`if(count == 3 && is_address_ok(address)) {`
117			`check_byteena(byteena);`
118			`state = S_IO_WRITE_1;`
119			`printf("line: %s", line);`
120			`return true;`
121			`}`
122
123			`} while(true);`
124
125			`return false;`
126			`}`
127
128			`//------------------------------------------------------------------------------`
129
130			`uint32 fdd_type = 0x40;`
131			`uint32 hd_cylinders = 1024;`
132			`uint32 hd_heads = 16;`
133			`uint32 hd_spt = 63;`
134			`bool boot_from_floppy = true;`
135
136			`uint32 translate_byte = 0;`
137
138			`//rtc contents 0-127`
139			`unsigned int cmos[128] = {`
140			`0x00, //0x00: SEC BCD`
141			`0x00, //0x01: ALARM SEC BCD`
142			`0x00, //0x02: MIN BCD`
143			`0x00, //0x03: ALARM MIN BCD`
144			`0x12, //0x04: HOUR BCD 24h`
145			`0x12, //0x05: ALARM HOUR BCD 24h`
146			`0x01, //0x06: DAY OF WEEK Sunday=1`
147			`0x03, //0x07: DAY OF MONTH BCD from 1`
148			`0x11, //0x08: MONTH BCD from 1`
149			`0x13, //0x09: YEAR BCD`
150			`0x26, //0x0A: REG A`
151			`0x02, //0x0B: REG B`
152			`0x00, //0x0C: REG C`
153			`0x80, //0x0D: REG D`
154			`0x00, //0x0E: REG E - POST status`
155			`0x00, //0x0F: REG F - shutdown status`
156
157			`fdd_type, //0x10: floppy drive type; 0-none, 1-360K, 2-1.2M, 3-720K, 4-1.44M, 5-2.88M`
158			`0x00, //0x11: configuration bits; not used`
159			`0xF0, //0x12: hard disk types; 0-none, 1:E-type, F-type 16+`
160			`0x00, //0x13: advanced configuration bits; not used`
161			`0x0D, //0x14: equipment bits`
162			`0x80, //0x15: base memory in 1k LSB`
163			`0x02, //0x16: base memory in 1k MSB`
164			`0x00, //0x17: memory size above 1m in 1k LSB`
165			`0xFC, //0x18: memory size above 1m in 1k MSB`
166			`0x2F, //0x19: extended hd types 1/2; type 47d`
167			`0x00, //0x1A: extended hd types 2/2`
168
169			`hd_cylinders & 0xFF, //0x1B: hd 0 configuration 1/9; cylinders low`
170			`(hd_cylinders >> 8) & 0xFF, //0x1C: hd 0 configuration 2/9; cylinders high`
171			`hd_heads, //0x1D: hd 0 configuration 3/9; heads`
172			`0xFF, //0x1E: hd 0 configuration 4/9; write pre-comp low`
173			`0xFF, //0x1F: hd 0 configuration 5/9; write pre-comp high`
174			`0xC8, //0x20: hd 0 configuration 6/9; retries/bad map/heads>8`
175			`hd_cylinders & 0xFF, //0x21: hd 0 configuration 7/9; landing zone low`
176			`(hd_cylinders >> 8) & 0xFF, //0x22: hd 0 configuration 8/9; landing zone high`
177			`hd_spt, //0x23: hd 0 configuration 9/9; sectors/track`
178
179			`0x00, //0x24: hd 1 configuration 1/9`
180			`0x00, //0x25: hd 1 configuration 2/9`
181			`0x00, //0x26: hd 1 configuration 3/9`
182			`0x00, //0x27: hd 1 configuration 4/9`
183			`0x00, //0x28: hd 1 configuration 5/9`
184			`0x00, //0x29: hd 1 configuration 6/9`
185			`0x00, //0x2A: hd 1 configuration 7/9`
186			`0x00, //0x2B: hd 1 configuration 8/9`
187			`0x00, //0x2C: hd 1 configuration 9/9`
188
189			`(boot_from_floppy)? 0x20u : 0x00u, //0x2D: boot sequence`
190
191			`0x00, //0x2E: checksum MSB`
192			`0x00, //0x2F: checksum LSB`
193
194			`0x00, //0x30: memory size above 1m in 1k LSB`
195			`0xFC, //0x31: memory size above 1m in 1k MSB`
196
197			`0x20, //0x32: IBM century`
198			`0x00, //0x33: ?`
199
200			`0x00, //0x34: memory size above 16m in 64k LSB`
201			`0x07, //0x35: memory size above 16m in 64k MSB; 128 MB`
202
203			`0x00, //0x36: ?`
204			`0x20, //0x37: IBM PS/2 century`
205
206			`0x00, //0x38: eltorito boot sequence; not used`
207			`translate_byte, //0x39: ata translation policy 1/2`
208			`0x00, //0x3A: ata translation policy 2/2`
209
210			`0x00, //0x3B: ?`
211			`0x00, //0x3C: ?`
212
213			`0x00, //0x3D: eltorito boot sequence; not used`
214
215			`0x00, //0x3E: ?`
216			`0x00, //0x3F: ?`
217
218			`0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,`
219			`0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,`
220			`0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,`
221			`0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0`
222			`};`
223
224			`//------------------------------------------------------------------------------`
225
226			`int main(int argc, char **argv) {`
227			`Verilated::commandArgs(argc, argv);`
228
229			`Verilated::traceEverOn(true);`
230			`VerilatedVcdC* tracer = new VerilatedVcdC;`
231
232			`Vrtc *top = new Vrtc();`
233			`top->trace (tracer, 99);`
234			`//tracer->rolloverMB(1000000);`
235			`tracer->open("rtc.vcd");`
236
237			`bool dump = true;`
238
239			`//reset`
240			`top->clk = 0; top->rst_n = 1; top->eval();`
241			`top->clk = 1; top->rst_n = 1; top->eval();`
242			`top->clk = 1; top->rst_n = 0; top->eval();`
243			`top->clk = 0; top->rst_n = 0; top->eval();`
244			`top->clk = 0; top->rst_n = 1; top->eval();`
245
246			`uint32 cycle = 0;`
247
248			`for(uint32 i=0; i<128; i++) {`
249
250			`top->mgmt_write = 1;`
251			`top->mgmt_address = i;`
252			`top->mgmt_writedata = cmos[i];`
253
254			`top->clk = 0;`
255			`top->eval();`
256			`if(dump) tracer->dump(cycle++);`
257
258			`top->clk = 1;`
259			`top->eval();`
260			`if(dump) tracer->dump(cycle++);`
261
262			`tracer->flush();`
263			`}`
264			`top->mgmt_write = 0;`
265
266			`while(!Verilated::gotFinish()) {`
267
268			`//----------------------------------------------------------------------`
269
270			`if(state == S_IDLE) {`
271			`bool res = next_record();`
272			`if(res == false) {`
273			`printf("End of file.\n");`
274			`break;`
275			`}`
276			`}`
277
278			`//----------------------------------------------------------------------`
279
280			`if(state == S_DELAY) {`
281			`delay--;`
282
283			`if(delay == 0) {`
284			`state = S_IDLE;`
285			`}`
286			`}`
287			`else if(state == S_IO_READ_1) {`
288			`top->io_address = address & 0x1;`
289			`top->io_read = 1;`
290
291			`state = S_IO_READ_2;`
292			`}`
293			`else if(state == S_IO_READ_2) {`
294			`length--;`
295			`shifted_read++;`
296
297			`uint32 top_readdata = 0;`
298
299			`top_readdata = top->io_readdata & 0xFF;`
300
301			`if(length > 0) {`
302			`address++;`
303
304			`top->io_address = address & 0x1;`
305
306			`value_read \|= (top_readdata & 0xFF) << 24;`
307			`value_read >>= 8;`
308
309			`top->io_read = 0;`
310			`state = S_IO_READ_3;`
311			`}`
312			`else {`
313			`top->io_read = 0;`
314
315			`value_read \|= (top_readdata & 0xFF) << 24;`
316			`value_read >>= 8*(4 - shifted_read - shifted);`
317
318			`if(value_read != value_base) {`
319			`printf("mismatch io rd %08x %x %08x != %08x\n", address_base, byteena, value_base, value_read);`
320
321			`static int ign_cnt = 0;`
322			`ign_cnt++;`
323			`//if(! ((address_base == && byteena == )))`
324			`//if(ign_cnt >= 2)`
325			`//exit(0);`
326			`}`
327
328			`delay = 5;`
329			`state = S_DELAY;`
330			`}`
331			`}`
332			`else if(state == S_IO_READ_3) {`
333			`top->io_read = 1;`
334
335			`state = S_IO_READ_2;`
336			`}`
337			`else if(state == S_IO_WRITE_1) {`
338			`top->io_address = address & 1;`
339			`top->io_write = 1;`
340			`top->io_writedata = value & 0xFF;`
341
342			`state = S_IO_WRITE_2;`
343			`}`
344			`else if(state == S_IO_WRITE_2) {`
345			`length--;`
346
347			`if(length > 0) {`
348			`address++;`
349			`value >>= 8;`
350
351			`top->io_address = address & 0x1;`
352			`top->io_writedata = value & 0xFF;`
353
354			`top->io_write = 0;`
355			`state = S_IO_WRITE_3;`
356			`}`
357			`else {`
358			`top->io_write = 0;`
359
360			`delay = 5;`
361			`state = S_DELAY;`
362			`}`
363			`}`
364			`else if(state == S_IO_WRITE_3) {`
365			`top->io_write = 0;`
366
367			`state = S_IO_WRITE_2;`
368			`}`
369
370			`//----------------------------------------------------------------------`
371
372			`top->clk = 0;`
373			`top->eval();`
374			`if(dump) tracer->dump(cycle++);`
375
376			`top->clk = 1;`
377			`top->eval();`
378			`if(dump) tracer->dump(cycle++);`
379
380			`tracer->flush();`
381
382			`if(top->irq) {`
383			`printf("ERROR: irq signaled.\n");`
384			`exit(-1);`
385			`}`
386			`}`
387			`tracer->close();`
388			`delete tracer;`
389			`delete top;`
390
391			`return 0;`
392			`}`
393
394			`//------------------------------------------------------------------------------`
395
396			`/*`
397			`input clk,`
398			`input rst_n,`
399
400			`output reg irq,`
401
402			`//io slave 0x70-0x71`
403			`input io_address,`
404			`input io_read,`
405			`output reg [7:0] io_readdata,`
406			`input io_write,`
407			`input [7:0] io_writedata,`
408
409			`//mgmt slave`
410			`//128.[26:0]: cycles in second`
411			`//129.[12:0]: cycles in 122.07031 us`
412
413			`input [7:0] mgmt_address,`
414			`input mgmt_write,`
415			`input [31:0] mgmt_writedata`
416			`*/`