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[/] [ao486/] [trunk/] [syn/] [components/] [ps2/] [soc.html] - Blame information for rev 2

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1 2 alfik 
<!DOCTYPE HTML PUBLIC "-//W3C//DTD HTML 4.0 Transitional//EN">
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<html xmlns="http://www.w3.org/1999/xhtml">
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 <head>
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  <title>datasheet for soc</title>
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  <style type="text/css">
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body { font-family:arial ;}
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a { text-decoration:underline ; color:#003000 ;}
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a:hover { text-decoration:underline ; color:0030f0 ;}
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td { padding : 5px ;}
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table.topTitle { width:100% ;}
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table.topTitle td.l { text-align:left ; font-weight: bold ; font-size:30px ;}
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table.topTitle td.r { text-align:right ; font-weight: bold ; font-size:16px ;}
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table.blueBar { width : 100% ; border-spacing : 0px ;}
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table.blueBar td { background:#0036ff ; font-size:12px ; color : white ; text-align : left ; font-weight : bold ;}
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table.blueBar td.l { text-align : left ;}
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table.blueBar td.r { text-align : right ;}
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table.items { width:100% ; border-collapse:collapse ;}
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table.items td.label { font-weight:bold ; font-size:16px ; vertical-align:top ;}
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table.items td.mono { font-family:courier ; font-size:12px ; white-space:pre ;}
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div.label { font-weight:bold ; font-size:16px ; vertical-align:top ; text-align:center ;}
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table.grid { border-collapse:collapse ;}
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table.grid td { border:1px solid #bbb ; font-size:12px ;}
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body { font-family:arial ;}
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table.x { font-family:courier ; border-collapse:collapse ; padding:2px ;}
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table.x td { border:1px solid #bbb ;}
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td.tableTitle { font-weight:bold ; text-align:center ;}
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table.grid { border-collapse:collapse ;}
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table.grid td { border:1px solid #bbb ;}
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table.grid td.tableTitle { font-weight:bold ; text-align:center ;}
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table.mmap { border-collapse:collapse ; text-size:11px ; border:1px solid #d8d8d8 ;}
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table.mmap td { border-color:#d8d8d8 ; border-width:1px ; border-style:solid ;}
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table.mmap td.empty { border-style:none ; background-color:#f0f0f0 ;}
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table.mmap td.slavemodule { text-align:left ; font-size:11px ; border-style:solid solid none solid ;}
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table.mmap td.slavem { text-align:right ; font-size:9px ; font-style:italic ; border-style:none solid none solid ;}
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table.mmap td.slaveb { text-align:right ; font-size:9px ; font-style:italic ; border-style:none solid solid solid ;}
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table.mmap td.mastermodule { text-align:center ; font-size:11px ; border-style:solid solid none solid ;}
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table.mmap td.masterlr { text-align:center ; font-size:9px ; font-style:italic ; border-style:none solid solid solid ;}
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table.mmap td.masterl { text-align:center ; font-size:9px ; font-style:italic ; border-style:none none solid solid ;}
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table.mmap td.masterm { text-align:center ; font-size:9px ; font-style:italic ; border-style:none none solid none ;}
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table.mmap td.masterr { text-align:center ; font-size:9px ; font-style:italic ; border-style:none solid solid none ;}
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table.mmap td.addr { font-family:courier ; font-size:9px ; text-align:right ;}
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table.connectionboxes { border-collapse:separate ; border-spacing:0px ; font-family:arial ;}
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table.connectionboxes td.from { border-bottom:1px solid black ; font-size:9px ; font-style:italic ; vertical-align:bottom ; text-align:left ;}
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table.connectionboxes td.to { font-size:9px ; font-style:italic ; vertical-align:top ; text-align:right ;}
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table.connectionboxes td.lefthandwire { border-bottom:1px solid black ; font-size:9px ; font-style:italic ; vertical-align:bottom ; text-align:right ;}
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table.connectionboxes td.righthandwire { border-bottom:1px solid black ; font-size:9px ; font-style:italic ; vertical-align:bottom ; text-align:left ;}
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table.connectionboxes td.righthandlabel { font-size:11px ; vertical-align:bottom ; text-align:left ;}
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table.connectionboxes td.neighbor { padding:3px ; border:1px solid black ; font-size: 11px ; background:#e8e8e8 ; vertical-align:center ; text-align:center ;}
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table.connectionboxes td.main { padding:8px ; border:1px solid black ; font-size: 14px ; font-weight:bold ; background:#ffffff ; vertical-align:center ; text-align:center ;}
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.parametersbox { border:1px solid #d0d0d0 ; display:inline-block ; max-height:160px ; overflow:auto ; width:360px ; font-size:10px ;}
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.flowbox { display:inline-block ;}
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.parametersbox table { font-size:10px ;}
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td.parametername { font-style:italic ;}
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td.parametervalue { font-weight:bold ;}
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div.greydiv { vertical-align:top ; text-align:center ; background:#eeeeee ; border-top:1px solid #707070 ; border-bottom:1px solid #707070 ; padding:20px ; margin:20px ; width:auto ;}</style>
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 </head>
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 <body>
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  <table class="topTitle">
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   <tr>
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    <td class="l">soc</td>
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    <td class="r">
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     <br/>
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     <br/>
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    </td>
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   </tr>
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  </table>
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  <table class="blueBar">
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   <tr>
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    <td class="l">2013.09.22.09:42:31</td>
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    <td class="r">Datasheet</td>
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   </tr>
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  </table>
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  <div style="width:100% ;  height:10px"> </div>
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  <div class="label">Overview</div>
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  <div class="greydiv">
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   <div style="display:inline-block ; text-align:left">
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    <table class="connectionboxes">
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     <tr>
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      <td class="lefthandwire">&#160;&#160;clk_0&#160;</td>
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      <td class="main" rowspan="2">soc</td>
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     </tr>
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     <tr style="height:6px">
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      <td></td>
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     </tr>
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    </table>
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   </div><span style="display:inline-block ; width:28px"> </span>
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   <div style="display:inline-block ; text-align:left"><span>Processor
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     <br/>&#160;&#160;
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     <a href="#module_nios2_qsys_0"><b>nios2_qsys_0</b>
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     </a> Nios II 13.0
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     <br/>All Components
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     <br/>&#160;&#160;
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     <a href="#module_ps2_0"><b>ps2_0</b>
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     </a> ps2 1.0
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     <br/>&#160;&#160;
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     <a href="#module_nios2_qsys_0"><b>nios2_qsys_0</b>
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     </a> altera_nios2_qsys 13.0
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     <br/>&#160;&#160;
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     <a href="#module_onchip_memory2_0"><b>onchip_memory2_0</b>
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     </a> altera_avalon_onchip_memory2 13.0.1.99.2
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     <br/>&#160;&#160;
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     <a href="#module_jtag_uart_0"><b>jtag_uart_0</b>
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     </a> altera_avalon_jtag_uart 13.0.1.99.2
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     <br/>&#160;&#160;
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     <a href="#module_pio_0"><b>pio_0</b>
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     </a> altera_avalon_pio 13.0.1.99.2</span>
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   </div>
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  </div>
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  <div style="width:100% ;  height:10px"> </div>
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  <div class="label">Memory Map</div>
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  <table class="mmap">
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   <tr>
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    <td class="empty" rowspan="2"></td>
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    <td class="mastermodule" colspan="2">
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     <a href="#module_nios2_qsys_0"><b>nios2_qsys_0</b>
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     </a>
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    </td>
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   </tr>
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   <tr>
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    <td class="masterl">&#160;data_master</td>
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    <td class="masterr">&#160;instruction_master</td>
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   </tr>
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   <tr>
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    <td class="slavemodule">&#160;
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     <a href="#module_ps2_0"><b>ps2_0</b>
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     </a>
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    </td>
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    <td class="empty"></td>
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    <td class="empty"></td>
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   </tr>
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   <tr>
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    <td class="slaveb">io&#160;</td>
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    <td class="addr"><span style="color:#989898">0x</span>00011018</td>
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    <td class="empty"></td>
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   </tr>
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   <tr>
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    <td class="slavemodule">&#160;
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     <a href="#module_nios2_qsys_0"><b>nios2_qsys_0</b>
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     </a>
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    </td>
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    <td class="empty"></td>
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    <td class="empty"></td>
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   </tr>
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   <tr>
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    <td class="slaveb">jtag_debug_module&#160;</td>
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    <td class="addr"><span style="color:#989898">0x</span>00010800</td>
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    <td class="addr"><span style="color:#989898">0x</span>00010800</td>
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   </tr>
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   <tr>
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    <td class="slavemodule">&#160;
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     <a href="#module_onchip_memory2_0"><b>onchip_memory2_0</b>
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     </a>
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    </td>
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    <td class="empty"></td>
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    <td class="empty"></td>
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   </tr>
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   <tr>
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    <td class="slaveb">s1&#160;</td>
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    <td class="addr"><span style="color:#989898">0x</span>00008000</td>
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    <td class="addr"><span style="color:#989898">0x</span>00008000</td>
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   </tr>
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   <tr>
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    <td class="slavemodule">&#160;
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     <a href="#module_jtag_uart_0"><b>jtag_uart_0</b>
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     </a>
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    </td>
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    <td class="empty"></td>
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    <td class="empty"></td>
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   </tr>
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   <tr>
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    <td class="slaveb">avalon_jtag_slave&#160;</td>
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    <td class="addr"><span style="color:#989898">0x</span>00011010</td>
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    <td class="empty"></td>
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   </tr>
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   <tr>
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    <td class="slavemodule">&#160;
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     <a href="#module_pio_0"><b>pio_0</b>
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     </a>
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    </td>
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    <td class="empty"></td>
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    <td class="empty"></td>
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   </tr>
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   <tr>
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    <td class="slaveb">s1&#160;</td>
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    <td class="addr"><span style="color:#989898">0x</span>00011000</td>
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    <td class="empty"></td>
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   </tr>
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  </table>
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  <a name="module_clk_0"> </a>
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  <div>
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   <hr/>
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   <h2>clk_0</h2>clock_source v13.0
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   <br/>
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   <br/>
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   <br/>
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   <table class="flowbox">
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    <tr>
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     <td class="parametersbox">
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      <h2>Parameters</h2>
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      <table>
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       <tr>
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        <td class="parametername">clockFrequency</td>
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        <td class="parametervalue">30000000</td>
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       </tr>
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       <tr>
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        <td class="parametername">clockFrequencyKnown</td>
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        <td class="parametervalue">true</td>
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       </tr>
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       <tr>
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        <td class="parametername">inputClockFrequency</td>
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        <td class="parametervalue">0</td>
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       </tr>
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       <tr>
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        <td class="parametername">resetSynchronousEdges</td>
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        <td class="parametervalue">NONE</td>
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       </tr>
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       <tr>
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        <td class="parametername">deviceFamily</td>
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        <td class="parametervalue">UNKNOWN</td>
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       </tr>
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       <tr>
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        <td class="parametername">generateLegacySim</td>
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        <td class="parametervalue">false</td>
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       </tr>
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      </table>
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     </td>
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    </tr>
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   </table>&#160;&#160;
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   <table class="flowbox">
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    <tr>
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     <td class="parametersbox">
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      <h2>Software Assignments</h2>(none)</td>
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    </tr>
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   </table>
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  </div>
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  <a name="module_ps2_0"> </a>
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  <div>
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   <hr/>
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   <h2>ps2_0</h2>ps2 v1.0
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   <br/>
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   <div class="greydiv">
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    <table class="connectionboxes">
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     <tr>
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      <td class="neighbor" rowspan="4">
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       <a href="#module_clk_0">clk_0</a>
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      </td>
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      <td class="from">clk&#160;&#160;</td>
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      <td class="main" rowspan="7">ps2_0</td>
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     </tr>
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     <tr>
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      <td class="to">&#160;&#160;clock</td>
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     </tr>
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     <tr>
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      <td class="from">clk_reset&#160;&#160;</td>
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     </tr>
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     <tr>
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      <td class="to">&#160;&#160;reset_sink</td>
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     </tr>
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     <tr style="height:6px">
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      <td></td>
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     </tr>
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     <tr>
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      <td class="neighbor" rowspan="2">
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       <a href="#module_nios2_qsys_0">nios2_qsys_0</a>
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      </td>
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      <td class="from">data_master&#160;&#160;</td>
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     </tr>
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     <tr>
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      <td class="to">&#160;&#160;io</td>
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     </tr>
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    </table>
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   </div>
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   <br/>
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   <br/>
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   <table class="flowbox">
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    <tr>
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     <td class="parametersbox">
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      <h2>Parameters</h2>
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      <table>
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       <tr>
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        <td class="parametername">deviceFamily</td>
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        <td class="parametervalue">UNKNOWN</td>
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       </tr>
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       <tr>
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        <td class="parametername">generateLegacySim</td>
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        <td class="parametervalue">false</td>
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       </tr>
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      </table>
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     </td>
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    </tr>
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   </table>&#160;&#160;
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   <table class="flowbox">
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    <tr>
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     <td class="parametersbox">
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      <h2>Software Assignments</h2>(none)</td>
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    </tr>
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   </table>
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  </div>
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  <a name="module_nios2_qsys_0"> </a>
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  <div>
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   <hr/>
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   <h2>nios2_qsys_0</h2>altera_nios2_qsys v13.0
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   <br/>
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   <div class="greydiv">
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    <table class="connectionboxes">
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     <tr>
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      <td class="neighbor" rowspan="4">
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       <a href="#module_clk_0">clk_0</a>
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      </td>
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      <td class="from">clk&#160;&#160;</td>
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      <td class="main" rowspan="19">nios2_qsys_0</td>
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     </tr>
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     <tr>
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      <td class="to">&#160;&#160;clk</td>
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     </tr>
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     <tr>
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      <td class="from">clk_reset&#160;&#160;</td>
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     </tr>
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     <tr>
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      <td class="to">&#160;&#160;reset_n</td>
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     </tr>
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     <tr>
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      <td></td>
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      <td></td>
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      <td class="from">data_master&#160;&#160;</td>
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      <td class="neighbor" rowspan="4">
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       <a href="#module_onchip_memory2_0">onchip_memory2_0</a>
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      </td>
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     </tr>
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     <tr>
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      <td></td>
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      <td></td>
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      <td class="to">&#160;&#160;s1</td>
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     </tr>
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     <tr>
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      <td></td>
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      <td></td>
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      <td class="from">instruction_master&#160;&#160;</td>
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     </tr>
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     <tr>
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      <td></td>
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      <td></td>
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      <td class="to">&#160;&#160;s1</td>
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     </tr>
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     <tr style="height:6px">
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      <td></td>
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     </tr>
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     <tr>
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      <td></td>
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      <td></td>
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      <td class="from">data_master&#160;&#160;</td>
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      <td class="neighbor" rowspan="2">
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       <a href="#module_ps2_0">ps2_0</a>
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      </td>
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     </tr>
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     <tr>
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      <td></td>
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      <td></td>
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      <td class="to">&#160;&#160;io</td>
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     </tr>
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     <tr style="height:6px">
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      <td></td>
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     </tr>
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     <tr>
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      <td></td>
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      <td></td>
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      <td class="from">data_master&#160;&#160;</td>
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      <td class="neighbor" rowspan="4">
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       <a href="#module_jtag_uart_0">jtag_uart_0</a>
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      </td>
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     </tr>
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     <tr>
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      <td></td>
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      <td></td>
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      <td class="to">&#160;&#160;avalon_jtag_slave</td>
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     </tr>
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     <tr>
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      <td></td>
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      <td></td>
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      <td class="from">d_irq&#160;&#160;</td>
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     </tr>
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     <tr>
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      <td></td>
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      <td></td>
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      <td class="to">&#160;&#160;irq</td>
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     </tr>
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     <tr style="height:6px">
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      <td></td>
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     </tr>
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     <tr>
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      <td></td>
393 
      <td></td>
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      <td class="from">data_master&#160;&#160;</td>
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      <td class="neighbor" rowspan="2">
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       <a href="#module_pio_0">pio_0</a>
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      </td>
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     </tr>
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     <tr>
400 
      <td></td>
401 
      <td></td>
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      <td class="to">&#160;&#160;s1</td>
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     </tr>
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    </table>
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   </div>
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   <br/>
407 
   <br/>
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   <table class="flowbox">
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    <tr>
410 
     <td class="parametersbox">
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      <h2>Parameters</h2>
412 
      <table>
413 
       <tr>
414 
        <td class="parametername">setting_showUnpublishedSettings</td>
415 
        <td class="parametervalue">false</td>
416 
       </tr>
417 
       <tr>
418 
        <td class="parametername">setting_showInternalSettings</td>
419 
        <td class="parametervalue">false</td>
420 
       </tr>
421 
       <tr>
422 
        <td class="parametername">setting_preciseSlaveAccessErrorException</td>
423 
        <td class="parametervalue">false</td>
424 
       </tr>
425 
       <tr>
426 
        <td class="parametername">setting_preciseIllegalMemAccessException</td>
427 
        <td class="parametervalue">false</td>
428 
       </tr>
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       <tr>
430 
        <td class="parametername">setting_preciseDivisionErrorException</td>
431 
        <td class="parametervalue">false</td>
432 
       </tr>
433 
       <tr>
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        <td class="parametername">setting_performanceCounter</td>
435 
        <td class="parametervalue">false</td>
436 
       </tr>
437 
       <tr>
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        <td class="parametername">setting_illegalMemAccessDetection</td>
439 
        <td class="parametervalue">false</td>
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       </tr>
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       <tr>
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        <td class="parametername">setting_illegalInstructionsTrap</td>
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        <td class="parametervalue">false</td>
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       </tr>
445 
       <tr>
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        <td class="parametername">setting_fullWaveformSignals</td>
447 
        <td class="parametervalue">false</td>
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       </tr>
449 
       <tr>
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        <td class="parametername">setting_extraExceptionInfo</td>
451 
        <td class="parametervalue">false</td>
452 
       </tr>
453 
       <tr>
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        <td class="parametername">setting_exportPCB</td>
455 
        <td class="parametervalue">false</td>
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       </tr>
457 
       <tr>
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        <td class="parametername">setting_debugSimGen</td>
459 
        <td class="parametervalue">false</td>
460 
       </tr>
461 
       <tr>
462 
        <td class="parametername">setting_clearXBitsLDNonBypass</td>
463 
        <td class="parametervalue">true</td>
464 
       </tr>
465 
       <tr>
466 
        <td class="parametername">setting_bit31BypassDCache</td>
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        <td class="parametervalue">true</td>
468 
       </tr>
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       <tr>
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        <td class="parametername">setting_bigEndian</td>
471 
        <td class="parametervalue">false</td>
472 
       </tr>
473 
       <tr>
474 
        <td class="parametername">setting_export_large_RAMs</td>
475 
        <td class="parametervalue">false</td>
476 
       </tr>
477 
       <tr>
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        <td class="parametername">setting_asic_enabled</td>
479 
        <td class="parametervalue">false</td>
480 
       </tr>
481 
       <tr>
482 
        <td class="parametername">setting_asic_synopsys_translate_on_off</td>
483 
        <td class="parametervalue">false</td>
484 
       </tr>
485 
       <tr>
486 
        <td class="parametername">setting_oci_export_jtag_signals</td>
487 
        <td class="parametervalue">false</td>
488 
       </tr>
489 
       <tr>
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        <td class="parametername">setting_bhtIndexPcOnly</td>
491 
        <td class="parametervalue">false</td>
492 
       </tr>
493 
       <tr>
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        <td class="parametername">setting_avalonDebugPortPresent</td>
495 
        <td class="parametervalue">false</td>
496 
       </tr>
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       <tr>
498 
        <td class="parametername">setting_alwaysEncrypt</td>
499 
        <td class="parametervalue">true</td>
500 
       </tr>
501 
       <tr>
502 
        <td class="parametername">setting_allowFullAddressRange</td>
503 
        <td class="parametervalue">false</td>
504 
       </tr>
505 
       <tr>
506 
        <td class="parametername">setting_activateTrace</td>
507 
        <td class="parametervalue">true</td>
508 
       </tr>
509 
       <tr>
510 
        <td class="parametername">setting_activateTestEndChecker</td>
511 
        <td class="parametervalue">false</td>
512 
       </tr>
513 
       <tr>
514 
        <td class="parametername">setting_activateMonitors</td>
515 
        <td class="parametervalue">true</td>
516 
       </tr>
517 
       <tr>
518 
        <td class="parametername">setting_activateModelChecker</td>
519 
        <td class="parametervalue">false</td>
520 
       </tr>
521 
       <tr>
522 
        <td class="parametername">setting_HDLSimCachesCleared</td>
523 
        <td class="parametervalue">true</td>
524 
       </tr>
525 
       <tr>
526 
        <td class="parametername">setting_HBreakTest</td>
527 
        <td class="parametervalue">false</td>
528 
       </tr>
529 
       <tr>
530 
        <td class="parametername">muldiv_divider</td>
531 
        <td class="parametervalue">false</td>
532 
       </tr>
533 
       <tr>
534 
        <td class="parametername">mpu_useLimit</td>
535 
        <td class="parametervalue">false</td>
536 
       </tr>
537 
       <tr>
538 
        <td class="parametername">mpu_enabled</td>
539 
        <td class="parametervalue">false</td>
540 
       </tr>
541 
       <tr>
542 
        <td class="parametername">mmu_enabled</td>
543 
        <td class="parametervalue">false</td>
544 
       </tr>
545 
       <tr>
546 
        <td class="parametername">mmu_autoAssignTlbPtrSz</td>
547 
        <td class="parametervalue">true</td>
548 
       </tr>
549 
       <tr>
550 
        <td class="parametername">manuallyAssignCpuID</td>
551 
        <td class="parametervalue">true</td>
552 
       </tr>
553 
       <tr>
554 
        <td class="parametername">debug_triggerArming</td>
555 
        <td class="parametervalue">true</td>
556 
       </tr>
557 
       <tr>
558 
        <td class="parametername">debug_embeddedPLL</td>
559 
        <td class="parametervalue">true</td>
560 
       </tr>
561 
       <tr>
562 
        <td class="parametername">debug_debugReqSignals</td>
563 
        <td class="parametervalue">false</td>
564 
       </tr>
565 
       <tr>
566 
        <td class="parametername">debug_assignJtagInstanceID</td>
567 
        <td class="parametervalue">false</td>
568 
       </tr>
569 
       <tr>
570 
        <td class="parametername">dcache_omitDataMaster</td>
571 
        <td class="parametervalue">false</td>
572 
       </tr>
573 
       <tr>
574 
        <td class="parametername">cpuReset</td>
575 
        <td class="parametervalue">false</td>
576 
       </tr>
577 
       <tr>
578 
        <td class="parametername">is_hardcopy_compatible</td>
579 
        <td class="parametervalue">false</td>
580 
       </tr>
581 
       <tr>
582 
        <td class="parametername">setting_shadowRegisterSets</td>
583 
        <td class="parametervalue">0</td>
584 
       </tr>
585 
       <tr>
586 
        <td class="parametername">mpu_numOfInstRegion</td>
587 
        <td class="parametervalue">8</td>
588 
       </tr>
589 
       <tr>
590 
        <td class="parametername">mpu_numOfDataRegion</td>
591 
        <td class="parametervalue">8</td>
592 
       </tr>
593 
       <tr>
594 
        <td class="parametername">mmu_TLBMissExcOffset</td>
595 
        <td class="parametervalue">0</td>
596 
       </tr>
597 
       <tr>
598 
        <td class="parametername">debug_jtagInstanceID</td>
599 
        <td class="parametervalue">0</td>
600 
       </tr>
601 
       <tr>
602 
        <td class="parametername">resetOffset</td>
603 
        <td class="parametervalue">0</td>
604 
       </tr>
605 
       <tr>
606 
        <td class="parametername">exceptionOffset</td>
607 
        <td class="parametervalue">32</td>
608 
       </tr>
609 
       <tr>
610 
        <td class="parametername">cpuID</td>
611 
        <td class="parametervalue">0</td>
612 
       </tr>
613 
       <tr>
614 
        <td class="parametername">cpuID_stored</td>
615 
        <td class="parametervalue">0</td>
616 
       </tr>
617 
       <tr>
618 
        <td class="parametername">breakOffset</td>
619 
        <td class="parametervalue">32</td>
620 
       </tr>
621 
       <tr>
622 
        <td class="parametername">userDefinedSettings</td>
623 
        <td class="parametervalue"></td>
624 
       </tr>
625 
       <tr>
626 
        <td class="parametername">resetSlave</td>
627 
        <td class="parametervalue">onchip_memory2_0.s1</td>
628 
       </tr>
629 
       <tr>
630 
        <td class="parametername">mmu_TLBMissExcSlave</td>
631 
        <td class="parametervalue">None</td>
632 
       </tr>
633 
       <tr>
634 
        <td class="parametername">exceptionSlave</td>
635 
        <td class="parametervalue">onchip_memory2_0.s1</td>
636 
       </tr>
637 
       <tr>
638 
        <td class="parametername">breakSlave</td>
639 
        <td class="parametervalue">nios2_qsys_0.jtag_debug_module</td>
640 
       </tr>
641 
       <tr>
642 
        <td class="parametername">setting_perfCounterWidth</td>
643 
        <td class="parametervalue">32</td>
644 
       </tr>
645 
       <tr>
646 
        <td class="parametername">setting_interruptControllerType</td>
647 
        <td class="parametervalue">Internal</td>
648 
       </tr>
649 
       <tr>
650 
        <td class="parametername">setting_branchPredictionType</td>
651 
        <td class="parametervalue">Automatic</td>
652 
       </tr>
653 
       <tr>
654 
        <td class="parametername">setting_bhtPtrSz</td>
655 
        <td class="parametervalue">8</td>
656 
       </tr>
657 
       <tr>
658 
        <td class="parametername">muldiv_multiplierType</td>
659 
        <td class="parametervalue">EmbeddedMulFast</td>
660 
       </tr>
661 
       <tr>
662 
        <td class="parametername">mpu_minInstRegionSize</td>
663 
        <td class="parametervalue">12</td>
664 
       </tr>
665 
       <tr>
666 
        <td class="parametername">mpu_minDataRegionSize</td>
667 
        <td class="parametervalue">12</td>
668 
       </tr>
669 
       <tr>
670 
        <td class="parametername">mmu_uitlbNumEntries</td>
671 
        <td class="parametervalue">4</td>
672 
       </tr>
673 
       <tr>
674 
        <td class="parametername">mmu_udtlbNumEntries</td>
675 
        <td class="parametervalue">6</td>
676 
       </tr>
677 
       <tr>
678 
        <td class="parametername">mmu_tlbPtrSz</td>
679 
        <td class="parametervalue">7</td>
680 
       </tr>
681 
       <tr>
682 
        <td class="parametername">mmu_tlbNumWays</td>
683 
        <td class="parametervalue">16</td>
684 
       </tr>
685 
       <tr>
686 
        <td class="parametername">mmu_processIDNumBits</td>
687 
        <td class="parametervalue">8</td>
688 
       </tr>
689 
       <tr>
690 
        <td class="parametername">impl</td>
691 
        <td class="parametervalue">Tiny</td>
692 
       </tr>
693 
       <tr>
694 
        <td class="parametername">icache_size</td>
695 
        <td class="parametervalue">4096</td>
696 
       </tr>
697 
       <tr>
698 
        <td class="parametername">icache_tagramBlockType</td>
699 
        <td class="parametervalue">Automatic</td>
700 
       </tr>
701 
       <tr>
702 
        <td class="parametername">icache_ramBlockType</td>
703 
        <td class="parametervalue">Automatic</td>
704 
       </tr>
705 
       <tr>
706 
        <td class="parametername">icache_numTCIM</td>
707 
        <td class="parametervalue">0</td>
708 
       </tr>
709 
       <tr>
710 
        <td class="parametername">icache_burstType</td>
711 
        <td class="parametervalue">None</td>
712 
       </tr>
713 
       <tr>
714 
        <td class="parametername">dcache_bursts</td>
715 
        <td class="parametervalue">false</td>
716 
       </tr>
717 
       <tr>
718 
        <td class="parametername">dcache_victim_buf_impl</td>
719 
        <td class="parametervalue">ram</td>
720 
       </tr>
721 
       <tr>
722 
        <td class="parametername">debug_level</td>
723 
        <td class="parametervalue">Level1</td>
724 
       </tr>
725 
       <tr>
726 
        <td class="parametername">debug_OCIOnchipTrace</td>
727 
        <td class="parametervalue">_128</td>
728 
       </tr>
729 
       <tr>
730 
        <td class="parametername">dcache_size</td>
731 
        <td class="parametervalue">2048</td>
732 
       </tr>
733 
       <tr>
734 
        <td class="parametername">dcache_tagramBlockType</td>
735 
        <td class="parametervalue">Automatic</td>
736 
       </tr>
737 
       <tr>
738 
        <td class="parametername">dcache_ramBlockType</td>
739 
        <td class="parametervalue">Automatic</td>
740 
       </tr>
741 
       <tr>
742 
        <td class="parametername">dcache_numTCDM</td>
743 
        <td class="parametervalue">0</td>
744 
       </tr>
745 
       <tr>
746 
        <td class="parametername">dcache_lineSize</td>
747 
        <td class="parametervalue">32</td>
748 
       </tr>
749 
       <tr>
750 
        <td class="parametername">setting_exportvectors</td>
751 
        <td class="parametervalue">false</td>
752 
       </tr>
753 
       <tr>
754 
        <td class="parametername">setting_ecc_present</td>
755 
        <td class="parametervalue">false</td>
756 
       </tr>
757 
       <tr>
758 
        <td class="parametername">regfile_ramBlockType</td>
759 
        <td class="parametervalue">Automatic</td>
760 
       </tr>
761 
       <tr>
762 
        <td class="parametername">ocimem_ramBlockType</td>
763 
        <td class="parametervalue">Automatic</td>
764 
       </tr>
765 
       <tr>
766 
        <td class="parametername">mmu_ramBlockType</td>
767 
        <td class="parametervalue">Automatic</td>
768 
       </tr>
769 
       <tr>
770 
        <td class="parametername">bht_ramBlockType</td>
771 
        <td class="parametervalue">Automatic</td>
772 
       </tr>
773 
       <tr>
774 
        <td class="parametername">resetAbsoluteAddr</td>
775 
        <td class="parametervalue">32768</td>
776 
       </tr>
777 
       <tr>
778 
        <td class="parametername">exceptionAbsoluteAddr</td>
779 
        <td class="parametervalue">32800</td>
780 
       </tr>
781 
       <tr>
782 
        <td class="parametername">breakAbsoluteAddr</td>
783 
        <td class="parametervalue">67616</td>
784 
       </tr>
785 
       <tr>
786 
        <td class="parametername">mmu_TLBMissExcAbsAddr</td>
787 
        <td class="parametervalue">0</td>
788 
       </tr>
789 
       <tr>
790 
        <td class="parametername">dcache_bursts_derived</td>
791 
        <td class="parametervalue">false</td>
792 
       </tr>
793 
       <tr>
794 
        <td class="parametername">dcache_size_derived</td>
795 
        <td class="parametervalue">2048</td>
796 
       </tr>
797 
       <tr>
798 
        <td class="parametername">dcache_lineSize_derived</td>
799 
        <td class="parametervalue">32</td>
800 
       </tr>
801 
       <tr>
802 
        <td class="parametername">translate_on</td>
803 
        <td class="parametervalue"> "synthesis translate_on"  </td>
804 
       </tr>
805 
       <tr>
806 
        <td class="parametername">translate_off</td>
807 
        <td class="parametervalue"> "synthesis translate_off" </td>
808 
       </tr>
809 
       <tr>
810 
        <td class="parametername">instAddrWidth</td>
811 
        <td class="parametervalue">17</td>
812 
       </tr>
813 
       <tr>
814 
        <td class="parametername">dataAddrWidth</td>
815 
        <td class="parametervalue">17</td>
816 
       </tr>
817 
       <tr>
818 
        <td class="parametername">tightlyCoupledDataMaster0AddrWidth</td>
819 
        <td class="parametervalue">1</td>
820 
       </tr>
821 
       <tr>
822 
        <td class="parametername">tightlyCoupledDataMaster1AddrWidth</td>
823 
        <td class="parametervalue">1</td>
824 
       </tr>
825 
       <tr>
826 
        <td class="parametername">tightlyCoupledDataMaster2AddrWidth</td>
827 
        <td class="parametervalue">1</td>
828 
       </tr>
829 
       <tr>
830 
        <td class="parametername">tightlyCoupledDataMaster3AddrWidth</td>
831 
        <td class="parametervalue">1</td>
832 
       </tr>
833 
       <tr>
834 
        <td class="parametername">tightlyCoupledInstructionMaster0AddrWidth</td>
835 
        <td class="parametervalue">1</td>
836 
       </tr>
837 
       <tr>
838 
        <td class="parametername">tightlyCoupledInstructionMaster1AddrWidth</td>
839 
        <td class="parametervalue">1</td>
840 
       </tr>
841 
       <tr>
842 
        <td class="parametername">tightlyCoupledInstructionMaster2AddrWidth</td>
843 
        <td class="parametervalue">1</td>
844 
       </tr>
845 
       <tr>
846 
        <td class="parametername">tightlyCoupledInstructionMaster3AddrWidth</td>
847 
        <td class="parametervalue">1</td>
848 
       </tr>
849 
       <tr>
850 
        <td class="parametername">instSlaveMapParam</td>
851 
        <td class="parametervalue">&lt;address-map&gt;&lt;slave name='onchip_memory2_0.s1' start='0x8000' end='0x10000' /&gt;&lt;slave name='nios2_qsys_0.jtag_debug_module' start='0x10800' end='0x11000' /&gt;&lt;/address-map&gt;</td>
852 
       </tr>
853 
       <tr>
854 
        <td class="parametername">dataSlaveMapParam</td>
855 
        <td class="parametervalue">&lt;address-map&gt;&lt;slave name='onchip_memory2_0.s1' start='0x8000' end='0x10000' /&gt;&lt;slave name='nios2_qsys_0.jtag_debug_module' start='0x10800' end='0x11000' /&gt;&lt;slave name='pio_0.s1' start='0x11000' end='0x11010' /&gt;&lt;slave name='jtag_uart_0.avalon_jtag_slave' start='0x11010' end='0x11018' /&gt;&lt;slave name='ps2_0.io' start='0x11018' end='0x11020' /&gt;&lt;/address-map&gt;</td>
856 
       </tr>
857 
       <tr>
858 
        <td class="parametername">clockFrequency</td>
859 
        <td class="parametervalue">30000000</td>
860 
       </tr>
861 
       <tr>
862 
        <td class="parametername">deviceFamilyName</td>
863 
        <td class="parametervalue">CYCLONEIVE</td>
864 
       </tr>
865 
       <tr>
866 
        <td class="parametername">internalIrqMaskSystemInfo</td>
867 
        <td class="parametervalue">1</td>
868 
       </tr>
869 
       <tr>
870 
        <td class="parametername">customInstSlavesSystemInfo</td>
871 
        <td class="parametervalue">&lt;info/&gt;</td>
872 
       </tr>
873 
       <tr>
874 
        <td class="parametername">deviceFeaturesSystemInfo</td>
875 
        <td class="parametervalue">ADDRESS_STALL 1 CELL_LEVEL_BACK_ANNOTATION_DISABLED 0 COMPILER_SUPPORT 1 DSP 0 DSP_SHIFTER_BLOCK 0 DUMP_ASM_LAB_BITS_FOR_POWER 1 EMUL 1 ENABLE_ADVANCED_IO_ANALYSIS_GUI_FEATURES 1 EPCS 1 ESB 0 FAKE1 0 FAKE2 0 FAKE3 0 FAMILY_LEVEL_INSTALLATION_ONLY 1 FITTER_USE_FALLING_EDGE_DELAY 0 GENERATE_DC_ON_CURRENT_WARNING_FOR_INTERNAL_CLAMPING_DIODE 0 HARDCOPY 0 HAS_18_BIT_MULTS 0 HAS_ACE_SUPPORT 1 HAS_ADJUSTABLE_OUTPUT_IO_TIMING_MEAS_POINT 0 HAS_ADVANCED_IO_INVERTED_CORNER 0 HAS_ADVANCED_IO_POWER_SUPPORT 1 HAS_ADVANCED_IO_TIMING_SUPPORT 1 HAS_ALM_SUPPORT 0 HAS_ATOM_AND_ROUTING_POWER_MODELED_TOGETHER 0 HAS_AUTO_DERIVE_CLOCK_UNCERTAINTY_SUPPORT 0 HAS_AUTO_FIT_SUPPORT 1 HAS_BALANCED_OPT_TECHNIQUE_SUPPORT 1 HAS_BENEFICIAL_SKEW_SUPPORT 1 HAS_BITLEVEL_DRIVE_STRENGTH_CONTROL 1 HAS_BSDL_FILE_GENERATION 1 HAS_CGA_SUPPORT 1 HAS_CHECK_NETLIST_SUPPORT 0 HAS_CLOCK_REGION_CHECKER_ENABLED 1 HAS_CORE_JUNCTION_TEMP_DERATING 0 HAS_CROSSTALK_SUPPORT 0 HAS_CUSTOM_REGION_SUPPORT 1 HAS_DAP_JTAG_FROM_HPS 0 HAS_DATA_DRIVEN_ACVQ_HSSI_SUPPORT 0 HAS_DDB_FDI_SUPPORT 0 HAS_DESIGN_ANALYZER_SUPPORT 1 HAS_DETAILED_IO_RAIL_POWER_MODEL 1 HAS_DETAILED_LEIM_STATIC_POWER_MODEL 1 HAS_DETAILED_LE_POWER_MODEL 1 HAS_DETAILED_ROUTING_MUX_STATIC_POWER_MODEL 1 HAS_DETAILED_THERMAL_CIRCUIT_PARAMETER_SUPPORT 1 HAS_DEVICE_MIGRATION_SUPPORT 1 HAS_DIAGONAL_MIGRATION_SUPPORT 0 HAS_EMIF_TOOLKIT_SUPPORT 0 HAS_ERROR_DETECTION_SUPPORT 0 HAS_FAMILY_VARIANT_MIGRATION_SUPPORT 0 HAS_FANOUT_FREE_NODE_SUPPORT 1 HAS_FAST_FIT_SUPPORT 1 HAS_FITTER_EARLY_TIMING_ESTIMATE_SUPPORT 1 HAS_FITTER_ECO_SUPPORT 1 HAS_FIT_NETLIST_OPT_RETIME_SUPPORT 1 HAS_FIT_NETLIST_OPT_SUPPORT 1 HAS_FORMAL_VERIFICATION_SUPPORT 1 HAS_FPGA_XCHANGE_SUPPORT 1 HAS_FSAC_LUTRAM_REGISTER_PACKING_SUPPORT 0 HAS_FULL_DAT_MIN_TIMING_SUPPORT 1 HAS_FULL_INCREMENTAL_DESIGN_SUPPORT 1 HAS_FUNCTIONAL_SIMULATION_SUPPORT 1 HAS_FUNCTIONAL_VERILOG_SIMULATION_SUPPORT 0 HAS_FUNCTIONAL_VHDL_SIMULATION_SUPPORT 0 HAS_GLITCH_FILTERING_SUPPORT 1 HAS_HC_READY_SUPPORT 0 HAS_HIGH_SPEED_LOW_POWER_TILE_SUPPORT 0 HAS_HOLD_TIME_AVOIDANCE_ACROSS_CLOCK_SPINE_SUPPORT 1 HAS_HSPICE_WRITER_SUPPORT 1 HAS_HSSI_POWER_CALCULATOR 0 HAS_IBISO_WRITER_SUPPORT 0 HAS_INCREMENTAL_DAT_SUPPORT 1 HAS_INCREMENTAL_SYNTHESIS_SUPPORT 1 HAS_INTERFACE_PLANNER_SUPPORT 0 HAS_IO_ASSIGNMENT_ANALYSIS_SUPPORT 1 HAS_IO_DECODER 0 HAS_IO_PLACEMENT_OPTIMIZATION_SUPPORT 1 HAS_IO_SMART_RECOMPILE_SUPPORT 0 HAS_JITTER_SUPPORT 1 HAS_JTAG_SLD_HUB_SUPPORT 1 HAS_LIMITED_TCL_FITTER_SUPPORT 0 HAS_LOGIC_LOCK_SUPPORT 1 HAS_MICROPROCESSOR 0 HAS_MIF_SMART_COMPILE_SUPPORT 1 HAS_MINMAX_TIMING_MODELING_SUPPORT 1 HAS_MIN_TIMING_ANALYSIS_SUPPORT 1 HAS_MUX_RESTRUCTURE_SUPPORT 1 HAS_NEW_HC_FLOW_SUPPORT 0 HAS_NEW_SERDES_MAX_RESOURCE_COUNT_REPORTING_SUPPORT 1 HAS_NEW_VPR_SUPPORT 1 HAS_NONSOCKET_TECHNOLOGY_MIGRATION_SUPPORT 0 HAS_NO_HARDBLOCK_PARTITION_SUPPORT 0 HAS_NO_JTAG_USERCODE_SUPPORT 0 HAS_OPERATING_SETTINGS_AND_CONDITIONS_REPORTING_SUPPORT 1 HAS_PAD_LOCATION_ASSIGNMENT_SUPPORT 0 HAS_PARTIAL_RECONFIG_SUPPORT 0 HAS_PHYSICAL_NETLIST_OUTPUT 0 HAS_PHYSICAL_ROUTING_SUPPORT 0 HAS_PIN_SPECIFIC_VOLTAGE_SUPPORT 1 HAS_PLDM_REF_SUPPORT 1 HAS_POWER_ESTIMATION_SUPPORT 1 HAS_PRELIMINARY_CLOCK_UNCERTAINTY_NUMBERS 0 HAS_PRE_FITTER_FPP_SUPPORT 0 HAS_PRE_FITTER_LUTRAM_NETLIST_CHECKER_ENABLED 0 HAS_PVA_SUPPORT 1 HAS_RCF_SUPPORT 1 HAS_RCF_SUPPORT_FOR_DEBUGGING 0 HAS_RED_BLACK_SEPARATION_SUPPORT 0 HAS_RE_LEVEL_TIMING_GRAPH_SUPPORT 1 HAS_RISEFALL_DELAY_SUPPORT 1 HAS_SIGNAL_PROBE_SUPPORT 1 HAS_SIGNAL_TAP_SUPPORT 1 HAS_SIMULATOR_SUPPORT 0 HAS_SPLIT_IO_SUPPORT 1 HAS_SPLIT_LC_SUPPORT 1 HAS_SYNTH_FSYN_NETLIST_OPT_SUPPORT 1 HAS_SYNTH_NETLIST_OPT_RETIME_SUPPORT 1 HAS_SYNTH_NETLIST_OPT_SUPPORT 1 HAS_TCL_FITTER_SUPPORT 0 HAS_TECHNOLOGY_MIGRATION_SUPPORT 0 HAS_TEMPLATED_REGISTER_PACKING_SUPPORT 1 HAS_TIME_BORROWING_SUPPORT 0 HAS_TIMING_DRIVEN_SYNTHESIS_SUPPORT 1 HAS_TIMING_INFO_SUPPORT 1 HAS_TIMING_OPERATING_CONDITIONS 1 HAS_TIMING_SIMULATION_SUPPORT 1 HAS_TITAN_BASED_MAC_REGISTER_PACKER_SUPPORT 0 HAS_U2B2_SUPPORT 0 HAS_USER_HIGH_SPEED_LOW_POWER_TILE_SUPPORT 0 HAS_USE_FITTER_INFO_SUPPORT 1 HAS_VCCPD_POWER_RAIL 0 HAS_VERTICAL_MIGRATION_SUPPORT 1 HAS_VIEWDRAW_SYMBOL_SUPPORT 0 HAS_VIO_SUPPORT 1 HAS_VIRTUAL_DEVICES 0 HAS_WYSIWYG_DFFEAS_SUPPORT 1 HAS_XIBISO_WRITER_SUPPORT 1 IFP_USE_LEGACY_IO_CHECKER 0 INCREMENTAL_DESIGN_SUPPORTS_COMPATIBLE_CONSTRAINTS 1 INSTALLED 0 IS_CONFIG_ROM 0 IS_DEFAULT_FAMILY 0 IS_HARDCOPY_FAMILY 0 LVDS_IO 1 M10K_MEMORY 0 M144K_MEMORY 0 M20K_MEMORY 0 M4K_MEMORY 0 M512_MEMORY 0 M9K_MEMORY 1 MLAB_MEMORY 0 MRAM_MEMORY 0 NOT_LISTED 0 NO_RPE_SUPPORT 0 NO_SUPPORT_FOR_LOGICLOCK_CONTENT_BACK_ANNOTATION 1 NO_SUPPORT_FOR_STA_CLOCK_UNCERTAINTY_CHECK 0 NO_TDC_SUPPORT 0 POSTFIT_BAK_DATABASE_EXPORT_ENABLED 1 POSTMAP_BAK_DATABASE_EXPORT_ENABLED 1 PROGRAMMER_SUPPORT 1 QFIT_IN_DEVELOPMENT 0 QMAP_IN_DEVELOPMENT 0 RAM_LOGICAL_NAME_CHECKING_IN_CUT_ENABLED 1 REPORTS_METASTABILITY_MTBF 1 REQUIRES_INSTALLATION_PATCH 0 REQUIRES_LIST_OF_TEMPERATURE_AND_VOLTAGE_OPERATING_CONDITIONS 1 RESERVES_SIGNAL_PROBE_PINS 0 RESOLVE_MAX_FANOUT_EARLY 1 RESOLVE_MAX_FANOUT_LATE 0 RESPECTS_FIXED_SIZED_LOCKED_LOCATION_LOGICLOCK 1 RESTRICTED_USER_SELECTION 0 RISEFALL_SUPPORT_IS_HIDDEN 0 STRICT_TIMING_DB_CHECKS 0 SUPPORTS_ADDITIONAL_OPTIONS_FOR_UNUSED_IO 0 SUPPORTS_CRC 1 SUPPORTS_DIFFERENTIAL_AIOT_BOARD_TRACE_MODEL 1 SUPPORTS_DSP_BALANCING_BACK_ANNOTATION 0 SUPPORTS_GENERATION_OF_EARLY_POWER_ESTIMATOR_FILE 1 SUPPORTS_GLOBAL_SIGNAL_BACK_ANNOTATION 0 SUPPORTS_MAC_CHAIN_OUT_ADDER 0 SUPPORTS_RAM_PACKING_BACK_ANNOTATION 0 SUPPORTS_REG_PACKING_BACK_ANNOTATION 0 SUPPORTS_SIGNALPROBE_REGISTER_PIPELINING 1 SUPPORTS_SINGLE_ENDED_AIOT_BOARD_TRACE_MODEL 1 SUPPORTS_USER_MANUAL_LOGIC_DUPLICATION 1 TMV_RUN_CUSTOMIZABLE_VIEWER 1 TMV_RUN_INTERNAL_DETAILS 1 TMV_RUN_INTERNAL_DETAILS_ON_IO 0 TMV_RUN_INTERNAL_DETAILS_ON_IOBUF 1 TMV_RUN_INTERNAL_DETAILS_ON_LCELL 0 TMV_RUN_INTERNAL_DETAILS_ON_LRAM 0 TRANSCEIVER_3G_BLOCK 0 TRANSCEIVER_6G_BLOCK 0 USES_ACV_FOR_FLED 1 USES_ADB_FOR_BACK_ANNOTATION 1 USES_ALTERA_LNSIM 0 USES_ASIC_ROUTING_POWER_CALCULATOR 0 USES_DATA_DRIVEN_PLL_COMPUTATION_UTIL 1 USES_DEV 1 USES_ICP_FOR_ECO_FITTER 0 USES_LIBERTY_TIMING 0 USES_POWER_SIGNAL_ACTIVITIES 1 USES_THIRD_GENERATION_TIMING_MODELS_TIS 1 USES_U2B2_TIMING_MODELS 0 USE_ADVANCED_IO_POWER_BY_DEFAULT 1 USE_ADVANCED_IO_TIMING_BY_DEFAULT 1 USE_BASE_FAMILY_DDB_PATH 0 USE_OCT_AUTO_CALIBRATION 1 USE_RELAX_IO_ASSIGNMENT_RULES 0 USE_RISEFALL_ONLY 1 USE_SEPARATE_LIST_FOR_TECH_MIGRATION 0 USE_SINGLE_COMPILER_PASS_PLL_MIF_FILE_WRITER 1 USE_TITAN_IO_BASED_IO_REGISTER_PACKER_UTIL 0 WYSIWYG_BUS_WIDTH_CHECKING_IN_CUT_ENABLED 1</td>
876 
       </tr>
877 
       <tr>
878 
        <td class="parametername">tightlyCoupledDataMaster0MapParam</td>
879 
        <td class="parametervalue"></td>
880 
       </tr>
881 
       <tr>
882 
        <td class="parametername">tightlyCoupledDataMaster1MapParam</td>
883 
        <td class="parametervalue"></td>
884 
       </tr>
885 
       <tr>
886 
        <td class="parametername">tightlyCoupledDataMaster2MapParam</td>
887 
        <td class="parametervalue"></td>
888 
       </tr>
889 
       <tr>
890 
        <td class="parametername">tightlyCoupledDataMaster3MapParam</td>
891 
        <td class="parametervalue"></td>
892 
       </tr>
893 
       <tr>
894 
        <td class="parametername">tightlyCoupledInstructionMaster0MapParam</td>
895 
        <td class="parametervalue"></td>
896 
       </tr>
897 
       <tr>
898 
        <td class="parametername">tightlyCoupledInstructionMaster1MapParam</td>
899 
        <td class="parametervalue"></td>
900 
       </tr>
901 
       <tr>
902 
        <td class="parametername">tightlyCoupledInstructionMaster2MapParam</td>
903 
        <td class="parametervalue"></td>
904 
       </tr>
905 
       <tr>
906 
        <td class="parametername">tightlyCoupledInstructionMaster3MapParam</td>
907 
        <td class="parametervalue"></td>
908 
       </tr>
909 
       <tr>
910 
        <td class="parametername">deviceFamily</td>
911 
        <td class="parametervalue">UNKNOWN</td>
912 
       </tr>
913 
       <tr>
914 
        <td class="parametername">generateLegacySim</td>
915 
        <td class="parametervalue">false</td>
916 
       </tr>
917 
      </table>
918 
     </td>
919 
    </tr>
920 
   </table>&#160;&#160;
921 
   <table class="flowbox">
922 
    <tr>
923 
     <td class="parametersbox">
924 
      <h2>Software Assignments</h2>
925 
      <table>
926 
       <tr>
927 
        <td class="parametername">BIG_ENDIAN</td>
928 
        <td class="parametervalue">0</td>
929 
       </tr>
930 
       <tr>
931 
        <td class="parametername">BREAK_ADDR</td>
932 
        <td class="parametervalue">0x00010820</td>
933 
       </tr>
934 
       <tr>
935 
        <td class="parametername">CPU_FREQ</td>
936 
        <td class="parametervalue">30000000u</td>
937 
       </tr>
938 
       <tr>
939 
        <td class="parametername">CPU_ID_SIZE</td>
940 
        <td class="parametervalue">1</td>
941 
       </tr>
942 
       <tr>
943 
        <td class="parametername">CPU_ID_VALUE</td>
944 
        <td class="parametervalue">0x00000000</td>
945 
       </tr>
946 
       <tr>
947 
        <td class="parametername">CPU_IMPLEMENTATION</td>
948 
        <td class="parametervalue">"tiny"</td>
949 
       </tr>
950 
       <tr>
951 
        <td class="parametername">DATA_ADDR_WIDTH</td>
952 
        <td class="parametervalue">17</td>
953 
       </tr>
954 
       <tr>
955 
        <td class="parametername">DCACHE_LINE_SIZE</td>
956 
        <td class="parametervalue">0</td>
957 
       </tr>
958 
       <tr>
959 
        <td class="parametername">DCACHE_LINE_SIZE_LOG2</td>
960 
        <td class="parametervalue">0</td>
961 
       </tr>
962 
       <tr>
963 
        <td class="parametername">DCACHE_SIZE</td>
964 
        <td class="parametervalue">0</td>
965 
       </tr>
966 
       <tr>
967 
        <td class="parametername">EXCEPTION_ADDR</td>
968 
        <td class="parametervalue">0x00008020</td>
969 
       </tr>
970 
       <tr>
971 
        <td class="parametername">FLUSHDA_SUPPORTED</td>
972 
        <td class="parametervalue"></td>
973 
       </tr>
974 
       <tr>
975 
        <td class="parametername">HARDWARE_DIVIDE_PRESENT</td>
976 
        <td class="parametervalue">0</td>
977 
       </tr>
978 
       <tr>
979 
        <td class="parametername">HARDWARE_MULTIPLY_PRESENT</td>
980 
        <td class="parametervalue">0</td>
981 
       </tr>
982 
       <tr>
983 
        <td class="parametername">HARDWARE_MULX_PRESENT</td>
984 
        <td class="parametervalue">0</td>
985 
       </tr>
986 
       <tr>
987 
        <td class="parametername">HAS_DEBUG_CORE</td>
988 
        <td class="parametervalue">1</td>
989 
       </tr>
990 
       <tr>
991 
        <td class="parametername">HAS_DEBUG_STUB</td>
992 
        <td class="parametervalue"></td>
993 
       </tr>
994 
       <tr>
995 
        <td class="parametername">HAS_JMPI_INSTRUCTION</td>
996 
        <td class="parametervalue"></td>
997 
       </tr>
998 
       <tr>
999 
        <td class="parametername">ICACHE_LINE_SIZE</td>
1000 
        <td class="parametervalue">0</td>
1001 
       </tr>
1002 
       <tr>
1003 
        <td class="parametername">ICACHE_LINE_SIZE_LOG2</td>
1004 
        <td class="parametervalue">0</td>
1005 
       </tr>
1006 
       <tr>
1007 
        <td class="parametername">ICACHE_SIZE</td>
1008 
        <td class="parametervalue">0</td>
1009 
       </tr>
1010 
       <tr>
1011 
        <td class="parametername">INST_ADDR_WIDTH</td>
1012 
        <td class="parametervalue">17</td>
1013 
       </tr>
1014 
       <tr>
1015 
        <td class="parametername">RESET_ADDR</td>
1016 
        <td class="parametervalue">0x00008000</td>
1017 
       </tr>
1018 
      </table>
1019 
     </td>
1020 
    </tr>
1021 
   </table>
1022 
  </div>
1023 
  <a name="module_onchip_memory2_0"> </a>
1024 
  <div>
1025 
   <hr/>
1026 
   <h2>onchip_memory2_0</h2>altera_avalon_onchip_memory2 v13.0.1.99.2
1027 
   <br/>
1028 
   <div class="greydiv">
1029 
    <table class="connectionboxes">
1030 
     <tr>
1031 
      <td class="neighbor" rowspan="4">
1032 
       <a href="#module_clk_0">clk_0</a>
1033 
      </td>
1034 
      <td class="from">clk&#160;&#160;</td>
1035 
      <td class="main" rowspan="9">onchip_memory2_0</td>
1036 
     </tr>
1037 
     <tr>
1038 
      <td class="to">&#160;&#160;clk1</td>
1039 
     </tr>
1040 
     <tr>
1041 
      <td class="from">clk_reset&#160;&#160;</td>
1042 
     </tr>
1043 
     <tr>
1044 
      <td class="to">&#160;&#160;reset1</td>
1045 
     </tr>
1046 
     <tr style="height:6px">
1047 
      <td></td>
1048 
     </tr>
1049 
     <tr>
1050 
      <td class="neighbor" rowspan="4">
1051 
       <a href="#module_nios2_qsys_0">nios2_qsys_0</a>
1052 
      </td>
1053 
      <td class="from">data_master&#160;&#160;</td>
1054 
     </tr>
1055 
     <tr>
1056 
      <td class="to">&#160;&#160;s1</td>
1057 
     </tr>
1058 
     <tr>
1059 
      <td class="from">instruction_master&#160;&#160;</td>
1060 
     </tr>
1061 
     <tr>
1062 
      <td class="to">&#160;&#160;s1</td>
1063 
     </tr>
1064 
    </table>
1065 
   </div>
1066 
   <br/>
1067 
   <br/>
1068 
   <table class="flowbox">
1069 
    <tr>
1070 
     <td class="parametersbox">
1071 
      <h2>Parameters</h2>
1072 
      <table>
1073 
       <tr>
1074 
        <td class="parametername">allowInSystemMemoryContentEditor</td>
1075 
        <td class="parametervalue">false</td>
1076 
       </tr>
1077 
       <tr>
1078 
        <td class="parametername">blockType</td>
1079 
        <td class="parametervalue">AUTO</td>
1080 
       </tr>
1081 
       <tr>
1082 
        <td class="parametername">dataWidth</td>
1083 
        <td class="parametervalue">32</td>
1084 
       </tr>
1085 
       <tr>
1086 
        <td class="parametername">dualPort</td>
1087 
        <td class="parametervalue">false</td>
1088 
       </tr>
1089 
       <tr>
1090 
        <td class="parametername">initMemContent</td>
1091 
        <td class="parametervalue">true</td>
1092 
       </tr>
1093 
       <tr>
1094 
        <td class="parametername">initializationFileName</td>
1095 
        <td class="parametervalue">onchip_mem.hex</td>
1096 
       </tr>
1097 
       <tr>
1098 
        <td class="parametername">instanceID</td>
1099 
        <td class="parametervalue">NONE</td>
1100 
       </tr>
1101 
       <tr>
1102 
        <td class="parametername">memorySize</td>
1103 
        <td class="parametervalue">32768</td>
1104 
       </tr>
1105 
       <tr>
1106 
        <td class="parametername">readDuringWriteMode</td>
1107 
        <td class="parametervalue">DONT_CARE</td>
1108 
       </tr>
1109 
       <tr>
1110 
        <td class="parametername">simAllowMRAMContentsFile</td>
1111 
        <td class="parametervalue">false</td>
1112 
       </tr>
1113 
       <tr>
1114 
        <td class="parametername">simMemInitOnlyFilename</td>
1115 
        <td class="parametervalue">0</td>
1116 
       </tr>
1117 
       <tr>
1118 
        <td class="parametername">singleClockOperation</td>
1119 
        <td class="parametervalue">false</td>
1120 
       </tr>
1121 
       <tr>
1122 
        <td class="parametername">slave1Latency</td>
1123 
        <td class="parametervalue">1</td>
1124 
       </tr>
1125 
       <tr>
1126 
        <td class="parametername">slave2Latency</td>
1127 
        <td class="parametervalue">1</td>
1128 
       </tr>
1129 
       <tr>
1130 
        <td class="parametername">useNonDefaultInitFile</td>
1131 
        <td class="parametervalue">false</td>
1132 
       </tr>
1133 
       <tr>
1134 
        <td class="parametername">useShallowMemBlocks</td>
1135 
        <td class="parametervalue">false</td>
1136 
       </tr>
1137 
       <tr>
1138 
        <td class="parametername">writable</td>
1139 
        <td class="parametervalue">true</td>
1140 
       </tr>
1141 
       <tr>
1142 
        <td class="parametername">autoInitializationFileName</td>
1143 
        <td class="parametervalue">soc_onchip_memory2_0</td>
1144 
       </tr>
1145 
       <tr>
1146 
        <td class="parametername">deviceFamily</td>
1147 
        <td class="parametervalue">CYCLONEIVE</td>
1148 
       </tr>
1149 
       <tr>
1150 
        <td class="parametername">deviceFeatures</td>
1151 
        <td class="parametervalue">ADDRESS_STALL 1 CELL_LEVEL_BACK_ANNOTATION_DISABLED 0 COMPILER_SUPPORT 1 DSP 0 DSP_SHIFTER_BLOCK 0 DUMP_ASM_LAB_BITS_FOR_POWER 1 EMUL 1 ENABLE_ADVANCED_IO_ANALYSIS_GUI_FEATURES 1 EPCS 1 ESB 0 FAKE1 0 FAKE2 0 FAKE3 0 FAMILY_LEVEL_INSTALLATION_ONLY 1 FITTER_USE_FALLING_EDGE_DELAY 0 GENERATE_DC_ON_CURRENT_WARNING_FOR_INTERNAL_CLAMPING_DIODE 0 HARDCOPY 0 HAS_18_BIT_MULTS 0 HAS_ACE_SUPPORT 1 HAS_ADJUSTABLE_OUTPUT_IO_TIMING_MEAS_POINT 0 HAS_ADVANCED_IO_INVERTED_CORNER 0 HAS_ADVANCED_IO_POWER_SUPPORT 1 HAS_ADVANCED_IO_TIMING_SUPPORT 1 HAS_ALM_SUPPORT 0 HAS_ATOM_AND_ROUTING_POWER_MODELED_TOGETHER 0 HAS_AUTO_DERIVE_CLOCK_UNCERTAINTY_SUPPORT 0 HAS_AUTO_FIT_SUPPORT 1 HAS_BALANCED_OPT_TECHNIQUE_SUPPORT 1 HAS_BENEFICIAL_SKEW_SUPPORT 1 HAS_BITLEVEL_DRIVE_STRENGTH_CONTROL 1 HAS_BSDL_FILE_GENERATION 1 HAS_CGA_SUPPORT 1 HAS_CHECK_NETLIST_SUPPORT 0 HAS_CLOCK_REGION_CHECKER_ENABLED 1 HAS_CORE_JUNCTION_TEMP_DERATING 0 HAS_CROSSTALK_SUPPORT 0 HAS_CUSTOM_REGION_SUPPORT 1 HAS_DAP_JTAG_FROM_HPS 0 HAS_DATA_DRIVEN_ACVQ_HSSI_SUPPORT 0 HAS_DDB_FDI_SUPPORT 0 HAS_DESIGN_ANALYZER_SUPPORT 1 HAS_DETAILED_IO_RAIL_POWER_MODEL 1 HAS_DETAILED_LEIM_STATIC_POWER_MODEL 1 HAS_DETAILED_LE_POWER_MODEL 1 HAS_DETAILED_ROUTING_MUX_STATIC_POWER_MODEL 1 HAS_DETAILED_THERMAL_CIRCUIT_PARAMETER_SUPPORT 1 HAS_DEVICE_MIGRATION_SUPPORT 1 HAS_DIAGONAL_MIGRATION_SUPPORT 0 HAS_EMIF_TOOLKIT_SUPPORT 0 HAS_ERROR_DETECTION_SUPPORT 0 HAS_FAMILY_VARIANT_MIGRATION_SUPPORT 0 HAS_FANOUT_FREE_NODE_SUPPORT 1 HAS_FAST_FIT_SUPPORT 1 HAS_FITTER_EARLY_TIMING_ESTIMATE_SUPPORT 1 HAS_FITTER_ECO_SUPPORT 1 HAS_FIT_NETLIST_OPT_RETIME_SUPPORT 1 HAS_FIT_NETLIST_OPT_SUPPORT 1 HAS_FORMAL_VERIFICATION_SUPPORT 1 HAS_FPGA_XCHANGE_SUPPORT 1 HAS_FSAC_LUTRAM_REGISTER_PACKING_SUPPORT 0 HAS_FULL_DAT_MIN_TIMING_SUPPORT 1 HAS_FULL_INCREMENTAL_DESIGN_SUPPORT 1 HAS_FUNCTIONAL_SIMULATION_SUPPORT 1 HAS_FUNCTIONAL_VERILOG_SIMULATION_SUPPORT 0 HAS_FUNCTIONAL_VHDL_SIMULATION_SUPPORT 0 HAS_GLITCH_FILTERING_SUPPORT 1 HAS_HC_READY_SUPPORT 0 HAS_HIGH_SPEED_LOW_POWER_TILE_SUPPORT 0 HAS_HOLD_TIME_AVOIDANCE_ACROSS_CLOCK_SPINE_SUPPORT 1 HAS_HSPICE_WRITER_SUPPORT 1 HAS_HSSI_POWER_CALCULATOR 0 HAS_IBISO_WRITER_SUPPORT 0 HAS_INCREMENTAL_DAT_SUPPORT 1 HAS_INCREMENTAL_SYNTHESIS_SUPPORT 1 HAS_INTERFACE_PLANNER_SUPPORT 0 HAS_IO_ASSIGNMENT_ANALYSIS_SUPPORT 1 HAS_IO_DECODER 0 HAS_IO_PLACEMENT_OPTIMIZATION_SUPPORT 1 HAS_IO_SMART_RECOMPILE_SUPPORT 0 HAS_JITTER_SUPPORT 1 HAS_JTAG_SLD_HUB_SUPPORT 1 HAS_LIMITED_TCL_FITTER_SUPPORT 0 HAS_LOGIC_LOCK_SUPPORT 1 HAS_MICROPROCESSOR 0 HAS_MIF_SMART_COMPILE_SUPPORT 1 HAS_MINMAX_TIMING_MODELING_SUPPORT 1 HAS_MIN_TIMING_ANALYSIS_SUPPORT 1 HAS_MUX_RESTRUCTURE_SUPPORT 1 HAS_NEW_HC_FLOW_SUPPORT 0 HAS_NEW_SERDES_MAX_RESOURCE_COUNT_REPORTING_SUPPORT 1 HAS_NEW_VPR_SUPPORT 1 HAS_NONSOCKET_TECHNOLOGY_MIGRATION_SUPPORT 0 HAS_NO_HARDBLOCK_PARTITION_SUPPORT 0 HAS_NO_JTAG_USERCODE_SUPPORT 0 HAS_OPERATING_SETTINGS_AND_CONDITIONS_REPORTING_SUPPORT 1 HAS_PAD_LOCATION_ASSIGNMENT_SUPPORT 0 HAS_PARTIAL_RECONFIG_SUPPORT 0 HAS_PHYSICAL_NETLIST_OUTPUT 0 HAS_PHYSICAL_ROUTING_SUPPORT 0 HAS_PIN_SPECIFIC_VOLTAGE_SUPPORT 1 HAS_PLDM_REF_SUPPORT 1 HAS_POWER_ESTIMATION_SUPPORT 1 HAS_PRELIMINARY_CLOCK_UNCERTAINTY_NUMBERS 0 HAS_PRE_FITTER_FPP_SUPPORT 0 HAS_PRE_FITTER_LUTRAM_NETLIST_CHECKER_ENABLED 0 HAS_PVA_SUPPORT 1 HAS_RCF_SUPPORT 1 HAS_RCF_SUPPORT_FOR_DEBUGGING 0 HAS_RED_BLACK_SEPARATION_SUPPORT 0 HAS_RE_LEVEL_TIMING_GRAPH_SUPPORT 1 HAS_RISEFALL_DELAY_SUPPORT 1 HAS_SIGNAL_PROBE_SUPPORT 1 HAS_SIGNAL_TAP_SUPPORT 1 HAS_SIMULATOR_SUPPORT 0 HAS_SPLIT_IO_SUPPORT 1 HAS_SPLIT_LC_SUPPORT 1 HAS_SYNTH_FSYN_NETLIST_OPT_SUPPORT 1 HAS_SYNTH_NETLIST_OPT_RETIME_SUPPORT 1 HAS_SYNTH_NETLIST_OPT_SUPPORT 1 HAS_TCL_FITTER_SUPPORT 0 HAS_TECHNOLOGY_MIGRATION_SUPPORT 0 HAS_TEMPLATED_REGISTER_PACKING_SUPPORT 1 HAS_TIME_BORROWING_SUPPORT 0 HAS_TIMING_DRIVEN_SYNTHESIS_SUPPORT 1 HAS_TIMING_INFO_SUPPORT 1 HAS_TIMING_OPERATING_CONDITIONS 1 HAS_TIMING_SIMULATION_SUPPORT 1 HAS_TITAN_BASED_MAC_REGISTER_PACKER_SUPPORT 0 HAS_U2B2_SUPPORT 0 HAS_USER_HIGH_SPEED_LOW_POWER_TILE_SUPPORT 0 HAS_USE_FITTER_INFO_SUPPORT 1 HAS_VCCPD_POWER_RAIL 0 HAS_VERTICAL_MIGRATION_SUPPORT 1 HAS_VIEWDRAW_SYMBOL_SUPPORT 0 HAS_VIO_SUPPORT 1 HAS_VIRTUAL_DEVICES 0 HAS_WYSIWYG_DFFEAS_SUPPORT 1 HAS_XIBISO_WRITER_SUPPORT 1 IFP_USE_LEGACY_IO_CHECKER 0 INCREMENTAL_DESIGN_SUPPORTS_COMPATIBLE_CONSTRAINTS 1 INSTALLED 0 IS_CONFIG_ROM 0 IS_DEFAULT_FAMILY 0 IS_HARDCOPY_FAMILY 0 LVDS_IO 1 M10K_MEMORY 0 M144K_MEMORY 0 M20K_MEMORY 0 M4K_MEMORY 0 M512_MEMORY 0 M9K_MEMORY 1 MLAB_MEMORY 0 MRAM_MEMORY 0 NOT_LISTED 0 NO_RPE_SUPPORT 0 NO_SUPPORT_FOR_LOGICLOCK_CONTENT_BACK_ANNOTATION 1 NO_SUPPORT_FOR_STA_CLOCK_UNCERTAINTY_CHECK 0 NO_TDC_SUPPORT 0 POSTFIT_BAK_DATABASE_EXPORT_ENABLED 1 POSTMAP_BAK_DATABASE_EXPORT_ENABLED 1 PROGRAMMER_SUPPORT 1 QFIT_IN_DEVELOPMENT 0 QMAP_IN_DEVELOPMENT 0 RAM_LOGICAL_NAME_CHECKING_IN_CUT_ENABLED 1 REPORTS_METASTABILITY_MTBF 1 REQUIRES_INSTALLATION_PATCH 0 REQUIRES_LIST_OF_TEMPERATURE_AND_VOLTAGE_OPERATING_CONDITIONS 1 RESERVES_SIGNAL_PROBE_PINS 0 RESOLVE_MAX_FANOUT_EARLY 1 RESOLVE_MAX_FANOUT_LATE 0 RESPECTS_FIXED_SIZED_LOCKED_LOCATION_LOGICLOCK 1 RESTRICTED_USER_SELECTION 0 RISEFALL_SUPPORT_IS_HIDDEN 0 STRICT_TIMING_DB_CHECKS 0 SUPPORTS_ADDITIONAL_OPTIONS_FOR_UNUSED_IO 0 SUPPORTS_CRC 1 SUPPORTS_DIFFERENTIAL_AIOT_BOARD_TRACE_MODEL 1 SUPPORTS_DSP_BALANCING_BACK_ANNOTATION 0 SUPPORTS_GENERATION_OF_EARLY_POWER_ESTIMATOR_FILE 1 SUPPORTS_GLOBAL_SIGNAL_BACK_ANNOTATION 0 SUPPORTS_MAC_CHAIN_OUT_ADDER 0 SUPPORTS_RAM_PACKING_BACK_ANNOTATION 0 SUPPORTS_REG_PACKING_BACK_ANNOTATION 0 SUPPORTS_SIGNALPROBE_REGISTER_PIPELINING 1 SUPPORTS_SINGLE_ENDED_AIOT_BOARD_TRACE_MODEL 1 SUPPORTS_USER_MANUAL_LOGIC_DUPLICATION 1 TMV_RUN_CUSTOMIZABLE_VIEWER 1 TMV_RUN_INTERNAL_DETAILS 1 TMV_RUN_INTERNAL_DETAILS_ON_IO 0 TMV_RUN_INTERNAL_DETAILS_ON_IOBUF 1 TMV_RUN_INTERNAL_DETAILS_ON_LCELL 0 TMV_RUN_INTERNAL_DETAILS_ON_LRAM 0 TRANSCEIVER_3G_BLOCK 0 TRANSCEIVER_6G_BLOCK 0 USES_ACV_FOR_FLED 1 USES_ADB_FOR_BACK_ANNOTATION 1 USES_ALTERA_LNSIM 0 USES_ASIC_ROUTING_POWER_CALCULATOR 0 USES_DATA_DRIVEN_PLL_COMPUTATION_UTIL 1 USES_DEV 1 USES_ICP_FOR_ECO_FITTER 0 USES_LIBERTY_TIMING 0 USES_POWER_SIGNAL_ACTIVITIES 1 USES_THIRD_GENERATION_TIMING_MODELS_TIS 1 USES_U2B2_TIMING_MODELS 0 USE_ADVANCED_IO_POWER_BY_DEFAULT 1 USE_ADVANCED_IO_TIMING_BY_DEFAULT 1 USE_BASE_FAMILY_DDB_PATH 0 USE_OCT_AUTO_CALIBRATION 1 USE_RELAX_IO_ASSIGNMENT_RULES 0 USE_RISEFALL_ONLY 1 USE_SEPARATE_LIST_FOR_TECH_MIGRATION 0 USE_SINGLE_COMPILER_PASS_PLL_MIF_FILE_WRITER 1 USE_TITAN_IO_BASED_IO_REGISTER_PACKER_UTIL 0 WYSIWYG_BUS_WIDTH_CHECKING_IN_CUT_ENABLED 1</td>
1152 
       </tr>
1153 
       <tr>
1154 
        <td class="parametername">derived_set_addr_width</td>
1155 
        <td class="parametervalue">13</td>
1156 
       </tr>
1157 
       <tr>
1158 
        <td class="parametername">derived_gui_ram_block_type</td>
1159 
        <td class="parametervalue">Automatic</td>
1160 
       </tr>
1161 
       <tr>
1162 
        <td class="parametername">derived_is_hardcopy</td>
1163 
        <td class="parametervalue">false</td>
1164 
       </tr>
1165 
       <tr>
1166 
        <td class="parametername">derived_init_file_name</td>
1167 
        <td class="parametervalue">soc_onchip_memory2_0.hex</td>
1168 
       </tr>
1169 
       <tr>
1170 
        <td class="parametername">generateLegacySim</td>
1171 
        <td class="parametervalue">false</td>
1172 
       </tr>
1173 
      </table>
1174 
     </td>
1175 
    </tr>
1176 
   </table>&#160;&#160;
1177 
   <table class="flowbox">
1178 
    <tr>
1179 
     <td class="parametersbox">
1180 
      <h2>Software Assignments</h2>
1181 
      <table>
1182 
       <tr>
1183 
        <td class="parametername">ALLOW_IN_SYSTEM_MEMORY_CONTENT_EDITOR</td>
1184 
        <td class="parametervalue">0</td>
1185 
       </tr>
1186 
       <tr>
1187 
        <td class="parametername">ALLOW_MRAM_SIM_CONTENTS_ONLY_FILE</td>
1188 
        <td class="parametervalue">0</td>
1189 
       </tr>
1190 
       <tr>
1191 
        <td class="parametername">CONTENTS_INFO</td>
1192 
        <td class="parametervalue">""</td>
1193 
       </tr>
1194 
       <tr>
1195 
        <td class="parametername">DUAL_PORT</td>
1196 
        <td class="parametervalue">0</td>
1197 
       </tr>
1198 
       <tr>
1199 
        <td class="parametername">GUI_RAM_BLOCK_TYPE</td>
1200 
        <td class="parametervalue">AUTO</td>
1201 
       </tr>
1202 
       <tr>
1203 
        <td class="parametername">INIT_CONTENTS_FILE</td>
1204 
        <td class="parametervalue">soc_onchip_memory2_0</td>
1205 
       </tr>
1206 
       <tr>
1207 
        <td class="parametername">INIT_MEM_CONTENT</td>
1208 
        <td class="parametervalue">1</td>
1209 
       </tr>
1210 
       <tr>
1211 
        <td class="parametername">INSTANCE_ID</td>
1212 
        <td class="parametervalue">NONE</td>
1213 
       </tr>
1214 
       <tr>
1215 
        <td class="parametername">NON_DEFAULT_INIT_FILE_ENABLED</td>
1216 
        <td class="parametervalue">0</td>
1217 
       </tr>
1218 
       <tr>
1219 
        <td class="parametername">RAM_BLOCK_TYPE</td>
1220 
        <td class="parametervalue">AUTO</td>
1221 
       </tr>
1222 
       <tr>
1223 
        <td class="parametername">READ_DURING_WRITE_MODE</td>
1224 
        <td class="parametervalue">DONT_CARE</td>
1225 
       </tr>
1226 
       <tr>
1227 
        <td class="parametername">SINGLE_CLOCK_OP</td>
1228 
        <td class="parametervalue">0</td>
1229 
       </tr>
1230 
       <tr>
1231 
        <td class="parametername">SIZE_MULTIPLE</td>
1232 
        <td class="parametervalue">1</td>
1233 
       </tr>
1234 
       <tr>
1235 
        <td class="parametername">SIZE_VALUE</td>
1236 
        <td class="parametervalue">32768</td>
1237 
       </tr>
1238 
       <tr>
1239 
        <td class="parametername">WRITABLE</td>
1240 
        <td class="parametervalue">1</td>
1241 
       </tr>
1242 
      </table>
1243 
     </td>
1244 
    </tr>
1245 
   </table>
1246 
  </div>
1247 
  <a name="module_jtag_uart_0"> </a>
1248 
  <div>
1249 
   <hr/>
1250 
   <h2>jtag_uart_0</h2>altera_avalon_jtag_uart v13.0.1.99.2
1251 
   <br/>
1252 
   <div class="greydiv">
1253 
    <table class="connectionboxes">
1254 
     <tr>
1255 
      <td class="neighbor" rowspan="4">
1256 
       <a href="#module_clk_0">clk_0</a>
1257 
      </td>
1258 
      <td class="from">clk&#160;&#160;</td>
1259 
      <td class="main" rowspan="9">jtag_uart_0</td>
1260 
     </tr>
1261 
     <tr>
1262 
      <td class="to">&#160;&#160;clk</td>
1263 
     </tr>
1264 
     <tr>
1265 
      <td class="from">clk_reset&#160;&#160;</td>
1266 
     </tr>
1267 
     <tr>
1268 
      <td class="to">&#160;&#160;reset</td>
1269 
     </tr>
1270 
     <tr style="height:6px">
1271 
      <td></td>
1272 
     </tr>
1273 
     <tr>
1274 
      <td class="neighbor" rowspan="4">
1275 
       <a href="#module_nios2_qsys_0">nios2_qsys_0</a>
1276 
      </td>
1277 
      <td class="from">data_master&#160;&#160;</td>
1278 
     </tr>
1279 
     <tr>
1280 
      <td class="to">&#160;&#160;avalon_jtag_slave</td>
1281 
     </tr>
1282 
     <tr>
1283 
      <td class="from">d_irq&#160;&#160;</td>
1284 
     </tr>
1285 
     <tr>
1286 
      <td class="to">&#160;&#160;irq</td>
1287 
     </tr>
1288 
    </table>
1289 
   </div>
1290 
   <br/>
1291 
   <br/>
1292 
   <table class="flowbox">
1293 
    <tr>
1294 
     <td class="parametersbox">
1295 
      <h2>Parameters</h2>
1296 
      <table>
1297 
       <tr>
1298 
        <td class="parametername">allowMultipleConnections</td>
1299 
        <td class="parametervalue">false</td>
1300 
       </tr>
1301 
       <tr>
1302 
        <td class="parametername">hubInstanceID</td>
1303 
        <td class="parametervalue">0</td>
1304 
       </tr>
1305 
       <tr>
1306 
        <td class="parametername">readBufferDepth</td>
1307 
        <td class="parametervalue">64</td>
1308 
       </tr>
1309 
       <tr>
1310 
        <td class="parametername">readIRQThreshold</td>
1311 
        <td class="parametervalue">8</td>
1312 
       </tr>
1313 
       <tr>
1314 
        <td class="parametername">simInputCharacterStream</td>
1315 
        <td class="parametervalue"></td>
1316 
       </tr>
1317 
       <tr>
1318 
        <td class="parametername">simInteractiveOptions</td>
1319 
        <td class="parametervalue">NO_INTERACTIVE_WINDOWS</td>
1320 
       </tr>
1321 
       <tr>
1322 
        <td class="parametername">useRegistersForReadBuffer</td>
1323 
        <td class="parametervalue">false</td>
1324 
       </tr>
1325 
       <tr>
1326 
        <td class="parametername">useRegistersForWriteBuffer</td>
1327 
        <td class="parametervalue">false</td>
1328 
       </tr>
1329 
       <tr>
1330 
        <td class="parametername">useRelativePathForSimFile</td>
1331 
        <td class="parametervalue">false</td>
1332 
       </tr>
1333 
       <tr>
1334 
        <td class="parametername">writeBufferDepth</td>
1335 
        <td class="parametervalue">64</td>
1336 
       </tr>
1337 
       <tr>
1338 
        <td class="parametername">writeIRQThreshold</td>
1339 
        <td class="parametervalue">8</td>
1340 
       </tr>
1341 
       <tr>
1342 
        <td class="parametername">avalonSpec</td>
1343 
        <td class="parametervalue">2.0</td>
1344 
       </tr>
1345 
       <tr>
1346 
        <td class="parametername">legacySignalAllow</td>
1347 
        <td class="parametervalue">false</td>
1348 
       </tr>
1349 
       <tr>
1350 
        <td class="parametername">enableInteractiveInput</td>
1351 
        <td class="parametervalue">false</td>
1352 
       </tr>
1353 
       <tr>
1354 
        <td class="parametername">enableInteractiveOutput</td>
1355 
        <td class="parametervalue">false</td>
1356 
       </tr>
1357 
       <tr>
1358 
        <td class="parametername">deviceFamily</td>
1359 
        <td class="parametervalue">UNKNOWN</td>
1360 
       </tr>
1361 
       <tr>
1362 
        <td class="parametername">generateLegacySim</td>
1363 
        <td class="parametervalue">false</td>
1364 
       </tr>
1365 
      </table>
1366 
     </td>
1367 
    </tr>
1368 
   </table>&#160;&#160;
1369 
   <table class="flowbox">
1370 
    <tr>
1371 
     <td class="parametersbox">
1372 
      <h2>Software Assignments</h2>
1373 
      <table>
1374 
       <tr>
1375 
        <td class="parametername">READ_DEPTH</td>
1376 
        <td class="parametervalue">64</td>
1377 
       </tr>
1378 
       <tr>
1379 
        <td class="parametername">READ_THRESHOLD</td>
1380 
        <td class="parametervalue">8</td>
1381 
       </tr>
1382 
       <tr>
1383 
        <td class="parametername">WRITE_DEPTH</td>
1384 
        <td class="parametervalue">64</td>
1385 
       </tr>
1386 
       <tr>
1387 
        <td class="parametername">WRITE_THRESHOLD</td>
1388 
        <td class="parametervalue">8</td>
1389 
       </tr>
1390 
      </table>
1391 
     </td>
1392 
    </tr>
1393 
   </table>
1394 
  </div>
1395 
  <a name="module_pio_0"> </a>
1396 
  <div>
1397 
   <hr/>
1398 
   <h2>pio_0</h2>altera_avalon_pio v13.0.1.99.2
1399 
   <br/>
1400 
   <div class="greydiv">
1401 
    <table class="connectionboxes">
1402 
     <tr>
1403 
      <td class="neighbor" rowspan="4">
1404 
       <a href="#module_clk_0">clk_0</a>
1405 
      </td>
1406 
      <td class="from">clk&#160;&#160;</td>
1407 
      <td class="main" rowspan="7">pio_0</td>
1408 
     </tr>
1409 
     <tr>
1410 
      <td class="to">&#160;&#160;clk</td>
1411 
     </tr>
1412 
     <tr>
1413 
      <td class="from">clk_reset&#160;&#160;</td>
1414 
     </tr>
1415 
     <tr>
1416 
      <td class="to">&#160;&#160;reset</td>
1417 
     </tr>
1418 
     <tr style="height:6px">
1419 
      <td></td>
1420 
     </tr>
1421 
     <tr>
1422 
      <td class="neighbor" rowspan="2">
1423 
       <a href="#module_nios2_qsys_0">nios2_qsys_0</a>
1424 
      </td>
1425 
      <td class="from">data_master&#160;&#160;</td>
1426 
     </tr>
1427 
     <tr>
1428 
      <td class="to">&#160;&#160;s1</td>
1429 
     </tr>
1430 
    </table>
1431 
   </div>
1432 
   <br/>
1433 
   <br/>
1434 
   <table class="flowbox">
1435 
    <tr>
1436 
     <td class="parametersbox">
1437 
      <h2>Parameters</h2>
1438 
      <table>
1439 
       <tr>
1440 
        <td class="parametername">bitClearingEdgeCapReg</td>
1441 
        <td class="parametervalue">false</td>
1442 
       </tr>
1443 
       <tr>
1444 
        <td class="parametername">bitModifyingOutReg</td>
1445 
        <td class="parametervalue">false</td>
1446 
       </tr>
1447 
       <tr>
1448 
        <td class="parametername">captureEdge</td>
1449 
        <td class="parametervalue">false</td>
1450 
       </tr>
1451 
       <tr>
1452 
        <td class="parametername">direction</td>
1453 
        <td class="parametervalue">Input</td>
1454 
       </tr>
1455 
       <tr>
1456 
        <td class="parametername">edgeType</td>
1457 
        <td class="parametervalue">RISING</td>
1458 
       </tr>
1459 
       <tr>
1460 
        <td class="parametername">generateIRQ</td>
1461 
        <td class="parametervalue">false</td>
1462 
       </tr>
1463 
       <tr>
1464 
        <td class="parametername">irqType</td>
1465 
        <td class="parametervalue">LEVEL</td>
1466 
       </tr>
1467 
       <tr>
1468 
        <td class="parametername">resetValue</td>
1469 
        <td class="parametervalue">0</td>
1470 
       </tr>
1471 
       <tr>
1472 
        <td class="parametername">simDoTestBenchWiring</td>
1473 
        <td class="parametervalue">false</td>
1474 
       </tr>
1475 
       <tr>
1476 
        <td class="parametername">simDrivenValue</td>
1477 
        <td class="parametervalue">0</td>
1478 
       </tr>
1479 
       <tr>
1480 
        <td class="parametername">width</td>
1481 
        <td class="parametervalue">8</td>
1482 
       </tr>
1483 
       <tr>
1484 
        <td class="parametername">clockRate</td>
1485 
        <td class="parametervalue">30000000</td>
1486 
       </tr>
1487 
       <tr>
1488 
        <td class="parametername">derived_has_tri</td>
1489 
        <td class="parametervalue">false</td>
1490 
       </tr>
1491 
       <tr>
1492 
        <td class="parametername">derived_has_out</td>
1493 
        <td class="parametervalue">false</td>
1494 
       </tr>
1495 
       <tr>
1496 
        <td class="parametername">derived_has_in</td>
1497 
        <td class="parametervalue">true</td>
1498 
       </tr>
1499 
       <tr>
1500 
        <td class="parametername">derived_do_test_bench_wiring</td>
1501 
        <td class="parametervalue">false</td>
1502 
       </tr>
1503 
       <tr>
1504 
        <td class="parametername">derived_capture</td>
1505 
        <td class="parametervalue">false</td>
1506 
       </tr>
1507 
       <tr>
1508 
        <td class="parametername">derived_edge_type</td>
1509 
        <td class="parametervalue">NONE</td>
1510 
       </tr>
1511 
       <tr>
1512 
        <td class="parametername">derived_irq_type</td>
1513 
        <td class="parametervalue">NONE</td>
1514 
       </tr>
1515 
       <tr>
1516 
        <td class="parametername">derived_has_irq</td>
1517 
        <td class="parametervalue">false</td>
1518 
       </tr>
1519 
       <tr>
1520 
        <td class="parametername">deviceFamily</td>
1521 
        <td class="parametervalue">UNKNOWN</td>
1522 
       </tr>
1523 
       <tr>
1524 
        <td class="parametername">generateLegacySim</td>
1525 
        <td class="parametervalue">false</td>
1526 
       </tr>
1527 
      </table>
1528 
     </td>
1529 
    </tr>
1530 
   </table>&#160;&#160;
1531 
   <table class="flowbox">
1532 
    <tr>
1533 
     <td class="parametersbox">
1534 
      <h2>Software Assignments</h2>
1535 
      <table>
1536 
       <tr>
1537 
        <td class="parametername">BIT_CLEARING_EDGE_REGISTER</td>
1538 
        <td class="parametervalue">0</td>
1539 
       </tr>
1540 
       <tr>
1541 
        <td class="parametername">BIT_MODIFYING_OUTPUT_REGISTER</td>
1542 
        <td class="parametervalue">0</td>
1543 
       </tr>
1544 
       <tr>
1545 
        <td class="parametername">CAPTURE</td>
1546 
        <td class="parametervalue">0</td>
1547 
       </tr>
1548 
       <tr>
1549 
        <td class="parametername">DATA_WIDTH</td>
1550 
        <td class="parametervalue">8</td>
1551 
       </tr>
1552 
       <tr>
1553 
        <td class="parametername">DO_TEST_BENCH_WIRING</td>
1554 
        <td class="parametervalue">0</td>
1555 
       </tr>
1556 
       <tr>
1557 
        <td class="parametername">DRIVEN_SIM_VALUE</td>
1558 
        <td class="parametervalue">0</td>
1559 
       </tr>
1560 
       <tr>
1561 
        <td class="parametername">EDGE_TYPE</td>
1562 
        <td class="parametervalue">NONE</td>
1563 
       </tr>
1564 
       <tr>
1565 
        <td class="parametername">FREQ</td>
1566 
        <td class="parametervalue">30000000</td>
1567 
       </tr>
1568 
       <tr>
1569 
        <td class="parametername">HAS_IN</td>
1570 
        <td class="parametervalue">1</td>
1571 
       </tr>
1572 
       <tr>
1573 
        <td class="parametername">HAS_OUT</td>
1574 
        <td class="parametervalue">0</td>
1575 
       </tr>
1576 
       <tr>
1577 
        <td class="parametername">HAS_TRI</td>
1578 
        <td class="parametervalue">0</td>
1579 
       </tr>
1580 
       <tr>
1581 
        <td class="parametername">IRQ_TYPE</td>
1582 
        <td class="parametervalue">NONE</td>
1583 
       </tr>
1584 
       <tr>
1585 
        <td class="parametername">RESET_VALUE</td>
1586 
        <td class="parametervalue">0</td>
1587 
       </tr>
1588 
      </table>
1589 
     </td>
1590 
    </tr>
1591 
   </table>
1592 
  </div>
1593 
  <table class="blueBar">
1594 
   <tr>
1595 
    <td class="l">generation took 0.01 seconds</td>
1596 
    <td class="r">rendering took 0.09 seconds</td>
1597 
   </tr>
1598 
  </table>
1599 
 </body>
1600 
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