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[/] [ao486/] [trunk/] [syn/] [components/] [sd_card/] [soc.html] - Blame information for rev 2

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1 2 alfik 
<!DOCTYPE HTML PUBLIC "-//W3C//DTD HTML 4.0 Transitional//EN">
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<html xmlns="http://www.w3.org/1999/xhtml">
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 <head>
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  <title>datasheet for soc</title>
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 </head>
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 <body>
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  <table class="topTitle">
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   <tr>
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    <td class="l">soc</td>
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    <td class="r">
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     <br/>
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     <br/>
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    </td>
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   </tr>
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  </table>
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  <table class="blueBar">
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   <tr>
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    <td class="l">2013.08.18.13:49:06</td>
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    <td class="r">Datasheet</td>
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   </tr>
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  </table>
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  <div style="width:100% ;  height:10px"> </div>
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  <div class="label">Overview</div>
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  <div class="greydiv">
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   <div style="display:inline-block ; text-align:left">
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    <table class="connectionboxes">
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     <tr>
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      <td class="lefthandwire">&#160;&#160;clk_0&#160;</td>
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      <td class="main" rowspan="2">soc</td>
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     </tr>
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     <tr style="height:6px">
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      <td></td>
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     </tr>
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    </table>
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   </div><span style="display:inline-block ; width:28px"> </span>
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   <div style="display:inline-block ; text-align:left"><span>Processor
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     <br/>&#160;&#160;
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     <a href="#module_nios2_qsys_0"><b>nios2_qsys_0</b>
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     </a> Nios II 13.0
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     <br/>All Components
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     <br/>&#160;&#160;
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     <a href="#module_onchip_memory2_0"><b>onchip_memory2_0</b>
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     </a> altera_avalon_onchip_memory2 13.0.1.99.2
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     <br/>&#160;&#160;
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     <a href="#module_nios2_qsys_0"><b>nios2_qsys_0</b>
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     </a> altera_nios2_qsys 13.0
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     <br/>&#160;&#160;
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     <a href="#module_jtag_uart_0"><b>jtag_uart_0</b>
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     </a> altera_avalon_jtag_uart 13.0.1.99.2
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     <br/>&#160;&#160;
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     <a href="#module_sd_card_0"><b>sd_card_0</b>
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     </a> sd_card 1.0</span>
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   </div>
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  </div>
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  <div style="width:100% ;  height:10px"> </div>
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  <div class="label">Memory Map</div>
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  <table class="mmap">
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   <tr>
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    <td class="empty" rowspan="2"></td>
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    <td class="mastermodule" colspan="2">
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     <a href="#module_nios2_qsys_0"><b>nios2_qsys_0</b>
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     </a>
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    </td>
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    <td class="mastermodule" colspan="1">
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     <a href="#module_sd_card_0"><b>sd_card_0</b>
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     </a>
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    </td>
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   </tr>
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   <tr>
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    <td class="masterl">&#160;data_master</td>
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    <td class="masterr">&#160;instruction_master</td>
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    <td class="masterlr">&#160;avalon_master_0</td>
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   </tr>
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   <tr>
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    <td class="slavemodule">&#160;
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     <a href="#module_onchip_memory2_0"><b>onchip_memory2_0</b>
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     </a>
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    </td>
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    <td class="empty"></td>
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    <td class="empty"></td>
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    <td class="empty"></td>
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   </tr>
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   <tr>
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    <td class="slaveb">s1&#160;</td>
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    <td class="addr"><span style="color:#989898">0x</span>00008000</td>
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    <td class="addr"><span style="color:#989898">0x</span>00008000</td>
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    <td class="addr"><span style="color:#989898">0x</span>00008000</td>
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   </tr>
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   <tr>
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    <td class="slavemodule">&#160;
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     <a href="#module_nios2_qsys_0"><b>nios2_qsys_0</b>
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     </a>
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    </td>
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    <td class="empty"></td>
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    <td class="empty"></td>
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    <td class="empty"></td>
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   </tr>
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   <tr>
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    <td class="slaveb">jtag_debug_module&#160;</td>
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    <td class="addr"><span style="color:#989898">0x</span>00010800</td>
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    <td class="addr"><span style="color:#989898">0x</span>00010800</td>
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    <td class="empty"></td>
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   </tr>
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   <tr>
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    <td class="slavemodule">&#160;
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     <a href="#module_jtag_uart_0"><b>jtag_uart_0</b>
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     </a>
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    </td>
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    <td class="empty"></td>
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    <td class="empty"></td>
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    <td class="empty"></td>
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   </tr>
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   <tr>
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    <td class="slaveb">avalon_jtag_slave&#160;</td>
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    <td class="addr"><span style="color:#989898">0x</span>00011000</td>
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    <td class="empty"></td>
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    <td class="empty"></td>
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   </tr>
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   <tr>
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    <td class="slavemodule">&#160;
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     <a href="#module_sd_card_0"><b>sd_card_0</b>
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     </a>
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    </td>
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    <td class="empty"></td>
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    <td class="empty"></td>
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    <td class="empty"></td>
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   </tr>
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   <tr>
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    <td class="slaveb">avalon_slave_0&#160;</td>
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    <td class="addr"><span style="color:#989898">0x</span>00000000</td>
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    <td class="empty"></td>
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    <td class="empty"></td>
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   </tr>
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  </table>
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  <a name="module_clk_0"> </a>
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  <div>
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   <hr/>
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   <h2>clk_0</h2>clock_source v13.0
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   <br/>
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   <br/>
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   <br/>
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   <table class="flowbox">
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    <tr>
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     <td class="parametersbox">
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      <h2>Parameters</h2>
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      <table>
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       <tr>
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        <td class="parametername">clockFrequency</td>
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        <td class="parametervalue">40000000</td>
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       </tr>
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       <tr>
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        <td class="parametername">clockFrequencyKnown</td>
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        <td class="parametervalue">true</td>
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       </tr>
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       <tr>
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        <td class="parametername">inputClockFrequency</td>
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        <td class="parametervalue">0</td>
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       </tr>
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       <tr>
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        <td class="parametername">resetSynchronousEdges</td>
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        <td class="parametervalue">NONE</td>
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       </tr>
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       <tr>
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        <td class="parametername">deviceFamily</td>
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        <td class="parametervalue">UNKNOWN</td>
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       </tr>
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       <tr>
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        <td class="parametername">generateLegacySim</td>
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        <td class="parametervalue">false</td>
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       </tr>
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      </table>
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     </td>
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    </tr>
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   </table>&#160;&#160;
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   <table class="flowbox">
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    <tr>
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     <td class="parametersbox">
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      <h2>Software Assignments</h2>(none)</td>
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    </tr>
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   </table>
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  </div>
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  <a name="module_onchip_memory2_0"> </a>
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  <div>
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   <hr/>
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   <h2>onchip_memory2_0</h2>altera_avalon_onchip_memory2 v13.0.1.99.2
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   <br/>
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   <div class="greydiv">
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    <table class="connectionboxes">
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     <tr>
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      <td class="neighbor" rowspan="4">
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       <a href="#module_clk_0">clk_0</a>
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      </td>
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      <td class="from">clk&#160;&#160;</td>
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      <td class="main" rowspan="12">onchip_memory2_0</td>
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     </tr>
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     <tr>
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      <td class="to">&#160;&#160;clk1</td>
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     </tr>
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     <tr>
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      <td class="from">clk_reset&#160;&#160;</td>
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     </tr>
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     <tr>
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      <td class="to">&#160;&#160;reset1</td>
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     </tr>
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     <tr style="height:6px">
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      <td></td>
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     </tr>
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     <tr>
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      <td class="neighbor" rowspan="4">
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       <a href="#module_nios2_qsys_0">nios2_qsys_0</a>
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      </td>
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      <td class="from">data_master&#160;&#160;</td>
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     </tr>
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     <tr>
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      <td class="to">&#160;&#160;s1</td>
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     </tr>
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     <tr>
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      <td class="from">instruction_master&#160;&#160;</td>
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     </tr>
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     <tr>
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      <td class="to">&#160;&#160;s1</td>
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     </tr>
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     <tr style="height:6px">
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      <td></td>
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     </tr>
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     <tr>
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      <td class="neighbor" rowspan="2">
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       <a href="#module_sd_card_0">sd_card_0</a>
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      </td>
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      <td class="from">avalon_master_0&#160;&#160;</td>
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     </tr>
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     <tr>
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      <td class="to">&#160;&#160;s1</td>
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     </tr>
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    </table>
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   </div>
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   <br/>
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   <br/>
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   <table class="flowbox">
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    <tr>
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     <td class="parametersbox">
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      <h2>Parameters</h2>
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      <table>
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       <tr>
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        <td class="parametername">allowInSystemMemoryContentEditor</td>
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        <td class="parametervalue">false</td>
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       </tr>
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       <tr>
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        <td class="parametername">blockType</td>
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        <td class="parametervalue">AUTO</td>
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       </tr>
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       <tr>
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        <td class="parametername">dataWidth</td>
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        <td class="parametervalue">32</td>
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       </tr>
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       <tr>
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        <td class="parametername">dualPort</td>
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        <td class="parametervalue">false</td>
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       </tr>
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       <tr>
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        <td class="parametername">initMemContent</td>
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        <td class="parametervalue">true</td>
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       </tr>
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       <tr>
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        <td class="parametername">initializationFileName</td>
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        <td class="parametervalue">onchip_mem.hex</td>
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       </tr>
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       <tr>
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        <td class="parametername">instanceID</td>
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        <td class="parametervalue">NONE</td>
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       </tr>
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       <tr>
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        <td class="parametername">memorySize</td>
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        <td class="parametervalue">32768</td>
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       </tr>
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       <tr>
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        <td class="parametername">readDuringWriteMode</td>
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        <td class="parametervalue">DONT_CARE</td>
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       </tr>
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       <tr>
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        <td class="parametername">simAllowMRAMContentsFile</td>
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        <td class="parametervalue">false</td>
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       </tr>
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       <tr>
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        <td class="parametername">simMemInitOnlyFilename</td>
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        <td class="parametervalue">0</td>
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       </tr>
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       <tr>
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        <td class="parametername">singleClockOperation</td>
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        <td class="parametervalue">false</td>
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       </tr>
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       <tr>
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        <td class="parametername">slave1Latency</td>
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        <td class="parametervalue">1</td>
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       </tr>
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       <tr>
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        <td class="parametername">slave2Latency</td>
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        <td class="parametervalue">1</td>
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       </tr>
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       <tr>
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        <td class="parametername">useNonDefaultInitFile</td>
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        <td class="parametervalue">false</td>
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       </tr>
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       <tr>
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        <td class="parametername">useShallowMemBlocks</td>
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        <td class="parametervalue">false</td>
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       </tr>
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       <tr>
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        <td class="parametername">writable</td>
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        <td class="parametervalue">true</td>
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       </tr>
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       <tr>
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        <td class="parametername">autoInitializationFileName</td>
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        <td class="parametervalue">soc_onchip_memory2_0</td>
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       </tr>
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       <tr>
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        <td class="parametername">deviceFamily</td>
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        <td class="parametervalue">CYCLONEIVE</td>
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       </tr>
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       <tr>
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        <td class="parametername">deviceFeatures</td>
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        <td class="parametervalue">ADDRESS_STALL 1 CELL_LEVEL_BACK_ANNOTATION_DISABLED 0 COMPILER_SUPPORT 1 DSP 0 DSP_SHIFTER_BLOCK 0 DUMP_ASM_LAB_BITS_FOR_POWER 1 EMUL 1 ENABLE_ADVANCED_IO_ANALYSIS_GUI_FEATURES 1 EPCS 1 ESB 0 FAKE1 0 FAKE2 0 FAKE3 0 FAMILY_LEVEL_INSTALLATION_ONLY 1 FITTER_USE_FALLING_EDGE_DELAY 0 GENERATE_DC_ON_CURRENT_WARNING_FOR_INTERNAL_CLAMPING_DIODE 0 HARDCOPY 0 HAS_18_BIT_MULTS 0 HAS_ACE_SUPPORT 1 HAS_ADJUSTABLE_OUTPUT_IO_TIMING_MEAS_POINT 0 HAS_ADVANCED_IO_INVERTED_CORNER 0 HAS_ADVANCED_IO_POWER_SUPPORT 1 HAS_ADVANCED_IO_TIMING_SUPPORT 1 HAS_ALM_SUPPORT 0 HAS_ATOM_AND_ROUTING_POWER_MODELED_TOGETHER 0 HAS_AUTO_DERIVE_CLOCK_UNCERTAINTY_SUPPORT 0 HAS_AUTO_FIT_SUPPORT 1 HAS_BALANCED_OPT_TECHNIQUE_SUPPORT 1 HAS_BENEFICIAL_SKEW_SUPPORT 1 HAS_BITLEVEL_DRIVE_STRENGTH_CONTROL 1 HAS_BSDL_FILE_GENERATION 1 HAS_CGA_SUPPORT 1 HAS_CHECK_NETLIST_SUPPORT 0 HAS_CLOCK_REGION_CHECKER_ENABLED 1 HAS_CORE_JUNCTION_TEMP_DERATING 0 HAS_CROSSTALK_SUPPORT 0 HAS_CUSTOM_REGION_SUPPORT 1 HAS_DAP_JTAG_FROM_HPS 0 HAS_DATA_DRIVEN_ACVQ_HSSI_SUPPORT 0 HAS_DDB_FDI_SUPPORT 0 HAS_DESIGN_ANALYZER_SUPPORT 1 HAS_DETAILED_IO_RAIL_POWER_MODEL 1 HAS_DETAILED_LEIM_STATIC_POWER_MODEL 1 HAS_DETAILED_LE_POWER_MODEL 1 HAS_DETAILED_ROUTING_MUX_STATIC_POWER_MODEL 1 HAS_DETAILED_THERMAL_CIRCUIT_PARAMETER_SUPPORT 1 HAS_DEVICE_MIGRATION_SUPPORT 1 HAS_DIAGONAL_MIGRATION_SUPPORT 0 HAS_EMIF_TOOLKIT_SUPPORT 0 HAS_ERROR_DETECTION_SUPPORT 0 HAS_FAMILY_VARIANT_MIGRATION_SUPPORT 0 HAS_FANOUT_FREE_NODE_SUPPORT 1 HAS_FAST_FIT_SUPPORT 1 HAS_FITTER_EARLY_TIMING_ESTIMATE_SUPPORT 1 HAS_FITTER_ECO_SUPPORT 1 HAS_FIT_NETLIST_OPT_RETIME_SUPPORT 1 HAS_FIT_NETLIST_OPT_SUPPORT 1 HAS_FORMAL_VERIFICATION_SUPPORT 1 HAS_FPGA_XCHANGE_SUPPORT 1 HAS_FSAC_LUTRAM_REGISTER_PACKING_SUPPORT 0 HAS_FULL_DAT_MIN_TIMING_SUPPORT 1 HAS_FULL_INCREMENTAL_DESIGN_SUPPORT 1 HAS_FUNCTIONAL_SIMULATION_SUPPORT 1 HAS_FUNCTIONAL_VERILOG_SIMULATION_SUPPORT 0 HAS_FUNCTIONAL_VHDL_SIMULATION_SUPPORT 0 HAS_GLITCH_FILTERING_SUPPORT 1 HAS_HC_READY_SUPPORT 0 HAS_HIGH_SPEED_LOW_POWER_TILE_SUPPORT 0 HAS_HOLD_TIME_AVOIDANCE_ACROSS_CLOCK_SPINE_SUPPORT 1 HAS_HSPICE_WRITER_SUPPORT 1 HAS_HSSI_POWER_CALCULATOR 0 HAS_IBISO_WRITER_SUPPORT 0 HAS_INCREMENTAL_DAT_SUPPORT 1 HAS_INCREMENTAL_SYNTHESIS_SUPPORT 1 HAS_INTERFACE_PLANNER_SUPPORT 0 HAS_IO_ASSIGNMENT_ANALYSIS_SUPPORT 1 HAS_IO_DECODER 0 HAS_IO_PLACEMENT_OPTIMIZATION_SUPPORT 1 HAS_IO_SMART_RECOMPILE_SUPPORT 0 HAS_JITTER_SUPPORT 1 HAS_JTAG_SLD_HUB_SUPPORT 1 HAS_LIMITED_TCL_FITTER_SUPPORT 0 HAS_LOGIC_LOCK_SUPPORT 1 HAS_MICROPROCESSOR 0 HAS_MIF_SMART_COMPILE_SUPPORT 1 HAS_MINMAX_TIMING_MODELING_SUPPORT 1 HAS_MIN_TIMING_ANALYSIS_SUPPORT 1 HAS_MUX_RESTRUCTURE_SUPPORT 1 HAS_NEW_HC_FLOW_SUPPORT 0 HAS_NEW_SERDES_MAX_RESOURCE_COUNT_REPORTING_SUPPORT 1 HAS_NEW_VPR_SUPPORT 1 HAS_NONSOCKET_TECHNOLOGY_MIGRATION_SUPPORT 0 HAS_NO_HARDBLOCK_PARTITION_SUPPORT 0 HAS_NO_JTAG_USERCODE_SUPPORT 0 HAS_OPERATING_SETTINGS_AND_CONDITIONS_REPORTING_SUPPORT 1 HAS_PAD_LOCATION_ASSIGNMENT_SUPPORT 0 HAS_PARTIAL_RECONFIG_SUPPORT 0 HAS_PHYSICAL_NETLIST_OUTPUT 0 HAS_PHYSICAL_ROUTING_SUPPORT 0 HAS_PIN_SPECIFIC_VOLTAGE_SUPPORT 1 HAS_PLDM_REF_SUPPORT 1 HAS_POWER_ESTIMATION_SUPPORT 1 HAS_PRELIMINARY_CLOCK_UNCERTAINTY_NUMBERS 0 HAS_PRE_FITTER_FPP_SUPPORT 0 HAS_PRE_FITTER_LUTRAM_NETLIST_CHECKER_ENABLED 0 HAS_PVA_SUPPORT 1 HAS_RCF_SUPPORT 1 HAS_RCF_SUPPORT_FOR_DEBUGGING 0 HAS_RED_BLACK_SEPARATION_SUPPORT 0 HAS_RE_LEVEL_TIMING_GRAPH_SUPPORT 1 HAS_RISEFALL_DELAY_SUPPORT 1 HAS_SIGNAL_PROBE_SUPPORT 1 HAS_SIGNAL_TAP_SUPPORT 1 HAS_SIMULATOR_SUPPORT 0 HAS_SPLIT_IO_SUPPORT 1 HAS_SPLIT_LC_SUPPORT 1 HAS_SYNTH_FSYN_NETLIST_OPT_SUPPORT 1 HAS_SYNTH_NETLIST_OPT_RETIME_SUPPORT 1 HAS_SYNTH_NETLIST_OPT_SUPPORT 1 HAS_TCL_FITTER_SUPPORT 0 HAS_TECHNOLOGY_MIGRATION_SUPPORT 0 HAS_TEMPLATED_REGISTER_PACKING_SUPPORT 1 HAS_TIME_BORROWING_SUPPORT 0 HAS_TIMING_DRIVEN_SYNTHESIS_SUPPORT 1 HAS_TIMING_INFO_SUPPORT 1 HAS_TIMING_OPERATING_CONDITIONS 1 HAS_TIMING_SIMULATION_SUPPORT 1 HAS_TITAN_BASED_MAC_REGISTER_PACKER_SUPPORT 0 HAS_U2B2_SUPPORT 0 HAS_USER_HIGH_SPEED_LOW_POWER_TILE_SUPPORT 0 HAS_USE_FITTER_INFO_SUPPORT 1 HAS_VCCPD_POWER_RAIL 0 HAS_VERTICAL_MIGRATION_SUPPORT 1 HAS_VIEWDRAW_SYMBOL_SUPPORT 0 HAS_VIO_SUPPORT 1 HAS_VIRTUAL_DEVICES 0 HAS_WYSIWYG_DFFEAS_SUPPORT 1 HAS_XIBISO_WRITER_SUPPORT 1 IFP_USE_LEGACY_IO_CHECKER 0 INCREMENTAL_DESIGN_SUPPORTS_COMPATIBLE_CONSTRAINTS 1 INSTALLED 0 IS_CONFIG_ROM 0 IS_DEFAULT_FAMILY 0 IS_HARDCOPY_FAMILY 0 LVDS_IO 1 M10K_MEMORY 0 M144K_MEMORY 0 M20K_MEMORY 0 M4K_MEMORY 0 M512_MEMORY 0 M9K_MEMORY 1 MLAB_MEMORY 0 MRAM_MEMORY 0 NOT_LISTED 0 NO_RPE_SUPPORT 0 NO_SUPPORT_FOR_LOGICLOCK_CONTENT_BACK_ANNOTATION 1 NO_SUPPORT_FOR_STA_CLOCK_UNCERTAINTY_CHECK 0 NO_TDC_SUPPORT 0 POSTFIT_BAK_DATABASE_EXPORT_ENABLED 1 POSTMAP_BAK_DATABASE_EXPORT_ENABLED 1 PROGRAMMER_SUPPORT 1 QFIT_IN_DEVELOPMENT 0 QMAP_IN_DEVELOPMENT 0 RAM_LOGICAL_NAME_CHECKING_IN_CUT_ENABLED 1 REPORTS_METASTABILITY_MTBF 1 REQUIRES_INSTALLATION_PATCH 0 REQUIRES_LIST_OF_TEMPERATURE_AND_VOLTAGE_OPERATING_CONDITIONS 1 RESERVES_SIGNAL_PROBE_PINS 0 RESOLVE_MAX_FANOUT_EARLY 1 RESOLVE_MAX_FANOUT_LATE 0 RESPECTS_FIXED_SIZED_LOCKED_LOCATION_LOGICLOCK 1 RESTRICTED_USER_SELECTION 0 RISEFALL_SUPPORT_IS_HIDDEN 0 STRICT_TIMING_DB_CHECKS 0 SUPPORTS_ADDITIONAL_OPTIONS_FOR_UNUSED_IO 0 SUPPORTS_CRC 1 SUPPORTS_DIFFERENTIAL_AIOT_BOARD_TRACE_MODEL 1 SUPPORTS_DSP_BALANCING_BACK_ANNOTATION 0 SUPPORTS_GENERATION_OF_EARLY_POWER_ESTIMATOR_FILE 1 SUPPORTS_GLOBAL_SIGNAL_BACK_ANNOTATION 0 SUPPORTS_MAC_CHAIN_OUT_ADDER 0 SUPPORTS_RAM_PACKING_BACK_ANNOTATION 0 SUPPORTS_REG_PACKING_BACK_ANNOTATION 0 SUPPORTS_SIGNALPROBE_REGISTER_PIPELINING 1 SUPPORTS_SINGLE_ENDED_AIOT_BOARD_TRACE_MODEL 1 SUPPORTS_USER_MANUAL_LOGIC_DUPLICATION 1 TMV_RUN_CUSTOMIZABLE_VIEWER 1 TMV_RUN_INTERNAL_DETAILS 1 TMV_RUN_INTERNAL_DETAILS_ON_IO 0 TMV_RUN_INTERNAL_DETAILS_ON_IOBUF 1 TMV_RUN_INTERNAL_DETAILS_ON_LCELL 0 TMV_RUN_INTERNAL_DETAILS_ON_LRAM 0 TRANSCEIVER_3G_BLOCK 0 TRANSCEIVER_6G_BLOCK 0 USES_ACV_FOR_FLED 1 USES_ADB_FOR_BACK_ANNOTATION 1 USES_ALTERA_LNSIM 0 USES_ASIC_ROUTING_POWER_CALCULATOR 0 USES_DATA_DRIVEN_PLL_COMPUTATION_UTIL 1 USES_DEV 1 USES_ICP_FOR_ECO_FITTER 0 USES_LIBERTY_TIMING 0 USES_POWER_SIGNAL_ACTIVITIES 1 USES_THIRD_GENERATION_TIMING_MODELS_TIS 1 USES_U2B2_TIMING_MODELS 0 USE_ADVANCED_IO_POWER_BY_DEFAULT 1 USE_ADVANCED_IO_TIMING_BY_DEFAULT 1 USE_BASE_FAMILY_DDB_PATH 0 USE_OCT_AUTO_CALIBRATION 1 USE_RELAX_IO_ASSIGNMENT_RULES 0 USE_RISEFALL_ONLY 1 USE_SEPARATE_LIST_FOR_TECH_MIGRATION 0 USE_SINGLE_COMPILER_PASS_PLL_MIF_FILE_WRITER 1 USE_TITAN_IO_BASED_IO_REGISTER_PACKER_UTIL 0 WYSIWYG_BUS_WIDTH_CHECKING_IN_CUT_ENABLED 1</td>
375 
       </tr>
376 
       <tr>
377 
        <td class="parametername">derived_set_addr_width</td>
378 
        <td class="parametervalue">13</td>
379 
       </tr>
380 
       <tr>
381 
        <td class="parametername">derived_gui_ram_block_type</td>
382 
        <td class="parametervalue">Automatic</td>
383 
       </tr>
384 
       <tr>
385 
        <td class="parametername">derived_is_hardcopy</td>
386 
        <td class="parametervalue">false</td>
387 
       </tr>
388 
       <tr>
389 
        <td class="parametername">derived_init_file_name</td>
390 
        <td class="parametervalue">soc_onchip_memory2_0.hex</td>
391 
       </tr>
392 
       <tr>
393 
        <td class="parametername">generateLegacySim</td>
394 
        <td class="parametervalue">false</td>
395 
       </tr>
396 
      </table>
397 
     </td>
398 
    </tr>
399 
   </table>&#160;&#160;
400 
   <table class="flowbox">
401 
    <tr>
402 
     <td class="parametersbox">
403 
      <h2>Software Assignments</h2>
404 
      <table>
405 
       <tr>
406 
        <td class="parametername">ALLOW_IN_SYSTEM_MEMORY_CONTENT_EDITOR</td>
407 
        <td class="parametervalue">0</td>
408 
       </tr>
409 
       <tr>
410 
        <td class="parametername">ALLOW_MRAM_SIM_CONTENTS_ONLY_FILE</td>
411 
        <td class="parametervalue">0</td>
412 
       </tr>
413 
       <tr>
414 
        <td class="parametername">CONTENTS_INFO</td>
415 
        <td class="parametervalue">""</td>
416 
       </tr>
417 
       <tr>
418 
        <td class="parametername">DUAL_PORT</td>
419 
        <td class="parametervalue">0</td>
420 
       </tr>
421 
       <tr>
422 
        <td class="parametername">GUI_RAM_BLOCK_TYPE</td>
423 
        <td class="parametervalue">AUTO</td>
424 
       </tr>
425 
       <tr>
426 
        <td class="parametername">INIT_CONTENTS_FILE</td>
427 
        <td class="parametervalue">soc_onchip_memory2_0</td>
428 
       </tr>
429 
       <tr>
430 
        <td class="parametername">INIT_MEM_CONTENT</td>
431 
        <td class="parametervalue">1</td>
432 
       </tr>
433 
       <tr>
434 
        <td class="parametername">INSTANCE_ID</td>
435 
        <td class="parametervalue">NONE</td>
436 
       </tr>
437 
       <tr>
438 
        <td class="parametername">NON_DEFAULT_INIT_FILE_ENABLED</td>
439 
        <td class="parametervalue">0</td>
440 
       </tr>
441 
       <tr>
442 
        <td class="parametername">RAM_BLOCK_TYPE</td>
443 
        <td class="parametervalue">AUTO</td>
444 
       </tr>
445 
       <tr>
446 
        <td class="parametername">READ_DURING_WRITE_MODE</td>
447 
        <td class="parametervalue">DONT_CARE</td>
448 
       </tr>
449 
       <tr>
450 
        <td class="parametername">SINGLE_CLOCK_OP</td>
451 
        <td class="parametervalue">0</td>
452 
       </tr>
453 
       <tr>
454 
        <td class="parametername">SIZE_MULTIPLE</td>
455 
        <td class="parametervalue">1</td>
456 
       </tr>
457 
       <tr>
458 
        <td class="parametername">SIZE_VALUE</td>
459 
        <td class="parametervalue">32768</td>
460 
       </tr>
461 
       <tr>
462 
        <td class="parametername">WRITABLE</td>
463 
        <td class="parametervalue">1</td>
464 
       </tr>
465 
      </table>
466 
     </td>
467 
    </tr>
468 
   </table>
469 
  </div>
470 
  <a name="module_nios2_qsys_0"> </a>
471 
  <div>
472 
   <hr/>
473 
   <h2>nios2_qsys_0</h2>altera_nios2_qsys v13.0
474 
   <br/>
475 
   <div class="greydiv">
476 
    <table class="connectionboxes">
477 
     <tr>
478 
      <td class="neighbor" rowspan="4">
479 
       <a href="#module_clk_0">clk_0</a>
480 
      </td>
481 
      <td class="from">clk&#160;&#160;</td>
482 
      <td class="main" rowspan="16">nios2_qsys_0</td>
483 
     </tr>
484 
     <tr>
485 
      <td class="to">&#160;&#160;clk</td>
486 
     </tr>
487 
     <tr>
488 
      <td class="from">clk_reset&#160;&#160;</td>
489 
     </tr>
490 
     <tr>
491 
      <td class="to">&#160;&#160;reset_n</td>
492 
     </tr>
493 
     <tr>
494 
      <td></td>
495 
      <td></td>
496 
      <td class="from">data_master&#160;&#160;</td>
497 
      <td class="neighbor" rowspan="4">
498 
       <a href="#module_onchip_memory2_0">onchip_memory2_0</a>
499 
      </td>
500 
     </tr>
501 
     <tr>
502 
      <td></td>
503 
      <td></td>
504 
      <td class="to">&#160;&#160;s1</td>
505 
     </tr>
506 
     <tr>
507 
      <td></td>
508 
      <td></td>
509 
      <td class="from">instruction_master&#160;&#160;</td>
510 
     </tr>
511 
     <tr>
512 
      <td></td>
513 
      <td></td>
514 
      <td class="to">&#160;&#160;s1</td>
515 
     </tr>
516 
     <tr style="height:6px">
517 
      <td></td>
518 
     </tr>
519 
     <tr>
520 
      <td></td>
521 
      <td></td>
522 
      <td class="from">data_master&#160;&#160;</td>
523 
      <td class="neighbor" rowspan="4">
524 
       <a href="#module_jtag_uart_0">jtag_uart_0</a>
525 
      </td>
526 
     </tr>
527 
     <tr>
528 
      <td></td>
529 
      <td></td>
530 
      <td class="to">&#160;&#160;avalon_jtag_slave</td>
531 
     </tr>
532 
     <tr>
533 
      <td></td>
534 
      <td></td>
535 
      <td class="from">d_irq&#160;&#160;</td>
536 
     </tr>
537 
     <tr>
538 
      <td></td>
539 
      <td></td>
540 
      <td class="to">&#160;&#160;irq</td>
541 
     </tr>
542 
     <tr style="height:6px">
543 
      <td></td>
544 
     </tr>
545 
     <tr>
546 
      <td></td>
547 
      <td></td>
548 
      <td class="from">data_master&#160;&#160;</td>
549 
      <td class="neighbor" rowspan="2">
550 
       <a href="#module_sd_card_0">sd_card_0</a>
551 
      </td>
552 
     </tr>
553 
     <tr>
554 
      <td></td>
555 
      <td></td>
556 
      <td class="to">&#160;&#160;avalon_slave_0</td>
557 
     </tr>
558 
    </table>
559 
   </div>
560 
   <br/>
561 
   <br/>
562 
   <table class="flowbox">
563 
    <tr>
564 
     <td class="parametersbox">
565 
      <h2>Parameters</h2>
566 
      <table>
567 
       <tr>
568 
        <td class="parametername">setting_showUnpublishedSettings</td>
569 
        <td class="parametervalue">false</td>
570 
       </tr>
571 
       <tr>
572 
        <td class="parametername">setting_showInternalSettings</td>
573 
        <td class="parametervalue">false</td>
574 
       </tr>
575 
       <tr>
576 
        <td class="parametername">setting_preciseSlaveAccessErrorException</td>
577 
        <td class="parametervalue">false</td>
578 
       </tr>
579 
       <tr>
580 
        <td class="parametername">setting_preciseIllegalMemAccessException</td>
581 
        <td class="parametervalue">false</td>
582 
       </tr>
583 
       <tr>
584 
        <td class="parametername">setting_preciseDivisionErrorException</td>
585 
        <td class="parametervalue">false</td>
586 
       </tr>
587 
       <tr>
588 
        <td class="parametername">setting_performanceCounter</td>
589 
        <td class="parametervalue">false</td>
590 
       </tr>
591 
       <tr>
592 
        <td class="parametername">setting_illegalMemAccessDetection</td>
593 
        <td class="parametervalue">false</td>
594 
       </tr>
595 
       <tr>
596 
        <td class="parametername">setting_illegalInstructionsTrap</td>
597 
        <td class="parametervalue">false</td>
598 
       </tr>
599 
       <tr>
600 
        <td class="parametername">setting_fullWaveformSignals</td>
601 
        <td class="parametervalue">false</td>
602 
       </tr>
603 
       <tr>
604 
        <td class="parametername">setting_extraExceptionInfo</td>
605 
        <td class="parametervalue">false</td>
606 
       </tr>
607 
       <tr>
608 
        <td class="parametername">setting_exportPCB</td>
609 
        <td class="parametervalue">false</td>
610 
       </tr>
611 
       <tr>
612 
        <td class="parametername">setting_debugSimGen</td>
613 
        <td class="parametervalue">false</td>
614 
       </tr>
615 
       <tr>
616 
        <td class="parametername">setting_clearXBitsLDNonBypass</td>
617 
        <td class="parametervalue">true</td>
618 
       </tr>
619 
       <tr>
620 
        <td class="parametername">setting_bit31BypassDCache</td>
621 
        <td class="parametervalue">true</td>
622 
       </tr>
623 
       <tr>
624 
        <td class="parametername">setting_bigEndian</td>
625 
        <td class="parametervalue">false</td>
626 
       </tr>
627 
       <tr>
628 
        <td class="parametername">setting_export_large_RAMs</td>
629 
        <td class="parametervalue">false</td>
630 
       </tr>
631 
       <tr>
632 
        <td class="parametername">setting_asic_enabled</td>
633 
        <td class="parametervalue">false</td>
634 
       </tr>
635 
       <tr>
636 
        <td class="parametername">setting_asic_synopsys_translate_on_off</td>
637 
        <td class="parametervalue">false</td>
638 
       </tr>
639 
       <tr>
640 
        <td class="parametername">setting_oci_export_jtag_signals</td>
641 
        <td class="parametervalue">false</td>
642 
       </tr>
643 
       <tr>
644 
        <td class="parametername">setting_bhtIndexPcOnly</td>
645 
        <td class="parametervalue">false</td>
646 
       </tr>
647 
       <tr>
648 
        <td class="parametername">setting_avalonDebugPortPresent</td>
649 
        <td class="parametervalue">false</td>
650 
       </tr>
651 
       <tr>
652 
        <td class="parametername">setting_alwaysEncrypt</td>
653 
        <td class="parametervalue">true</td>
654 
       </tr>
655 
       <tr>
656 
        <td class="parametername">setting_allowFullAddressRange</td>
657 
        <td class="parametervalue">false</td>
658 
       </tr>
659 
       <tr>
660 
        <td class="parametername">setting_activateTrace</td>
661 
        <td class="parametervalue">true</td>
662 
       </tr>
663 
       <tr>
664 
        <td class="parametername">setting_activateTestEndChecker</td>
665 
        <td class="parametervalue">false</td>
666 
       </tr>
667 
       <tr>
668 
        <td class="parametername">setting_activateMonitors</td>
669 
        <td class="parametervalue">true</td>
670 
       </tr>
671 
       <tr>
672 
        <td class="parametername">setting_activateModelChecker</td>
673 
        <td class="parametervalue">false</td>
674 
       </tr>
675 
       <tr>
676 
        <td class="parametername">setting_HDLSimCachesCleared</td>
677 
        <td class="parametervalue">true</td>
678 
       </tr>
679 
       <tr>
680 
        <td class="parametername">setting_HBreakTest</td>
681 
        <td class="parametervalue">false</td>
682 
       </tr>
683 
       <tr>
684 
        <td class="parametername">muldiv_divider</td>
685 
        <td class="parametervalue">false</td>
686 
       </tr>
687 
       <tr>
688 
        <td class="parametername">mpu_useLimit</td>
689 
        <td class="parametervalue">false</td>
690 
       </tr>
691 
       <tr>
692 
        <td class="parametername">mpu_enabled</td>
693 
        <td class="parametervalue">false</td>
694 
       </tr>
695 
       <tr>
696 
        <td class="parametername">mmu_enabled</td>
697 
        <td class="parametervalue">false</td>
698 
       </tr>
699 
       <tr>
700 
        <td class="parametername">mmu_autoAssignTlbPtrSz</td>
701 
        <td class="parametervalue">true</td>
702 
       </tr>
703 
       <tr>
704 
        <td class="parametername">manuallyAssignCpuID</td>
705 
        <td class="parametervalue">true</td>
706 
       </tr>
707 
       <tr>
708 
        <td class="parametername">debug_triggerArming</td>
709 
        <td class="parametervalue">true</td>
710 
       </tr>
711 
       <tr>
712 
        <td class="parametername">debug_embeddedPLL</td>
713 
        <td class="parametervalue">true</td>
714 
       </tr>
715 
       <tr>
716 
        <td class="parametername">debug_debugReqSignals</td>
717 
        <td class="parametervalue">false</td>
718 
       </tr>
719 
       <tr>
720 
        <td class="parametername">debug_assignJtagInstanceID</td>
721 
        <td class="parametervalue">false</td>
722 
       </tr>
723 
       <tr>
724 
        <td class="parametername">dcache_omitDataMaster</td>
725 
        <td class="parametervalue">false</td>
726 
       </tr>
727 
       <tr>
728 
        <td class="parametername">cpuReset</td>
729 
        <td class="parametervalue">false</td>
730 
       </tr>
731 
       <tr>
732 
        <td class="parametername">is_hardcopy_compatible</td>
733 
        <td class="parametervalue">false</td>
734 
       </tr>
735 
       <tr>
736 
        <td class="parametername">setting_shadowRegisterSets</td>
737 
        <td class="parametervalue">0</td>
738 
       </tr>
739 
       <tr>
740 
        <td class="parametername">mpu_numOfInstRegion</td>
741 
        <td class="parametervalue">8</td>
742 
       </tr>
743 
       <tr>
744 
        <td class="parametername">mpu_numOfDataRegion</td>
745 
        <td class="parametervalue">8</td>
746 
       </tr>
747 
       <tr>
748 
        <td class="parametername">mmu_TLBMissExcOffset</td>
749 
        <td class="parametervalue">0</td>
750 
       </tr>
751 
       <tr>
752 
        <td class="parametername">debug_jtagInstanceID</td>
753 
        <td class="parametervalue">0</td>
754 
       </tr>
755 
       <tr>
756 
        <td class="parametername">resetOffset</td>
757 
        <td class="parametervalue">0</td>
758 
       </tr>
759 
       <tr>
760 
        <td class="parametername">exceptionOffset</td>
761 
        <td class="parametervalue">32</td>
762 
       </tr>
763 
       <tr>
764 
        <td class="parametername">cpuID</td>
765 
        <td class="parametervalue">0</td>
766 
       </tr>
767 
       <tr>
768 
        <td class="parametername">cpuID_stored</td>
769 
        <td class="parametervalue">0</td>
770 
       </tr>
771 
       <tr>
772 
        <td class="parametername">breakOffset</td>
773 
        <td class="parametervalue">32</td>
774 
       </tr>
775 
       <tr>
776 
        <td class="parametername">userDefinedSettings</td>
777 
        <td class="parametervalue"></td>
778 
       </tr>
779 
       <tr>
780 
        <td class="parametername">resetSlave</td>
781 
        <td class="parametervalue">onchip_memory2_0.s1</td>
782 
       </tr>
783 
       <tr>
784 
        <td class="parametername">mmu_TLBMissExcSlave</td>
785 
        <td class="parametervalue">None</td>
786 
       </tr>
787 
       <tr>
788 
        <td class="parametername">exceptionSlave</td>
789 
        <td class="parametervalue">onchip_memory2_0.s1</td>
790 
       </tr>
791 
       <tr>
792 
        <td class="parametername">breakSlave</td>
793 
        <td class="parametervalue">nios2_qsys_0.jtag_debug_module</td>
794 
       </tr>
795 
       <tr>
796 
        <td class="parametername">setting_perfCounterWidth</td>
797 
        <td class="parametervalue">32</td>
798 
       </tr>
799 
       <tr>
800 
        <td class="parametername">setting_interruptControllerType</td>
801 
        <td class="parametervalue">Internal</td>
802 
       </tr>
803 
       <tr>
804 
        <td class="parametername">setting_branchPredictionType</td>
805 
        <td class="parametervalue">Automatic</td>
806 
       </tr>
807 
       <tr>
808 
        <td class="parametername">setting_bhtPtrSz</td>
809 
        <td class="parametervalue">8</td>
810 
       </tr>
811 
       <tr>
812 
        <td class="parametername">muldiv_multiplierType</td>
813 
        <td class="parametervalue">EmbeddedMulFast</td>
814 
       </tr>
815 
       <tr>
816 
        <td class="parametername">mpu_minInstRegionSize</td>
817 
        <td class="parametervalue">12</td>
818 
       </tr>
819 
       <tr>
820 
        <td class="parametername">mpu_minDataRegionSize</td>
821 
        <td class="parametervalue">12</td>
822 
       </tr>
823 
       <tr>
824 
        <td class="parametername">mmu_uitlbNumEntries</td>
825 
        <td class="parametervalue">4</td>
826 
       </tr>
827 
       <tr>
828 
        <td class="parametername">mmu_udtlbNumEntries</td>
829 
        <td class="parametervalue">6</td>
830 
       </tr>
831 
       <tr>
832 
        <td class="parametername">mmu_tlbPtrSz</td>
833 
        <td class="parametervalue">7</td>
834 
       </tr>
835 
       <tr>
836 
        <td class="parametername">mmu_tlbNumWays</td>
837 
        <td class="parametervalue">16</td>
838 
       </tr>
839 
       <tr>
840 
        <td class="parametername">mmu_processIDNumBits</td>
841 
        <td class="parametervalue">8</td>
842 
       </tr>
843 
       <tr>
844 
        <td class="parametername">impl</td>
845 
        <td class="parametervalue">Tiny</td>
846 
       </tr>
847 
       <tr>
848 
        <td class="parametername">icache_size</td>
849 
        <td class="parametervalue">4096</td>
850 
       </tr>
851 
       <tr>
852 
        <td class="parametername">icache_tagramBlockType</td>
853 
        <td class="parametervalue">Automatic</td>
854 
       </tr>
855 
       <tr>
856 
        <td class="parametername">icache_ramBlockType</td>
857 
        <td class="parametervalue">Automatic</td>
858 
       </tr>
859 
       <tr>
860 
        <td class="parametername">icache_numTCIM</td>
861 
        <td class="parametervalue">0</td>
862 
       </tr>
863 
       <tr>
864 
        <td class="parametername">icache_burstType</td>
865 
        <td class="parametervalue">None</td>
866 
       </tr>
867 
       <tr>
868 
        <td class="parametername">dcache_bursts</td>
869 
        <td class="parametervalue">false</td>
870 
       </tr>
871 
       <tr>
872 
        <td class="parametername">dcache_victim_buf_impl</td>
873 
        <td class="parametervalue">ram</td>
874 
       </tr>
875 
       <tr>
876 
        <td class="parametername">debug_level</td>
877 
        <td class="parametervalue">Level1</td>
878 
       </tr>
879 
       <tr>
880 
        <td class="parametername">debug_OCIOnchipTrace</td>
881 
        <td class="parametervalue">_128</td>
882 
       </tr>
883 
       <tr>
884 
        <td class="parametername">dcache_size</td>
885 
        <td class="parametervalue">2048</td>
886 
       </tr>
887 
       <tr>
888 
        <td class="parametername">dcache_tagramBlockType</td>
889 
        <td class="parametervalue">Automatic</td>
890 
       </tr>
891 
       <tr>
892 
        <td class="parametername">dcache_ramBlockType</td>
893 
        <td class="parametervalue">Automatic</td>
894 
       </tr>
895 
       <tr>
896 
        <td class="parametername">dcache_numTCDM</td>
897 
        <td class="parametervalue">0</td>
898 
       </tr>
899 
       <tr>
900 
        <td class="parametername">dcache_lineSize</td>
901 
        <td class="parametervalue">32</td>
902 
       </tr>
903 
       <tr>
904 
        <td class="parametername">setting_exportvectors</td>
905 
        <td class="parametervalue">false</td>
906 
       </tr>
907 
       <tr>
908 
        <td class="parametername">setting_ecc_present</td>
909 
        <td class="parametervalue">false</td>
910 
       </tr>
911 
       <tr>
912 
        <td class="parametername">regfile_ramBlockType</td>
913 
        <td class="parametervalue">Automatic</td>
914 
       </tr>
915 
       <tr>
916 
        <td class="parametername">ocimem_ramBlockType</td>
917 
        <td class="parametervalue">Automatic</td>
918 
       </tr>
919 
       <tr>
920 
        <td class="parametername">mmu_ramBlockType</td>
921 
        <td class="parametervalue">Automatic</td>
922 
       </tr>
923 
       <tr>
924 
        <td class="parametername">bht_ramBlockType</td>
925 
        <td class="parametervalue">Automatic</td>
926 
       </tr>
927 
       <tr>
928 
        <td class="parametername">resetAbsoluteAddr</td>
929 
        <td class="parametervalue">32768</td>
930 
       </tr>
931 
       <tr>
932 
        <td class="parametername">exceptionAbsoluteAddr</td>
933 
        <td class="parametervalue">32800</td>
934 
       </tr>
935 
       <tr>
936 
        <td class="parametername">breakAbsoluteAddr</td>
937 
        <td class="parametervalue">67616</td>
938 
       </tr>
939 
       <tr>
940 
        <td class="parametername">mmu_TLBMissExcAbsAddr</td>
941 
        <td class="parametervalue">0</td>
942 
       </tr>
943 
       <tr>
944 
        <td class="parametername">dcache_bursts_derived</td>
945 
        <td class="parametervalue">false</td>
946 
       </tr>
947 
       <tr>
948 
        <td class="parametername">dcache_size_derived</td>
949 
        <td class="parametervalue">2048</td>
950 
       </tr>
951 
       <tr>
952 
        <td class="parametername">dcache_lineSize_derived</td>
953 
        <td class="parametervalue">32</td>
954 
       </tr>
955 
       <tr>
956 
        <td class="parametername">translate_on</td>
957 
        <td class="parametervalue"> "synthesis translate_on"  </td>
958 
       </tr>
959 
       <tr>
960 
        <td class="parametername">translate_off</td>
961 
        <td class="parametervalue"> "synthesis translate_off" </td>
962 
       </tr>
963 
       <tr>
964 
        <td class="parametername">instAddrWidth</td>
965 
        <td class="parametervalue">17</td>
966 
       </tr>
967 
       <tr>
968 
        <td class="parametername">dataAddrWidth</td>
969 
        <td class="parametervalue">17</td>
970 
       </tr>
971 
       <tr>
972 
        <td class="parametername">tightlyCoupledDataMaster0AddrWidth</td>
973 
        <td class="parametervalue">1</td>
974 
       </tr>
975 
       <tr>
976 
        <td class="parametername">tightlyCoupledDataMaster1AddrWidth</td>
977 
        <td class="parametervalue">1</td>
978 
       </tr>
979 
       <tr>
980 
        <td class="parametername">tightlyCoupledDataMaster2AddrWidth</td>
981 
        <td class="parametervalue">1</td>
982 
       </tr>
983 
       <tr>
984 
        <td class="parametername">tightlyCoupledDataMaster3AddrWidth</td>
985 
        <td class="parametervalue">1</td>
986 
       </tr>
987 
       <tr>
988 
        <td class="parametername">tightlyCoupledInstructionMaster0AddrWidth</td>
989 
        <td class="parametervalue">1</td>
990 
       </tr>
991 
       <tr>
992 
        <td class="parametername">tightlyCoupledInstructionMaster1AddrWidth</td>
993 
        <td class="parametervalue">1</td>
994 
       </tr>
995 
       <tr>
996 
        <td class="parametername">tightlyCoupledInstructionMaster2AddrWidth</td>
997 
        <td class="parametervalue">1</td>
998 
       </tr>
999 
       <tr>
1000 
        <td class="parametername">tightlyCoupledInstructionMaster3AddrWidth</td>
1001 
        <td class="parametervalue">1</td>
1002 
       </tr>
1003 
       <tr>
1004 
        <td class="parametername">instSlaveMapParam</td>
1005 
        <td class="parametervalue">&lt;address-map&gt;&lt;slave name='onchip_memory2_0.s1' start='0x8000' end='0x10000' /&gt;&lt;slave name='nios2_qsys_0.jtag_debug_module' start='0x10800' end='0x11000' /&gt;&lt;/address-map&gt;</td>
1006 
       </tr>
1007 
       <tr>
1008 
        <td class="parametername">dataSlaveMapParam</td>
1009 
        <td class="parametervalue">&lt;address-map&gt;&lt;slave name='sd_card_0.avalon_slave_0' start='0x0' end='0x10' /&gt;&lt;slave name='onchip_memory2_0.s1' start='0x8000' end='0x10000' /&gt;&lt;slave name='nios2_qsys_0.jtag_debug_module' start='0x10800' end='0x11000' /&gt;&lt;slave name='jtag_uart_0.avalon_jtag_slave' start='0x11000' end='0x11008' /&gt;&lt;/address-map&gt;</td>
1010 
       </tr>
1011 
       <tr>
1012 
        <td class="parametername">clockFrequency</td>
1013 
        <td class="parametervalue">40000000</td>
1014 
       </tr>
1015 
       <tr>
1016 
        <td class="parametername">deviceFamilyName</td>
1017 
        <td class="parametervalue">CYCLONEIVE</td>
1018 
       </tr>
1019 
       <tr>
1020 
        <td class="parametername">internalIrqMaskSystemInfo</td>
1021 
        <td class="parametervalue">1</td>
1022 
       </tr>
1023 
       <tr>
1024 
        <td class="parametername">customInstSlavesSystemInfo</td>
1025 
        <td class="parametervalue">&lt;info/&gt;</td>
1026 
       </tr>
1027 
       <tr>
1028 
        <td class="parametername">deviceFeaturesSystemInfo</td>
1029 
        <td class="parametervalue">ADDRESS_STALL 1 CELL_LEVEL_BACK_ANNOTATION_DISABLED 0 COMPILER_SUPPORT 1 DSP 0 DSP_SHIFTER_BLOCK 0 DUMP_ASM_LAB_BITS_FOR_POWER 1 EMUL 1 ENABLE_ADVANCED_IO_ANALYSIS_GUI_FEATURES 1 EPCS 1 ESB 0 FAKE1 0 FAKE2 0 FAKE3 0 FAMILY_LEVEL_INSTALLATION_ONLY 1 FITTER_USE_FALLING_EDGE_DELAY 0 GENERATE_DC_ON_CURRENT_WARNING_FOR_INTERNAL_CLAMPING_DIODE 0 HARDCOPY 0 HAS_18_BIT_MULTS 0 HAS_ACE_SUPPORT 1 HAS_ADJUSTABLE_OUTPUT_IO_TIMING_MEAS_POINT 0 HAS_ADVANCED_IO_INVERTED_CORNER 0 HAS_ADVANCED_IO_POWER_SUPPORT 1 HAS_ADVANCED_IO_TIMING_SUPPORT 1 HAS_ALM_SUPPORT 0 HAS_ATOM_AND_ROUTING_POWER_MODELED_TOGETHER 0 HAS_AUTO_DERIVE_CLOCK_UNCERTAINTY_SUPPORT 0 HAS_AUTO_FIT_SUPPORT 1 HAS_BALANCED_OPT_TECHNIQUE_SUPPORT 1 HAS_BENEFICIAL_SKEW_SUPPORT 1 HAS_BITLEVEL_DRIVE_STRENGTH_CONTROL 1 HAS_BSDL_FILE_GENERATION 1 HAS_CGA_SUPPORT 1 HAS_CHECK_NETLIST_SUPPORT 0 HAS_CLOCK_REGION_CHECKER_ENABLED 1 HAS_CORE_JUNCTION_TEMP_DERATING 0 HAS_CROSSTALK_SUPPORT 0 HAS_CUSTOM_REGION_SUPPORT 1 HAS_DAP_JTAG_FROM_HPS 0 HAS_DATA_DRIVEN_ACVQ_HSSI_SUPPORT 0 HAS_DDB_FDI_SUPPORT 0 HAS_DESIGN_ANALYZER_SUPPORT 1 HAS_DETAILED_IO_RAIL_POWER_MODEL 1 HAS_DETAILED_LEIM_STATIC_POWER_MODEL 1 HAS_DETAILED_LE_POWER_MODEL 1 HAS_DETAILED_ROUTING_MUX_STATIC_POWER_MODEL 1 HAS_DETAILED_THERMAL_CIRCUIT_PARAMETER_SUPPORT 1 HAS_DEVICE_MIGRATION_SUPPORT 1 HAS_DIAGONAL_MIGRATION_SUPPORT 0 HAS_EMIF_TOOLKIT_SUPPORT 0 HAS_ERROR_DETECTION_SUPPORT 0 HAS_FAMILY_VARIANT_MIGRATION_SUPPORT 0 HAS_FANOUT_FREE_NODE_SUPPORT 1 HAS_FAST_FIT_SUPPORT 1 HAS_FITTER_EARLY_TIMING_ESTIMATE_SUPPORT 1 HAS_FITTER_ECO_SUPPORT 1 HAS_FIT_NETLIST_OPT_RETIME_SUPPORT 1 HAS_FIT_NETLIST_OPT_SUPPORT 1 HAS_FORMAL_VERIFICATION_SUPPORT 1 HAS_FPGA_XCHANGE_SUPPORT 1 HAS_FSAC_LUTRAM_REGISTER_PACKING_SUPPORT 0 HAS_FULL_DAT_MIN_TIMING_SUPPORT 1 HAS_FULL_INCREMENTAL_DESIGN_SUPPORT 1 HAS_FUNCTIONAL_SIMULATION_SUPPORT 1 HAS_FUNCTIONAL_VERILOG_SIMULATION_SUPPORT 0 HAS_FUNCTIONAL_VHDL_SIMULATION_SUPPORT 0 HAS_GLITCH_FILTERING_SUPPORT 1 HAS_HC_READY_SUPPORT 0 HAS_HIGH_SPEED_LOW_POWER_TILE_SUPPORT 0 HAS_HOLD_TIME_AVOIDANCE_ACROSS_CLOCK_SPINE_SUPPORT 1 HAS_HSPICE_WRITER_SUPPORT 1 HAS_HSSI_POWER_CALCULATOR 0 HAS_IBISO_WRITER_SUPPORT 0 HAS_INCREMENTAL_DAT_SUPPORT 1 HAS_INCREMENTAL_SYNTHESIS_SUPPORT 1 HAS_INTERFACE_PLANNER_SUPPORT 0 HAS_IO_ASSIGNMENT_ANALYSIS_SUPPORT 1 HAS_IO_DECODER 0 HAS_IO_PLACEMENT_OPTIMIZATION_SUPPORT 1 HAS_IO_SMART_RECOMPILE_SUPPORT 0 HAS_JITTER_SUPPORT 1 HAS_JTAG_SLD_HUB_SUPPORT 1 HAS_LIMITED_TCL_FITTER_SUPPORT 0 HAS_LOGIC_LOCK_SUPPORT 1 HAS_MICROPROCESSOR 0 HAS_MIF_SMART_COMPILE_SUPPORT 1 HAS_MINMAX_TIMING_MODELING_SUPPORT 1 HAS_MIN_TIMING_ANALYSIS_SUPPORT 1 HAS_MUX_RESTRUCTURE_SUPPORT 1 HAS_NEW_HC_FLOW_SUPPORT 0 HAS_NEW_SERDES_MAX_RESOURCE_COUNT_REPORTING_SUPPORT 1 HAS_NEW_VPR_SUPPORT 1 HAS_NONSOCKET_TECHNOLOGY_MIGRATION_SUPPORT 0 HAS_NO_HARDBLOCK_PARTITION_SUPPORT 0 HAS_NO_JTAG_USERCODE_SUPPORT 0 HAS_OPERATING_SETTINGS_AND_CONDITIONS_REPORTING_SUPPORT 1 HAS_PAD_LOCATION_ASSIGNMENT_SUPPORT 0 HAS_PARTIAL_RECONFIG_SUPPORT 0 HAS_PHYSICAL_NETLIST_OUTPUT 0 HAS_PHYSICAL_ROUTING_SUPPORT 0 HAS_PIN_SPECIFIC_VOLTAGE_SUPPORT 1 HAS_PLDM_REF_SUPPORT 1 HAS_POWER_ESTIMATION_SUPPORT 1 HAS_PRELIMINARY_CLOCK_UNCERTAINTY_NUMBERS 0 HAS_PRE_FITTER_FPP_SUPPORT 0 HAS_PRE_FITTER_LUTRAM_NETLIST_CHECKER_ENABLED 0 HAS_PVA_SUPPORT 1 HAS_RCF_SUPPORT 1 HAS_RCF_SUPPORT_FOR_DEBUGGING 0 HAS_RED_BLACK_SEPARATION_SUPPORT 0 HAS_RE_LEVEL_TIMING_GRAPH_SUPPORT 1 HAS_RISEFALL_DELAY_SUPPORT 1 HAS_SIGNAL_PROBE_SUPPORT 1 HAS_SIGNAL_TAP_SUPPORT 1 HAS_SIMULATOR_SUPPORT 0 HAS_SPLIT_IO_SUPPORT 1 HAS_SPLIT_LC_SUPPORT 1 HAS_SYNTH_FSYN_NETLIST_OPT_SUPPORT 1 HAS_SYNTH_NETLIST_OPT_RETIME_SUPPORT 1 HAS_SYNTH_NETLIST_OPT_SUPPORT 1 HAS_TCL_FITTER_SUPPORT 0 HAS_TECHNOLOGY_MIGRATION_SUPPORT 0 HAS_TEMPLATED_REGISTER_PACKING_SUPPORT 1 HAS_TIME_BORROWING_SUPPORT 0 HAS_TIMING_DRIVEN_SYNTHESIS_SUPPORT 1 HAS_TIMING_INFO_SUPPORT 1 HAS_TIMING_OPERATING_CONDITIONS 1 HAS_TIMING_SIMULATION_SUPPORT 1 HAS_TITAN_BASED_MAC_REGISTER_PACKER_SUPPORT 0 HAS_U2B2_SUPPORT 0 HAS_USER_HIGH_SPEED_LOW_POWER_TILE_SUPPORT 0 HAS_USE_FITTER_INFO_SUPPORT 1 HAS_VCCPD_POWER_RAIL 0 HAS_VERTICAL_MIGRATION_SUPPORT 1 HAS_VIEWDRAW_SYMBOL_SUPPORT 0 HAS_VIO_SUPPORT 1 HAS_VIRTUAL_DEVICES 0 HAS_WYSIWYG_DFFEAS_SUPPORT 1 HAS_XIBISO_WRITER_SUPPORT 1 IFP_USE_LEGACY_IO_CHECKER 0 INCREMENTAL_DESIGN_SUPPORTS_COMPATIBLE_CONSTRAINTS 1 INSTALLED 0 IS_CONFIG_ROM 0 IS_DEFAULT_FAMILY 0 IS_HARDCOPY_FAMILY 0 LVDS_IO 1 M10K_MEMORY 0 M144K_MEMORY 0 M20K_MEMORY 0 M4K_MEMORY 0 M512_MEMORY 0 M9K_MEMORY 1 MLAB_MEMORY 0 MRAM_MEMORY 0 NOT_LISTED 0 NO_RPE_SUPPORT 0 NO_SUPPORT_FOR_LOGICLOCK_CONTENT_BACK_ANNOTATION 1 NO_SUPPORT_FOR_STA_CLOCK_UNCERTAINTY_CHECK 0 NO_TDC_SUPPORT 0 POSTFIT_BAK_DATABASE_EXPORT_ENABLED 1 POSTMAP_BAK_DATABASE_EXPORT_ENABLED 1 PROGRAMMER_SUPPORT 1 QFIT_IN_DEVELOPMENT 0 QMAP_IN_DEVELOPMENT 0 RAM_LOGICAL_NAME_CHECKING_IN_CUT_ENABLED 1 REPORTS_METASTABILITY_MTBF 1 REQUIRES_INSTALLATION_PATCH 0 REQUIRES_LIST_OF_TEMPERATURE_AND_VOLTAGE_OPERATING_CONDITIONS 1 RESERVES_SIGNAL_PROBE_PINS 0 RESOLVE_MAX_FANOUT_EARLY 1 RESOLVE_MAX_FANOUT_LATE 0 RESPECTS_FIXED_SIZED_LOCKED_LOCATION_LOGICLOCK 1 RESTRICTED_USER_SELECTION 0 RISEFALL_SUPPORT_IS_HIDDEN 0 STRICT_TIMING_DB_CHECKS 0 SUPPORTS_ADDITIONAL_OPTIONS_FOR_UNUSED_IO 0 SUPPORTS_CRC 1 SUPPORTS_DIFFERENTIAL_AIOT_BOARD_TRACE_MODEL 1 SUPPORTS_DSP_BALANCING_BACK_ANNOTATION 0 SUPPORTS_GENERATION_OF_EARLY_POWER_ESTIMATOR_FILE 1 SUPPORTS_GLOBAL_SIGNAL_BACK_ANNOTATION 0 SUPPORTS_MAC_CHAIN_OUT_ADDER 0 SUPPORTS_RAM_PACKING_BACK_ANNOTATION 0 SUPPORTS_REG_PACKING_BACK_ANNOTATION 0 SUPPORTS_SIGNALPROBE_REGISTER_PIPELINING 1 SUPPORTS_SINGLE_ENDED_AIOT_BOARD_TRACE_MODEL 1 SUPPORTS_USER_MANUAL_LOGIC_DUPLICATION 1 TMV_RUN_CUSTOMIZABLE_VIEWER 1 TMV_RUN_INTERNAL_DETAILS 1 TMV_RUN_INTERNAL_DETAILS_ON_IO 0 TMV_RUN_INTERNAL_DETAILS_ON_IOBUF 1 TMV_RUN_INTERNAL_DETAILS_ON_LCELL 0 TMV_RUN_INTERNAL_DETAILS_ON_LRAM 0 TRANSCEIVER_3G_BLOCK 0 TRANSCEIVER_6G_BLOCK 0 USES_ACV_FOR_FLED 1 USES_ADB_FOR_BACK_ANNOTATION 1 USES_ALTERA_LNSIM 0 USES_ASIC_ROUTING_POWER_CALCULATOR 0 USES_DATA_DRIVEN_PLL_COMPUTATION_UTIL 1 USES_DEV 1 USES_ICP_FOR_ECO_FITTER 0 USES_LIBERTY_TIMING 0 USES_POWER_SIGNAL_ACTIVITIES 1 USES_THIRD_GENERATION_TIMING_MODELS_TIS 1 USES_U2B2_TIMING_MODELS 0 USE_ADVANCED_IO_POWER_BY_DEFAULT 1 USE_ADVANCED_IO_TIMING_BY_DEFAULT 1 USE_BASE_FAMILY_DDB_PATH 0 USE_OCT_AUTO_CALIBRATION 1 USE_RELAX_IO_ASSIGNMENT_RULES 0 USE_RISEFALL_ONLY 1 USE_SEPARATE_LIST_FOR_TECH_MIGRATION 0 USE_SINGLE_COMPILER_PASS_PLL_MIF_FILE_WRITER 1 USE_TITAN_IO_BASED_IO_REGISTER_PACKER_UTIL 0 WYSIWYG_BUS_WIDTH_CHECKING_IN_CUT_ENABLED 1</td>
1030 
       </tr>
1031 
       <tr>
1032 
        <td class="parametername">tightlyCoupledDataMaster0MapParam</td>
1033 
        <td class="parametervalue"></td>
1034 
       </tr>
1035 
       <tr>
1036 
        <td class="parametername">tightlyCoupledDataMaster1MapParam</td>
1037 
        <td class="parametervalue"></td>
1038 
       </tr>
1039 
       <tr>
1040 
        <td class="parametername">tightlyCoupledDataMaster2MapParam</td>
1041 
        <td class="parametervalue"></td>
1042 
       </tr>
1043 
       <tr>
1044 
        <td class="parametername">tightlyCoupledDataMaster3MapParam</td>
1045 
        <td class="parametervalue"></td>
1046 
       </tr>
1047 
       <tr>
1048 
        <td class="parametername">tightlyCoupledInstructionMaster0MapParam</td>
1049 
        <td class="parametervalue"></td>
1050 
       </tr>
1051 
       <tr>
1052 
        <td class="parametername">tightlyCoupledInstructionMaster1MapParam</td>
1053 
        <td class="parametervalue"></td>
1054 
       </tr>
1055 
       <tr>
1056 
        <td class="parametername">tightlyCoupledInstructionMaster2MapParam</td>
1057 
        <td class="parametervalue"></td>
1058 
       </tr>
1059 
       <tr>
1060 
        <td class="parametername">tightlyCoupledInstructionMaster3MapParam</td>
1061 
        <td class="parametervalue"></td>
1062 
       </tr>
1063 
       <tr>
1064 
        <td class="parametername">deviceFamily</td>
1065 
        <td class="parametervalue">UNKNOWN</td>
1066 
       </tr>
1067 
       <tr>
1068 
        <td class="parametername">generateLegacySim</td>
1069 
        <td class="parametervalue">false</td>
1070 
       </tr>
1071 
      </table>
1072 
     </td>
1073 
    </tr>
1074 
   </table>&#160;&#160;
1075 
   <table class="flowbox">
1076 
    <tr>
1077 
     <td class="parametersbox">
1078 
      <h2>Software Assignments</h2>
1079 
      <table>
1080 
       <tr>
1081 
        <td class="parametername">BIG_ENDIAN</td>
1082 
        <td class="parametervalue">0</td>
1083 
       </tr>
1084 
       <tr>
1085 
        <td class="parametername">BREAK_ADDR</td>
1086 
        <td class="parametervalue">0x00010820</td>
1087 
       </tr>
1088 
       <tr>
1089 
        <td class="parametername">CPU_FREQ</td>
1090 
        <td class="parametervalue">40000000u</td>
1091 
       </tr>
1092 
       <tr>
1093 
        <td class="parametername">CPU_ID_SIZE</td>
1094 
        <td class="parametervalue">1</td>
1095 
       </tr>
1096 
       <tr>
1097 
        <td class="parametername">CPU_ID_VALUE</td>
1098 
        <td class="parametervalue">0x00000000</td>
1099 
       </tr>
1100 
       <tr>
1101 
        <td class="parametername">CPU_IMPLEMENTATION</td>
1102 
        <td class="parametervalue">"tiny"</td>
1103 
       </tr>
1104 
       <tr>
1105 
        <td class="parametername">DATA_ADDR_WIDTH</td>
1106 
        <td class="parametervalue">17</td>
1107 
       </tr>
1108 
       <tr>
1109 
        <td class="parametername">DCACHE_LINE_SIZE</td>
1110 
        <td class="parametervalue">0</td>
1111 
       </tr>
1112 
       <tr>
1113 
        <td class="parametername">DCACHE_LINE_SIZE_LOG2</td>
1114 
        <td class="parametervalue">0</td>
1115 
       </tr>
1116 
       <tr>
1117 
        <td class="parametername">DCACHE_SIZE</td>
1118 
        <td class="parametervalue">0</td>
1119 
       </tr>
1120 
       <tr>
1121 
        <td class="parametername">EXCEPTION_ADDR</td>
1122 
        <td class="parametervalue">0x00008020</td>
1123 
       </tr>
1124 
       <tr>
1125 
        <td class="parametername">FLUSHDA_SUPPORTED</td>
1126 
        <td class="parametervalue"></td>
1127 
       </tr>
1128 
       <tr>
1129 
        <td class="parametername">HARDWARE_DIVIDE_PRESENT</td>
1130 
        <td class="parametervalue">0</td>
1131 
       </tr>
1132 
       <tr>
1133 
        <td class="parametername">HARDWARE_MULTIPLY_PRESENT</td>
1134 
        <td class="parametervalue">0</td>
1135 
       </tr>
1136 
       <tr>
1137 
        <td class="parametername">HARDWARE_MULX_PRESENT</td>
1138 
        <td class="parametervalue">0</td>
1139 
       </tr>
1140 
       <tr>
1141 
        <td class="parametername">HAS_DEBUG_CORE</td>
1142 
        <td class="parametervalue">1</td>
1143 
       </tr>
1144 
       <tr>
1145 
        <td class="parametername">HAS_DEBUG_STUB</td>
1146 
        <td class="parametervalue"></td>
1147 
       </tr>
1148 
       <tr>
1149 
        <td class="parametername">HAS_JMPI_INSTRUCTION</td>
1150 
        <td class="parametervalue"></td>
1151 
       </tr>
1152 
       <tr>
1153 
        <td class="parametername">ICACHE_LINE_SIZE</td>
1154 
        <td class="parametervalue">0</td>
1155 
       </tr>
1156 
       <tr>
1157 
        <td class="parametername">ICACHE_LINE_SIZE_LOG2</td>
1158 
        <td class="parametervalue">0</td>
1159 
       </tr>
1160 
       <tr>
1161 
        <td class="parametername">ICACHE_SIZE</td>
1162 
        <td class="parametervalue">0</td>
1163 
       </tr>
1164 
       <tr>
1165 
        <td class="parametername">INST_ADDR_WIDTH</td>
1166 
        <td class="parametervalue">17</td>
1167 
       </tr>
1168 
       <tr>
1169 
        <td class="parametername">RESET_ADDR</td>
1170 
        <td class="parametervalue">0x00008000</td>
1171 
       </tr>
1172 
      </table>
1173 
     </td>
1174 
    </tr>
1175 
   </table>
1176 
  </div>
1177 
  <a name="module_jtag_uart_0"> </a>
1178 
  <div>
1179 
   <hr/>
1180 
   <h2>jtag_uart_0</h2>altera_avalon_jtag_uart v13.0.1.99.2
1181 
   <br/>
1182 
   <div class="greydiv">
1183 
    <table class="connectionboxes">
1184 
     <tr>
1185 
      <td class="neighbor" rowspan="4">
1186 
       <a href="#module_clk_0">clk_0</a>
1187 
      </td>
1188 
      <td class="from">clk&#160;&#160;</td>
1189 
      <td class="main" rowspan="9">jtag_uart_0</td>
1190 
     </tr>
1191 
     <tr>
1192 
      <td class="to">&#160;&#160;clk</td>
1193 
     </tr>
1194 
     <tr>
1195 
      <td class="from">clk_reset&#160;&#160;</td>
1196 
     </tr>
1197 
     <tr>
1198 
      <td class="to">&#160;&#160;reset</td>
1199 
     </tr>
1200 
     <tr style="height:6px">
1201 
      <td></td>
1202 
     </tr>
1203 
     <tr>
1204 
      <td class="neighbor" rowspan="4">
1205 
       <a href="#module_nios2_qsys_0">nios2_qsys_0</a>
1206 
      </td>
1207 
      <td class="from">data_master&#160;&#160;</td>
1208 
     </tr>
1209 
     <tr>
1210 
      <td class="to">&#160;&#160;avalon_jtag_slave</td>
1211 
     </tr>
1212 
     <tr>
1213 
      <td class="from">d_irq&#160;&#160;</td>
1214 
     </tr>
1215 
     <tr>
1216 
      <td class="to">&#160;&#160;irq</td>
1217 
     </tr>
1218 
    </table>
1219 
   </div>
1220 
   <br/>
1221 
   <br/>
1222 
   <table class="flowbox">
1223 
    <tr>
1224 
     <td class="parametersbox">
1225 
      <h2>Parameters</h2>
1226 
      <table>
1227 
       <tr>
1228 
        <td class="parametername">allowMultipleConnections</td>
1229 
        <td class="parametervalue">false</td>
1230 
       </tr>
1231 
       <tr>
1232 
        <td class="parametername">hubInstanceID</td>
1233 
        <td class="parametervalue">0</td>
1234 
       </tr>
1235 
       <tr>
1236 
        <td class="parametername">readBufferDepth</td>
1237 
        <td class="parametervalue">64</td>
1238 
       </tr>
1239 
       <tr>
1240 
        <td class="parametername">readIRQThreshold</td>
1241 
        <td class="parametervalue">8</td>
1242 
       </tr>
1243 
       <tr>
1244 
        <td class="parametername">simInputCharacterStream</td>
1245 
        <td class="parametervalue"></td>
1246 
       </tr>
1247 
       <tr>
1248 
        <td class="parametername">simInteractiveOptions</td>
1249 
        <td class="parametervalue">NO_INTERACTIVE_WINDOWS</td>
1250 
       </tr>
1251 
       <tr>
1252 
        <td class="parametername">useRegistersForReadBuffer</td>
1253 
        <td class="parametervalue">false</td>
1254 
       </tr>
1255 
       <tr>
1256 
        <td class="parametername">useRegistersForWriteBuffer</td>
1257 
        <td class="parametervalue">false</td>
1258 
       </tr>
1259 
       <tr>
1260 
        <td class="parametername">useRelativePathForSimFile</td>
1261 
        <td class="parametervalue">false</td>
1262 
       </tr>
1263 
       <tr>
1264 
        <td class="parametername">writeBufferDepth</td>
1265 
        <td class="parametervalue">64</td>
1266 
       </tr>
1267 
       <tr>
1268 
        <td class="parametername">writeIRQThreshold</td>
1269 
        <td class="parametervalue">8</td>
1270 
       </tr>
1271 
       <tr>
1272 
        <td class="parametername">avalonSpec</td>
1273 
        <td class="parametervalue">2.0</td>
1274 
       </tr>
1275 
       <tr>
1276 
        <td class="parametername">legacySignalAllow</td>
1277 
        <td class="parametervalue">false</td>
1278 
       </tr>
1279 
       <tr>
1280 
        <td class="parametername">enableInteractiveInput</td>
1281 
        <td class="parametervalue">false</td>
1282 
       </tr>
1283 
       <tr>
1284 
        <td class="parametername">enableInteractiveOutput</td>
1285 
        <td class="parametervalue">false</td>
1286 
       </tr>
1287 
       <tr>
1288 
        <td class="parametername">deviceFamily</td>
1289 
        <td class="parametervalue">UNKNOWN</td>
1290 
       </tr>
1291 
       <tr>
1292 
        <td class="parametername">generateLegacySim</td>
1293 
        <td class="parametervalue">false</td>
1294 
       </tr>
1295 
      </table>
1296 
     </td>
1297 
    </tr>
1298 
   </table>&#160;&#160;
1299 
   <table class="flowbox">
1300 
    <tr>
1301 
     <td class="parametersbox">
1302 
      <h2>Software Assignments</h2>
1303 
      <table>
1304 
       <tr>
1305 
        <td class="parametername">READ_DEPTH</td>
1306 
        <td class="parametervalue">64</td>
1307 
       </tr>
1308 
       <tr>
1309 
        <td class="parametername">READ_THRESHOLD</td>
1310 
        <td class="parametervalue">8</td>
1311 
       </tr>
1312 
       <tr>
1313 
        <td class="parametername">WRITE_DEPTH</td>
1314 
        <td class="parametervalue">64</td>
1315 
       </tr>
1316 
       <tr>
1317 
        <td class="parametername">WRITE_THRESHOLD</td>
1318 
        <td class="parametervalue">8</td>
1319 
       </tr>
1320 
      </table>
1321 
     </td>
1322 
    </tr>
1323 
   </table>
1324 
  </div>
1325 
  <a name="module_sd_card_0"> </a>
1326 
  <div>
1327 
   <hr/>
1328 
   <h2>sd_card_0</h2>sd_card v1.0
1329 
   <br/>
1330 
   <div class="greydiv">
1331 
    <table class="connectionboxes">
1332 
     <tr>
1333 
      <td class="neighbor" rowspan="4">
1334 
       <a href="#module_clk_0">clk_0</a>
1335 
      </td>
1336 
      <td class="from">clk&#160;&#160;</td>
1337 
      <td class="main" rowspan="9">sd_card_0</td>
1338 
     </tr>
1339 
     <tr>
1340 
      <td class="to">&#160;&#160;clock</td>
1341 
     </tr>
1342 
     <tr>
1343 
      <td class="from">clk_reset&#160;&#160;</td>
1344 
     </tr>
1345 
     <tr>
1346 
      <td class="to">&#160;&#160;reset_sink</td>
1347 
     </tr>
1348 
     <tr style="height:6px">
1349 
      <td></td>
1350 
     </tr>
1351 
     <tr>
1352 
      <td class="neighbor" rowspan="2">
1353 
       <a href="#module_nios2_qsys_0">nios2_qsys_0</a>
1354 
      </td>
1355 
      <td class="from">data_master&#160;&#160;</td>
1356 
     </tr>
1357 
     <tr>
1358 
      <td class="to">&#160;&#160;avalon_slave_0</td>
1359 
     </tr>
1360 
     <tr>
1361 
      <td></td>
1362 
      <td></td>
1363 
      <td class="from">avalon_master_0&#160;&#160;</td>
1364 
      <td class="neighbor" rowspan="2">
1365 
       <a href="#module_onchip_memory2_0">onchip_memory2_0</a>
1366 
      </td>
1367 
     </tr>
1368 
     <tr>
1369 
      <td></td>
1370 
      <td></td>
1371 
      <td class="to">&#160;&#160;s1</td>
1372 
     </tr>
1373 
    </table>
1374 
   </div>
1375 
   <br/>
1376 
   <br/>
1377 
   <table class="flowbox">
1378 
    <tr>
1379 
     <td class="parametersbox">
1380 
      <h2>Parameters</h2>
1381 
      <table>
1382 
       <tr>
1383 
        <td class="parametername">deviceFamily</td>
1384 
        <td class="parametervalue">UNKNOWN</td>
1385 
       </tr>
1386 
       <tr>
1387 
        <td class="parametername">generateLegacySim</td>
1388 
        <td class="parametervalue">false</td>
1389 
       </tr>
1390 
      </table>
1391 
     </td>
1392 
    </tr>
1393 
   </table>&#160;&#160;
1394 
   <table class="flowbox">
1395 
    <tr>
1396 
     <td class="parametersbox">
1397 
      <h2>Software Assignments</h2>(none)</td>
1398 
    </tr>
1399 
   </table>
1400 
  </div>
1401 
  <table class="blueBar">
1402 
   <tr>
1403 
    <td class="l">generation took 0.00 seconds</td>
1404 
    <td class="r">rendering took 0.02 seconds</td>
1405 
   </tr>
1406 
  </table>
1407 
 </body>
1408 
</html>

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