OpenCores
URL https://opencores.org/ocsvn/audio/audio/trunk

Subversion Repositories audio

[/] [audio/] [trunk/] [HD_ADPCM/] [HD_ADPCM_1Bit_Stereo_Decoder/] [HD_ADPCM_Codec.flow.rpt] - Blame information for rev 6

Details | Compare with Previous | View Log

Line No. Rev Author Line
1 6 ashematian
Flow report for HD_ADPCM_Codec
2
Tue May 11 23:50:10 2010
3
Quartus II Version 9.0 Build 132 02/25/2009 SJ Web Edition
4
 
5
 
6
---------------------
7
; Table of Contents ;
8
---------------------
9
  1. Legal Notice
10
  2. Flow Summary
11
  3. Flow Settings
12
  4. Flow Non-Default Global Settings
13
  5. Flow Elapsed Time
14
  6. Flow OS Summary
15
  7. Flow Log
16
 
17
 
18
 
19
----------------
20
; Legal Notice ;
21
----------------
22
Copyright (C) 1991-2009 Altera Corporation
23
Your use of Altera Corporation's design tools, logic functions
24
and other software and tools, and its AMPP partner logic
25
functions, and any output files from any of the foregoing
26
(including device programming or simulation files), and any
27
associated documentation or information are expressly subject
28
to the terms and conditions of the Altera Program License
29
Subscription Agreement, Altera MegaCore Function License
30
Agreement, or other applicable license agreement, including,
31
without limitation, that your use is for the sole purpose of
32
programming logic devices manufactured by Altera and sold by
33
Altera or its authorized distributors.  Please refer to the
34
applicable agreement for further details.
35
 
36
 
37
 
38
+------------------------------------------------------------------------------+
39
; Flow Summary                                                                 ;
40
+------------------------------------+-----------------------------------------+
41
; Flow Status                        ; Successful - Tue May 11 23:50:10 2010   ;
42
; Quartus II Version                 ; 9.0 Build 132 02/25/2009 SJ Web Edition ;
43
; Revision Name                      ; HD_ADPCM_Codec                          ;
44
; Top-level Entity Name              ; HD_ADPCM_Codec                          ;
45
; Family                             ; Cyclone II                              ;
46
; Device                             ; EP2C20F484C7                            ;
47
; Timing Models                      ; Final                                   ;
48
; Met timing requirements            ; No                                      ;
49
; Total logic elements               ; 1,663 / 18,752 ( 9 % )                  ;
50
;     Total combinational functions  ; 1,635 / 18,752 ( 9 % )                  ;
51
;     Dedicated logic registers      ; 364 / 18,752 ( 2 % )                    ;
52
; Total registers                    ; 364                                     ;
53
; Total pins                         ; 82 / 315 ( 26 % )                       ;
54
; Total virtual pins                 ; 0                                       ;
55
; Total memory bits                  ; 0 / 239,616 ( 0 % )                     ;
56
; Embedded Multiplier 9-bit elements ; 4 / 52 ( 8 % )                          ;
57
; Total PLLs                         ; 0 / 4 ( 0 % )                           ;
58
+------------------------------------+-----------------------------------------+
59
 
60
 
61
+-----------------------------------------+
62
; Flow Settings                           ;
63
+-------------------+---------------------+
64
; Option            ; Setting             ;
65
+-------------------+---------------------+
66
; Start date & time ; 05/11/2010 23:49:20 ;
67
; Main task         ; Compilation         ;
68
; Revision Name     ; HD_ADPCM_Codec      ;
69
+-------------------+---------------------+
70
 
71
 
72
+----------------------------------------------------------------------------------------------------------------------------------------+
73
; Flow Non-Default Global Settings                                                                                                       ;
74
+------------------------------------+----------------------------------------------------+---------------+-------------+----------------+
75
; Assignment Name                    ; Value                                              ; Default Value ; Entity Name ; Section Id     ;
76
+------------------------------------+----------------------------------------------------+---------------+-------------+----------------+
77
; COMPILER_SIGNATURE_ID              ; 117965952028.127360556005096                       ; --            ; --          ; --             ;
78
; CYCLONEII_OPTIMIZATION_TECHNIQUE   ; Area                                               ; Balanced      ; --          ; --             ;
79
; EDA_OUTPUT_DATA_FORMAT             ; Vhdl                                               ; --            ; --          ; eda_simulation ;
80
; EDA_SIMULATION_TOOL                ; ModelSim (VHDL)                                    ;         ; --          ; --             ;
81
; MAX_CORE_JUNCTION_TEMP             ; 85                                                 ; --            ; --          ; --             ;
82
; MIN_CORE_JUNCTION_TEMP             ; 0                                                  ; --            ; --          ; --             ;
83
; MISC_FILE                          ; D:/Projects/FPGA/HD_ADPCM_Codec/HD_ADPCM_Codec.dpf ; --            ; --          ; --             ;
84
; PARTITION_COLOR                    ; 16764057                                           ; --            ; --          ; Top            ;
85
; PARTITION_NETLIST_TYPE             ; SOURCE                                             ; --            ; --          ; Top            ;
86
; POWER_BOARD_THERMAL_MODEL          ; None (CONSERVATIVE)                                ; --            ; --          ; --             ;
87
; POWER_PRESET_COOLING_SOLUTION      ; 23 MM HEAT SINK WITH 200 LFPM AIRFLOW              ; --            ; --          ; --             ;
88
; USE_GENERATED_PHYSICAL_CONSTRAINTS ; Off                                                ; --            ; --          ; eda_blast_fpga ;
89
+------------------------------------+----------------------------------------------------+---------------+-------------+----------------+
90
 
91
 
92
+-----------------------------------------------------------------------------------------------------------------------------+
93
; Flow Elapsed Time                                                                                                           ;
94
+-------------------------+--------------+-------------------------+---------------------+------------------------------------+
95
; Module Name             ; Elapsed Time ; Average Processors Used ; Peak Virtual Memory ; Total CPU Time (on all processors) ;
96
+-------------------------+--------------+-------------------------+---------------------+------------------------------------+
97
; Analysis & Synthesis    ; 00:00:15     ; 1.0                     ; 202 MB              ; 00:00:14                           ;
98
; Fitter                  ; 00:00:15     ; 1.0                     ; 211 MB              ; 00:00:15                           ;
99
; Assembler               ; 00:00:07     ; 1.0                     ; 189 MB              ; 00:00:07                           ;
100
; Classic Timing Analyzer ; 00:00:01     ; 1.0                     ; 133 MB              ; 00:00:01                           ;
101
; EDA Netlist Writer      ; 00:00:02     ; 1.0                     ; 136 MB              ; 00:00:02                           ;
102
; Total                   ; 00:00:40     ; --                      ; --                  ; 00:00:39                           ;
103
+-------------------------+--------------+-------------------------+---------------------+------------------------------------+
104
 
105
 
106
+---------------------------------------------------------------------------------------+
107
; Flow OS Summary                                                                       ;
108
+-------------------------+------------------+------------+------------+----------------+
109
; Module Name             ; Machine Hostname ; OS Name    ; OS Version ; Processor type ;
110
+-------------------------+------------------+------------+------------+----------------+
111
; Analysis & Synthesis    ; jupiter-1328e1a  ; Windows XP ; 5.1        ; i686           ;
112
; Fitter                  ; jupiter-1328e1a  ; Windows XP ; 5.1        ; i686           ;
113
; Assembler               ; jupiter-1328e1a  ; Windows XP ; 5.1        ; i686           ;
114
; Classic Timing Analyzer ; jupiter-1328e1a  ; Windows XP ; 5.1        ; i686           ;
115
; EDA Netlist Writer      ; jupiter-1328e1a  ; Windows XP ; 5.1        ; i686           ;
116
+-------------------------+------------------+------------+------------+----------------+
117
 
118
 
119
------------
120
; Flow Log ;
121
------------
122
quartus_map --read_settings_files=on --write_settings_files=off HD_ADPCM_Codec -c HD_ADPCM_Codec
123
quartus_fit --read_settings_files=off --write_settings_files=off HD_ADPCM_Codec -c HD_ADPCM_Codec
124
quartus_asm --read_settings_files=off --write_settings_files=off HD_ADPCM_Codec -c HD_ADPCM_Codec
125
quartus_tan --read_settings_files=off --write_settings_files=off HD_ADPCM_Codec -c HD_ADPCM_Codec --timing_analysis_only
126
quartus_eda --read_settings_files=off --write_settings_files=off HD_ADPCM_Codec -c HD_ADPCM_Codec
127
 
128
 
129
 

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.