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[/] [audio/] [trunk/] [HD_ADPCM/] [HD_ADPCM_1Bit_Stereo_Decoder/] [HD_ADPCM_Codec.sta.rpt] - Blame information for rev 6

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Line No. Rev Author Line
1 6 ashematian 
TimeQuest Timing Analyzer report for HD_ADPCM_Codec
2 
Sun Feb 14 23:32:54 2010
3 
Quartus II Version 9.0 Build 132 02/25/2009 SJ Web Edition
4 
 
5 
 
6 
---------------------
7 
; Table of Contents ;
8 
---------------------
9 
  1. Legal Notice
10 
  2. TimeQuest Timing Analyzer Summary
11 
  3. Parallel Compilation
12 
  4. Clocks
13 
  5. Slow Model Fmax Summary
14 
  6. Slow Model Setup Summary
15 
  7. Slow Model Hold Summary
16 
  8. Slow Model Recovery Summary
17 
  9. Slow Model Removal Summary
18 
 10. Slow Model Minimum Pulse Width
19 
 11. Setup Times
20 
 12. Hold Times
21 
 13. Clock to Output Times
22 
 14. Minimum Clock to Output Times
23 
 15. Fast Model Setup Summary
24 
 16. Fast Model Hold Summary
25 
 17. Fast Model Recovery Summary
26 
 18. Fast Model Removal Summary
27 
 19. Fast Model Minimum Pulse Width
28 
 20. Setup Times
29 
 21. Hold Times
30 
 22. Clock to Output Times
31 
 23. Minimum Clock to Output Times
32 
 24. Multicorner Timing Analysis Summary
33 
 25. Setup Times
34 
 26. Hold Times
35 
 27. Clock to Output Times
36 
 28. Minimum Clock to Output Times
37 
 29. Setup Transfers
38 
 30. Hold Transfers
39 
 31. Recovery Transfers
40 
 32. Removal Transfers
41 
 33. Report TCCS
42 
 34. Report RSKM
43 
 35. Unconstrained Paths
44 
 36. TimeQuest Timing Analyzer Messages
45 
 
46 
 
47 
 
48 
----------------
49 
; Legal Notice ;
50 
----------------
51 
Copyright (C) 1991-2009 Altera Corporation
52 
Your use of Altera Corporation's design tools, logic functions
53 
and other software and tools, and its AMPP partner logic
54 
functions, and any output files from any of the foregoing
55 
(including device programming or simulation files), and any
56 
associated documentation or information are expressly subject
57 
to the terms and conditions of the Altera Program License
58 
Subscription Agreement, Altera MegaCore Function License
59 
Agreement, or other applicable license agreement, including,
60 
without limitation, that your use is for the sole purpose of
61 
programming logic devices manufactured by Altera and sold by
62 
Altera or its authorized distributors.  Please refer to the
63 
applicable agreement for further details.
64 
 
65 
 
66 
 
67 
+----------------------------------------------------------------------+
68 
; TimeQuest Timing Analyzer Summary                                    ;
69 
+--------------------+-------------------------------------------------+
70 
; Quartus II Version ; Version 9.0 Build 132 02/25/2009 SJ Web Edition ;
71 
; Revision Name      ; HD_ADPCM_Codec                                  ;
72 
; Device Family      ; Cyclone II                                      ;
73 
; Device Name        ; EP2C20F484C7                                    ;
74 
; Timing Models      ; Final                                           ;
75 
; Delay Model        ; Combined                                        ;
76 
; Rise/Fall Delays   ; Unavailable                                     ;
77 
+--------------------+-------------------------------------------------+
78 
 
79 
 
80 
Parallel compilation was disabled, but you have multiple processors available. Enable parallel compilation to reduce compilation time.
81 
+-------------------------------------+
82 
; Parallel Compilation                ;
83 
+----------------------------+--------+
84 
; Processors                 ; Number ;
85 
+----------------------------+--------+
86 
; Number detected on machine ; 2      ;
87 
; Maximum allowed            ; 1      ;
88 
+----------------------------+--------+
89 
 
90 
 
91 
+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
92 
; Clocks                                                                                                                                                                                                                                               ;
93 
+-------------------------------------------+------+--------+------------+-------+-------+------------+-----------+-------------+-------+--------+-----------+------------+----------+--------+--------+-----------------------------------------------+
94 
; Clock Name                                ; Type ; Period ; Frequency  ; Rise  ; Fall  ; Duty Cycle ; Divide by ; Multiply by ; Phase ; Offset ; Edge List ; Edge Shift ; Inverted ; Master ; Source ; Targets                                       ;
95 
+-------------------------------------------+------+--------+------------+-------+-------+------------+-----------+-------------+-------+--------+-----------+------------+----------+--------+--------+-----------------------------------------------+
96 
; CLOCK_IN                                  ; Base ; 1.000  ; 1000.0 MHz ; 0.000 ; 0.500 ;            ;           ;             ;       ;        ;           ;            ;          ;        ;        ; { CLOCK_IN }                                  ;
97 
; Flash_Memory_Driver:u4|Flash_Memory_Clock ; Base ; 1.000  ; 1000.0 MHz ; 0.000 ; 0.500 ;            ;           ;             ;       ;        ;           ;            ;          ;        ;        ; { Flash_Memory_Driver:u4|Flash_Memory_Clock } ;
98 
; I2S_ACTIVE_IN                             ; Base ; 1.000  ; 1000.0 MHz ; 0.000 ; 0.500 ;            ;           ;             ;       ;        ;           ;            ;          ;        ;        ; { I2S_ACTIVE_IN }                             ;
99 
; I2S_Driver:u3|I2S_Clock                   ; Base ; 1.000  ; 1000.0 MHz ; 0.000 ; 0.500 ;            ;           ;             ;       ;        ;           ;            ;          ;        ;        ; { I2S_Driver:u3|I2S_Clock }                   ;
100 
; I2S_Driver:u3|I2S_PCM_DATA_ACCESS_OUT     ; Base ; 1.000  ; 1000.0 MHz ; 0.000 ; 0.500 ;            ;           ;             ;       ;        ;           ;            ;          ;        ;        ; { I2S_Driver:u3|I2S_PCM_DATA_ACCESS_OUT }     ;
101 
+-------------------------------------------+------+--------+------------+-------+-------+------------+-----------+-------------+-------+--------+-----------+------------+----------+--------+--------+-----------------------------------------------+
102 
 
103 
 
104 
+---------------------------------------------------------------------------------+
105 
; Slow Model Fmax Summary                                                         ;
106 
+------------+-----------------+-------------------------------------------+------+
107 
; Fmax       ; Restricted Fmax ; Clock Name                                ; Note ;
108 
+------------+-----------------+-------------------------------------------+------+
109 
; 19.16 MHz  ; 19.16 MHz       ; CLOCK_IN                                  ;      ;
110 
; 241.14 MHz ; 241.14 MHz      ; I2S_Driver:u3|I2S_Clock                   ;      ;
111 
; 287.52 MHz ; 287.52 MHz      ; I2S_Driver:u3|I2S_PCM_DATA_ACCESS_OUT     ;      ;
112 
; 345.9 MHz  ; 345.9 MHz       ; Flash_Memory_Driver:u4|Flash_Memory_Clock ;      ;
113 
+------------+-----------------+-------------------------------------------+------+
114 
This panel reports FMAX for every clock in the design, regardless of the user-specified clock periods.  FMAX is only computed for paths where the source and destination registers or ports are driven by the same clock.  Paths of different clocks, including generated clocks, are ignored.  For paths between a clock and its inversion, FMAX is computed as if the rising and falling edges are scaled along with FMAX, such that the duty cycle (in terms of a percentage) is maintained. Altera recommends that you always use clock constraints and other slack reports for sign-off analysis.
115 
 
116 
 
117 
+---------------------------------------------------------------------+
118 
; Slow Model Setup Summary                                            ;
119 
+-------------------------------------------+---------+---------------+
120 
; Clock                                     ; Slack   ; End Point TNS ;
121 
+-------------------------------------------+---------+---------------+
122 
; CLOCK_IN                                  ; -51.180 ; -2303.828     ;
123 
; I2S_Driver:u3|I2S_Clock                   ; -3.147  ; -12.329       ;
124 
; I2S_Driver:u3|I2S_PCM_DATA_ACCESS_OUT     ; -2.478  ; -37.927       ;
125 
; Flash_Memory_Driver:u4|Flash_Memory_Clock ; -1.891  ; -47.530       ;
126 
+-------------------------------------------+---------+---------------+
127 
 
128 
 
129 
+--------------------------------------------------------------------+
130 
; Slow Model Hold Summary                                            ;
131 
+-------------------------------------------+--------+---------------+
132 
; Clock                                     ; Slack  ; End Point TNS ;
133 
+-------------------------------------------+--------+---------------+
134 
; CLOCK_IN                                  ; -2.666 ; -7.994        ;
135 
; Flash_Memory_Driver:u4|Flash_Memory_Clock ; 0.445  ; 0.000         ;
136 
; I2S_Driver:u3|I2S_Clock                   ; 0.445  ; 0.000         ;
137 
; I2S_Driver:u3|I2S_PCM_DATA_ACCESS_OUT     ; 0.445  ; 0.000         ;
138 
+-------------------------------------------+--------+---------------+
139 
 
140 
 
141 
+---------------------------------------+
142 
; Slow Model Recovery Summary           ;
143 
+---------------+-------+---------------+
144 
; Clock         ; Slack ; End Point TNS ;
145 
+---------------+-------+---------------+
146 
; I2S_ACTIVE_IN ; 0.293 ; 0.000         ;
147 
+---------------+-------+---------------+
148 
 
149 
 
150 
+----------------------------------------+
151 
; Slow Model Removal Summary             ;
152 
+---------------+--------+---------------+
153 
; Clock         ; Slack  ; End Point TNS ;
154 
+---------------+--------+---------------+
155 
; I2S_ACTIVE_IN ; -0.041 ; -0.041        ;
156 
+---------------+--------+---------------+
157 
 
158 
 
159 
+----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
160 
; Slow Model Minimum Pulse Width                                                                                                                                                   ;
161 
+--------+--------------+----------------+------------------+---------------------------------------+------------+-----------------------------------------------------------------+
162 
; Slack  ; Actual Width ; Required Width ; Type             ; Clock                                 ; Clock Edge ; Target                                                          ;
163 
+--------+--------------+----------------+------------------+---------------------------------------+------------+-----------------------------------------------------------------+
164 
; -1.631 ; 1.000        ; 2.631          ; Port Rate        ; CLOCK_IN                              ; Rise       ; CLOCK_IN                                                        ;
165 
; -0.611 ; 0.500        ; 1.111          ; High Pulse Width ; I2S_Driver:u3|I2S_PCM_DATA_ACCESS_OUT ; Rise       ; ADPCM2_DECODER_ACTIVE                                           ;
166 
; -0.611 ; 0.500        ; 1.111          ; Low Pulse Width  ; I2S_Driver:u3|I2S_PCM_DATA_ACCESS_OUT ; Rise       ; ADPCM2_DECODER_ACTIVE                                           ;
167 
; -0.611 ; 0.500        ; 1.111          ; High Pulse Width ; I2S_Driver:u3|I2S_PCM_DATA_ACCESS_OUT ; Rise       ; ADPCM2_DECODER_DATA[0]                                          ;
168 
; -0.611 ; 0.500        ; 1.111          ; Low Pulse Width  ; I2S_Driver:u3|I2S_PCM_DATA_ACCESS_OUT ; Rise       ; ADPCM2_DECODER_DATA[0]                                          ;
169 
; -0.611 ; 0.500        ; 1.111          ; High Pulse Width ; I2S_Driver:u3|I2S_PCM_DATA_ACCESS_OUT ; Rise       ; ADPCM2_DECODER_DATA[1]                                          ;
170 
; -0.611 ; 0.500        ; 1.111          ; Low Pulse Width  ; I2S_Driver:u3|I2S_PCM_DATA_ACCESS_OUT ; Rise       ; ADPCM2_DECODER_DATA[1]                                          ;
171 
; -0.611 ; 0.500        ; 1.111          ; High Pulse Width ; I2S_Driver:u3|I2S_PCM_DATA_ACCESS_OUT ; Rise       ; ADPCM_Bit_Counter[1]                                            ;
172 
; -0.611 ; 0.500        ; 1.111          ; Low Pulse Width  ; I2S_Driver:u3|I2S_PCM_DATA_ACCESS_OUT ; Rise       ; ADPCM_Bit_Counter[1]                                            ;
173 
; -0.611 ; 0.500        ; 1.111          ; High Pulse Width ; I2S_Driver:u3|I2S_PCM_DATA_ACCESS_OUT ; Rise       ; ADPCM_Bit_Counter[2]                                            ;
174 
; -0.611 ; 0.500        ; 1.111          ; Low Pulse Width  ; I2S_Driver:u3|I2S_PCM_DATA_ACCESS_OUT ; Rise       ; ADPCM_Bit_Counter[2]                                            ;
175 
; -0.611 ; 0.500        ; 1.111          ; High Pulse Width ; CLOCK_IN                              ; Rise       ; ADPCM_Decoder_2_Bit:u6|ADPCM_Decoder_State_Counter[0]           ;
176 
; -0.611 ; 0.500        ; 1.111          ; Low Pulse Width  ; CLOCK_IN                              ; Rise       ; ADPCM_Decoder_2_Bit:u6|ADPCM_Decoder_State_Counter[0]           ;
177 
; -0.611 ; 0.500        ; 1.111          ; High Pulse Width ; CLOCK_IN                              ; Rise       ; ADPCM_Decoder_2_Bit:u6|ADPCM_Decoder_State_Counter[1]           ;
178 
; -0.611 ; 0.500        ; 1.111          ; Low Pulse Width  ; CLOCK_IN                              ; Rise       ; ADPCM_Decoder_2_Bit:u6|ADPCM_Decoder_State_Counter[1]           ;
179 
; -0.611 ; 0.500        ; 1.111          ; High Pulse Width ; CLOCK_IN                              ; Rise       ; ADPCM_Decoder_2_Bit:u6|ADPCM_Decoder_State_Counter[2]           ;
180 
; -0.611 ; 0.500        ; 1.111          ; Low Pulse Width  ; CLOCK_IN                              ; Rise       ; ADPCM_Decoder_2_Bit:u6|ADPCM_Decoder_State_Counter[2]           ;
181 
; -0.611 ; 0.500        ; 1.111          ; High Pulse Width ; CLOCK_IN                              ; Rise       ; ADPCM_Decoder_2_Bit:u6|ADPCM_Decoder_Step_Size_Table_Pointer[2] ;
182 
; -0.611 ; 0.500        ; 1.111          ; Low Pulse Width  ; CLOCK_IN                              ; Rise       ; ADPCM_Decoder_2_Bit:u6|ADPCM_Decoder_Step_Size_Table_Pointer[2] ;
183 
; -0.611 ; 0.500        ; 1.111          ; High Pulse Width ; CLOCK_IN                              ; Rise       ; ADPCM_Decoder_2_Bit:u6|ADPCM_Decoder_Step_Size_Table_Pointer[3] ;
184 
; -0.611 ; 0.500        ; 1.111          ; Low Pulse Width  ; CLOCK_IN                              ; Rise       ; ADPCM_Decoder_2_Bit:u6|ADPCM_Decoder_Step_Size_Table_Pointer[3] ;
185 
; -0.611 ; 0.500        ; 1.111          ; High Pulse Width ; CLOCK_IN                              ; Rise       ; ADPCM_Decoder_2_Bit:u6|ADPCM_Decoder_Step_Size_Table_Pointer[4] ;
186 
; -0.611 ; 0.500        ; 1.111          ; Low Pulse Width  ; CLOCK_IN                              ; Rise       ; ADPCM_Decoder_2_Bit:u6|ADPCM_Decoder_Step_Size_Table_Pointer[4] ;
187 
; -0.611 ; 0.500        ; 1.111          ; High Pulse Width ; CLOCK_IN                              ; Rise       ; ADPCM_Decoder_2_Bit:u6|ADPCM_Decoder_Step_Size_Table_Pointer[5] ;
188 
; -0.611 ; 0.500        ; 1.111          ; Low Pulse Width  ; CLOCK_IN                              ; Rise       ; ADPCM_Decoder_2_Bit:u6|ADPCM_Decoder_Step_Size_Table_Pointer[5] ;
189 
; -0.611 ; 0.500        ; 1.111          ; High Pulse Width ; CLOCK_IN                              ; Rise       ; ADPCM_Decoder_2_Bit:u6|ADPCM_Decoder_Step_Size_Table_Pointer[6] ;
190 
; -0.611 ; 0.500        ; 1.111          ; Low Pulse Width  ; CLOCK_IN                              ; Rise       ; ADPCM_Decoder_2_Bit:u6|ADPCM_Decoder_Step_Size_Table_Pointer[6] ;
191 
; -0.611 ; 0.500        ; 1.111          ; High Pulse Width ; CLOCK_IN                              ; Rise       ; ADPCM_Decoder_2_Bit:u6|ADPCM_Decoder_Step_Size_Table_Pointer[7] ;
192 
; -0.611 ; 0.500        ; 1.111          ; Low Pulse Width  ; CLOCK_IN                              ; Rise       ; ADPCM_Decoder_2_Bit:u6|ADPCM_Decoder_Step_Size_Table_Pointer[7] ;
193 
; -0.611 ; 0.500        ; 1.111          ; High Pulse Width ; CLOCK_IN                              ; Rise       ; ADPCM_Decoder_2_Bit:u6|ADPCM_Decoder_Step_Size_Table_Pointer[8] ;
194 
; -0.611 ; 0.500        ; 1.111          ; Low Pulse Width  ; CLOCK_IN                              ; Rise       ; ADPCM_Decoder_2_Bit:u6|ADPCM_Decoder_Step_Size_Table_Pointer[8] ;
195 
; -0.611 ; 0.500        ; 1.111          ; High Pulse Width ; CLOCK_IN                              ; Rise       ; ADPCM_Decoder_2_Bit:u6|ADPCM_Decoder_Step_Size_Table_Pointer[9] ;
196 
; -0.611 ; 0.500        ; 1.111          ; Low Pulse Width  ; CLOCK_IN                              ; Rise       ; ADPCM_Decoder_2_Bit:u6|ADPCM_Decoder_Step_Size_Table_Pointer[9] ;
197 
; -0.611 ; 0.500        ; 1.111          ; High Pulse Width ; CLOCK_IN                              ; Rise       ; ADPCM_Decoder_2_Bit:u6|Active_Module                            ;
198 
; -0.611 ; 0.500        ; 1.111          ; Low Pulse Width  ; CLOCK_IN                              ; Rise       ; ADPCM_Decoder_2_Bit:u6|Active_Module                            ;
199 
; -0.611 ; 0.500        ; 1.111          ; High Pulse Width ; CLOCK_IN                              ; Rise       ; ADPCM_Decoder_2_Bit:u6|Last_PCM_Data[0]                         ;
200 
; -0.611 ; 0.500        ; 1.111          ; Low Pulse Width  ; CLOCK_IN                              ; Rise       ; ADPCM_Decoder_2_Bit:u6|Last_PCM_Data[0]                         ;
201 
; -0.611 ; 0.500        ; 1.111          ; High Pulse Width ; CLOCK_IN                              ; Rise       ; ADPCM_Decoder_2_Bit:u6|Last_PCM_Data[10]                        ;
202 
; -0.611 ; 0.500        ; 1.111          ; Low Pulse Width  ; CLOCK_IN                              ; Rise       ; ADPCM_Decoder_2_Bit:u6|Last_PCM_Data[10]                        ;
203 
; -0.611 ; 0.500        ; 1.111          ; High Pulse Width ; CLOCK_IN                              ; Rise       ; ADPCM_Decoder_2_Bit:u6|Last_PCM_Data[11]                        ;
204 
; -0.611 ; 0.500        ; 1.111          ; Low Pulse Width  ; CLOCK_IN                              ; Rise       ; ADPCM_Decoder_2_Bit:u6|Last_PCM_Data[11]                        ;
205 
; -0.611 ; 0.500        ; 1.111          ; High Pulse Width ; CLOCK_IN                              ; Rise       ; ADPCM_Decoder_2_Bit:u6|Last_PCM_Data[12]                        ;
206 
; -0.611 ; 0.500        ; 1.111          ; Low Pulse Width  ; CLOCK_IN                              ; Rise       ; ADPCM_Decoder_2_Bit:u6|Last_PCM_Data[12]                        ;
207 
; -0.611 ; 0.500        ; 1.111          ; High Pulse Width ; CLOCK_IN                              ; Rise       ; ADPCM_Decoder_2_Bit:u6|Last_PCM_Data[13]                        ;
208 
; -0.611 ; 0.500        ; 1.111          ; Low Pulse Width  ; CLOCK_IN                              ; Rise       ; ADPCM_Decoder_2_Bit:u6|Last_PCM_Data[13]                        ;
209 
; -0.611 ; 0.500        ; 1.111          ; High Pulse Width ; CLOCK_IN                              ; Rise       ; ADPCM_Decoder_2_Bit:u6|Last_PCM_Data[14]                        ;
210 
; -0.611 ; 0.500        ; 1.111          ; Low Pulse Width  ; CLOCK_IN                              ; Rise       ; ADPCM_Decoder_2_Bit:u6|Last_PCM_Data[14]                        ;
211 
; -0.611 ; 0.500        ; 1.111          ; High Pulse Width ; CLOCK_IN                              ; Rise       ; ADPCM_Decoder_2_Bit:u6|Last_PCM_Data[15]                        ;
212 
; -0.611 ; 0.500        ; 1.111          ; Low Pulse Width  ; CLOCK_IN                              ; Rise       ; ADPCM_Decoder_2_Bit:u6|Last_PCM_Data[15]                        ;
213 
; -0.611 ; 0.500        ; 1.111          ; High Pulse Width ; CLOCK_IN                              ; Rise       ; ADPCM_Decoder_2_Bit:u6|Last_PCM_Data[1]                         ;
214 
; -0.611 ; 0.500        ; 1.111          ; Low Pulse Width  ; CLOCK_IN                              ; Rise       ; ADPCM_Decoder_2_Bit:u6|Last_PCM_Data[1]                         ;
215 
; -0.611 ; 0.500        ; 1.111          ; High Pulse Width ; CLOCK_IN                              ; Rise       ; ADPCM_Decoder_2_Bit:u6|Last_PCM_Data[2]                         ;
216 
; -0.611 ; 0.500        ; 1.111          ; Low Pulse Width  ; CLOCK_IN                              ; Rise       ; ADPCM_Decoder_2_Bit:u6|Last_PCM_Data[2]                         ;
217 
; -0.611 ; 0.500        ; 1.111          ; High Pulse Width ; CLOCK_IN                              ; Rise       ; ADPCM_Decoder_2_Bit:u6|Last_PCM_Data[3]                         ;
218 
; -0.611 ; 0.500        ; 1.111          ; Low Pulse Width  ; CLOCK_IN                              ; Rise       ; ADPCM_Decoder_2_Bit:u6|Last_PCM_Data[3]                         ;
219 
; -0.611 ; 0.500        ; 1.111          ; High Pulse Width ; CLOCK_IN                              ; Rise       ; ADPCM_Decoder_2_Bit:u6|Last_PCM_Data[4]                         ;
220 
; -0.611 ; 0.500        ; 1.111          ; Low Pulse Width  ; CLOCK_IN                              ; Rise       ; ADPCM_Decoder_2_Bit:u6|Last_PCM_Data[4]                         ;
221 
; -0.611 ; 0.500        ; 1.111          ; High Pulse Width ; CLOCK_IN                              ; Rise       ; ADPCM_Decoder_2_Bit:u6|Last_PCM_Data[5]                         ;
222 
; -0.611 ; 0.500        ; 1.111          ; Low Pulse Width  ; CLOCK_IN                              ; Rise       ; ADPCM_Decoder_2_Bit:u6|Last_PCM_Data[5]                         ;
223 
; -0.611 ; 0.500        ; 1.111          ; High Pulse Width ; CLOCK_IN                              ; Rise       ; ADPCM_Decoder_2_Bit:u6|Last_PCM_Data[6]                         ;
224 
; -0.611 ; 0.500        ; 1.111          ; Low Pulse Width  ; CLOCK_IN                              ; Rise       ; ADPCM_Decoder_2_Bit:u6|Last_PCM_Data[6]                         ;
225 
; -0.611 ; 0.500        ; 1.111          ; High Pulse Width ; CLOCK_IN                              ; Rise       ; ADPCM_Decoder_2_Bit:u6|Last_PCM_Data[7]                         ;
226 
; -0.611 ; 0.500        ; 1.111          ; Low Pulse Width  ; CLOCK_IN                              ; Rise       ; ADPCM_Decoder_2_Bit:u6|Last_PCM_Data[7]                         ;
227 
; -0.611 ; 0.500        ; 1.111          ; High Pulse Width ; CLOCK_IN                              ; Rise       ; ADPCM_Decoder_2_Bit:u6|Last_PCM_Data[8]                         ;
228 
; -0.611 ; 0.500        ; 1.111          ; Low Pulse Width  ; CLOCK_IN                              ; Rise       ; ADPCM_Decoder_2_Bit:u6|Last_PCM_Data[8]                         ;
229 
; -0.611 ; 0.500        ; 1.111          ; High Pulse Width ; CLOCK_IN                              ; Rise       ; ADPCM_Decoder_2_Bit:u6|Last_PCM_Data[9]                         ;
230 
; -0.611 ; 0.500        ; 1.111          ; Low Pulse Width  ; CLOCK_IN                              ; Rise       ; ADPCM_Decoder_2_Bit:u6|Last_PCM_Data[9]                         ;
231 
; -0.611 ; 0.500        ; 1.111          ; High Pulse Width ; CLOCK_IN                              ; Rise       ; ADPCM_Decoder_2_Bit:u6|PCM_DATA_OUT[0]                          ;
232 
; -0.611 ; 0.500        ; 1.111          ; Low Pulse Width  ; CLOCK_IN                              ; Rise       ; ADPCM_Decoder_2_Bit:u6|PCM_DATA_OUT[0]                          ;
233 
; -0.611 ; 0.500        ; 1.111          ; High Pulse Width ; CLOCK_IN                              ; Rise       ; ADPCM_Decoder_2_Bit:u6|PCM_DATA_OUT[10]                         ;
234 
; -0.611 ; 0.500        ; 1.111          ; Low Pulse Width  ; CLOCK_IN                              ; Rise       ; ADPCM_Decoder_2_Bit:u6|PCM_DATA_OUT[10]                         ;
235 
; -0.611 ; 0.500        ; 1.111          ; High Pulse Width ; CLOCK_IN                              ; Rise       ; ADPCM_Decoder_2_Bit:u6|PCM_DATA_OUT[11]                         ;
236 
; -0.611 ; 0.500        ; 1.111          ; Low Pulse Width  ; CLOCK_IN                              ; Rise       ; ADPCM_Decoder_2_Bit:u6|PCM_DATA_OUT[11]                         ;
237 
; -0.611 ; 0.500        ; 1.111          ; High Pulse Width ; CLOCK_IN                              ; Rise       ; ADPCM_Decoder_2_Bit:u6|PCM_DATA_OUT[12]                         ;
238 
; -0.611 ; 0.500        ; 1.111          ; Low Pulse Width  ; CLOCK_IN                              ; Rise       ; ADPCM_Decoder_2_Bit:u6|PCM_DATA_OUT[12]                         ;
239 
; -0.611 ; 0.500        ; 1.111          ; High Pulse Width ; CLOCK_IN                              ; Rise       ; ADPCM_Decoder_2_Bit:u6|PCM_DATA_OUT[13]                         ;
240 
; -0.611 ; 0.500        ; 1.111          ; Low Pulse Width  ; CLOCK_IN                              ; Rise       ; ADPCM_Decoder_2_Bit:u6|PCM_DATA_OUT[13]                         ;
241 
; -0.611 ; 0.500        ; 1.111          ; High Pulse Width ; CLOCK_IN                              ; Rise       ; ADPCM_Decoder_2_Bit:u6|PCM_DATA_OUT[14]                         ;
242 
; -0.611 ; 0.500        ; 1.111          ; Low Pulse Width  ; CLOCK_IN                              ; Rise       ; ADPCM_Decoder_2_Bit:u6|PCM_DATA_OUT[14]                         ;
243 
; -0.611 ; 0.500        ; 1.111          ; High Pulse Width ; CLOCK_IN                              ; Rise       ; ADPCM_Decoder_2_Bit:u6|PCM_DATA_OUT[15]                         ;
244 
; -0.611 ; 0.500        ; 1.111          ; Low Pulse Width  ; CLOCK_IN                              ; Rise       ; ADPCM_Decoder_2_Bit:u6|PCM_DATA_OUT[15]                         ;
245 
; -0.611 ; 0.500        ; 1.111          ; High Pulse Width ; CLOCK_IN                              ; Rise       ; ADPCM_Decoder_2_Bit:u6|PCM_DATA_OUT[1]                          ;
246 
; -0.611 ; 0.500        ; 1.111          ; Low Pulse Width  ; CLOCK_IN                              ; Rise       ; ADPCM_Decoder_2_Bit:u6|PCM_DATA_OUT[1]                          ;
247 
; -0.611 ; 0.500        ; 1.111          ; High Pulse Width ; CLOCK_IN                              ; Rise       ; ADPCM_Decoder_2_Bit:u6|PCM_DATA_OUT[2]                          ;
248 
; -0.611 ; 0.500        ; 1.111          ; Low Pulse Width  ; CLOCK_IN                              ; Rise       ; ADPCM_Decoder_2_Bit:u6|PCM_DATA_OUT[2]                          ;
249 
; -0.611 ; 0.500        ; 1.111          ; High Pulse Width ; CLOCK_IN                              ; Rise       ; ADPCM_Decoder_2_Bit:u6|PCM_DATA_OUT[3]                          ;
250 
; -0.611 ; 0.500        ; 1.111          ; Low Pulse Width  ; CLOCK_IN                              ; Rise       ; ADPCM_Decoder_2_Bit:u6|PCM_DATA_OUT[3]                          ;
251 
; -0.611 ; 0.500        ; 1.111          ; High Pulse Width ; CLOCK_IN                              ; Rise       ; ADPCM_Decoder_2_Bit:u6|PCM_DATA_OUT[4]                          ;
252 
; -0.611 ; 0.500        ; 1.111          ; Low Pulse Width  ; CLOCK_IN                              ; Rise       ; ADPCM_Decoder_2_Bit:u6|PCM_DATA_OUT[4]                          ;
253 
; -0.611 ; 0.500        ; 1.111          ; High Pulse Width ; CLOCK_IN                              ; Rise       ; ADPCM_Decoder_2_Bit:u6|PCM_DATA_OUT[5]                          ;
254 
; -0.611 ; 0.500        ; 1.111          ; Low Pulse Width  ; CLOCK_IN                              ; Rise       ; ADPCM_Decoder_2_Bit:u6|PCM_DATA_OUT[5]                          ;
255 
; -0.611 ; 0.500        ; 1.111          ; High Pulse Width ; CLOCK_IN                              ; Rise       ; ADPCM_Decoder_2_Bit:u6|PCM_DATA_OUT[6]                          ;
256 
; -0.611 ; 0.500        ; 1.111          ; Low Pulse Width  ; CLOCK_IN                              ; Rise       ; ADPCM_Decoder_2_Bit:u6|PCM_DATA_OUT[6]                          ;
257 
; -0.611 ; 0.500        ; 1.111          ; High Pulse Width ; CLOCK_IN                              ; Rise       ; ADPCM_Decoder_2_Bit:u6|PCM_DATA_OUT[7]                          ;
258 
; -0.611 ; 0.500        ; 1.111          ; Low Pulse Width  ; CLOCK_IN                              ; Rise       ; ADPCM_Decoder_2_Bit:u6|PCM_DATA_OUT[7]                          ;
259 
; -0.611 ; 0.500        ; 1.111          ; High Pulse Width ; CLOCK_IN                              ; Rise       ; ADPCM_Decoder_2_Bit:u6|PCM_DATA_OUT[8]                          ;
260 
; -0.611 ; 0.500        ; 1.111          ; Low Pulse Width  ; CLOCK_IN                              ; Rise       ; ADPCM_Decoder_2_Bit:u6|PCM_DATA_OUT[8]                          ;
261 
; -0.611 ; 0.500        ; 1.111          ; High Pulse Width ; CLOCK_IN                              ; Rise       ; ADPCM_Decoder_2_Bit:u6|PCM_DATA_OUT[9]                          ;
262 
; -0.611 ; 0.500        ; 1.111          ; Low Pulse Width  ; CLOCK_IN                              ; Rise       ; ADPCM_Decoder_2_Bit:u6|PCM_DATA_OUT[9]                          ;
263 
; -0.611 ; 0.500        ; 1.111          ; High Pulse Width ; CLOCK_IN                              ; Rise       ; ADPCM_Decoder_2_Bit:u6|PCM_Data[0]                              ;
264 
+--------+--------------+----------------+------------------+---------------------------------------+------------+-----------------------------------------------------------------+
265 
 
266 
 
267 
+--------------------------------------------------------------------------------------------------------------------------------------------------+
268 
; Setup Times                                                                                                                                      ;
269 
+-----------------------------+-------------------------------------------+-------+-------+------------+-------------------------------------------+
270 
; Data Port                   ; Clock Port                                ; Rise  ; Fall  ; Clock Edge ; Clock Reference                           ;
271 
+-----------------------------+-------------------------------------------+-------+-------+------------+-------------------------------------------+
272 
; KEY_0                       ; CLOCK_IN                                  ; 7.587 ; 7.587 ; Rise       ; CLOCK_IN                                  ;
273 
; KEY_1                       ; CLOCK_IN                                  ; 5.754 ; 5.754 ; Rise       ; CLOCK_IN                                  ;
274 
; FLASH_MEMORY_DATA_INOUT[*]  ; Flash_Memory_Driver:u4|Flash_Memory_Clock ; 4.447 ; 4.447 ; Fall       ; Flash_Memory_Driver:u4|Flash_Memory_Clock ;
275 
;  FLASH_MEMORY_DATA_INOUT[0] ; Flash_Memory_Driver:u4|Flash_Memory_Clock ; 4.258 ; 4.258 ; Fall       ; Flash_Memory_Driver:u4|Flash_Memory_Clock ;
276 
;  FLASH_MEMORY_DATA_INOUT[1] ; Flash_Memory_Driver:u4|Flash_Memory_Clock ; 4.277 ; 4.277 ; Fall       ; Flash_Memory_Driver:u4|Flash_Memory_Clock ;
277 
;  FLASH_MEMORY_DATA_INOUT[2] ; Flash_Memory_Driver:u4|Flash_Memory_Clock ; 4.133 ; 4.133 ; Fall       ; Flash_Memory_Driver:u4|Flash_Memory_Clock ;
278 
;  FLASH_MEMORY_DATA_INOUT[3] ; Flash_Memory_Driver:u4|Flash_Memory_Clock ; 4.111 ; 4.111 ; Fall       ; Flash_Memory_Driver:u4|Flash_Memory_Clock ;
279 
;  FLASH_MEMORY_DATA_INOUT[4] ; Flash_Memory_Driver:u4|Flash_Memory_Clock ; 4.287 ; 4.287 ; Fall       ; Flash_Memory_Driver:u4|Flash_Memory_Clock ;
280 
;  FLASH_MEMORY_DATA_INOUT[5] ; Flash_Memory_Driver:u4|Flash_Memory_Clock ; 4.142 ; 4.142 ; Fall       ; Flash_Memory_Driver:u4|Flash_Memory_Clock ;
281 
;  FLASH_MEMORY_DATA_INOUT[6] ; Flash_Memory_Driver:u4|Flash_Memory_Clock ; 4.440 ; 4.440 ; Fall       ; Flash_Memory_Driver:u4|Flash_Memory_Clock ;
282 
;  FLASH_MEMORY_DATA_INOUT[7] ; Flash_Memory_Driver:u4|Flash_Memory_Clock ; 4.447 ; 4.447 ; Fall       ; Flash_Memory_Driver:u4|Flash_Memory_Clock ;
283 
+-----------------------------+-------------------------------------------+-------+-------+------------+-------------------------------------------+
284 
 
285 
 
286 
+----------------------------------------------------------------------------------------------------------------------------------------------------+
287 
; Hold Times                                                                                                                                         ;
288 
+-----------------------------+-------------------------------------------+--------+--------+------------+-------------------------------------------+
289 
; Data Port                   ; Clock Port                                ; Rise   ; Fall   ; Clock Edge ; Clock Reference                           ;
290 
+-----------------------------+-------------------------------------------+--------+--------+------------+-------------------------------------------+
291 
; KEY_0                       ; CLOCK_IN                                  ; -4.570 ; -4.570 ; Rise       ; CLOCK_IN                                  ;
292 
; KEY_1                       ; CLOCK_IN                                  ; -5.506 ; -5.506 ; Rise       ; CLOCK_IN                                  ;
293 
; FLASH_MEMORY_DATA_INOUT[*]  ; Flash_Memory_Driver:u4|Flash_Memory_Clock ; -3.863 ; -3.863 ; Fall       ; Flash_Memory_Driver:u4|Flash_Memory_Clock ;
294 
;  FLASH_MEMORY_DATA_INOUT[0] ; Flash_Memory_Driver:u4|Flash_Memory_Clock ; -4.010 ; -4.010 ; Fall       ; Flash_Memory_Driver:u4|Flash_Memory_Clock ;
295 
;  FLASH_MEMORY_DATA_INOUT[1] ; Flash_Memory_Driver:u4|Flash_Memory_Clock ; -4.029 ; -4.029 ; Fall       ; Flash_Memory_Driver:u4|Flash_Memory_Clock ;
296 
;  FLASH_MEMORY_DATA_INOUT[2] ; Flash_Memory_Driver:u4|Flash_Memory_Clock ; -3.885 ; -3.885 ; Fall       ; Flash_Memory_Driver:u4|Flash_Memory_Clock ;
297 
;  FLASH_MEMORY_DATA_INOUT[3] ; Flash_Memory_Driver:u4|Flash_Memory_Clock ; -3.863 ; -3.863 ; Fall       ; Flash_Memory_Driver:u4|Flash_Memory_Clock ;
298 
;  FLASH_MEMORY_DATA_INOUT[4] ; Flash_Memory_Driver:u4|Flash_Memory_Clock ; -4.039 ; -4.039 ; Fall       ; Flash_Memory_Driver:u4|Flash_Memory_Clock ;
299 
;  FLASH_MEMORY_DATA_INOUT[5] ; Flash_Memory_Driver:u4|Flash_Memory_Clock ; -3.894 ; -3.894 ; Fall       ; Flash_Memory_Driver:u4|Flash_Memory_Clock ;
300 
;  FLASH_MEMORY_DATA_INOUT[6] ; Flash_Memory_Driver:u4|Flash_Memory_Clock ; -4.192 ; -4.192 ; Fall       ; Flash_Memory_Driver:u4|Flash_Memory_Clock ;
301 
;  FLASH_MEMORY_DATA_INOUT[7] ; Flash_Memory_Driver:u4|Flash_Memory_Clock ; -4.199 ; -4.199 ; Fall       ; Flash_Memory_Driver:u4|Flash_Memory_Clock ;
302 
+-----------------------------+-------------------------------------------+--------+--------+------------+-------------------------------------------+
303 
 
304 
 
305 
+------------------------------------------------------------------------------------------------------------------------------------------------------+
306 
; Clock to Output Times                                                                                                                                ;
307 
+-------------------------------+-------------------------------------------+--------+--------+------------+-------------------------------------------+
308 
; Data Port                     ; Clock Port                                ; Rise   ; Fall   ; Clock Edge ; Clock Reference                           ;
309 
+-------------------------------+-------------------------------------------+--------+--------+------------+-------------------------------------------+
310 
; I2C_CLOCK_OUT                 ; CLOCK_IN                                  ; 8.993  ; 8.993  ; Rise       ; CLOCK_IN                                  ;
311 
; I2C_DATA_INOUT                ; CLOCK_IN                                  ; 9.349  ; 9.349  ; Rise       ; CLOCK_IN                                  ;
312 
; I2S_CORE_CLOCK_OUT            ; CLOCK_IN                                  ; 9.120  ; 9.120  ; Rise       ; CLOCK_IN                                  ;
313 
; FLASH_MEMORY_ADDRESS_OUT[*]   ; Flash_Memory_Driver:u4|Flash_Memory_Clock ; 7.760  ; 7.760  ; Fall       ; Flash_Memory_Driver:u4|Flash_Memory_Clock ;
314 
;  FLASH_MEMORY_ADDRESS_OUT[0]  ; Flash_Memory_Driver:u4|Flash_Memory_Clock ; 7.760  ; 7.760  ; Fall       ; Flash_Memory_Driver:u4|Flash_Memory_Clock ;
315 
;  FLASH_MEMORY_ADDRESS_OUT[1]  ; Flash_Memory_Driver:u4|Flash_Memory_Clock ; 7.111  ; 7.111  ; Fall       ; Flash_Memory_Driver:u4|Flash_Memory_Clock ;
316 
;  FLASH_MEMORY_ADDRESS_OUT[2]  ; Flash_Memory_Driver:u4|Flash_Memory_Clock ; 7.465  ; 7.465  ; Fall       ; Flash_Memory_Driver:u4|Flash_Memory_Clock ;
317 
;  FLASH_MEMORY_ADDRESS_OUT[3]  ; Flash_Memory_Driver:u4|Flash_Memory_Clock ; 7.448  ; 7.448  ; Fall       ; Flash_Memory_Driver:u4|Flash_Memory_Clock ;
318 
;  FLASH_MEMORY_ADDRESS_OUT[4]  ; Flash_Memory_Driver:u4|Flash_Memory_Clock ; 6.840  ; 6.840  ; Fall       ; Flash_Memory_Driver:u4|Flash_Memory_Clock ;
319 
;  FLASH_MEMORY_ADDRESS_OUT[5]  ; Flash_Memory_Driver:u4|Flash_Memory_Clock ; 7.418  ; 7.418  ; Fall       ; Flash_Memory_Driver:u4|Flash_Memory_Clock ;
320 
;  FLASH_MEMORY_ADDRESS_OUT[6]  ; Flash_Memory_Driver:u4|Flash_Memory_Clock ; 7.400  ; 7.400  ; Fall       ; Flash_Memory_Driver:u4|Flash_Memory_Clock ;
321 
;  FLASH_MEMORY_ADDRESS_OUT[7]  ; Flash_Memory_Driver:u4|Flash_Memory_Clock ; 7.182  ; 7.182  ; Fall       ; Flash_Memory_Driver:u4|Flash_Memory_Clock ;
322 
;  FLASH_MEMORY_ADDRESS_OUT[8]  ; Flash_Memory_Driver:u4|Flash_Memory_Clock ; 7.148  ; 7.148  ; Fall       ; Flash_Memory_Driver:u4|Flash_Memory_Clock ;
323 
;  FLASH_MEMORY_ADDRESS_OUT[9]  ; Flash_Memory_Driver:u4|Flash_Memory_Clock ; 7.387  ; 7.387  ; Fall       ; Flash_Memory_Driver:u4|Flash_Memory_Clock ;
324 
;  FLASH_MEMORY_ADDRESS_OUT[10] ; Flash_Memory_Driver:u4|Flash_Memory_Clock ; 7.099  ; 7.099  ; Fall       ; Flash_Memory_Driver:u4|Flash_Memory_Clock ;
325 
;  FLASH_MEMORY_ADDRESS_OUT[11] ; Flash_Memory_Driver:u4|Flash_Memory_Clock ; 7.349  ; 7.349  ; Fall       ; Flash_Memory_Driver:u4|Flash_Memory_Clock ;
326 
;  FLASH_MEMORY_ADDRESS_OUT[12] ; Flash_Memory_Driver:u4|Flash_Memory_Clock ; 7.111  ; 7.111  ; Fall       ; Flash_Memory_Driver:u4|Flash_Memory_Clock ;
327 
;  FLASH_MEMORY_ADDRESS_OUT[13] ; Flash_Memory_Driver:u4|Flash_Memory_Clock ; 7.379  ; 7.379  ; Fall       ; Flash_Memory_Driver:u4|Flash_Memory_Clock ;
328 
;  FLASH_MEMORY_ADDRESS_OUT[14] ; Flash_Memory_Driver:u4|Flash_Memory_Clock ; 7.137  ; 7.137  ; Fall       ; Flash_Memory_Driver:u4|Flash_Memory_Clock ;
329 
;  FLASH_MEMORY_ADDRESS_OUT[15] ; Flash_Memory_Driver:u4|Flash_Memory_Clock ; 7.396  ; 7.396  ; Fall       ; Flash_Memory_Driver:u4|Flash_Memory_Clock ;
330 
;  FLASH_MEMORY_ADDRESS_OUT[16] ; Flash_Memory_Driver:u4|Flash_Memory_Clock ; 7.372  ; 7.372  ; Fall       ; Flash_Memory_Driver:u4|Flash_Memory_Clock ;
331 
;  FLASH_MEMORY_ADDRESS_OUT[17] ; Flash_Memory_Driver:u4|Flash_Memory_Clock ; 7.398  ; 7.398  ; Fall       ; Flash_Memory_Driver:u4|Flash_Memory_Clock ;
332 
;  FLASH_MEMORY_ADDRESS_OUT[18] ; Flash_Memory_Driver:u4|Flash_Memory_Clock ; 6.925  ; 6.925  ; Fall       ; Flash_Memory_Driver:u4|Flash_Memory_Clock ;
333 
;  FLASH_MEMORY_ADDRESS_OUT[19] ; Flash_Memory_Driver:u4|Flash_Memory_Clock ; 6.803  ; 6.803  ; Fall       ; Flash_Memory_Driver:u4|Flash_Memory_Clock ;
334 
;  FLASH_MEMORY_ADDRESS_OUT[20] ; Flash_Memory_Driver:u4|Flash_Memory_Clock ; 7.086  ; 7.086  ; Fall       ; Flash_Memory_Driver:u4|Flash_Memory_Clock ;
335 
;  FLASH_MEMORY_ADDRESS_OUT[21] ; Flash_Memory_Driver:u4|Flash_Memory_Clock ; 6.561  ; 6.561  ; Fall       ; Flash_Memory_Driver:u4|Flash_Memory_Clock ;
336 
; FLASH_MEMORY_nCE_OUT          ; Flash_Memory_Driver:u4|Flash_Memory_Clock ; 7.108  ; 7.108  ; Fall       ; Flash_Memory_Driver:u4|Flash_Memory_Clock ;
337 
; FLASH_MEMORY_nOE_OUT          ; Flash_Memory_Driver:u4|Flash_Memory_Clock ; 7.103  ; 7.103  ; Fall       ; Flash_Memory_Driver:u4|Flash_Memory_Clock ;
338 
; I2S_CLOCK_OUT                 ; I2S_Driver:u3|I2S_Clock                   ; 5.887  ;        ; Rise       ; I2S_Driver:u3|I2S_Clock                   ;
339 
; I2S_CLOCK_OUT                 ; I2S_Driver:u3|I2S_Clock                   ;        ; 5.887  ; Fall       ; I2S_Driver:u3|I2S_Clock                   ;
340 
; I2S_DATA_INOUT                ; I2S_Driver:u3|I2S_Clock                   ; 9.982  ; 9.982  ; Fall       ; I2S_Driver:u3|I2S_Clock                   ;
341 
; I2S_LEFT_RIGHT_CLOCK_OUT      ; I2S_Driver:u3|I2S_Clock                   ; 10.667 ; 10.667 ; Fall       ; I2S_Driver:u3|I2S_Clock                   ;
342 
+-------------------------------+-------------------------------------------+--------+--------+------------+-------------------------------------------+
343 
 
344 
 
345 
+------------------------------------------------------------------------------------------------------------------------------------------------------+
346 
; Minimum Clock to Output Times                                                                                                                        ;
347 
+-------------------------------+-------------------------------------------+--------+--------+------------+-------------------------------------------+
348 
; Data Port                     ; Clock Port                                ; Rise   ; Fall   ; Clock Edge ; Clock Reference                           ;
349 
+-------------------------------+-------------------------------------------+--------+--------+------------+-------------------------------------------+
350 
; I2C_CLOCK_OUT                 ; CLOCK_IN                                  ; 8.993  ; 8.993  ; Rise       ; CLOCK_IN                                  ;
351 
; I2C_DATA_INOUT                ; CLOCK_IN                                  ; 9.349  ; 9.349  ; Rise       ; CLOCK_IN                                  ;
352 
; I2S_CORE_CLOCK_OUT            ; CLOCK_IN                                  ; 9.120  ; 9.120  ; Rise       ; CLOCK_IN                                  ;
353 
; FLASH_MEMORY_ADDRESS_OUT[*]   ; Flash_Memory_Driver:u4|Flash_Memory_Clock ; 6.561  ; 6.561  ; Fall       ; Flash_Memory_Driver:u4|Flash_Memory_Clock ;
354 
;  FLASH_MEMORY_ADDRESS_OUT[0]  ; Flash_Memory_Driver:u4|Flash_Memory_Clock ; 7.760  ; 7.760  ; Fall       ; Flash_Memory_Driver:u4|Flash_Memory_Clock ;
355 
;  FLASH_MEMORY_ADDRESS_OUT[1]  ; Flash_Memory_Driver:u4|Flash_Memory_Clock ; 7.111  ; 7.111  ; Fall       ; Flash_Memory_Driver:u4|Flash_Memory_Clock ;
356 
;  FLASH_MEMORY_ADDRESS_OUT[2]  ; Flash_Memory_Driver:u4|Flash_Memory_Clock ; 7.465  ; 7.465  ; Fall       ; Flash_Memory_Driver:u4|Flash_Memory_Clock ;
357 
;  FLASH_MEMORY_ADDRESS_OUT[3]  ; Flash_Memory_Driver:u4|Flash_Memory_Clock ; 7.448  ; 7.448  ; Fall       ; Flash_Memory_Driver:u4|Flash_Memory_Clock ;
358 
;  FLASH_MEMORY_ADDRESS_OUT[4]  ; Flash_Memory_Driver:u4|Flash_Memory_Clock ; 6.840  ; 6.840  ; Fall       ; Flash_Memory_Driver:u4|Flash_Memory_Clock ;
359 
;  FLASH_MEMORY_ADDRESS_OUT[5]  ; Flash_Memory_Driver:u4|Flash_Memory_Clock ; 7.418  ; 7.418  ; Fall       ; Flash_Memory_Driver:u4|Flash_Memory_Clock ;
360 
;  FLASH_MEMORY_ADDRESS_OUT[6]  ; Flash_Memory_Driver:u4|Flash_Memory_Clock ; 7.400  ; 7.400  ; Fall       ; Flash_Memory_Driver:u4|Flash_Memory_Clock ;
361 
;  FLASH_MEMORY_ADDRESS_OUT[7]  ; Flash_Memory_Driver:u4|Flash_Memory_Clock ; 7.182  ; 7.182  ; Fall       ; Flash_Memory_Driver:u4|Flash_Memory_Clock ;
362 
;  FLASH_MEMORY_ADDRESS_OUT[8]  ; Flash_Memory_Driver:u4|Flash_Memory_Clock ; 7.148  ; 7.148  ; Fall       ; Flash_Memory_Driver:u4|Flash_Memory_Clock ;
363 
;  FLASH_MEMORY_ADDRESS_OUT[9]  ; Flash_Memory_Driver:u4|Flash_Memory_Clock ; 7.387  ; 7.387  ; Fall       ; Flash_Memory_Driver:u4|Flash_Memory_Clock ;
364 
;  FLASH_MEMORY_ADDRESS_OUT[10] ; Flash_Memory_Driver:u4|Flash_Memory_Clock ; 7.099  ; 7.099  ; Fall       ; Flash_Memory_Driver:u4|Flash_Memory_Clock ;
365 
;  FLASH_MEMORY_ADDRESS_OUT[11] ; Flash_Memory_Driver:u4|Flash_Memory_Clock ; 7.349  ; 7.349  ; Fall       ; Flash_Memory_Driver:u4|Flash_Memory_Clock ;
366 
;  FLASH_MEMORY_ADDRESS_OUT[12] ; Flash_Memory_Driver:u4|Flash_Memory_Clock ; 7.111  ; 7.111  ; Fall       ; Flash_Memory_Driver:u4|Flash_Memory_Clock ;
367 
;  FLASH_MEMORY_ADDRESS_OUT[13] ; Flash_Memory_Driver:u4|Flash_Memory_Clock ; 7.379  ; 7.379  ; Fall       ; Flash_Memory_Driver:u4|Flash_Memory_Clock ;
368 
;  FLASH_MEMORY_ADDRESS_OUT[14] ; Flash_Memory_Driver:u4|Flash_Memory_Clock ; 7.137  ; 7.137  ; Fall       ; Flash_Memory_Driver:u4|Flash_Memory_Clock ;
369 
;  FLASH_MEMORY_ADDRESS_OUT[15] ; Flash_Memory_Driver:u4|Flash_Memory_Clock ; 7.396  ; 7.396  ; Fall       ; Flash_Memory_Driver:u4|Flash_Memory_Clock ;
370 
;  FLASH_MEMORY_ADDRESS_OUT[16] ; Flash_Memory_Driver:u4|Flash_Memory_Clock ; 7.372  ; 7.372  ; Fall       ; Flash_Memory_Driver:u4|Flash_Memory_Clock ;
371 
;  FLASH_MEMORY_ADDRESS_OUT[17] ; Flash_Memory_Driver:u4|Flash_Memory_Clock ; 7.398  ; 7.398  ; Fall       ; Flash_Memory_Driver:u4|Flash_Memory_Clock ;
372 
;  FLASH_MEMORY_ADDRESS_OUT[18] ; Flash_Memory_Driver:u4|Flash_Memory_Clock ; 6.925  ; 6.925  ; Fall       ; Flash_Memory_Driver:u4|Flash_Memory_Clock ;
373 
;  FLASH_MEMORY_ADDRESS_OUT[19] ; Flash_Memory_Driver:u4|Flash_Memory_Clock ; 6.803  ; 6.803  ; Fall       ; Flash_Memory_Driver:u4|Flash_Memory_Clock ;
374 
;  FLASH_MEMORY_ADDRESS_OUT[20] ; Flash_Memory_Driver:u4|Flash_Memory_Clock ; 7.086  ; 7.086  ; Fall       ; Flash_Memory_Driver:u4|Flash_Memory_Clock ;
375 
;  FLASH_MEMORY_ADDRESS_OUT[21] ; Flash_Memory_Driver:u4|Flash_Memory_Clock ; 6.561  ; 6.561  ; Fall       ; Flash_Memory_Driver:u4|Flash_Memory_Clock ;
376 
; FLASH_MEMORY_nCE_OUT          ; Flash_Memory_Driver:u4|Flash_Memory_Clock ; 7.108  ; 7.108  ; Fall       ; Flash_Memory_Driver:u4|Flash_Memory_Clock ;
377 
; FLASH_MEMORY_nOE_OUT          ; Flash_Memory_Driver:u4|Flash_Memory_Clock ; 7.103  ; 7.103  ; Fall       ; Flash_Memory_Driver:u4|Flash_Memory_Clock ;
378 
; I2S_CLOCK_OUT                 ; I2S_Driver:u3|I2S_Clock                   ; 5.887  ;        ; Rise       ; I2S_Driver:u3|I2S_Clock                   ;
379 
; I2S_CLOCK_OUT                 ; I2S_Driver:u3|I2S_Clock                   ;        ; 5.887  ; Fall       ; I2S_Driver:u3|I2S_Clock                   ;
380 
; I2S_DATA_INOUT                ; I2S_Driver:u3|I2S_Clock                   ; 9.982  ; 9.982  ; Fall       ; I2S_Driver:u3|I2S_Clock                   ;
381 
; I2S_LEFT_RIGHT_CLOCK_OUT      ; I2S_Driver:u3|I2S_Clock                   ; 10.667 ; 10.667 ; Fall       ; I2S_Driver:u3|I2S_Clock                   ;
382 
+-------------------------------+-------------------------------------------+--------+--------+------------+-------------------------------------------+
383 
 
384 
 
385 
+---------------------------------------------------------------------+
386 
; Fast Model Setup Summary                                            ;
387 
+-------------------------------------------+---------+---------------+
388 
; Clock                                     ; Slack   ; End Point TNS ;
389 
+-------------------------------------------+---------+---------------+
390 
; CLOCK_IN                                  ; -17.515 ; -725.765      ;
391 
; I2S_Driver:u3|I2S_Clock                   ; -0.900  ; -0.986        ;
392 
; I2S_Driver:u3|I2S_PCM_DATA_ACCESS_OUT     ; -0.460  ; -3.086        ;
393 
; Flash_Memory_Driver:u4|Flash_Memory_Clock ; -0.446  ; -6.111        ;
394 
+-------------------------------------------+---------+---------------+
395 
 
396 
 
397 
+--------------------------------------------------------------------+
398 
; Fast Model Hold Summary                                            ;
399 
+-------------------------------------------+--------+---------------+
400 
; Clock                                     ; Slack  ; End Point TNS ;
401 
+-------------------------------------------+--------+---------------+
402 
; CLOCK_IN                                  ; -1.697 ; -5.088        ;
403 
; Flash_Memory_Driver:u4|Flash_Memory_Clock ; 0.215  ; 0.000         ;
404 
; I2S_Driver:u3|I2S_Clock                   ; 0.215  ; 0.000         ;
405 
; I2S_Driver:u3|I2S_PCM_DATA_ACCESS_OUT     ; 0.215  ; 0.000         ;
406 
+-------------------------------------------+--------+---------------+
407 
 
408 
 
409 
+---------------------------------------+
410 
; Fast Model Recovery Summary           ;
411 
+---------------+-------+---------------+
412 
; Clock         ; Slack ; End Point TNS ;
413 
+---------------+-------+---------------+
414 
; I2S_ACTIVE_IN ; 0.409 ; 0.000         ;
415 
+---------------+-------+---------------+
416 
 
417 
 
418 
+----------------------------------------+
419 
; Fast Model Removal Summary             ;
420 
+---------------+--------+---------------+
421 
; Clock         ; Slack  ; End Point TNS ;
422 
+---------------+--------+---------------+
423 
; I2S_ACTIVE_IN ; -0.029 ; -0.029        ;
424 
+---------------+--------+---------------+
425 
 
426 
 
427 
+----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
428 
; Fast Model Minimum Pulse Width                                                                                                                                                   ;
429 
+--------+--------------+----------------+------------------+---------------------------------------+------------+-----------------------------------------------------------------+
430 
; Slack  ; Actual Width ; Required Width ; Type             ; Clock                                 ; Clock Edge ; Target                                                          ;
431 
+--------+--------------+----------------+------------------+---------------------------------------+------------+-----------------------------------------------------------------+
432 
; -1.380 ; 1.000        ; 2.380          ; Port Rate        ; CLOCK_IN                              ; Rise       ; CLOCK_IN                                                        ;
433 
; -0.500 ; 0.500        ; 1.000          ; High Pulse Width ; I2S_Driver:u3|I2S_PCM_DATA_ACCESS_OUT ; Rise       ; ADPCM2_DECODER_ACTIVE                                           ;
434 
; -0.500 ; 0.500        ; 1.000          ; Low Pulse Width  ; I2S_Driver:u3|I2S_PCM_DATA_ACCESS_OUT ; Rise       ; ADPCM2_DECODER_ACTIVE                                           ;
435 
; -0.500 ; 0.500        ; 1.000          ; High Pulse Width ; I2S_Driver:u3|I2S_PCM_DATA_ACCESS_OUT ; Rise       ; ADPCM2_DECODER_DATA[0]                                          ;
436 
; -0.500 ; 0.500        ; 1.000          ; Low Pulse Width  ; I2S_Driver:u3|I2S_PCM_DATA_ACCESS_OUT ; Rise       ; ADPCM2_DECODER_DATA[0]                                          ;
437 
; -0.500 ; 0.500        ; 1.000          ; High Pulse Width ; I2S_Driver:u3|I2S_PCM_DATA_ACCESS_OUT ; Rise       ; ADPCM2_DECODER_DATA[1]                                          ;
438 
; -0.500 ; 0.500        ; 1.000          ; Low Pulse Width  ; I2S_Driver:u3|I2S_PCM_DATA_ACCESS_OUT ; Rise       ; ADPCM2_DECODER_DATA[1]                                          ;
439 
; -0.500 ; 0.500        ; 1.000          ; High Pulse Width ; I2S_Driver:u3|I2S_PCM_DATA_ACCESS_OUT ; Rise       ; ADPCM_Bit_Counter[1]                                            ;
440 
; -0.500 ; 0.500        ; 1.000          ; Low Pulse Width  ; I2S_Driver:u3|I2S_PCM_DATA_ACCESS_OUT ; Rise       ; ADPCM_Bit_Counter[1]                                            ;
441 
; -0.500 ; 0.500        ; 1.000          ; High Pulse Width ; I2S_Driver:u3|I2S_PCM_DATA_ACCESS_OUT ; Rise       ; ADPCM_Bit_Counter[2]                                            ;
442 
; -0.500 ; 0.500        ; 1.000          ; Low Pulse Width  ; I2S_Driver:u3|I2S_PCM_DATA_ACCESS_OUT ; Rise       ; ADPCM_Bit_Counter[2]                                            ;
443 
; -0.500 ; 0.500        ; 1.000          ; High Pulse Width ; CLOCK_IN                              ; Rise       ; ADPCM_Decoder_2_Bit:u6|ADPCM_Decoder_State_Counter[0]           ;
444 
; -0.500 ; 0.500        ; 1.000          ; Low Pulse Width  ; CLOCK_IN                              ; Rise       ; ADPCM_Decoder_2_Bit:u6|ADPCM_Decoder_State_Counter[0]           ;
445 
; -0.500 ; 0.500        ; 1.000          ; High Pulse Width ; CLOCK_IN                              ; Rise       ; ADPCM_Decoder_2_Bit:u6|ADPCM_Decoder_State_Counter[1]           ;
446 
; -0.500 ; 0.500        ; 1.000          ; Low Pulse Width  ; CLOCK_IN                              ; Rise       ; ADPCM_Decoder_2_Bit:u6|ADPCM_Decoder_State_Counter[1]           ;
447 
; -0.500 ; 0.500        ; 1.000          ; High Pulse Width ; CLOCK_IN                              ; Rise       ; ADPCM_Decoder_2_Bit:u6|ADPCM_Decoder_State_Counter[2]           ;
448 
; -0.500 ; 0.500        ; 1.000          ; Low Pulse Width  ; CLOCK_IN                              ; Rise       ; ADPCM_Decoder_2_Bit:u6|ADPCM_Decoder_State_Counter[2]           ;
449 
; -0.500 ; 0.500        ; 1.000          ; High Pulse Width ; CLOCK_IN                              ; Rise       ; ADPCM_Decoder_2_Bit:u6|ADPCM_Decoder_Step_Size_Table_Pointer[2] ;
450 
; -0.500 ; 0.500        ; 1.000          ; Low Pulse Width  ; CLOCK_IN                              ; Rise       ; ADPCM_Decoder_2_Bit:u6|ADPCM_Decoder_Step_Size_Table_Pointer[2] ;
451 
; -0.500 ; 0.500        ; 1.000          ; High Pulse Width ; CLOCK_IN                              ; Rise       ; ADPCM_Decoder_2_Bit:u6|ADPCM_Decoder_Step_Size_Table_Pointer[3] ;
452 
; -0.500 ; 0.500        ; 1.000          ; Low Pulse Width  ; CLOCK_IN                              ; Rise       ; ADPCM_Decoder_2_Bit:u6|ADPCM_Decoder_Step_Size_Table_Pointer[3] ;
453 
; -0.500 ; 0.500        ; 1.000          ; High Pulse Width ; CLOCK_IN                              ; Rise       ; ADPCM_Decoder_2_Bit:u6|ADPCM_Decoder_Step_Size_Table_Pointer[4] ;
454 
; -0.500 ; 0.500        ; 1.000          ; Low Pulse Width  ; CLOCK_IN                              ; Rise       ; ADPCM_Decoder_2_Bit:u6|ADPCM_Decoder_Step_Size_Table_Pointer[4] ;
455 
; -0.500 ; 0.500        ; 1.000          ; High Pulse Width ; CLOCK_IN                              ; Rise       ; ADPCM_Decoder_2_Bit:u6|ADPCM_Decoder_Step_Size_Table_Pointer[5] ;
456 
; -0.500 ; 0.500        ; 1.000          ; Low Pulse Width  ; CLOCK_IN                              ; Rise       ; ADPCM_Decoder_2_Bit:u6|ADPCM_Decoder_Step_Size_Table_Pointer[5] ;
457 
; -0.500 ; 0.500        ; 1.000          ; High Pulse Width ; CLOCK_IN                              ; Rise       ; ADPCM_Decoder_2_Bit:u6|ADPCM_Decoder_Step_Size_Table_Pointer[6] ;
458 
; -0.500 ; 0.500        ; 1.000          ; Low Pulse Width  ; CLOCK_IN                              ; Rise       ; ADPCM_Decoder_2_Bit:u6|ADPCM_Decoder_Step_Size_Table_Pointer[6] ;
459 
; -0.500 ; 0.500        ; 1.000          ; High Pulse Width ; CLOCK_IN                              ; Rise       ; ADPCM_Decoder_2_Bit:u6|ADPCM_Decoder_Step_Size_Table_Pointer[7] ;
460 
; -0.500 ; 0.500        ; 1.000          ; Low Pulse Width  ; CLOCK_IN                              ; Rise       ; ADPCM_Decoder_2_Bit:u6|ADPCM_Decoder_Step_Size_Table_Pointer[7] ;
461 
; -0.500 ; 0.500        ; 1.000          ; High Pulse Width ; CLOCK_IN                              ; Rise       ; ADPCM_Decoder_2_Bit:u6|ADPCM_Decoder_Step_Size_Table_Pointer[8] ;
462 
; -0.500 ; 0.500        ; 1.000          ; Low Pulse Width  ; CLOCK_IN                              ; Rise       ; ADPCM_Decoder_2_Bit:u6|ADPCM_Decoder_Step_Size_Table_Pointer[8] ;
463 
; -0.500 ; 0.500        ; 1.000          ; High Pulse Width ; CLOCK_IN                              ; Rise       ; ADPCM_Decoder_2_Bit:u6|ADPCM_Decoder_Step_Size_Table_Pointer[9] ;
464 
; -0.500 ; 0.500        ; 1.000          ; Low Pulse Width  ; CLOCK_IN                              ; Rise       ; ADPCM_Decoder_2_Bit:u6|ADPCM_Decoder_Step_Size_Table_Pointer[9] ;
465 
; -0.500 ; 0.500        ; 1.000          ; High Pulse Width ; CLOCK_IN                              ; Rise       ; ADPCM_Decoder_2_Bit:u6|Active_Module                            ;
466 
; -0.500 ; 0.500        ; 1.000          ; Low Pulse Width  ; CLOCK_IN                              ; Rise       ; ADPCM_Decoder_2_Bit:u6|Active_Module                            ;
467 
; -0.500 ; 0.500        ; 1.000          ; High Pulse Width ; CLOCK_IN                              ; Rise       ; ADPCM_Decoder_2_Bit:u6|Last_PCM_Data[0]                         ;
468 
; -0.500 ; 0.500        ; 1.000          ; Low Pulse Width  ; CLOCK_IN                              ; Rise       ; ADPCM_Decoder_2_Bit:u6|Last_PCM_Data[0]                         ;
469 
; -0.500 ; 0.500        ; 1.000          ; High Pulse Width ; CLOCK_IN                              ; Rise       ; ADPCM_Decoder_2_Bit:u6|Last_PCM_Data[10]                        ;
470 
; -0.500 ; 0.500        ; 1.000          ; Low Pulse Width  ; CLOCK_IN                              ; Rise       ; ADPCM_Decoder_2_Bit:u6|Last_PCM_Data[10]                        ;
471 
; -0.500 ; 0.500        ; 1.000          ; High Pulse Width ; CLOCK_IN                              ; Rise       ; ADPCM_Decoder_2_Bit:u6|Last_PCM_Data[11]                        ;
472 
; -0.500 ; 0.500        ; 1.000          ; Low Pulse Width  ; CLOCK_IN                              ; Rise       ; ADPCM_Decoder_2_Bit:u6|Last_PCM_Data[11]                        ;
473 
; -0.500 ; 0.500        ; 1.000          ; High Pulse Width ; CLOCK_IN                              ; Rise       ; ADPCM_Decoder_2_Bit:u6|Last_PCM_Data[12]                        ;
474 
; -0.500 ; 0.500        ; 1.000          ; Low Pulse Width  ; CLOCK_IN                              ; Rise       ; ADPCM_Decoder_2_Bit:u6|Last_PCM_Data[12]                        ;
475 
; -0.500 ; 0.500        ; 1.000          ; High Pulse Width ; CLOCK_IN                              ; Rise       ; ADPCM_Decoder_2_Bit:u6|Last_PCM_Data[13]                        ;
476 
; -0.500 ; 0.500        ; 1.000          ; Low Pulse Width  ; CLOCK_IN                              ; Rise       ; ADPCM_Decoder_2_Bit:u6|Last_PCM_Data[13]                        ;
477 
; -0.500 ; 0.500        ; 1.000          ; High Pulse Width ; CLOCK_IN                              ; Rise       ; ADPCM_Decoder_2_Bit:u6|Last_PCM_Data[14]                        ;
478 
; -0.500 ; 0.500        ; 1.000          ; Low Pulse Width  ; CLOCK_IN                              ; Rise       ; ADPCM_Decoder_2_Bit:u6|Last_PCM_Data[14]                        ;
479 
; -0.500 ; 0.500        ; 1.000          ; High Pulse Width ; CLOCK_IN                              ; Rise       ; ADPCM_Decoder_2_Bit:u6|Last_PCM_Data[15]                        ;
480 
; -0.500 ; 0.500        ; 1.000          ; Low Pulse Width  ; CLOCK_IN                              ; Rise       ; ADPCM_Decoder_2_Bit:u6|Last_PCM_Data[15]                        ;
481 
; -0.500 ; 0.500        ; 1.000          ; High Pulse Width ; CLOCK_IN                              ; Rise       ; ADPCM_Decoder_2_Bit:u6|Last_PCM_Data[1]                         ;
482 
; -0.500 ; 0.500        ; 1.000          ; Low Pulse Width  ; CLOCK_IN                              ; Rise       ; ADPCM_Decoder_2_Bit:u6|Last_PCM_Data[1]                         ;
483 
; -0.500 ; 0.500        ; 1.000          ; High Pulse Width ; CLOCK_IN                              ; Rise       ; ADPCM_Decoder_2_Bit:u6|Last_PCM_Data[2]                         ;
484 
; -0.500 ; 0.500        ; 1.000          ; Low Pulse Width  ; CLOCK_IN                              ; Rise       ; ADPCM_Decoder_2_Bit:u6|Last_PCM_Data[2]                         ;
485 
; -0.500 ; 0.500        ; 1.000          ; High Pulse Width ; CLOCK_IN                              ; Rise       ; ADPCM_Decoder_2_Bit:u6|Last_PCM_Data[3]                         ;
486 
; -0.500 ; 0.500        ; 1.000          ; Low Pulse Width  ; CLOCK_IN                              ; Rise       ; ADPCM_Decoder_2_Bit:u6|Last_PCM_Data[3]                         ;
487 
; -0.500 ; 0.500        ; 1.000          ; High Pulse Width ; CLOCK_IN                              ; Rise       ; ADPCM_Decoder_2_Bit:u6|Last_PCM_Data[4]                         ;
488 
; -0.500 ; 0.500        ; 1.000          ; Low Pulse Width  ; CLOCK_IN                              ; Rise       ; ADPCM_Decoder_2_Bit:u6|Last_PCM_Data[4]                         ;
489 
; -0.500 ; 0.500        ; 1.000          ; High Pulse Width ; CLOCK_IN                              ; Rise       ; ADPCM_Decoder_2_Bit:u6|Last_PCM_Data[5]                         ;
490 
; -0.500 ; 0.500        ; 1.000          ; Low Pulse Width  ; CLOCK_IN                              ; Rise       ; ADPCM_Decoder_2_Bit:u6|Last_PCM_Data[5]                         ;
491 
; -0.500 ; 0.500        ; 1.000          ; High Pulse Width ; CLOCK_IN                              ; Rise       ; ADPCM_Decoder_2_Bit:u6|Last_PCM_Data[6]                         ;
492 
; -0.500 ; 0.500        ; 1.000          ; Low Pulse Width  ; CLOCK_IN                              ; Rise       ; ADPCM_Decoder_2_Bit:u6|Last_PCM_Data[6]                         ;
493 
; -0.500 ; 0.500        ; 1.000          ; High Pulse Width ; CLOCK_IN                              ; Rise       ; ADPCM_Decoder_2_Bit:u6|Last_PCM_Data[7]                         ;
494 
; -0.500 ; 0.500        ; 1.000          ; Low Pulse Width  ; CLOCK_IN                              ; Rise       ; ADPCM_Decoder_2_Bit:u6|Last_PCM_Data[7]                         ;
495 
; -0.500 ; 0.500        ; 1.000          ; High Pulse Width ; CLOCK_IN                              ; Rise       ; ADPCM_Decoder_2_Bit:u6|Last_PCM_Data[8]                         ;
496 
; -0.500 ; 0.500        ; 1.000          ; Low Pulse Width  ; CLOCK_IN                              ; Rise       ; ADPCM_Decoder_2_Bit:u6|Last_PCM_Data[8]                         ;
497 
; -0.500 ; 0.500        ; 1.000          ; High Pulse Width ; CLOCK_IN                              ; Rise       ; ADPCM_Decoder_2_Bit:u6|Last_PCM_Data[9]                         ;
498 
; -0.500 ; 0.500        ; 1.000          ; Low Pulse Width  ; CLOCK_IN                              ; Rise       ; ADPCM_Decoder_2_Bit:u6|Last_PCM_Data[9]                         ;
499 
; -0.500 ; 0.500        ; 1.000          ; High Pulse Width ; CLOCK_IN                              ; Rise       ; ADPCM_Decoder_2_Bit:u6|PCM_DATA_OUT[0]                          ;
500 
; -0.500 ; 0.500        ; 1.000          ; Low Pulse Width  ; CLOCK_IN                              ; Rise       ; ADPCM_Decoder_2_Bit:u6|PCM_DATA_OUT[0]                          ;
501 
; -0.500 ; 0.500        ; 1.000          ; High Pulse Width ; CLOCK_IN                              ; Rise       ; ADPCM_Decoder_2_Bit:u6|PCM_DATA_OUT[10]                         ;
502 
; -0.500 ; 0.500        ; 1.000          ; Low Pulse Width  ; CLOCK_IN                              ; Rise       ; ADPCM_Decoder_2_Bit:u6|PCM_DATA_OUT[10]                         ;
503 
; -0.500 ; 0.500        ; 1.000          ; High Pulse Width ; CLOCK_IN                              ; Rise       ; ADPCM_Decoder_2_Bit:u6|PCM_DATA_OUT[11]                         ;
504 
; -0.500 ; 0.500        ; 1.000          ; Low Pulse Width  ; CLOCK_IN                              ; Rise       ; ADPCM_Decoder_2_Bit:u6|PCM_DATA_OUT[11]                         ;
505 
; -0.500 ; 0.500        ; 1.000          ; High Pulse Width ; CLOCK_IN                              ; Rise       ; ADPCM_Decoder_2_Bit:u6|PCM_DATA_OUT[12]                         ;
506 
; -0.500 ; 0.500        ; 1.000          ; Low Pulse Width  ; CLOCK_IN                              ; Rise       ; ADPCM_Decoder_2_Bit:u6|PCM_DATA_OUT[12]                         ;
507 
; -0.500 ; 0.500        ; 1.000          ; High Pulse Width ; CLOCK_IN                              ; Rise       ; ADPCM_Decoder_2_Bit:u6|PCM_DATA_OUT[13]                         ;
508 
; -0.500 ; 0.500        ; 1.000          ; Low Pulse Width  ; CLOCK_IN                              ; Rise       ; ADPCM_Decoder_2_Bit:u6|PCM_DATA_OUT[13]                         ;
509 
; -0.500 ; 0.500        ; 1.000          ; High Pulse Width ; CLOCK_IN                              ; Rise       ; ADPCM_Decoder_2_Bit:u6|PCM_DATA_OUT[14]                         ;
510 
; -0.500 ; 0.500        ; 1.000          ; Low Pulse Width  ; CLOCK_IN                              ; Rise       ; ADPCM_Decoder_2_Bit:u6|PCM_DATA_OUT[14]                         ;
511 
; -0.500 ; 0.500        ; 1.000          ; High Pulse Width ; CLOCK_IN                              ; Rise       ; ADPCM_Decoder_2_Bit:u6|PCM_DATA_OUT[15]                         ;
512 
; -0.500 ; 0.500        ; 1.000          ; Low Pulse Width  ; CLOCK_IN                              ; Rise       ; ADPCM_Decoder_2_Bit:u6|PCM_DATA_OUT[15]                         ;
513 
; -0.500 ; 0.500        ; 1.000          ; High Pulse Width ; CLOCK_IN                              ; Rise       ; ADPCM_Decoder_2_Bit:u6|PCM_DATA_OUT[1]                          ;
514 
; -0.500 ; 0.500        ; 1.000          ; Low Pulse Width  ; CLOCK_IN                              ; Rise       ; ADPCM_Decoder_2_Bit:u6|PCM_DATA_OUT[1]                          ;
515 
; -0.500 ; 0.500        ; 1.000          ; High Pulse Width ; CLOCK_IN                              ; Rise       ; ADPCM_Decoder_2_Bit:u6|PCM_DATA_OUT[2]                          ;
516 
; -0.500 ; 0.500        ; 1.000          ; Low Pulse Width  ; CLOCK_IN                              ; Rise       ; ADPCM_Decoder_2_Bit:u6|PCM_DATA_OUT[2]                          ;
517 
; -0.500 ; 0.500        ; 1.000          ; High Pulse Width ; CLOCK_IN                              ; Rise       ; ADPCM_Decoder_2_Bit:u6|PCM_DATA_OUT[3]                          ;
518 
; -0.500 ; 0.500        ; 1.000          ; Low Pulse Width  ; CLOCK_IN                              ; Rise       ; ADPCM_Decoder_2_Bit:u6|PCM_DATA_OUT[3]                          ;
519 
; -0.500 ; 0.500        ; 1.000          ; High Pulse Width ; CLOCK_IN                              ; Rise       ; ADPCM_Decoder_2_Bit:u6|PCM_DATA_OUT[4]                          ;
520 
; -0.500 ; 0.500        ; 1.000          ; Low Pulse Width  ; CLOCK_IN                              ; Rise       ; ADPCM_Decoder_2_Bit:u6|PCM_DATA_OUT[4]                          ;
521 
; -0.500 ; 0.500        ; 1.000          ; High Pulse Width ; CLOCK_IN                              ; Rise       ; ADPCM_Decoder_2_Bit:u6|PCM_DATA_OUT[5]                          ;
522 
; -0.500 ; 0.500        ; 1.000          ; Low Pulse Width  ; CLOCK_IN                              ; Rise       ; ADPCM_Decoder_2_Bit:u6|PCM_DATA_OUT[5]                          ;
523 
; -0.500 ; 0.500        ; 1.000          ; High Pulse Width ; CLOCK_IN                              ; Rise       ; ADPCM_Decoder_2_Bit:u6|PCM_DATA_OUT[6]                          ;
524 
; -0.500 ; 0.500        ; 1.000          ; Low Pulse Width  ; CLOCK_IN                              ; Rise       ; ADPCM_Decoder_2_Bit:u6|PCM_DATA_OUT[6]                          ;
525 
; -0.500 ; 0.500        ; 1.000          ; High Pulse Width ; CLOCK_IN                              ; Rise       ; ADPCM_Decoder_2_Bit:u6|PCM_DATA_OUT[7]                          ;
526 
; -0.500 ; 0.500        ; 1.000          ; Low Pulse Width  ; CLOCK_IN                              ; Rise       ; ADPCM_Decoder_2_Bit:u6|PCM_DATA_OUT[7]                          ;
527 
; -0.500 ; 0.500        ; 1.000          ; High Pulse Width ; CLOCK_IN                              ; Rise       ; ADPCM_Decoder_2_Bit:u6|PCM_DATA_OUT[8]                          ;
528 
; -0.500 ; 0.500        ; 1.000          ; Low Pulse Width  ; CLOCK_IN                              ; Rise       ; ADPCM_Decoder_2_Bit:u6|PCM_DATA_OUT[8]                          ;
529 
; -0.500 ; 0.500        ; 1.000          ; High Pulse Width ; CLOCK_IN                              ; Rise       ; ADPCM_Decoder_2_Bit:u6|PCM_DATA_OUT[9]                          ;
530 
; -0.500 ; 0.500        ; 1.000          ; Low Pulse Width  ; CLOCK_IN                              ; Rise       ; ADPCM_Decoder_2_Bit:u6|PCM_DATA_OUT[9]                          ;
531 
; -0.500 ; 0.500        ; 1.000          ; High Pulse Width ; CLOCK_IN                              ; Rise       ; ADPCM_Decoder_2_Bit:u6|PCM_Data[0]                              ;
532 
+--------+--------------+----------------+------------------+---------------------------------------+------------+-----------------------------------------------------------------+
533 
 
534 
 
535 
+--------------------------------------------------------------------------------------------------------------------------------------------------+
536 
; Setup Times                                                                                                                                      ;
537 
+-----------------------------+-------------------------------------------+-------+-------+------------+-------------------------------------------+
538 
; Data Port                   ; Clock Port                                ; Rise  ; Fall  ; Clock Edge ; Clock Reference                           ;
539 
+-----------------------------+-------------------------------------------+-------+-------+------------+-------------------------------------------+
540 
; KEY_0                       ; CLOCK_IN                                  ; 3.220 ; 3.220 ; Rise       ; CLOCK_IN                                  ;
541 
; KEY_1                       ; CLOCK_IN                                  ; 2.635 ; 2.635 ; Rise       ; CLOCK_IN                                  ;
542 
; FLASH_MEMORY_DATA_INOUT[*]  ; Flash_Memory_Driver:u4|Flash_Memory_Clock ; 2.098 ; 2.098 ; Fall       ; Flash_Memory_Driver:u4|Flash_Memory_Clock ;
543 
;  FLASH_MEMORY_DATA_INOUT[0] ; Flash_Memory_Driver:u4|Flash_Memory_Clock ; 2.026 ; 2.026 ; Fall       ; Flash_Memory_Driver:u4|Flash_Memory_Clock ;
544 
;  FLASH_MEMORY_DATA_INOUT[1] ; Flash_Memory_Driver:u4|Flash_Memory_Clock ; 2.039 ; 2.039 ; Fall       ; Flash_Memory_Driver:u4|Flash_Memory_Clock ;
545 
;  FLASH_MEMORY_DATA_INOUT[2] ; Flash_Memory_Driver:u4|Flash_Memory_Clock ; 1.949 ; 1.949 ; Fall       ; Flash_Memory_Driver:u4|Flash_Memory_Clock ;
546 
;  FLASH_MEMORY_DATA_INOUT[3] ; Flash_Memory_Driver:u4|Flash_Memory_Clock ; 1.937 ; 1.937 ; Fall       ; Flash_Memory_Driver:u4|Flash_Memory_Clock ;
547 
;  FLASH_MEMORY_DATA_INOUT[4] ; Flash_Memory_Driver:u4|Flash_Memory_Clock ; 2.044 ; 2.044 ; Fall       ; Flash_Memory_Driver:u4|Flash_Memory_Clock ;
548 
;  FLASH_MEMORY_DATA_INOUT[5] ; Flash_Memory_Driver:u4|Flash_Memory_Clock ; 1.956 ; 1.956 ; Fall       ; Flash_Memory_Driver:u4|Flash_Memory_Clock ;
549 
;  FLASH_MEMORY_DATA_INOUT[6] ; Flash_Memory_Driver:u4|Flash_Memory_Clock ; 2.072 ; 2.072 ; Fall       ; Flash_Memory_Driver:u4|Flash_Memory_Clock ;
550 
;  FLASH_MEMORY_DATA_INOUT[7] ; Flash_Memory_Driver:u4|Flash_Memory_Clock ; 2.098 ; 2.098 ; Fall       ; Flash_Memory_Driver:u4|Flash_Memory_Clock ;
551 
+-----------------------------+-------------------------------------------+-------+-------+------------+-------------------------------------------+
552 
 
553 
 
554 
+----------------------------------------------------------------------------------------------------------------------------------------------------+
555 
; Hold Times                                                                                                                                         ;
556 
+-----------------------------+-------------------------------------------+--------+--------+------------+-------------------------------------------+
557 
; Data Port                   ; Clock Port                                ; Rise   ; Fall   ; Clock Edge ; Clock Reference                           ;
558 
+-----------------------------+-------------------------------------------+--------+--------+------------+-------------------------------------------+
559 
; KEY_0                       ; CLOCK_IN                                  ; -2.072 ; -2.072 ; Rise       ; CLOCK_IN                                  ;
560 
; KEY_1                       ; CLOCK_IN                                  ; -2.515 ; -2.515 ; Rise       ; CLOCK_IN                                  ;
561 
; FLASH_MEMORY_DATA_INOUT[*]  ; Flash_Memory_Driver:u4|Flash_Memory_Clock ; -1.817 ; -1.817 ; Fall       ; Flash_Memory_Driver:u4|Flash_Memory_Clock ;
562 
;  FLASH_MEMORY_DATA_INOUT[0] ; Flash_Memory_Driver:u4|Flash_Memory_Clock ; -1.906 ; -1.906 ; Fall       ; Flash_Memory_Driver:u4|Flash_Memory_Clock ;
563 
;  FLASH_MEMORY_DATA_INOUT[1] ; Flash_Memory_Driver:u4|Flash_Memory_Clock ; -1.919 ; -1.919 ; Fall       ; Flash_Memory_Driver:u4|Flash_Memory_Clock ;
564 
;  FLASH_MEMORY_DATA_INOUT[2] ; Flash_Memory_Driver:u4|Flash_Memory_Clock ; -1.829 ; -1.829 ; Fall       ; Flash_Memory_Driver:u4|Flash_Memory_Clock ;
565 
;  FLASH_MEMORY_DATA_INOUT[3] ; Flash_Memory_Driver:u4|Flash_Memory_Clock ; -1.817 ; -1.817 ; Fall       ; Flash_Memory_Driver:u4|Flash_Memory_Clock ;
566 
;  FLASH_MEMORY_DATA_INOUT[4] ; Flash_Memory_Driver:u4|Flash_Memory_Clock ; -1.924 ; -1.924 ; Fall       ; Flash_Memory_Driver:u4|Flash_Memory_Clock ;
567 
;  FLASH_MEMORY_DATA_INOUT[5] ; Flash_Memory_Driver:u4|Flash_Memory_Clock ; -1.836 ; -1.836 ; Fall       ; Flash_Memory_Driver:u4|Flash_Memory_Clock ;
568 
;  FLASH_MEMORY_DATA_INOUT[6] ; Flash_Memory_Driver:u4|Flash_Memory_Clock ; -1.952 ; -1.952 ; Fall       ; Flash_Memory_Driver:u4|Flash_Memory_Clock ;
569 
;  FLASH_MEMORY_DATA_INOUT[7] ; Flash_Memory_Driver:u4|Flash_Memory_Clock ; -1.978 ; -1.978 ; Fall       ; Flash_Memory_Driver:u4|Flash_Memory_Clock ;
570 
+-----------------------------+-------------------------------------------+--------+--------+------------+-------------------------------------------+
571 
 
572 
 
573 
+----------------------------------------------------------------------------------------------------------------------------------------------------+
574 
; Clock to Output Times                                                                                                                              ;
575 
+-------------------------------+-------------------------------------------+-------+-------+------------+-------------------------------------------+
576 
; Data Port                     ; Clock Port                                ; Rise  ; Fall  ; Clock Edge ; Clock Reference                           ;
577 
+-------------------------------+-------------------------------------------+-------+-------+------------+-------------------------------------------+
578 
; I2C_CLOCK_OUT                 ; CLOCK_IN                                  ; 4.600 ; 4.600 ; Rise       ; CLOCK_IN                                  ;
579 
; I2C_DATA_INOUT                ; CLOCK_IN                                  ; 4.753 ; 4.753 ; Rise       ; CLOCK_IN                                  ;
580 
; I2S_CORE_CLOCK_OUT            ; CLOCK_IN                                  ; 4.670 ; 4.670 ; Rise       ; CLOCK_IN                                  ;
581 
; FLASH_MEMORY_ADDRESS_OUT[*]   ; Flash_Memory_Driver:u4|Flash_Memory_Clock ; 4.022 ; 4.022 ; Fall       ; Flash_Memory_Driver:u4|Flash_Memory_Clock ;
582 
;  FLASH_MEMORY_ADDRESS_OUT[0]  ; Flash_Memory_Driver:u4|Flash_Memory_Clock ; 4.022 ; 4.022 ; Fall       ; Flash_Memory_Driver:u4|Flash_Memory_Clock ;
583 
;  FLASH_MEMORY_ADDRESS_OUT[1]  ; Flash_Memory_Driver:u4|Flash_Memory_Clock ; 3.757 ; 3.757 ; Fall       ; Flash_Memory_Driver:u4|Flash_Memory_Clock ;
584 
;  FLASH_MEMORY_ADDRESS_OUT[2]  ; Flash_Memory_Driver:u4|Flash_Memory_Clock ; 3.901 ; 3.901 ; Fall       ; Flash_Memory_Driver:u4|Flash_Memory_Clock ;
585 
;  FLASH_MEMORY_ADDRESS_OUT[3]  ; Flash_Memory_Driver:u4|Flash_Memory_Clock ; 3.893 ; 3.893 ; Fall       ; Flash_Memory_Driver:u4|Flash_Memory_Clock ;
586 
;  FLASH_MEMORY_ADDRESS_OUT[4]  ; Flash_Memory_Driver:u4|Flash_Memory_Clock ; 3.655 ; 3.655 ; Fall       ; Flash_Memory_Driver:u4|Flash_Memory_Clock ;
587 
;  FLASH_MEMORY_ADDRESS_OUT[5]  ; Flash_Memory_Driver:u4|Flash_Memory_Clock ; 3.875 ; 3.875 ; Fall       ; Flash_Memory_Driver:u4|Flash_Memory_Clock ;
588 
;  FLASH_MEMORY_ADDRESS_OUT[6]  ; Flash_Memory_Driver:u4|Flash_Memory_Clock ; 3.861 ; 3.861 ; Fall       ; Flash_Memory_Driver:u4|Flash_Memory_Clock ;
589 
;  FLASH_MEMORY_ADDRESS_OUT[7]  ; Flash_Memory_Driver:u4|Flash_Memory_Clock ; 3.785 ; 3.785 ; Fall       ; Flash_Memory_Driver:u4|Flash_Memory_Clock ;
590 
;  FLASH_MEMORY_ADDRESS_OUT[8]  ; Flash_Memory_Driver:u4|Flash_Memory_Clock ; 3.779 ; 3.779 ; Fall       ; Flash_Memory_Driver:u4|Flash_Memory_Clock ;
591 
;  FLASH_MEMORY_ADDRESS_OUT[9]  ; Flash_Memory_Driver:u4|Flash_Memory_Clock ; 3.851 ; 3.851 ; Fall       ; Flash_Memory_Driver:u4|Flash_Memory_Clock ;
592 
;  FLASH_MEMORY_ADDRESS_OUT[10] ; Flash_Memory_Driver:u4|Flash_Memory_Clock ; 3.740 ; 3.740 ; Fall       ; Flash_Memory_Driver:u4|Flash_Memory_Clock ;
593 
;  FLASH_MEMORY_ADDRESS_OUT[11] ; Flash_Memory_Driver:u4|Flash_Memory_Clock ; 3.823 ; 3.823 ; Fall       ; Flash_Memory_Driver:u4|Flash_Memory_Clock ;
594 
;  FLASH_MEMORY_ADDRESS_OUT[12] ; Flash_Memory_Driver:u4|Flash_Memory_Clock ; 3.763 ; 3.763 ; Fall       ; Flash_Memory_Driver:u4|Flash_Memory_Clock ;
595 
;  FLASH_MEMORY_ADDRESS_OUT[13] ; Flash_Memory_Driver:u4|Flash_Memory_Clock ; 3.855 ; 3.855 ; Fall       ; Flash_Memory_Driver:u4|Flash_Memory_Clock ;
596 
;  FLASH_MEMORY_ADDRESS_OUT[14] ; Flash_Memory_Driver:u4|Flash_Memory_Clock ; 3.780 ; 3.780 ; Fall       ; Flash_Memory_Driver:u4|Flash_Memory_Clock ;
597 
;  FLASH_MEMORY_ADDRESS_OUT[15] ; Flash_Memory_Driver:u4|Flash_Memory_Clock ; 3.871 ; 3.871 ; Fall       ; Flash_Memory_Driver:u4|Flash_Memory_Clock ;
598 
;  FLASH_MEMORY_ADDRESS_OUT[16] ; Flash_Memory_Driver:u4|Flash_Memory_Clock ; 3.850 ; 3.850 ; Fall       ; Flash_Memory_Driver:u4|Flash_Memory_Clock ;
599 
;  FLASH_MEMORY_ADDRESS_OUT[17] ; Flash_Memory_Driver:u4|Flash_Memory_Clock ; 3.879 ; 3.879 ; Fall       ; Flash_Memory_Driver:u4|Flash_Memory_Clock ;
600 
;  FLASH_MEMORY_ADDRESS_OUT[18] ; Flash_Memory_Driver:u4|Flash_Memory_Clock ; 3.705 ; 3.705 ; Fall       ; Flash_Memory_Driver:u4|Flash_Memory_Clock ;
601 
;  FLASH_MEMORY_ADDRESS_OUT[19] ; Flash_Memory_Driver:u4|Flash_Memory_Clock ; 3.623 ; 3.623 ; Fall       ; Flash_Memory_Driver:u4|Flash_Memory_Clock ;
602 
;  FLASH_MEMORY_ADDRESS_OUT[20] ; Flash_Memory_Driver:u4|Flash_Memory_Clock ; 3.742 ; 3.742 ; Fall       ; Flash_Memory_Driver:u4|Flash_Memory_Clock ;
603 
;  FLASH_MEMORY_ADDRESS_OUT[21] ; Flash_Memory_Driver:u4|Flash_Memory_Clock ; 3.559 ; 3.559 ; Fall       ; Flash_Memory_Driver:u4|Flash_Memory_Clock ;
604 
; FLASH_MEMORY_nCE_OUT          ; Flash_Memory_Driver:u4|Flash_Memory_Clock ; 3.761 ; 3.761 ; Fall       ; Flash_Memory_Driver:u4|Flash_Memory_Clock ;
605 
; FLASH_MEMORY_nOE_OUT          ; Flash_Memory_Driver:u4|Flash_Memory_Clock ; 3.758 ; 3.758 ; Fall       ; Flash_Memory_Driver:u4|Flash_Memory_Clock ;
606 
; I2S_CLOCK_OUT                 ; I2S_Driver:u3|I2S_Clock                   ; 2.688 ;       ; Rise       ; I2S_Driver:u3|I2S_Clock                   ;
607 
; I2S_CLOCK_OUT                 ; I2S_Driver:u3|I2S_Clock                   ;       ; 2.688 ; Fall       ; I2S_Driver:u3|I2S_Clock                   ;
608 
; I2S_DATA_INOUT                ; I2S_Driver:u3|I2S_Clock                   ; 4.947 ; 4.947 ; Fall       ; I2S_Driver:u3|I2S_Clock                   ;
609 
; I2S_LEFT_RIGHT_CLOCK_OUT      ; I2S_Driver:u3|I2S_Clock                   ; 5.185 ; 5.185 ; Fall       ; I2S_Driver:u3|I2S_Clock                   ;
610 
+-------------------------------+-------------------------------------------+-------+-------+------------+-------------------------------------------+
611 
 
612 
 
613 
+----------------------------------------------------------------------------------------------------------------------------------------------------+
614 
; Minimum Clock to Output Times                                                                                                                      ;
615 
+-------------------------------+-------------------------------------------+-------+-------+------------+-------------------------------------------+
616 
; Data Port                     ; Clock Port                                ; Rise  ; Fall  ; Clock Edge ; Clock Reference                           ;
617 
+-------------------------------+-------------------------------------------+-------+-------+------------+-------------------------------------------+
618 
; I2C_CLOCK_OUT                 ; CLOCK_IN                                  ; 4.600 ; 4.600 ; Rise       ; CLOCK_IN                                  ;
619 
; I2C_DATA_INOUT                ; CLOCK_IN                                  ; 4.753 ; 4.753 ; Rise       ; CLOCK_IN                                  ;
620 
; I2S_CORE_CLOCK_OUT            ; CLOCK_IN                                  ; 4.670 ; 4.670 ; Rise       ; CLOCK_IN                                  ;
621 
; FLASH_MEMORY_ADDRESS_OUT[*]   ; Flash_Memory_Driver:u4|Flash_Memory_Clock ; 3.559 ; 3.559 ; Fall       ; Flash_Memory_Driver:u4|Flash_Memory_Clock ;
622 
;  FLASH_MEMORY_ADDRESS_OUT[0]  ; Flash_Memory_Driver:u4|Flash_Memory_Clock ; 4.022 ; 4.022 ; Fall       ; Flash_Memory_Driver:u4|Flash_Memory_Clock ;
623 
;  FLASH_MEMORY_ADDRESS_OUT[1]  ; Flash_Memory_Driver:u4|Flash_Memory_Clock ; 3.757 ; 3.757 ; Fall       ; Flash_Memory_Driver:u4|Flash_Memory_Clock ;
624 
;  FLASH_MEMORY_ADDRESS_OUT[2]  ; Flash_Memory_Driver:u4|Flash_Memory_Clock ; 3.901 ; 3.901 ; Fall       ; Flash_Memory_Driver:u4|Flash_Memory_Clock ;
625 
;  FLASH_MEMORY_ADDRESS_OUT[3]  ; Flash_Memory_Driver:u4|Flash_Memory_Clock ; 3.893 ; 3.893 ; Fall       ; Flash_Memory_Driver:u4|Flash_Memory_Clock ;
626 
;  FLASH_MEMORY_ADDRESS_OUT[4]  ; Flash_Memory_Driver:u4|Flash_Memory_Clock ; 3.655 ; 3.655 ; Fall       ; Flash_Memory_Driver:u4|Flash_Memory_Clock ;
627 
;  FLASH_MEMORY_ADDRESS_OUT[5]  ; Flash_Memory_Driver:u4|Flash_Memory_Clock ; 3.875 ; 3.875 ; Fall       ; Flash_Memory_Driver:u4|Flash_Memory_Clock ;
628 
;  FLASH_MEMORY_ADDRESS_OUT[6]  ; Flash_Memory_Driver:u4|Flash_Memory_Clock ; 3.861 ; 3.861 ; Fall       ; Flash_Memory_Driver:u4|Flash_Memory_Clock ;
629 
;  FLASH_MEMORY_ADDRESS_OUT[7]  ; Flash_Memory_Driver:u4|Flash_Memory_Clock ; 3.785 ; 3.785 ; Fall       ; Flash_Memory_Driver:u4|Flash_Memory_Clock ;
630 
;  FLASH_MEMORY_ADDRESS_OUT[8]  ; Flash_Memory_Driver:u4|Flash_Memory_Clock ; 3.779 ; 3.779 ; Fall       ; Flash_Memory_Driver:u4|Flash_Memory_Clock ;
631 
;  FLASH_MEMORY_ADDRESS_OUT[9]  ; Flash_Memory_Driver:u4|Flash_Memory_Clock ; 3.851 ; 3.851 ; Fall       ; Flash_Memory_Driver:u4|Flash_Memory_Clock ;
632 
;  FLASH_MEMORY_ADDRESS_OUT[10] ; Flash_Memory_Driver:u4|Flash_Memory_Clock ; 3.740 ; 3.740 ; Fall       ; Flash_Memory_Driver:u4|Flash_Memory_Clock ;
633 
;  FLASH_MEMORY_ADDRESS_OUT[11] ; Flash_Memory_Driver:u4|Flash_Memory_Clock ; 3.823 ; 3.823 ; Fall       ; Flash_Memory_Driver:u4|Flash_Memory_Clock ;
634 
;  FLASH_MEMORY_ADDRESS_OUT[12] ; Flash_Memory_Driver:u4|Flash_Memory_Clock ; 3.763 ; 3.763 ; Fall       ; Flash_Memory_Driver:u4|Flash_Memory_Clock ;
635 
;  FLASH_MEMORY_ADDRESS_OUT[13] ; Flash_Memory_Driver:u4|Flash_Memory_Clock ; 3.855 ; 3.855 ; Fall       ; Flash_Memory_Driver:u4|Flash_Memory_Clock ;
636 
;  FLASH_MEMORY_ADDRESS_OUT[14] ; Flash_Memory_Driver:u4|Flash_Memory_Clock ; 3.780 ; 3.780 ; Fall       ; Flash_Memory_Driver:u4|Flash_Memory_Clock ;
637 
;  FLASH_MEMORY_ADDRESS_OUT[15] ; Flash_Memory_Driver:u4|Flash_Memory_Clock ; 3.871 ; 3.871 ; Fall       ; Flash_Memory_Driver:u4|Flash_Memory_Clock ;
638 
;  FLASH_MEMORY_ADDRESS_OUT[16] ; Flash_Memory_Driver:u4|Flash_Memory_Clock ; 3.850 ; 3.850 ; Fall       ; Flash_Memory_Driver:u4|Flash_Memory_Clock ;
639 
;  FLASH_MEMORY_ADDRESS_OUT[17] ; Flash_Memory_Driver:u4|Flash_Memory_Clock ; 3.879 ; 3.879 ; Fall       ; Flash_Memory_Driver:u4|Flash_Memory_Clock ;
640 
;  FLASH_MEMORY_ADDRESS_OUT[18] ; Flash_Memory_Driver:u4|Flash_Memory_Clock ; 3.705 ; 3.705 ; Fall       ; Flash_Memory_Driver:u4|Flash_Memory_Clock ;
641 
;  FLASH_MEMORY_ADDRESS_OUT[19] ; Flash_Memory_Driver:u4|Flash_Memory_Clock ; 3.623 ; 3.623 ; Fall       ; Flash_Memory_Driver:u4|Flash_Memory_Clock ;
642 
;  FLASH_MEMORY_ADDRESS_OUT[20] ; Flash_Memory_Driver:u4|Flash_Memory_Clock ; 3.742 ; 3.742 ; Fall       ; Flash_Memory_Driver:u4|Flash_Memory_Clock ;
643 
;  FLASH_MEMORY_ADDRESS_OUT[21] ; Flash_Memory_Driver:u4|Flash_Memory_Clock ; 3.559 ; 3.559 ; Fall       ; Flash_Memory_Driver:u4|Flash_Memory_Clock ;
644 
; FLASH_MEMORY_nCE_OUT          ; Flash_Memory_Driver:u4|Flash_Memory_Clock ; 3.761 ; 3.761 ; Fall       ; Flash_Memory_Driver:u4|Flash_Memory_Clock ;
645 
; FLASH_MEMORY_nOE_OUT          ; Flash_Memory_Driver:u4|Flash_Memory_Clock ; 3.758 ; 3.758 ; Fall       ; Flash_Memory_Driver:u4|Flash_Memory_Clock ;
646 
; I2S_CLOCK_OUT                 ; I2S_Driver:u3|I2S_Clock                   ; 2.688 ;       ; Rise       ; I2S_Driver:u3|I2S_Clock                   ;
647 
; I2S_CLOCK_OUT                 ; I2S_Driver:u3|I2S_Clock                   ;       ; 2.688 ; Fall       ; I2S_Driver:u3|I2S_Clock                   ;
648 
; I2S_DATA_INOUT                ; I2S_Driver:u3|I2S_Clock                   ; 4.947 ; 4.947 ; Fall       ; I2S_Driver:u3|I2S_Clock                   ;
649 
; I2S_LEFT_RIGHT_CLOCK_OUT      ; I2S_Driver:u3|I2S_Clock                   ; 5.185 ; 5.185 ; Fall       ; I2S_Driver:u3|I2S_Clock                   ;
650 
+-------------------------------+-------------------------------------------+-------+-------+------------+-------------------------------------------+
651 
 
652 
 
653 
+------------------------------------------------------------------------------------------------------------+
654 
; Multicorner Timing Analysis Summary                                                                        ;
655 
+--------------------------------------------+-----------+--------+----------+---------+---------------------+
656 
; Clock                                      ; Setup     ; Hold   ; Recovery ; Removal ; Minimum Pulse Width ;
657 
+--------------------------------------------+-----------+--------+----------+---------+---------------------+
658 
; Worst-case Slack                           ; -51.180   ; -2.666 ; 0.0      ; -0.041  ; -1.631              ;
659 
;  CLOCK_IN                                  ; -51.180   ; -2.666 ; N/A      ; N/A     ; -1.631              ;
660 
;  Flash_Memory_Driver:u4|Flash_Memory_Clock ; -1.891    ; 0.215  ; N/A      ; N/A     ; N/A                 ;
661 
;  I2S_ACTIVE_IN                             ; N/A       ; N/A    ; 0.293    ; -0.041  ; N/A                 ;
662 
;  I2S_Driver:u3|I2S_Clock                   ; -3.147    ; 0.215  ; N/A      ; N/A     ; N/A                 ;
663 
;  I2S_Driver:u3|I2S_PCM_DATA_ACCESS_OUT     ; -2.478    ; 0.215  ; N/A      ; N/A     ; -0.611              ;
664 
; Design-wide TNS                            ; -2401.614 ; -7.994 ; 0.0      ; -0.041  ; N/A                 ;
665 
;  CLOCK_IN                                  ; -2303.828 ; -7.994 ; N/A      ; N/A     ; N/A                 ;
666 
;  Flash_Memory_Driver:u4|Flash_Memory_Clock ; -47.530   ; 0.000  ; N/A      ; N/A     ; N/A                 ;
667 
;  I2S_ACTIVE_IN                             ; N/A       ; N/A    ; 0.000    ; -0.041  ; N/A                 ;
668 
;  I2S_Driver:u3|I2S_Clock                   ; -12.329   ; 0.000  ; N/A      ; N/A     ; N/A                 ;
669 
;  I2S_Driver:u3|I2S_PCM_DATA_ACCESS_OUT     ; -37.927   ; 0.000  ; N/A      ; N/A     ; N/A                 ;
670 
+--------------------------------------------+-----------+--------+----------+---------+---------------------+
671 
 
672 
 
673 
+--------------------------------------------------------------------------------------------------------------------------------------------------+
674 
; Setup Times                                                                                                                                      ;
675 
+-----------------------------+-------------------------------------------+-------+-------+------------+-------------------------------------------+
676 
; Data Port                   ; Clock Port                                ; Rise  ; Fall  ; Clock Edge ; Clock Reference                           ;
677 
+-----------------------------+-------------------------------------------+-------+-------+------------+-------------------------------------------+
678 
; KEY_0                       ; CLOCK_IN                                  ; 7.587 ; 7.587 ; Rise       ; CLOCK_IN                                  ;
679 
; KEY_1                       ; CLOCK_IN                                  ; 5.754 ; 5.754 ; Rise       ; CLOCK_IN                                  ;
680 
; FLASH_MEMORY_DATA_INOUT[*]  ; Flash_Memory_Driver:u4|Flash_Memory_Clock ; 4.447 ; 4.447 ; Fall       ; Flash_Memory_Driver:u4|Flash_Memory_Clock ;
681 
;  FLASH_MEMORY_DATA_INOUT[0] ; Flash_Memory_Driver:u4|Flash_Memory_Clock ; 4.258 ; 4.258 ; Fall       ; Flash_Memory_Driver:u4|Flash_Memory_Clock ;
682 
;  FLASH_MEMORY_DATA_INOUT[1] ; Flash_Memory_Driver:u4|Flash_Memory_Clock ; 4.277 ; 4.277 ; Fall       ; Flash_Memory_Driver:u4|Flash_Memory_Clock ;
683 
;  FLASH_MEMORY_DATA_INOUT[2] ; Flash_Memory_Driver:u4|Flash_Memory_Clock ; 4.133 ; 4.133 ; Fall       ; Flash_Memory_Driver:u4|Flash_Memory_Clock ;
684 
;  FLASH_MEMORY_DATA_INOUT[3] ; Flash_Memory_Driver:u4|Flash_Memory_Clock ; 4.111 ; 4.111 ; Fall       ; Flash_Memory_Driver:u4|Flash_Memory_Clock ;
685 
;  FLASH_MEMORY_DATA_INOUT[4] ; Flash_Memory_Driver:u4|Flash_Memory_Clock ; 4.287 ; 4.287 ; Fall       ; Flash_Memory_Driver:u4|Flash_Memory_Clock ;
686 
;  FLASH_MEMORY_DATA_INOUT[5] ; Flash_Memory_Driver:u4|Flash_Memory_Clock ; 4.142 ; 4.142 ; Fall       ; Flash_Memory_Driver:u4|Flash_Memory_Clock ;
687 
;  FLASH_MEMORY_DATA_INOUT[6] ; Flash_Memory_Driver:u4|Flash_Memory_Clock ; 4.440 ; 4.440 ; Fall       ; Flash_Memory_Driver:u4|Flash_Memory_Clock ;
688 
;  FLASH_MEMORY_DATA_INOUT[7] ; Flash_Memory_Driver:u4|Flash_Memory_Clock ; 4.447 ; 4.447 ; Fall       ; Flash_Memory_Driver:u4|Flash_Memory_Clock ;
689 
+-----------------------------+-------------------------------------------+-------+-------+------------+-------------------------------------------+
690 
 
691 
 
692 
+----------------------------------------------------------------------------------------------------------------------------------------------------+
693 
; Hold Times                                                                                                                                         ;
694 
+-----------------------------+-------------------------------------------+--------+--------+------------+-------------------------------------------+
695 
; Data Port                   ; Clock Port                                ; Rise   ; Fall   ; Clock Edge ; Clock Reference                           ;
696 
+-----------------------------+-------------------------------------------+--------+--------+------------+-------------------------------------------+
697 
; KEY_0                       ; CLOCK_IN                                  ; -2.072 ; -2.072 ; Rise       ; CLOCK_IN                                  ;
698 
; KEY_1                       ; CLOCK_IN                                  ; -2.515 ; -2.515 ; Rise       ; CLOCK_IN                                  ;
699 
; FLASH_MEMORY_DATA_INOUT[*]  ; Flash_Memory_Driver:u4|Flash_Memory_Clock ; -1.817 ; -1.817 ; Fall       ; Flash_Memory_Driver:u4|Flash_Memory_Clock ;
700 
;  FLASH_MEMORY_DATA_INOUT[0] ; Flash_Memory_Driver:u4|Flash_Memory_Clock ; -1.906 ; -1.906 ; Fall       ; Flash_Memory_Driver:u4|Flash_Memory_Clock ;
701 
;  FLASH_MEMORY_DATA_INOUT[1] ; Flash_Memory_Driver:u4|Flash_Memory_Clock ; -1.919 ; -1.919 ; Fall       ; Flash_Memory_Driver:u4|Flash_Memory_Clock ;
702 
;  FLASH_MEMORY_DATA_INOUT[2] ; Flash_Memory_Driver:u4|Flash_Memory_Clock ; -1.829 ; -1.829 ; Fall       ; Flash_Memory_Driver:u4|Flash_Memory_Clock ;
703 
;  FLASH_MEMORY_DATA_INOUT[3] ; Flash_Memory_Driver:u4|Flash_Memory_Clock ; -1.817 ; -1.817 ; Fall       ; Flash_Memory_Driver:u4|Flash_Memory_Clock ;
704 
;  FLASH_MEMORY_DATA_INOUT[4] ; Flash_Memory_Driver:u4|Flash_Memory_Clock ; -1.924 ; -1.924 ; Fall       ; Flash_Memory_Driver:u4|Flash_Memory_Clock ;
705 
;  FLASH_MEMORY_DATA_INOUT[5] ; Flash_Memory_Driver:u4|Flash_Memory_Clock ; -1.836 ; -1.836 ; Fall       ; Flash_Memory_Driver:u4|Flash_Memory_Clock ;
706 
;  FLASH_MEMORY_DATA_INOUT[6] ; Flash_Memory_Driver:u4|Flash_Memory_Clock ; -1.952 ; -1.952 ; Fall       ; Flash_Memory_Driver:u4|Flash_Memory_Clock ;
707 
;  FLASH_MEMORY_DATA_INOUT[7] ; Flash_Memory_Driver:u4|Flash_Memory_Clock ; -1.978 ; -1.978 ; Fall       ; Flash_Memory_Driver:u4|Flash_Memory_Clock ;
708 
+-----------------------------+-------------------------------------------+--------+--------+------------+-------------------------------------------+
709 
 
710 
 
711 
+------------------------------------------------------------------------------------------------------------------------------------------------------+
712 
; Clock to Output Times                                                                                                                                ;
713 
+-------------------------------+-------------------------------------------+--------+--------+------------+-------------------------------------------+
714 
; Data Port                     ; Clock Port                                ; Rise   ; Fall   ; Clock Edge ; Clock Reference                           ;
715 
+-------------------------------+-------------------------------------------+--------+--------+------------+-------------------------------------------+
716 
; I2C_CLOCK_OUT                 ; CLOCK_IN                                  ; 8.993  ; 8.993  ; Rise       ; CLOCK_IN                                  ;
717 
; I2C_DATA_INOUT                ; CLOCK_IN                                  ; 9.349  ; 9.349  ; Rise       ; CLOCK_IN                                  ;
718 
; I2S_CORE_CLOCK_OUT            ; CLOCK_IN                                  ; 9.120  ; 9.120  ; Rise       ; CLOCK_IN                                  ;
719 
; FLASH_MEMORY_ADDRESS_OUT[*]   ; Flash_Memory_Driver:u4|Flash_Memory_Clock ; 7.760  ; 7.760  ; Fall       ; Flash_Memory_Driver:u4|Flash_Memory_Clock ;
720 
;  FLASH_MEMORY_ADDRESS_OUT[0]  ; Flash_Memory_Driver:u4|Flash_Memory_Clock ; 7.760  ; 7.760  ; Fall       ; Flash_Memory_Driver:u4|Flash_Memory_Clock ;
721 
;  FLASH_MEMORY_ADDRESS_OUT[1]  ; Flash_Memory_Driver:u4|Flash_Memory_Clock ; 7.111  ; 7.111  ; Fall       ; Flash_Memory_Driver:u4|Flash_Memory_Clock ;
722 
;  FLASH_MEMORY_ADDRESS_OUT[2]  ; Flash_Memory_Driver:u4|Flash_Memory_Clock ; 7.465  ; 7.465  ; Fall       ; Flash_Memory_Driver:u4|Flash_Memory_Clock ;
723 
;  FLASH_MEMORY_ADDRESS_OUT[3]  ; Flash_Memory_Driver:u4|Flash_Memory_Clock ; 7.448  ; 7.448  ; Fall       ; Flash_Memory_Driver:u4|Flash_Memory_Clock ;
724 
;  FLASH_MEMORY_ADDRESS_OUT[4]  ; Flash_Memory_Driver:u4|Flash_Memory_Clock ; 6.840  ; 6.840  ; Fall       ; Flash_Memory_Driver:u4|Flash_Memory_Clock ;
725 
;  FLASH_MEMORY_ADDRESS_OUT[5]  ; Flash_Memory_Driver:u4|Flash_Memory_Clock ; 7.418  ; 7.418  ; Fall       ; Flash_Memory_Driver:u4|Flash_Memory_Clock ;
726 
;  FLASH_MEMORY_ADDRESS_OUT[6]  ; Flash_Memory_Driver:u4|Flash_Memory_Clock ; 7.400  ; 7.400  ; Fall       ; Flash_Memory_Driver:u4|Flash_Memory_Clock ;
727 
;  FLASH_MEMORY_ADDRESS_OUT[7]  ; Flash_Memory_Driver:u4|Flash_Memory_Clock ; 7.182  ; 7.182  ; Fall       ; Flash_Memory_Driver:u4|Flash_Memory_Clock ;
728 
;  FLASH_MEMORY_ADDRESS_OUT[8]  ; Flash_Memory_Driver:u4|Flash_Memory_Clock ; 7.148  ; 7.148  ; Fall       ; Flash_Memory_Driver:u4|Flash_Memory_Clock ;
729 
;  FLASH_MEMORY_ADDRESS_OUT[9]  ; Flash_Memory_Driver:u4|Flash_Memory_Clock ; 7.387  ; 7.387  ; Fall       ; Flash_Memory_Driver:u4|Flash_Memory_Clock ;
730 
;  FLASH_MEMORY_ADDRESS_OUT[10] ; Flash_Memory_Driver:u4|Flash_Memory_Clock ; 7.099  ; 7.099  ; Fall       ; Flash_Memory_Driver:u4|Flash_Memory_Clock ;
731 
;  FLASH_MEMORY_ADDRESS_OUT[11] ; Flash_Memory_Driver:u4|Flash_Memory_Clock ; 7.349  ; 7.349  ; Fall       ; Flash_Memory_Driver:u4|Flash_Memory_Clock ;
732 
;  FLASH_MEMORY_ADDRESS_OUT[12] ; Flash_Memory_Driver:u4|Flash_Memory_Clock ; 7.111  ; 7.111  ; Fall       ; Flash_Memory_Driver:u4|Flash_Memory_Clock ;
733 
;  FLASH_MEMORY_ADDRESS_OUT[13] ; Flash_Memory_Driver:u4|Flash_Memory_Clock ; 7.379  ; 7.379  ; Fall       ; Flash_Memory_Driver:u4|Flash_Memory_Clock ;
734 
;  FLASH_MEMORY_ADDRESS_OUT[14] ; Flash_Memory_Driver:u4|Flash_Memory_Clock ; 7.137  ; 7.137  ; Fall       ; Flash_Memory_Driver:u4|Flash_Memory_Clock ;
735 
;  FLASH_MEMORY_ADDRESS_OUT[15] ; Flash_Memory_Driver:u4|Flash_Memory_Clock ; 7.396  ; 7.396  ; Fall       ; Flash_Memory_Driver:u4|Flash_Memory_Clock ;
736 
;  FLASH_MEMORY_ADDRESS_OUT[16] ; Flash_Memory_Driver:u4|Flash_Memory_Clock ; 7.372  ; 7.372  ; Fall       ; Flash_Memory_Driver:u4|Flash_Memory_Clock ;
737 
;  FLASH_MEMORY_ADDRESS_OUT[17] ; Flash_Memory_Driver:u4|Flash_Memory_Clock ; 7.398  ; 7.398  ; Fall       ; Flash_Memory_Driver:u4|Flash_Memory_Clock ;
738 
;  FLASH_MEMORY_ADDRESS_OUT[18] ; Flash_Memory_Driver:u4|Flash_Memory_Clock ; 6.925  ; 6.925  ; Fall       ; Flash_Memory_Driver:u4|Flash_Memory_Clock ;
739 
;  FLASH_MEMORY_ADDRESS_OUT[19] ; Flash_Memory_Driver:u4|Flash_Memory_Clock ; 6.803  ; 6.803  ; Fall       ; Flash_Memory_Driver:u4|Flash_Memory_Clock ;
740 
;  FLASH_MEMORY_ADDRESS_OUT[20] ; Flash_Memory_Driver:u4|Flash_Memory_Clock ; 7.086  ; 7.086  ; Fall       ; Flash_Memory_Driver:u4|Flash_Memory_Clock ;
741 
;  FLASH_MEMORY_ADDRESS_OUT[21] ; Flash_Memory_Driver:u4|Flash_Memory_Clock ; 6.561  ; 6.561  ; Fall       ; Flash_Memory_Driver:u4|Flash_Memory_Clock ;
742 
; FLASH_MEMORY_nCE_OUT          ; Flash_Memory_Driver:u4|Flash_Memory_Clock ; 7.108  ; 7.108  ; Fall       ; Flash_Memory_Driver:u4|Flash_Memory_Clock ;
743 
; FLASH_MEMORY_nOE_OUT          ; Flash_Memory_Driver:u4|Flash_Memory_Clock ; 7.103  ; 7.103  ; Fall       ; Flash_Memory_Driver:u4|Flash_Memory_Clock ;
744 
; I2S_CLOCK_OUT                 ; I2S_Driver:u3|I2S_Clock                   ; 5.887  ;        ; Rise       ; I2S_Driver:u3|I2S_Clock                   ;
745 
; I2S_CLOCK_OUT                 ; I2S_Driver:u3|I2S_Clock                   ;        ; 5.887  ; Fall       ; I2S_Driver:u3|I2S_Clock                   ;
746 
; I2S_DATA_INOUT                ; I2S_Driver:u3|I2S_Clock                   ; 9.982  ; 9.982  ; Fall       ; I2S_Driver:u3|I2S_Clock                   ;
747 
; I2S_LEFT_RIGHT_CLOCK_OUT      ; I2S_Driver:u3|I2S_Clock                   ; 10.667 ; 10.667 ; Fall       ; I2S_Driver:u3|I2S_Clock                   ;
748 
+-------------------------------+-------------------------------------------+--------+--------+------------+-------------------------------------------+
749 
 
750 
 
751 
+----------------------------------------------------------------------------------------------------------------------------------------------------+
752 
; Minimum Clock to Output Times                                                                                                                      ;
753 
+-------------------------------+-------------------------------------------+-------+-------+------------+-------------------------------------------+
754 
; Data Port                     ; Clock Port                                ; Rise  ; Fall  ; Clock Edge ; Clock Reference                           ;
755 
+-------------------------------+-------------------------------------------+-------+-------+------------+-------------------------------------------+
756 
; I2C_CLOCK_OUT                 ; CLOCK_IN                                  ; 4.600 ; 4.600 ; Rise       ; CLOCK_IN                                  ;
757 
; I2C_DATA_INOUT                ; CLOCK_IN                                  ; 4.753 ; 4.753 ; Rise       ; CLOCK_IN                                  ;
758 
; I2S_CORE_CLOCK_OUT            ; CLOCK_IN                                  ; 4.670 ; 4.670 ; Rise       ; CLOCK_IN                                  ;
759 
; FLASH_MEMORY_ADDRESS_OUT[*]   ; Flash_Memory_Driver:u4|Flash_Memory_Clock ; 3.559 ; 3.559 ; Fall       ; Flash_Memory_Driver:u4|Flash_Memory_Clock ;
760 
;  FLASH_MEMORY_ADDRESS_OUT[0]  ; Flash_Memory_Driver:u4|Flash_Memory_Clock ; 4.022 ; 4.022 ; Fall       ; Flash_Memory_Driver:u4|Flash_Memory_Clock ;
761 
;  FLASH_MEMORY_ADDRESS_OUT[1]  ; Flash_Memory_Driver:u4|Flash_Memory_Clock ; 3.757 ; 3.757 ; Fall       ; Flash_Memory_Driver:u4|Flash_Memory_Clock ;
762 
;  FLASH_MEMORY_ADDRESS_OUT[2]  ; Flash_Memory_Driver:u4|Flash_Memory_Clock ; 3.901 ; 3.901 ; Fall       ; Flash_Memory_Driver:u4|Flash_Memory_Clock ;
763 
;  FLASH_MEMORY_ADDRESS_OUT[3]  ; Flash_Memory_Driver:u4|Flash_Memory_Clock ; 3.893 ; 3.893 ; Fall       ; Flash_Memory_Driver:u4|Flash_Memory_Clock ;
764 
;  FLASH_MEMORY_ADDRESS_OUT[4]  ; Flash_Memory_Driver:u4|Flash_Memory_Clock ; 3.655 ; 3.655 ; Fall       ; Flash_Memory_Driver:u4|Flash_Memory_Clock ;
765 
;  FLASH_MEMORY_ADDRESS_OUT[5]  ; Flash_Memory_Driver:u4|Flash_Memory_Clock ; 3.875 ; 3.875 ; Fall       ; Flash_Memory_Driver:u4|Flash_Memory_Clock ;
766 
;  FLASH_MEMORY_ADDRESS_OUT[6]  ; Flash_Memory_Driver:u4|Flash_Memory_Clock ; 3.861 ; 3.861 ; Fall       ; Flash_Memory_Driver:u4|Flash_Memory_Clock ;
767 
;  FLASH_MEMORY_ADDRESS_OUT[7]  ; Flash_Memory_Driver:u4|Flash_Memory_Clock ; 3.785 ; 3.785 ; Fall       ; Flash_Memory_Driver:u4|Flash_Memory_Clock ;
768 
;  FLASH_MEMORY_ADDRESS_OUT[8]  ; Flash_Memory_Driver:u4|Flash_Memory_Clock ; 3.779 ; 3.779 ; Fall       ; Flash_Memory_Driver:u4|Flash_Memory_Clock ;
769 
;  FLASH_MEMORY_ADDRESS_OUT[9]  ; Flash_Memory_Driver:u4|Flash_Memory_Clock ; 3.851 ; 3.851 ; Fall       ; Flash_Memory_Driver:u4|Flash_Memory_Clock ;
770 
;  FLASH_MEMORY_ADDRESS_OUT[10] ; Flash_Memory_Driver:u4|Flash_Memory_Clock ; 3.740 ; 3.740 ; Fall       ; Flash_Memory_Driver:u4|Flash_Memory_Clock ;
771 
;  FLASH_MEMORY_ADDRESS_OUT[11] ; Flash_Memory_Driver:u4|Flash_Memory_Clock ; 3.823 ; 3.823 ; Fall       ; Flash_Memory_Driver:u4|Flash_Memory_Clock ;
772 
;  FLASH_MEMORY_ADDRESS_OUT[12] ; Flash_Memory_Driver:u4|Flash_Memory_Clock ; 3.763 ; 3.763 ; Fall       ; Flash_Memory_Driver:u4|Flash_Memory_Clock ;
773 
;  FLASH_MEMORY_ADDRESS_OUT[13] ; Flash_Memory_Driver:u4|Flash_Memory_Clock ; 3.855 ; 3.855 ; Fall       ; Flash_Memory_Driver:u4|Flash_Memory_Clock ;
774 
;  FLASH_MEMORY_ADDRESS_OUT[14] ; Flash_Memory_Driver:u4|Flash_Memory_Clock ; 3.780 ; 3.780 ; Fall       ; Flash_Memory_Driver:u4|Flash_Memory_Clock ;
775 
;  FLASH_MEMORY_ADDRESS_OUT[15] ; Flash_Memory_Driver:u4|Flash_Memory_Clock ; 3.871 ; 3.871 ; Fall       ; Flash_Memory_Driver:u4|Flash_Memory_Clock ;
776 
;  FLASH_MEMORY_ADDRESS_OUT[16] ; Flash_Memory_Driver:u4|Flash_Memory_Clock ; 3.850 ; 3.850 ; Fall       ; Flash_Memory_Driver:u4|Flash_Memory_Clock ;
777 
;  FLASH_MEMORY_ADDRESS_OUT[17] ; Flash_Memory_Driver:u4|Flash_Memory_Clock ; 3.879 ; 3.879 ; Fall       ; Flash_Memory_Driver:u4|Flash_Memory_Clock ;
778 
;  FLASH_MEMORY_ADDRESS_OUT[18] ; Flash_Memory_Driver:u4|Flash_Memory_Clock ; 3.705 ; 3.705 ; Fall       ; Flash_Memory_Driver:u4|Flash_Memory_Clock ;
779 
;  FLASH_MEMORY_ADDRESS_OUT[19] ; Flash_Memory_Driver:u4|Flash_Memory_Clock ; 3.623 ; 3.623 ; Fall       ; Flash_Memory_Driver:u4|Flash_Memory_Clock ;
780 
;  FLASH_MEMORY_ADDRESS_OUT[20] ; Flash_Memory_Driver:u4|Flash_Memory_Clock ; 3.742 ; 3.742 ; Fall       ; Flash_Memory_Driver:u4|Flash_Memory_Clock ;
781 
;  FLASH_MEMORY_ADDRESS_OUT[21] ; Flash_Memory_Driver:u4|Flash_Memory_Clock ; 3.559 ; 3.559 ; Fall       ; Flash_Memory_Driver:u4|Flash_Memory_Clock ;
782 
; FLASH_MEMORY_nCE_OUT          ; Flash_Memory_Driver:u4|Flash_Memory_Clock ; 3.761 ; 3.761 ; Fall       ; Flash_Memory_Driver:u4|Flash_Memory_Clock ;
783 
; FLASH_MEMORY_nOE_OUT          ; Flash_Memory_Driver:u4|Flash_Memory_Clock ; 3.758 ; 3.758 ; Fall       ; Flash_Memory_Driver:u4|Flash_Memory_Clock ;
784 
; I2S_CLOCK_OUT                 ; I2S_Driver:u3|I2S_Clock                   ; 2.688 ;       ; Rise       ; I2S_Driver:u3|I2S_Clock                   ;
785 
; I2S_CLOCK_OUT                 ; I2S_Driver:u3|I2S_Clock                   ;       ; 2.688 ; Fall       ; I2S_Driver:u3|I2S_Clock                   ;
786 
; I2S_DATA_INOUT                ; I2S_Driver:u3|I2S_Clock                   ; 4.947 ; 4.947 ; Fall       ; I2S_Driver:u3|I2S_Clock                   ;
787 
; I2S_LEFT_RIGHT_CLOCK_OUT      ; I2S_Driver:u3|I2S_Clock                   ; 5.185 ; 5.185 ; Fall       ; I2S_Driver:u3|I2S_Clock                   ;
788 
+-------------------------------+-------------------------------------------+-------+-------+------------+-------------------------------------------+
789 
 
790 
 
791 
+---------------------------------------------------------------------------------------------------------------------------------------+
792 
; Setup Transfers                                                                                                                       ;
793 
+-------------------------------------------+-------------------------------------------+--------------+----------+----------+----------+
794 
; From Clock                                ; To Clock                                  ; RR Paths     ; FR Paths ; RF Paths ; FF Paths ;
795 
+-------------------------------------------+-------------------------------------------+--------------+----------+----------+----------+
796 
; CLOCK_IN                                  ; CLOCK_IN                                  ; > 2147483647 ; 0        ; 0        ; 0        ;
797 
; Flash_Memory_Driver:u4|Flash_Memory_Clock ; CLOCK_IN                                  ; 1            ; 1        ; 0        ; 0        ;
798 
; I2S_ACTIVE_IN                             ; CLOCK_IN                                  ; 2            ; 1        ; 0        ; 0        ;
799 
; I2S_Driver:u3|I2S_Clock                   ; CLOCK_IN                                  ; 1            ; 1        ; 0        ; 0        ;
800 
; I2S_Driver:u3|I2S_PCM_DATA_ACCESS_OUT     ; CLOCK_IN                                  ; 256          ; 0        ; 0        ; 0        ;
801 
; Flash_Memory_Driver:u4|Flash_Memory_Clock ; Flash_Memory_Driver:u4|Flash_Memory_Clock ; 0            ; 0        ; 0        ; 97       ;
802 
; I2S_Driver:u3|I2S_PCM_DATA_ACCESS_OUT     ; Flash_Memory_Driver:u4|Flash_Memory_Clock ; 0            ; 0        ; 22       ; 0        ;
803 
; CLOCK_IN                                  ; I2S_Driver:u3|I2S_Clock                   ; 0            ; 0        ; 32       ; 0        ;
804 
; I2S_Driver:u3|I2S_Clock                   ; I2S_Driver:u3|I2S_Clock                   ; 0            ; 0        ; 0        ; 92       ;
805 
; Flash_Memory_Driver:u4|Flash_Memory_Clock ; I2S_Driver:u3|I2S_PCM_DATA_ACCESS_OUT     ; 0            ; 8        ; 0        ; 0        ;
806 
; I2S_Driver:u3|I2S_PCM_DATA_ACCESS_OUT     ; I2S_Driver:u3|I2S_PCM_DATA_ACCESS_OUT     ; 307          ; 0        ; 0        ; 0        ;
807 
+-------------------------------------------+-------------------------------------------+--------------+----------+----------+----------+
808 
Entries labeled "false path" only account for clock-to-clock false paths and not path-based false paths. As a result, actual path counts may be lower than reported.
809 
 
810 
 
811 
+---------------------------------------------------------------------------------------------------------------------------------------+
812 
; Hold Transfers                                                                                                                        ;
813 
+-------------------------------------------+-------------------------------------------+--------------+----------+----------+----------+
814 
; From Clock                                ; To Clock                                  ; RR Paths     ; FR Paths ; RF Paths ; FF Paths ;
815 
+-------------------------------------------+-------------------------------------------+--------------+----------+----------+----------+
816 
; CLOCK_IN                                  ; CLOCK_IN                                  ; > 2147483647 ; 0        ; 0        ; 0        ;
817 
; Flash_Memory_Driver:u4|Flash_Memory_Clock ; CLOCK_IN                                  ; 1            ; 1        ; 0        ; 0        ;
818 
; I2S_ACTIVE_IN                             ; CLOCK_IN                                  ; 2            ; 1        ; 0        ; 0        ;
819 
; I2S_Driver:u3|I2S_Clock                   ; CLOCK_IN                                  ; 1            ; 1        ; 0        ; 0        ;
820 
; I2S_Driver:u3|I2S_PCM_DATA_ACCESS_OUT     ; CLOCK_IN                                  ; 256          ; 0        ; 0        ; 0        ;
821 
; Flash_Memory_Driver:u4|Flash_Memory_Clock ; Flash_Memory_Driver:u4|Flash_Memory_Clock ; 0            ; 0        ; 0        ; 97       ;
822 
; I2S_Driver:u3|I2S_PCM_DATA_ACCESS_OUT     ; Flash_Memory_Driver:u4|Flash_Memory_Clock ; 0            ; 0        ; 22       ; 0        ;
823 
; CLOCK_IN                                  ; I2S_Driver:u3|I2S_Clock                   ; 0            ; 0        ; 32       ; 0        ;
824 
; I2S_Driver:u3|I2S_Clock                   ; I2S_Driver:u3|I2S_Clock                   ; 0            ; 0        ; 0        ; 92       ;
825 
; Flash_Memory_Driver:u4|Flash_Memory_Clock ; I2S_Driver:u3|I2S_PCM_DATA_ACCESS_OUT     ; 0            ; 8        ; 0        ; 0        ;
826 
; I2S_Driver:u3|I2S_PCM_DATA_ACCESS_OUT     ; I2S_Driver:u3|I2S_PCM_DATA_ACCESS_OUT     ; 307          ; 0        ; 0        ; 0        ;
827 
+-------------------------------------------+-------------------------------------------+--------------+----------+----------+----------+
828 
Entries labeled "false path" only account for clock-to-clock false paths and not path-based false paths. As a result, actual path counts may be lower than reported.
829 
 
830 
 
831 
+---------------------------------------------------------------------------+
832 
; Recovery Transfers                                                        ;
833 
+---------------+---------------+----------+----------+----------+----------+
834 
; From Clock    ; To Clock      ; RR Paths ; FR Paths ; RF Paths ; FF Paths ;
835 
+---------------+---------------+----------+----------+----------+----------+
836 
; I2S_ACTIVE_IN ; I2S_ACTIVE_IN ; 1        ; 1        ; 0        ; 0        ;
837 
+---------------+---------------+----------+----------+----------+----------+
838 
Entries labeled "false path" only account for clock-to-clock false paths and not path-based false paths. As a result, actual path counts may be lower than reported.
839 
 
840 
 
841 
+---------------------------------------------------------------------------+
842 
; Removal Transfers                                                         ;
843 
+---------------+---------------+----------+----------+----------+----------+
844 
; From Clock    ; To Clock      ; RR Paths ; FR Paths ; RF Paths ; FF Paths ;
845 
+---------------+---------------+----------+----------+----------+----------+
846 
; I2S_ACTIVE_IN ; I2S_ACTIVE_IN ; 1        ; 1        ; 0        ; 0        ;
847 
+---------------+---------------+----------+----------+----------+----------+
848 
Entries labeled "false path" only account for clock-to-clock false paths and not path-based false paths. As a result, actual path counts may be lower than reported.
849 
 
850 
 
851 
---------------
852 
; Report TCCS ;
853 
---------------
854 
No dedicated SERDES Transmitter circuitry present in device or used in design.
855 
 
856 
 
857 
---------------
858 
; Report RSKM ;
859 
---------------
860 
No dedicated SERDES Receiver circuitry present in device or used in design.
861 
 
862 
 
863 
+------------------------------------------------+
864 
; Unconstrained Paths                            ;
865 
+---------------------------------+-------+------+
866 
; Property                        ; Setup ; Hold ;
867 
+---------------------------------+-------+------+
868 
; Illegal Clocks                  ; 0     ; 0    ;
869 
; Unconstrained Clocks            ; 0     ; 0    ;
870 
; Unconstrained Input Ports       ; 10    ; 10   ;
871 
; Unconstrained Input Port Paths  ; 22    ; 22   ;
872 
; Unconstrained Output Ports      ; 30    ; 30   ;
873 
; Unconstrained Output Port Paths ; 30    ; 30   ;
874 
+---------------------------------+-------+------+
875 
 
876 
 
877 
+------------------------------------+
878 
; TimeQuest Timing Analyzer Messages ;
879 
+------------------------------------+
880 
Info: *******************************************************************
881 
Info: Running Quartus II TimeQuest Timing Analyzer
882 
    Info: Version 9.0 Build 132 02/25/2009 SJ Web Edition
883 
    Info: Processing started: Sun Feb 14 23:32:44 2010
884 
Info: Command: quartus_sta HD_ADPCM_Codec -c HD_ADPCM_Codec
885 
Info: qsta_default_script.tcl version: #3
886 
Info: Low junction temperature is 0 degrees C
887 
Info: High junction temperature is 85 degrees C
888 
Critical Warning: Synopsys Design Constraints File file not found: 'HD_ADPCM_Codec.sdc'. A Synopsys Design Constraints File is required by the TimeQuest Timing Analyzer to get proper timing constraints. Without it, the Compiler will not properly optimize the design.
889 
Info: No user constrained base clocks found in the design. Calling "derive_clocks -period 1.0"
890 
Info: Deriving Clocks
891 
    Info: create_clock -period 1.000 -name CLOCK_IN CLOCK_IN
892 
    Info: create_clock -period 1.000 -name I2S_Driver:u3|I2S_PCM_DATA_ACCESS_OUT I2S_Driver:u3|I2S_PCM_DATA_ACCESS_OUT
893 
    Info: create_clock -period 1.000 -name I2S_Driver:u3|I2S_Clock I2S_Driver:u3|I2S_Clock
894 
    Info: create_clock -period 1.000 -name I2S_ACTIVE_IN I2S_ACTIVE_IN
895 
    Info: create_clock -period 1.000 -name Flash_Memory_Driver:u4|Flash_Memory_Clock Flash_Memory_Driver:u4|Flash_Memory_Clock
896 
Info: Analyzing Slow Model
897 
Critical Warning: Timing requirements not met
898 
Info: Worst-case setup slack is -51.180
899 
    Info:     Slack End Point TNS Clock
900 
    Info: ========= ============= =====================
901 
    Info:   -51.180     -2303.828 CLOCK_IN
902 
    Info:    -3.147       -12.329 I2S_Driver:u3|I2S_Clock
903 
    Info:    -2.478       -37.927 I2S_Driver:u3|I2S_PCM_DATA_ACCESS_OUT
904 
    Info:    -1.891       -47.530 Flash_Memory_Driver:u4|Flash_Memory_Clock
905 
Info: Worst-case hold slack is -2.666
906 
    Info:     Slack End Point TNS Clock
907 
    Info: ========= ============= =====================
908 
    Info:    -2.666        -7.994 CLOCK_IN
909 
    Info:     0.445         0.000 Flash_Memory_Driver:u4|Flash_Memory_Clock
910 
    Info:     0.445         0.000 I2S_Driver:u3|I2S_Clock
911 
    Info:     0.445         0.000 I2S_Driver:u3|I2S_PCM_DATA_ACCESS_OUT
912 
Info: Worst-case recovery slack is 0.293
913 
    Info:     Slack End Point TNS Clock
914 
    Info: ========= ============= =====================
915 
    Info:     0.293         0.000 I2S_ACTIVE_IN
916 
Info: Worst-case removal slack is -0.041
917 
    Info:     Slack End Point TNS Clock
918 
    Info: ========= ============= =====================
919 
    Info:    -0.041        -0.041 I2S_ACTIVE_IN
920 
Critical Warning: Found minimum pulse width or period violations. See Report Minimum Pulse Width for details.
921 
Info: The selected device family is not supported by the report_metastability command.
922 
Info: Analyzing Fast Model
923 
Info: Started post-fitting delay annotation
924 
Warning: Found 78 output pins without output pin load capacitance assignment
925 
    Info: Pin "I2C_DATA_INOUT" has no specified output pin load capacitance -- assuming default load capacitance of 0 pF for timing analysis
926 
    Info: Pin "I2S_DATA_INOUT" has no specified output pin load capacitance -- assuming default load capacitance of 0 pF for timing analysis
927 
    Info: Pin "FLASH_MEMORY_DATA_INOUT[0]" has no specified output pin load capacitance -- assuming default load capacitance of 0 pF for timing analysis
928 
    Info: Pin "FLASH_MEMORY_DATA_INOUT[1]" has no specified output pin load capacitance -- assuming default load capacitance of 0 pF for timing analysis
929 
    Info: Pin "FLASH_MEMORY_DATA_INOUT[2]" has no specified output pin load capacitance -- assuming default load capacitance of 0 pF for timing analysis
930 
    Info: Pin "FLASH_MEMORY_DATA_INOUT[3]" has no specified output pin load capacitance -- assuming default load capacitance of 0 pF for timing analysis
931 
    Info: Pin "FLASH_MEMORY_DATA_INOUT[4]" has no specified output pin load capacitance -- assuming default load capacitance of 0 pF for timing analysis
932 
    Info: Pin "FLASH_MEMORY_DATA_INOUT[5]" has no specified output pin load capacitance -- assuming default load capacitance of 0 pF for timing analysis
933 
    Info: Pin "FLASH_MEMORY_DATA_INOUT[6]" has no specified output pin load capacitance -- assuming default load capacitance of 0 pF for timing analysis
934 
    Info: Pin "FLASH_MEMORY_DATA_INOUT[7]" has no specified output pin load capacitance -- assuming default load capacitance of 0 pF for timing analysis
935 
    Info: Pin "S_SEVEN_SEGMENT_1_OUT[0]" has no specified output pin load capacitance -- assuming default load capacitance of 0 pF for timing analysis
936 
    Info: Pin "S_SEVEN_SEGMENT_1_OUT[1]" has no specified output pin load capacitance -- assuming default load capacitance of 0 pF for timing analysis
937 
    Info: Pin "S_SEVEN_SEGMENT_1_OUT[2]" has no specified output pin load capacitance -- assuming default load capacitance of 0 pF for timing analysis
938 
    Info: Pin "S_SEVEN_SEGMENT_1_OUT[3]" has no specified output pin load capacitance -- assuming default load capacitance of 0 pF for timing analysis
939 
    Info: Pin "S_SEVEN_SEGMENT_1_OUT[4]" has no specified output pin load capacitance -- assuming default load capacitance of 0 pF for timing analysis
940 
    Info: Pin "S_SEVEN_SEGMENT_1_OUT[5]" has no specified output pin load capacitance -- assuming default load capacitance of 0 pF for timing analysis
941 
    Info: Pin "S_SEVEN_SEGMENT_1_OUT[6]" has no specified output pin load capacitance -- assuming default load capacitance of 0 pF for timing analysis
942 
    Info: Pin "S_SEVEN_SEGMENT_2_OUT[0]" has no specified output pin load capacitance -- assuming default load capacitance of 0 pF for timing analysis
943 
    Info: Pin "S_SEVEN_SEGMENT_2_OUT[1]" has no specified output pin load capacitance -- assuming default load capacitance of 0 pF for timing analysis
944 
    Info: Pin "S_SEVEN_SEGMENT_2_OUT[2]" has no specified output pin load capacitance -- assuming default load capacitance of 0 pF for timing analysis
945 
    Info: Pin "S_SEVEN_SEGMENT_2_OUT[3]" has no specified output pin load capacitance -- assuming default load capacitance of 0 pF for timing analysis
946 
    Info: Pin "S_SEVEN_SEGMENT_2_OUT[4]" has no specified output pin load capacitance -- assuming default load capacitance of 0 pF for timing analysis
947 
    Info: Pin "S_SEVEN_SEGMENT_2_OUT[5]" has no specified output pin load capacitance -- assuming default load capacitance of 0 pF for timing analysis
948 
    Info: Pin "S_SEVEN_SEGMENT_2_OUT[6]" has no specified output pin load capacitance -- assuming default load capacitance of 0 pF for timing analysis
949 
    Info: Pin "S_SEVEN_SEGMENT_3_OUT[0]" has no specified output pin load capacitance -- assuming default load capacitance of 0 pF for timing analysis
950 
    Info: Pin "S_SEVEN_SEGMENT_3_OUT[1]" has no specified output pin load capacitance -- assuming default load capacitance of 0 pF for timing analysis
951 
    Info: Pin "S_SEVEN_SEGMENT_3_OUT[2]" has no specified output pin load capacitance -- assuming default load capacitance of 0 pF for timing analysis
952 
    Info: Pin "S_SEVEN_SEGMENT_3_OUT[3]" has no specified output pin load capacitance -- assuming default load capacitance of 0 pF for timing analysis
953 
    Info: Pin "S_SEVEN_SEGMENT_3_OUT[4]" has no specified output pin load capacitance -- assuming default load capacitance of 0 pF for timing analysis
954 
    Info: Pin "S_SEVEN_SEGMENT_3_OUT[5]" has no specified output pin load capacitance -- assuming default load capacitance of 0 pF for timing analysis
955 
    Info: Pin "S_SEVEN_SEGMENT_3_OUT[6]" has no specified output pin load capacitance -- assuming default load capacitance of 0 pF for timing analysis
956 
    Info: Pin "S_SEVEN_SEGMENT_4_OUT[0]" has no specified output pin load capacitance -- assuming default load capacitance of 0 pF for timing analysis
957 
    Info: Pin "S_SEVEN_SEGMENT_4_OUT[1]" has no specified output pin load capacitance -- assuming default load capacitance of 0 pF for timing analysis
958 
    Info: Pin "S_SEVEN_SEGMENT_4_OUT[2]" has no specified output pin load capacitance -- assuming default load capacitance of 0 pF for timing analysis
959 
    Info: Pin "S_SEVEN_SEGMENT_4_OUT[3]" has no specified output pin load capacitance -- assuming default load capacitance of 0 pF for timing analysis
960 
    Info: Pin "S_SEVEN_SEGMENT_4_OUT[4]" has no specified output pin load capacitance -- assuming default load capacitance of 0 pF for timing analysis
961 
    Info: Pin "S_SEVEN_SEGMENT_4_OUT[5]" has no specified output pin load capacitance -- assuming default load capacitance of 0 pF for timing analysis
962 
    Info: Pin "S_SEVEN_SEGMENT_4_OUT[6]" has no specified output pin load capacitance -- assuming default load capacitance of 0 pF for timing analysis
963 
    Info: Pin "S_RED_LEDS_OUT[0]" has no specified output pin load capacitance -- assuming default load capacitance of 0 pF for timing analysis
964 
    Info: Pin "S_RED_LEDS_OUT[1]" has no specified output pin load capacitance -- assuming default load capacitance of 0 pF for timing analysis
965 
    Info: Pin "S_RED_LEDS_OUT[2]" has no specified output pin load capacitance -- assuming default load capacitance of 0 pF for timing analysis
966 
    Info: Pin "S_RED_LEDS_OUT[3]" has no specified output pin load capacitance -- assuming default load capacitance of 0 pF for timing analysis
967 
    Info: Pin "S_RED_LEDS_OUT[4]" has no specified output pin load capacitance -- assuming default load capacitance of 0 pF for timing analysis
968 
    Info: Pin "S_RED_LEDS_OUT[5]" has no specified output pin load capacitance -- assuming default load capacitance of 0 pF for timing analysis
969 
    Info: Pin "S_RED_LEDS_OUT[6]" has no specified output pin load capacitance -- assuming default load capacitance of 0 pF for timing analysis
970 
    Info: Pin "S_RED_LEDS_OUT[7]" has no specified output pin load capacitance -- assuming default load capacitance of 0 pF for timing analysis
971 
    Info: Pin "S_RED_LEDS_OUT[8]" has no specified output pin load capacitance -- assuming default load capacitance of 0 pF for timing analysis
972 
    Info: Pin "S_RED_LEDS_OUT[9]" has no specified output pin load capacitance -- assuming default load capacitance of 0 pF for timing analysis
973 
    Info: Pin "I2C_CLOCK_OUT" has no specified output pin load capacitance -- assuming default load capacitance of 0 pF for timing analysis
974 
    Info: Pin "I2S_LEFT_RIGHT_CLOCK_OUT" has no specified output pin load capacitance -- assuming default load capacitance of 0 pF for timing analysis
975 
    Info: Pin "I2S_CLOCK_OUT" has no specified output pin load capacitance -- assuming default load capacitance of 0 pF for timing analysis
976 
    Info: Pin "I2S_CORE_CLOCK_OUT" has no specified output pin load capacitance -- assuming default load capacitance of 0 pF for timing analysis
977 
    Info: Pin "FLASH_MEMORY_ADDRESS_OUT[0]" has no specified output pin load capacitance -- assuming default load capacitance of 0 pF for timing analysis
978 
    Info: Pin "FLASH_MEMORY_ADDRESS_OUT[1]" has no specified output pin load capacitance -- assuming default load capacitance of 0 pF for timing analysis
979 
    Info: Pin "FLASH_MEMORY_ADDRESS_OUT[2]" has no specified output pin load capacitance -- assuming default load capacitance of 0 pF for timing analysis
980 
    Info: Pin "FLASH_MEMORY_ADDRESS_OUT[3]" has no specified output pin load capacitance -- assuming default load capacitance of 0 pF for timing analysis
981 
    Info: Pin "FLASH_MEMORY_ADDRESS_OUT[4]" has no specified output pin load capacitance -- assuming default load capacitance of 0 pF for timing analysis
982 
    Info: Pin "FLASH_MEMORY_ADDRESS_OUT[5]" has no specified output pin load capacitance -- assuming default load capacitance of 0 pF for timing analysis
983 
    Info: Pin "FLASH_MEMORY_ADDRESS_OUT[6]" has no specified output pin load capacitance -- assuming default load capacitance of 0 pF for timing analysis
984 
    Info: Pin "FLASH_MEMORY_ADDRESS_OUT[7]" has no specified output pin load capacitance -- assuming default load capacitance of 0 pF for timing analysis
985 
    Info: Pin "FLASH_MEMORY_ADDRESS_OUT[8]" has no specified output pin load capacitance -- assuming default load capacitance of 0 pF for timing analysis
986 
    Info: Pin "FLASH_MEMORY_ADDRESS_OUT[9]" has no specified output pin load capacitance -- assuming default load capacitance of 0 pF for timing analysis
987 
    Info: Pin "FLASH_MEMORY_ADDRESS_OUT[10]" has no specified output pin load capacitance -- assuming default load capacitance of 0 pF for timing analysis
988 
    Info: Pin "FLASH_MEMORY_ADDRESS_OUT[11]" has no specified output pin load capacitance -- assuming default load capacitance of 0 pF for timing analysis
989 
    Info: Pin "FLASH_MEMORY_ADDRESS_OUT[12]" has no specified output pin load capacitance -- assuming default load capacitance of 0 pF for timing analysis
990 
    Info: Pin "FLASH_MEMORY_ADDRESS_OUT[13]" has no specified output pin load capacitance -- assuming default load capacitance of 0 pF for timing analysis
991 
    Info: Pin "FLASH_MEMORY_ADDRESS_OUT[14]" has no specified output pin load capacitance -- assuming default load capacitance of 0 pF for timing analysis
992 
    Info: Pin "FLASH_MEMORY_ADDRESS_OUT[15]" has no specified output pin load capacitance -- assuming default load capacitance of 0 pF for timing analysis
993 
    Info: Pin "FLASH_MEMORY_ADDRESS_OUT[16]" has no specified output pin load capacitance -- assuming default load capacitance of 0 pF for timing analysis
994 
    Info: Pin "FLASH_MEMORY_ADDRESS_OUT[17]" has no specified output pin load capacitance -- assuming default load capacitance of 0 pF for timing analysis
995 
    Info: Pin "FLASH_MEMORY_ADDRESS_OUT[18]" has no specified output pin load capacitance -- assuming default load capacitance of 0 pF for timing analysis
996 
    Info: Pin "FLASH_MEMORY_ADDRESS_OUT[19]" has no specified output pin load capacitance -- assuming default load capacitance of 0 pF for timing analysis
997 
    Info: Pin "FLASH_MEMORY_ADDRESS_OUT[20]" has no specified output pin load capacitance -- assuming default load capacitance of 0 pF for timing analysis
998 
    Info: Pin "FLASH_MEMORY_ADDRESS_OUT[21]" has no specified output pin load capacitance -- assuming default load capacitance of 0 pF for timing analysis
999 
    Info: Pin "FLASH_MEMORY_nWE_OUT" has no specified output pin load capacitance -- assuming default load capacitance of 0 pF for timing analysis
1000 
    Info: Pin "FLASH_MEMORY_nOE_OUT" has no specified output pin load capacitance -- assuming default load capacitance of 0 pF for timing analysis
1001 
    Info: Pin "FLASH_MEMORY_nRESET_OUT" has no specified output pin load capacitance -- assuming default load capacitance of 0 pF for timing analysis
1002 
    Info: Pin "FLASH_MEMORY_nCE_OUT" has no specified output pin load capacitance -- assuming default load capacitance of 0 pF for timing analysis
1003 
Info: Delay annotation completed successfully
1004 
Critical Warning: Timing requirements not met
1005 
Info: Worst-case setup slack is -17.515
1006 
    Info:     Slack End Point TNS Clock
1007 
    Info: ========= ============= =====================
1008 
    Info:   -17.515      -725.765 CLOCK_IN
1009 
    Info:    -0.900        -0.986 I2S_Driver:u3|I2S_Clock
1010 
    Info:    -0.460        -3.086 I2S_Driver:u3|I2S_PCM_DATA_ACCESS_OUT
1011 
    Info:    -0.446        -6.111 Flash_Memory_Driver:u4|Flash_Memory_Clock
1012 
Info: Worst-case hold slack is -1.697
1013 
    Info:     Slack End Point TNS Clock
1014 
    Info: ========= ============= =====================
1015 
    Info:    -1.697        -5.088 CLOCK_IN
1016 
    Info:     0.215         0.000 Flash_Memory_Driver:u4|Flash_Memory_Clock
1017 
    Info:     0.215         0.000 I2S_Driver:u3|I2S_Clock
1018 
    Info:     0.215         0.000 I2S_Driver:u3|I2S_PCM_DATA_ACCESS_OUT
1019 
Info: Worst-case recovery slack is 0.409
1020 
    Info:     Slack End Point TNS Clock
1021 
    Info: ========= ============= =====================
1022 
    Info:     0.409         0.000 I2S_ACTIVE_IN
1023 
Info: Worst-case removal slack is -0.029
1024 
    Info:     Slack End Point TNS Clock
1025 
    Info: ========= ============= =====================
1026 
    Info:    -0.029        -0.029 I2S_ACTIVE_IN
1027 
Critical Warning: Found minimum pulse width or period violations. See Report Minimum Pulse Width for details.
1028 
Info: The selected device family is not supported by the report_metastability command.
1029 
Info: Design is not fully constrained for setup requirements
1030 
Info: Design is not fully constrained for hold requirements
1031 
Info: Quartus II TimeQuest Timing Analyzer was successful. 0 errors, 6 warnings
1032 
    Info: Peak virtual memory: 163 megabytes
1033 
    Info: Processing ended: Sun Feb 14 23:32:54 2010
1034 
    Info: Elapsed time: 00:00:10
1035 
    Info: Total CPU time (on all processors): 00:00:10
1036 
 
1037 
 

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