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ashematian |
--ADPCM 1-Bit Stereo Decoder.
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--On: Cyclone-II Starter Kit
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--Author: Amir Shahram Hematian
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--Date&Time: 2008/Feb/21
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library ieee;
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use ieee.std_logic_1164.all;
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use ieee.numeric_std.all;
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entity HD_ADPCM_Codec is
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port (
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CLOCK_IN : IN STD_LOGIC;
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S_SEVEN_SEGMENT_1_OUT : OUT STD_LOGIC_VECTOR (6 downto 0);
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S_SEVEN_SEGMENT_2_OUT : OUT STD_LOGIC_VECTOR (6 downto 0);
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S_SEVEN_SEGMENT_3_OUT : OUT STD_LOGIC_VECTOR (6 downto 0);
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S_SEVEN_SEGMENT_4_OUT : OUT STD_LOGIC_VECTOR (6 downto 0);
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S_RED_LEDS_OUT : OUT STD_LOGIC_VECTOR (9 downto 0);
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I2C_CLOCK_OUT : OUT STD_LOGIC;
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I2C_DATA_INOUT : INOUT STD_LOGIC;
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I2S_LEFT_RIGHT_CLOCK_OUT: OUT STD_LOGIC;
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I2S_CLOCK_OUT : OUT STD_LOGIC;
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I2S_DATA_INOUT : INOUT STD_LOGIC;
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I2S_CORE_CLOCK_OUT : OUT STD_LOGIC;
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SWITCH_0 : IN STD_LOGIC;
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KEY_0 : IN STD_LOGIC;
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KEY_1 : IN STD_LOGIC;
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FLASH_MEMORY_ADDRESS_OUT: OUT STD_LOGIC_VECTOR (21 downto 0);
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FLASH_MEMORY_DATA_INOUT : INOUT STD_LOGIC_VECTOR (7 downto 0);
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FLASH_MEMORY_nWE_OUT : OUT STD_LOGIC;
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FLASH_MEMORY_nOE_OUT : OUT STD_LOGIC;
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FLASH_MEMORY_nRESET_OUT : OUT STD_LOGIC;
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FLASH_MEMORY_nCE_OUT : OUT STD_LOGIC
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);
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end HD_ADPCM_Codec;
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architecture HD_ADPCM_Codec_Function of HD_ADPCM_Codec is
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component SevenSegments_Driver
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port (
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DIGIT_1_IN, DIGIT_2_IN, DIGIT_3_IN, DIGIT_4_IN : in integer range 0 to 15;
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SEVEN_SEGMENT_1_OUT, SEVEN_SEGMENT_2_OUT, SEVEN_SEGMENT_3_OUT, SEVEN_SEGMENT_4_OUT : out STD_LOGIC_VECTOR (6 downto 0)
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);
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end component;
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component LEDs_Bar_Driver
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port (
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SAMPLE_VALUE : IN INTEGER RANGE 0 to 10;
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LEDS_OUT : OUT STD_LOGIC_VECTOR (9 downto 0)
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);
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end component;
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component I2C_Driver
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port (
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CLOCK_IN : IN STD_LOGIC;
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ACTIVE_IN : IN STD_LOGIC;
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SLAVE_ADDRESS, REGISTER_ADDRESS : IN STD_LOGIC_VECTOR(7 downto 0);
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REGISTER_DATA : IN STD_LOGIC_VECTOR(7 downto 0);
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I2C_CLOCK : OUT STD_LOGIC;
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I2C_DATA : INOUT STD_LOGIC
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);
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end component;
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component I2S_Driver
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port (
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CLOCK_IN : IN STD_LOGIC;
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ACTIVE_IN : IN STD_LOGIC;
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PCM_DATA_LEFT_IN, PCM_DATA_RIGHT_IN : IN STD_LOGIC_VECTOR(15 downto 0);
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I2S_LEFT_RIGHT_CLOCK_OUT : OUT STD_LOGIC;
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I2S_CLOCK_OUT : OUT STD_LOGIC;
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I2S_DATA_INOUT : INOUT STD_LOGIC;
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I2S_PCM_DATA_ACCESS_OUT : OUT STD_LOGIC
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);
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end component;
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component Flash_Memory_Driver
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port (
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CLOCK_IN : IN STD_LOGIC;
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ACTIVE_IN : IN STD_LOGIC;
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FLASH_MEMORY_ADDRESS_IN : IN STD_LOGIC_VECTOR (21 downto 0);
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FLASH_MEMORY_DATA_OUT : OUT STD_LOGIC_VECTOR (7 downto 0);
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DATA_VALID : OUT STD_LOGIC;
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FLASH_MEMORY_nWE : OUT STD_LOGIC;
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FLASH_MEMORY_nOE : OUT STD_LOGIC;
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FLASH_MEMORY_nRESET : OUT STD_LOGIC;
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FLASH_MEMORY_nCE : OUT STD_LOGIC;
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FLASH_MEMORY_ADDRESS : OUT STD_LOGIC_VECTOR (21 downto 0);
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FLASH_MEMORY_DATA : INOUT STD_LOGIC_VECTOR (7 downto 0)
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);
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end component;
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component ADPCM_Decoder_1_Bit
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port (
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CLOCK_IN : IN STD_LOGIC;
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ACTIVE_IN : IN STD_LOGIC;
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ADPCM_DATA_IN : IN STD_LOGIC;
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PCM_DATA_OUT : OUT STD_LOGIC_VECTOR(15 downto 0)
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);
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end component;
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signal Seven_Segment_Digit1 : integer range 0 to 15;
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signal Seven_Segment_Digit2 : integer range 0 to 15;
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signal Seven_Segment_Digit3 : integer range 0 to 15;
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signal Seven_Segment_Digit4 : integer range 0 to 15;
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signal Red_LEDs_Bar : integer range 0 to 10;
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constant CLOCK_FREQ : integer := 24000000;
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constant DIVISION_FREQ : integer := 8;
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constant COUNTER_MAX : integer := CLOCK_FREQ/DIVISION_FREQ-1;
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--Clock Divider
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signal Counter : unsigned(24 downto 0);
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signal Audio_Codec_Counter : unsigned(3 downto 0);
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signal PCM_Left_Data : STD_LOGIC_VECTOR(7 downto 0);
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signal I2C_ACTIVE_IN : STD_LOGIC := '0';
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signal I2S_CORE_CLOCK : STD_LOGIC := '0';
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signal I2C_SLAVE_ADDRESS : STD_LOGIC_VECTOR(7 downto 0) := x"34";
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signal I2C_REGISTER_ADDRESS : STD_LOGIC_VECTOR(7 downto 0) := x"12";
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signal I2C_REGISTER_DATA : STD_LOGIC_VECTOR(7 downto 0) := x"01";
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signal AUDIO_CODEC_VOLUME : unsigned(6 downto 0) := "1110000";
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type Stream is array(0 to 7) of STD_LOGIC_VECTOR(7 downto 0);
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signal I2C_Data_Stream : Stream := ( x"1A",--Line In
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x"7B",--Line Out
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x"F8",--Analog Path
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x"06",--Digital Path
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x"00",--Power Down
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x"21",--Digital Format
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x"01",--Sampling Control
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x"01" --Active Control
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);
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signal I2C_Register_Address_Stream : Stream := ( x"01",
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x"05",
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x"08",
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x"0A",
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x"0C",
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x"0E",
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x"10",
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x"12"
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);
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signal I2S_ACTIVE_IN : STD_LOGIC := '0';
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signal I2S_PCM_DATA_LEFT : STD_LOGIC_VECTOR(15 downto 0) := x"0000";
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signal I2S_PCM_DATA_RIGHT : STD_LOGIC_VECTOR(15 downto 0) := x"0000";
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signal I2S_PCM_DATA_ACCESS : STD_LOGIC;
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signal FLASH_MEMORY_ACTIVE : STD_LOGIC := '1';
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signal FLASH_MEMORY_ADDRESS : STD_LOGIC_VECTOR(21 downto 0);
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signal FLASH_MEMORY_ADDRESS_22 : unsigned(21 downto 0) := "0000000000000000000000";
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signal FLASH_MEMORY_DATA : STD_LOGIC_VECTOR(7 downto 0);
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signal FLASH_MEMORY_DATA_VALID : STD_LOGIC;
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signal ADPCM_DECODER_ACTIVE : STD_LOGIC := '0';
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signal ADPCM_DECODER_PCM_DATA_LEFT : STD_LOGIC_VECTOR(15 downto 0);
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signal ADPCM_DECODER_PCM_DATA_RIGHT: STD_LOGIC_VECTOR(15 downto 0);
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signal ADPCM_DECODER_DATA_LEFT : STD_LOGIC;
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signal ADPCM_DECODER_DATA_RIGHT : STD_LOGIC;
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begin
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u0: SevenSegments_Driver port map ( Seven_Segment_Digit1, Seven_Segment_Digit2, Seven_Segment_Digit3, Seven_Segment_Digit4, S_SEVEN_SEGMENT_1_OUT, S_SEVEN_SEGMENT_2_OUT, S_SEVEN_SEGMENT_3_OUT, S_SEVEN_SEGMENT_4_OUT);
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u1: LEDs_Bar_Driver port map ( Red_LEDs_Bar, S_RED_LEDS_OUT);
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u2: I2C_Driver port map ( CLOCK_IN, I2C_ACTIVE_IN, I2C_SLAVE_ADDRESS, I2C_REGISTER_ADDRESS, I2C_REGISTER_DATA, I2C_CLOCK_OUT, I2C_DATA_INOUT);
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u3: I2S_Driver port map ( CLOCK_IN, I2S_ACTIVE_IN, I2S_PCM_DATA_LEFT, I2S_PCM_DATA_RIGHT, I2S_LEFT_RIGHT_CLOCK_OUT, I2S_CLOCK_OUT, I2S_DATA_INOUT, I2S_PCM_DATA_ACCESS);
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u4: Flash_Memory_Driver port map ( CLOCK_IN, FLASH_MEMORY_ACTIVE, FLASH_MEMORY_ADDRESS, FLASH_MEMORY_DATA, FLASH_MEMORY_DATA_VALID, FLASH_MEMORY_nWE_OUT, FLASH_MEMORY_nOE_OUT, FLASH_MEMORY_nRESET_OUT, FLASH_MEMORY_nCE_OUT, FLASH_MEMORY_ADDRESS_OUT, FLASH_MEMORY_DATA_INOUT);
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u5: ADPCM_Decoder_1_Bit port map ( CLOCK_IN, ADPCM_DECODER_ACTIVE, ADPCM_DECODER_DATA_LEFT, ADPCM_DECODER_PCM_DATA_LEFT);
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u6: ADPCM_Decoder_1_Bit port map ( CLOCK_IN, ADPCM_DECODER_ACTIVE, ADPCM_DECODER_DATA_RIGHT, ADPCM_DECODER_PCM_DATA_RIGHT);
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FLASH_MEMORY_ADDRESS(0) <= FLASH_MEMORY_ADDRESS_22(0);
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FLASH_MEMORY_ADDRESS(1) <= FLASH_MEMORY_ADDRESS_22(1);
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FLASH_MEMORY_ADDRESS(2) <= FLASH_MEMORY_ADDRESS_22(2);
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FLASH_MEMORY_ADDRESS(3) <= FLASH_MEMORY_ADDRESS_22(3);
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FLASH_MEMORY_ADDRESS(4) <= FLASH_MEMORY_ADDRESS_22(4);
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FLASH_MEMORY_ADDRESS(5) <= FLASH_MEMORY_ADDRESS_22(5);
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FLASH_MEMORY_ADDRESS(6) <= FLASH_MEMORY_ADDRESS_22(6);
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FLASH_MEMORY_ADDRESS(7) <= FLASH_MEMORY_ADDRESS_22(7);
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FLASH_MEMORY_ADDRESS(8) <= FLASH_MEMORY_ADDRESS_22(8);
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FLASH_MEMORY_ADDRESS(9) <= FLASH_MEMORY_ADDRESS_22(9);
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FLASH_MEMORY_ADDRESS(10) <= FLASH_MEMORY_ADDRESS_22(10);
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FLASH_MEMORY_ADDRESS(11) <= FLASH_MEMORY_ADDRESS_22(11);
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FLASH_MEMORY_ADDRESS(12) <= FLASH_MEMORY_ADDRESS_22(12);
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FLASH_MEMORY_ADDRESS(13) <= FLASH_MEMORY_ADDRESS_22(13);
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FLASH_MEMORY_ADDRESS(14) <= FLASH_MEMORY_ADDRESS_22(14);
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FLASH_MEMORY_ADDRESS(15) <= FLASH_MEMORY_ADDRESS_22(15);
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FLASH_MEMORY_ADDRESS(16) <= FLASH_MEMORY_ADDRESS_22(16);
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FLASH_MEMORY_ADDRESS(17) <= FLASH_MEMORY_ADDRESS_22(17);
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FLASH_MEMORY_ADDRESS(18) <= FLASH_MEMORY_ADDRESS_22(18);
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FLASH_MEMORY_ADDRESS(19) <= FLASH_MEMORY_ADDRESS_22(19);
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FLASH_MEMORY_ADDRESS(20) <= FLASH_MEMORY_ADDRESS_22(20);
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FLASH_MEMORY_ADDRESS(21) <= FLASH_MEMORY_ADDRESS_22(21);
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I2C_Data_Stream(1)(0) <= AUDIO_CODEC_VOLUME(0);
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I2C_Data_Stream(1)(1) <= AUDIO_CODEC_VOLUME(1);
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I2C_Data_Stream(1)(2) <= AUDIO_CODEC_VOLUME(2);
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I2C_Data_Stream(1)(3) <= AUDIO_CODEC_VOLUME(3);
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I2C_Data_Stream(1)(4) <= AUDIO_CODEC_VOLUME(4);
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I2C_Data_Stream(1)(5) <= AUDIO_CODEC_VOLUME(5);
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I2C_Data_Stream(1)(6) <= AUDIO_CODEC_VOLUME(6);
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I2S_CORE_CLOCK_OUT <= I2S_CORE_CLOCK;
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PCM_Left_Data(7) <= ADPCM_DECODER_PCM_DATA_LEFT(15);
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PCM_Left_Data(6) <= ADPCM_DECODER_PCM_DATA_LEFT(14);
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PCM_Left_Data(5) <= ADPCM_DECODER_PCM_DATA_LEFT(13);
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PCM_Left_Data(4) <= ADPCM_DECODER_PCM_DATA_LEFT(12);
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PCM_Left_Data(3) <= ADPCM_DECODER_PCM_DATA_LEFT(11);
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PCM_Left_Data(2) <= ADPCM_DECODER_PCM_DATA_LEFT(10);
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PCM_Left_Data(1) <= ADPCM_DECODER_PCM_DATA_LEFT(9);
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PCM_Left_Data(0) <= ADPCM_DECODER_PCM_DATA_LEFT(8);
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I2S_PCM_DATA_LEFT <= ADPCM_DECODER_PCM_DATA_LEFT;
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I2S_PCM_DATA_RIGHT <= ADPCM_DECODER_PCM_DATA_RIGHT;
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process(CLOCK_IN, I2S_PCM_DATA_ACCESS)
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variable I2C_Stream_Counter : integer range 0 to 7;
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variable ADPCM_Bit_Counter : integer range 0 to 7 := 6;
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begin
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if rising_edge(I2S_PCM_DATA_ACCESS) then
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ADPCM_DECODER_DATA_LEFT <= FLASH_MEMORY_DATA(ADPCM_Bit_Counter+1);
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ADPCM_DECODER_DATA_RIGHT <= FLASH_MEMORY_DATA(ADPCM_Bit_Counter);
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ADPCM_DECODER_ACTIVE <= not ADPCM_DECODER_ACTIVE;
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if ADPCM_Bit_Counter = 0 then
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ADPCM_Bit_Counter := 6;
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FLASH_MEMORY_ADDRESS_22 <= FLASH_MEMORY_ADDRESS_22 + 1;
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else
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ADPCM_Bit_Counter := ADPCM_Bit_Counter - 2;
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end if;
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if PCM_Left_Data > "11111000" then
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Red_LEDs_Bar <= 10;
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elsif PCM_Left_Data > "11110000" then
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Red_LEDs_Bar <= 9;
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elsif PCM_Left_Data > "11100000" then
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Red_LEDs_Bar <= 8;
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elsif PCM_Left_Data > "11000000" then
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Red_LEDs_Bar <= 7;
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elsif PCM_Left_Data > "10111000" then
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Red_LEDs_Bar <= 6;
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elsif PCM_Left_Data > "10110000" then
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Red_LEDs_Bar <= 5;
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elsif PCM_Left_Data > "10100000" then
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Red_LEDs_Bar <= 4;
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elsif PCM_Left_Data > "10011100" then
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Red_LEDs_Bar <= 3;
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elsif PCM_Left_Data > "10011000" then
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Red_LEDs_Bar <= 2;
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elsif PCM_Left_Data > "10001000" then
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Red_LEDs_Bar <= 1;
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else
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Red_LEDs_Bar <= 0;
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end if;
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|
|
|
| 276 |
|
|
end if;
|
| 277 |
|
|
|
| 278 |
|
|
if rising_edge(CLOCK_IN) then
|
| 279 |
|
|
if Counter = COUNTER_MAX then
|
| 280 |
|
|
Counter <= (others => '0');
|
| 281 |
|
|
|
| 282 |
|
|
if KEY_0 = '0' then
|
| 283 |
|
|
if AUDIO_CODEC_VOLUME = "1111111" then
|
| 284 |
|
|
else
|
| 285 |
|
|
AUDIO_CODEC_VOLUME <= AUDIO_CODEC_VOLUME + 1;
|
| 286 |
|
|
end if;
|
| 287 |
|
|
elsif KEY_1 = '0' then
|
| 288 |
|
|
if AUDIO_CODEC_VOLUME = "000000" then
|
| 289 |
|
|
else
|
| 290 |
|
|
AUDIO_CODEC_VOLUME <= AUDIO_CODEC_VOLUME - 1;
|
| 291 |
|
|
end if;
|
| 292 |
|
|
end if;
|
| 293 |
|
|
|
| 294 |
|
|
I2C_REGISTER_ADDRESS <= I2C_Register_Address_Stream(I2C_Stream_Counter);
|
| 295 |
|
|
I2C_REGISTER_DATA <= I2C_Data_Stream(I2C_Stream_Counter);
|
| 296 |
|
|
if I2C_ACTIVE_IN = '0' then
|
| 297 |
|
|
I2C_ACTIVE_IN <= '1';
|
| 298 |
|
|
else
|
| 299 |
|
|
I2C_ACTIVE_IN <= '0';
|
| 300 |
|
|
if I2C_Stream_Counter = 7 then
|
| 301 |
|
|
I2C_Stream_Counter := 0;
|
| 302 |
|
|
I2S_ACTIVE_IN <= '1';
|
| 303 |
|
|
else
|
| 304 |
|
|
I2C_Stream_Counter := I2C_Stream_Counter + 1;
|
| 305 |
|
|
end if;
|
| 306 |
|
|
end if;
|
| 307 |
|
|
|
| 308 |
|
|
else
|
| 309 |
|
|
Counter <= Counter + 1;
|
| 310 |
|
|
end if;
|
| 311 |
|
|
I2S_CORE_CLOCK <= not I2S_CORE_CLOCK;
|
| 312 |
|
|
end if;
|
| 313 |
|
|
|
| 314 |
|
|
|
| 315 |
|
|
end process;
|
| 316 |
|
|
|
| 317 |
|
|
end HD_ADPCM_Codec_Function;
|
| 318 |
|
|
|
| 319 |
|
|
|
| 320 |
|
|
------------------------7Segments Driver------------------------------
|
| 321 |
|
|
library ieee;
|
| 322 |
|
|
use ieee.std_logic_1164.all;
|
| 323 |
|
|
use ieee.numeric_std.all;
|
| 324 |
|
|
|
| 325 |
|
|
entity SevenSegments_Driver is
|
| 326 |
|
|
port (
|
| 327 |
|
|
DIGIT_1_IN, DIGIT_2_IN, DIGIT_3_IN, DIGIT_4_IN : in integer range 0 to 15;
|
| 328 |
|
|
SEVEN_SEGMENT_1_OUT, SEVEN_SEGMENT_2_OUT, SEVEN_SEGMENT_3_OUT, SEVEN_SEGMENT_4_OUT : out STD_LOGIC_VECTOR (6 downto 0)
|
| 329 |
|
|
);
|
| 330 |
|
|
end SevenSegments_Driver;
|
| 331 |
|
|
|
| 332 |
|
|
|
| 333 |
|
|
architecture HD_ADPCM_Codec_Function of SevenSegments_Driver is
|
| 334 |
|
|
type Stream is array(0 to 15) of STD_LOGIC_VECTOR(7 downto 0);
|
| 335 |
|
|
constant Seven_Segment_Data_Stream : Stream := ( x"40",
|
| 336 |
|
|
x"F9",
|
| 337 |
|
|
x"A4",
|
| 338 |
|
|
x"B0",
|
| 339 |
|
|
x"99",
|
| 340 |
|
|
x"92",
|
| 341 |
|
|
x"02",
|
| 342 |
|
|
x"F8",
|
| 343 |
|
|
x"00",
|
| 344 |
|
|
x"10",
|
| 345 |
|
|
x"08",
|
| 346 |
|
|
x"03",
|
| 347 |
|
|
x"46",
|
| 348 |
|
|
x"21",
|
| 349 |
|
|
x"06",
|
| 350 |
|
|
x"0E");
|
| 351 |
|
|
begin
|
| 352 |
|
|
SEVEN_SEGMENT_1_OUT(0) <= Seven_Segment_Data_Stream(DIGIT_1_IN)(0);
|
| 353 |
|
|
SEVEN_SEGMENT_1_OUT(1) <= Seven_Segment_Data_Stream(DIGIT_1_IN)(1);
|
| 354 |
|
|
SEVEN_SEGMENT_1_OUT(2) <= Seven_Segment_Data_Stream(DIGIT_1_IN)(2);
|
| 355 |
|
|
SEVEN_SEGMENT_1_OUT(3) <= Seven_Segment_Data_Stream(DIGIT_1_IN)(3);
|
| 356 |
|
|
SEVEN_SEGMENT_1_OUT(4) <= Seven_Segment_Data_Stream(DIGIT_1_IN)(4);
|
| 357 |
|
|
SEVEN_SEGMENT_1_OUT(5) <= Seven_Segment_Data_Stream(DIGIT_1_IN)(5);
|
| 358 |
|
|
SEVEN_SEGMENT_1_OUT(6) <= Seven_Segment_Data_Stream(DIGIT_1_IN)(6);
|
| 359 |
|
|
|
| 360 |
|
|
SEVEN_SEGMENT_2_OUT(0) <= Seven_Segment_Data_Stream(DIGIT_2_IN)(0);
|
| 361 |
|
|
SEVEN_SEGMENT_2_OUT(1) <= Seven_Segment_Data_Stream(DIGIT_2_IN)(1);
|
| 362 |
|
|
SEVEN_SEGMENT_2_OUT(2) <= Seven_Segment_Data_Stream(DIGIT_2_IN)(2);
|
| 363 |
|
|
SEVEN_SEGMENT_2_OUT(3) <= Seven_Segment_Data_Stream(DIGIT_2_IN)(3);
|
| 364 |
|
|
SEVEN_SEGMENT_2_OUT(4) <= Seven_Segment_Data_Stream(DIGIT_2_IN)(4);
|
| 365 |
|
|
SEVEN_SEGMENT_2_OUT(5) <= Seven_Segment_Data_Stream(DIGIT_2_IN)(5);
|
| 366 |
|
|
SEVEN_SEGMENT_2_OUT(6) <= Seven_Segment_Data_Stream(DIGIT_2_IN)(6);
|
| 367 |
|
|
|
| 368 |
|
|
SEVEN_SEGMENT_3_OUT(0) <= Seven_Segment_Data_Stream(DIGIT_3_IN)(0);
|
| 369 |
|
|
SEVEN_SEGMENT_3_OUT(1) <= Seven_Segment_Data_Stream(DIGIT_3_IN)(1);
|
| 370 |
|
|
SEVEN_SEGMENT_3_OUT(2) <= Seven_Segment_Data_Stream(DIGIT_3_IN)(2);
|
| 371 |
|
|
SEVEN_SEGMENT_3_OUT(3) <= Seven_Segment_Data_Stream(DIGIT_3_IN)(3);
|
| 372 |
|
|
SEVEN_SEGMENT_3_OUT(4) <= Seven_Segment_Data_Stream(DIGIT_3_IN)(4);
|
| 373 |
|
|
SEVEN_SEGMENT_3_OUT(5) <= Seven_Segment_Data_Stream(DIGIT_3_IN)(5);
|
| 374 |
|
|
SEVEN_SEGMENT_3_OUT(6) <= Seven_Segment_Data_Stream(DIGIT_3_IN)(6);
|
| 375 |
|
|
|
| 376 |
|
|
SEVEN_SEGMENT_4_OUT(0) <= Seven_Segment_Data_Stream(DIGIT_4_IN)(0);
|
| 377 |
|
|
SEVEN_SEGMENT_4_OUT(1) <= Seven_Segment_Data_Stream(DIGIT_4_IN)(1);
|
| 378 |
|
|
SEVEN_SEGMENT_4_OUT(2) <= Seven_Segment_Data_Stream(DIGIT_4_IN)(2);
|
| 379 |
|
|
SEVEN_SEGMENT_4_OUT(3) <= Seven_Segment_Data_Stream(DIGIT_4_IN)(3);
|
| 380 |
|
|
SEVEN_SEGMENT_4_OUT(4) <= Seven_Segment_Data_Stream(DIGIT_4_IN)(4);
|
| 381 |
|
|
SEVEN_SEGMENT_4_OUT(5) <= Seven_Segment_Data_Stream(DIGIT_4_IN)(5);
|
| 382 |
|
|
SEVEN_SEGMENT_4_OUT(6) <= Seven_Segment_Data_Stream(DIGIT_4_IN)(6);
|
| 383 |
|
|
|
| 384 |
|
|
end HD_ADPCM_Codec_Function;
|
| 385 |
|
|
------------------------7Segments Driver------------------------------
|
| 386 |
|
|
|
| 387 |
|
|
|
| 388 |
|
|
|
| 389 |
|
|
|
| 390 |
|
|
------------------------LEDs Bar Driver------------------------------
|
| 391 |
|
|
library ieee;
|
| 392 |
|
|
use ieee.std_logic_1164.all;
|
| 393 |
|
|
use ieee.numeric_std.all;
|
| 394 |
|
|
|
| 395 |
|
|
entity LEDs_Bar_Driver is
|
| 396 |
|
|
port (
|
| 397 |
|
|
SAMPLE_VALUE : IN INTEGER RANGE 0 to 10;
|
| 398 |
|
|
LEDS_OUT : OUT STD_LOGIC_VECTOR (9 downto 0)
|
| 399 |
|
|
);
|
| 400 |
|
|
end LEDs_Bar_Driver;
|
| 401 |
|
|
|
| 402 |
|
|
|
| 403 |
|
|
architecture HD_ADPCM_Codec_Function of LEDs_Bar_Driver is
|
| 404 |
|
|
type Stream is array(0 to 10) of STD_LOGIC_VECTOR(9 downto 0);
|
| 405 |
|
|
constant LEDs_Data_Stream : Stream := (
|
| 406 |
|
|
"0000000000",
|
| 407 |
|
|
"0000000001",
|
| 408 |
|
|
"0000000011",
|
| 409 |
|
|
"0000000111",
|
| 410 |
|
|
"0000001111",
|
| 411 |
|
|
"0000011111",
|
| 412 |
|
|
"0000111111",
|
| 413 |
|
|
"0001111111",
|
| 414 |
|
|
"0011111111",
|
| 415 |
|
|
"0111111111",
|
| 416 |
|
|
"1111111111");
|
| 417 |
|
|
begin
|
| 418 |
|
|
LEDS_OUT(0) <= LEDs_Data_Stream(SAMPLE_VALUE)(0);
|
| 419 |
|
|
LEDS_OUT(1) <= LEDs_Data_Stream(SAMPLE_VALUE)(1);
|
| 420 |
|
|
LEDS_OUT(2) <= LEDs_Data_Stream(SAMPLE_VALUE)(2);
|
| 421 |
|
|
LEDS_OUT(3) <= LEDs_Data_Stream(SAMPLE_VALUE)(3);
|
| 422 |
|
|
LEDS_OUT(4) <= LEDs_Data_Stream(SAMPLE_VALUE)(4);
|
| 423 |
|
|
LEDS_OUT(5) <= LEDs_Data_Stream(SAMPLE_VALUE)(5);
|
| 424 |
|
|
LEDS_OUT(6) <= LEDs_Data_Stream(SAMPLE_VALUE)(6);
|
| 425 |
|
|
LEDS_OUT(7) <= LEDs_Data_Stream(SAMPLE_VALUE)(7);
|
| 426 |
|
|
LEDS_OUT(8) <= LEDs_Data_Stream(SAMPLE_VALUE)(8);
|
| 427 |
|
|
LEDS_OUT(9) <= LEDs_Data_Stream(SAMPLE_VALUE)(9);
|
| 428 |
|
|
|
| 429 |
|
|
end HD_ADPCM_Codec_Function;
|
| 430 |
|
|
------------------------7Segments Driver------------------------------
|
| 431 |
|
|
|
| 432 |
|
|
|
| 433 |
|
|
|
| 434 |
|
|
------------------------I2C Driver------------------------------
|
| 435 |
|
|
library ieee;
|
| 436 |
|
|
use ieee.std_logic_1164.all;
|
| 437 |
|
|
use ieee.numeric_std.all;
|
| 438 |
|
|
|
| 439 |
|
|
entity I2C_Driver is
|
| 440 |
|
|
port (
|
| 441 |
|
|
CLOCK_IN : IN STD_LOGIC;
|
| 442 |
|
|
ACTIVE_IN : IN STD_LOGIC;
|
| 443 |
|
|
SLAVE_ADDRESS, REGISTER_ADDRESS : IN STD_LOGIC_VECTOR(7 downto 0);
|
| 444 |
|
|
REGISTER_DATA : IN STD_LOGIC_VECTOR(7 downto 0);
|
| 445 |
|
|
I2C_CLOCK : OUT STD_LOGIC;
|
| 446 |
|
|
I2C_DATA : INOUT STD_LOGIC
|
| 447 |
|
|
);
|
| 448 |
|
|
end I2C_Driver;
|
| 449 |
|
|
|
| 450 |
|
|
|
| 451 |
|
|
architecture HD_ADPCM_Codec_Function of I2C_Driver is
|
| 452 |
|
|
|
| 453 |
|
|
type Stream is array(0 to 86) of STD_LOGIC;
|
| 454 |
|
|
constant CLOCK_FREQ : integer := 24000000;
|
| 455 |
|
|
constant DIVISION_FREQ : integer := 100000;--I2C Speed: 100Kbps
|
| 456 |
|
|
constant COUNTER_MAX : integer := CLOCK_FREQ/(DIVISION_FREQ*3)-1;
|
| 457 |
|
|
|
| 458 |
|
|
--Clock Divider
|
| 459 |
|
|
signal Counter : unsigned(24 downto 0);
|
| 460 |
|
|
signal I2C_Sent : unsigned(0 downto 0);
|
| 461 |
|
|
signal I2C_Data_Stream : Stream := (
|
| 462 |
|
|
'1',
|
| 463 |
|
|
'0',
|
| 464 |
|
|
'0',
|
| 465 |
|
|
SLAVE_ADDRESS(7),
|
| 466 |
|
|
SLAVE_ADDRESS(7),
|
| 467 |
|
|
SLAVE_ADDRESS(7),
|
| 468 |
|
|
SLAVE_ADDRESS(6),
|
| 469 |
|
|
SLAVE_ADDRESS(6),
|
| 470 |
|
|
SLAVE_ADDRESS(6),
|
| 471 |
|
|
SLAVE_ADDRESS(5),
|
| 472 |
|
|
SLAVE_ADDRESS(5),
|
| 473 |
|
|
SLAVE_ADDRESS(5),
|
| 474 |
|
|
SLAVE_ADDRESS(4),
|
| 475 |
|
|
SLAVE_ADDRESS(4),
|
| 476 |
|
|
SLAVE_ADDRESS(4),
|
| 477 |
|
|
SLAVE_ADDRESS(3),
|
| 478 |
|
|
SLAVE_ADDRESS(3),
|
| 479 |
|
|
SLAVE_ADDRESS(3),
|
| 480 |
|
|
SLAVE_ADDRESS(2),
|
| 481 |
|
|
SLAVE_ADDRESS(2),
|
| 482 |
|
|
SLAVE_ADDRESS(2),
|
| 483 |
|
|
SLAVE_ADDRESS(1),
|
| 484 |
|
|
SLAVE_ADDRESS(1),
|
| 485 |
|
|
SLAVE_ADDRESS(1),
|
| 486 |
|
|
SLAVE_ADDRESS(0),
|
| 487 |
|
|
SLAVE_ADDRESS(0),
|
| 488 |
|
|
SLAVE_ADDRESS(0),
|
| 489 |
|
|
'1',--Ack
|
| 490 |
|
|
'1',--Ack
|
| 491 |
|
|
'1',--Ack
|
| 492 |
|
|
REGISTER_ADDRESS(7),
|
| 493 |
|
|
REGISTER_ADDRESS(7),
|
| 494 |
|
|
REGISTER_ADDRESS(7),
|
| 495 |
|
|
REGISTER_ADDRESS(6),
|
| 496 |
|
|
REGISTER_ADDRESS(6),
|
| 497 |
|
|
REGISTER_ADDRESS(6),
|
| 498 |
|
|
REGISTER_ADDRESS(5),
|
| 499 |
|
|
REGISTER_ADDRESS(5),
|
| 500 |
|
|
REGISTER_ADDRESS(5),
|
| 501 |
|
|
REGISTER_ADDRESS(4),
|
| 502 |
|
|
REGISTER_ADDRESS(4),
|
| 503 |
|
|
REGISTER_ADDRESS(4),
|
| 504 |
|
|
REGISTER_ADDRESS(3),
|
| 505 |
|
|
REGISTER_ADDRESS(3),
|
| 506 |
|
|
REGISTER_ADDRESS(3),
|
| 507 |
|
|
REGISTER_ADDRESS(2),
|
| 508 |
|
|
REGISTER_ADDRESS(2),
|
| 509 |
|
|
REGISTER_ADDRESS(2),
|
| 510 |
|
|
REGISTER_ADDRESS(1),
|
| 511 |
|
|
REGISTER_ADDRESS(1),
|
| 512 |
|
|
REGISTER_ADDRESS(1),
|
| 513 |
|
|
REGISTER_ADDRESS(0),
|
| 514 |
|
|
REGISTER_ADDRESS(0),
|
| 515 |
|
|
REGISTER_ADDRESS(0),
|
| 516 |
|
|
'1',--Ack
|
| 517 |
|
|
'1',--Ack
|
| 518 |
|
|
'1',--Ack
|
| 519 |
|
|
REGISTER_DATA(7),
|
| 520 |
|
|
REGISTER_DATA(7),
|
| 521 |
|
|
REGISTER_DATA(7),
|
| 522 |
|
|
REGISTER_DATA(6),
|
| 523 |
|
|
REGISTER_DATA(6),
|
| 524 |
|
|
REGISTER_DATA(6),
|
| 525 |
|
|
REGISTER_DATA(5),
|
| 526 |
|
|
REGISTER_DATA(5),
|
| 527 |
|
|
REGISTER_DATA(5),
|
| 528 |
|
|
REGISTER_DATA(4),
|
| 529 |
|
|
REGISTER_DATA(4),
|
| 530 |
|
|
REGISTER_DATA(4),
|
| 531 |
|
|
REGISTER_DATA(3),
|
| 532 |
|
|
REGISTER_DATA(3),
|
| 533 |
|
|
REGISTER_DATA(3),
|
| 534 |
|
|
REGISTER_DATA(2),
|
| 535 |
|
|
REGISTER_DATA(2),
|
| 536 |
|
|
REGISTER_DATA(2),
|
| 537 |
|
|
REGISTER_DATA(1),
|
| 538 |
|
|
REGISTER_DATA(1),
|
| 539 |
|
|
REGISTER_DATA(1),
|
| 540 |
|
|
REGISTER_DATA(0),
|
| 541 |
|
|
REGISTER_DATA(0),
|
| 542 |
|
|
REGISTER_DATA(0),
|
| 543 |
|
|
'1',--Ack
|
| 544 |
|
|
'1',--Ack
|
| 545 |
|
|
'1',--Ack
|
| 546 |
|
|
'0',
|
| 547 |
|
|
'0',
|
| 548 |
|
|
'1');
|
| 549 |
|
|
|
| 550 |
|
|
constant I2C_Clock_Stream : Stream := (
|
| 551 |
|
|
'1',
|
| 552 |
|
|
'1',
|
| 553 |
|
|
'0',
|
| 554 |
|
|
'0',
|
| 555 |
|
|
'1',
|
| 556 |
|
|
'0',
|
| 557 |
|
|
'0',
|
| 558 |
|
|
'1',
|
| 559 |
|
|
'0',
|
| 560 |
|
|
'0',
|
| 561 |
|
|
'1',
|
| 562 |
|
|
'0',
|
| 563 |
|
|
'0',
|
| 564 |
|
|
'1',
|
| 565 |
|
|
'0',
|
| 566 |
|
|
'0',
|
| 567 |
|
|
'1',
|
| 568 |
|
|
'0',
|
| 569 |
|
|
'0',
|
| 570 |
|
|
'1',
|
| 571 |
|
|
'0',
|
| 572 |
|
|
'0',
|
| 573 |
|
|
'1',
|
| 574 |
|
|
'0',
|
| 575 |
|
|
'0',
|
| 576 |
|
|
'1',
|
| 577 |
|
|
'0',
|
| 578 |
|
|
'0',
|
| 579 |
|
|
'1',
|
| 580 |
|
|
'0',
|
| 581 |
|
|
'0',
|
| 582 |
|
|
'1',
|
| 583 |
|
|
'0',
|
| 584 |
|
|
'0',
|
| 585 |
|
|
'1',
|
| 586 |
|
|
'0',
|
| 587 |
|
|
'0',
|
| 588 |
|
|
'1',
|
| 589 |
|
|
'0',
|
| 590 |
|
|
'0',
|
| 591 |
|
|
'1',
|
| 592 |
|
|
'0',
|
| 593 |
|
|
'0',
|
| 594 |
|
|
'1',
|
| 595 |
|
|
'0',
|
| 596 |
|
|
'0',
|
| 597 |
|
|
'1',
|
| 598 |
|
|
'0',
|
| 599 |
|
|
'0',
|
| 600 |
|
|
'1',
|
| 601 |
|
|
'0',
|
| 602 |
|
|
'0',
|
| 603 |
|
|
'1',
|
| 604 |
|
|
'0',
|
| 605 |
|
|
'0',
|
| 606 |
|
|
'1',
|
| 607 |
|
|
'0',
|
| 608 |
|
|
'0',
|
| 609 |
|
|
'1',
|
| 610 |
|
|
'0',
|
| 611 |
|
|
'0',
|
| 612 |
|
|
'1',
|
| 613 |
|
|
'0',
|
| 614 |
|
|
'0',
|
| 615 |
|
|
'1',
|
| 616 |
|
|
'0',
|
| 617 |
|
|
'0',
|
| 618 |
|
|
'1',
|
| 619 |
|
|
'0',
|
| 620 |
|
|
'0',
|
| 621 |
|
|
'1',
|
| 622 |
|
|
'0',
|
| 623 |
|
|
'0',
|
| 624 |
|
|
'1',
|
| 625 |
|
|
'0',
|
| 626 |
|
|
'0',
|
| 627 |
|
|
'1',
|
| 628 |
|
|
'0',
|
| 629 |
|
|
'0',
|
| 630 |
|
|
'1',
|
| 631 |
|
|
'0',
|
| 632 |
|
|
'0',
|
| 633 |
|
|
'1',
|
| 634 |
|
|
'0',
|
| 635 |
|
|
'0',
|
| 636 |
|
|
'1',
|
| 637 |
|
|
'1'
|
| 638 |
|
|
);
|
| 639 |
|
|
|
| 640 |
|
|
begin
|
| 641 |
|
|
|
| 642 |
|
|
process(CLOCK_IN, ACTIVE_IN)
|
| 643 |
|
|
variable I2C_Stream_Counter : integer range 0 to 86;
|
| 644 |
|
|
begin
|
| 645 |
|
|
if rising_edge(CLOCK_IN) then
|
| 646 |
|
|
|
| 647 |
|
|
I2C_CLOCK <= I2C_Clock_Stream(I2C_Stream_Counter);
|
| 648 |
|
|
I2C_DATA <= I2C_Data_Stream(I2C_Stream_Counter);
|
| 649 |
|
|
|
| 650 |
|
|
if Counter = COUNTER_MAX then
|
| 651 |
|
|
Counter <= (others => '0');
|
| 652 |
|
|
|
| 653 |
|
|
if ACTIVE_IN = '1' then
|
| 654 |
|
|
if I2C_Stream_Counter = 86 then
|
| 655 |
|
|
--I2C_Stream_Counter := 0;
|
| 656 |
|
|
else
|
| 657 |
|
|
I2C_Stream_Counter := I2C_Stream_Counter + 1;
|
| 658 |
|
|
end if;
|
| 659 |
|
|
else
|
| 660 |
|
|
I2C_Stream_Counter := 0;
|
| 661 |
|
|
end if;
|
| 662 |
|
|
else
|
| 663 |
|
|
Counter <= Counter + 1;
|
| 664 |
|
|
end if;
|
| 665 |
|
|
end if;
|
| 666 |
|
|
end process;
|
| 667 |
|
|
|
| 668 |
|
|
|
| 669 |
|
|
|
| 670 |
|
|
|
| 671 |
|
|
|
| 672 |
|
|
end HD_ADPCM_Codec_Function;
|
| 673 |
|
|
------------------------I2C Driver------------------------------
|
| 674 |
|
|
|
| 675 |
|
|
|
| 676 |
|
|
|
| 677 |
|
|
------------------------I2S Driver------------------------------
|
| 678 |
|
|
library ieee;
|
| 679 |
|
|
use ieee.std_logic_1164.all;
|
| 680 |
|
|
use ieee.numeric_std.all;
|
| 681 |
|
|
|
| 682 |
|
|
entity I2S_Driver is
|
| 683 |
|
|
port (
|
| 684 |
|
|
CLOCK_IN : IN STD_LOGIC;
|
| 685 |
|
|
ACTIVE_IN : IN STD_LOGIC;
|
| 686 |
|
|
PCM_DATA_LEFT_IN, PCM_DATA_RIGHT_IN : IN STD_LOGIC_VECTOR(15 downto 0);
|
| 687 |
|
|
I2S_LEFT_RIGHT_CLOCK_OUT : OUT STD_LOGIC;
|
| 688 |
|
|
I2S_CLOCK_OUT : OUT STD_LOGIC;
|
| 689 |
|
|
I2S_DATA_INOUT : INOUT STD_LOGIC;
|
| 690 |
|
|
I2S_PCM_DATA_ACCESS_OUT : OUT STD_LOGIC
|
| 691 |
|
|
);
|
| 692 |
|
|
end I2S_Driver;
|
| 693 |
|
|
|
| 694 |
|
|
|
| 695 |
|
|
architecture HD_ADPCM_Codec_Function of I2S_Driver is
|
| 696 |
|
|
|
| 697 |
|
|
type Stream is array(0 to 37) of STD_LOGIC;
|
| 698 |
|
|
constant CLOCK_FREQ : integer := 24000000;
|
| 699 |
|
|
--constant DIVISION_FREQ : integer := 1824000;--I2S Speed: 48000Hz 48Khz * 38 I2S Bits
|
| 700 |
|
|
--constant COUNTER_MAX : integer := CLOCK_FREQ/(DIVISION_FREQ*2)-1;
|
| 701 |
|
|
constant COUNTER_MAX : integer := 7;
|
| 702 |
|
|
|
| 703 |
|
|
|
| 704 |
|
|
--Clock Divider
|
| 705 |
|
|
signal Counter : unsigned(24 downto 0);
|
| 706 |
|
|
signal Active_Module : unsigned(0 downto 0);
|
| 707 |
|
|
signal I2S_Clock : STD_LOGIC := '0';
|
| 708 |
|
|
signal I2S_Data_Stream : Stream := ( '0',
|
| 709 |
|
|
PCM_DATA_LEFT_IN(15),
|
| 710 |
|
|
PCM_DATA_LEFT_IN(14),
|
| 711 |
|
|
PCM_DATA_LEFT_IN(13),
|
| 712 |
|
|
PCM_DATA_LEFT_IN(12),
|
| 713 |
|
|
PCM_DATA_LEFT_IN(11),
|
| 714 |
|
|
PCM_DATA_LEFT_IN(10),
|
| 715 |
|
|
PCM_DATA_LEFT_IN(9),
|
| 716 |
|
|
PCM_DATA_LEFT_IN(8),
|
| 717 |
|
|
PCM_DATA_LEFT_IN(7),
|
| 718 |
|
|
PCM_DATA_LEFT_IN(6),
|
| 719 |
|
|
PCM_DATA_LEFT_IN(5),
|
| 720 |
|
|
PCM_DATA_LEFT_IN(4),
|
| 721 |
|
|
PCM_DATA_LEFT_IN(3),
|
| 722 |
|
|
PCM_DATA_LEFT_IN(2),
|
| 723 |
|
|
PCM_DATA_LEFT_IN(1),
|
| 724 |
|
|
PCM_DATA_LEFT_IN(0),
|
| 725 |
|
|
'0',
|
| 726 |
|
|
'0',
|
| 727 |
|
|
'0',
|
| 728 |
|
|
PCM_DATA_RIGHT_IN(15),
|
| 729 |
|
|
PCM_DATA_RIGHT_IN(14),
|
| 730 |
|
|
PCM_DATA_RIGHT_IN(13),
|
| 731 |
|
|
PCM_DATA_RIGHT_IN(12),
|
| 732 |
|
|
PCM_DATA_RIGHT_IN(11),
|
| 733 |
|
|
PCM_DATA_RIGHT_IN(10),
|
| 734 |
|
|
PCM_DATA_RIGHT_IN(9),
|
| 735 |
|
|
PCM_DATA_RIGHT_IN(8),
|
| 736 |
|
|
PCM_DATA_RIGHT_IN(7),
|
| 737 |
|
|
PCM_DATA_RIGHT_IN(6),
|
| 738 |
|
|
PCM_DATA_RIGHT_IN(5),
|
| 739 |
|
|
PCM_DATA_RIGHT_IN(4),
|
| 740 |
|
|
PCM_DATA_RIGHT_IN(3),
|
| 741 |
|
|
PCM_DATA_RIGHT_IN(2),
|
| 742 |
|
|
PCM_DATA_RIGHT_IN(1),
|
| 743 |
|
|
PCM_DATA_RIGHT_IN(0),
|
| 744 |
|
|
'0',
|
| 745 |
|
|
'0');
|
| 746 |
|
|
|
| 747 |
|
|
|
| 748 |
|
|
begin
|
| 749 |
|
|
|
| 750 |
|
|
I2S_CLOCK_OUT <= I2S_Clock;
|
| 751 |
|
|
|
| 752 |
|
|
process(CLOCK_IN, ACTIVE_IN)
|
| 753 |
|
|
begin
|
| 754 |
|
|
if rising_edge(CLOCK_IN) then
|
| 755 |
|
|
if Counter = COUNTER_MAX then
|
| 756 |
|
|
Counter <= (others => '0');
|
| 757 |
|
|
|
| 758 |
|
|
if Active_Module = "1" then
|
| 759 |
|
|
I2S_Clock <= not I2S_Clock;
|
| 760 |
|
|
end if;
|
| 761 |
|
|
|
| 762 |
|
|
else
|
| 763 |
|
|
Counter <= Counter + 1;
|
| 764 |
|
|
end if;
|
| 765 |
|
|
end if;
|
| 766 |
|
|
if rising_edge(ACTIVE_IN) then
|
| 767 |
|
|
Active_Module <= "1";
|
| 768 |
|
|
end if;
|
| 769 |
|
|
if ACTIVE_IN = '0' then
|
| 770 |
|
|
Active_Module <= "0";
|
| 771 |
|
|
end if;
|
| 772 |
|
|
end process;
|
| 773 |
|
|
|
| 774 |
|
|
process(I2S_Clock)
|
| 775 |
|
|
variable I2S_Stream_Counter : integer range 0 to 37;
|
| 776 |
|
|
begin
|
| 777 |
|
|
if falling_edge(I2S_Clock) then
|
| 778 |
|
|
|
| 779 |
|
|
I2S_DATA_INOUT <= I2S_Data_Stream(I2S_Stream_Counter);
|
| 780 |
|
|
|
| 781 |
|
|
if I2S_Stream_Counter = 0 then
|
| 782 |
|
|
I2S_LEFT_RIGHT_CLOCK_OUT <= '0';
|
| 783 |
|
|
elsif I2S_Stream_Counter = 19 then
|
| 784 |
|
|
I2S_LEFT_RIGHT_CLOCK_OUT <= '1';
|
| 785 |
|
|
end if;
|
| 786 |
|
|
|
| 787 |
|
|
if I2S_Stream_Counter = 37 then
|
| 788 |
|
|
I2S_Stream_Counter := 0;
|
| 789 |
|
|
I2S_PCM_DATA_ACCESS_OUT <= '1';
|
| 790 |
|
|
else
|
| 791 |
|
|
I2S_PCM_DATA_ACCESS_OUT <= '0';
|
| 792 |
|
|
I2S_Stream_Counter := I2S_Stream_Counter + 1;
|
| 793 |
|
|
end if;
|
| 794 |
|
|
end if;
|
| 795 |
|
|
end process;
|
| 796 |
|
|
|
| 797 |
|
|
end HD_ADPCM_Codec_Function;
|
| 798 |
|
|
------------------------I2S Driver------------------------------
|
| 799 |
|
|
|
| 800 |
|
|
|
| 801 |
|
|
|
| 802 |
|
|
|
| 803 |
|
|
------------------------Flash Memory Driver------------------------------
|
| 804 |
|
|
library ieee;
|
| 805 |
|
|
use ieee.std_logic_1164.all;
|
| 806 |
|
|
use ieee.numeric_std.all;
|
| 807 |
|
|
|
| 808 |
|
|
entity Flash_Memory_Driver is
|
| 809 |
|
|
port (
|
| 810 |
|
|
CLOCK_IN : IN STD_LOGIC;
|
| 811 |
|
|
ACTIVE_IN : IN STD_LOGIC;
|
| 812 |
|
|
FLASH_MEMORY_ADDRESS_IN : IN STD_LOGIC_VECTOR (21 downto 0);
|
| 813 |
|
|
FLASH_MEMORY_DATA_OUT : OUT STD_LOGIC_VECTOR (7 downto 0);
|
| 814 |
|
|
DATA_VALID : OUT STD_LOGIC;
|
| 815 |
|
|
FLASH_MEMORY_nWE : OUT STD_LOGIC;
|
| 816 |
|
|
FLASH_MEMORY_nOE : OUT STD_LOGIC;
|
| 817 |
|
|
FLASH_MEMORY_nRESET : OUT STD_LOGIC;
|
| 818 |
|
|
FLASH_MEMORY_nCE : OUT STD_LOGIC;
|
| 819 |
|
|
FLASH_MEMORY_ADDRESS : OUT STD_LOGIC_VECTOR (21 downto 0);
|
| 820 |
|
|
FLASH_MEMORY_DATA : INOUT STD_LOGIC_VECTOR (7 downto 0)
|
| 821 |
|
|
);
|
| 822 |
|
|
end Flash_Memory_Driver;
|
| 823 |
|
|
|
| 824 |
|
|
|
| 825 |
|
|
architecture HD_ADPCM_Codec_Function of Flash_Memory_Driver is
|
| 826 |
|
|
constant CLOCK_FREQ : integer := 24000000;
|
| 827 |
|
|
constant DIVISION_FREQ : integer := 2000000;--Flash Memory Speed Clock.
|
| 828 |
|
|
constant COUNTER_MAX : integer := CLOCK_FREQ/(DIVISION_FREQ*2)-1;
|
| 829 |
|
|
|
| 830 |
|
|
--Clock Divider
|
| 831 |
|
|
signal Counter : unsigned(24 downto 0);
|
| 832 |
|
|
signal Flash_Memory_Clock : STD_LOGIC := '0';
|
| 833 |
|
|
signal Flash_Memory_Data_Valid : STD_LOGIC := '0';
|
| 834 |
|
|
begin
|
| 835 |
|
|
|
| 836 |
|
|
DATA_VALID <= Flash_Memory_Data_Valid;
|
| 837 |
|
|
process(CLOCK_IN)
|
| 838 |
|
|
begin
|
| 839 |
|
|
if rising_edge(CLOCK_IN) then
|
| 840 |
|
|
if Counter = COUNTER_MAX then
|
| 841 |
|
|
Counter <= (others => '0');
|
| 842 |
|
|
|
| 843 |
|
|
if ACTIVE_IN = '1' then
|
| 844 |
|
|
Flash_Memory_Clock <= not Flash_Memory_Clock;
|
| 845 |
|
|
end if;
|
| 846 |
|
|
|
| 847 |
|
|
else
|
| 848 |
|
|
Counter <= Counter + 1;
|
| 849 |
|
|
end if;
|
| 850 |
|
|
end if;
|
| 851 |
|
|
|
| 852 |
|
|
|
| 853 |
|
|
end process;
|
| 854 |
|
|
|
| 855 |
|
|
process(Flash_Memory_Clock)
|
| 856 |
|
|
variable Flash_Memory_Counter : integer range 0 to 5;
|
| 857 |
|
|
begin
|
| 858 |
|
|
if falling_edge(Flash_Memory_Clock) then
|
| 859 |
|
|
case Flash_Memory_Counter is
|
| 860 |
|
|
when 0 =>
|
| 861 |
|
|
Flash_Memory_Data_Valid <= '0';
|
| 862 |
|
|
FLASH_MEMORY_nRESET <= '1';
|
| 863 |
|
|
FLASH_MEMORY_nWE <= '1';
|
| 864 |
|
|
FLASH_MEMORY_nOE <= '1';
|
| 865 |
|
|
FLASH_MEMORY_nCE <= '1';
|
| 866 |
|
|
when 1 =>
|
| 867 |
|
|
FLASH_MEMORY_ADDRESS <= FLASH_MEMORY_ADDRESS_IN;
|
| 868 |
|
|
when 2 =>
|
| 869 |
|
|
FLASH_MEMORY_nCE <= '0';
|
| 870 |
|
|
when 3 =>
|
| 871 |
|
|
FLASH_MEMORY_nOE <= '0';
|
| 872 |
|
|
when 4 =>
|
| 873 |
|
|
FLASH_MEMORY_DATA_OUT <= FLASH_MEMORY_DATA;
|
| 874 |
|
|
when 5 =>
|
| 875 |
|
|
FLASH_MEMORY_nCE <= '1';
|
| 876 |
|
|
FLASH_MEMORY_nOE <= '1';
|
| 877 |
|
|
Flash_Memory_Data_Valid <= '1';
|
| 878 |
|
|
when others => null;
|
| 879 |
|
|
end case;
|
| 880 |
|
|
if Flash_Memory_Counter = 5 then
|
| 881 |
|
|
Flash_Memory_Counter := 0;
|
| 882 |
|
|
else
|
| 883 |
|
|
Flash_Memory_Counter := Flash_Memory_Counter + 1;
|
| 884 |
|
|
end if;
|
| 885 |
|
|
end if;
|
| 886 |
|
|
end process;
|
| 887 |
|
|
|
| 888 |
|
|
|
| 889 |
|
|
end HD_ADPCM_Codec_Function;
|
| 890 |
|
|
------------------------Flash Memory Driver------------------------------
|
| 891 |
|
|
|
| 892 |
|
|
|
| 893 |
|
|
|
| 894 |
|
|
|
| 895 |
|
|
------------------------ADPCM Decoder 1-Bit Driver------------------------------
|
| 896 |
|
|
library ieee;
|
| 897 |
|
|
use ieee.std_logic_1164.all;
|
| 898 |
|
|
use ieee.numeric_std.all;
|
| 899 |
|
|
|
| 900 |
|
|
entity ADPCM_Decoder_1_Bit is
|
| 901 |
|
|
port (
|
| 902 |
|
|
CLOCK_IN : IN STD_LOGIC;
|
| 903 |
|
|
ACTIVE_IN : IN STD_LOGIC;
|
| 904 |
|
|
ADPCM_DATA_IN : IN STD_LOGIC;
|
| 905 |
|
|
PCM_DATA_OUT : OUT STD_LOGIC_VECTOR(15 downto 0)
|
| 906 |
|
|
);
|
| 907 |
|
|
end ADPCM_Decoder_1_Bit;
|
| 908 |
|
|
|
| 909 |
|
|
|
| 910 |
|
|
architecture HD_ADPCM_Codec_Function of ADPCM_Decoder_1_Bit is
|
| 911 |
|
|
|
| 912 |
|
|
signal Active_Module : STD_LOGIC;
|
| 913 |
|
|
signal Last_ADPCM_Data : STD_LOGIC;
|
| 914 |
|
|
type Stream is array(0 to 15) of integer;
|
| 915 |
|
|
constant PCM_Data_Converter : Stream := (
|
| 916 |
|
|
1,
|
| 917 |
|
|
2,
|
| 918 |
|
|
4,
|
| 919 |
|
|
8,
|
| 920 |
|
|
16,
|
| 921 |
|
|
32,
|
| 922 |
|
|
64,
|
| 923 |
|
|
128,
|
| 924 |
|
|
256,
|
| 925 |
|
|
512,
|
| 926 |
|
|
1024,
|
| 927 |
|
|
2048,
|
| 928 |
|
|
4096,
|
| 929 |
|
|
8192,
|
| 930 |
|
|
16384,
|
| 931 |
|
|
32768);
|
| 932 |
|
|
|
| 933 |
|
|
begin
|
| 934 |
|
|
|
| 935 |
|
|
process(CLOCK_IN, ACTIVE_IN)
|
| 936 |
|
|
variable Last_PCM_Data : integer range -32767 to 32768;
|
| 937 |
|
|
variable PCM_Data : integer range 0 to 65535;
|
| 938 |
|
|
variable PCM_Data_Difference : integer range -32767 to 32768;
|
| 939 |
|
|
variable ADPCM_Decoder_Step_Size_Table_Pointer : integer range 0 to 1000;
|
| 940 |
|
|
variable ADPCM_Decoder_State_Counter : integer range 0 to 5;
|
| 941 |
|
|
begin
|
| 942 |
|
|
|
| 943 |
|
|
if rising_edge(CLOCK_IN) then
|
| 944 |
|
|
if Active_Module = not ACTIVE_IN then
|
| 945 |
|
|
case ADPCM_Decoder_State_Counter is
|
| 946 |
|
|
when 0 =>
|
| 947 |
|
|
PCM_Data_Difference := (ADPCM_Decoder_Step_Size_Table_Pointer * ADPCM_Decoder_Step_Size_Table_Pointer)/100;
|
| 948 |
|
|
when 1 =>
|
| 949 |
|
|
if Last_ADPCM_Data = ADPCM_DATA_IN then
|
| 950 |
|
|
if ADPCM_Decoder_Step_Size_Table_Pointer < 1000 then
|
| 951 |
|
|
ADPCM_Decoder_Step_Size_Table_Pointer := ADPCM_Decoder_Step_Size_Table_Pointer + 1;
|
| 952 |
|
|
end if;
|
| 953 |
|
|
else
|
| 954 |
|
|
if ADPCM_Decoder_Step_Size_Table_Pointer > 0 then
|
| 955 |
|
|
ADPCM_Decoder_Step_Size_Table_Pointer := ADPCM_Decoder_Step_Size_Table_Pointer - 1;
|
| 956 |
|
|
end if;
|
| 957 |
|
|
end if;
|
| 958 |
|
|
when 2 =>
|
| 959 |
|
|
Last_ADPCM_Data <= ADPCM_DATA_IN;
|
| 960 |
|
|
if ADPCM_DATA_IN = '1' then
|
| 961 |
|
|
Last_PCM_Data := Last_PCM_Data - PCM_Data_Difference;
|
| 962 |
|
|
else
|
| 963 |
|
|
Last_PCM_Data := Last_PCM_Data + PCM_Data_Difference;
|
| 964 |
|
|
end if;
|
| 965 |
|
|
when 3 =>
|
| 966 |
|
|
PCM_Data := Last_PCM_Data;
|
| 967 |
|
|
when 4 =>
|
| 968 |
|
|
for i in 15 downto 0 loop
|
| 969 |
|
|
if PCM_Data > PCM_Data_Converter(i) then
|
| 970 |
|
|
PCM_Data := PCM_Data - PCM_Data_Converter(i);
|
| 971 |
|
|
PCM_DATA_OUT(i) <= '1';
|
| 972 |
|
|
else
|
| 973 |
|
|
PCM_DATA_OUT(i) <= '0';
|
| 974 |
|
|
end if;
|
| 975 |
|
|
end loop;
|
| 976 |
|
|
when others => null;
|
| 977 |
|
|
end case;
|
| 978 |
|
|
|
| 979 |
|
|
if ADPCM_Decoder_State_Counter = 5 then
|
| 980 |
|
|
ADPCM_Decoder_State_Counter := 0;
|
| 981 |
|
|
Active_Module <= ACTIVE_IN;
|
| 982 |
|
|
else
|
| 983 |
|
|
ADPCM_Decoder_State_Counter := ADPCM_Decoder_State_Counter + 1;
|
| 984 |
|
|
end if;
|
| 985 |
|
|
end if;
|
| 986 |
|
|
end if;
|
| 987 |
|
|
end process;
|
| 988 |
|
|
|
| 989 |
|
|
|
| 990 |
|
|
end HD_ADPCM_Codec_Function;
|
| 991 |
|
|
------------------------ADPCM Decoder 1-Bit Driver------------------------------
|
| 992 |
|
|
|
| 993 |
|
|
|
| 994 |
|
|
|
| 995 |
|
|
|
| 996 |
|
|
|
