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[/] [audio/] [trunk/] [HD_ADPCM/] [HD_ADPCM_1Bit_Stereo_Decoder/] [db/] [HD_ADPCM_Codec.fit.qmsg] - Blame information for rev 6

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Line No. Rev Author Line
1 6 ashematian 
{ "Info" "IQEXE_SEPARATOR" "" "Info: *******************************************************************" {  } {  } 3 0 "*******************************************************************" 0 0 "" 0 -1}
2 
{ "Info" "IQEXE_START_BANNER_PRODUCT" "Fitter Quartus II " "Info: Running Quartus II Fitter" { { "Info" "IQEXE_START_BANNER_VERSION" "Version 9.0 Build 132 02/25/2009 SJ Web Edition " "Info: Version 9.0 Build 132 02/25/2009 SJ Web Edition" {  } {  } 0 0 "%1!s!" 0 0 "" 0 -1} { "Info" "IQEXE_START_BANNER_TIME" "Tue May 11 23:49:37 2010 " "Info: Processing started: Tue May 11 23:49:37 2010" {  } {  } 0 0 "Processing started: %1!s!" 0 0 "" 0 -1}  } {  } 4 0 "Running %2!s! %1!s!" 0 0 "" 0 -1}
3 
{ "Info" "IQEXE_START_BANNER_COMMANDLINE" "quartus_fit --read_settings_files=off --write_settings_files=off HD_ADPCM_Codec -c HD_ADPCM_Codec " "Info: Command: quartus_fit --read_settings_files=off --write_settings_files=off HD_ADPCM_Codec -c HD_ADPCM_Codec" {  } {  } 0 0 "Command: %1!s!" 0 0 "" 0 -1}
4 
{ "Info" "IMPP_MPP_USER_DEVICE" "HD_ADPCM_Codec EP2C20F484C7 " "Info: Selected device EP2C20F484C7 for design \"HD_ADPCM_Codec\"" {  } {  } 0 0 "Selected device %2!s! for design \"%1!s!\"" 0 0 "" 0 -1}
5 
{ "Info" "ICUT_CUT_USING_OPERATING_CONDITION" "Low junction temperature 0 degrees C " "Info: Low junction temperature is 0 degrees C" {  } {  } 0 0 "%1!s! is %2!s!" 0 0 "" 0 -1}
6 
{ "Info" "ICUT_CUT_USING_OPERATING_CONDITION" "High junction temperature 85 degrees C " "Info: High junction temperature is 85 degrees C" {  } {  } 0 0 "%1!s! is %2!s!" 0 0 "" 0 -1}
7 
{ "Info" "IFITCC_FITCC_INFO_AUTO_FIT_COMPILATION_ON" "" "Info: Fitter is performing an Auto Fit compilation, which may decrease Fitter effort to reduce compilation time" {  } {  } 0 0 "Fitter is performing an Auto Fit compilation, which may decrease Fitter effort to reduce compilation time" 0 0 "" 0 -1}
8 
{ "Warning" "WCPT_FEATURE_DISABLED_POST" "LogicLock " "Warning: Feature LogicLock is not available with your current license" {  } {  } 0 0 "Feature %1!s! is not available with your current license" 0 0 "" 0 -1}
9 
{ "Info" "IFSAC_FSAC_MIGRATION_NOT_SELECTED" "" "Info: Device migration not selected. If you intend to use device migration later, you may need to change the pin assignments as they may be incompatible with other devices" { { "Info" "IFSAC_FSAC_MIGRATION_NOT_SELECTED_SUB" "EP2C15AF484C7 " "Info: Device EP2C15AF484C7 is compatible" {  } {  } 2 0 "Device %1!s! is compatible" 0 0 "" 0 -1} { "Info" "IFSAC_FSAC_MIGRATION_NOT_SELECTED_SUB" "EP2C35F484C7 " "Info: Device EP2C35F484C7 is compatible" {  } {  } 2 0 "Device %1!s! is compatible" 0 0 "" 0 -1} { "Info" "IFSAC_FSAC_MIGRATION_NOT_SELECTED_SUB" "EP2C50F484C7 " "Info: Device EP2C50F484C7 is compatible" {  } {  } 2 0 "Device %1!s! is compatible" 0 0 "" 0 -1}  } {  } 2 0 "Device migration not selected. If you intend to use device migration later, you may need to change the pin assignments as they may be incompatible with other devices" 0 0 "" 0 -1}
10 
{ "Info" "IFIOMGR_RESERVED_PIN_WITH_LOCATION" "3 " "Info: Fitter converted 3 user pins into dedicated programming pins" { { "Info" "IFIOMGR_RESERVED_PIN_WITH_LOCATION_SUB" "~ASDO~ C4 " "Info: Pin ~ASDO~ is reserved at location C4" {  } { { "c:/altera/90/quartus/bin/pin_planner.ppl" "" { PinPlanner "c:/altera/90/quartus/bin/pin_planner.ppl" { ~ASDO~ } } } { "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" "" { ~ASDO~ } "NODE_NAME" } }  } 0 0 "Pin %1!s! is reserved at location %2!s!" 0 0 "" 0 -1} { "Info" "IFIOMGR_RESERVED_PIN_WITH_LOCATION_SUB" "~nCSO~ C3 " "Info: Pin ~nCSO~ is reserved at location C3" {  } { { "c:/altera/90/quartus/bin/pin_planner.ppl" "" { PinPlanner "c:/altera/90/quartus/bin/pin_planner.ppl" { ~nCSO~ } } } { "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" "" { ~nCSO~ } "NODE_NAME" } }  } 0 0 "Pin %1!s! is reserved at location %2!s!" 0 0 "" 0 -1} { "Info" "IFIOMGR_RESERVED_PIN_WITH_LOCATION_SUB" "~LVDS91p/nCEO~ W20 " "Info: Pin ~LVDS91p/nCEO~ is reserved at location W20" {  } { { "c:/altera/90/quartus/bin/pin_planner.ppl" "" { PinPlanner "c:/altera/90/quartus/bin/pin_planner.ppl" { ~LVDS91p/nCEO~ } } } { "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" "" { ~LVDS91p/nCEO~ } "NODE_NAME" } }  } 0 0 "Pin %1!s! is reserved at location %2!s!" 0 0 "" 0 -1}  } {  } 0 0 "Fitter converted %1!d! user pins into dedicated programming pins" 0 0 "" 0 -1}
11 
{ "Info" "ITDC_FITTER_TIMING_ENGINE" "Classic " "Info: Fitter is using the Classic Timing Analyzer" {  } {  } 0 0 "Fitter is using the %1!s! Timing Analyzer" 0 0 "" 0 -1}
12 
{ "Info" "ITAN_TDC_NO_DEFAULT_OPTIMIZATION_GOALS" "" "Info: Timing requirements not specified -- quality metrics such as performance and power consumption may be sacrificed to reduce compilation time." {  } {  } 0 0 "Timing requirements not specified -- quality metrics such as performance and power consumption may be sacrificed to reduce compilation time." 0 0 "" 0 -1}
13 
{ "Info" "IFSAC_FSAC_ASSIGN_AUTO_GLOBAL_TO_SIGNAL" "CLOCK_IN (placed in PIN D12 (CLK10, LVDSCLK5n, Input)) " "Info: Automatically promoted node CLOCK_IN (placed in PIN D12 (CLK10, LVDSCLK5n, Input))" { { "Info" "IFSAC_FSAC_ASSIGN_AUTO_GLOBAL_TO_SIGNAL_FANOUTS" "destinations Global Clock CLKCTRL_G11 " "Info: Automatically promoted destinations to use location or clock signal Global Clock CLKCTRL_G11" {  } {  } 0 0 "Automatically promoted %1!s! to use location or clock signal %2!s!" 0 0 "" 0 -1} { "Info" "IFSAC_FSAC_GLOBAL_UNASSIGNED_FANOUTS" "" "Info: Following destination nodes may be non-global or may not use global or regional clocks" { { "Info" "IFSAC_FSAC_GLOBAL_UNASSIGNED_FANOUTS_SUB" "I2S_Driver:u3\|I2S_Clock " "Info: Destination node I2S_Driver:u3\|I2S_Clock" {  } { { "HD_ADPCM_Codec.vhd" "" { Text "D:/HD_ADPCM/HD_ADPCM_1Bit_Stereo_Decoder/HD_ADPCM_Codec.vhd" 754 -1 0 } } { "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" "" { I2S_Driver:u3|I2S_Clock } "NODE_NAME" } }  } 0 0 "Destination node %1!s!" 0 0 "" 0 -1} { "Info" "IFSAC_FSAC_GLOBAL_UNASSIGNED_FANOUTS_SUB" "Flash_Memory_Driver:u4\|Flash_Memory_Clock " "Info: Destination node Flash_Memory_Driver:u4\|Flash_Memory_Clock" {  } { { "HD_ADPCM_Codec.vhd" "" { Text "D:/HD_ADPCM/HD_ADPCM_1Bit_Stereo_Decoder/HD_ADPCM_Codec.vhd" 832 -1 0 } } { "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" "" { Flash_Memory_Driver:u4|Flash_Memory_Clock } "NODE_NAME" } }  } 0 0 "Destination node %1!s!" 0 0 "" 0 -1} { "Info" "IFSAC_FSAC_GLOBAL_UNASSIGNED_FANOUTS_SUB" "I2S_ACTIVE_IN " "Info: Destination node I2S_ACTIVE_IN" {  } { { "HD_ADPCM_Codec.vhd" "" { Text "D:/HD_ADPCM/HD_ADPCM_1Bit_Stereo_Decoder/HD_ADPCM_Codec.vhd" 153 -1 0 } } { "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" "" { I2S_ACTIVE_IN } "NODE_NAME" } }  } 0 0 "Destination node %1!s!" 0 0 "" 0 -1}  } {  } 0 0 "Following destination nodes may be non-global or may not use global or regional clocks" 0 0 "" 0 -1}  } { { "c:/altera/90/quartus/bin/pin_planner.ppl" "" { PinPlanner "c:/altera/90/quartus/bin/pin_planner.ppl" { CLOCK_IN } } } { "c:/altera/90/quartus/bin/Assignment Editor.qase" "" { Assignment "c:/altera/90/quartus/bin/Assignment Editor.qase" 1 { { 0 "CLOCK_IN" } } } } { "HD_ADPCM_Codec.vhd" "" { Text "D:/HD_ADPCM/HD_ADPCM_1Bit_Stereo_Decoder/HD_ADPCM_Codec.vhd" 12 -1 0 } } { "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" "" { CLOCK_IN } "NODE_NAME" } }  } 0 0 "Automatically promoted node %1!s! %2!s!" 0 0 "" 0 -1}
14 
{ "Info" "IFSAC_FSAC_ASSIGN_AUTO_GLOBAL_TO_SIGNAL" "Flash_Memory_Driver:u4\|Flash_Memory_Clock  " "Info: Automatically promoted node Flash_Memory_Driver:u4\|Flash_Memory_Clock " { { "Info" "IFSAC_FSAC_ASSIGN_AUTO_GLOBAL_TO_SIGNAL_FANOUTS" "destinations Global Clock " "Info: Automatically promoted destinations to use location or clock signal Global Clock" {  } {  } 0 0 "Automatically promoted %1!s! to use location or clock signal %2!s!" 0 0 "" 0 -1} { "Info" "IFSAC_FSAC_GLOBAL_UNASSIGNED_FANOUTS" "" "Info: Following destination nodes may be non-global or may not use global or regional clocks" { { "Info" "IFSAC_FSAC_GLOBAL_UNASSIGNED_FANOUTS_SUB" "Flash_Memory_Driver:u4\|Flash_Memory_Clock~1 " "Info: Destination node Flash_Memory_Driver:u4\|Flash_Memory_Clock~1" {  } { { "HD_ADPCM_Codec.vhd" "" { Text "D:/HD_ADPCM/HD_ADPCM_1Bit_Stereo_Decoder/HD_ADPCM_Codec.vhd" 832 -1 0 } } { "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" "" { Flash_Memory_Driver:u4|Flash_Memory_Clock~1 } "NODE_NAME" } }  } 0 0 "Destination node %1!s!" 0 0 "" 0 -1}  } {  } 0 0 "Following destination nodes may be non-global or may not use global or regional clocks" 0 0 "" 0 -1}  } { { "HD_ADPCM_Codec.vhd" "" { Text "D:/HD_ADPCM/HD_ADPCM_1Bit_Stereo_Decoder/HD_ADPCM_Codec.vhd" 832 -1 0 } } { "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" "" { Flash_Memory_Driver:u4|Flash_Memory_Clock } "NODE_NAME" } }  } 0 0 "Automatically promoted node %1!s! %2!s!" 0 0 "" 0 -1}
15 
{ "Info" "IFSAC_FSAC_ASSIGN_AUTO_GLOBAL_TO_SIGNAL" "I2S_Driver:u3\|I2S_PCM_DATA_ACCESS_OUT  " "Info: Automatically promoted node I2S_Driver:u3\|I2S_PCM_DATA_ACCESS_OUT " { { "Info" "IFSAC_FSAC_ASSIGN_AUTO_GLOBAL_TO_SIGNAL_FANOUTS" "destinations Global Clock " "Info: Automatically promoted destinations to use location or clock signal Global Clock" {  } {  } 0 0 "Automatically promoted %1!s! to use location or clock signal %2!s!" 0 0 "" 0 -1}  } { { "HD_ADPCM_Codec.vhd" "" { Text "D:/HD_ADPCM/HD_ADPCM_1Bit_Stereo_Decoder/HD_ADPCM_Codec.vhd" 690 -1 0 } } { "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" "" { I2S_Driver:u3|I2S_PCM_DATA_ACCESS_OUT } "NODE_NAME" } }  } 0 0 "Automatically promoted node %1!s! %2!s!" 0 0 "" 0 -1}
16 
{ "Info" "IFSAC_FSAC_ASSIGN_AUTO_GLOBAL_TO_SIGNAL" "I2S_Driver:u3\|I2S_Clock  " "Info: Automatically promoted node I2S_Driver:u3\|I2S_Clock " { { "Info" "IFSAC_FSAC_ASSIGN_AUTO_GLOBAL_TO_SIGNAL_FANOUTS" "destinations Global Clock " "Info: Automatically promoted destinations to use location or clock signal Global Clock" {  } {  } 0 0 "Automatically promoted %1!s! to use location or clock signal %2!s!" 0 0 "" 0 -1} { "Info" "IFSAC_FSAC_GLOBAL_UNASSIGNED_FANOUTS" "" "Info: Following destination nodes may be non-global or may not use global or regional clocks" { { "Info" "IFSAC_FSAC_GLOBAL_UNASSIGNED_FANOUTS_SUB" "I2S_Driver:u3\|I2S_PCM_DATA_ACCESS_OUT " "Info: Destination node I2S_Driver:u3\|I2S_PCM_DATA_ACCESS_OUT" {  } { { "HD_ADPCM_Codec.vhd" "" { Text "D:/HD_ADPCM/HD_ADPCM_1Bit_Stereo_Decoder/HD_ADPCM_Codec.vhd" 690 -1 0 } } { "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" "" { I2S_Driver:u3|I2S_PCM_DATA_ACCESS_OUT } "NODE_NAME" } }  } 0 0 "Destination node %1!s!" 0 0 "" 0 -1} { "Info" "IFSAC_FSAC_GLOBAL_UNASSIGNED_FANOUTS_SUB" "I2S_Driver:u3\|I2S_Clock~1 " "Info: Destination node I2S_Driver:u3\|I2S_Clock~1" {  } { { "HD_ADPCM_Codec.vhd" "" { Text "D:/HD_ADPCM/HD_ADPCM_1Bit_Stereo_Decoder/HD_ADPCM_Codec.vhd" 754 -1 0 } } { "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" "" { I2S_Driver:u3|I2S_Clock~1 } "NODE_NAME" } }  } 0 0 "Destination node %1!s!" 0 0 "" 0 -1} { "Info" "IFSAC_FSAC_GLOBAL_UNASSIGNED_FANOUTS_SUB" "I2S_CLOCK_OUT " "Info: Destination node I2S_CLOCK_OUT" {  } { { "c:/altera/90/quartus/bin/pin_planner.ppl" "" { PinPlanner "c:/altera/90/quartus/bin/pin_planner.ppl" { I2S_CLOCK_OUT } } } { "c:/altera/90/quartus/bin/Assignment Editor.qase" "" { Assignment "c:/altera/90/quartus/bin/Assignment Editor.qase" 1 { { 0 "I2S_CLOCK_OUT" } } } } { "HD_ADPCM_Codec.vhd" "" { Text "D:/HD_ADPCM/HD_ADPCM_1Bit_Stereo_Decoder/HD_ADPCM_Codec.vhd" 21 -1 0 } } { "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" "" { I2S_CLOCK_OUT } "NODE_NAME" } }  } 0 0 "Destination node %1!s!" 0 0 "" 0 -1}  } {  } 0 0 "Following destination nodes may be non-global or may not use global or regional clocks" 0 0 "" 0 -1}  } { { "HD_ADPCM_Codec.vhd" "" { Text "D:/HD_ADPCM/HD_ADPCM_1Bit_Stereo_Decoder/HD_ADPCM_Codec.vhd" 754 -1 0 } } { "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" "" { I2S_Driver:u3|I2S_Clock } "NODE_NAME" } }  } 0 0 "Automatically promoted node %1!s! %2!s!" 0 0 "" 0 -1}
17 
{ "Info" "IFSAC_FSAC_REGISTER_PACKING_START_REGPACKING_INFO" "" "Info: Starting register packing" {  } {  } 0 0 "Starting register packing" 0 0 "" 0 -1}
18 
{ "Extra Info" "IFSAC_FSAC_START_REG_LOCATION_PROCESSING" "" "Extra Info: Performing register packing on registers with non-logic cell location assignments" {  } {  } 1 0 "Performing register packing on registers with non-logic cell location assignments" 0 0 "" 0 -1}
19 
{ "Extra Info" "IFSAC_FSAC_FINISH_REG_LOCATION_PROCESSING" "" "Extra Info: Completed register packing on registers with non-logic cell location assignments" {  } {  } 1 0 "Completed register packing on registers with non-logic cell location assignments" 0 0 "" 0 -1}
20 
{ "Extra Info" "IFSAC_FSAC_REGISTER_PACKING_BEGIN_FAST_REGISTER_INFO" "" "Extra Info: Started Fast Input/Output/OE register processing" {  } {  } 1 0 "Started Fast Input/Output/OE register processing" 0 0 "" 0 -1}
21 
{ "Extra Info" "IFSAC_FSAC_REGISTER_PACKING_FINISH_FAST_REGISTER_INFO" "" "Extra Info: Finished Fast Input/Output/OE register processing" {  } {  } 1 0 "Finished Fast Input/Output/OE register processing" 0 0 "" 0 -1}
22 
{ "Extra Info" "IFSAC_FSAC_START_IO_MULT_RAM_PACKING" "" "Extra Info: Moving registers into I/O cells, Multiplier Blocks, and RAM blocks to improve timing and density" {  } {  } 1 0 "Moving registers into I/O cells, Multiplier Blocks, and RAM blocks to improve timing and density" 0 0 "" 0 -1}
23 
{ "Extra Info" "IFSAC_FSAC_FINISH_IO_MULT_RAM_PACKING" "" "Extra Info: Finished moving registers into I/O cells, Multiplier Blocks, and RAM blocks" {  } {  } 1 0 "Finished moving registers into I/O cells, Multiplier Blocks, and RAM blocks" 0 0 "" 0 -1}
24 
{ "Info" "IFSAC_FSAC_REGISTER_PACKING_FINISH_REGPACKING_INFO" "" "Info: Finished register packing" { { "Extra Info" "IFSAC_NUM_REGISTERS_PACKED_INTO_ATOM_TYPE" "40 Embedded multiplier block " "Extra Info: Packed 40 registers into blocks of type Embedded multiplier block" {  } {  } 1 0 "Packed %1!d! registers into blocks of type %2!s!" 0 0 "" 0 -1} { "Extra Info" "IFSAC_NUM_REGISTERS_DUPLICATED" "40 " "Extra Info: Created 40 register duplicates" {  } {  } 1 0 "Created %1!d! register duplicates" 0 0 "" 0 -1}  } {  } 0 0 "Finished register packing" 0 0 "" 0 -1}
25 
{ "Info" "IFITCC_FITTER_PREPARATION_END" "00:00:02 " "Info: Fitter preparation operations ending: elapsed time is 00:00:02" {  } {  } 0 0 "Fitter preparation operations ending: elapsed time is %1!s!" 0 0 "" 0 -1}
26 
{ "Info" "IFITAPI_FITAPI_VPR_FITTER_PLACEMENT_PREP_START" "" "Info: Fitter placement preparation operations beginning" {  } {  } 0 0 "Fitter placement preparation operations beginning" 0 0 "" 0 -1}
27 
{ "Info" "IFITAPI_FITAPI_VPR_FITTER_PLACEMENT_PREP_END" "00:00:00 " "Info: Fitter placement preparation operations ending: elapsed time is 00:00:00" {  } {  } 0 0 "Fitter placement preparation operations ending: elapsed time is %1!s!" 0 0 "" 0 -1}
28 
{ "Info" "IFITAPI_FITAPI_VPR_FITTER_PLACEMENT_START" "" "Info: Fitter placement operations beginning" {  } {  } 0 0 "Fitter placement operations beginning" 0 0 "" 0 -1}
29 
{ "Info" "IFITAPI_FITAPI_INFO_VPR_PLACEMENT_FINISH" "" "Info: Fitter placement was successful" {  } {  } 0 0 "Fitter placement was successful" 0 0 "" 0 -1}
30 
{ "Info" "IFITAPI_FITAPI_VPR_FITTER_PLACEMENT_END" "00:00:02 " "Info: Fitter placement operations ending: elapsed time is 00:00:02" {  } {  } 0 0 "Fitter placement operations ending: elapsed time is %1!s!" 0 0 "" 0 -1}
31 
{ "Info" "ITDB_FULL_SLACK_TPD_RESULT" "register ADPCM_Decoder_1_Bit:u6\|ADPCM_Decoder_Step_Size_Table_Pointer\[9\] register ADPCM_Decoder_1_Bit:u6\|PCM_Data_Difference\[0\] -48.815 ns " "Info: Slack time is -48.815 ns between source register \"ADPCM_Decoder_1_Bit:u6\|ADPCM_Decoder_Step_Size_Table_Pointer\[9\]\" and destination register \"ADPCM_Decoder_1_Bit:u6\|PCM_Data_Difference\[0\]\"" { { "Info" "ITDB_FULL_P2P_REQUIREMENT_RESULT" "0.768 ns + Largest register register " "Info: + Largest register to register requirement is 0.768 ns" {  } {  } 0 0 "%2!c! %3!s! %4!s! to %5!s! requirement is %1!s!" 0 0 "" 0 -1} { "Info" "ITDB_FULL_CLOCK_PATH_RESULT" "CLOCK_IN destination 2.608 ns   Shortest register " "Info:   Shortest clock path from clock \"CLOCK_IN\" to destination register is 2.608 ns" { { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.783 ns) 0.783 ns CLOCK_IN 1 CLK Unassigned 4 " "Info: 1: + IC(0.000 ns) + CELL(0.783 ns) = 0.783 ns; Loc. = Unassigned; Fanout = 4; CLK Node = 'CLOCK_IN'" {  } { { "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" "" { CLOCK_IN } "NODE_NAME" } } { "HD_ADPCM_Codec.vhd" "" { Text "D:/HD_ADPCM/HD_ADPCM_1Bit_Stereo_Decoder/HD_ADPCM_Codec.vhd" 12 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 -1} { "Info" "ITDB_NODE_DELAY" "IC(0.235 ns) + CELL(0.000 ns) 1.018 ns CLOCK_IN~clkctrl 2 COMB Unassigned 325 " "Info: 2: + IC(0.235 ns) + CELL(0.000 ns) = 1.018 ns; Loc. = Unassigned; Fanout = 325; COMB Node = 'CLOCK_IN~clkctrl'" {  } { { "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" "0.235 ns" { CLOCK_IN CLOCK_IN~clkctrl } "NODE_NAME" } } { "HD_ADPCM_Codec.vhd" "" { Text "D:/HD_ADPCM/HD_ADPCM_1Bit_Stereo_Decoder/HD_ADPCM_Codec.vhd" 12 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 -1} { "Info" "ITDB_NODE_DELAY" "IC(0.988 ns) + CELL(0.602 ns) 2.608 ns ADPCM_Decoder_1_Bit:u6\|PCM_Data_Difference\[0\] 3 REG Unassigned 1 " "Info: 3: + IC(0.988 ns) + CELL(0.602 ns) = 2.608 ns; Loc. = Unassigned; Fanout = 1; REG Node = 'ADPCM_Decoder_1_Bit:u6\|PCM_Data_Difference\[0\]'" {  } { { "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" "1.590 ns" { CLOCK_IN~clkctrl ADPCM_Decoder_1_Bit:u6|PCM_Data_Difference[0] } "NODE_NAME" } } { "HD_ADPCM_Codec.vhd" "" { Text "D:/HD_ADPCM/HD_ADPCM_1Bit_Stereo_Decoder/HD_ADPCM_Codec.vhd" 943 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 -1} { "Info" "ITDB_TOTAL_CELL_DELAY" "1.385 ns ( 53.11 % ) " "Info: Total cell delay = 1.385 ns ( 53.11 % )" {  } {  } 0 0 "Total cell delay = %1!s! %2!s!" 0 0 "" 0 -1} { "Info" "ITDB_TOTAL_IC_DELAY" "1.223 ns ( 46.89 % ) " "Info: Total interconnect delay = 1.223 ns ( 46.89 % )" {  } {  } 0 0 "Total interconnect delay = %1!s! %2!s!" 0 0 "" 0 -1}  } { { "HD_ADPCM_Codec.vhd" "" { Text "D:/HD_ADPCM/HD_ADPCM_1Bit_Stereo_Decoder/HD_ADPCM_Codec.vhd" 12 -1 0 } }  } 0 0 "%4!c! %5!s! clock path from clock \"%1!s!\" to %2!s! %6!s! is %3!s!" 0 0 "" 0 -1} { "Info" "ITDB_FULL_CLOCK_PATH_RESULT" "CLOCK_IN destination 2.608 ns   Longest register " "Info:   Longest clock path from clock \"CLOCK_IN\" to destination register is 2.608 ns" { { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.783 ns) 0.783 ns CLOCK_IN 1 CLK Unassigned 4 " "Info: 1: + IC(0.000 ns) + CELL(0.783 ns) = 0.783 ns; Loc. = Unassigned; Fanout = 4; CLK Node = 'CLOCK_IN'" {  } { { "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" "" { CLOCK_IN } "NODE_NAME" } } { "HD_ADPCM_Codec.vhd" "" { Text "D:/HD_ADPCM/HD_ADPCM_1Bit_Stereo_Decoder/HD_ADPCM_Codec.vhd" 12 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 -1} { "Info" "ITDB_NODE_DELAY" "IC(0.235 ns) + CELL(0.000 ns) 1.018 ns CLOCK_IN~clkctrl 2 COMB Unassigned 325 " "Info: 2: + IC(0.235 ns) + CELL(0.000 ns) = 1.018 ns; Loc. = Unassigned; Fanout = 325; COMB Node = 'CLOCK_IN~clkctrl'" {  } { { "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" "0.235 ns" { CLOCK_IN CLOCK_IN~clkctrl } "NODE_NAME" } } { "HD_ADPCM_Codec.vhd" "" { Text "D:/HD_ADPCM/HD_ADPCM_1Bit_Stereo_Decoder/HD_ADPCM_Codec.vhd" 12 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 -1} { "Info" "ITDB_NODE_DELAY" "IC(0.988 ns) + CELL(0.602 ns) 2.608 ns ADPCM_Decoder_1_Bit:u6\|PCM_Data_Difference\[0\] 3 REG Unassigned 1 " "Info: 3: + IC(0.988 ns) + CELL(0.602 ns) = 2.608 ns; Loc. = Unassigned; Fanout = 1; REG Node = 'ADPCM_Decoder_1_Bit:u6\|PCM_Data_Difference\[0\]'" {  } { { "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" "1.590 ns" { CLOCK_IN~clkctrl ADPCM_Decoder_1_Bit:u6|PCM_Data_Difference[0] } "NODE_NAME" } } { "HD_ADPCM_Codec.vhd" "" { Text "D:/HD_ADPCM/HD_ADPCM_1Bit_Stereo_Decoder/HD_ADPCM_Codec.vhd" 943 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 -1} { "Info" "ITDB_TOTAL_CELL_DELAY" "1.385 ns ( 53.11 % ) " "Info: Total cell delay = 1.385 ns ( 53.11 % )" {  } {  } 0 0 "Total cell delay = %1!s! %2!s!" 0 0 "" 0 -1} { "Info" "ITDB_TOTAL_IC_DELAY" "1.223 ns ( 46.89 % ) " "Info: Total interconnect delay = 1.223 ns ( 46.89 % )" {  } {  } 0 0 "Total interconnect delay = %1!s! %2!s!" 0 0 "" 0 -1}  } { { "HD_ADPCM_Codec.vhd" "" { Text "D:/HD_ADPCM/HD_ADPCM_1Bit_Stereo_Decoder/HD_ADPCM_Codec.vhd" 12 -1 0 } }  } 0 0 "%4!c! %5!s! clock path from clock \"%1!s!\" to %2!s! %6!s! is %3!s!" 0 0 "" 0 -1} { "Info" "ITDB_FULL_CLOCK_PATH_RESULT" "CLOCK_IN source 2.878 ns   Shortest register " "Info:   Shortest clock path from clock \"CLOCK_IN\" to source register is 2.878 ns" { { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.783 ns) 0.783 ns CLOCK_IN 1 CLK Unassigned 4 " "Info: 1: + IC(0.000 ns) + CELL(0.783 ns) = 0.783 ns; Loc. = Unassigned; Fanout = 4; CLK Node = 'CLOCK_IN'" {  } { { "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" "" { CLOCK_IN } "NODE_NAME" } } { "HD_ADPCM_Codec.vhd" "" { Text "D:/HD_ADPCM/HD_ADPCM_1Bit_Stereo_Decoder/HD_ADPCM_Codec.vhd" 12 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 -1} { "Info" "ITDB_NODE_DELAY" "IC(0.235 ns) + CELL(0.000 ns) 1.018 ns CLOCK_IN~clkctrl 2 COMB Unassigned 325 " "Info: 2: + IC(0.235 ns) + CELL(0.000 ns) = 1.018 ns; Loc. = Unassigned; Fanout = 325; COMB Node = 'CLOCK_IN~clkctrl'" {  } { { "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" "0.235 ns" { CLOCK_IN CLOCK_IN~clkctrl } "NODE_NAME" } } { "HD_ADPCM_Codec.vhd" "" { Text "D:/HD_ADPCM/HD_ADPCM_1Bit_Stereo_Decoder/HD_ADPCM_Codec.vhd" 12 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 -1} { "Info" "ITDB_NODE_DELAY" "IC(0.988 ns) + CELL(0.872 ns) 2.878 ns ADPCM_Decoder_1_Bit:u6\|ADPCM_Decoder_Step_Size_Table_Pointer\[9\] 3 REG Unassigned 11 " "Info: 3: + IC(0.988 ns) + CELL(0.872 ns) = 2.878 ns; Loc. = Unassigned; Fanout = 11; REG Node = 'ADPCM_Decoder_1_Bit:u6\|ADPCM_Decoder_Step_Size_Table_Pointer\[9\]'" {  } { { "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" "1.860 ns" { CLOCK_IN~clkctrl ADPCM_Decoder_1_Bit:u6|ADPCM_Decoder_Step_Size_Table_Pointer[9] } "NODE_NAME" } } { "HD_ADPCM_Codec.vhd" "" { Text "D:/HD_ADPCM/HD_ADPCM_1Bit_Stereo_Decoder/HD_ADPCM_Codec.vhd" 943 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 -1} { "Info" "ITDB_TOTAL_CELL_DELAY" "1.655 ns ( 57.51 % ) " "Info: Total cell delay = 1.655 ns ( 57.51 % )" {  } {  } 0 0 "Total cell delay = %1!s! %2!s!" 0 0 "" 0 -1} { "Info" "ITDB_TOTAL_IC_DELAY" "1.223 ns ( 42.49 % ) " "Info: Total interconnect delay = 1.223 ns ( 42.49 % )" {  } {  } 0 0 "Total interconnect delay = %1!s! %2!s!" 0 0 "" 0 -1}  } { { "HD_ADPCM_Codec.vhd" "" { Text "D:/HD_ADPCM/HD_ADPCM_1Bit_Stereo_Decoder/HD_ADPCM_Codec.vhd" 12 -1 0 } }  } 0 0 "%4!c! %5!s! clock path from clock \"%1!s!\" to %2!s! %6!s! is %3!s!" 0 0 "" 0 -1} { "Info" "ITDB_FULL_CLOCK_PATH_RESULT" "CLOCK_IN source 2.878 ns   Longest register " "Info:   Longest clock path from clock \"CLOCK_IN\" to source register is 2.878 ns" { { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.783 ns) 0.783 ns CLOCK_IN 1 CLK Unassigned 4 " "Info: 1: + IC(0.000 ns) + CELL(0.783 ns) = 0.783 ns; Loc. = Unassigned; Fanout = 4; CLK Node = 'CLOCK_IN'" {  } { { "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" "" { CLOCK_IN } "NODE_NAME" } } { "HD_ADPCM_Codec.vhd" "" { Text "D:/HD_ADPCM/HD_ADPCM_1Bit_Stereo_Decoder/HD_ADPCM_Codec.vhd" 12 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 -1} { "Info" "ITDB_NODE_DELAY" "IC(0.235 ns) + CELL(0.000 ns) 1.018 ns CLOCK_IN~clkctrl 2 COMB Unassigned 325 " "Info: 2: + IC(0.235 ns) + CELL(0.000 ns) = 1.018 ns; Loc. = Unassigned; Fanout = 325; COMB Node = 'CLOCK_IN~clkctrl'" {  } { { "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" "0.235 ns" { CLOCK_IN CLOCK_IN~clkctrl } "NODE_NAME" } } { "HD_ADPCM_Codec.vhd" "" { Text "D:/HD_ADPCM/HD_ADPCM_1Bit_Stereo_Decoder/HD_ADPCM_Codec.vhd" 12 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 -1} { "Info" "ITDB_NODE_DELAY" "IC(0.988 ns) + CELL(0.872 ns) 2.878 ns ADPCM_Decoder_1_Bit:u6\|ADPCM_Decoder_Step_Size_Table_Pointer\[9\] 3 REG Unassigned 11 " "Info: 3: + IC(0.988 ns) + CELL(0.872 ns) = 2.878 ns; Loc. = Unassigned; Fanout = 11; REG Node = 'ADPCM_Decoder_1_Bit:u6\|ADPCM_Decoder_Step_Size_Table_Pointer\[9\]'" {  } { { "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" "1.860 ns" { CLOCK_IN~clkctrl ADPCM_Decoder_1_Bit:u6|ADPCM_Decoder_Step_Size_Table_Pointer[9] } "NODE_NAME" } } { "HD_ADPCM_Codec.vhd" "" { Text "D:/HD_ADPCM/HD_ADPCM_1Bit_Stereo_Decoder/HD_ADPCM_Codec.vhd" 943 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 -1} { "Info" "ITDB_TOTAL_CELL_DELAY" "1.655 ns ( 57.51 % ) " "Info: Total cell delay = 1.655 ns ( 57.51 % )" {  } {  } 0 0 "Total cell delay = %1!s! %2!s!" 0 0 "" 0 -1} { "Info" "ITDB_TOTAL_IC_DELAY" "1.223 ns ( 42.49 % ) " "Info: Total interconnect delay = 1.223 ns ( 42.49 % )" {  } {  } 0 0 "Total interconnect delay = %1!s! %2!s!" 0 0 "" 0 -1}  } { { "HD_ADPCM_Codec.vhd" "" { Text "D:/HD_ADPCM/HD_ADPCM_1Bit_Stereo_Decoder/HD_ADPCM_Codec.vhd" 12 -1 0 } }  } 0 0 "%4!c! %5!s! clock path from clock \"%1!s!\" to %2!s! %6!s! is %3!s!" 0 0 "" 0 -1} { "Info" "ITDB_FULL_TCO_DELAY" "0.000 ns   " "Info:   Micro clock to output delay of source is 0.000 ns" {  } { { "HD_ADPCM_Codec.vhd" "" { Text "D:/HD_ADPCM/HD_ADPCM_1Bit_Stereo_Decoder/HD_ADPCM_Codec.vhd" 943 -1 0 } }  } 0 0 "%2!c! Micro clock to output delay of source is %1!s!" 0 0 "" 0 -1} { "Info" "ITDB_FULL_TSU_DELAY" "-0.038 ns   " "Info:   Micro setup delay of destination is -0.038 ns" {  } { { "HD_ADPCM_Codec.vhd" "" { Text "D:/HD_ADPCM/HD_ADPCM_1Bit_Stereo_Decoder/HD_ADPCM_Codec.vhd" 943 -1 0 } }  } 0 0 "%2!c! Micro setup delay of destination is %1!s!" 0 0 "" 0 -1} { "Info" "ITDB_FULL_DATA_PATH_RESULT" "49.583 ns - Longest register register " "Info: - Longest register to register delay is 49.583 ns" { { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.000 ns) 0.000 ns ADPCM_Decoder_1_Bit:u6\|ADPCM_Decoder_Step_Size_Table_Pointer\[9\] 1 REG Unassigned 11 " "Info: 1: + IC(0.000 ns) + CELL(0.000 ns) = 0.000 ns; Loc. = Unassigned; Fanout = 11; REG Node = 'ADPCM_Decoder_1_Bit:u6\|ADPCM_Decoder_Step_Size_Table_Pointer\[9\]'" {  } { { "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" "" { ADPCM_Decoder_1_Bit:u6|ADPCM_Decoder_Step_Size_Table_Pointer[9] } "NODE_NAME" } } { "HD_ADPCM_Codec.vhd" "" { Text "D:/HD_ADPCM/HD_ADPCM_1Bit_Stereo_Decoder/HD_ADPCM_Codec.vhd" 943 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 -1} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(3.257 ns) 3.257 ns ADPCM_Decoder_1_Bit:u6\|lpm_mult:Mult0\|mult_pu01:auto_generated\|mac_mult1~DATAOUT15 2 COMB Unassigned 1 " "Info: 2: + IC(0.000 ns) + CELL(3.257 ns) = 3.257 ns; Loc. = Unassigned; Fanout = 1; COMB Node = 'ADPCM_Decoder_1_Bit:u6\|lpm_mult:Mult0\|mult_pu01:auto_generated\|mac_mult1~DATAOUT15'" {  } { { "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" "3.257 ns" { ADPCM_Decoder_1_Bit:u6|ADPCM_Decoder_Step_Size_Table_Pointer[9] ADPCM_Decoder_1_Bit:u6|lpm_mult:Mult0|mult_pu01:auto_generated|mac_mult1~DATAOUT15 } "NODE_NAME" } } { "db/mult_pu01.tdf" "" { Text "D:/HD_ADPCM/HD_ADPCM_1Bit_Stereo_Decoder/db/mult_pu01.tdf" 35 2 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 -1} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.304 ns) 3.561 ns ADPCM_Decoder_1_Bit:u6\|lpm_mult:Mult0\|mult_pu01:auto_generated\|mac_out2~DATAOUT15 3 COMB Unassigned 4 " "Info: 3: + IC(0.000 ns) + CELL(0.304 ns) = 3.561 ns; Loc. = Unassigned; Fanout = 4; COMB Node = 'ADPCM_Decoder_1_Bit:u6\|lpm_mult:Mult0\|mult_pu01:auto_generated\|mac_out2~DATAOUT15'" {  } { { "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" "0.304 ns" { ADPCM_Decoder_1_Bit:u6|lpm_mult:Mult0|mult_pu01:auto_generated|mac_mult1~DATAOUT15 ADPCM_Decoder_1_Bit:u6|lpm_mult:Mult0|mult_pu01:auto_generated|mac_out2~DATAOUT15 } "NODE_NAME" } } { "db/mult_pu01.tdf" "" { Text "D:/HD_ADPCM/HD_ADPCM_1Bit_Stereo_Decoder/db/mult_pu01.tdf" 44 2 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 -1} { "Info" "ITDB_NODE_DELAY" "IC(0.965 ns) + CELL(0.517 ns) 5.043 ns ADPCM_Decoder_1_Bit:u6\|lpm_divide:Div0\|lpm_divide_aem:auto_generated\|sign_div_unsign_klh:divider\|alt_u_div_e2f:divider\|add_sub_6_result_int\[2\]~1 4 COMB Unassigned 2 " "Info: 4: + IC(0.965 ns) + CELL(0.517 ns) = 5.043 ns; Loc. = Unassigned; Fanout = 2; COMB Node = 'ADPCM_Decoder_1_Bit:u6\|lpm_divide:Div0\|lpm_divide_aem:auto_generated\|sign_div_unsign_klh:divider\|alt_u_div_e2f:divider\|add_sub_6_result_int\[2\]~1'" {  } { { "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" "1.482 ns" { ADPCM_Decoder_1_Bit:u6|lpm_mult:Mult0|mult_pu01:auto_generated|mac_out2~DATAOUT15 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_6_result_int[2]~1 } "NODE_NAME" } } { "db/alt_u_div_e2f.tdf" "" { Text "D:/HD_ADPCM/HD_ADPCM_1Bit_Stereo_Decoder/db/alt_u_div_e2f.tdf" 106 22 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 -1} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.080 ns) 5.123 ns ADPCM_Decoder_1_Bit:u6\|lpm_divide:Div0\|lpm_divide_aem:auto_generated\|sign_div_unsign_klh:divider\|alt_u_div_e2f:divider\|add_sub_6_result_int\[3\]~3 5 COMB Unassigned 2 " "Info: 5: + IC(0.000 ns) + CELL(0.080 ns) = 5.123 ns; Loc. = Unassigned; Fanout = 2; COMB Node = 'ADPCM_Decoder_1_Bit:u6\|lpm_divide:Div0\|lpm_divide_aem:auto_generated\|sign_div_unsign_klh:divider\|alt_u_div_e2f:divider\|add_sub_6_result_int\[3\]~3'" {  } { { "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" "0.080 ns" { ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_6_result_int[2]~1 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_6_result_int[3]~3 } "NODE_NAME" } } { "db/alt_u_div_e2f.tdf" "" { Text "D:/HD_ADPCM/HD_ADPCM_1Bit_Stereo_Decoder/db/alt_u_div_e2f.tdf" 106 22 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 -1} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.080 ns) 5.203 ns ADPCM_Decoder_1_Bit:u6\|lpm_divide:Div0\|lpm_divide_aem:auto_generated\|sign_div_unsign_klh:divider\|alt_u_div_e2f:divider\|add_sub_6_result_int\[4\]~5 6 COMB Unassigned 2 " "Info: 6: + IC(0.000 ns) + CELL(0.080 ns) = 5.203 ns; Loc. = Unassigned; Fanout = 2; COMB Node = 'ADPCM_Decoder_1_Bit:u6\|lpm_divide:Div0\|lpm_divide_aem:auto_generated\|sign_div_unsign_klh:divider\|alt_u_div_e2f:divider\|add_sub_6_result_int\[4\]~5'" {  } { { "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" "0.080 ns" { ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_6_result_int[3]~3 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_6_result_int[4]~5 } "NODE_NAME" } } { "db/alt_u_div_e2f.tdf" "" { Text "D:/HD_ADPCM/HD_ADPCM_1Bit_Stereo_Decoder/db/alt_u_div_e2f.tdf" 106 22 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 -1} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.080 ns) 5.283 ns ADPCM_Decoder_1_Bit:u6\|lpm_divide:Div0\|lpm_divide_aem:auto_generated\|sign_div_unsign_klh:divider\|alt_u_div_e2f:divider\|add_sub_6_result_int\[5\]~7 7 COMB Unassigned 2 " "Info: 7: + IC(0.000 ns) + CELL(0.080 ns) = 5.283 ns; Loc. = Unassigned; Fanout = 2; COMB Node = 'ADPCM_Decoder_1_Bit:u6\|lpm_divide:Div0\|lpm_divide_aem:auto_generated\|sign_div_unsign_klh:divider\|alt_u_div_e2f:divider\|add_sub_6_result_int\[5\]~7'" {  } { { "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" "0.080 ns" { ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_6_result_int[4]~5 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_6_result_int[5]~7 } "NODE_NAME" } } { "db/alt_u_div_e2f.tdf" "" { Text "D:/HD_ADPCM/HD_ADPCM_1Bit_Stereo_Decoder/db/alt_u_div_e2f.tdf" 106 22 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 -1} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.080 ns) 5.363 ns ADPCM_Decoder_1_Bit:u6\|lpm_divide:Div0\|lpm_divide_aem:auto_generated\|sign_div_unsign_klh:divider\|alt_u_div_e2f:divider\|add_sub_6_result_int\[6\]~9 8 COMB Unassigned 1 " "Info: 8: + IC(0.000 ns) + CELL(0.080 ns) = 5.363 ns; Loc. = Unassigned; Fanout = 1; COMB Node = 'ADPCM_Decoder_1_Bit:u6\|lpm_divide:Div0\|lpm_divide_aem:auto_generated\|sign_div_unsign_klh:divider\|alt_u_div_e2f:divider\|add_sub_6_result_int\[6\]~9'" {  } { { "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" "0.080 ns" { ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_6_result_int[5]~7 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_6_result_int[6]~9 } "NODE_NAME" } } { "db/alt_u_div_e2f.tdf" "" { Text "D:/HD_ADPCM/HD_ADPCM_1Bit_Stereo_Decoder/db/alt_u_div_e2f.tdf" 106 22 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 -1} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.458 ns) 5.821 ns ADPCM_Decoder_1_Bit:u6\|lpm_divide:Div0\|lpm_divide_aem:auto_generated\|sign_div_unsign_klh:divider\|alt_u_div_e2f:divider\|add_sub_6_result_int\[7\]~10 9 COMB Unassigned 19 " "Info: 9: + IC(0.000 ns) + CELL(0.458 ns) = 5.821 ns; Loc. = Unassigned; Fanout = 19; COMB Node = 'ADPCM_Decoder_1_Bit:u6\|lpm_divide:Div0\|lpm_divide_aem:auto_generated\|sign_div_unsign_klh:divider\|alt_u_div_e2f:divider\|add_sub_6_result_int\[7\]~10'" {  } { { "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" "0.458 ns" { ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_6_result_int[6]~9 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_6_result_int[7]~10 } "NODE_NAME" } } { "db/alt_u_div_e2f.tdf" "" { Text "D:/HD_ADPCM/HD_ADPCM_1Bit_Stereo_Decoder/db/alt_u_div_e2f.tdf" 106 22 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 -1} { "Info" "ITDB_NODE_DELAY" "IC(1.073 ns) + CELL(0.177 ns) 7.071 ns ADPCM_Decoder_1_Bit:u6\|lpm_divide:Div0\|lpm_divide_aem:auto_generated\|sign_div_unsign_klh:divider\|alt_u_div_e2f:divider\|StageOut\[50\]~221 10 COMB Unassigned 2 " "Info: 10: + IC(1.073 ns) + CELL(0.177 ns) = 7.071 ns; Loc. = Unassigned; Fanout = 2; COMB Node = 'ADPCM_Decoder_1_Bit:u6\|lpm_divide:Div0\|lpm_divide_aem:auto_generated\|sign_div_unsign_klh:divider\|alt_u_div_e2f:divider\|StageOut\[50\]~221'" {  } { { "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" "1.250 ns" { ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_6_result_int[7]~10 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|StageOut[50]~221 } "NODE_NAME" } } { "db/alt_u_div_e2f.tdf" "" { Text "D:/HD_ADPCM/HD_ADPCM_1Bit_Stereo_Decoder/db/alt_u_div_e2f.tdf" 138 10 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 -1} { "Info" "ITDB_NODE_DELAY" "IC(1.073 ns) + CELL(0.495 ns) 8.639 ns ADPCM_Decoder_1_Bit:u6\|lpm_divide:Div0\|lpm_divide_aem:auto_generated\|sign_div_unsign_klh:divider\|alt_u_div_e2f:divider\|add_sub_7_result_int\[3\]~3 11 COMB Unassigned 2 " "Info: 11: + IC(1.073 ns) + CELL(0.495 ns) = 8.639 ns; Loc. = Unassigned; Fanout = 2; COMB Node = 'ADPCM_Decoder_1_Bit:u6\|lpm_divide:Div0\|lpm_divide_aem:auto_generated\|sign_div_unsign_klh:divider\|alt_u_div_e2f:divider\|add_sub_7_result_int\[3\]~3'" {  } { { "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" "1.568 ns" { ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|StageOut[50]~221 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_7_result_int[3]~3 } "NODE_NAME" } } { "db/alt_u_div_e2f.tdf" "" { Text "D:/HD_ADPCM/HD_ADPCM_1Bit_Stereo_Decoder/db/alt_u_div_e2f.tdf" 111 22 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 -1} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.080 ns) 8.719 ns ADPCM_Decoder_1_Bit:u6\|lpm_divide:Div0\|lpm_divide_aem:auto_generated\|sign_div_unsign_klh:divider\|alt_u_div_e2f:divider\|add_sub_7_result_int\[4\]~5 12 COMB Unassigned 2 " "Info: 12: + IC(0.000 ns) + CELL(0.080 ns) = 8.719 ns; Loc. = Unassigned; Fanout = 2; COMB Node = 'ADPCM_Decoder_1_Bit:u6\|lpm_divide:Div0\|lpm_divide_aem:auto_generated\|sign_div_unsign_klh:divider\|alt_u_div_e2f:divider\|add_sub_7_result_int\[4\]~5'" {  } { { "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" "0.080 ns" { ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_7_result_int[3]~3 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_7_result_int[4]~5 } "NODE_NAME" } } { "db/alt_u_div_e2f.tdf" "" { Text "D:/HD_ADPCM/HD_ADPCM_1Bit_Stereo_Decoder/db/alt_u_div_e2f.tdf" 111 22 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 -1} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.080 ns) 8.799 ns ADPCM_Decoder_1_Bit:u6\|lpm_divide:Div0\|lpm_divide_aem:auto_generated\|sign_div_unsign_klh:divider\|alt_u_div_e2f:divider\|add_sub_7_result_int\[5\]~7 13 COMB Unassigned 2 " "Info: 13: + IC(0.000 ns) + CELL(0.080 ns) = 8.799 ns; Loc. = Unassigned; Fanout = 2; COMB Node = 'ADPCM_Decoder_1_Bit:u6\|lpm_divide:Div0\|lpm_divide_aem:auto_generated\|sign_div_unsign_klh:divider\|alt_u_div_e2f:divider\|add_sub_7_result_int\[5\]~7'" {  } { { "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" "0.080 ns" { ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_7_result_int[4]~5 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_7_result_int[5]~7 } "NODE_NAME" } } { "db/alt_u_div_e2f.tdf" "" { Text "D:/HD_ADPCM/HD_ADPCM_1Bit_Stereo_Decoder/db/alt_u_div_e2f.tdf" 111 22 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 -1} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.080 ns) 8.879 ns ADPCM_Decoder_1_Bit:u6\|lpm_divide:Div0\|lpm_divide_aem:auto_generated\|sign_div_unsign_klh:divider\|alt_u_div_e2f:divider\|add_sub_7_result_int\[6\]~9 14 COMB Unassigned 1 " "Info: 14: + IC(0.000 ns) + CELL(0.080 ns) = 8.879 ns; Loc. = Unassigned; Fanout = 1; COMB Node = 'ADPCM_Decoder_1_Bit:u6\|lpm_divide:Div0\|lpm_divide_aem:auto_generated\|sign_div_unsign_klh:divider\|alt_u_div_e2f:divider\|add_sub_7_result_int\[6\]~9'" {  } { { "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" "0.080 ns" { ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_7_result_int[5]~7 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_7_result_int[6]~9 } "NODE_NAME" } } { "db/alt_u_div_e2f.tdf" "" { Text "D:/HD_ADPCM/HD_ADPCM_1Bit_Stereo_Decoder/db/alt_u_div_e2f.tdf" 111 22 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 -1} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.080 ns) 8.959 ns ADPCM_Decoder_1_Bit:u6\|lpm_divide:Div0\|lpm_divide_aem:auto_generated\|sign_div_unsign_klh:divider\|alt_u_div_e2f:divider\|add_sub_7_result_int\[7\]~11 15 COMB Unassigned 1 " "Info: 15: + IC(0.000 ns) + CELL(0.080 ns) = 8.959 ns; Loc. = Unassigned; Fanout = 1; COMB Node = 'ADPCM_Decoder_1_Bit:u6\|lpm_divide:Div0\|lpm_divide_aem:auto_generated\|sign_div_unsign_klh:divider\|alt_u_div_e2f:divider\|add_sub_7_result_int\[7\]~11'" {  } { { "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" "0.080 ns" { ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_7_result_int[6]~9 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_7_result_int[7]~11 } "NODE_NAME" } } { "db/alt_u_div_e2f.tdf" "" { Text "D:/HD_ADPCM/HD_ADPCM_1Bit_Stereo_Decoder/db/alt_u_div_e2f.tdf" 111 22 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 -1} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.458 ns) 9.417 ns ADPCM_Decoder_1_Bit:u6\|lpm_divide:Div0\|lpm_divide_aem:auto_generated\|sign_div_unsign_klh:divider\|alt_u_div_e2f:divider\|add_sub_7_result_int\[8\]~12 16 COMB Unassigned 20 " "Info: 16: + IC(0.000 ns) + CELL(0.458 ns) = 9.417 ns; Loc. = Unassigned; Fanout = 20; COMB Node = 'ADPCM_Decoder_1_Bit:u6\|lpm_divide:Div0\|lpm_divide_aem:auto_generated\|sign_div_unsign_klh:divider\|alt_u_div_e2f:divider\|add_sub_7_result_int\[8\]~12'" {  } { { "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" "0.458 ns" { ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_7_result_int[7]~11 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_7_result_int[8]~12 } "NODE_NAME" } } { "db/alt_u_div_e2f.tdf" "" { Text "D:/HD_ADPCM/HD_ADPCM_1Bit_Stereo_Decoder/db/alt_u_div_e2f.tdf" 111 22 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 -1} { "Info" "ITDB_NODE_DELAY" "IC(0.388 ns) + CELL(0.521 ns) 10.326 ns ADPCM_Decoder_1_Bit:u6\|lpm_divide:Div0\|lpm_divide_aem:auto_generated\|sign_div_unsign_klh:divider\|alt_u_div_e2f:divider\|StageOut\[58\]~197 17 COMB Unassigned 2 " "Info: 17: + IC(0.388 ns) + CELL(0.521 ns) = 10.326 ns; Loc. = Unassigned; Fanout = 2; COMB Node = 'ADPCM_Decoder_1_Bit:u6\|lpm_divide:Div0\|lpm_divide_aem:auto_generated\|sign_div_unsign_klh:divider\|alt_u_div_e2f:divider\|StageOut\[58\]~197'" {  } { { "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" "0.909 ns" { ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_7_result_int[8]~12 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|StageOut[58]~197 } "NODE_NAME" } } { "db/alt_u_div_e2f.tdf" "" { Text "D:/HD_ADPCM/HD_ADPCM_1Bit_Stereo_Decoder/db/alt_u_div_e2f.tdf" 138 10 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 -1} { "Info" "ITDB_NODE_DELAY" "IC(1.015 ns) + CELL(0.517 ns) 11.858 ns ADPCM_Decoder_1_Bit:u6\|lpm_divide:Div0\|lpm_divide_aem:auto_generated\|sign_div_unsign_klh:divider\|alt_u_div_e2f:divider\|add_sub_8_result_int\[3\]~3 18 COMB Unassigned 2 " "Info: 18: + IC(1.015 ns) + CELL(0.517 ns) = 11.858 ns; Loc. = Unassigned; Fanout = 2; COMB Node = 'ADPCM_Decoder_1_Bit:u6\|lpm_divide:Div0\|lpm_divide_aem:auto_generated\|sign_div_unsign_klh:divider\|alt_u_div_e2f:divider\|add_sub_8_result_int\[3\]~3'" {  } { { "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" "1.532 ns" { ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|StageOut[58]~197 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_8_result_int[3]~3 } "NODE_NAME" } } { "db/alt_u_div_e2f.tdf" "" { Text "D:/HD_ADPCM/HD_ADPCM_1Bit_Stereo_Decoder/db/alt_u_div_e2f.tdf" 116 22 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 -1} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.080 ns) 11.938 ns ADPCM_Decoder_1_Bit:u6\|lpm_divide:Div0\|lpm_divide_aem:auto_generated\|sign_div_unsign_klh:divider\|alt_u_div_e2f:divider\|add_sub_8_result_int\[4\]~5 19 COMB Unassigned 2 " "Info: 19: + IC(0.000 ns) + CELL(0.080 ns) = 11.938 ns; Loc. = Unassigned; Fanout = 2; COMB Node = 'ADPCM_Decoder_1_Bit:u6\|lpm_divide:Div0\|lpm_divide_aem:auto_generated\|sign_div_unsign_klh:divider\|alt_u_div_e2f:divider\|add_sub_8_result_int\[4\]~5'" {  } { { "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" "0.080 ns" { ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_8_result_int[3]~3 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_8_result_int[4]~5 } "NODE_NAME" } } { "db/alt_u_div_e2f.tdf" "" { Text "D:/HD_ADPCM/HD_ADPCM_1Bit_Stereo_Decoder/db/alt_u_div_e2f.tdf" 116 22 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 -1} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.080 ns) 12.018 ns ADPCM_Decoder_1_Bit:u6\|lpm_divide:Div0\|lpm_divide_aem:auto_generated\|sign_div_unsign_klh:divider\|alt_u_div_e2f:divider\|add_sub_8_result_int\[5\]~7 20 COMB Unassigned 2 " "Info: 20: + IC(0.000 ns) + CELL(0.080 ns) = 12.018 ns; Loc. = Unassigned; Fanout = 2; COMB Node = 'ADPCM_Decoder_1_Bit:u6\|lpm_divide:Div0\|lpm_divide_aem:auto_generated\|sign_div_unsign_klh:divider\|alt_u_div_e2f:divider\|add_sub_8_result_int\[5\]~7'" {  } { { "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" "0.080 ns" { ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_8_result_int[4]~5 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_8_result_int[5]~7 } "NODE_NAME" } } { "db/alt_u_div_e2f.tdf" "" { Text "D:/HD_ADPCM/HD_ADPCM_1Bit_Stereo_Decoder/db/alt_u_div_e2f.tdf" 116 22 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 -1} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.080 ns) 12.098 ns ADPCM_Decoder_1_Bit:u6\|lpm_divide:Div0\|lpm_divide_aem:auto_generated\|sign_div_unsign_klh:divider\|alt_u_div_e2f:divider\|add_sub_8_result_int\[6\]~9 21 COMB Unassigned 1 " "Info: 21: + IC(0.000 ns) + CELL(0.080 ns) = 12.098 ns; Loc. = Unassigned; Fanout = 1; COMB Node = 'ADPCM_Decoder_1_Bit:u6\|lpm_divide:Div0\|lpm_divide_aem:auto_generated\|sign_div_unsign_klh:divider\|alt_u_div_e2f:divider\|add_sub_8_result_int\[6\]~9'" {  } { { "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" "0.080 ns" { ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_8_result_int[5]~7 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_8_result_int[6]~9 } "NODE_NAME" } } { "db/alt_u_div_e2f.tdf" "" { Text "D:/HD_ADPCM/HD_ADPCM_1Bit_Stereo_Decoder/db/alt_u_div_e2f.tdf" 116 22 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 -1} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.080 ns) 12.178 ns ADPCM_Decoder_1_Bit:u6\|lpm_divide:Div0\|lpm_divide_aem:auto_generated\|sign_div_unsign_klh:divider\|alt_u_div_e2f:divider\|add_sub_8_result_int\[7\]~11 22 COMB Unassigned 1 " "Info: 22: + IC(0.000 ns) + CELL(0.080 ns) = 12.178 ns; Loc. = Unassigned; Fanout = 1; COMB Node = 'ADPCM_Decoder_1_Bit:u6\|lpm_divide:Div0\|lpm_divide_aem:auto_generated\|sign_div_unsign_klh:divider\|alt_u_div_e2f:divider\|add_sub_8_result_int\[7\]~11'" {  } { { "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" "0.080 ns" { ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_8_result_int[6]~9 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_8_result_int[7]~11 } "NODE_NAME" } } { "db/alt_u_div_e2f.tdf" "" { Text "D:/HD_ADPCM/HD_ADPCM_1Bit_Stereo_Decoder/db/alt_u_div_e2f.tdf" 116 22 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 -1} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.458 ns) 12.636 ns ADPCM_Decoder_1_Bit:u6\|lpm_divide:Div0\|lpm_divide_aem:auto_generated\|sign_div_unsign_klh:divider\|alt_u_div_e2f:divider\|add_sub_8_result_int\[8\]~12 23 COMB Unassigned 20 " "Info: 23: + IC(0.000 ns) + CELL(0.458 ns) = 12.636 ns; Loc. = Unassigned; Fanout = 20; COMB Node = 'ADPCM_Decoder_1_Bit:u6\|lpm_divide:Div0\|lpm_divide_aem:auto_generated\|sign_div_unsign_klh:divider\|alt_u_div_e2f:divider\|add_sub_8_result_int\[8\]~12'" {  } { { "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" "0.458 ns" { ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_8_result_int[7]~11 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_8_result_int[8]~12 } "NODE_NAME" } } { "db/alt_u_div_e2f.tdf" "" { Text "D:/HD_ADPCM/HD_ADPCM_1Bit_Stereo_Decoder/db/alt_u_div_e2f.tdf" 116 22 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 -1} { "Info" "ITDB_NODE_DELAY" "IC(1.039 ns) + CELL(0.178 ns) 13.853 ns ADPCM_Decoder_1_Bit:u6\|lpm_divide:Div0\|lpm_divide_aem:auto_generated\|sign_div_unsign_klh:divider\|alt_u_div_e2f:divider\|StageOut\[67\]~581 24 COMB Unassigned 3 " "Info: 24: + IC(1.039 ns) + CELL(0.178 ns) = 13.853 ns; Loc. = Unassigned; Fanout = 3; COMB Node = 'ADPCM_Decoder_1_Bit:u6\|lpm_divide:Div0\|lpm_divide_aem:auto_generated\|sign_div_unsign_klh:divider\|alt_u_div_e2f:divider\|StageOut\[67\]~581'" {  } { { "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" "1.217 ns" { ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_8_result_int[8]~12 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|StageOut[67]~581 } "NODE_NAME" } } { "db/alt_u_div_e2f.tdf" "" { Text "D:/HD_ADPCM/HD_ADPCM_1Bit_Stereo_Decoder/db/alt_u_div_e2f.tdf" 138 10 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 -1} { "Info" "ITDB_NODE_DELAY" "IC(1.375 ns) + CELL(0.517 ns) 15.745 ns ADPCM_Decoder_1_Bit:u6\|lpm_divide:Div0\|lpm_divide_aem:auto_generated\|sign_div_unsign_klh:divider\|alt_u_div_e2f:divider\|add_sub_9_result_int\[4\]~5 25 COMB Unassigned 2 " "Info: 25: + IC(1.375 ns) + CELL(0.517 ns) = 15.745 ns; Loc. = Unassigned; Fanout = 2; COMB Node = 'ADPCM_Decoder_1_Bit:u6\|lpm_divide:Div0\|lpm_divide_aem:auto_generated\|sign_div_unsign_klh:divider\|alt_u_div_e2f:divider\|add_sub_9_result_int\[4\]~5'" {  } { { "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" "1.892 ns" { ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|StageOut[67]~581 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_9_result_int[4]~5 } "NODE_NAME" } } { "db/alt_u_div_e2f.tdf" "" { Text "D:/HD_ADPCM/HD_ADPCM_1Bit_Stereo_Decoder/db/alt_u_div_e2f.tdf" 121 22 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 -1} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.080 ns) 15.825 ns ADPCM_Decoder_1_Bit:u6\|lpm_divide:Div0\|lpm_divide_aem:auto_generated\|sign_div_unsign_klh:divider\|alt_u_div_e2f:divider\|add_sub_9_result_int\[5\]~7 26 COMB Unassigned 2 " "Info: 26: + IC(0.000 ns) + CELL(0.080 ns) = 15.825 ns; Loc. = Unassigned; Fanout = 2; COMB Node = 'ADPCM_Decoder_1_Bit:u6\|lpm_divide:Div0\|lpm_divide_aem:auto_generated\|sign_div_unsign_klh:divider\|alt_u_div_e2f:divider\|add_sub_9_result_int\[5\]~7'" {  } { { "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" "0.080 ns" { ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_9_result_int[4]~5 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_9_result_int[5]~7 } "NODE_NAME" } } { "db/alt_u_div_e2f.tdf" "" { Text "D:/HD_ADPCM/HD_ADPCM_1Bit_Stereo_Decoder/db/alt_u_div_e2f.tdf" 121 22 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 -1} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.080 ns) 15.905 ns ADPCM_Decoder_1_Bit:u6\|lpm_divide:Div0\|lpm_divide_aem:auto_generated\|sign_div_unsign_klh:divider\|alt_u_div_e2f:divider\|add_sub_9_result_int\[6\]~9 27 COMB Unassigned 1 " "Info: 27: + IC(0.000 ns) + CELL(0.080 ns) = 15.905 ns; Loc. = Unassigned; Fanout = 1; COMB Node = 'ADPCM_Decoder_1_Bit:u6\|lpm_divide:Div0\|lpm_divide_aem:auto_generated\|sign_div_unsign_klh:divider\|alt_u_div_e2f:divider\|add_sub_9_result_int\[6\]~9'" {  } { { "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" "0.080 ns" { ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_9_result_int[5]~7 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_9_result_int[6]~9 } "NODE_NAME" } } { "db/alt_u_div_e2f.tdf" "" { Text "D:/HD_ADPCM/HD_ADPCM_1Bit_Stereo_Decoder/db/alt_u_div_e2f.tdf" 121 22 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 -1} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.080 ns) 15.985 ns ADPCM_Decoder_1_Bit:u6\|lpm_divide:Div0\|lpm_divide_aem:auto_generated\|sign_div_unsign_klh:divider\|alt_u_div_e2f:divider\|add_sub_9_result_int\[7\]~11 28 COMB Unassigned 1 " "Info: 28: + IC(0.000 ns) + CELL(0.080 ns) = 15.985 ns; Loc. = Unassigned; Fanout = 1; COMB Node = 'ADPCM_Decoder_1_Bit:u6\|lpm_divide:Div0\|lpm_divide_aem:auto_generated\|sign_div_unsign_klh:divider\|alt_u_div_e2f:divider\|add_sub_9_result_int\[7\]~11'" {  } { { "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" "0.080 ns" { ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_9_result_int[6]~9 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_9_result_int[7]~11 } "NODE_NAME" } } { "db/alt_u_div_e2f.tdf" "" { Text "D:/HD_ADPCM/HD_ADPCM_1Bit_Stereo_Decoder/db/alt_u_div_e2f.tdf" 121 22 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 -1} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.458 ns) 16.443 ns ADPCM_Decoder_1_Bit:u6\|lpm_divide:Div0\|lpm_divide_aem:auto_generated\|sign_div_unsign_klh:divider\|alt_u_div_e2f:divider\|add_sub_9_result_int\[8\]~12 29 COMB Unassigned 20 " "Info: 29: + IC(0.000 ns) + CELL(0.458 ns) = 16.443 ns; Loc. = Unassigned; Fanout = 20; COMB Node = 'ADPCM_Decoder_1_Bit:u6\|lpm_divide:Div0\|lpm_divide_aem:auto_generated\|sign_div_unsign_klh:divider\|alt_u_div_e2f:divider\|add_sub_9_result_int\[8\]~12'" {  } { { "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" "0.458 ns" { ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_9_result_int[7]~11 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_9_result_int[8]~12 } "NODE_NAME" } } { "db/alt_u_div_e2f.tdf" "" { Text "D:/HD_ADPCM/HD_ADPCM_1Bit_Stereo_Decoder/db/alt_u_div_e2f.tdf" 121 22 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 -1} { "Info" "ITDB_NODE_DELAY" "IC(1.039 ns) + CELL(0.177 ns) 17.659 ns ADPCM_Decoder_1_Bit:u6\|lpm_divide:Div0\|lpm_divide_aem:auto_generated\|sign_div_unsign_klh:divider\|alt_u_div_e2f:divider\|StageOut\[73\]~174 30 COMB Unassigned 2 " "Info: 30: + IC(1.039 ns) + CELL(0.177 ns) = 17.659 ns; Loc. = Unassigned; Fanout = 2; COMB Node = 'ADPCM_Decoder_1_Bit:u6\|lpm_divide:Div0\|lpm_divide_aem:auto_generated\|sign_div_unsign_klh:divider\|alt_u_div_e2f:divider\|StageOut\[73\]~174'" {  } { { "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" "1.216 ns" { ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_9_result_int[8]~12 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|StageOut[73]~174 } "NODE_NAME" } } { "db/alt_u_div_e2f.tdf" "" { Text "D:/HD_ADPCM/HD_ADPCM_1Bit_Stereo_Decoder/db/alt_u_div_e2f.tdf" 138 10 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 -1} { "Info" "ITDB_NODE_DELAY" "IC(0.498 ns) + CELL(0.495 ns) 18.652 ns ADPCM_Decoder_1_Bit:u6\|lpm_divide:Div0\|lpm_divide_aem:auto_generated\|sign_div_unsign_klh:divider\|alt_u_div_e2f:divider\|add_sub_10_result_int\[2\]~1 31 COMB Unassigned 2 " "Info: 31: + IC(0.498 ns) + CELL(0.495 ns) = 18.652 ns; Loc. = Unassigned; Fanout = 2; COMB Node = 'ADPCM_Decoder_1_Bit:u6\|lpm_divide:Div0\|lpm_divide_aem:auto_generated\|sign_div_unsign_klh:divider\|alt_u_div_e2f:divider\|add_sub_10_result_int\[2\]~1'" {  } { { "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" "0.993 ns" { ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|StageOut[73]~174 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_10_result_int[2]~1 } "NODE_NAME" } } { "db/alt_u_div_e2f.tdf" "" { Text "D:/HD_ADPCM/HD_ADPCM_1Bit_Stereo_Decoder/db/alt_u_div_e2f.tdf" 36 23 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 -1} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.080 ns) 18.732 ns ADPCM_Decoder_1_Bit:u6\|lpm_divide:Div0\|lpm_divide_aem:auto_generated\|sign_div_unsign_klh:divider\|alt_u_div_e2f:divider\|add_sub_10_result_int\[3\]~3 32 COMB Unassigned 2 " "Info: 32: + IC(0.000 ns) + CELL(0.080 ns) = 18.732 ns; Loc. = Unassigned; Fanout = 2; COMB Node = 'ADPCM_Decoder_1_Bit:u6\|lpm_divide:Div0\|lpm_divide_aem:auto_generated\|sign_div_unsign_klh:divider\|alt_u_div_e2f:divider\|add_sub_10_result_int\[3\]~3'" {  } { { "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" "0.080 ns" { ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_10_result_int[2]~1 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_10_result_int[3]~3 } "NODE_NAME" } } { "db/alt_u_div_e2f.tdf" "" { Text "D:/HD_ADPCM/HD_ADPCM_1Bit_Stereo_Decoder/db/alt_u_div_e2f.tdf" 36 23 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 -1} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.080 ns) 18.812 ns ADPCM_Decoder_1_Bit:u6\|lpm_divide:Div0\|lpm_divide_aem:auto_generated\|sign_div_unsign_klh:divider\|alt_u_div_e2f:divider\|add_sub_10_result_int\[4\]~5 33 COMB Unassigned 2 " "Info: 33: + IC(0.000 ns) + CELL(0.080 ns) = 18.812 ns; Loc. = Unassigned; Fanout = 2; COMB Node = 'ADPCM_Decoder_1_Bit:u6\|lpm_divide:Div0\|lpm_divide_aem:auto_generated\|sign_div_unsign_klh:divider\|alt_u_div_e2f:divider\|add_sub_10_result_int\[4\]~5'" {  } { { "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" "0.080 ns" { ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_10_result_int[3]~3 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_10_result_int[4]~5 } "NODE_NAME" } } { "db/alt_u_div_e2f.tdf" "" { Text "D:/HD_ADPCM/HD_ADPCM_1Bit_Stereo_Decoder/db/alt_u_div_e2f.tdf" 36 23 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 -1} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.080 ns) 18.892 ns ADPCM_Decoder_1_Bit:u6\|lpm_divide:Div0\|lpm_divide_aem:auto_generated\|sign_div_unsign_klh:divider\|alt_u_div_e2f:divider\|add_sub_10_result_int\[5\]~7 34 COMB Unassigned 2 " "Info: 34: + IC(0.000 ns) + CELL(0.080 ns) = 18.892 ns; Loc. = Unassigned; Fanout = 2; COMB Node = 'ADPCM_Decoder_1_Bit:u6\|lpm_divide:Div0\|lpm_divide_aem:auto_generated\|sign_div_unsign_klh:divider\|alt_u_div_e2f:divider\|add_sub_10_result_int\[5\]~7'" {  } { { "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" "0.080 ns" { ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_10_result_int[4]~5 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_10_result_int[5]~7 } "NODE_NAME" } } { "db/alt_u_div_e2f.tdf" "" { Text "D:/HD_ADPCM/HD_ADPCM_1Bit_Stereo_Decoder/db/alt_u_div_e2f.tdf" 36 23 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 -1} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.080 ns) 18.972 ns ADPCM_Decoder_1_Bit:u6\|lpm_divide:Div0\|lpm_divide_aem:auto_generated\|sign_div_unsign_klh:divider\|alt_u_div_e2f:divider\|add_sub_10_result_int\[6\]~9 35 COMB Unassigned 1 " "Info: 35: + IC(0.000 ns) + CELL(0.080 ns) = 18.972 ns; Loc. = Unassigned; Fanout = 1; COMB Node = 'ADPCM_Decoder_1_Bit:u6\|lpm_divide:Div0\|lpm_divide_aem:auto_generated\|sign_div_unsign_klh:divider\|alt_u_div_e2f:divider\|add_sub_10_result_int\[6\]~9'" {  } { { "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" "0.080 ns" { ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_10_result_int[5]~7 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_10_result_int[6]~9 } "NODE_NAME" } } { "db/alt_u_div_e2f.tdf" "" { Text "D:/HD_ADPCM/HD_ADPCM_1Bit_Stereo_Decoder/db/alt_u_div_e2f.tdf" 36 23 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 -1} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.080 ns) 19.052 ns ADPCM_Decoder_1_Bit:u6\|lpm_divide:Div0\|lpm_divide_aem:auto_generated\|sign_div_unsign_klh:divider\|alt_u_div_e2f:divider\|add_sub_10_result_int\[7\]~11 36 COMB Unassigned 1 " "Info: 36: + IC(0.000 ns) + CELL(0.080 ns) = 19.052 ns; Loc. = Unassigned; Fanout = 1; COMB Node = 'ADPCM_Decoder_1_Bit:u6\|lpm_divide:Div0\|lpm_divide_aem:auto_generated\|sign_div_unsign_klh:divider\|alt_u_div_e2f:divider\|add_sub_10_result_int\[7\]~11'" {  } { { "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" "0.080 ns" { ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_10_result_int[6]~9 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_10_result_int[7]~11 } "NODE_NAME" } } { "db/alt_u_div_e2f.tdf" "" { Text "D:/HD_ADPCM/HD_ADPCM_1Bit_Stereo_Decoder/db/alt_u_div_e2f.tdf" 36 23 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 -1} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.458 ns) 19.510 ns ADPCM_Decoder_1_Bit:u6\|lpm_divide:Div0\|lpm_divide_aem:auto_generated\|sign_div_unsign_klh:divider\|alt_u_div_e2f:divider\|add_sub_10_result_int\[8\]~12 37 COMB Unassigned 20 " "Info: 37: + IC(0.000 ns) + CELL(0.458 ns) = 19.510 ns; Loc. = Unassigned; Fanout = 20; COMB Node = 'ADPCM_Decoder_1_Bit:u6\|lpm_divide:Div0\|lpm_divide_aem:auto_generated\|sign_div_unsign_klh:divider\|alt_u_div_e2f:divider\|add_sub_10_result_int\[8\]~12'" {  } { { "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" "0.458 ns" { ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_10_result_int[7]~11 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_10_result_int[8]~12 } "NODE_NAME" } } { "db/alt_u_div_e2f.tdf" "" { Text "D:/HD_ADPCM/HD_ADPCM_1Bit_Stereo_Decoder/db/alt_u_div_e2f.tdf" 36 23 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 -1} { "Info" "ITDB_NODE_DELAY" "IC(0.588 ns) + CELL(0.319 ns) 20.417 ns ADPCM_Decoder_1_Bit:u6\|lpm_divide:Div0\|lpm_divide_aem:auto_generated\|sign_div_unsign_klh:divider\|alt_u_div_e2f:divider\|StageOut\[83\]~544 38 COMB Unassigned 3 " "Info: 38: + IC(0.588 ns) + CELL(0.319 ns) = 20.417 ns; Loc. = Unassigned; Fanout = 3; COMB Node = 'ADPCM_Decoder_1_Bit:u6\|lpm_divide:Div0\|lpm_divide_aem:auto_generated\|sign_div_unsign_klh:divider\|alt_u_div_e2f:divider\|StageOut\[83\]~544'" {  } { { "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" "0.907 ns" { ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_10_result_int[8]~12 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|StageOut[83]~544 } "NODE_NAME" } } { "db/alt_u_div_e2f.tdf" "" { Text "D:/HD_ADPCM/HD_ADPCM_1Bit_Stereo_Decoder/db/alt_u_div_e2f.tdf" 138 10 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 -1} { "Info" "ITDB_NODE_DELAY" "IC(1.016 ns) + CELL(0.517 ns) 21.950 ns ADPCM_Decoder_1_Bit:u6\|lpm_divide:Div0\|lpm_divide_aem:auto_generated\|sign_div_unsign_klh:divider\|alt_u_div_e2f:divider\|add_sub_11_result_int\[4\]~5 39 COMB Unassigned 2 " "Info: 39: + IC(1.016 ns) + CELL(0.517 ns) = 21.950 ns; Loc. = Unassigned; Fanout = 2; COMB Node = 'ADPCM_Decoder_1_Bit:u6\|lpm_divide:Div0\|lpm_divide_aem:auto_generated\|sign_div_unsign_klh:divider\|alt_u_div_e2f:divider\|add_sub_11_result_int\[4\]~5'" {  } { { "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" "1.533 ns" { ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|StageOut[83]~544 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_11_result_int[4]~5 } "NODE_NAME" } } { "db/alt_u_div_e2f.tdf" "" { Text "D:/HD_ADPCM/HD_ADPCM_1Bit_Stereo_Decoder/db/alt_u_div_e2f.tdf" 41 23 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 -1} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.080 ns) 22.030 ns ADPCM_Decoder_1_Bit:u6\|lpm_divide:Div0\|lpm_divide_aem:auto_generated\|sign_div_unsign_klh:divider\|alt_u_div_e2f:divider\|add_sub_11_result_int\[5\]~7 40 COMB Unassigned 2 " "Info: 40: + IC(0.000 ns) + CELL(0.080 ns) = 22.030 ns; Loc. = Unassigned; Fanout = 2; COMB Node = 'ADPCM_Decoder_1_Bit:u6\|lpm_divide:Div0\|lpm_divide_aem:auto_generated\|sign_div_unsign_klh:divider\|alt_u_div_e2f:divider\|add_sub_11_result_int\[5\]~7'" {  } { { "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" "0.080 ns" { ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_11_result_int[4]~5 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_11_result_int[5]~7 } "NODE_NAME" } } { "db/alt_u_div_e2f.tdf" "" { Text "D:/HD_ADPCM/HD_ADPCM_1Bit_Stereo_Decoder/db/alt_u_div_e2f.tdf" 41 23 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 -1} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.080 ns) 22.110 ns ADPCM_Decoder_1_Bit:u6\|lpm_divide:Div0\|lpm_divide_aem:auto_generated\|sign_div_unsign_klh:divider\|alt_u_div_e2f:divider\|add_sub_11_result_int\[6\]~9 41 COMB Unassigned 1 " "Info: 41: + IC(0.000 ns) + CELL(0.080 ns) = 22.110 ns; Loc. = Unassigned; Fanout = 1; COMB Node = 'ADPCM_Decoder_1_Bit:u6\|lpm_divide:Div0\|lpm_divide_aem:auto_generated\|sign_div_unsign_klh:divider\|alt_u_div_e2f:divider\|add_sub_11_result_int\[6\]~9'" {  } { { "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" "0.080 ns" { ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_11_result_int[5]~7 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_11_result_int[6]~9 } "NODE_NAME" } } { "db/alt_u_div_e2f.tdf" "" { Text "D:/HD_ADPCM/HD_ADPCM_1Bit_Stereo_Decoder/db/alt_u_div_e2f.tdf" 41 23 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 -1} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.080 ns) 22.190 ns ADPCM_Decoder_1_Bit:u6\|lpm_divide:Div0\|lpm_divide_aem:auto_generated\|sign_div_unsign_klh:divider\|alt_u_div_e2f:divider\|add_sub_11_result_int\[7\]~11 42 COMB Unassigned 1 " "Info: 42: + IC(0.000 ns) + CELL(0.080 ns) = 22.190 ns; Loc. = Unassigned; Fanout = 1; COMB Node = 'ADPCM_Decoder_1_Bit:u6\|lpm_divide:Div0\|lpm_divide_aem:auto_generated\|sign_div_unsign_klh:divider\|alt_u_div_e2f:divider\|add_sub_11_result_int\[7\]~11'" {  } { { "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" "0.080 ns" { ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_11_result_int[6]~9 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_11_result_int[7]~11 } "NODE_NAME" } } { "db/alt_u_div_e2f.tdf" "" { Text "D:/HD_ADPCM/HD_ADPCM_1Bit_Stereo_Decoder/db/alt_u_div_e2f.tdf" 41 23 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 -1} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.458 ns) 22.648 ns ADPCM_Decoder_1_Bit:u6\|lpm_divide:Div0\|lpm_divide_aem:auto_generated\|sign_div_unsign_klh:divider\|alt_u_div_e2f:divider\|add_sub_11_result_int\[8\]~12 43 COMB Unassigned 20 " "Info: 43: + IC(0.000 ns) + CELL(0.458 ns) = 22.648 ns; Loc. = Unassigned; Fanout = 20; COMB Node = 'ADPCM_Decoder_1_Bit:u6\|lpm_divide:Div0\|lpm_divide_aem:auto_generated\|sign_div_unsign_klh:divider\|alt_u_div_e2f:divider\|add_sub_11_result_int\[8\]~12'" {  } { { "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" "0.458 ns" { ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_11_result_int[7]~11 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_11_result_int[8]~12 } "NODE_NAME" } } { "db/alt_u_div_e2f.tdf" "" { Text "D:/HD_ADPCM/HD_ADPCM_1Bit_Stereo_Decoder/db/alt_u_div_e2f.tdf" 41 23 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 -1} { "Info" "ITDB_NODE_DELAY" "IC(0.895 ns) + CELL(0.319 ns) 23.862 ns ADPCM_Decoder_1_Bit:u6\|lpm_divide:Div0\|lpm_divide_aem:auto_generated\|sign_div_unsign_klh:divider\|alt_u_div_e2f:divider\|StageOut\[92\]~547 44 COMB Unassigned 3 " "Info: 44: + IC(0.895 ns) + CELL(0.319 ns) = 23.862 ns; Loc. = Unassigned; Fanout = 3; COMB Node = 'ADPCM_Decoder_1_Bit:u6\|lpm_divide:Div0\|lpm_divide_aem:auto_generated\|sign_div_unsign_klh:divider\|alt_u_div_e2f:divider\|StageOut\[92\]~547'" {  } { { "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" "1.214 ns" { ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_11_result_int[8]~12 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|StageOut[92]~547 } "NODE_NAME" } } { "db/alt_u_div_e2f.tdf" "" { Text "D:/HD_ADPCM/HD_ADPCM_1Bit_Stereo_Decoder/db/alt_u_div_e2f.tdf" 138 10 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 -1} { "Info" "ITDB_NODE_DELAY" "IC(1.017 ns) + CELL(0.517 ns) 25.396 ns ADPCM_Decoder_1_Bit:u6\|lpm_divide:Div0\|lpm_divide_aem:auto_generated\|sign_div_unsign_klh:divider\|alt_u_div_e2f:divider\|add_sub_12_result_int\[5\]~7 45 COMB Unassigned 2 " "Info: 45: + IC(1.017 ns) + CELL(0.517 ns) = 25.396 ns; Loc. = Unassigned; Fanout = 2; COMB Node = 'ADPCM_Decoder_1_Bit:u6\|lpm_divide:Div0\|lpm_divide_aem:auto_generated\|sign_div_unsign_klh:divider\|alt_u_div_e2f:divider\|add_sub_12_result_int\[5\]~7'" {  } { { "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" "1.534 ns" { ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|StageOut[92]~547 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_12_result_int[5]~7 } "NODE_NAME" } } { "db/alt_u_div_e2f.tdf" "" { Text "D:/HD_ADPCM/HD_ADPCM_1Bit_Stereo_Decoder/db/alt_u_div_e2f.tdf" 46 23 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 -1} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.080 ns) 25.476 ns ADPCM_Decoder_1_Bit:u6\|lpm_divide:Div0\|lpm_divide_aem:auto_generated\|sign_div_unsign_klh:divider\|alt_u_div_e2f:divider\|add_sub_12_result_int\[6\]~9 46 COMB Unassigned 1 " "Info: 46: + IC(0.000 ns) + CELL(0.080 ns) = 25.476 ns; Loc. = Unassigned; Fanout = 1; COMB Node = 'ADPCM_Decoder_1_Bit:u6\|lpm_divide:Div0\|lpm_divide_aem:auto_generated\|sign_div_unsign_klh:divider\|alt_u_div_e2f:divider\|add_sub_12_result_int\[6\]~9'" {  } { { "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" "0.080 ns" { ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_12_result_int[5]~7 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_12_result_int[6]~9 } "NODE_NAME" } } { "db/alt_u_div_e2f.tdf" "" { Text "D:/HD_ADPCM/HD_ADPCM_1Bit_Stereo_Decoder/db/alt_u_div_e2f.tdf" 46 23 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 -1} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.080 ns) 25.556 ns ADPCM_Decoder_1_Bit:u6\|lpm_divide:Div0\|lpm_divide_aem:auto_generated\|sign_div_unsign_klh:divider\|alt_u_div_e2f:divider\|add_sub_12_result_int\[7\]~11 47 COMB Unassigned 1 " "Info: 47: + IC(0.000 ns) + CELL(0.080 ns) = 25.556 ns; Loc. = Unassigned; Fanout = 1; COMB Node = 'ADPCM_Decoder_1_Bit:u6\|lpm_divide:Div0\|lpm_divide_aem:auto_generated\|sign_div_unsign_klh:divider\|alt_u_div_e2f:divider\|add_sub_12_result_int\[7\]~11'" {  } { { "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" "0.080 ns" { ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_12_result_int[6]~9 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_12_result_int[7]~11 } "NODE_NAME" } } { "db/alt_u_div_e2f.tdf" "" { Text "D:/HD_ADPCM/HD_ADPCM_1Bit_Stereo_Decoder/db/alt_u_div_e2f.tdf" 46 23 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 -1} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.458 ns) 26.014 ns ADPCM_Decoder_1_Bit:u6\|lpm_divide:Div0\|lpm_divide_aem:auto_generated\|sign_div_unsign_klh:divider\|alt_u_div_e2f:divider\|add_sub_12_result_int\[8\]~12 48 COMB Unassigned 20 " "Info: 48: + IC(0.000 ns) + CELL(0.458 ns) = 26.014 ns; Loc. = Unassigned; Fanout = 20; COMB Node = 'ADPCM_Decoder_1_Bit:u6\|lpm_divide:Div0\|lpm_divide_aem:auto_generated\|sign_div_unsign_klh:divider\|alt_u_div_e2f:divider\|add_sub_12_result_int\[8\]~12'" {  } { { "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" "0.458 ns" { ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_12_result_int[7]~11 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_12_result_int[8]~12 } "NODE_NAME" } } { "db/alt_u_div_e2f.tdf" "" { Text "D:/HD_ADPCM/HD_ADPCM_1Bit_Stereo_Decoder/db/alt_u_div_e2f.tdf" 46 23 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 -1} { "Info" "ITDB_NODE_DELAY" "IC(0.896 ns) + CELL(0.319 ns) 27.229 ns ADPCM_Decoder_1_Bit:u6\|lpm_divide:Div0\|lpm_divide_aem:auto_generated\|sign_div_unsign_klh:divider\|alt_u_div_e2f:divider\|StageOut\[101\]~550 49 COMB Unassigned 3 " "Info: 49: + IC(0.896 ns) + CELL(0.319 ns) = 27.229 ns; Loc. = Unassigned; Fanout = 3; COMB Node = 'ADPCM_Decoder_1_Bit:u6\|lpm_divide:Div0\|lpm_divide_aem:auto_generated\|sign_div_unsign_klh:divider\|alt_u_div_e2f:divider\|StageOut\[101\]~550'" {  } { { "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" "1.215 ns" { ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_12_result_int[8]~12 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|StageOut[101]~550 } "NODE_NAME" } } { "db/alt_u_div_e2f.tdf" "" { Text "D:/HD_ADPCM/HD_ADPCM_1Bit_Stereo_Decoder/db/alt_u_div_e2f.tdf" 138 10 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 -1} { "Info" "ITDB_NODE_DELAY" "IC(1.359 ns) + CELL(0.517 ns) 29.105 ns ADPCM_Decoder_1_Bit:u6\|lpm_divide:Div0\|lpm_divide_aem:auto_generated\|sign_div_unsign_klh:divider\|alt_u_div_e2f:divider\|add_sub_13_result_int\[6\]~9 50 COMB Unassigned 1 " "Info: 50: + IC(1.359 ns) + CELL(0.517 ns) = 29.105 ns; Loc. = Unassigned; Fanout = 1; COMB Node = 'ADPCM_Decoder_1_Bit:u6\|lpm_divide:Div0\|lpm_divide_aem:auto_generated\|sign_div_unsign_klh:divider\|alt_u_div_e2f:divider\|add_sub_13_result_int\[6\]~9'" {  } { { "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" "1.876 ns" { ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|StageOut[101]~550 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_13_result_int[6]~9 } "NODE_NAME" } } { "db/alt_u_div_e2f.tdf" "" { Text "D:/HD_ADPCM/HD_ADPCM_1Bit_Stereo_Decoder/db/alt_u_div_e2f.tdf" 51 23 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 -1} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.080 ns) 29.185 ns ADPCM_Decoder_1_Bit:u6\|lpm_divide:Div0\|lpm_divide_aem:auto_generated\|sign_div_unsign_klh:divider\|alt_u_div_e2f:divider\|add_sub_13_result_int\[7\]~11 51 COMB Unassigned 1 " "Info: 51: + IC(0.000 ns) + CELL(0.080 ns) = 29.185 ns; Loc. = Unassigned; Fanout = 1; COMB Node = 'ADPCM_Decoder_1_Bit:u6\|lpm_divide:Div0\|lpm_divide_aem:auto_generated\|sign_div_unsign_klh:divider\|alt_u_div_e2f:divider\|add_sub_13_result_int\[7\]~11'" {  } { { "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" "0.080 ns" { ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_13_result_int[6]~9 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_13_result_int[7]~11 } "NODE_NAME" } } { "db/alt_u_div_e2f.tdf" "" { Text "D:/HD_ADPCM/HD_ADPCM_1Bit_Stereo_Decoder/db/alt_u_div_e2f.tdf" 51 23 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 -1} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.458 ns) 29.643 ns ADPCM_Decoder_1_Bit:u6\|lpm_divide:Div0\|lpm_divide_aem:auto_generated\|sign_div_unsign_klh:divider\|alt_u_div_e2f:divider\|add_sub_13_result_int\[8\]~12 52 COMB Unassigned 20 " "Info: 52: + IC(0.000 ns) + CELL(0.458 ns) = 29.643 ns; Loc. = Unassigned; Fanout = 20; COMB Node = 'ADPCM_Decoder_1_Bit:u6\|lpm_divide:Div0\|lpm_divide_aem:auto_generated\|sign_div_unsign_klh:divider\|alt_u_div_e2f:divider\|add_sub_13_result_int\[8\]~12'" {  } { { "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" "0.458 ns" { ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_13_result_int[7]~11 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_13_result_int[8]~12 } "NODE_NAME" } } { "db/alt_u_div_e2f.tdf" "" { Text "D:/HD_ADPCM/HD_ADPCM_1Bit_Stereo_Decoder/db/alt_u_div_e2f.tdf" 51 23 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 -1} { "Info" "ITDB_NODE_DELAY" "IC(1.238 ns) + CELL(0.319 ns) 31.200 ns ADPCM_Decoder_1_Bit:u6\|lpm_divide:Div0\|lpm_divide_aem:auto_generated\|sign_div_unsign_klh:divider\|alt_u_div_e2f:divider\|StageOut\[110\]~553 53 COMB Unassigned 1 " "Info: 53: + IC(1.238 ns) + CELL(0.319 ns) = 31.200 ns; Loc. = Unassigned; Fanout = 1; COMB Node = 'ADPCM_Decoder_1_Bit:u6\|lpm_divide:Div0\|lpm_divide_aem:auto_generated\|sign_div_unsign_klh:divider\|alt_u_div_e2f:divider\|StageOut\[110\]~553'" {  } { { "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" "1.557 ns" { ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_13_result_int[8]~12 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|StageOut[110]~553 } "NODE_NAME" } } { "db/alt_u_div_e2f.tdf" "" { Text "D:/HD_ADPCM/HD_ADPCM_1Bit_Stereo_Decoder/db/alt_u_div_e2f.tdf" 138 10 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 -1} { "Info" "ITDB_NODE_DELAY" "IC(1.362 ns) + CELL(0.517 ns) 33.079 ns ADPCM_Decoder_1_Bit:u6\|lpm_divide:Div0\|lpm_divide_aem:auto_generated\|sign_div_unsign_klh:divider\|alt_u_div_e2f:divider\|add_sub_14_result_int\[7\]~11 54 COMB Unassigned 1 " "Info: 54: + IC(1.362 ns) + CELL(0.517 ns) = 33.079 ns; Loc. = Unassigned; Fanout = 1; COMB Node = 'ADPCM_Decoder_1_Bit:u6\|lpm_divide:Div0\|lpm_divide_aem:auto_generated\|sign_div_unsign_klh:divider\|alt_u_div_e2f:divider\|add_sub_14_result_int\[7\]~11'" {  } { { "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" "1.879 ns" { ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|StageOut[110]~553 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_14_result_int[7]~11 } "NODE_NAME" } } { "db/alt_u_div_e2f.tdf" "" { Text "D:/HD_ADPCM/HD_ADPCM_1Bit_Stereo_Decoder/db/alt_u_div_e2f.tdf" 56 23 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 -1} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.458 ns) 33.537 ns ADPCM_Decoder_1_Bit:u6\|lpm_divide:Div0\|lpm_divide_aem:auto_generated\|sign_div_unsign_klh:divider\|alt_u_div_e2f:divider\|add_sub_14_result_int\[8\]~12 55 COMB Unassigned 20 " "Info: 55: + IC(0.000 ns) + CELL(0.458 ns) = 33.537 ns; Loc. = Unassigned; Fanout = 20; COMB Node = 'ADPCM_Decoder_1_Bit:u6\|lpm_divide:Div0\|lpm_divide_aem:auto_generated\|sign_div_unsign_klh:divider\|alt_u_div_e2f:divider\|add_sub_14_result_int\[8\]~12'" {  } { { "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" "0.458 ns" { ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_14_result_int[7]~11 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_14_result_int[8]~12 } "NODE_NAME" } } { "db/alt_u_div_e2f.tdf" "" { Text "D:/HD_ADPCM/HD_ADPCM_1Bit_Stereo_Decoder/db/alt_u_div_e2f.tdf" 56 23 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 -1} { "Info" "ITDB_NODE_DELAY" "IC(0.498 ns) + CELL(0.177 ns) 34.212 ns ADPCM_Decoder_1_Bit:u6\|lpm_divide:Div0\|lpm_divide_aem:auto_generated\|sign_div_unsign_klh:divider\|alt_u_div_e2f:divider\|StageOut\[113\]~94 56 COMB Unassigned 2 " "Info: 56: + IC(0.498 ns) + CELL(0.177 ns) = 34.212 ns; Loc. = Unassigned; Fanout = 2; COMB Node = 'ADPCM_Decoder_1_Bit:u6\|lpm_divide:Div0\|lpm_divide_aem:auto_generated\|sign_div_unsign_klh:divider\|alt_u_div_e2f:divider\|StageOut\[113\]~94'" {  } { { "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" "0.675 ns" { ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_14_result_int[8]~12 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|StageOut[113]~94 } "NODE_NAME" } } { "db/alt_u_div_e2f.tdf" "" { Text "D:/HD_ADPCM/HD_ADPCM_1Bit_Stereo_Decoder/db/alt_u_div_e2f.tdf" 138 10 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 -1} { "Info" "ITDB_NODE_DELAY" "IC(1.073 ns) + CELL(0.495 ns) 35.780 ns ADPCM_Decoder_1_Bit:u6\|lpm_divide:Div0\|lpm_divide_aem:auto_generated\|sign_div_unsign_klh:divider\|alt_u_div_e2f:divider\|add_sub_15_result_int\[2\]~1 57 COMB Unassigned 2 " "Info: 57: + IC(1.073 ns) + CELL(0.495 ns) = 35.780 ns; Loc. = Unassigned; Fanout = 2; COMB Node = 'ADPCM_Decoder_1_Bit:u6\|lpm_divide:Div0\|lpm_divide_aem:auto_generated\|sign_div_unsign_klh:divider\|alt_u_div_e2f:divider\|add_sub_15_result_int\[2\]~1'" {  } { { "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" "1.568 ns" { ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|StageOut[113]~94 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_15_result_int[2]~1 } "NODE_NAME" } } { "db/alt_u_div_e2f.tdf" "" { Text "D:/HD_ADPCM/HD_ADPCM_1Bit_Stereo_Decoder/db/alt_u_div_e2f.tdf" 61 23 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 -1} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.080 ns) 35.860 ns ADPCM_Decoder_1_Bit:u6\|lpm_divide:Div0\|lpm_divide_aem:auto_generated\|sign_div_unsign_klh:divider\|alt_u_div_e2f:divider\|add_sub_15_result_int\[3\]~3 58 COMB Unassigned 2 " "Info: 58: + IC(0.000 ns) + CELL(0.080 ns) = 35.860 ns; Loc. = Unassigned; Fanout = 2; COMB Node = 'ADPCM_Decoder_1_Bit:u6\|lpm_divide:Div0\|lpm_divide_aem:auto_generated\|sign_div_unsign_klh:divider\|alt_u_div_e2f:divider\|add_sub_15_result_int\[3\]~3'" {  } { { "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" "0.080 ns" { ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_15_result_int[2]~1 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_15_result_int[3]~3 } "NODE_NAME" } } { "db/alt_u_div_e2f.tdf" "" { Text "D:/HD_ADPCM/HD_ADPCM_1Bit_Stereo_Decoder/db/alt_u_div_e2f.tdf" 61 23 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 -1} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.080 ns) 35.940 ns ADPCM_Decoder_1_Bit:u6\|lpm_divide:Div0\|lpm_divide_aem:auto_generated\|sign_div_unsign_klh:divider\|alt_u_div_e2f:divider\|add_sub_15_result_int\[4\]~5 59 COMB Unassigned 2 " "Info: 59: + IC(0.000 ns) + CELL(0.080 ns) = 35.940 ns; Loc. = Unassigned; Fanout = 2; COMB Node = 'ADPCM_Decoder_1_Bit:u6\|lpm_divide:Div0\|lpm_divide_aem:auto_generated\|sign_div_unsign_klh:divider\|alt_u_div_e2f:divider\|add_sub_15_result_int\[4\]~5'" {  } { { "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" "0.080 ns" { ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_15_result_int[3]~3 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_15_result_int[4]~5 } "NODE_NAME" } } { "db/alt_u_div_e2f.tdf" "" { Text "D:/HD_ADPCM/HD_ADPCM_1Bit_Stereo_Decoder/db/alt_u_div_e2f.tdf" 61 23 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 -1} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.080 ns) 36.020 ns ADPCM_Decoder_1_Bit:u6\|lpm_divide:Div0\|lpm_divide_aem:auto_generated\|sign_div_unsign_klh:divider\|alt_u_div_e2f:divider\|add_sub_15_result_int\[5\]~7 60 COMB Unassigned 2 " "Info: 60: + IC(0.000 ns) + CELL(0.080 ns) = 36.020 ns; Loc. = Unassigned; Fanout = 2; COMB Node = 'ADPCM_Decoder_1_Bit:u6\|lpm_divide:Div0\|lpm_divide_aem:auto_generated\|sign_div_unsign_klh:divider\|alt_u_div_e2f:divider\|add_sub_15_result_int\[5\]~7'" {  } { { "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" "0.080 ns" { ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_15_result_int[4]~5 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_15_result_int[5]~7 } "NODE_NAME" } } { "db/alt_u_div_e2f.tdf" "" { Text "D:/HD_ADPCM/HD_ADPCM_1Bit_Stereo_Decoder/db/alt_u_div_e2f.tdf" 61 23 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 -1} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.080 ns) 36.100 ns ADPCM_Decoder_1_Bit:u6\|lpm_divide:Div0\|lpm_divide_aem:auto_generated\|sign_div_unsign_klh:divider\|alt_u_div_e2f:divider\|add_sub_15_result_int\[6\]~9 61 COMB Unassigned 1 " "Info: 61: + IC(0.000 ns) + CELL(0.080 ns) = 36.100 ns; Loc. = Unassigned; Fanout = 1; COMB Node = 'ADPCM_Decoder_1_Bit:u6\|lpm_divide:Div0\|lpm_divide_aem:auto_generated\|sign_div_unsign_klh:divider\|alt_u_div_e2f:divider\|add_sub_15_result_int\[6\]~9'" {  } { { "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" "0.080 ns" { ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_15_result_int[5]~7 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_15_result_int[6]~9 } "NODE_NAME" } } { "db/alt_u_div_e2f.tdf" "" { Text "D:/HD_ADPCM/HD_ADPCM_1Bit_Stereo_Decoder/db/alt_u_div_e2f.tdf" 61 23 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 -1} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.080 ns) 36.180 ns ADPCM_Decoder_1_Bit:u6\|lpm_divide:Div0\|lpm_divide_aem:auto_generated\|sign_div_unsign_klh:divider\|alt_u_div_e2f:divider\|add_sub_15_result_int\[7\]~11 62 COMB Unassigned 1 " "Info: 62: + IC(0.000 ns) + CELL(0.080 ns) = 36.180 ns; Loc. = Unassigned; Fanout = 1; COMB Node = 'ADPCM_Decoder_1_Bit:u6\|lpm_divide:Div0\|lpm_divide_aem:auto_generated\|sign_div_unsign_klh:divider\|alt_u_div_e2f:divider\|add_sub_15_result_int\[7\]~11'" {  } { { "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" "0.080 ns" { ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_15_result_int[6]~9 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_15_result_int[7]~11 } "NODE_NAME" } } { "db/alt_u_div_e2f.tdf" "" { Text "D:/HD_ADPCM/HD_ADPCM_1Bit_Stereo_Decoder/db/alt_u_div_e2f.tdf" 61 23 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 -1} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.458 ns) 36.638 ns ADPCM_Decoder_1_Bit:u6\|lpm_divide:Div0\|lpm_divide_aem:auto_generated\|sign_div_unsign_klh:divider\|alt_u_div_e2f:divider\|add_sub_15_result_int\[8\]~12 63 COMB Unassigned 20 " "Info: 63: + IC(0.000 ns) + CELL(0.458 ns) = 36.638 ns; Loc. = Unassigned; Fanout = 20; COMB Node = 'ADPCM_Decoder_1_Bit:u6\|lpm_divide:Div0\|lpm_divide_aem:auto_generated\|sign_div_unsign_klh:divider\|alt_u_div_e2f:divider\|add_sub_15_result_int\[8\]~12'" {  } { { "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" "0.458 ns" { ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_15_result_int[7]~11 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_15_result_int[8]~12 } "NODE_NAME" } } { "db/alt_u_div_e2f.tdf" "" { Text "D:/HD_ADPCM/HD_ADPCM_1Bit_Stereo_Decoder/db/alt_u_div_e2f.tdf" 61 23 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 -1} { "Info" "ITDB_NODE_DELAY" "IC(0.598 ns) + CELL(0.319 ns) 37.555 ns ADPCM_Decoder_1_Bit:u6\|lpm_divide:Div0\|lpm_divide_aem:auto_generated\|sign_div_unsign_klh:divider\|alt_u_div_e2f:divider\|StageOut\[124\]~563 64 COMB Unassigned 3 " "Info: 64: + IC(0.598 ns) + CELL(0.319 ns) = 37.555 ns; Loc. = Unassigned; Fanout = 3; COMB Node = 'ADPCM_Decoder_1_Bit:u6\|lpm_divide:Div0\|lpm_divide_aem:auto_generated\|sign_div_unsign_klh:divider\|alt_u_div_e2f:divider\|StageOut\[124\]~563'" {  } { { "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" "0.917 ns" { ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_15_result_int[8]~12 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|StageOut[124]~563 } "NODE_NAME" } } { "db/alt_u_div_e2f.tdf" "" { Text "D:/HD_ADPCM/HD_ADPCM_1Bit_Stereo_Decoder/db/alt_u_div_e2f.tdf" 138 10 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 -1} { "Info" "ITDB_NODE_DELAY" "IC(1.016 ns) + CELL(0.517 ns) 39.088 ns ADPCM_Decoder_1_Bit:u6\|lpm_divide:Div0\|lpm_divide_aem:auto_generated\|sign_div_unsign_klh:divider\|alt_u_div_e2f:divider\|add_sub_16_result_int\[5\]~7 65 COMB Unassigned 2 " "Info: 65: + IC(1.016 ns) + CELL(0.517 ns) = 39.088 ns; Loc. = Unassigned; Fanout = 2; COMB Node = 'ADPCM_Decoder_1_Bit:u6\|lpm_divide:Div0\|lpm_divide_aem:auto_generated\|sign_div_unsign_klh:divider\|alt_u_div_e2f:divider\|add_sub_16_result_int\[5\]~7'" {  } { { "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" "1.533 ns" { ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|StageOut[124]~563 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_16_result_int[5]~7 } "NODE_NAME" } } { "db/alt_u_div_e2f.tdf" "" { Text "D:/HD_ADPCM/HD_ADPCM_1Bit_Stereo_Decoder/db/alt_u_div_e2f.tdf" 66 23 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 -1} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.080 ns) 39.168 ns ADPCM_Decoder_1_Bit:u6\|lpm_divide:Div0\|lpm_divide_aem:auto_generated\|sign_div_unsign_klh:divider\|alt_u_div_e2f:divider\|add_sub_16_result_int\[6\]~9 66 COMB Unassigned 1 " "Info: 66: + IC(0.000 ns) + CELL(0.080 ns) = 39.168 ns; Loc. = Unassigned; Fanout = 1; COMB Node = 'ADPCM_Decoder_1_Bit:u6\|lpm_divide:Div0\|lpm_divide_aem:auto_generated\|sign_div_unsign_klh:divider\|alt_u_div_e2f:divider\|add_sub_16_result_int\[6\]~9'" {  } { { "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" "0.080 ns" { ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_16_result_int[5]~7 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_16_result_int[6]~9 } "NODE_NAME" } } { "db/alt_u_div_e2f.tdf" "" { Text "D:/HD_ADPCM/HD_ADPCM_1Bit_Stereo_Decoder/db/alt_u_div_e2f.tdf" 66 23 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 -1} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.080 ns) 39.248 ns ADPCM_Decoder_1_Bit:u6\|lpm_divide:Div0\|lpm_divide_aem:auto_generated\|sign_div_unsign_klh:divider\|alt_u_div_e2f:divider\|add_sub_16_result_int\[7\]~11 67 COMB Unassigned 1 " "Info: 67: + IC(0.000 ns) + CELL(0.080 ns) = 39.248 ns; Loc. = Unassigned; Fanout = 1; COMB Node = 'ADPCM_Decoder_1_Bit:u6\|lpm_divide:Div0\|lpm_divide_aem:auto_generated\|sign_div_unsign_klh:divider\|alt_u_div_e2f:divider\|add_sub_16_result_int\[7\]~11'" {  } { { "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" "0.080 ns" { ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_16_result_int[6]~9 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_16_result_int[7]~11 } "NODE_NAME" } } { "db/alt_u_div_e2f.tdf" "" { Text "D:/HD_ADPCM/HD_ADPCM_1Bit_Stereo_Decoder/db/alt_u_div_e2f.tdf" 66 23 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 -1} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.458 ns) 39.706 ns ADPCM_Decoder_1_Bit:u6\|lpm_divide:Div0\|lpm_divide_aem:auto_generated\|sign_div_unsign_klh:divider\|alt_u_div_e2f:divider\|add_sub_16_result_int\[8\]~12 68 COMB Unassigned 20 " "Info: 68: + IC(0.000 ns) + CELL(0.458 ns) = 39.706 ns; Loc. = Unassigned; Fanout = 20; COMB Node = 'ADPCM_Decoder_1_Bit:u6\|lpm_divide:Div0\|lpm_divide_aem:auto_generated\|sign_div_unsign_klh:divider\|alt_u_div_e2f:divider\|add_sub_16_result_int\[8\]~12'" {  } { { "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" "0.458 ns" { ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_16_result_int[7]~11 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_16_result_int[8]~12 } "NODE_NAME" } } { "db/alt_u_div_e2f.tdf" "" { Text "D:/HD_ADPCM/HD_ADPCM_1Bit_Stereo_Decoder/db/alt_u_div_e2f.tdf" 66 23 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 -1} { "Info" "ITDB_NODE_DELAY" "IC(0.949 ns) + CELL(0.319 ns) 40.974 ns ADPCM_Decoder_1_Bit:u6\|lpm_divide:Div0\|lpm_divide_aem:auto_generated\|sign_div_unsign_klh:divider\|alt_u_div_e2f:divider\|StageOut\[132\]~567 69 COMB Unassigned 3 " "Info: 69: + IC(0.949 ns) + CELL(0.319 ns) = 40.974 ns; Loc. = Unassigned; Fanout = 3; COMB Node = 'ADPCM_Decoder_1_Bit:u6\|lpm_divide:Div0\|lpm_divide_aem:auto_generated\|sign_div_unsign_klh:divider\|alt_u_div_e2f:divider\|StageOut\[132\]~567'" {  } { { "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" "1.268 ns" { ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_16_result_int[8]~12 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|StageOut[132]~567 } "NODE_NAME" } } { "db/alt_u_div_e2f.tdf" "" { Text "D:/HD_ADPCM/HD_ADPCM_1Bit_Stereo_Decoder/db/alt_u_div_e2f.tdf" 138 10 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 -1} { "Info" "ITDB_NODE_DELAY" "IC(1.070 ns) + CELL(0.517 ns) 42.561 ns ADPCM_Decoder_1_Bit:u6\|lpm_divide:Div0\|lpm_divide_aem:auto_generated\|sign_div_unsign_klh:divider\|alt_u_div_e2f:divider\|add_sub_17_result_int\[5\]~7 70 COMB Unassigned 2 " "Info: 70: + IC(1.070 ns) + CELL(0.517 ns) = 42.561 ns; Loc. = Unassigned; Fanout = 2; COMB Node = 'ADPCM_Decoder_1_Bit:u6\|lpm_divide:Div0\|lpm_divide_aem:auto_generated\|sign_div_unsign_klh:divider\|alt_u_div_e2f:divider\|add_sub_17_result_int\[5\]~7'" {  } { { "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" "1.587 ns" { ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|StageOut[132]~567 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_17_result_int[5]~7 } "NODE_NAME" } } { "db/alt_u_div_e2f.tdf" "" { Text "D:/HD_ADPCM/HD_ADPCM_1Bit_Stereo_Decoder/db/alt_u_div_e2f.tdf" 71 23 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 -1} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.080 ns) 42.641 ns ADPCM_Decoder_1_Bit:u6\|lpm_divide:Div0\|lpm_divide_aem:auto_generated\|sign_div_unsign_klh:divider\|alt_u_div_e2f:divider\|add_sub_17_result_int\[6\]~9 71 COMB Unassigned 1 " "Info: 71: + IC(0.000 ns) + CELL(0.080 ns) = 42.641 ns; Loc. = Unassigned; Fanout = 1; COMB Node = 'ADPCM_Decoder_1_Bit:u6\|lpm_divide:Div0\|lpm_divide_aem:auto_generated\|sign_div_unsign_klh:divider\|alt_u_div_e2f:divider\|add_sub_17_result_int\[6\]~9'" {  } { { "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" "0.080 ns" { ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_17_result_int[5]~7 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_17_result_int[6]~9 } "NODE_NAME" } } { "db/alt_u_div_e2f.tdf" "" { Text "D:/HD_ADPCM/HD_ADPCM_1Bit_Stereo_Decoder/db/alt_u_div_e2f.tdf" 71 23 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 -1} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.080 ns) 42.721 ns ADPCM_Decoder_1_Bit:u6\|lpm_divide:Div0\|lpm_divide_aem:auto_generated\|sign_div_unsign_klh:divider\|alt_u_div_e2f:divider\|add_sub_17_result_int\[7\]~11 72 COMB Unassigned 1 " "Info: 72: + IC(0.000 ns) + CELL(0.080 ns) = 42.721 ns; Loc. = Unassigned; Fanout = 1; COMB Node = 'ADPCM_Decoder_1_Bit:u6\|lpm_divide:Div0\|lpm_divide_aem:auto_generated\|sign_div_unsign_klh:divider\|alt_u_div_e2f:divider\|add_sub_17_result_int\[7\]~11'" {  } { { "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" "0.080 ns" { ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_17_result_int[6]~9 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_17_result_int[7]~11 } "NODE_NAME" } } { "db/alt_u_div_e2f.tdf" "" { Text "D:/HD_ADPCM/HD_ADPCM_1Bit_Stereo_Decoder/db/alt_u_div_e2f.tdf" 71 23 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 -1} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.458 ns) 43.179 ns ADPCM_Decoder_1_Bit:u6\|lpm_divide:Div0\|lpm_divide_aem:auto_generated\|sign_div_unsign_klh:divider\|alt_u_div_e2f:divider\|add_sub_17_result_int\[8\]~12 73 COMB Unassigned 20 " "Info: 73: + IC(0.000 ns) + CELL(0.458 ns) = 43.179 ns; Loc. = Unassigned; Fanout = 20; COMB Node = 'ADPCM_Decoder_1_Bit:u6\|lpm_divide:Div0\|lpm_divide_aem:auto_generated\|sign_div_unsign_klh:divider\|alt_u_div_e2f:divider\|add_sub_17_result_int\[8\]~12'" {  } { { "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" "0.458 ns" { ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_17_result_int[7]~11 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_17_result_int[8]~12 } "NODE_NAME" } } { "db/alt_u_div_e2f.tdf" "" { Text "D:/HD_ADPCM/HD_ADPCM_1Bit_Stereo_Decoder/db/alt_u_div_e2f.tdf" 71 23 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 -1} { "Info" "ITDB_NODE_DELAY" "IC(0.895 ns) + CELL(0.319 ns) 44.393 ns ADPCM_Decoder_1_Bit:u6\|lpm_divide:Div0\|lpm_divide_aem:auto_generated\|sign_div_unsign_klh:divider\|alt_u_div_e2f:divider\|StageOut\[142\]~569 74 COMB Unassigned 1 " "Info: 74: + IC(0.895 ns) + CELL(0.319 ns) = 44.393 ns; Loc. = Unassigned; Fanout = 1; COMB Node = 'ADPCM_Decoder_1_Bit:u6\|lpm_divide:Div0\|lpm_divide_aem:auto_generated\|sign_div_unsign_klh:divider\|alt_u_div_e2f:divider\|StageOut\[142\]~569'" {  } { { "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" "1.214 ns" { ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_17_result_int[8]~12 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|StageOut[142]~569 } "NODE_NAME" } } { "db/alt_u_div_e2f.tdf" "" { Text "D:/HD_ADPCM/HD_ADPCM_1Bit_Stereo_Decoder/db/alt_u_div_e2f.tdf" 138 10 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 -1} { "Info" "ITDB_NODE_DELAY" "IC(1.359 ns) + CELL(0.517 ns) 46.269 ns ADPCM_Decoder_1_Bit:u6\|lpm_divide:Div0\|lpm_divide_aem:auto_generated\|sign_div_unsign_klh:divider\|alt_u_div_e2f:divider\|op_9~32 75 COMB Unassigned 1 " "Info: 75: + IC(1.359 ns) + CELL(0.517 ns) = 46.269 ns; Loc. = Unassigned; Fanout = 1; COMB Node = 'ADPCM_Decoder_1_Bit:u6\|lpm_divide:Div0\|lpm_divide_aem:auto_generated\|sign_div_unsign_klh:divider\|alt_u_div_e2f:divider\|op_9~32'" {  } { { "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" "1.876 ns" { ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|StageOut[142]~569 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|op_9~32 } "NODE_NAME" } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 -1} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.458 ns) 46.727 ns ADPCM_Decoder_1_Bit:u6\|lpm_divide:Div0\|lpm_divide_aem:auto_generated\|sign_div_unsign_klh:divider\|alt_u_div_e2f:divider\|op_9~33 76 COMB Unassigned 13 " "Info: 76: + IC(0.000 ns) + CELL(0.458 ns) = 46.727 ns; Loc. = Unassigned; Fanout = 13; COMB Node = 'ADPCM_Decoder_1_Bit:u6\|lpm_divide:Div0\|lpm_divide_aem:auto_generated\|sign_div_unsign_klh:divider\|alt_u_div_e2f:divider\|op_9~33'" {  } { { "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" "0.458 ns" { ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|op_9~32 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|op_9~33 } "NODE_NAME" } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 -1} { "Info" "ITDB_NODE_DELAY" "IC(0.732 ns) + CELL(0.177 ns) 47.636 ns ADPCM_Decoder_1_Bit:u6\|lpm_divide:Div0\|lpm_divide_aem:auto_generated\|sign_div_unsign_klh:divider\|alt_u_div_e2f:divider\|StageOut\[145\]~30 77 COMB Unassigned 1 " "Info: 77: + IC(0.732 ns) + CELL(0.177 ns) = 47.636 ns; Loc. = Unassigned; Fanout = 1; COMB Node = 'ADPCM_Decoder_1_Bit:u6\|lpm_divide:Div0\|lpm_divide_aem:auto_generated\|sign_div_unsign_klh:divider\|alt_u_div_e2f:divider\|StageOut\[145\]~30'" {  } { { "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" "0.909 ns" { ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|op_9~33 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|StageOut[145]~30 } "NODE_NAME" } } { "db/alt_u_div_e2f.tdf" "" { Text "D:/HD_ADPCM/HD_ADPCM_1Bit_Stereo_Decoder/db/alt_u_div_e2f.tdf" 138 10 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 -1} { "Info" "ITDB_NODE_DELAY" "IC(0.498 ns) + CELL(0.495 ns) 48.629 ns ADPCM_Decoder_1_Bit:u6\|lpm_divide:Div0\|lpm_divide_aem:auto_generated\|sign_div_unsign_klh:divider\|alt_u_div_e2f:divider\|add_sub_19_result_int\[2\]~1 78 COMB Unassigned 1 " "Info: 78: + IC(0.498 ns) + CELL(0.495 ns) = 48.629 ns; Loc. = Unassigned; Fanout = 1; COMB Node = 'ADPCM_Decoder_1_Bit:u6\|lpm_divide:Div0\|lpm_divide_aem:auto_generated\|sign_div_unsign_klh:divider\|alt_u_div_e2f:divider\|add_sub_19_result_int\[2\]~1'" {  } { { "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" "0.993 ns" { ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|StageOut[145]~30 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_19_result_int[2]~1 } "NODE_NAME" } } { "db/alt_u_div_e2f.tdf" "" { Text "D:/HD_ADPCM/HD_ADPCM_1Bit_Stereo_Decoder/db/alt_u_div_e2f.tdf" 81 23 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 -1} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.080 ns) 48.709 ns ADPCM_Decoder_1_Bit:u6\|lpm_divide:Div0\|lpm_divide_aem:auto_generated\|sign_div_unsign_klh:divider\|alt_u_div_e2f:divider\|add_sub_19_result_int\[3\]~3 79 COMB Unassigned 1 " "Info: 79: + IC(0.000 ns) + CELL(0.080 ns) = 48.709 ns; Loc. = Unassigned; Fanout = 1; COMB Node = 'ADPCM_Decoder_1_Bit:u6\|lpm_divide:Div0\|lpm_divide_aem:auto_generated\|sign_div_unsign_klh:divider\|alt_u_div_e2f:divider\|add_sub_19_result_int\[3\]~3'" {  } { { "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" "0.080 ns" { ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_19_result_int[2]~1 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_19_result_int[3]~3 } "NODE_NAME" } } { "db/alt_u_div_e2f.tdf" "" { Text "D:/HD_ADPCM/HD_ADPCM_1Bit_Stereo_Decoder/db/alt_u_div_e2f.tdf" 81 23 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 -1} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.080 ns) 48.789 ns ADPCM_Decoder_1_Bit:u6\|lpm_divide:Div0\|lpm_divide_aem:auto_generated\|sign_div_unsign_klh:divider\|alt_u_div_e2f:divider\|add_sub_19_result_int\[4\]~5 80 COMB Unassigned 1 " "Info: 80: + IC(0.000 ns) + CELL(0.080 ns) = 48.789 ns; Loc. = Unassigned; Fanout = 1; COMB Node = 'ADPCM_Decoder_1_Bit:u6\|lpm_divide:Div0\|lpm_divide_aem:auto_generated\|sign_div_unsign_klh:divider\|alt_u_div_e2f:divider\|add_sub_19_result_int\[4\]~5'" {  } { { "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" "0.080 ns" { ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_19_result_int[3]~3 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_19_result_int[4]~5 } "NODE_NAME" } } { "db/alt_u_div_e2f.tdf" "" { Text "D:/HD_ADPCM/HD_ADPCM_1Bit_Stereo_Decoder/db/alt_u_div_e2f.tdf" 81 23 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 -1} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.080 ns) 48.869 ns ADPCM_Decoder_1_Bit:u6\|lpm_divide:Div0\|lpm_divide_aem:auto_generated\|sign_div_unsign_klh:divider\|alt_u_div_e2f:divider\|add_sub_19_result_int\[5\]~7 81 COMB Unassigned 1 " "Info: 81: + IC(0.000 ns) + CELL(0.080 ns) = 48.869 ns; Loc. = Unassigned; Fanout = 1; COMB Node = 'ADPCM_Decoder_1_Bit:u6\|lpm_divide:Div0\|lpm_divide_aem:auto_generated\|sign_div_unsign_klh:divider\|alt_u_div_e2f:divider\|add_sub_19_result_int\[5\]~7'" {  } { { "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" "0.080 ns" { ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_19_result_int[4]~5 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_19_result_int[5]~7 } "NODE_NAME" } } { "db/alt_u_div_e2f.tdf" "" { Text "D:/HD_ADPCM/HD_ADPCM_1Bit_Stereo_Decoder/db/alt_u_div_e2f.tdf" 81 23 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 -1} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.080 ns) 48.949 ns ADPCM_Decoder_1_Bit:u6\|lpm_divide:Div0\|lpm_divide_aem:auto_generated\|sign_div_unsign_klh:divider\|alt_u_div_e2f:divider\|add_sub_19_result_int\[6\]~9 82 COMB Unassigned 1 " "Info: 82: + IC(0.000 ns) + CELL(0.080 ns) = 48.949 ns; Loc. = Unassigned; Fanout = 1; COMB Node = 'ADPCM_Decoder_1_Bit:u6\|lpm_divide:Div0\|lpm_divide_aem:auto_generated\|sign_div_unsign_klh:divider\|alt_u_div_e2f:divider\|add_sub_19_result_int\[6\]~9'" {  } { { "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" "0.080 ns" { ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_19_result_int[5]~7 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_19_result_int[6]~9 } "NODE_NAME" } } { "db/alt_u_div_e2f.tdf" "" { Text "D:/HD_ADPCM/HD_ADPCM_1Bit_Stereo_Decoder/db/alt_u_div_e2f.tdf" 81 23 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 -1} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.080 ns) 49.029 ns ADPCM_Decoder_1_Bit:u6\|lpm_divide:Div0\|lpm_divide_aem:auto_generated\|sign_div_unsign_klh:divider\|alt_u_div_e2f:divider\|add_sub_19_result_int\[7\]~11 83 COMB Unassigned 1 " "Info: 83: + IC(0.000 ns) + CELL(0.080 ns) = 49.029 ns; Loc. = Unassigned; Fanout = 1; COMB Node = 'ADPCM_Decoder_1_Bit:u6\|lpm_divide:Div0\|lpm_divide_aem:auto_generated\|sign_div_unsign_klh:divider\|alt_u_div_e2f:divider\|add_sub_19_result_int\[7\]~11'" {  } { { "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" "0.080 ns" { ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_19_result_int[6]~9 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_19_result_int[7]~11 } "NODE_NAME" } } { "db/alt_u_div_e2f.tdf" "" { Text "D:/HD_ADPCM/HD_ADPCM_1Bit_Stereo_Decoder/db/alt_u_div_e2f.tdf" 81 23 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 -1} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.458 ns) 49.487 ns ADPCM_Decoder_1_Bit:u6\|lpm_divide:Div0\|lpm_divide_aem:auto_generated\|sign_div_unsign_klh:divider\|alt_u_div_e2f:divider\|add_sub_19_result_int\[8\]~12 84 COMB Unassigned 1 " "Info: 84: + IC(0.000 ns) + CELL(0.458 ns) = 49.487 ns; Loc. = Unassigned; Fanout = 1; COMB Node = 'ADPCM_Decoder_1_Bit:u6\|lpm_divide:Div0\|lpm_divide_aem:auto_generated\|sign_div_unsign_klh:divider\|alt_u_div_e2f:divider\|add_sub_19_result_int\[8\]~12'" {  } { { "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" "0.458 ns" { ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_19_result_int[7]~11 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_19_result_int[8]~12 } "NODE_NAME" } } { "db/alt_u_div_e2f.tdf" "" { Text "D:/HD_ADPCM/HD_ADPCM_1Bit_Stereo_Decoder/db/alt_u_div_e2f.tdf" 81 23 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 -1} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.096 ns) 49.583 ns ADPCM_Decoder_1_Bit:u6\|PCM_Data_Difference\[0\] 85 REG Unassigned 1 " "Info: 85: + IC(0.000 ns) + CELL(0.096 ns) = 49.583 ns; Loc. = Unassigned; Fanout = 1; REG Node = 'ADPCM_Decoder_1_Bit:u6\|PCM_Data_Difference\[0\]'" {  } { { "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" "0.096 ns" { ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_19_result_int[8]~12 ADPCM_Decoder_1_Bit:u6|PCM_Data_Difference[0] } "NODE_NAME" } } { "HD_ADPCM_Codec.vhd" "" { Text "D:/HD_ADPCM/HD_ADPCM_1Bit_Stereo_Decoder/HD_ADPCM_Codec.vhd" 943 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 -1} { "Info" "ITDB_TOTAL_CELL_DELAY" "24.059 ns ( 48.52 % ) " "Info: Total cell delay = 24.059 ns ( 48.52 % )" {  } {  } 0 0 "Total cell delay = %1!s! %2!s!" 0 0 "" 0 -1} { "Info" "ITDB_TOTAL_IC_DELAY" "25.524 ns ( 51.48 % ) " "Info: Total interconnect delay = 25.524 ns ( 51.48 % )" {  } {  } 0 0 "Total interconnect delay = %1!s! %2!s!" 0 0 "" 0 -1}  } { { "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" "49.583 ns" { ADPCM_Decoder_1_Bit:u6|ADPCM_Decoder_Step_Size_Table_Pointer[9] ADPCM_Decoder_1_Bit:u6|lpm_mult:Mult0|mult_pu01:auto_generated|mac_mult1~DATAOUT15 ADPCM_Decoder_1_Bit:u6|lpm_mult:Mult0|mult_pu01:auto_generated|mac_out2~DATAOUT15 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_6_result_int[2]~1 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_6_result_int[3]~3 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_6_result_int[4]~5 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_6_result_int[5]~7 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_6_result_int[6]~9 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_6_result_int[7]~10 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|StageOut[50]~221 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_7_result_int[3]~3 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_7_result_int[4]~5 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_7_result_int[5]~7 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_7_result_int[6]~9 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_7_result_int[7]~11 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_7_result_int[8]~12 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|StageOut[58]~197 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_8_result_int[3]~3 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_8_result_int[4]~5 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_8_result_int[5]~7 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_8_result_int[6]~9 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_8_result_int[7]~11 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_8_result_int[8]~12 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|StageOut[67]~581 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_9_result_int[4]~5 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_9_result_int[5]~7 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_9_result_int[6]~9 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_9_result_int[7]~11 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_9_result_int[8]~12 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|StageOut[73]~174 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_10_result_int[2]~1 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_10_result_int[3]~3 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_10_result_int[4]~5 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_10_result_int[5]~7 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_10_result_int[6]~9 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_10_result_int[7]~11 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_10_result_int[8]~12 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|StageOut[83]~544 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_11_result_int[4]~5 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_11_result_int[5]~7 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_11_result_int[6]~9 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_11_result_int[7]~11 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_11_result_int[8]~12 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|StageOut[92]~547 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_12_result_int[5]~7 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_12_result_int[6]~9 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_12_result_int[7]~11 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_12_result_int[8]~12 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|StageOut[101]~550 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_13_result_int[6]~9 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_13_result_int[7]~11 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_13_result_int[8]~12 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|StageOut[110]~553 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_14_result_int[7]~11 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_14_result_int[8]~12 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|StageOut[113]~94 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_15_result_int[2]~1 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_15_result_int[3]~3 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_15_result_int[4]~5 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_15_result_int[5]~7 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_15_result_int[6]~9 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_15_result_int[7]~11 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_15_result_int[8]~12 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|StageOut[124]~563 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_16_result_int[5]~7 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_16_result_int[6]~9 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_16_result_int[7]~11 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_16_result_int[8]~12 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|StageOut[132]~567 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_17_result_int[5]~7 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_17_result_int[6]~9 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_17_result_int[7]~11 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_17_result_int[8]~12 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|StageOut[142]~569 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|op_9~32 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|op_9~33 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|StageOut[145]~30 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_19_result_int[2]~1 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_19_result_int[3]~3 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_19_result_int[4]~5 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_19_result_int[5]~7 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_19_result_int[6]~9 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_19_result_int[7]~11 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_19_result_int[8]~12 ADPCM_Decoder_1_Bit:u6|PCM_Data_Difference[0] } "NODE_NAME" } }  } 0 0 "%2!c! %3!s! %4!s! to %5!s! delay is %1!s!" 0 0 "" 0 -1}  } { { "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" "49.583 ns" { ADPCM_Decoder_1_Bit:u6|ADPCM_Decoder_Step_Size_Table_Pointer[9] ADPCM_Decoder_1_Bit:u6|lpm_mult:Mult0|mult_pu01:auto_generated|mac_mult1~DATAOUT15 ADPCM_Decoder_1_Bit:u6|lpm_mult:Mult0|mult_pu01:auto_generated|mac_out2~DATAOUT15 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_6_result_int[2]~1 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_6_result_int[3]~3 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_6_result_int[4]~5 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_6_result_int[5]~7 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_6_result_int[6]~9 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_6_result_int[7]~10 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|StageOut[50]~221 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_7_result_int[3]~3 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_7_result_int[4]~5 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_7_result_int[5]~7 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_7_result_int[6]~9 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_7_result_int[7]~11 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_7_result_int[8]~12 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|StageOut[58]~197 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_8_result_int[3]~3 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_8_result_int[4]~5 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_8_result_int[5]~7 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_8_result_int[6]~9 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_8_result_int[7]~11 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_8_result_int[8]~12 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|StageOut[67]~581 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_9_result_int[4]~5 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_9_result_int[5]~7 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_9_result_int[6]~9 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_9_result_int[7]~11 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_9_result_int[8]~12 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|StageOut[73]~174 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_10_result_int[2]~1 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_10_result_int[3]~3 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_10_result_int[4]~5 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_10_result_int[5]~7 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_10_result_int[6]~9 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_10_result_int[7]~11 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_10_result_int[8]~12 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|StageOut[83]~544 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_11_result_int[4]~5 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_11_result_int[5]~7 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_11_result_int[6]~9 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_11_result_int[7]~11 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_11_result_int[8]~12 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|StageOut[92]~547 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_12_result_int[5]~7 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_12_result_int[6]~9 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_12_result_int[7]~11 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_12_result_int[8]~12 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|StageOut[101]~550 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_13_result_int[6]~9 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_13_result_int[7]~11 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_13_result_int[8]~12 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|StageOut[110]~553 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_14_result_int[7]~11 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_14_result_int[8]~12 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|StageOut[113]~94 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_15_result_int[2]~1 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_15_result_int[3]~3 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_15_result_int[4]~5 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_15_result_int[5]~7 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_15_result_int[6]~9 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_15_result_int[7]~11 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_15_result_int[8]~12 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|StageOut[124]~563 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_16_result_int[5]~7 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_16_result_int[6]~9 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_16_result_int[7]~11 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_16_result_int[8]~12 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|StageOut[132]~567 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_17_result_int[5]~7 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_17_result_int[6]~9 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_17_result_int[7]~11 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_17_result_int[8]~12 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|StageOut[142]~569 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|op_9~32 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|op_9~33 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|StageOut[145]~30 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_19_result_int[2]~1 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_19_result_int[3]~3 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_19_result_int[4]~5 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_19_result_int[5]~7 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_19_result_int[6]~9 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_19_result_int[7]~11 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_19_result_int[8]~12 ADPCM_Decoder_1_Bit:u6|PCM_Data_Difference[0] } "NODE_NAME" } }  } 0 0 "Slack time is %5!s! between source %1!s! \"%2!s!\" and destination %3!s! \"%4!s!\"" 0 0 "" 0 -1}
32 
{ "Info" "ITDB_FULL_ESTIMATED_DATA_PATH_RESULT" "49.583 ns register register " "Info: Estimated most critical path is register to register delay of 49.583 ns" { { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.000 ns) 0.000 ns ADPCM_Decoder_1_Bit:u6\|ADPCM_Decoder_Step_Size_Table_Pointer\[9\] 1 REG DSPMULT_X28_Y17_N0 11 " "Info: 1: + IC(0.000 ns) + CELL(0.000 ns) = 0.000 ns; Loc. = DSPMULT_X28_Y17_N0; Fanout = 11; REG Node = 'ADPCM_Decoder_1_Bit:u6\|ADPCM_Decoder_Step_Size_Table_Pointer\[9\]'" {  } { { "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" "" { ADPCM_Decoder_1_Bit:u6|ADPCM_Decoder_Step_Size_Table_Pointer[9] } "NODE_NAME" } } { "HD_ADPCM_Codec.vhd" "" { Text "D:/HD_ADPCM/HD_ADPCM_1Bit_Stereo_Decoder/HD_ADPCM_Codec.vhd" 943 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 -1} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(3.257 ns) 3.257 ns ADPCM_Decoder_1_Bit:u6\|lpm_mult:Mult0\|mult_pu01:auto_generated\|mac_mult1~DATAOUT15 2 COMB DSPMULT_X28_Y17_N0 1 " "Info: 2: + IC(0.000 ns) + CELL(3.257 ns) = 3.257 ns; Loc. = DSPMULT_X28_Y17_N0; Fanout = 1; COMB Node = 'ADPCM_Decoder_1_Bit:u6\|lpm_mult:Mult0\|mult_pu01:auto_generated\|mac_mult1~DATAOUT15'" {  } { { "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" "3.257 ns" { ADPCM_Decoder_1_Bit:u6|ADPCM_Decoder_Step_Size_Table_Pointer[9] ADPCM_Decoder_1_Bit:u6|lpm_mult:Mult0|mult_pu01:auto_generated|mac_mult1~DATAOUT15 } "NODE_NAME" } } { "db/mult_pu01.tdf" "" { Text "D:/HD_ADPCM/HD_ADPCM_1Bit_Stereo_Decoder/db/mult_pu01.tdf" 35 2 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 -1} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.304 ns) 3.561 ns ADPCM_Decoder_1_Bit:u6\|lpm_mult:Mult0\|mult_pu01:auto_generated\|mac_out2~DATAOUT15 3 COMB DSPOUT_X28_Y17_N2 4 " "Info: 3: + IC(0.000 ns) + CELL(0.304 ns) = 3.561 ns; Loc. = DSPOUT_X28_Y17_N2; Fanout = 4; COMB Node = 'ADPCM_Decoder_1_Bit:u6\|lpm_mult:Mult0\|mult_pu01:auto_generated\|mac_out2~DATAOUT15'" {  } { { "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" "0.304 ns" { ADPCM_Decoder_1_Bit:u6|lpm_mult:Mult0|mult_pu01:auto_generated|mac_mult1~DATAOUT15 ADPCM_Decoder_1_Bit:u6|lpm_mult:Mult0|mult_pu01:auto_generated|mac_out2~DATAOUT15 } "NODE_NAME" } } { "db/mult_pu01.tdf" "" { Text "D:/HD_ADPCM/HD_ADPCM_1Bit_Stereo_Decoder/db/mult_pu01.tdf" 44 2 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 -1} { "Info" "ITDB_NODE_DELAY" "IC(0.965 ns) + CELL(0.517 ns) 5.043 ns ADPCM_Decoder_1_Bit:u6\|lpm_divide:Div0\|lpm_divide_aem:auto_generated\|sign_div_unsign_klh:divider\|alt_u_div_e2f:divider\|add_sub_6_result_int\[2\]~1 4 COMB LAB_X30_Y17 2 " "Info: 4: + IC(0.965 ns) + CELL(0.517 ns) = 5.043 ns; Loc. = LAB_X30_Y17; Fanout = 2; COMB Node = 'ADPCM_Decoder_1_Bit:u6\|lpm_divide:Div0\|lpm_divide_aem:auto_generated\|sign_div_unsign_klh:divider\|alt_u_div_e2f:divider\|add_sub_6_result_int\[2\]~1'" {  } { { "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" "1.482 ns" { ADPCM_Decoder_1_Bit:u6|lpm_mult:Mult0|mult_pu01:auto_generated|mac_out2~DATAOUT15 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_6_result_int[2]~1 } "NODE_NAME" } } { "db/alt_u_div_e2f.tdf" "" { Text "D:/HD_ADPCM/HD_ADPCM_1Bit_Stereo_Decoder/db/alt_u_div_e2f.tdf" 106 22 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 -1} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.080 ns) 5.123 ns ADPCM_Decoder_1_Bit:u6\|lpm_divide:Div0\|lpm_divide_aem:auto_generated\|sign_div_unsign_klh:divider\|alt_u_div_e2f:divider\|add_sub_6_result_int\[3\]~3 5 COMB LAB_X30_Y17 2 " "Info: 5: + IC(0.000 ns) + CELL(0.080 ns) = 5.123 ns; Loc. = LAB_X30_Y17; Fanout = 2; COMB Node = 'ADPCM_Decoder_1_Bit:u6\|lpm_divide:Div0\|lpm_divide_aem:auto_generated\|sign_div_unsign_klh:divider\|alt_u_div_e2f:divider\|add_sub_6_result_int\[3\]~3'" {  } { { "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" "0.080 ns" { ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_6_result_int[2]~1 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_6_result_int[3]~3 } "NODE_NAME" } } { "db/alt_u_div_e2f.tdf" "" { Text "D:/HD_ADPCM/HD_ADPCM_1Bit_Stereo_Decoder/db/alt_u_div_e2f.tdf" 106 22 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 -1} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.080 ns) 5.203 ns ADPCM_Decoder_1_Bit:u6\|lpm_divide:Div0\|lpm_divide_aem:auto_generated\|sign_div_unsign_klh:divider\|alt_u_div_e2f:divider\|add_sub_6_result_int\[4\]~5 6 COMB LAB_X30_Y17 2 " "Info: 6: + IC(0.000 ns) + CELL(0.080 ns) = 5.203 ns; Loc. = LAB_X30_Y17; Fanout = 2; COMB Node = 'ADPCM_Decoder_1_Bit:u6\|lpm_divide:Div0\|lpm_divide_aem:auto_generated\|sign_div_unsign_klh:divider\|alt_u_div_e2f:divider\|add_sub_6_result_int\[4\]~5'" {  } { { "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" "0.080 ns" { ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_6_result_int[3]~3 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_6_result_int[4]~5 } "NODE_NAME" } } { "db/alt_u_div_e2f.tdf" "" { Text "D:/HD_ADPCM/HD_ADPCM_1Bit_Stereo_Decoder/db/alt_u_div_e2f.tdf" 106 22 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 -1} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.080 ns) 5.283 ns ADPCM_Decoder_1_Bit:u6\|lpm_divide:Div0\|lpm_divide_aem:auto_generated\|sign_div_unsign_klh:divider\|alt_u_div_e2f:divider\|add_sub_6_result_int\[5\]~7 7 COMB LAB_X30_Y17 2 " "Info: 7: + IC(0.000 ns) + CELL(0.080 ns) = 5.283 ns; Loc. = LAB_X30_Y17; Fanout = 2; COMB Node = 'ADPCM_Decoder_1_Bit:u6\|lpm_divide:Div0\|lpm_divide_aem:auto_generated\|sign_div_unsign_klh:divider\|alt_u_div_e2f:divider\|add_sub_6_result_int\[5\]~7'" {  } { { "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" "0.080 ns" { ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_6_result_int[4]~5 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_6_result_int[5]~7 } "NODE_NAME" } } { "db/alt_u_div_e2f.tdf" "" { Text "D:/HD_ADPCM/HD_ADPCM_1Bit_Stereo_Decoder/db/alt_u_div_e2f.tdf" 106 22 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 -1} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.080 ns) 5.363 ns ADPCM_Decoder_1_Bit:u6\|lpm_divide:Div0\|lpm_divide_aem:auto_generated\|sign_div_unsign_klh:divider\|alt_u_div_e2f:divider\|add_sub_6_result_int\[6\]~9 8 COMB LAB_X30_Y17 1 " "Info: 8: + IC(0.000 ns) + CELL(0.080 ns) = 5.363 ns; Loc. = LAB_X30_Y17; Fanout = 1; COMB Node = 'ADPCM_Decoder_1_Bit:u6\|lpm_divide:Div0\|lpm_divide_aem:auto_generated\|sign_div_unsign_klh:divider\|alt_u_div_e2f:divider\|add_sub_6_result_int\[6\]~9'" {  } { { "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" "0.080 ns" { ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_6_result_int[5]~7 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_6_result_int[6]~9 } "NODE_NAME" } } { "db/alt_u_div_e2f.tdf" "" { Text "D:/HD_ADPCM/HD_ADPCM_1Bit_Stereo_Decoder/db/alt_u_div_e2f.tdf" 106 22 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 -1} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.458 ns) 5.821 ns ADPCM_Decoder_1_Bit:u6\|lpm_divide:Div0\|lpm_divide_aem:auto_generated\|sign_div_unsign_klh:divider\|alt_u_div_e2f:divider\|add_sub_6_result_int\[7\]~10 9 COMB LAB_X30_Y17 19 " "Info: 9: + IC(0.000 ns) + CELL(0.458 ns) = 5.821 ns; Loc. = LAB_X30_Y17; Fanout = 19; COMB Node = 'ADPCM_Decoder_1_Bit:u6\|lpm_divide:Div0\|lpm_divide_aem:auto_generated\|sign_div_unsign_klh:divider\|alt_u_div_e2f:divider\|add_sub_6_result_int\[7\]~10'" {  } { { "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" "0.458 ns" { ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_6_result_int[6]~9 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_6_result_int[7]~10 } "NODE_NAME" } } { "db/alt_u_div_e2f.tdf" "" { Text "D:/HD_ADPCM/HD_ADPCM_1Bit_Stereo_Decoder/db/alt_u_div_e2f.tdf" 106 22 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 -1} { "Info" "ITDB_NODE_DELAY" "IC(1.073 ns) + CELL(0.177 ns) 7.071 ns ADPCM_Decoder_1_Bit:u6\|lpm_divide:Div0\|lpm_divide_aem:auto_generated\|sign_div_unsign_klh:divider\|alt_u_div_e2f:divider\|StageOut\[50\]~221 10 COMB LAB_X29_Y18 2 " "Info: 10: + IC(1.073 ns) + CELL(0.177 ns) = 7.071 ns; Loc. = LAB_X29_Y18; Fanout = 2; COMB Node = 'ADPCM_Decoder_1_Bit:u6\|lpm_divide:Div0\|lpm_divide_aem:auto_generated\|sign_div_unsign_klh:divider\|alt_u_div_e2f:divider\|StageOut\[50\]~221'" {  } { { "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" "1.250 ns" { ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_6_result_int[7]~10 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|StageOut[50]~221 } "NODE_NAME" } } { "db/alt_u_div_e2f.tdf" "" { Text "D:/HD_ADPCM/HD_ADPCM_1Bit_Stereo_Decoder/db/alt_u_div_e2f.tdf" 138 10 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 -1} { "Info" "ITDB_NODE_DELAY" "IC(1.073 ns) + CELL(0.495 ns) 8.639 ns ADPCM_Decoder_1_Bit:u6\|lpm_divide:Div0\|lpm_divide_aem:auto_generated\|sign_div_unsign_klh:divider\|alt_u_div_e2f:divider\|add_sub_7_result_int\[3\]~3 11 COMB LAB_X30_Y17 2 " "Info: 11: + IC(1.073 ns) + CELL(0.495 ns) = 8.639 ns; Loc. = LAB_X30_Y17; Fanout = 2; COMB Node = 'ADPCM_Decoder_1_Bit:u6\|lpm_divide:Div0\|lpm_divide_aem:auto_generated\|sign_div_unsign_klh:divider\|alt_u_div_e2f:divider\|add_sub_7_result_int\[3\]~3'" {  } { { "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" "1.568 ns" { ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|StageOut[50]~221 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_7_result_int[3]~3 } "NODE_NAME" } } { "db/alt_u_div_e2f.tdf" "" { Text "D:/HD_ADPCM/HD_ADPCM_1Bit_Stereo_Decoder/db/alt_u_div_e2f.tdf" 111 22 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 -1} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.080 ns) 8.719 ns ADPCM_Decoder_1_Bit:u6\|lpm_divide:Div0\|lpm_divide_aem:auto_generated\|sign_div_unsign_klh:divider\|alt_u_div_e2f:divider\|add_sub_7_result_int\[4\]~5 12 COMB LAB_X30_Y17 2 " "Info: 12: + IC(0.000 ns) + CELL(0.080 ns) = 8.719 ns; Loc. = LAB_X30_Y17; Fanout = 2; COMB Node = 'ADPCM_Decoder_1_Bit:u6\|lpm_divide:Div0\|lpm_divide_aem:auto_generated\|sign_div_unsign_klh:divider\|alt_u_div_e2f:divider\|add_sub_7_result_int\[4\]~5'" {  } { { "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" "0.080 ns" { ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_7_result_int[3]~3 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_7_result_int[4]~5 } "NODE_NAME" } } { "db/alt_u_div_e2f.tdf" "" { Text "D:/HD_ADPCM/HD_ADPCM_1Bit_Stereo_Decoder/db/alt_u_div_e2f.tdf" 111 22 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 -1} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.080 ns) 8.799 ns ADPCM_Decoder_1_Bit:u6\|lpm_divide:Div0\|lpm_divide_aem:auto_generated\|sign_div_unsign_klh:divider\|alt_u_div_e2f:divider\|add_sub_7_result_int\[5\]~7 13 COMB LAB_X30_Y17 2 " "Info: 13: + IC(0.000 ns) + CELL(0.080 ns) = 8.799 ns; Loc. = LAB_X30_Y17; Fanout = 2; COMB Node = 'ADPCM_Decoder_1_Bit:u6\|lpm_divide:Div0\|lpm_divide_aem:auto_generated\|sign_div_unsign_klh:divider\|alt_u_div_e2f:divider\|add_sub_7_result_int\[5\]~7'" {  } { { "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" "0.080 ns" { ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_7_result_int[4]~5 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_7_result_int[5]~7 } "NODE_NAME" } } { "db/alt_u_div_e2f.tdf" "" { Text "D:/HD_ADPCM/HD_ADPCM_1Bit_Stereo_Decoder/db/alt_u_div_e2f.tdf" 111 22 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 -1} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.080 ns) 8.879 ns ADPCM_Decoder_1_Bit:u6\|lpm_divide:Div0\|lpm_divide_aem:auto_generated\|sign_div_unsign_klh:divider\|alt_u_div_e2f:divider\|add_sub_7_result_int\[6\]~9 14 COMB LAB_X30_Y17 1 " "Info: 14: + IC(0.000 ns) + CELL(0.080 ns) = 8.879 ns; Loc. = LAB_X30_Y17; Fanout = 1; COMB Node = 'ADPCM_Decoder_1_Bit:u6\|lpm_divide:Div0\|lpm_divide_aem:auto_generated\|sign_div_unsign_klh:divider\|alt_u_div_e2f:divider\|add_sub_7_result_int\[6\]~9'" {  } { { "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" "0.080 ns" { ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_7_result_int[5]~7 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_7_result_int[6]~9 } "NODE_NAME" } } { "db/alt_u_div_e2f.tdf" "" { Text "D:/HD_ADPCM/HD_ADPCM_1Bit_Stereo_Decoder/db/alt_u_div_e2f.tdf" 111 22 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 -1} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.080 ns) 8.959 ns ADPCM_Decoder_1_Bit:u6\|lpm_divide:Div0\|lpm_divide_aem:auto_generated\|sign_div_unsign_klh:divider\|alt_u_div_e2f:divider\|add_sub_7_result_int\[7\]~11 15 COMB LAB_X30_Y17 1 " "Info: 15: + IC(0.000 ns) + CELL(0.080 ns) = 8.959 ns; Loc. = LAB_X30_Y17; Fanout = 1; COMB Node = 'ADPCM_Decoder_1_Bit:u6\|lpm_divide:Div0\|lpm_divide_aem:auto_generated\|sign_div_unsign_klh:divider\|alt_u_div_e2f:divider\|add_sub_7_result_int\[7\]~11'" {  } { { "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" "0.080 ns" { ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_7_result_int[6]~9 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_7_result_int[7]~11 } "NODE_NAME" } } { "db/alt_u_div_e2f.tdf" "" { Text "D:/HD_ADPCM/HD_ADPCM_1Bit_Stereo_Decoder/db/alt_u_div_e2f.tdf" 111 22 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 -1} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.458 ns) 9.417 ns ADPCM_Decoder_1_Bit:u6\|lpm_divide:Div0\|lpm_divide_aem:auto_generated\|sign_div_unsign_klh:divider\|alt_u_div_e2f:divider\|add_sub_7_result_int\[8\]~12 16 COMB LAB_X30_Y17 20 " "Info: 16: + IC(0.000 ns) + CELL(0.458 ns) = 9.417 ns; Loc. = LAB_X30_Y17; Fanout = 20; COMB Node = 'ADPCM_Decoder_1_Bit:u6\|lpm_divide:Div0\|lpm_divide_aem:auto_generated\|sign_div_unsign_klh:divider\|alt_u_div_e2f:divider\|add_sub_7_result_int\[8\]~12'" {  } { { "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" "0.458 ns" { ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_7_result_int[7]~11 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_7_result_int[8]~12 } "NODE_NAME" } } { "db/alt_u_div_e2f.tdf" "" { Text "D:/HD_ADPCM/HD_ADPCM_1Bit_Stereo_Decoder/db/alt_u_div_e2f.tdf" 111 22 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 -1} { "Info" "ITDB_NODE_DELAY" "IC(0.388 ns) + CELL(0.521 ns) 10.326 ns ADPCM_Decoder_1_Bit:u6\|lpm_divide:Div0\|lpm_divide_aem:auto_generated\|sign_div_unsign_klh:divider\|alt_u_div_e2f:divider\|StageOut\[58\]~197 17 COMB LAB_X29_Y17 2 " "Info: 17: + IC(0.388 ns) + CELL(0.521 ns) = 10.326 ns; Loc. = LAB_X29_Y17; Fanout = 2; COMB Node = 'ADPCM_Decoder_1_Bit:u6\|lpm_divide:Div0\|lpm_divide_aem:auto_generated\|sign_div_unsign_klh:divider\|alt_u_div_e2f:divider\|StageOut\[58\]~197'" {  } { { "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" "0.909 ns" { ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_7_result_int[8]~12 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|StageOut[58]~197 } "NODE_NAME" } } { "db/alt_u_div_e2f.tdf" "" { Text "D:/HD_ADPCM/HD_ADPCM_1Bit_Stereo_Decoder/db/alt_u_div_e2f.tdf" 138 10 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 -1} { "Info" "ITDB_NODE_DELAY" "IC(1.015 ns) + CELL(0.517 ns) 11.858 ns ADPCM_Decoder_1_Bit:u6\|lpm_divide:Div0\|lpm_divide_aem:auto_generated\|sign_div_unsign_klh:divider\|alt_u_div_e2f:divider\|add_sub_8_result_int\[3\]~3 18 COMB LAB_X31_Y17 2 " "Info: 18: + IC(1.015 ns) + CELL(0.517 ns) = 11.858 ns; Loc. = LAB_X31_Y17; Fanout = 2; COMB Node = 'ADPCM_Decoder_1_Bit:u6\|lpm_divide:Div0\|lpm_divide_aem:auto_generated\|sign_div_unsign_klh:divider\|alt_u_div_e2f:divider\|add_sub_8_result_int\[3\]~3'" {  } { { "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" "1.532 ns" { ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|StageOut[58]~197 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_8_result_int[3]~3 } "NODE_NAME" } } { "db/alt_u_div_e2f.tdf" "" { Text "D:/HD_ADPCM/HD_ADPCM_1Bit_Stereo_Decoder/db/alt_u_div_e2f.tdf" 116 22 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 -1} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.080 ns) 11.938 ns ADPCM_Decoder_1_Bit:u6\|lpm_divide:Div0\|lpm_divide_aem:auto_generated\|sign_div_unsign_klh:divider\|alt_u_div_e2f:divider\|add_sub_8_result_int\[4\]~5 19 COMB LAB_X31_Y17 2 " "Info: 19: + IC(0.000 ns) + CELL(0.080 ns) = 11.938 ns; Loc. = LAB_X31_Y17; Fanout = 2; COMB Node = 'ADPCM_Decoder_1_Bit:u6\|lpm_divide:Div0\|lpm_divide_aem:auto_generated\|sign_div_unsign_klh:divider\|alt_u_div_e2f:divider\|add_sub_8_result_int\[4\]~5'" {  } { { "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" "0.080 ns" { ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_8_result_int[3]~3 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_8_result_int[4]~5 } "NODE_NAME" } } { "db/alt_u_div_e2f.tdf" "" { Text "D:/HD_ADPCM/HD_ADPCM_1Bit_Stereo_Decoder/db/alt_u_div_e2f.tdf" 116 22 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 -1} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.080 ns) 12.018 ns ADPCM_Decoder_1_Bit:u6\|lpm_divide:Div0\|lpm_divide_aem:auto_generated\|sign_div_unsign_klh:divider\|alt_u_div_e2f:divider\|add_sub_8_result_int\[5\]~7 20 COMB LAB_X31_Y17 2 " "Info: 20: + IC(0.000 ns) + CELL(0.080 ns) = 12.018 ns; Loc. = LAB_X31_Y17; Fanout = 2; COMB Node = 'ADPCM_Decoder_1_Bit:u6\|lpm_divide:Div0\|lpm_divide_aem:auto_generated\|sign_div_unsign_klh:divider\|alt_u_div_e2f:divider\|add_sub_8_result_int\[5\]~7'" {  } { { "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" "0.080 ns" { ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_8_result_int[4]~5 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_8_result_int[5]~7 } "NODE_NAME" } } { "db/alt_u_div_e2f.tdf" "" { Text "D:/HD_ADPCM/HD_ADPCM_1Bit_Stereo_Decoder/db/alt_u_div_e2f.tdf" 116 22 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 -1} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.080 ns) 12.098 ns ADPCM_Decoder_1_Bit:u6\|lpm_divide:Div0\|lpm_divide_aem:auto_generated\|sign_div_unsign_klh:divider\|alt_u_div_e2f:divider\|add_sub_8_result_int\[6\]~9 21 COMB LAB_X31_Y17 1 " "Info: 21: + IC(0.000 ns) + CELL(0.080 ns) = 12.098 ns; Loc. = LAB_X31_Y17; Fanout = 1; COMB Node = 'ADPCM_Decoder_1_Bit:u6\|lpm_divide:Div0\|lpm_divide_aem:auto_generated\|sign_div_unsign_klh:divider\|alt_u_div_e2f:divider\|add_sub_8_result_int\[6\]~9'" {  } { { "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" "0.080 ns" { ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_8_result_int[5]~7 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_8_result_int[6]~9 } "NODE_NAME" } } { "db/alt_u_div_e2f.tdf" "" { Text "D:/HD_ADPCM/HD_ADPCM_1Bit_Stereo_Decoder/db/alt_u_div_e2f.tdf" 116 22 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 -1} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.080 ns) 12.178 ns ADPCM_Decoder_1_Bit:u6\|lpm_divide:Div0\|lpm_divide_aem:auto_generated\|sign_div_unsign_klh:divider\|alt_u_div_e2f:divider\|add_sub_8_result_int\[7\]~11 22 COMB LAB_X31_Y17 1 " "Info: 22: + IC(0.000 ns) + CELL(0.080 ns) = 12.178 ns; Loc. = LAB_X31_Y17; Fanout = 1; COMB Node = 'ADPCM_Decoder_1_Bit:u6\|lpm_divide:Div0\|lpm_divide_aem:auto_generated\|sign_div_unsign_klh:divider\|alt_u_div_e2f:divider\|add_sub_8_result_int\[7\]~11'" {  } { { "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" "0.080 ns" { ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_8_result_int[6]~9 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_8_result_int[7]~11 } "NODE_NAME" } } { "db/alt_u_div_e2f.tdf" "" { Text "D:/HD_ADPCM/HD_ADPCM_1Bit_Stereo_Decoder/db/alt_u_div_e2f.tdf" 116 22 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 -1} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.458 ns) 12.636 ns ADPCM_Decoder_1_Bit:u6\|lpm_divide:Div0\|lpm_divide_aem:auto_generated\|sign_div_unsign_klh:divider\|alt_u_div_e2f:divider\|add_sub_8_result_int\[8\]~12 23 COMB LAB_X31_Y17 20 " "Info: 23: + IC(0.000 ns) + CELL(0.458 ns) = 12.636 ns; Loc. = LAB_X31_Y17; Fanout = 20; COMB Node = 'ADPCM_Decoder_1_Bit:u6\|lpm_divide:Div0\|lpm_divide_aem:auto_generated\|sign_div_unsign_klh:divider\|alt_u_div_e2f:divider\|add_sub_8_result_int\[8\]~12'" {  } { { "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" "0.458 ns" { ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_8_result_int[7]~11 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_8_result_int[8]~12 } "NODE_NAME" } } { "db/alt_u_div_e2f.tdf" "" { Text "D:/HD_ADPCM/HD_ADPCM_1Bit_Stereo_Decoder/db/alt_u_div_e2f.tdf" 116 22 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 -1} { "Info" "ITDB_NODE_DELAY" "IC(1.039 ns) + CELL(0.178 ns) 13.853 ns ADPCM_Decoder_1_Bit:u6\|lpm_divide:Div0\|lpm_divide_aem:auto_generated\|sign_div_unsign_klh:divider\|alt_u_div_e2f:divider\|StageOut\[67\]~581 24 COMB LAB_X29_Y17 3 " "Info: 24: + IC(1.039 ns) + CELL(0.178 ns) = 13.853 ns; Loc. = LAB_X29_Y17; Fanout = 3; COMB Node = 'ADPCM_Decoder_1_Bit:u6\|lpm_divide:Div0\|lpm_divide_aem:auto_generated\|sign_div_unsign_klh:divider\|alt_u_div_e2f:divider\|StageOut\[67\]~581'" {  } { { "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" "1.217 ns" { ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_8_result_int[8]~12 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|StageOut[67]~581 } "NODE_NAME" } } { "db/alt_u_div_e2f.tdf" "" { Text "D:/HD_ADPCM/HD_ADPCM_1Bit_Stereo_Decoder/db/alt_u_div_e2f.tdf" 138 10 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 -1} { "Info" "ITDB_NODE_DELAY" "IC(1.375 ns) + CELL(0.517 ns) 15.745 ns ADPCM_Decoder_1_Bit:u6\|lpm_divide:Div0\|lpm_divide_aem:auto_generated\|sign_div_unsign_klh:divider\|alt_u_div_e2f:divider\|add_sub_9_result_int\[4\]~5 25 COMB LAB_X32_Y20 2 " "Info: 25: + IC(1.375 ns) + CELL(0.517 ns) = 15.745 ns; Loc. = LAB_X32_Y20; Fanout = 2; COMB Node = 'ADPCM_Decoder_1_Bit:u6\|lpm_divide:Div0\|lpm_divide_aem:auto_generated\|sign_div_unsign_klh:divider\|alt_u_div_e2f:divider\|add_sub_9_result_int\[4\]~5'" {  } { { "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" "1.892 ns" { ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|StageOut[67]~581 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_9_result_int[4]~5 } "NODE_NAME" } } { "db/alt_u_div_e2f.tdf" "" { Text "D:/HD_ADPCM/HD_ADPCM_1Bit_Stereo_Decoder/db/alt_u_div_e2f.tdf" 121 22 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 -1} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.080 ns) 15.825 ns ADPCM_Decoder_1_Bit:u6\|lpm_divide:Div0\|lpm_divide_aem:auto_generated\|sign_div_unsign_klh:divider\|alt_u_div_e2f:divider\|add_sub_9_result_int\[5\]~7 26 COMB LAB_X32_Y20 2 " "Info: 26: + IC(0.000 ns) + CELL(0.080 ns) = 15.825 ns; Loc. = LAB_X32_Y20; Fanout = 2; COMB Node = 'ADPCM_Decoder_1_Bit:u6\|lpm_divide:Div0\|lpm_divide_aem:auto_generated\|sign_div_unsign_klh:divider\|alt_u_div_e2f:divider\|add_sub_9_result_int\[5\]~7'" {  } { { "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" "0.080 ns" { ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_9_result_int[4]~5 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_9_result_int[5]~7 } "NODE_NAME" } } { "db/alt_u_div_e2f.tdf" "" { Text "D:/HD_ADPCM/HD_ADPCM_1Bit_Stereo_Decoder/db/alt_u_div_e2f.tdf" 121 22 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 -1} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.080 ns) 15.905 ns ADPCM_Decoder_1_Bit:u6\|lpm_divide:Div0\|lpm_divide_aem:auto_generated\|sign_div_unsign_klh:divider\|alt_u_div_e2f:divider\|add_sub_9_result_int\[6\]~9 27 COMB LAB_X32_Y20 1 " "Info: 27: + IC(0.000 ns) + CELL(0.080 ns) = 15.905 ns; Loc. = LAB_X32_Y20; Fanout = 1; COMB Node = 'ADPCM_Decoder_1_Bit:u6\|lpm_divide:Div0\|lpm_divide_aem:auto_generated\|sign_div_unsign_klh:divider\|alt_u_div_e2f:divider\|add_sub_9_result_int\[6\]~9'" {  } { { "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" "0.080 ns" { ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_9_result_int[5]~7 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_9_result_int[6]~9 } "NODE_NAME" } } { "db/alt_u_div_e2f.tdf" "" { Text "D:/HD_ADPCM/HD_ADPCM_1Bit_Stereo_Decoder/db/alt_u_div_e2f.tdf" 121 22 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 -1} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.080 ns) 15.985 ns ADPCM_Decoder_1_Bit:u6\|lpm_divide:Div0\|lpm_divide_aem:auto_generated\|sign_div_unsign_klh:divider\|alt_u_div_e2f:divider\|add_sub_9_result_int\[7\]~11 28 COMB LAB_X32_Y20 1 " "Info: 28: + IC(0.000 ns) + CELL(0.080 ns) = 15.985 ns; Loc. = LAB_X32_Y20; Fanout = 1; COMB Node = 'ADPCM_Decoder_1_Bit:u6\|lpm_divide:Div0\|lpm_divide_aem:auto_generated\|sign_div_unsign_klh:divider\|alt_u_div_e2f:divider\|add_sub_9_result_int\[7\]~11'" {  } { { "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" "0.080 ns" { ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_9_result_int[6]~9 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_9_result_int[7]~11 } "NODE_NAME" } } { "db/alt_u_div_e2f.tdf" "" { Text "D:/HD_ADPCM/HD_ADPCM_1Bit_Stereo_Decoder/db/alt_u_div_e2f.tdf" 121 22 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 -1} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.458 ns) 16.443 ns ADPCM_Decoder_1_Bit:u6\|lpm_divide:Div0\|lpm_divide_aem:auto_generated\|sign_div_unsign_klh:divider\|alt_u_div_e2f:divider\|add_sub_9_result_int\[8\]~12 29 COMB LAB_X32_Y20 20 " "Info: 29: + IC(0.000 ns) + CELL(0.458 ns) = 16.443 ns; Loc. = LAB_X32_Y20; Fanout = 20; COMB Node = 'ADPCM_Decoder_1_Bit:u6\|lpm_divide:Div0\|lpm_divide_aem:auto_generated\|sign_div_unsign_klh:divider\|alt_u_div_e2f:divider\|add_sub_9_result_int\[8\]~12'" {  } { { "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" "0.458 ns" { ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_9_result_int[7]~11 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_9_result_int[8]~12 } "NODE_NAME" } } { "db/alt_u_div_e2f.tdf" "" { Text "D:/HD_ADPCM/HD_ADPCM_1Bit_Stereo_Decoder/db/alt_u_div_e2f.tdf" 121 22 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 -1} { "Info" "ITDB_NODE_DELAY" "IC(1.039 ns) + CELL(0.177 ns) 17.659 ns ADPCM_Decoder_1_Bit:u6\|lpm_divide:Div0\|lpm_divide_aem:auto_generated\|sign_div_unsign_klh:divider\|alt_u_div_e2f:divider\|StageOut\[73\]~174 30 COMB LAB_X34_Y20 2 " "Info: 30: + IC(1.039 ns) + CELL(0.177 ns) = 17.659 ns; Loc. = LAB_X34_Y20; Fanout = 2; COMB Node = 'ADPCM_Decoder_1_Bit:u6\|lpm_divide:Div0\|lpm_divide_aem:auto_generated\|sign_div_unsign_klh:divider\|alt_u_div_e2f:divider\|StageOut\[73\]~174'" {  } { { "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" "1.216 ns" { ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_9_result_int[8]~12 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|StageOut[73]~174 } "NODE_NAME" } } { "db/alt_u_div_e2f.tdf" "" { Text "D:/HD_ADPCM/HD_ADPCM_1Bit_Stereo_Decoder/db/alt_u_div_e2f.tdf" 138 10 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 -1} { "Info" "ITDB_NODE_DELAY" "IC(0.498 ns) + CELL(0.495 ns) 18.652 ns ADPCM_Decoder_1_Bit:u6\|lpm_divide:Div0\|lpm_divide_aem:auto_generated\|sign_div_unsign_klh:divider\|alt_u_div_e2f:divider\|add_sub_10_result_int\[2\]~1 31 COMB LAB_X34_Y20 2 " "Info: 31: + IC(0.498 ns) + CELL(0.495 ns) = 18.652 ns; Loc. = LAB_X34_Y20; Fanout = 2; COMB Node = 'ADPCM_Decoder_1_Bit:u6\|lpm_divide:Div0\|lpm_divide_aem:auto_generated\|sign_div_unsign_klh:divider\|alt_u_div_e2f:divider\|add_sub_10_result_int\[2\]~1'" {  } { { "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" "0.993 ns" { ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|StageOut[73]~174 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_10_result_int[2]~1 } "NODE_NAME" } } { "db/alt_u_div_e2f.tdf" "" { Text "D:/HD_ADPCM/HD_ADPCM_1Bit_Stereo_Decoder/db/alt_u_div_e2f.tdf" 36 23 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 -1} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.080 ns) 18.732 ns ADPCM_Decoder_1_Bit:u6\|lpm_divide:Div0\|lpm_divide_aem:auto_generated\|sign_div_unsign_klh:divider\|alt_u_div_e2f:divider\|add_sub_10_result_int\[3\]~3 32 COMB LAB_X34_Y20 2 " "Info: 32: + IC(0.000 ns) + CELL(0.080 ns) = 18.732 ns; Loc. = LAB_X34_Y20; Fanout = 2; COMB Node = 'ADPCM_Decoder_1_Bit:u6\|lpm_divide:Div0\|lpm_divide_aem:auto_generated\|sign_div_unsign_klh:divider\|alt_u_div_e2f:divider\|add_sub_10_result_int\[3\]~3'" {  } { { "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" "0.080 ns" { ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_10_result_int[2]~1 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_10_result_int[3]~3 } "NODE_NAME" } } { "db/alt_u_div_e2f.tdf" "" { Text "D:/HD_ADPCM/HD_ADPCM_1Bit_Stereo_Decoder/db/alt_u_div_e2f.tdf" 36 23 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 -1} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.080 ns) 18.812 ns ADPCM_Decoder_1_Bit:u6\|lpm_divide:Div0\|lpm_divide_aem:auto_generated\|sign_div_unsign_klh:divider\|alt_u_div_e2f:divider\|add_sub_10_result_int\[4\]~5 33 COMB LAB_X34_Y20 2 " "Info: 33: + IC(0.000 ns) + CELL(0.080 ns) = 18.812 ns; Loc. = LAB_X34_Y20; Fanout = 2; COMB Node = 'ADPCM_Decoder_1_Bit:u6\|lpm_divide:Div0\|lpm_divide_aem:auto_generated\|sign_div_unsign_klh:divider\|alt_u_div_e2f:divider\|add_sub_10_result_int\[4\]~5'" {  } { { "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" "0.080 ns" { ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_10_result_int[3]~3 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_10_result_int[4]~5 } "NODE_NAME" } } { "db/alt_u_div_e2f.tdf" "" { Text "D:/HD_ADPCM/HD_ADPCM_1Bit_Stereo_Decoder/db/alt_u_div_e2f.tdf" 36 23 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 -1} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.080 ns) 18.892 ns ADPCM_Decoder_1_Bit:u6\|lpm_divide:Div0\|lpm_divide_aem:auto_generated\|sign_div_unsign_klh:divider\|alt_u_div_e2f:divider\|add_sub_10_result_int\[5\]~7 34 COMB LAB_X34_Y20 2 " "Info: 34: + IC(0.000 ns) + CELL(0.080 ns) = 18.892 ns; Loc. = LAB_X34_Y20; Fanout = 2; COMB Node = 'ADPCM_Decoder_1_Bit:u6\|lpm_divide:Div0\|lpm_divide_aem:auto_generated\|sign_div_unsign_klh:divider\|alt_u_div_e2f:divider\|add_sub_10_result_int\[5\]~7'" {  } { { "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" "0.080 ns" { ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_10_result_int[4]~5 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_10_result_int[5]~7 } "NODE_NAME" } } { "db/alt_u_div_e2f.tdf" "" { Text "D:/HD_ADPCM/HD_ADPCM_1Bit_Stereo_Decoder/db/alt_u_div_e2f.tdf" 36 23 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 -1} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.080 ns) 18.972 ns ADPCM_Decoder_1_Bit:u6\|lpm_divide:Div0\|lpm_divide_aem:auto_generated\|sign_div_unsign_klh:divider\|alt_u_div_e2f:divider\|add_sub_10_result_int\[6\]~9 35 COMB LAB_X34_Y20 1 " "Info: 35: + IC(0.000 ns) + CELL(0.080 ns) = 18.972 ns; Loc. = LAB_X34_Y20; Fanout = 1; COMB Node = 'ADPCM_Decoder_1_Bit:u6\|lpm_divide:Div0\|lpm_divide_aem:auto_generated\|sign_div_unsign_klh:divider\|alt_u_div_e2f:divider\|add_sub_10_result_int\[6\]~9'" {  } { { "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" "0.080 ns" { ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_10_result_int[5]~7 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_10_result_int[6]~9 } "NODE_NAME" } } { "db/alt_u_div_e2f.tdf" "" { Text "D:/HD_ADPCM/HD_ADPCM_1Bit_Stereo_Decoder/db/alt_u_div_e2f.tdf" 36 23 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 -1} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.080 ns) 19.052 ns ADPCM_Decoder_1_Bit:u6\|lpm_divide:Div0\|lpm_divide_aem:auto_generated\|sign_div_unsign_klh:divider\|alt_u_div_e2f:divider\|add_sub_10_result_int\[7\]~11 36 COMB LAB_X34_Y20 1 " "Info: 36: + IC(0.000 ns) + CELL(0.080 ns) = 19.052 ns; Loc. = LAB_X34_Y20; Fanout = 1; COMB Node = 'ADPCM_Decoder_1_Bit:u6\|lpm_divide:Div0\|lpm_divide_aem:auto_generated\|sign_div_unsign_klh:divider\|alt_u_div_e2f:divider\|add_sub_10_result_int\[7\]~11'" {  } { { "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" "0.080 ns" { ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_10_result_int[6]~9 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_10_result_int[7]~11 } "NODE_NAME" } } { "db/alt_u_div_e2f.tdf" "" { Text "D:/HD_ADPCM/HD_ADPCM_1Bit_Stereo_Decoder/db/alt_u_div_e2f.tdf" 36 23 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 -1} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.458 ns) 19.510 ns ADPCM_Decoder_1_Bit:u6\|lpm_divide:Div0\|lpm_divide_aem:auto_generated\|sign_div_unsign_klh:divider\|alt_u_div_e2f:divider\|add_sub_10_result_int\[8\]~12 37 COMB LAB_X34_Y20 20 " "Info: 37: + IC(0.000 ns) + CELL(0.458 ns) = 19.510 ns; Loc. = LAB_X34_Y20; Fanout = 20; COMB Node = 'ADPCM_Decoder_1_Bit:u6\|lpm_divide:Div0\|lpm_divide_aem:auto_generated\|sign_div_unsign_klh:divider\|alt_u_div_e2f:divider\|add_sub_10_result_int\[8\]~12'" {  } { { "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" "0.458 ns" { ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_10_result_int[7]~11 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_10_result_int[8]~12 } "NODE_NAME" } } { "db/alt_u_div_e2f.tdf" "" { Text "D:/HD_ADPCM/HD_ADPCM_1Bit_Stereo_Decoder/db/alt_u_div_e2f.tdf" 36 23 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 -1} { "Info" "ITDB_NODE_DELAY" "IC(0.588 ns) + CELL(0.319 ns) 20.417 ns ADPCM_Decoder_1_Bit:u6\|lpm_divide:Div0\|lpm_divide_aem:auto_generated\|sign_div_unsign_klh:divider\|alt_u_div_e2f:divider\|StageOut\[83\]~544 38 COMB LAB_X33_Y20 3 " "Info: 38: + IC(0.588 ns) + CELL(0.319 ns) = 20.417 ns; Loc. = LAB_X33_Y20; Fanout = 3; COMB Node = 'ADPCM_Decoder_1_Bit:u6\|lpm_divide:Div0\|lpm_divide_aem:auto_generated\|sign_div_unsign_klh:divider\|alt_u_div_e2f:divider\|StageOut\[83\]~544'" {  } { { "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" "0.907 ns" { ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_10_result_int[8]~12 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|StageOut[83]~544 } "NODE_NAME" } } { "db/alt_u_div_e2f.tdf" "" { Text "D:/HD_ADPCM/HD_ADPCM_1Bit_Stereo_Decoder/db/alt_u_div_e2f.tdf" 138 10 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 -1} { "Info" "ITDB_NODE_DELAY" "IC(1.016 ns) + CELL(0.517 ns) 21.950 ns ADPCM_Decoder_1_Bit:u6\|lpm_divide:Div0\|lpm_divide_aem:auto_generated\|sign_div_unsign_klh:divider\|alt_u_div_e2f:divider\|add_sub_11_result_int\[4\]~5 39 COMB LAB_X35_Y20 2 " "Info: 39: + IC(1.016 ns) + CELL(0.517 ns) = 21.950 ns; Loc. = LAB_X35_Y20; Fanout = 2; COMB Node = 'ADPCM_Decoder_1_Bit:u6\|lpm_divide:Div0\|lpm_divide_aem:auto_generated\|sign_div_unsign_klh:divider\|alt_u_div_e2f:divider\|add_sub_11_result_int\[4\]~5'" {  } { { "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" "1.533 ns" { ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|StageOut[83]~544 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_11_result_int[4]~5 } "NODE_NAME" } } { "db/alt_u_div_e2f.tdf" "" { Text "D:/HD_ADPCM/HD_ADPCM_1Bit_Stereo_Decoder/db/alt_u_div_e2f.tdf" 41 23 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 -1} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.080 ns) 22.030 ns ADPCM_Decoder_1_Bit:u6\|lpm_divide:Div0\|lpm_divide_aem:auto_generated\|sign_div_unsign_klh:divider\|alt_u_div_e2f:divider\|add_sub_11_result_int\[5\]~7 40 COMB LAB_X35_Y20 2 " "Info: 40: + IC(0.000 ns) + CELL(0.080 ns) = 22.030 ns; Loc. = LAB_X35_Y20; Fanout = 2; COMB Node = 'ADPCM_Decoder_1_Bit:u6\|lpm_divide:Div0\|lpm_divide_aem:auto_generated\|sign_div_unsign_klh:divider\|alt_u_div_e2f:divider\|add_sub_11_result_int\[5\]~7'" {  } { { "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" "0.080 ns" { ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_11_result_int[4]~5 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_11_result_int[5]~7 } "NODE_NAME" } } { "db/alt_u_div_e2f.tdf" "" { Text "D:/HD_ADPCM/HD_ADPCM_1Bit_Stereo_Decoder/db/alt_u_div_e2f.tdf" 41 23 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 -1} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.080 ns) 22.110 ns ADPCM_Decoder_1_Bit:u6\|lpm_divide:Div0\|lpm_divide_aem:auto_generated\|sign_div_unsign_klh:divider\|alt_u_div_e2f:divider\|add_sub_11_result_int\[6\]~9 41 COMB LAB_X35_Y20 1 " "Info: 41: + IC(0.000 ns) + CELL(0.080 ns) = 22.110 ns; Loc. = LAB_X35_Y20; Fanout = 1; COMB Node = 'ADPCM_Decoder_1_Bit:u6\|lpm_divide:Div0\|lpm_divide_aem:auto_generated\|sign_div_unsign_klh:divider\|alt_u_div_e2f:divider\|add_sub_11_result_int\[6\]~9'" {  } { { "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" "0.080 ns" { ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_11_result_int[5]~7 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_11_result_int[6]~9 } "NODE_NAME" } } { "db/alt_u_div_e2f.tdf" "" { Text "D:/HD_ADPCM/HD_ADPCM_1Bit_Stereo_Decoder/db/alt_u_div_e2f.tdf" 41 23 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 -1} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.080 ns) 22.190 ns ADPCM_Decoder_1_Bit:u6\|lpm_divide:Div0\|lpm_divide_aem:auto_generated\|sign_div_unsign_klh:divider\|alt_u_div_e2f:divider\|add_sub_11_result_int\[7\]~11 42 COMB LAB_X35_Y20 1 " "Info: 42: + IC(0.000 ns) + CELL(0.080 ns) = 22.190 ns; Loc. = LAB_X35_Y20; Fanout = 1; COMB Node = 'ADPCM_Decoder_1_Bit:u6\|lpm_divide:Div0\|lpm_divide_aem:auto_generated\|sign_div_unsign_klh:divider\|alt_u_div_e2f:divider\|add_sub_11_result_int\[7\]~11'" {  } { { "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" "0.080 ns" { ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_11_result_int[6]~9 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_11_result_int[7]~11 } "NODE_NAME" } } { "db/alt_u_div_e2f.tdf" "" { Text "D:/HD_ADPCM/HD_ADPCM_1Bit_Stereo_Decoder/db/alt_u_div_e2f.tdf" 41 23 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 -1} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.458 ns) 22.648 ns ADPCM_Decoder_1_Bit:u6\|lpm_divide:Div0\|lpm_divide_aem:auto_generated\|sign_div_unsign_klh:divider\|alt_u_div_e2f:divider\|add_sub_11_result_int\[8\]~12 43 COMB LAB_X35_Y20 20 " "Info: 43: + IC(0.000 ns) + CELL(0.458 ns) = 22.648 ns; Loc. = LAB_X35_Y20; Fanout = 20; COMB Node = 'ADPCM_Decoder_1_Bit:u6\|lpm_divide:Div0\|lpm_divide_aem:auto_generated\|sign_div_unsign_klh:divider\|alt_u_div_e2f:divider\|add_sub_11_result_int\[8\]~12'" {  } { { "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" "0.458 ns" { ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_11_result_int[7]~11 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_11_result_int[8]~12 } "NODE_NAME" } } { "db/alt_u_div_e2f.tdf" "" { Text "D:/HD_ADPCM/HD_ADPCM_1Bit_Stereo_Decoder/db/alt_u_div_e2f.tdf" 41 23 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 -1} { "Info" "ITDB_NODE_DELAY" "IC(0.895 ns) + CELL(0.319 ns) 23.862 ns ADPCM_Decoder_1_Bit:u6\|lpm_divide:Div0\|lpm_divide_aem:auto_generated\|sign_div_unsign_klh:divider\|alt_u_div_e2f:divider\|StageOut\[92\]~547 44 COMB LAB_X33_Y20 3 " "Info: 44: + IC(0.895 ns) + CELL(0.319 ns) = 23.862 ns; Loc. = LAB_X33_Y20; Fanout = 3; COMB Node = 'ADPCM_Decoder_1_Bit:u6\|lpm_divide:Div0\|lpm_divide_aem:auto_generated\|sign_div_unsign_klh:divider\|alt_u_div_e2f:divider\|StageOut\[92\]~547'" {  } { { "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" "1.214 ns" { ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_11_result_int[8]~12 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|StageOut[92]~547 } "NODE_NAME" } } { "db/alt_u_div_e2f.tdf" "" { Text "D:/HD_ADPCM/HD_ADPCM_1Bit_Stereo_Decoder/db/alt_u_div_e2f.tdf" 138 10 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 -1} { "Info" "ITDB_NODE_DELAY" "IC(1.017 ns) + CELL(0.517 ns) 25.396 ns ADPCM_Decoder_1_Bit:u6\|lpm_divide:Div0\|lpm_divide_aem:auto_generated\|sign_div_unsign_klh:divider\|alt_u_div_e2f:divider\|add_sub_12_result_int\[5\]~7 45 COMB LAB_X36_Y20 2 " "Info: 45: + IC(1.017 ns) + CELL(0.517 ns) = 25.396 ns; Loc. = LAB_X36_Y20; Fanout = 2; COMB Node = 'ADPCM_Decoder_1_Bit:u6\|lpm_divide:Div0\|lpm_divide_aem:auto_generated\|sign_div_unsign_klh:divider\|alt_u_div_e2f:divider\|add_sub_12_result_int\[5\]~7'" {  } { { "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" "1.534 ns" { ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|StageOut[92]~547 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_12_result_int[5]~7 } "NODE_NAME" } } { "db/alt_u_div_e2f.tdf" "" { Text "D:/HD_ADPCM/HD_ADPCM_1Bit_Stereo_Decoder/db/alt_u_div_e2f.tdf" 46 23 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 -1} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.080 ns) 25.476 ns ADPCM_Decoder_1_Bit:u6\|lpm_divide:Div0\|lpm_divide_aem:auto_generated\|sign_div_unsign_klh:divider\|alt_u_div_e2f:divider\|add_sub_12_result_int\[6\]~9 46 COMB LAB_X36_Y20 1 " "Info: 46: + IC(0.000 ns) + CELL(0.080 ns) = 25.476 ns; Loc. = LAB_X36_Y20; Fanout = 1; COMB Node = 'ADPCM_Decoder_1_Bit:u6\|lpm_divide:Div0\|lpm_divide_aem:auto_generated\|sign_div_unsign_klh:divider\|alt_u_div_e2f:divider\|add_sub_12_result_int\[6\]~9'" {  } { { "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" "0.080 ns" { ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_12_result_int[5]~7 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_12_result_int[6]~9 } "NODE_NAME" } } { "db/alt_u_div_e2f.tdf" "" { Text "D:/HD_ADPCM/HD_ADPCM_1Bit_Stereo_Decoder/db/alt_u_div_e2f.tdf" 46 23 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 -1} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.080 ns) 25.556 ns ADPCM_Decoder_1_Bit:u6\|lpm_divide:Div0\|lpm_divide_aem:auto_generated\|sign_div_unsign_klh:divider\|alt_u_div_e2f:divider\|add_sub_12_result_int\[7\]~11 47 COMB LAB_X36_Y20 1 " "Info: 47: + IC(0.000 ns) + CELL(0.080 ns) = 25.556 ns; Loc. = LAB_X36_Y20; Fanout = 1; COMB Node = 'ADPCM_Decoder_1_Bit:u6\|lpm_divide:Div0\|lpm_divide_aem:auto_generated\|sign_div_unsign_klh:divider\|alt_u_div_e2f:divider\|add_sub_12_result_int\[7\]~11'" {  } { { "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" "0.080 ns" { ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_12_result_int[6]~9 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_12_result_int[7]~11 } "NODE_NAME" } } { "db/alt_u_div_e2f.tdf" "" { Text "D:/HD_ADPCM/HD_ADPCM_1Bit_Stereo_Decoder/db/alt_u_div_e2f.tdf" 46 23 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 -1} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.458 ns) 26.014 ns ADPCM_Decoder_1_Bit:u6\|lpm_divide:Div0\|lpm_divide_aem:auto_generated\|sign_div_unsign_klh:divider\|alt_u_div_e2f:divider\|add_sub_12_result_int\[8\]~12 48 COMB LAB_X36_Y20 20 " "Info: 48: + IC(0.000 ns) + CELL(0.458 ns) = 26.014 ns; Loc. = LAB_X36_Y20; Fanout = 20; COMB Node = 'ADPCM_Decoder_1_Bit:u6\|lpm_divide:Div0\|lpm_divide_aem:auto_generated\|sign_div_unsign_klh:divider\|alt_u_div_e2f:divider\|add_sub_12_result_int\[8\]~12'" {  } { { "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" "0.458 ns" { ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_12_result_int[7]~11 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_12_result_int[8]~12 } "NODE_NAME" } } { "db/alt_u_div_e2f.tdf" "" { Text "D:/HD_ADPCM/HD_ADPCM_1Bit_Stereo_Decoder/db/alt_u_div_e2f.tdf" 46 23 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 -1} { "Info" "ITDB_NODE_DELAY" "IC(0.896 ns) + CELL(0.319 ns) 27.229 ns ADPCM_Decoder_1_Bit:u6\|lpm_divide:Div0\|lpm_divide_aem:auto_generated\|sign_div_unsign_klh:divider\|alt_u_div_e2f:divider\|StageOut\[101\]~550 49 COMB LAB_X33_Y20 3 " "Info: 49: + IC(0.896 ns) + CELL(0.319 ns) = 27.229 ns; Loc. = LAB_X33_Y20; Fanout = 3; COMB Node = 'ADPCM_Decoder_1_Bit:u6\|lpm_divide:Div0\|lpm_divide_aem:auto_generated\|sign_div_unsign_klh:divider\|alt_u_div_e2f:divider\|StageOut\[101\]~550'" {  } { { "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" "1.215 ns" { ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_12_result_int[8]~12 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|StageOut[101]~550 } "NODE_NAME" } } { "db/alt_u_div_e2f.tdf" "" { Text "D:/HD_ADPCM/HD_ADPCM_1Bit_Stereo_Decoder/db/alt_u_div_e2f.tdf" 138 10 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 -1} { "Info" "ITDB_NODE_DELAY" "IC(1.359 ns) + CELL(0.517 ns) 29.105 ns ADPCM_Decoder_1_Bit:u6\|lpm_divide:Div0\|lpm_divide_aem:auto_generated\|sign_div_unsign_klh:divider\|alt_u_div_e2f:divider\|add_sub_13_result_int\[6\]~9 50 COMB LAB_X36_Y21 1 " "Info: 50: + IC(1.359 ns) + CELL(0.517 ns) = 29.105 ns; Loc. = LAB_X36_Y21; Fanout = 1; COMB Node = 'ADPCM_Decoder_1_Bit:u6\|lpm_divide:Div0\|lpm_divide_aem:auto_generated\|sign_div_unsign_klh:divider\|alt_u_div_e2f:divider\|add_sub_13_result_int\[6\]~9'" {  } { { "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" "1.876 ns" { ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|StageOut[101]~550 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_13_result_int[6]~9 } "NODE_NAME" } } { "db/alt_u_div_e2f.tdf" "" { Text "D:/HD_ADPCM/HD_ADPCM_1Bit_Stereo_Decoder/db/alt_u_div_e2f.tdf" 51 23 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 -1} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.080 ns) 29.185 ns ADPCM_Decoder_1_Bit:u6\|lpm_divide:Div0\|lpm_divide_aem:auto_generated\|sign_div_unsign_klh:divider\|alt_u_div_e2f:divider\|add_sub_13_result_int\[7\]~11 51 COMB LAB_X36_Y21 1 " "Info: 51: + IC(0.000 ns) + CELL(0.080 ns) = 29.185 ns; Loc. = LAB_X36_Y21; Fanout = 1; COMB Node = 'ADPCM_Decoder_1_Bit:u6\|lpm_divide:Div0\|lpm_divide_aem:auto_generated\|sign_div_unsign_klh:divider\|alt_u_div_e2f:divider\|add_sub_13_result_int\[7\]~11'" {  } { { "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" "0.080 ns" { ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_13_result_int[6]~9 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_13_result_int[7]~11 } "NODE_NAME" } } { "db/alt_u_div_e2f.tdf" "" { Text "D:/HD_ADPCM/HD_ADPCM_1Bit_Stereo_Decoder/db/alt_u_div_e2f.tdf" 51 23 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 -1} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.458 ns) 29.643 ns ADPCM_Decoder_1_Bit:u6\|lpm_divide:Div0\|lpm_divide_aem:auto_generated\|sign_div_unsign_klh:divider\|alt_u_div_e2f:divider\|add_sub_13_result_int\[8\]~12 52 COMB LAB_X36_Y21 20 " "Info: 52: + IC(0.000 ns) + CELL(0.458 ns) = 29.643 ns; Loc. = LAB_X36_Y21; Fanout = 20; COMB Node = 'ADPCM_Decoder_1_Bit:u6\|lpm_divide:Div0\|lpm_divide_aem:auto_generated\|sign_div_unsign_klh:divider\|alt_u_div_e2f:divider\|add_sub_13_result_int\[8\]~12'" {  } { { "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" "0.458 ns" { ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_13_result_int[7]~11 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_13_result_int[8]~12 } "NODE_NAME" } } { "db/alt_u_div_e2f.tdf" "" { Text "D:/HD_ADPCM/HD_ADPCM_1Bit_Stereo_Decoder/db/alt_u_div_e2f.tdf" 51 23 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 -1} { "Info" "ITDB_NODE_DELAY" "IC(1.238 ns) + CELL(0.319 ns) 31.200 ns ADPCM_Decoder_1_Bit:u6\|lpm_divide:Div0\|lpm_divide_aem:auto_generated\|sign_div_unsign_klh:divider\|alt_u_div_e2f:divider\|StageOut\[110\]~553 53 COMB LAB_X33_Y20 1 " "Info: 53: + IC(1.238 ns) + CELL(0.319 ns) = 31.200 ns; Loc. = LAB_X33_Y20; Fanout = 1; COMB Node = 'ADPCM_Decoder_1_Bit:u6\|lpm_divide:Div0\|lpm_divide_aem:auto_generated\|sign_div_unsign_klh:divider\|alt_u_div_e2f:divider\|StageOut\[110\]~553'" {  } { { "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" "1.557 ns" { ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_13_result_int[8]~12 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|StageOut[110]~553 } "NODE_NAME" } } { "db/alt_u_div_e2f.tdf" "" { Text "D:/HD_ADPCM/HD_ADPCM_1Bit_Stereo_Decoder/db/alt_u_div_e2f.tdf" 138 10 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 -1} { "Info" "ITDB_NODE_DELAY" "IC(1.362 ns) + CELL(0.517 ns) 33.079 ns ADPCM_Decoder_1_Bit:u6\|lpm_divide:Div0\|lpm_divide_aem:auto_generated\|sign_div_unsign_klh:divider\|alt_u_div_e2f:divider\|add_sub_14_result_int\[7\]~11 54 COMB LAB_X37_Y21 1 " "Info: 54: + IC(1.362 ns) + CELL(0.517 ns) = 33.079 ns; Loc. = LAB_X37_Y21; Fanout = 1; COMB Node = 'ADPCM_Decoder_1_Bit:u6\|lpm_divide:Div0\|lpm_divide_aem:auto_generated\|sign_div_unsign_klh:divider\|alt_u_div_e2f:divider\|add_sub_14_result_int\[7\]~11'" {  } { { "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" "1.879 ns" { ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|StageOut[110]~553 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_14_result_int[7]~11 } "NODE_NAME" } } { "db/alt_u_div_e2f.tdf" "" { Text "D:/HD_ADPCM/HD_ADPCM_1Bit_Stereo_Decoder/db/alt_u_div_e2f.tdf" 56 23 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 -1} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.458 ns) 33.537 ns ADPCM_Decoder_1_Bit:u6\|lpm_divide:Div0\|lpm_divide_aem:auto_generated\|sign_div_unsign_klh:divider\|alt_u_div_e2f:divider\|add_sub_14_result_int\[8\]~12 55 COMB LAB_X37_Y21 20 " "Info: 55: + IC(0.000 ns) + CELL(0.458 ns) = 33.537 ns; Loc. = LAB_X37_Y21; Fanout = 20; COMB Node = 'ADPCM_Decoder_1_Bit:u6\|lpm_divide:Div0\|lpm_divide_aem:auto_generated\|sign_div_unsign_klh:divider\|alt_u_div_e2f:divider\|add_sub_14_result_int\[8\]~12'" {  } { { "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" "0.458 ns" { ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_14_result_int[7]~11 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_14_result_int[8]~12 } "NODE_NAME" } } { "db/alt_u_div_e2f.tdf" "" { Text "D:/HD_ADPCM/HD_ADPCM_1Bit_Stereo_Decoder/db/alt_u_div_e2f.tdf" 56 23 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 -1} { "Info" "ITDB_NODE_DELAY" "IC(0.498 ns) + CELL(0.177 ns) 34.212 ns ADPCM_Decoder_1_Bit:u6\|lpm_divide:Div0\|lpm_divide_aem:auto_generated\|sign_div_unsign_klh:divider\|alt_u_div_e2f:divider\|StageOut\[113\]~94 56 COMB LAB_X37_Y21 2 " "Info: 56: + IC(0.498 ns) + CELL(0.177 ns) = 34.212 ns; Loc. = LAB_X37_Y21; Fanout = 2; COMB Node = 'ADPCM_Decoder_1_Bit:u6\|lpm_divide:Div0\|lpm_divide_aem:auto_generated\|sign_div_unsign_klh:divider\|alt_u_div_e2f:divider\|StageOut\[113\]~94'" {  } { { "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" "0.675 ns" { ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_14_result_int[8]~12 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|StageOut[113]~94 } "NODE_NAME" } } { "db/alt_u_div_e2f.tdf" "" { Text "D:/HD_ADPCM/HD_ADPCM_1Bit_Stereo_Decoder/db/alt_u_div_e2f.tdf" 138 10 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 -1} { "Info" "ITDB_NODE_DELAY" "IC(1.073 ns) + CELL(0.495 ns) 35.780 ns ADPCM_Decoder_1_Bit:u6\|lpm_divide:Div0\|lpm_divide_aem:auto_generated\|sign_div_unsign_klh:divider\|alt_u_div_e2f:divider\|add_sub_15_result_int\[2\]~1 57 COMB LAB_X38_Y20 2 " "Info: 57: + IC(1.073 ns) + CELL(0.495 ns) = 35.780 ns; Loc. = LAB_X38_Y20; Fanout = 2; COMB Node = 'ADPCM_Decoder_1_Bit:u6\|lpm_divide:Div0\|lpm_divide_aem:auto_generated\|sign_div_unsign_klh:divider\|alt_u_div_e2f:divider\|add_sub_15_result_int\[2\]~1'" {  } { { "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" "1.568 ns" { ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|StageOut[113]~94 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_15_result_int[2]~1 } "NODE_NAME" } } { "db/alt_u_div_e2f.tdf" "" { Text "D:/HD_ADPCM/HD_ADPCM_1Bit_Stereo_Decoder/db/alt_u_div_e2f.tdf" 61 23 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 -1} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.080 ns) 35.860 ns ADPCM_Decoder_1_Bit:u6\|lpm_divide:Div0\|lpm_divide_aem:auto_generated\|sign_div_unsign_klh:divider\|alt_u_div_e2f:divider\|add_sub_15_result_int\[3\]~3 58 COMB LAB_X38_Y20 2 " "Info: 58: + IC(0.000 ns) + CELL(0.080 ns) = 35.860 ns; Loc. = LAB_X38_Y20; Fanout = 2; COMB Node = 'ADPCM_Decoder_1_Bit:u6\|lpm_divide:Div0\|lpm_divide_aem:auto_generated\|sign_div_unsign_klh:divider\|alt_u_div_e2f:divider\|add_sub_15_result_int\[3\]~3'" {  } { { "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" "0.080 ns" { ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_15_result_int[2]~1 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_15_result_int[3]~3 } "NODE_NAME" } } { "db/alt_u_div_e2f.tdf" "" { Text "D:/HD_ADPCM/HD_ADPCM_1Bit_Stereo_Decoder/db/alt_u_div_e2f.tdf" 61 23 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 -1} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.080 ns) 35.940 ns ADPCM_Decoder_1_Bit:u6\|lpm_divide:Div0\|lpm_divide_aem:auto_generated\|sign_div_unsign_klh:divider\|alt_u_div_e2f:divider\|add_sub_15_result_int\[4\]~5 59 COMB LAB_X38_Y20 2 " "Info: 59: + IC(0.000 ns) + CELL(0.080 ns) = 35.940 ns; Loc. = LAB_X38_Y20; Fanout = 2; COMB Node = 'ADPCM_Decoder_1_Bit:u6\|lpm_divide:Div0\|lpm_divide_aem:auto_generated\|sign_div_unsign_klh:divider\|alt_u_div_e2f:divider\|add_sub_15_result_int\[4\]~5'" {  } { { "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" "0.080 ns" { ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_15_result_int[3]~3 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_15_result_int[4]~5 } "NODE_NAME" } } { "db/alt_u_div_e2f.tdf" "" { Text "D:/HD_ADPCM/HD_ADPCM_1Bit_Stereo_Decoder/db/alt_u_div_e2f.tdf" 61 23 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 -1} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.080 ns) 36.020 ns ADPCM_Decoder_1_Bit:u6\|lpm_divide:Div0\|lpm_divide_aem:auto_generated\|sign_div_unsign_klh:divider\|alt_u_div_e2f:divider\|add_sub_15_result_int\[5\]~7 60 COMB LAB_X38_Y20 2 " "Info: 60: + IC(0.000 ns) + CELL(0.080 ns) = 36.020 ns; Loc. = LAB_X38_Y20; Fanout = 2; COMB Node = 'ADPCM_Decoder_1_Bit:u6\|lpm_divide:Div0\|lpm_divide_aem:auto_generated\|sign_div_unsign_klh:divider\|alt_u_div_e2f:divider\|add_sub_15_result_int\[5\]~7'" {  } { { "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" "0.080 ns" { ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_15_result_int[4]~5 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_15_result_int[5]~7 } "NODE_NAME" } } { "db/alt_u_div_e2f.tdf" "" { Text "D:/HD_ADPCM/HD_ADPCM_1Bit_Stereo_Decoder/db/alt_u_div_e2f.tdf" 61 23 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 -1} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.080 ns) 36.100 ns ADPCM_Decoder_1_Bit:u6\|lpm_divide:Div0\|lpm_divide_aem:auto_generated\|sign_div_unsign_klh:divider\|alt_u_div_e2f:divider\|add_sub_15_result_int\[6\]~9 61 COMB LAB_X38_Y20 1 " "Info: 61: + IC(0.000 ns) + CELL(0.080 ns) = 36.100 ns; Loc. = LAB_X38_Y20; Fanout = 1; COMB Node = 'ADPCM_Decoder_1_Bit:u6\|lpm_divide:Div0\|lpm_divide_aem:auto_generated\|sign_div_unsign_klh:divider\|alt_u_div_e2f:divider\|add_sub_15_result_int\[6\]~9'" {  } { { "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" "0.080 ns" { ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_15_result_int[5]~7 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_15_result_int[6]~9 } "NODE_NAME" } } { "db/alt_u_div_e2f.tdf" "" { Text "D:/HD_ADPCM/HD_ADPCM_1Bit_Stereo_Decoder/db/alt_u_div_e2f.tdf" 61 23 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 -1} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.080 ns) 36.180 ns ADPCM_Decoder_1_Bit:u6\|lpm_divide:Div0\|lpm_divide_aem:auto_generated\|sign_div_unsign_klh:divider\|alt_u_div_e2f:divider\|add_sub_15_result_int\[7\]~11 62 COMB LAB_X38_Y20 1 " "Info: 62: + IC(0.000 ns) + CELL(0.080 ns) = 36.180 ns; Loc. = LAB_X38_Y20; Fanout = 1; COMB Node = 'ADPCM_Decoder_1_Bit:u6\|lpm_divide:Div0\|lpm_divide_aem:auto_generated\|sign_div_unsign_klh:divider\|alt_u_div_e2f:divider\|add_sub_15_result_int\[7\]~11'" {  } { { "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" "0.080 ns" { ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_15_result_int[6]~9 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_15_result_int[7]~11 } "NODE_NAME" } } { "db/alt_u_div_e2f.tdf" "" { Text "D:/HD_ADPCM/HD_ADPCM_1Bit_Stereo_Decoder/db/alt_u_div_e2f.tdf" 61 23 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 -1} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.458 ns) 36.638 ns ADPCM_Decoder_1_Bit:u6\|lpm_divide:Div0\|lpm_divide_aem:auto_generated\|sign_div_unsign_klh:divider\|alt_u_div_e2f:divider\|add_sub_15_result_int\[8\]~12 63 COMB LAB_X38_Y20 20 " "Info: 63: + IC(0.000 ns) + CELL(0.458 ns) = 36.638 ns; Loc. = LAB_X38_Y20; Fanout = 20; COMB Node = 'ADPCM_Decoder_1_Bit:u6\|lpm_divide:Div0\|lpm_divide_aem:auto_generated\|sign_div_unsign_klh:divider\|alt_u_div_e2f:divider\|add_sub_15_result_int\[8\]~12'" {  } { { "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" "0.458 ns" { ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_15_result_int[7]~11 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_15_result_int[8]~12 } "NODE_NAME" } } { "db/alt_u_div_e2f.tdf" "" { Text "D:/HD_ADPCM/HD_ADPCM_1Bit_Stereo_Decoder/db/alt_u_div_e2f.tdf" 61 23 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 -1} { "Info" "ITDB_NODE_DELAY" "IC(0.598 ns) + CELL(0.319 ns) 37.555 ns ADPCM_Decoder_1_Bit:u6\|lpm_divide:Div0\|lpm_divide_aem:auto_generated\|sign_div_unsign_klh:divider\|alt_u_div_e2f:divider\|StageOut\[124\]~563 64 COMB LAB_X37_Y20 3 " "Info: 64: + IC(0.598 ns) + CELL(0.319 ns) = 37.555 ns; Loc. = LAB_X37_Y20; Fanout = 3; COMB Node = 'ADPCM_Decoder_1_Bit:u6\|lpm_divide:Div0\|lpm_divide_aem:auto_generated\|sign_div_unsign_klh:divider\|alt_u_div_e2f:divider\|StageOut\[124\]~563'" {  } { { "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" "0.917 ns" { ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_15_result_int[8]~12 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|StageOut[124]~563 } "NODE_NAME" } } { "db/alt_u_div_e2f.tdf" "" { Text "D:/HD_ADPCM/HD_ADPCM_1Bit_Stereo_Decoder/db/alt_u_div_e2f.tdf" 138 10 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 -1} { "Info" "ITDB_NODE_DELAY" "IC(1.016 ns) + CELL(0.517 ns) 39.088 ns ADPCM_Decoder_1_Bit:u6\|lpm_divide:Div0\|lpm_divide_aem:auto_generated\|sign_div_unsign_klh:divider\|alt_u_div_e2f:divider\|add_sub_16_result_int\[5\]~7 65 COMB LAB_X39_Y20 2 " "Info: 65: + IC(1.016 ns) + CELL(0.517 ns) = 39.088 ns; Loc. = LAB_X39_Y20; Fanout = 2; COMB Node = 'ADPCM_Decoder_1_Bit:u6\|lpm_divide:Div0\|lpm_divide_aem:auto_generated\|sign_div_unsign_klh:divider\|alt_u_div_e2f:divider\|add_sub_16_result_int\[5\]~7'" {  } { { "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" "1.533 ns" { ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|StageOut[124]~563 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_16_result_int[5]~7 } "NODE_NAME" } } { "db/alt_u_div_e2f.tdf" "" { Text "D:/HD_ADPCM/HD_ADPCM_1Bit_Stereo_Decoder/db/alt_u_div_e2f.tdf" 66 23 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 -1} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.080 ns) 39.168 ns ADPCM_Decoder_1_Bit:u6\|lpm_divide:Div0\|lpm_divide_aem:auto_generated\|sign_div_unsign_klh:divider\|alt_u_div_e2f:divider\|add_sub_16_result_int\[6\]~9 66 COMB LAB_X39_Y20 1 " "Info: 66: + IC(0.000 ns) + CELL(0.080 ns) = 39.168 ns; Loc. = LAB_X39_Y20; Fanout = 1; COMB Node = 'ADPCM_Decoder_1_Bit:u6\|lpm_divide:Div0\|lpm_divide_aem:auto_generated\|sign_div_unsign_klh:divider\|alt_u_div_e2f:divider\|add_sub_16_result_int\[6\]~9'" {  } { { "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" "0.080 ns" { ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_16_result_int[5]~7 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_16_result_int[6]~9 } "NODE_NAME" } } { "db/alt_u_div_e2f.tdf" "" { Text "D:/HD_ADPCM/HD_ADPCM_1Bit_Stereo_Decoder/db/alt_u_div_e2f.tdf" 66 23 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 -1} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.080 ns) 39.248 ns ADPCM_Decoder_1_Bit:u6\|lpm_divide:Div0\|lpm_divide_aem:auto_generated\|sign_div_unsign_klh:divider\|alt_u_div_e2f:divider\|add_sub_16_result_int\[7\]~11 67 COMB LAB_X39_Y20 1 " "Info: 67: + IC(0.000 ns) + CELL(0.080 ns) = 39.248 ns; Loc. = LAB_X39_Y20; Fanout = 1; COMB Node = 'ADPCM_Decoder_1_Bit:u6\|lpm_divide:Div0\|lpm_divide_aem:auto_generated\|sign_div_unsign_klh:divider\|alt_u_div_e2f:divider\|add_sub_16_result_int\[7\]~11'" {  } { { "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" "0.080 ns" { ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_16_result_int[6]~9 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_16_result_int[7]~11 } "NODE_NAME" } } { "db/alt_u_div_e2f.tdf" "" { Text "D:/HD_ADPCM/HD_ADPCM_1Bit_Stereo_Decoder/db/alt_u_div_e2f.tdf" 66 23 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 -1} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.458 ns) 39.706 ns ADPCM_Decoder_1_Bit:u6\|lpm_divide:Div0\|lpm_divide_aem:auto_generated\|sign_div_unsign_klh:divider\|alt_u_div_e2f:divider\|add_sub_16_result_int\[8\]~12 68 COMB LAB_X39_Y20 20 " "Info: 68: + IC(0.000 ns) + CELL(0.458 ns) = 39.706 ns; Loc. = LAB_X39_Y20; Fanout = 20; COMB Node = 'ADPCM_Decoder_1_Bit:u6\|lpm_divide:Div0\|lpm_divide_aem:auto_generated\|sign_div_unsign_klh:divider\|alt_u_div_e2f:divider\|add_sub_16_result_int\[8\]~12'" {  } { { "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" "0.458 ns" { ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_16_result_int[7]~11 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_16_result_int[8]~12 } "NODE_NAME" } } { "db/alt_u_div_e2f.tdf" "" { Text "D:/HD_ADPCM/HD_ADPCM_1Bit_Stereo_Decoder/db/alt_u_div_e2f.tdf" 66 23 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 -1} { "Info" "ITDB_NODE_DELAY" "IC(0.949 ns) + CELL(0.319 ns) 40.974 ns ADPCM_Decoder_1_Bit:u6\|lpm_divide:Div0\|lpm_divide_aem:auto_generated\|sign_div_unsign_klh:divider\|alt_u_div_e2f:divider\|StageOut\[132\]~567 69 COMB LAB_X39_Y18 3 " "Info: 69: + IC(0.949 ns) + CELL(0.319 ns) = 40.974 ns; Loc. = LAB_X39_Y18; Fanout = 3; COMB Node = 'ADPCM_Decoder_1_Bit:u6\|lpm_divide:Div0\|lpm_divide_aem:auto_generated\|sign_div_unsign_klh:divider\|alt_u_div_e2f:divider\|StageOut\[132\]~567'" {  } { { "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" "1.268 ns" { ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_16_result_int[8]~12 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|StageOut[132]~567 } "NODE_NAME" } } { "db/alt_u_div_e2f.tdf" "" { Text "D:/HD_ADPCM/HD_ADPCM_1Bit_Stereo_Decoder/db/alt_u_div_e2f.tdf" 138 10 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 -1} { "Info" "ITDB_NODE_DELAY" "IC(1.070 ns) + CELL(0.517 ns) 42.561 ns ADPCM_Decoder_1_Bit:u6\|lpm_divide:Div0\|lpm_divide_aem:auto_generated\|sign_div_unsign_klh:divider\|alt_u_div_e2f:divider\|add_sub_17_result_int\[5\]~7 70 COMB LAB_X40_Y20 2 " "Info: 70: + IC(1.070 ns) + CELL(0.517 ns) = 42.561 ns; Loc. = LAB_X40_Y20; Fanout = 2; COMB Node = 'ADPCM_Decoder_1_Bit:u6\|lpm_divide:Div0\|lpm_divide_aem:auto_generated\|sign_div_unsign_klh:divider\|alt_u_div_e2f:divider\|add_sub_17_result_int\[5\]~7'" {  } { { "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" "1.587 ns" { ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|StageOut[132]~567 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_17_result_int[5]~7 } "NODE_NAME" } } { "db/alt_u_div_e2f.tdf" "" { Text "D:/HD_ADPCM/HD_ADPCM_1Bit_Stereo_Decoder/db/alt_u_div_e2f.tdf" 71 23 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 -1} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.080 ns) 42.641 ns ADPCM_Decoder_1_Bit:u6\|lpm_divide:Div0\|lpm_divide_aem:auto_generated\|sign_div_unsign_klh:divider\|alt_u_div_e2f:divider\|add_sub_17_result_int\[6\]~9 71 COMB LAB_X40_Y20 1 " "Info: 71: + IC(0.000 ns) + CELL(0.080 ns) = 42.641 ns; Loc. = LAB_X40_Y20; Fanout = 1; COMB Node = 'ADPCM_Decoder_1_Bit:u6\|lpm_divide:Div0\|lpm_divide_aem:auto_generated\|sign_div_unsign_klh:divider\|alt_u_div_e2f:divider\|add_sub_17_result_int\[6\]~9'" {  } { { "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" "0.080 ns" { ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_17_result_int[5]~7 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_17_result_int[6]~9 } "NODE_NAME" } } { "db/alt_u_div_e2f.tdf" "" { Text "D:/HD_ADPCM/HD_ADPCM_1Bit_Stereo_Decoder/db/alt_u_div_e2f.tdf" 71 23 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 -1} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.080 ns) 42.721 ns ADPCM_Decoder_1_Bit:u6\|lpm_divide:Div0\|lpm_divide_aem:auto_generated\|sign_div_unsign_klh:divider\|alt_u_div_e2f:divider\|add_sub_17_result_int\[7\]~11 72 COMB LAB_X40_Y20 1 " "Info: 72: + IC(0.000 ns) + CELL(0.080 ns) = 42.721 ns; Loc. = LAB_X40_Y20; Fanout = 1; COMB Node = 'ADPCM_Decoder_1_Bit:u6\|lpm_divide:Div0\|lpm_divide_aem:auto_generated\|sign_div_unsign_klh:divider\|alt_u_div_e2f:divider\|add_sub_17_result_int\[7\]~11'" {  } { { "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" "0.080 ns" { ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_17_result_int[6]~9 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_17_result_int[7]~11 } "NODE_NAME" } } { "db/alt_u_div_e2f.tdf" "" { Text "D:/HD_ADPCM/HD_ADPCM_1Bit_Stereo_Decoder/db/alt_u_div_e2f.tdf" 71 23 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 -1} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.458 ns) 43.179 ns ADPCM_Decoder_1_Bit:u6\|lpm_divide:Div0\|lpm_divide_aem:auto_generated\|sign_div_unsign_klh:divider\|alt_u_div_e2f:divider\|add_sub_17_result_int\[8\]~12 73 COMB LAB_X40_Y20 20 " "Info: 73: + IC(0.000 ns) + CELL(0.458 ns) = 43.179 ns; Loc. = LAB_X40_Y20; Fanout = 20; COMB Node = 'ADPCM_Decoder_1_Bit:u6\|lpm_divide:Div0\|lpm_divide_aem:auto_generated\|sign_div_unsign_klh:divider\|alt_u_div_e2f:divider\|add_sub_17_result_int\[8\]~12'" {  } { { "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" "0.458 ns" { ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_17_result_int[7]~11 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_17_result_int[8]~12 } "NODE_NAME" } } { "db/alt_u_div_e2f.tdf" "" { Text "D:/HD_ADPCM/HD_ADPCM_1Bit_Stereo_Decoder/db/alt_u_div_e2f.tdf" 71 23 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 -1} { "Info" "ITDB_NODE_DELAY" "IC(0.895 ns) + CELL(0.319 ns) 44.393 ns ADPCM_Decoder_1_Bit:u6\|lpm_divide:Div0\|lpm_divide_aem:auto_generated\|sign_div_unsign_klh:divider\|alt_u_div_e2f:divider\|StageOut\[142\]~569 74 COMB LAB_X37_Y20 1 " "Info: 74: + IC(0.895 ns) + CELL(0.319 ns) = 44.393 ns; Loc. = LAB_X37_Y20; Fanout = 1; COMB Node = 'ADPCM_Decoder_1_Bit:u6\|lpm_divide:Div0\|lpm_divide_aem:auto_generated\|sign_div_unsign_klh:divider\|alt_u_div_e2f:divider\|StageOut\[142\]~569'" {  } { { "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" "1.214 ns" { ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_17_result_int[8]~12 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|StageOut[142]~569 } "NODE_NAME" } } { "db/alt_u_div_e2f.tdf" "" { Text "D:/HD_ADPCM/HD_ADPCM_1Bit_Stereo_Decoder/db/alt_u_div_e2f.tdf" 138 10 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 -1} { "Info" "ITDB_NODE_DELAY" "IC(1.359 ns) + CELL(0.517 ns) 46.269 ns ADPCM_Decoder_1_Bit:u6\|lpm_divide:Div0\|lpm_divide_aem:auto_generated\|sign_div_unsign_klh:divider\|alt_u_div_e2f:divider\|op_9~32 75 COMB LAB_X40_Y19 1 " "Info: 75: + IC(1.359 ns) + CELL(0.517 ns) = 46.269 ns; Loc. = LAB_X40_Y19; Fanout = 1; COMB Node = 'ADPCM_Decoder_1_Bit:u6\|lpm_divide:Div0\|lpm_divide_aem:auto_generated\|sign_div_unsign_klh:divider\|alt_u_div_e2f:divider\|op_9~32'" {  } { { "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" "1.876 ns" { ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|StageOut[142]~569 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|op_9~32 } "NODE_NAME" } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 -1} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.458 ns) 46.727 ns ADPCM_Decoder_1_Bit:u6\|lpm_divide:Div0\|lpm_divide_aem:auto_generated\|sign_div_unsign_klh:divider\|alt_u_div_e2f:divider\|op_9~33 76 COMB LAB_X40_Y19 13 " "Info: 76: + IC(0.000 ns) + CELL(0.458 ns) = 46.727 ns; Loc. = LAB_X40_Y19; Fanout = 13; COMB Node = 'ADPCM_Decoder_1_Bit:u6\|lpm_divide:Div0\|lpm_divide_aem:auto_generated\|sign_div_unsign_klh:divider\|alt_u_div_e2f:divider\|op_9~33'" {  } { { "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" "0.458 ns" { ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|op_9~32 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|op_9~33 } "NODE_NAME" } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 -1} { "Info" "ITDB_NODE_DELAY" "IC(0.732 ns) + CELL(0.177 ns) 47.636 ns ADPCM_Decoder_1_Bit:u6\|lpm_divide:Div0\|lpm_divide_aem:auto_generated\|sign_div_unsign_klh:divider\|alt_u_div_e2f:divider\|StageOut\[145\]~30 77 COMB LAB_X39_Y19 1 " "Info: 77: + IC(0.732 ns) + CELL(0.177 ns) = 47.636 ns; Loc. = LAB_X39_Y19; Fanout = 1; COMB Node = 'ADPCM_Decoder_1_Bit:u6\|lpm_divide:Div0\|lpm_divide_aem:auto_generated\|sign_div_unsign_klh:divider\|alt_u_div_e2f:divider\|StageOut\[145\]~30'" {  } { { "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" "0.909 ns" { ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|op_9~33 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|StageOut[145]~30 } "NODE_NAME" } } { "db/alt_u_div_e2f.tdf" "" { Text "D:/HD_ADPCM/HD_ADPCM_1Bit_Stereo_Decoder/db/alt_u_div_e2f.tdf" 138 10 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 -1} { "Info" "ITDB_NODE_DELAY" "IC(0.498 ns) + CELL(0.495 ns) 48.629 ns ADPCM_Decoder_1_Bit:u6\|lpm_divide:Div0\|lpm_divide_aem:auto_generated\|sign_div_unsign_klh:divider\|alt_u_div_e2f:divider\|add_sub_19_result_int\[2\]~1 78 COMB LAB_X39_Y19 1 " "Info: 78: + IC(0.498 ns) + CELL(0.495 ns) = 48.629 ns; Loc. = LAB_X39_Y19; Fanout = 1; COMB Node = 'ADPCM_Decoder_1_Bit:u6\|lpm_divide:Div0\|lpm_divide_aem:auto_generated\|sign_div_unsign_klh:divider\|alt_u_div_e2f:divider\|add_sub_19_result_int\[2\]~1'" {  } { { "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" "0.993 ns" { ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|StageOut[145]~30 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_19_result_int[2]~1 } "NODE_NAME" } } { "db/alt_u_div_e2f.tdf" "" { Text "D:/HD_ADPCM/HD_ADPCM_1Bit_Stereo_Decoder/db/alt_u_div_e2f.tdf" 81 23 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 -1} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.080 ns) 48.709 ns ADPCM_Decoder_1_Bit:u6\|lpm_divide:Div0\|lpm_divide_aem:auto_generated\|sign_div_unsign_klh:divider\|alt_u_div_e2f:divider\|add_sub_19_result_int\[3\]~3 79 COMB LAB_X39_Y19 1 " "Info: 79: + IC(0.000 ns) + CELL(0.080 ns) = 48.709 ns; Loc. = LAB_X39_Y19; Fanout = 1; COMB Node = 'ADPCM_Decoder_1_Bit:u6\|lpm_divide:Div0\|lpm_divide_aem:auto_generated\|sign_div_unsign_klh:divider\|alt_u_div_e2f:divider\|add_sub_19_result_int\[3\]~3'" {  } { { "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" "0.080 ns" { ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_19_result_int[2]~1 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_19_result_int[3]~3 } "NODE_NAME" } } { "db/alt_u_div_e2f.tdf" "" { Text "D:/HD_ADPCM/HD_ADPCM_1Bit_Stereo_Decoder/db/alt_u_div_e2f.tdf" 81 23 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 -1} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.080 ns) 48.789 ns ADPCM_Decoder_1_Bit:u6\|lpm_divide:Div0\|lpm_divide_aem:auto_generated\|sign_div_unsign_klh:divider\|alt_u_div_e2f:divider\|add_sub_19_result_int\[4\]~5 80 COMB LAB_X39_Y19 1 " "Info: 80: + IC(0.000 ns) + CELL(0.080 ns) = 48.789 ns; Loc. = LAB_X39_Y19; Fanout = 1; COMB Node = 'ADPCM_Decoder_1_Bit:u6\|lpm_divide:Div0\|lpm_divide_aem:auto_generated\|sign_div_unsign_klh:divider\|alt_u_div_e2f:divider\|add_sub_19_result_int\[4\]~5'" {  } { { "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" "0.080 ns" { ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_19_result_int[3]~3 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_19_result_int[4]~5 } "NODE_NAME" } } { "db/alt_u_div_e2f.tdf" "" { Text "D:/HD_ADPCM/HD_ADPCM_1Bit_Stereo_Decoder/db/alt_u_div_e2f.tdf" 81 23 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 -1} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.080 ns) 48.869 ns ADPCM_Decoder_1_Bit:u6\|lpm_divide:Div0\|lpm_divide_aem:auto_generated\|sign_div_unsign_klh:divider\|alt_u_div_e2f:divider\|add_sub_19_result_int\[5\]~7 81 COMB LAB_X39_Y19 1 " "Info: 81: + IC(0.000 ns) + CELL(0.080 ns) = 48.869 ns; Loc. = LAB_X39_Y19; Fanout = 1; COMB Node = 'ADPCM_Decoder_1_Bit:u6\|lpm_divide:Div0\|lpm_divide_aem:auto_generated\|sign_div_unsign_klh:divider\|alt_u_div_e2f:divider\|add_sub_19_result_int\[5\]~7'" {  } { { "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" "0.080 ns" { ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_19_result_int[4]~5 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_19_result_int[5]~7 } "NODE_NAME" } } { "db/alt_u_div_e2f.tdf" "" { Text "D:/HD_ADPCM/HD_ADPCM_1Bit_Stereo_Decoder/db/alt_u_div_e2f.tdf" 81 23 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 -1} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.080 ns) 48.949 ns ADPCM_Decoder_1_Bit:u6\|lpm_divide:Div0\|lpm_divide_aem:auto_generated\|sign_div_unsign_klh:divider\|alt_u_div_e2f:divider\|add_sub_19_result_int\[6\]~9 82 COMB LAB_X39_Y19 1 " "Info: 82: + IC(0.000 ns) + CELL(0.080 ns) = 48.949 ns; Loc. = LAB_X39_Y19; Fanout = 1; COMB Node = 'ADPCM_Decoder_1_Bit:u6\|lpm_divide:Div0\|lpm_divide_aem:auto_generated\|sign_div_unsign_klh:divider\|alt_u_div_e2f:divider\|add_sub_19_result_int\[6\]~9'" {  } { { "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" "0.080 ns" { ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_19_result_int[5]~7 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_19_result_int[6]~9 } "NODE_NAME" } } { "db/alt_u_div_e2f.tdf" "" { Text "D:/HD_ADPCM/HD_ADPCM_1Bit_Stereo_Decoder/db/alt_u_div_e2f.tdf" 81 23 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 -1} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.080 ns) 49.029 ns ADPCM_Decoder_1_Bit:u6\|lpm_divide:Div0\|lpm_divide_aem:auto_generated\|sign_div_unsign_klh:divider\|alt_u_div_e2f:divider\|add_sub_19_result_int\[7\]~11 83 COMB LAB_X39_Y19 1 " "Info: 83: + IC(0.000 ns) + CELL(0.080 ns) = 49.029 ns; Loc. = LAB_X39_Y19; Fanout = 1; COMB Node = 'ADPCM_Decoder_1_Bit:u6\|lpm_divide:Div0\|lpm_divide_aem:auto_generated\|sign_div_unsign_klh:divider\|alt_u_div_e2f:divider\|add_sub_19_result_int\[7\]~11'" {  } { { "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" "0.080 ns" { ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_19_result_int[6]~9 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_19_result_int[7]~11 } "NODE_NAME" } } { "db/alt_u_div_e2f.tdf" "" { Text "D:/HD_ADPCM/HD_ADPCM_1Bit_Stereo_Decoder/db/alt_u_div_e2f.tdf" 81 23 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 -1} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.458 ns) 49.487 ns ADPCM_Decoder_1_Bit:u6\|lpm_divide:Div0\|lpm_divide_aem:auto_generated\|sign_div_unsign_klh:divider\|alt_u_div_e2f:divider\|add_sub_19_result_int\[8\]~12 84 COMB LAB_X39_Y19 1 " "Info: 84: + IC(0.000 ns) + CELL(0.458 ns) = 49.487 ns; Loc. = LAB_X39_Y19; Fanout = 1; COMB Node = 'ADPCM_Decoder_1_Bit:u6\|lpm_divide:Div0\|lpm_divide_aem:auto_generated\|sign_div_unsign_klh:divider\|alt_u_div_e2f:divider\|add_sub_19_result_int\[8\]~12'" {  } { { "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" "0.458 ns" { ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_19_result_int[7]~11 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_19_result_int[8]~12 } "NODE_NAME" } } { "db/alt_u_div_e2f.tdf" "" { Text "D:/HD_ADPCM/HD_ADPCM_1Bit_Stereo_Decoder/db/alt_u_div_e2f.tdf" 81 23 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 -1} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.096 ns) 49.583 ns ADPCM_Decoder_1_Bit:u6\|PCM_Data_Difference\[0\] 85 REG LAB_X39_Y19 1 " "Info: 85: + IC(0.000 ns) + CELL(0.096 ns) = 49.583 ns; Loc. = LAB_X39_Y19; Fanout = 1; REG Node = 'ADPCM_Decoder_1_Bit:u6\|PCM_Data_Difference\[0\]'" {  } { { "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" "0.096 ns" { ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_19_result_int[8]~12 ADPCM_Decoder_1_Bit:u6|PCM_Data_Difference[0] } "NODE_NAME" } } { "HD_ADPCM_Codec.vhd" "" { Text "D:/HD_ADPCM/HD_ADPCM_1Bit_Stereo_Decoder/HD_ADPCM_Codec.vhd" 943 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 -1} { "Info" "ITDB_TOTAL_CELL_DELAY" "24.059 ns ( 48.52 % ) " "Info: Total cell delay = 24.059 ns ( 48.52 % )" {  } {  } 0 0 "Total cell delay = %1!s! %2!s!" 0 0 "" 0 -1} { "Info" "ITDB_TOTAL_IC_DELAY" "25.524 ns ( 51.48 % ) " "Info: Total interconnect delay = 25.524 ns ( 51.48 % )" {  } {  } 0 0 "Total interconnect delay = %1!s! %2!s!" 0 0 "" 0 -1}  } { { "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" "49.583 ns" { ADPCM_Decoder_1_Bit:u6|ADPCM_Decoder_Step_Size_Table_Pointer[9] ADPCM_Decoder_1_Bit:u6|lpm_mult:Mult0|mult_pu01:auto_generated|mac_mult1~DATAOUT15 ADPCM_Decoder_1_Bit:u6|lpm_mult:Mult0|mult_pu01:auto_generated|mac_out2~DATAOUT15 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_6_result_int[2]~1 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_6_result_int[3]~3 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_6_result_int[4]~5 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_6_result_int[5]~7 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_6_result_int[6]~9 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_6_result_int[7]~10 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|StageOut[50]~221 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_7_result_int[3]~3 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_7_result_int[4]~5 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_7_result_int[5]~7 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_7_result_int[6]~9 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_7_result_int[7]~11 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_7_result_int[8]~12 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|StageOut[58]~197 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_8_result_int[3]~3 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_8_result_int[4]~5 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_8_result_int[5]~7 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_8_result_int[6]~9 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_8_result_int[7]~11 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_8_result_int[8]~12 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|StageOut[67]~581 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_9_result_int[4]~5 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_9_result_int[5]~7 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_9_result_int[6]~9 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_9_result_int[7]~11 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_9_result_int[8]~12 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|StageOut[73]~174 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_10_result_int[2]~1 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_10_result_int[3]~3 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_10_result_int[4]~5 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_10_result_int[5]~7 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_10_result_int[6]~9 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_10_result_int[7]~11 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_10_result_int[8]~12 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|StageOut[83]~544 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_11_result_int[4]~5 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_11_result_int[5]~7 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_11_result_int[6]~9 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_11_result_int[7]~11 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_11_result_int[8]~12 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|StageOut[92]~547 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_12_result_int[5]~7 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_12_result_int[6]~9 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_12_result_int[7]~11 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_12_result_int[8]~12 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|StageOut[101]~550 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_13_result_int[6]~9 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_13_result_int[7]~11 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_13_result_int[8]~12 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|StageOut[110]~553 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_14_result_int[7]~11 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_14_result_int[8]~12 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|StageOut[113]~94 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_15_result_int[2]~1 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_15_result_int[3]~3 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_15_result_int[4]~5 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_15_result_int[5]~7 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_15_result_int[6]~9 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_15_result_int[7]~11 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_15_result_int[8]~12 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|StageOut[124]~563 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_16_result_int[5]~7 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_16_result_int[6]~9 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_16_result_int[7]~11 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_16_result_int[8]~12 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|StageOut[132]~567 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_17_result_int[5]~7 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_17_result_int[6]~9 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_17_result_int[7]~11 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_17_result_int[8]~12 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|StageOut[142]~569 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|op_9~32 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|op_9~33 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|StageOut[145]~30 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_19_result_int[2]~1 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_19_result_int[3]~3 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_19_result_int[4]~5 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_19_result_int[5]~7 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_19_result_int[6]~9 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_19_result_int[7]~11 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_19_result_int[8]~12 ADPCM_Decoder_1_Bit:u6|PCM_Data_Difference[0] } "NODE_NAME" } }  } 0 0 "Estimated most critical path is %2!s! to %3!s! delay of %1!s!" 0 0 "" 0 -1}
33 
{ "Info" "IFITAPI_FITAPI_VPR_FITTER_ROUTING_START" "" "Info: Fitter routing operations beginning" {  } {  } 0 0 "Fitter routing operations beginning" 0 0 "" 0 -1}
34 
{ "Info" "IFITAPI_FITAPI_VPR_PERCENT_ROUTING_RESOURCE_USAGE" "1 " "Info: Average interconnect usage is 1% of the available device resources" { { "Info" "IFITAPI_FITAPI_VPR_PEAK_ROUTING_REGION" "5 X25_Y14 X37_Y27 " "Info: Peak interconnect usage is 5% of the available device resources in the region that extends from location X25_Y14 to location X37_Y27" {  } {  } 0 0 "Peak interconnect usage is %1!d!%% of the available device resources in the region that extends from location %2!s! to location %3!s!" 0 0 "" 0 -1}  } {  } 0 0 "Average interconnect usage is %1!d!%% of the available device resources" 0 0 "" 0 -1}
35 
{ "Info" "IFITAPI_FITAPI_VPR_FITTER_ROUTING_END" "00:00:03 " "Info: Fitter routing operations ending: elapsed time is 00:00:03" {  } {  } 0 0 "Fitter routing operations ending: elapsed time is %1!s!" 0 0 "" 0 -1}
36 
{ "Info" "IFITAPI_FITAPI_VPR_AUTO_FIT_ENABLED_AND_USED" "" "Info: The Fitter performed an Auto Fit compilation.  Optimizations were skipped to reduce compilation time." { { "Info" "IFITAPI_FITAPI_VPR_AUTO_FIT_ENABLED_AND_USED_FOR_ROUTABILITY" "" "Info: Optimizations that may affect the design's routability were skipped" {  } {  } 0 0 "Optimizations that may affect the design's routability were skipped" 0 0 "" 0 -1} { "Info" "IFITAPI_FITAPI_VPR_AUTO_FIT_ENABLED_AND_USED_FOR_TIMING" "" "Info: Optimizations that may affect the design's timing were skipped" {  } {  } 0 0 "Optimizations that may affect the design's timing were skipped" 0 0 "" 0 -1}  } {  } 0 0 "The Fitter performed an Auto Fit compilation.  Optimizations were skipped to reduce compilation time." 0 0 "" 0 -1}
37 
{ "Info" "IDAT_DAT_STARTED" "" "Info: Started post-fitting delay annotation" {  } {  } 0 0 "Started post-fitting delay annotation" 0 0 "" 0 -1}
38 
{ "Warning" "WDAT_NO_LOADING_SPECIFIED_ONE_OR_MORE_PINS" "78 " "Warning: Found 78 output pins without output pin load capacitance assignment" { { "Info" "IDAT_NO_LOADING_SPECIFIED_ON_PIN" "I2C_DATA_INOUT 0 " "Info: Pin \"I2C_DATA_INOUT\" has no specified output pin load capacitance -- assuming default load capacitance of 0 pF for timing analysis" {  } {  } 0 0 "Pin \"%1!s!\" has no specified output pin load capacitance -- assuming default load capacitance of %2!d! pF for timing analysis" 0 0 "" 0 -1} { "Info" "IDAT_NO_LOADING_SPECIFIED_ON_PIN" "I2S_DATA_INOUT 0 " "Info: Pin \"I2S_DATA_INOUT\" has no specified output pin load capacitance -- assuming default load capacitance of 0 pF for timing analysis" {  } {  } 0 0 "Pin \"%1!s!\" has no specified output pin load capacitance -- assuming default load capacitance of %2!d! pF for timing analysis" 0 0 "" 0 -1} { "Info" "IDAT_NO_LOADING_SPECIFIED_ON_PIN" "FLASH_MEMORY_DATA_INOUT\[0\] 0 " "Info: Pin \"FLASH_MEMORY_DATA_INOUT\[0\]\" has no specified output pin load capacitance -- assuming default load capacitance of 0 pF for timing analysis" {  } {  } 0 0 "Pin \"%1!s!\" has no specified output pin load capacitance -- assuming default load capacitance of %2!d! pF for timing analysis" 0 0 "" 0 -1} { "Info" "IDAT_NO_LOADING_SPECIFIED_ON_PIN" "FLASH_MEMORY_DATA_INOUT\[1\] 0 " "Info: Pin \"FLASH_MEMORY_DATA_INOUT\[1\]\" has no specified output pin load capacitance -- assuming default load capacitance of 0 pF for timing analysis" {  } {  } 0 0 "Pin \"%1!s!\" has no specified output pin load capacitance -- assuming default load capacitance of %2!d! pF for timing analysis" 0 0 "" 0 -1} { "Info" "IDAT_NO_LOADING_SPECIFIED_ON_PIN" "FLASH_MEMORY_DATA_INOUT\[2\] 0 " "Info: Pin \"FLASH_MEMORY_DATA_INOUT\[2\]\" has no specified output pin load capacitance -- assuming default load capacitance of 0 pF for timing analysis" {  } {  } 0 0 "Pin \"%1!s!\" has no specified output pin load capacitance -- assuming default load capacitance of %2!d! pF for timing analysis" 0 0 "" 0 -1} { "Info" "IDAT_NO_LOADING_SPECIFIED_ON_PIN" "FLASH_MEMORY_DATA_INOUT\[3\] 0 " "Info: Pin \"FLASH_MEMORY_DATA_INOUT\[3\]\" has no specified output pin load capacitance -- assuming default load capacitance of 0 pF for timing analysis" {  } {  } 0 0 "Pin \"%1!s!\" has no specified output pin load capacitance -- assuming default load capacitance of %2!d! pF for timing analysis" 0 0 "" 0 -1} { "Info" "IDAT_NO_LOADING_SPECIFIED_ON_PIN" "FLASH_MEMORY_DATA_INOUT\[4\] 0 " "Info: Pin \"FLASH_MEMORY_DATA_INOUT\[4\]\" has no specified output pin load capacitance -- assuming default load capacitance of 0 pF for timing analysis" {  } {  } 0 0 "Pin \"%1!s!\" has no specified output pin load capacitance -- assuming default load capacitance of %2!d! pF for timing analysis" 0 0 "" 0 -1} { "Info" "IDAT_NO_LOADING_SPECIFIED_ON_PIN" "FLASH_MEMORY_DATA_INOUT\[5\] 0 " "Info: Pin \"FLASH_MEMORY_DATA_INOUT\[5\]\" has no specified output pin load capacitance -- assuming default load capacitance of 0 pF for timing analysis" {  } {  } 0 0 "Pin \"%1!s!\" has no specified output pin load capacitance -- assuming default load capacitance of %2!d! pF for timing analysis" 0 0 "" 0 -1} { "Info" "IDAT_NO_LOADING_SPECIFIED_ON_PIN" "FLASH_MEMORY_DATA_INOUT\[6\] 0 " "Info: Pin \"FLASH_MEMORY_DATA_INOUT\[6\]\" has no specified output pin load capacitance -- assuming default load capacitance of 0 pF for timing analysis" {  } {  } 0 0 "Pin \"%1!s!\" has no specified output pin load capacitance -- assuming default load capacitance of %2!d! pF for timing analysis" 0 0 "" 0 -1} { "Info" "IDAT_NO_LOADING_SPECIFIED_ON_PIN" "FLASH_MEMORY_DATA_INOUT\[7\] 0 " "Info: Pin \"FLASH_MEMORY_DATA_INOUT\[7\]\" has no specified output pin load capacitance -- assuming default load capacitance of 0 pF for timing analysis" {  } {  } 0 0 "Pin \"%1!s!\" has no specified output pin load capacitance -- assuming default load capacitance of %2!d! pF for timing analysis" 0 0 "" 0 -1} { "Info" "IDAT_NO_LOADING_SPECIFIED_ON_PIN" "S_SEVEN_SEGMENT_1_OUT\[0\] 0 " "Info: Pin \"S_SEVEN_SEGMENT_1_OUT\[0\]\" has no specified output pin load capacitance -- assuming default load capacitance of 0 pF for timing analysis" {  } {  } 0 0 "Pin \"%1!s!\" has no specified output pin load capacitance -- assuming default load capacitance of %2!d! pF for timing analysis" 0 0 "" 0 -1} { "Info" "IDAT_NO_LOADING_SPECIFIED_ON_PIN" "S_SEVEN_SEGMENT_1_OUT\[1\] 0 " "Info: Pin \"S_SEVEN_SEGMENT_1_OUT\[1\]\" has no specified output pin load capacitance -- assuming default load capacitance of 0 pF for timing analysis" {  } {  } 0 0 "Pin \"%1!s!\" has no specified output pin load capacitance -- assuming default load capacitance of %2!d! pF for timing analysis" 0 0 "" 0 -1} { "Info" "IDAT_NO_LOADING_SPECIFIED_ON_PIN" "S_SEVEN_SEGMENT_1_OUT\[2\] 0 " "Info: Pin \"S_SEVEN_SEGMENT_1_OUT\[2\]\" has no specified output pin load capacitance -- assuming default load capacitance of 0 pF for timing analysis" {  } {  } 0 0 "Pin \"%1!s!\" has no specified output pin load capacitance -- assuming default load capacitance of %2!d! pF for timing analysis" 0 0 "" 0 -1} { "Info" "IDAT_NO_LOADING_SPECIFIED_ON_PIN" "S_SEVEN_SEGMENT_1_OUT\[3\] 0 " "Info: Pin \"S_SEVEN_SEGMENT_1_OUT\[3\]\" has no specified output pin load capacitance -- assuming default load capacitance of 0 pF for timing analysis" {  } {  } 0 0 "Pin \"%1!s!\" has no specified output pin load capacitance -- assuming default load capacitance of %2!d! pF for timing analysis" 0 0 "" 0 -1} { "Info" "IDAT_NO_LOADING_SPECIFIED_ON_PIN" "S_SEVEN_SEGMENT_1_OUT\[4\] 0 " "Info: Pin \"S_SEVEN_SEGMENT_1_OUT\[4\]\" has no specified output pin load capacitance -- assuming default load capacitance of 0 pF for timing analysis" {  } {  } 0 0 "Pin \"%1!s!\" has no specified output pin load capacitance -- assuming default load capacitance of %2!d! pF for timing analysis" 0 0 "" 0 -1} { "Info" "IDAT_NO_LOADING_SPECIFIED_ON_PIN" "S_SEVEN_SEGMENT_1_OUT\[5\] 0 " "Info: Pin \"S_SEVEN_SEGMENT_1_OUT\[5\]\" has no specified output pin load capacitance -- assuming default load capacitance of 0 pF for timing analysis" {  } {  } 0 0 "Pin \"%1!s!\" has no specified output pin load capacitance -- assuming default load capacitance of %2!d! pF for timing analysis" 0 0 "" 0 -1} { "Info" "IDAT_NO_LOADING_SPECIFIED_ON_PIN" "S_SEVEN_SEGMENT_1_OUT\[6\] 0 " "Info: Pin \"S_SEVEN_SEGMENT_1_OUT\[6\]\" has no specified output pin load capacitance -- assuming default load capacitance of 0 pF for timing analysis" {  } {  } 0 0 "Pin \"%1!s!\" has no specified output pin load capacitance -- assuming default load capacitance of %2!d! pF for timing analysis" 0 0 "" 0 -1} { "Info" "IDAT_NO_LOADING_SPECIFIED_ON_PIN" "S_SEVEN_SEGMENT_2_OUT\[0\] 0 " "Info: Pin \"S_SEVEN_SEGMENT_2_OUT\[0\]\" has no specified output pin load capacitance -- assuming default load capacitance of 0 pF for timing analysis" {  } {  } 0 0 "Pin \"%1!s!\" has no specified output pin load capacitance -- assuming default load capacitance of %2!d! pF for timing analysis" 0 0 "" 0 -1} { "Info" "IDAT_NO_LOADING_SPECIFIED_ON_PIN" "S_SEVEN_SEGMENT_2_OUT\[1\] 0 " "Info: Pin \"S_SEVEN_SEGMENT_2_OUT\[1\]\" has no specified output pin load capacitance -- assuming default load capacitance of 0 pF for timing analysis" {  } {  } 0 0 "Pin \"%1!s!\" has no specified output pin load capacitance -- assuming default load capacitance of %2!d! pF for timing analysis" 0 0 "" 0 -1} { "Info" "IDAT_NO_LOADING_SPECIFIED_ON_PIN" "S_SEVEN_SEGMENT_2_OUT\[2\] 0 " "Info: Pin \"S_SEVEN_SEGMENT_2_OUT\[2\]\" has no specified output pin load capacitance -- assuming default load capacitance of 0 pF for timing analysis" {  } {  } 0 0 "Pin \"%1!s!\" has no specified output pin load capacitance -- assuming default load capacitance of %2!d! pF for timing analysis" 0 0 "" 0 -1} { "Info" "IDAT_NO_LOADING_SPECIFIED_ON_PIN" "S_SEVEN_SEGMENT_2_OUT\[3\] 0 " "Info: Pin \"S_SEVEN_SEGMENT_2_OUT\[3\]\" has no specified output pin load capacitance -- assuming default load capacitance of 0 pF for timing analysis" {  } {  } 0 0 "Pin \"%1!s!\" has no specified output pin load capacitance -- assuming default load capacitance of %2!d! pF for timing analysis" 0 0 "" 0 -1} { "Info" "IDAT_NO_LOADING_SPECIFIED_ON_PIN" "S_SEVEN_SEGMENT_2_OUT\[4\] 0 " "Info: Pin \"S_SEVEN_SEGMENT_2_OUT\[4\]\" has no specified output pin load capacitance -- assuming default load capacitance of 0 pF for timing analysis" {  } {  } 0 0 "Pin \"%1!s!\" has no specified output pin load capacitance -- assuming default load capacitance of %2!d! pF for timing analysis" 0 0 "" 0 -1} { "Info" "IDAT_NO_LOADING_SPECIFIED_ON_PIN" "S_SEVEN_SEGMENT_2_OUT\[5\] 0 " "Info: Pin \"S_SEVEN_SEGMENT_2_OUT\[5\]\" has no specified output pin load capacitance -- assuming default load capacitance of 0 pF for timing analysis" {  } {  } 0 0 "Pin \"%1!s!\" has no specified output pin load capacitance -- assuming default load capacitance of %2!d! pF for timing analysis" 0 0 "" 0 -1} { "Info" "IDAT_NO_LOADING_SPECIFIED_ON_PIN" "S_SEVEN_SEGMENT_2_OUT\[6\] 0 " "Info: Pin \"S_SEVEN_SEGMENT_2_OUT\[6\]\" has no specified output pin load capacitance -- assuming default load capacitance of 0 pF for timing analysis" {  } {  } 0 0 "Pin \"%1!s!\" has no specified output pin load capacitance -- assuming default load capacitance of %2!d! pF for timing analysis" 0 0 "" 0 -1} { "Info" "IDAT_NO_LOADING_SPECIFIED_ON_PIN" "S_SEVEN_SEGMENT_3_OUT\[0\] 0 " "Info: Pin \"S_SEVEN_SEGMENT_3_OUT\[0\]\" has no specified output pin load capacitance -- assuming default load capacitance of 0 pF for timing analysis" {  } {  } 0 0 "Pin \"%1!s!\" has no specified output pin load capacitance -- assuming default load capacitance of %2!d! pF for timing analysis" 0 0 "" 0 -1} { "Info" "IDAT_NO_LOADING_SPECIFIED_ON_PIN" "S_SEVEN_SEGMENT_3_OUT\[1\] 0 " "Info: Pin \"S_SEVEN_SEGMENT_3_OUT\[1\]\" has no specified output pin load capacitance -- assuming default load capacitance of 0 pF for timing analysis" {  } {  } 0 0 "Pin \"%1!s!\" has no specified output pin load capacitance -- assuming default load capacitance of %2!d! pF for timing analysis" 0 0 "" 0 -1} { "Info" "IDAT_NO_LOADING_SPECIFIED_ON_PIN" "S_SEVEN_SEGMENT_3_OUT\[2\] 0 " "Info: Pin \"S_SEVEN_SEGMENT_3_OUT\[2\]\" has no specified output pin load capacitance -- assuming default load capacitance of 0 pF for timing analysis" {  } {  } 0 0 "Pin \"%1!s!\" has no specified output pin load capacitance -- assuming default load capacitance of %2!d! pF for timing analysis" 0 0 "" 0 -1} { "Info" "IDAT_NO_LOADING_SPECIFIED_ON_PIN" "S_SEVEN_SEGMENT_3_OUT\[3\] 0 " "Info: Pin \"S_SEVEN_SEGMENT_3_OUT\[3\]\" has no specified output pin load capacitance -- assuming default load capacitance of 0 pF for timing analysis" {  } {  } 0 0 "Pin \"%1!s!\" has no specified output pin load capacitance -- assuming default load capacitance of %2!d! pF for timing analysis" 0 0 "" 0 -1} { "Info" "IDAT_NO_LOADING_SPECIFIED_ON_PIN" "S_SEVEN_SEGMENT_3_OUT\[4\] 0 " "Info: Pin \"S_SEVEN_SEGMENT_3_OUT\[4\]\" has no specified output pin load capacitance -- assuming default load capacitance of 0 pF for timing analysis" {  } {  } 0 0 "Pin \"%1!s!\" has no specified output pin load capacitance -- assuming default load capacitance of %2!d! pF for timing analysis" 0 0 "" 0 -1} { "Info" "IDAT_NO_LOADING_SPECIFIED_ON_PIN" "S_SEVEN_SEGMENT_3_OUT\[5\] 0 " "Info: Pin \"S_SEVEN_SEGMENT_3_OUT\[5\]\" has no specified output pin load capacitance -- assuming default load capacitance of 0 pF for timing analysis" {  } {  } 0 0 "Pin \"%1!s!\" has no specified output pin load capacitance -- assuming default load capacitance of %2!d! pF for timing analysis" 0 0 "" 0 -1} { "Info" "IDAT_NO_LOADING_SPECIFIED_ON_PIN" "S_SEVEN_SEGMENT_3_OUT\[6\] 0 " "Info: Pin \"S_SEVEN_SEGMENT_3_OUT\[6\]\" has no specified output pin load capacitance -- assuming default load capacitance of 0 pF for timing analysis" {  } {  } 0 0 "Pin \"%1!s!\" has no specified output pin load capacitance -- assuming default load capacitance of %2!d! pF for timing analysis" 0 0 "" 0 -1} { "Info" "IDAT_NO_LOADING_SPECIFIED_ON_PIN" "S_SEVEN_SEGMENT_4_OUT\[0\] 0 " "Info: Pin \"S_SEVEN_SEGMENT_4_OUT\[0\]\" has no specified output pin load capacitance -- assuming default load capacitance of 0 pF for timing analysis" {  } {  } 0 0 "Pin \"%1!s!\" has no specified output pin load capacitance -- assuming default load capacitance of %2!d! pF for timing analysis" 0 0 "" 0 -1} { "Info" "IDAT_NO_LOADING_SPECIFIED_ON_PIN" "S_SEVEN_SEGMENT_4_OUT\[1\] 0 " "Info: Pin \"S_SEVEN_SEGMENT_4_OUT\[1\]\" has no specified output pin load capacitance -- assuming default load capacitance of 0 pF for timing analysis" {  } {  } 0 0 "Pin \"%1!s!\" has no specified output pin load capacitance -- assuming default load capacitance of %2!d! pF for timing analysis" 0 0 "" 0 -1} { "Info" "IDAT_NO_LOADING_SPECIFIED_ON_PIN" "S_SEVEN_SEGMENT_4_OUT\[2\] 0 " "Info: Pin \"S_SEVEN_SEGMENT_4_OUT\[2\]\" has no specified output pin load capacitance -- assuming default load capacitance of 0 pF for timing analysis" {  } {  } 0 0 "Pin \"%1!s!\" has no specified output pin load capacitance -- assuming default load capacitance of %2!d! pF for timing analysis" 0 0 "" 0 -1} { "Info" "IDAT_NO_LOADING_SPECIFIED_ON_PIN" "S_SEVEN_SEGMENT_4_OUT\[3\] 0 " "Info: Pin \"S_SEVEN_SEGMENT_4_OUT\[3\]\" has no specified output pin load capacitance -- assuming default load capacitance of 0 pF for timing analysis" {  } {  } 0 0 "Pin \"%1!s!\" has no specified output pin load capacitance -- assuming default load capacitance of %2!d! pF for timing analysis" 0 0 "" 0 -1} { "Info" "IDAT_NO_LOADING_SPECIFIED_ON_PIN" "S_SEVEN_SEGMENT_4_OUT\[4\] 0 " "Info: Pin \"S_SEVEN_SEGMENT_4_OUT\[4\]\" has no specified output pin load capacitance -- assuming default load capacitance of 0 pF for timing analysis" {  } {  } 0 0 "Pin \"%1!s!\" has no specified output pin load capacitance -- assuming default load capacitance of %2!d! pF for timing analysis" 0 0 "" 0 -1} { "Info" "IDAT_NO_LOADING_SPECIFIED_ON_PIN" "S_SEVEN_SEGMENT_4_OUT\[5\] 0 " "Info: Pin \"S_SEVEN_SEGMENT_4_OUT\[5\]\" has no specified output pin load capacitance -- assuming default load capacitance of 0 pF for timing analysis" {  } {  } 0 0 "Pin \"%1!s!\" has no specified output pin load capacitance -- assuming default load capacitance of %2!d! pF for timing analysis" 0 0 "" 0 -1} { "Info" "IDAT_NO_LOADING_SPECIFIED_ON_PIN" "S_SEVEN_SEGMENT_4_OUT\[6\] 0 " "Info: Pin \"S_SEVEN_SEGMENT_4_OUT\[6\]\" has no specified output pin load capacitance -- assuming default load capacitance of 0 pF for timing analysis" {  } {  } 0 0 "Pin \"%1!s!\" has no specified output pin load capacitance -- assuming default load capacitance of %2!d! pF for timing analysis" 0 0 "" 0 -1} { "Info" "IDAT_NO_LOADING_SPECIFIED_ON_PIN" "S_RED_LEDS_OUT\[0\] 0 " "Info: Pin \"S_RED_LEDS_OUT\[0\]\" has no specified output pin load capacitance -- assuming default load capacitance of 0 pF for timing analysis" {  } {  } 0 0 "Pin \"%1!s!\" has no specified output pin load capacitance -- assuming default load capacitance of %2!d! pF for timing analysis" 0 0 "" 0 -1} { "Info" "IDAT_NO_LOADING_SPECIFIED_ON_PIN" "S_RED_LEDS_OUT\[1\] 0 " "Info: Pin \"S_RED_LEDS_OUT\[1\]\" has no specified output pin load capacitance -- assuming default load capacitance of 0 pF for timing analysis" {  } {  } 0 0 "Pin \"%1!s!\" has no specified output pin load capacitance -- assuming default load capacitance of %2!d! pF for timing analysis" 0 0 "" 0 -1} { "Info" "IDAT_NO_LOADING_SPECIFIED_ON_PIN" "S_RED_LEDS_OUT\[2\] 0 " "Info: Pin \"S_RED_LEDS_OUT\[2\]\" has no specified output pin load capacitance -- assuming default load capacitance of 0 pF for timing analysis" {  } {  } 0 0 "Pin \"%1!s!\" has no specified output pin load capacitance -- assuming default load capacitance of %2!d! pF for timing analysis" 0 0 "" 0 -1} { "Info" "IDAT_NO_LOADING_SPECIFIED_ON_PIN" "S_RED_LEDS_OUT\[3\] 0 " "Info: Pin \"S_RED_LEDS_OUT\[3\]\" has no specified output pin load capacitance -- assuming default load capacitance of 0 pF for timing analysis" {  } {  } 0 0 "Pin \"%1!s!\" has no specified output pin load capacitance -- assuming default load capacitance of %2!d! pF for timing analysis" 0 0 "" 0 -1} { "Info" "IDAT_NO_LOADING_SPECIFIED_ON_PIN" "S_RED_LEDS_OUT\[4\] 0 " "Info: Pin \"S_RED_LEDS_OUT\[4\]\" has no specified output pin load capacitance -- assuming default load capacitance of 0 pF for timing analysis" {  } {  } 0 0 "Pin \"%1!s!\" has no specified output pin load capacitance -- assuming default load capacitance of %2!d! pF for timing analysis" 0 0 "" 0 -1} { "Info" "IDAT_NO_LOADING_SPECIFIED_ON_PIN" "S_RED_LEDS_OUT\[5\] 0 " "Info: Pin \"S_RED_LEDS_OUT\[5\]\" has no specified output pin load capacitance -- assuming default load capacitance of 0 pF for timing analysis" {  } {  } 0 0 "Pin \"%1!s!\" has no specified output pin load capacitance -- assuming default load capacitance of %2!d! pF for timing analysis" 0 0 "" 0 -1} { "Info" "IDAT_NO_LOADING_SPECIFIED_ON_PIN" "S_RED_LEDS_OUT\[6\] 0 " "Info: Pin \"S_RED_LEDS_OUT\[6\]\" has no specified output pin load capacitance -- assuming default load capacitance of 0 pF for timing analysis" {  } {  } 0 0 "Pin \"%1!s!\" has no specified output pin load capacitance -- assuming default load capacitance of %2!d! pF for timing analysis" 0 0 "" 0 -1} { "Info" "IDAT_NO_LOADING_SPECIFIED_ON_PIN" "S_RED_LEDS_OUT\[7\] 0 " "Info: Pin \"S_RED_LEDS_OUT\[7\]\" has no specified output pin load capacitance -- assuming default load capacitance of 0 pF for timing analysis" {  } {  } 0 0 "Pin \"%1!s!\" has no specified output pin load capacitance -- assuming default load capacitance of %2!d! pF for timing analysis" 0 0 "" 0 -1} { "Info" "IDAT_NO_LOADING_SPECIFIED_ON_PIN" "S_RED_LEDS_OUT\[8\] 0 " "Info: Pin \"S_RED_LEDS_OUT\[8\]\" has no specified output pin load capacitance -- assuming default load capacitance of 0 pF for timing analysis" {  } {  } 0 0 "Pin \"%1!s!\" has no specified output pin load capacitance -- assuming default load capacitance of %2!d! pF for timing analysis" 0 0 "" 0 -1} { "Info" "IDAT_NO_LOADING_SPECIFIED_ON_PIN" "S_RED_LEDS_OUT\[9\] 0 " "Info: Pin \"S_RED_LEDS_OUT\[9\]\" has no specified output pin load capacitance -- assuming default load capacitance of 0 pF for timing analysis" {  } {  } 0 0 "Pin \"%1!s!\" has no specified output pin load capacitance -- assuming default load capacitance of %2!d! pF for timing analysis" 0 0 "" 0 -1} { "Info" "IDAT_NO_LOADING_SPECIFIED_ON_PIN" "I2C_CLOCK_OUT 0 " "Info: Pin \"I2C_CLOCK_OUT\" has no specified output pin load capacitance -- assuming default load capacitance of 0 pF for timing analysis" {  } {  } 0 0 "Pin \"%1!s!\" has no specified output pin load capacitance -- assuming default load capacitance of %2!d! pF for timing analysis" 0 0 "" 0 -1} { "Info" "IDAT_NO_LOADING_SPECIFIED_ON_PIN" "I2S_LEFT_RIGHT_CLOCK_OUT 0 " "Info: Pin \"I2S_LEFT_RIGHT_CLOCK_OUT\" has no specified output pin load capacitance -- assuming default load capacitance of 0 pF for timing analysis" {  } {  } 0 0 "Pin \"%1!s!\" has no specified output pin load capacitance -- assuming default load capacitance of %2!d! pF for timing analysis" 0 0 "" 0 -1} { "Info" "IDAT_NO_LOADING_SPECIFIED_ON_PIN" "I2S_CLOCK_OUT 0 " "Info: Pin \"I2S_CLOCK_OUT\" has no specified output pin load capacitance -- assuming default load capacitance of 0 pF for timing analysis" {  } {  } 0 0 "Pin \"%1!s!\" has no specified output pin load capacitance -- assuming default load capacitance of %2!d! pF for timing analysis" 0 0 "" 0 -1} { "Info" "IDAT_NO_LOADING_SPECIFIED_ON_PIN" "I2S_CORE_CLOCK_OUT 0 " "Info: Pin \"I2S_CORE_CLOCK_OUT\" has no specified output pin load capacitance -- assuming default load capacitance of 0 pF for timing analysis" {  } {  } 0 0 "Pin \"%1!s!\" has no specified output pin load capacitance -- assuming default load capacitance of %2!d! pF for timing analysis" 0 0 "" 0 -1} { "Info" "IDAT_NO_LOADING_SPECIFIED_ON_PIN" "FLASH_MEMORY_ADDRESS_OUT\[0\] 0 " "Info: Pin \"FLASH_MEMORY_ADDRESS_OUT\[0\]\" has no specified output pin load capacitance -- assuming default load capacitance of 0 pF for timing analysis" {  } {  } 0 0 "Pin \"%1!s!\" has no specified output pin load capacitance -- assuming default load capacitance of %2!d! pF for timing analysis" 0 0 "" 0 -1} { "Info" "IDAT_NO_LOADING_SPECIFIED_ON_PIN" "FLASH_MEMORY_ADDRESS_OUT\[1\] 0 " "Info: Pin \"FLASH_MEMORY_ADDRESS_OUT\[1\]\" has no specified output pin load capacitance -- assuming default load capacitance of 0 pF for timing analysis" {  } {  } 0 0 "Pin \"%1!s!\" has no specified output pin load capacitance -- assuming default load capacitance of %2!d! pF for timing analysis" 0 0 "" 0 -1} { "Info" "IDAT_NO_LOADING_SPECIFIED_ON_PIN" "FLASH_MEMORY_ADDRESS_OUT\[2\] 0 " "Info: Pin \"FLASH_MEMORY_ADDRESS_OUT\[2\]\" has no specified output pin load capacitance -- assuming default load capacitance of 0 pF for timing analysis" {  } {  } 0 0 "Pin \"%1!s!\" has no specified output pin load capacitance -- assuming default load capacitance of %2!d! pF for timing analysis" 0 0 "" 0 -1} { "Info" "IDAT_NO_LOADING_SPECIFIED_ON_PIN" "FLASH_MEMORY_ADDRESS_OUT\[3\] 0 " "Info: Pin \"FLASH_MEMORY_ADDRESS_OUT\[3\]\" has no specified output pin load capacitance -- assuming default load capacitance of 0 pF for timing analysis" {  } {  } 0 0 "Pin \"%1!s!\" has no specified output pin load capacitance -- assuming default load capacitance of %2!d! pF for timing analysis" 0 0 "" 0 -1} { "Info" "IDAT_NO_LOADING_SPECIFIED_ON_PIN" "FLASH_MEMORY_ADDRESS_OUT\[4\] 0 " "Info: Pin \"FLASH_MEMORY_ADDRESS_OUT\[4\]\" has no specified output pin load capacitance -- assuming default load capacitance of 0 pF for timing analysis" {  } {  } 0 0 "Pin \"%1!s!\" has no specified output pin load capacitance -- assuming default load capacitance of %2!d! pF for timing analysis" 0 0 "" 0 -1} { "Info" "IDAT_NO_LOADING_SPECIFIED_ON_PIN" "FLASH_MEMORY_ADDRESS_OUT\[5\] 0 " "Info: Pin \"FLASH_MEMORY_ADDRESS_OUT\[5\]\" has no specified output pin load capacitance -- assuming default load capacitance of 0 pF for timing analysis" {  } {  } 0 0 "Pin \"%1!s!\" has no specified output pin load capacitance -- assuming default load capacitance of %2!d! pF for timing analysis" 0 0 "" 0 -1} { "Info" "IDAT_NO_LOADING_SPECIFIED_ON_PIN" "FLASH_MEMORY_ADDRESS_OUT\[6\] 0 " "Info: Pin \"FLASH_MEMORY_ADDRESS_OUT\[6\]\" has no specified output pin load capacitance -- assuming default load capacitance of 0 pF for timing analysis" {  } {  } 0 0 "Pin \"%1!s!\" has no specified output pin load capacitance -- assuming default load capacitance of %2!d! pF for timing analysis" 0 0 "" 0 -1} { "Info" "IDAT_NO_LOADING_SPECIFIED_ON_PIN" "FLASH_MEMORY_ADDRESS_OUT\[7\] 0 " "Info: Pin \"FLASH_MEMORY_ADDRESS_OUT\[7\]\" has no specified output pin load capacitance -- assuming default load capacitance of 0 pF for timing analysis" {  } {  } 0 0 "Pin \"%1!s!\" has no specified output pin load capacitance -- assuming default load capacitance of %2!d! pF for timing analysis" 0 0 "" 0 -1} { "Info" "IDAT_NO_LOADING_SPECIFIED_ON_PIN" "FLASH_MEMORY_ADDRESS_OUT\[8\] 0 " "Info: Pin \"FLASH_MEMORY_ADDRESS_OUT\[8\]\" has no specified output pin load capacitance -- assuming default load capacitance of 0 pF for timing analysis" {  } {  } 0 0 "Pin \"%1!s!\" has no specified output pin load capacitance -- assuming default load capacitance of %2!d! pF for timing analysis" 0 0 "" 0 -1} { "Info" "IDAT_NO_LOADING_SPECIFIED_ON_PIN" "FLASH_MEMORY_ADDRESS_OUT\[9\] 0 " "Info: Pin \"FLASH_MEMORY_ADDRESS_OUT\[9\]\" has no specified output pin load capacitance -- assuming default load capacitance of 0 pF for timing analysis" {  } {  } 0 0 "Pin \"%1!s!\" has no specified output pin load capacitance -- assuming default load capacitance of %2!d! pF for timing analysis" 0 0 "" 0 -1} { "Info" "IDAT_NO_LOADING_SPECIFIED_ON_PIN" "FLASH_MEMORY_ADDRESS_OUT\[10\] 0 " "Info: Pin \"FLASH_MEMORY_ADDRESS_OUT\[10\]\" has no specified output pin load capacitance -- assuming default load capacitance of 0 pF for timing analysis" {  } {  } 0 0 "Pin \"%1!s!\" has no specified output pin load capacitance -- assuming default load capacitance of %2!d! pF for timing analysis" 0 0 "" 0 -1} { "Info" "IDAT_NO_LOADING_SPECIFIED_ON_PIN" "FLASH_MEMORY_ADDRESS_OUT\[11\] 0 " "Info: Pin \"FLASH_MEMORY_ADDRESS_OUT\[11\]\" has no specified output pin load capacitance -- assuming default load capacitance of 0 pF for timing analysis" {  } {  } 0 0 "Pin \"%1!s!\" has no specified output pin load capacitance -- assuming default load capacitance of %2!d! pF for timing analysis" 0 0 "" 0 -1} { "Info" "IDAT_NO_LOADING_SPECIFIED_ON_PIN" "FLASH_MEMORY_ADDRESS_OUT\[12\] 0 " "Info: Pin \"FLASH_MEMORY_ADDRESS_OUT\[12\]\" has no specified output pin load capacitance -- assuming default load capacitance of 0 pF for timing analysis" {  } {  } 0 0 "Pin \"%1!s!\" has no specified output pin load capacitance -- assuming default load capacitance of %2!d! pF for timing analysis" 0 0 "" 0 -1} { "Info" "IDAT_NO_LOADING_SPECIFIED_ON_PIN" "FLASH_MEMORY_ADDRESS_OUT\[13\] 0 " "Info: Pin \"FLASH_MEMORY_ADDRESS_OUT\[13\]\" has no specified output pin load capacitance -- assuming default load capacitance of 0 pF for timing analysis" {  } {  } 0 0 "Pin \"%1!s!\" has no specified output pin load capacitance -- assuming default load capacitance of %2!d! pF for timing analysis" 0 0 "" 0 -1} { "Info" "IDAT_NO_LOADING_SPECIFIED_ON_PIN" "FLASH_MEMORY_ADDRESS_OUT\[14\] 0 " "Info: Pin \"FLASH_MEMORY_ADDRESS_OUT\[14\]\" has no specified output pin load capacitance -- assuming default load capacitance of 0 pF for timing analysis" {  } {  } 0 0 "Pin \"%1!s!\" has no specified output pin load capacitance -- assuming default load capacitance of %2!d! pF for timing analysis" 0 0 "" 0 -1} { "Info" "IDAT_NO_LOADING_SPECIFIED_ON_PIN" "FLASH_MEMORY_ADDRESS_OUT\[15\] 0 " "Info: Pin \"FLASH_MEMORY_ADDRESS_OUT\[15\]\" has no specified output pin load capacitance -- assuming default load capacitance of 0 pF for timing analysis" {  } {  } 0 0 "Pin \"%1!s!\" has no specified output pin load capacitance -- assuming default load capacitance of %2!d! pF for timing analysis" 0 0 "" 0 -1} { "Info" "IDAT_NO_LOADING_SPECIFIED_ON_PIN" "FLASH_MEMORY_ADDRESS_OUT\[16\] 0 " "Info: Pin \"FLASH_MEMORY_ADDRESS_OUT\[16\]\" has no specified output pin load capacitance -- assuming default load capacitance of 0 pF for timing analysis" {  } {  } 0 0 "Pin \"%1!s!\" has no specified output pin load capacitance -- assuming default load capacitance of %2!d! pF for timing analysis" 0 0 "" 0 -1} { "Info" "IDAT_NO_LOADING_SPECIFIED_ON_PIN" "FLASH_MEMORY_ADDRESS_OUT\[17\] 0 " "Info: Pin \"FLASH_MEMORY_ADDRESS_OUT\[17\]\" has no specified output pin load capacitance -- assuming default load capacitance of 0 pF for timing analysis" {  } {  } 0 0 "Pin \"%1!s!\" has no specified output pin load capacitance -- assuming default load capacitance of %2!d! pF for timing analysis" 0 0 "" 0 -1} { "Info" "IDAT_NO_LOADING_SPECIFIED_ON_PIN" "FLASH_MEMORY_ADDRESS_OUT\[18\] 0 " "Info: Pin \"FLASH_MEMORY_ADDRESS_OUT\[18\]\" has no specified output pin load capacitance -- assuming default load capacitance of 0 pF for timing analysis" {  } {  } 0 0 "Pin \"%1!s!\" has no specified output pin load capacitance -- assuming default load capacitance of %2!d! pF for timing analysis" 0 0 "" 0 -1} { "Info" "IDAT_NO_LOADING_SPECIFIED_ON_PIN" "FLASH_MEMORY_ADDRESS_OUT\[19\] 0 " "Info: Pin \"FLASH_MEMORY_ADDRESS_OUT\[19\]\" has no specified output pin load capacitance -- assuming default load capacitance of 0 pF for timing analysis" {  } {  } 0 0 "Pin \"%1!s!\" has no specified output pin load capacitance -- assuming default load capacitance of %2!d! pF for timing analysis" 0 0 "" 0 -1} { "Info" "IDAT_NO_LOADING_SPECIFIED_ON_PIN" "FLASH_MEMORY_ADDRESS_OUT\[20\] 0 " "Info: Pin \"FLASH_MEMORY_ADDRESS_OUT\[20\]\" has no specified output pin load capacitance -- assuming default load capacitance of 0 pF for timing analysis" {  } {  } 0 0 "Pin \"%1!s!\" has no specified output pin load capacitance -- assuming default load capacitance of %2!d! pF for timing analysis" 0 0 "" 0 -1} { "Info" "IDAT_NO_LOADING_SPECIFIED_ON_PIN" "FLASH_MEMORY_ADDRESS_OUT\[21\] 0 " "Info: Pin \"FLASH_MEMORY_ADDRESS_OUT\[21\]\" has no specified output pin load capacitance -- assuming default load capacitance of 0 pF for timing analysis" {  } {  } 0 0 "Pin \"%1!s!\" has no specified output pin load capacitance -- assuming default load capacitance of %2!d! pF for timing analysis" 0 0 "" 0 -1} { "Info" "IDAT_NO_LOADING_SPECIFIED_ON_PIN" "FLASH_MEMORY_nWE_OUT 0 " "Info: Pin \"FLASH_MEMORY_nWE_OUT\" has no specified output pin load capacitance -- assuming default load capacitance of 0 pF for timing analysis" {  } {  } 0 0 "Pin \"%1!s!\" has no specified output pin load capacitance -- assuming default load capacitance of %2!d! pF for timing analysis" 0 0 "" 0 -1} { "Info" "IDAT_NO_LOADING_SPECIFIED_ON_PIN" "FLASH_MEMORY_nOE_OUT 0 " "Info: Pin \"FLASH_MEMORY_nOE_OUT\" has no specified output pin load capacitance -- assuming default load capacitance of 0 pF for timing analysis" {  } {  } 0 0 "Pin \"%1!s!\" has no specified output pin load capacitance -- assuming default load capacitance of %2!d! pF for timing analysis" 0 0 "" 0 -1} { "Info" "IDAT_NO_LOADING_SPECIFIED_ON_PIN" "FLASH_MEMORY_nRESET_OUT 0 " "Info: Pin \"FLASH_MEMORY_nRESET_OUT\" has no specified output pin load capacitance -- assuming default load capacitance of 0 pF for timing analysis" {  } {  } 0 0 "Pin \"%1!s!\" has no specified output pin load capacitance -- assuming default load capacitance of %2!d! pF for timing analysis" 0 0 "" 0 -1} { "Info" "IDAT_NO_LOADING_SPECIFIED_ON_PIN" "FLASH_MEMORY_nCE_OUT 0 " "Info: Pin \"FLASH_MEMORY_nCE_OUT\" has no specified output pin load capacitance -- assuming default load capacitance of 0 pF for timing analysis" {  } {  } 0 0 "Pin \"%1!s!\" has no specified output pin load capacitance -- assuming default load capacitance of %2!d! pF for timing analysis" 0 0 "" 0 -1}  } {  } 0 0 "Found %1!d! output pins without output pin load capacitance assignment" 0 0 "" 0 -1}
39 
{ "Info" "IDAT_DAT_COMPLETED" "" "Info: Delay annotation completed successfully" {  } {  } 0 0 "Delay annotation completed successfully" 0 0 "" 0 -1}
40 
{ "Warning" "WFIOMGR_BIDIR_WITH_TRIVIAL_OUTPUT_ENABLE" "10 " "Warning: Following 10 pins have no output enable or a GND or VCC output enable - later changes to this connectivity may change fitting results" { { "Info" "IFIOMGR_BIDIR_WITH_TRIVIAL_OUTPUT_ENABLE_SUB" "I2C_DATA_INOUT a permanently enabled " "Info: Pin I2C_DATA_INOUT has a permanently enabled output enable" {  } { { "c:/altera/90/quartus/bin/pin_planner.ppl" "" { PinPlanner "c:/altera/90/quartus/bin/pin_planner.ppl" { I2C_DATA_INOUT } } } { "c:/altera/90/quartus/bin/Assignment Editor.qase" "" { Assignment "c:/altera/90/quartus/bin/Assignment Editor.qase" 1 { { 0 "I2C_DATA_INOUT" } } } } { "HD_ADPCM_Codec.vhd" "" { Text "D:/HD_ADPCM/HD_ADPCM_1Bit_Stereo_Decoder/HD_ADPCM_Codec.vhd" 19 -1 0 } } { "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" "" { I2C_DATA_INOUT } "NODE_NAME" } }  } 0 0 "Pin %1!s! has %2!s! output enable" 0 0 "" 0 -1} { "Info" "IFIOMGR_BIDIR_WITH_TRIVIAL_OUTPUT_ENABLE_SUB" "I2S_DATA_INOUT a permanently enabled " "Info: Pin I2S_DATA_INOUT has a permanently enabled output enable" {  } { { "c:/altera/90/quartus/bin/pin_planner.ppl" "" { PinPlanner "c:/altera/90/quartus/bin/pin_planner.ppl" { I2S_DATA_INOUT } } } { "c:/altera/90/quartus/bin/Assignment Editor.qase" "" { Assignment "c:/altera/90/quartus/bin/Assignment Editor.qase" 1 { { 0 "I2S_DATA_INOUT" } } } } { "HD_ADPCM_Codec.vhd" "" { Text "D:/HD_ADPCM/HD_ADPCM_1Bit_Stereo_Decoder/HD_ADPCM_Codec.vhd" 22 -1 0 } } { "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" "" { I2S_DATA_INOUT } "NODE_NAME" } }  } 0 0 "Pin %1!s! has %2!s! output enable" 0 0 "" 0 -1} { "Info" "IFIOMGR_BIDIR_WITH_TRIVIAL_OUTPUT_ENABLE_SUB" "FLASH_MEMORY_DATA_INOUT\[0\] a permanently disabled " "Info: Pin FLASH_MEMORY_DATA_INOUT\[0\] has a permanently disabled output enable" {  } { { "c:/altera/90/quartus/bin/pin_planner.ppl" "" { PinPlanner "c:/altera/90/quartus/bin/pin_planner.ppl" { FLASH_MEMORY_DATA_INOUT[0] } } } { "c:/altera/90/quartus/bin/Assignment Editor.qase" "" { Assignment "c:/altera/90/quartus/bin/Assignment Editor.qase" 1 { { 0 "FLASH_MEMORY_DATA_INOUT\[0\]" } } } } { "HD_ADPCM_Codec.vhd" "" { Text "D:/HD_ADPCM/HD_ADPCM_1Bit_Stereo_Decoder/HD_ADPCM_Codec.vhd" 28 -1 0 } } { "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" "" { FLASH_MEMORY_DATA_INOUT[0] } "NODE_NAME" } }  } 0 0 "Pin %1!s! has %2!s! output enable" 0 0 "" 0 -1} { "Info" "IFIOMGR_BIDIR_WITH_TRIVIAL_OUTPUT_ENABLE_SUB" "FLASH_MEMORY_DATA_INOUT\[1\] a permanently disabled " "Info: Pin FLASH_MEMORY_DATA_INOUT\[1\] has a permanently disabled output enable" {  } { { "c:/altera/90/quartus/bin/pin_planner.ppl" "" { PinPlanner "c:/altera/90/quartus/bin/pin_planner.ppl" { FLASH_MEMORY_DATA_INOUT[1] } } } { "c:/altera/90/quartus/bin/Assignment Editor.qase" "" { Assignment "c:/altera/90/quartus/bin/Assignment Editor.qase" 1 { { 0 "FLASH_MEMORY_DATA_INOUT\[1\]" } } } } { "HD_ADPCM_Codec.vhd" "" { Text "D:/HD_ADPCM/HD_ADPCM_1Bit_Stereo_Decoder/HD_ADPCM_Codec.vhd" 28 -1 0 } } { "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" "" { FLASH_MEMORY_DATA_INOUT[1] } "NODE_NAME" } }  } 0 0 "Pin %1!s! has %2!s! output enable" 0 0 "" 0 -1} { "Info" "IFIOMGR_BIDIR_WITH_TRIVIAL_OUTPUT_ENABLE_SUB" "FLASH_MEMORY_DATA_INOUT\[2\] a permanently disabled " "Info: Pin FLASH_MEMORY_DATA_INOUT\[2\] has a permanently disabled output enable" {  } { { "c:/altera/90/quartus/bin/pin_planner.ppl" "" { PinPlanner "c:/altera/90/quartus/bin/pin_planner.ppl" { FLASH_MEMORY_DATA_INOUT[2] } } } { "c:/altera/90/quartus/bin/Assignment Editor.qase" "" { Assignment "c:/altera/90/quartus/bin/Assignment Editor.qase" 1 { { 0 "FLASH_MEMORY_DATA_INOUT\[2\]" } } } } { "HD_ADPCM_Codec.vhd" "" { Text "D:/HD_ADPCM/HD_ADPCM_1Bit_Stereo_Decoder/HD_ADPCM_Codec.vhd" 28 -1 0 } } { "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" "" { FLASH_MEMORY_DATA_INOUT[2] } "NODE_NAME" } }  } 0 0 "Pin %1!s! has %2!s! output enable" 0 0 "" 0 -1} { "Info" "IFIOMGR_BIDIR_WITH_TRIVIAL_OUTPUT_ENABLE_SUB" "FLASH_MEMORY_DATA_INOUT\[3\] a permanently disabled " "Info: Pin FLASH_MEMORY_DATA_INOUT\[3\] has a permanently disabled output enable" {  } { { "c:/altera/90/quartus/bin/pin_planner.ppl" "" { PinPlanner "c:/altera/90/quartus/bin/pin_planner.ppl" { FLASH_MEMORY_DATA_INOUT[3] } } } { "c:/altera/90/quartus/bin/Assignment Editor.qase" "" { Assignment "c:/altera/90/quartus/bin/Assignment Editor.qase" 1 { { 0 "FLASH_MEMORY_DATA_INOUT\[3\]" } } } } { "HD_ADPCM_Codec.vhd" "" { Text "D:/HD_ADPCM/HD_ADPCM_1Bit_Stereo_Decoder/HD_ADPCM_Codec.vhd" 28 -1 0 } } { "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" "" { FLASH_MEMORY_DATA_INOUT[3] } "NODE_NAME" } }  } 0 0 "Pin %1!s! has %2!s! output enable" 0 0 "" 0 -1} { "Info" "IFIOMGR_BIDIR_WITH_TRIVIAL_OUTPUT_ENABLE_SUB" "FLASH_MEMORY_DATA_INOUT\[4\] a permanently disabled " "Info: Pin FLASH_MEMORY_DATA_INOUT\[4\] has a permanently disabled output enable" {  } { { "c:/altera/90/quartus/bin/pin_planner.ppl" "" { PinPlanner "c:/altera/90/quartus/bin/pin_planner.ppl" { FLASH_MEMORY_DATA_INOUT[4] } } } { "c:/altera/90/quartus/bin/Assignment Editor.qase" "" { Assignment "c:/altera/90/quartus/bin/Assignment Editor.qase" 1 { { 0 "FLASH_MEMORY_DATA_INOUT\[4\]" } } } } { "HD_ADPCM_Codec.vhd" "" { Text "D:/HD_ADPCM/HD_ADPCM_1Bit_Stereo_Decoder/HD_ADPCM_Codec.vhd" 28 -1 0 } } { "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" "" { FLASH_MEMORY_DATA_INOUT[4] } "NODE_NAME" } }  } 0 0 "Pin %1!s! has %2!s! output enable" 0 0 "" 0 -1} { "Info" "IFIOMGR_BIDIR_WITH_TRIVIAL_OUTPUT_ENABLE_SUB" "FLASH_MEMORY_DATA_INOUT\[5\] a permanently disabled " "Info: Pin FLASH_MEMORY_DATA_INOUT\[5\] has a permanently disabled output enable" {  } { { "c:/altera/90/quartus/bin/pin_planner.ppl" "" { PinPlanner "c:/altera/90/quartus/bin/pin_planner.ppl" { FLASH_MEMORY_DATA_INOUT[5] } } } { "c:/altera/90/quartus/bin/Assignment Editor.qase" "" { Assignment "c:/altera/90/quartus/bin/Assignment Editor.qase" 1 { { 0 "FLASH_MEMORY_DATA_INOUT\[5\]" } } } } { "HD_ADPCM_Codec.vhd" "" { Text "D:/HD_ADPCM/HD_ADPCM_1Bit_Stereo_Decoder/HD_ADPCM_Codec.vhd" 28 -1 0 } } { "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" "" { FLASH_MEMORY_DATA_INOUT[5] } "NODE_NAME" } }  } 0 0 "Pin %1!s! has %2!s! output enable" 0 0 "" 0 -1} { "Info" "IFIOMGR_BIDIR_WITH_TRIVIAL_OUTPUT_ENABLE_SUB" "FLASH_MEMORY_DATA_INOUT\[6\] a permanently disabled " "Info: Pin FLASH_MEMORY_DATA_INOUT\[6\] has a permanently disabled output enable" {  } { { "c:/altera/90/quartus/bin/pin_planner.ppl" "" { PinPlanner "c:/altera/90/quartus/bin/pin_planner.ppl" { FLASH_MEMORY_DATA_INOUT[6] } } } { "c:/altera/90/quartus/bin/Assignment Editor.qase" "" { Assignment "c:/altera/90/quartus/bin/Assignment Editor.qase" 1 { { 0 "FLASH_MEMORY_DATA_INOUT\[6\]" } } } } { "HD_ADPCM_Codec.vhd" "" { Text "D:/HD_ADPCM/HD_ADPCM_1Bit_Stereo_Decoder/HD_ADPCM_Codec.vhd" 28 -1 0 } } { "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" "" { FLASH_MEMORY_DATA_INOUT[6] } "NODE_NAME" } }  } 0 0 "Pin %1!s! has %2!s! output enable" 0 0 "" 0 -1} { "Info" "IFIOMGR_BIDIR_WITH_TRIVIAL_OUTPUT_ENABLE_SUB" "FLASH_MEMORY_DATA_INOUT\[7\] a permanently disabled " "Info: Pin FLASH_MEMORY_DATA_INOUT\[7\] has a permanently disabled output enable" {  } { { "c:/altera/90/quartus/bin/pin_planner.ppl" "" { PinPlanner "c:/altera/90/quartus/bin/pin_planner.ppl" { FLASH_MEMORY_DATA_INOUT[7] } } } { "c:/altera/90/quartus/bin/Assignment Editor.qase" "" { Assignment "c:/altera/90/quartus/bin/Assignment Editor.qase" 1 { { 0 "FLASH_MEMORY_DATA_INOUT\[7\]" } } } } { "HD_ADPCM_Codec.vhd" "" { Text "D:/HD_ADPCM/HD_ADPCM_1Bit_Stereo_Decoder/HD_ADPCM_Codec.vhd" 28 -1 0 } } { "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" "" { FLASH_MEMORY_DATA_INOUT[7] } "NODE_NAME" } }  } 0 0 "Pin %1!s! has %2!s! output enable" 0 0 "" 0 -1}  } {  } 0 0 "Following %1!d! pins have no output enable or a GND or VCC output enable - later changes to this connectivity may change fitting results" 0 0 "" 0 -1}
41 
{ "Warning" "WFIOMGR_BIDIR_OR_OUTPUT_WITH_TRIVIAL_DATAIN" "38 " "Warning: Following 38 pins have nothing, GND, or VCC driving datain port -- changes to this connectivity may change fitting results" { { "Info" "IFIOMGR_BIDIR_OR_OUTPUT_WITH_TRIVIAL_DATAIN_SUB" "FLASH_MEMORY_DATA_INOUT\[0\] VCC " "Info: Pin FLASH_MEMORY_DATA_INOUT\[0\] has VCC driving its datain port" {  } { { "c:/altera/90/quartus/bin/pin_planner.ppl" "" { PinPlanner "c:/altera/90/quartus/bin/pin_planner.ppl" { FLASH_MEMORY_DATA_INOUT[0] } } } { "c:/altera/90/quartus/bin/Assignment Editor.qase" "" { Assignment "c:/altera/90/quartus/bin/Assignment Editor.qase" 1 { { 0 "FLASH_MEMORY_DATA_INOUT\[0\]" } } } } { "HD_ADPCM_Codec.vhd" "" { Text "D:/HD_ADPCM/HD_ADPCM_1Bit_Stereo_Decoder/HD_ADPCM_Codec.vhd" 28 -1 0 } } { "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" "" { FLASH_MEMORY_DATA_INOUT[0] } "NODE_NAME" } }  } 0 0 "Pin %1!s! has %2!s! driving its datain port" 0 0 "" 0 -1} { "Info" "IFIOMGR_BIDIR_OR_OUTPUT_WITH_TRIVIAL_DATAIN_SUB" "FLASH_MEMORY_DATA_INOUT\[1\] VCC " "Info: Pin FLASH_MEMORY_DATA_INOUT\[1\] has VCC driving its datain port" {  } { { "c:/altera/90/quartus/bin/pin_planner.ppl" "" { PinPlanner "c:/altera/90/quartus/bin/pin_planner.ppl" { FLASH_MEMORY_DATA_INOUT[1] } } } { "c:/altera/90/quartus/bin/Assignment Editor.qase" "" { Assignment "c:/altera/90/quartus/bin/Assignment Editor.qase" 1 { { 0 "FLASH_MEMORY_DATA_INOUT\[1\]" } } } } { "HD_ADPCM_Codec.vhd" "" { Text "D:/HD_ADPCM/HD_ADPCM_1Bit_Stereo_Decoder/HD_ADPCM_Codec.vhd" 28 -1 0 } } { "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" "" { FLASH_MEMORY_DATA_INOUT[1] } "NODE_NAME" } }  } 0 0 "Pin %1!s! has %2!s! driving its datain port" 0 0 "" 0 -1} { "Info" "IFIOMGR_BIDIR_OR_OUTPUT_WITH_TRIVIAL_DATAIN_SUB" "FLASH_MEMORY_DATA_INOUT\[2\] VCC " "Info: Pin FLASH_MEMORY_DATA_INOUT\[2\] has VCC driving its datain port" {  } { { "c:/altera/90/quartus/bin/pin_planner.ppl" "" { PinPlanner "c:/altera/90/quartus/bin/pin_planner.ppl" { FLASH_MEMORY_DATA_INOUT[2] } } } { "c:/altera/90/quartus/bin/Assignment Editor.qase" "" { Assignment "c:/altera/90/quartus/bin/Assignment Editor.qase" 1 { { 0 "FLASH_MEMORY_DATA_INOUT\[2\]" } } } } { "HD_ADPCM_Codec.vhd" "" { Text "D:/HD_ADPCM/HD_ADPCM_1Bit_Stereo_Decoder/HD_ADPCM_Codec.vhd" 28 -1 0 } } { "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" "" { FLASH_MEMORY_DATA_INOUT[2] } "NODE_NAME" } }  } 0 0 "Pin %1!s! has %2!s! driving its datain port" 0 0 "" 0 -1} { "Info" "IFIOMGR_BIDIR_OR_OUTPUT_WITH_TRIVIAL_DATAIN_SUB" "FLASH_MEMORY_DATA_INOUT\[3\] VCC " "Info: Pin FLASH_MEMORY_DATA_INOUT\[3\] has VCC driving its datain port" {  } { { "c:/altera/90/quartus/bin/pin_planner.ppl" "" { PinPlanner "c:/altera/90/quartus/bin/pin_planner.ppl" { FLASH_MEMORY_DATA_INOUT[3] } } } { "c:/altera/90/quartus/bin/Assignment Editor.qase" "" { Assignment "c:/altera/90/quartus/bin/Assignment Editor.qase" 1 { { 0 "FLASH_MEMORY_DATA_INOUT\[3\]" } } } } { "HD_ADPCM_Codec.vhd" "" { Text "D:/HD_ADPCM/HD_ADPCM_1Bit_Stereo_Decoder/HD_ADPCM_Codec.vhd" 28 -1 0 } } { "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" "" { FLASH_MEMORY_DATA_INOUT[3] } "NODE_NAME" } }  } 0 0 "Pin %1!s! has %2!s! driving its datain port" 0 0 "" 0 -1} { "Info" "IFIOMGR_BIDIR_OR_OUTPUT_WITH_TRIVIAL_DATAIN_SUB" "FLASH_MEMORY_DATA_INOUT\[4\] VCC " "Info: Pin FLASH_MEMORY_DATA_INOUT\[4\] has VCC driving its datain port" {  } { { "c:/altera/90/quartus/bin/pin_planner.ppl" "" { PinPlanner "c:/altera/90/quartus/bin/pin_planner.ppl" { FLASH_MEMORY_DATA_INOUT[4] } } } { "c:/altera/90/quartus/bin/Assignment Editor.qase" "" { Assignment "c:/altera/90/quartus/bin/Assignment Editor.qase" 1 { { 0 "FLASH_MEMORY_DATA_INOUT\[4\]" } } } } { "HD_ADPCM_Codec.vhd" "" { Text "D:/HD_ADPCM/HD_ADPCM_1Bit_Stereo_Decoder/HD_ADPCM_Codec.vhd" 28 -1 0 } } { "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" "" { FLASH_MEMORY_DATA_INOUT[4] } "NODE_NAME" } }  } 0 0 "Pin %1!s! has %2!s! driving its datain port" 0 0 "" 0 -1} { "Info" "IFIOMGR_BIDIR_OR_OUTPUT_WITH_TRIVIAL_DATAIN_SUB" "FLASH_MEMORY_DATA_INOUT\[5\] VCC " "Info: Pin FLASH_MEMORY_DATA_INOUT\[5\] has VCC driving its datain port" {  } { { "c:/altera/90/quartus/bin/pin_planner.ppl" "" { PinPlanner "c:/altera/90/quartus/bin/pin_planner.ppl" { FLASH_MEMORY_DATA_INOUT[5] } } } { "c:/altera/90/quartus/bin/Assignment Editor.qase" "" { Assignment "c:/altera/90/quartus/bin/Assignment Editor.qase" 1 { { 0 "FLASH_MEMORY_DATA_INOUT\[5\]" } } } } { "HD_ADPCM_Codec.vhd" "" { Text "D:/HD_ADPCM/HD_ADPCM_1Bit_Stereo_Decoder/HD_ADPCM_Codec.vhd" 28 -1 0 } } { "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" "" { FLASH_MEMORY_DATA_INOUT[5] } "NODE_NAME" } }  } 0 0 "Pin %1!s! has %2!s! driving its datain port" 0 0 "" 0 -1} { "Info" "IFIOMGR_BIDIR_OR_OUTPUT_WITH_TRIVIAL_DATAIN_SUB" "FLASH_MEMORY_DATA_INOUT\[6\] VCC " "Info: Pin FLASH_MEMORY_DATA_INOUT\[6\] has VCC driving its datain port" {  } { { "c:/altera/90/quartus/bin/pin_planner.ppl" "" { PinPlanner "c:/altera/90/quartus/bin/pin_planner.ppl" { FLASH_MEMORY_DATA_INOUT[6] } } } { "c:/altera/90/quartus/bin/Assignment Editor.qase" "" { Assignment "c:/altera/90/quartus/bin/Assignment Editor.qase" 1 { { 0 "FLASH_MEMORY_DATA_INOUT\[6\]" } } } } { "HD_ADPCM_Codec.vhd" "" { Text "D:/HD_ADPCM/HD_ADPCM_1Bit_Stereo_Decoder/HD_ADPCM_Codec.vhd" 28 -1 0 } } { "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" "" { FLASH_MEMORY_DATA_INOUT[6] } "NODE_NAME" } }  } 0 0 "Pin %1!s! has %2!s! driving its datain port" 0 0 "" 0 -1} { "Info" "IFIOMGR_BIDIR_OR_OUTPUT_WITH_TRIVIAL_DATAIN_SUB" "FLASH_MEMORY_DATA_INOUT\[7\] VCC " "Info: Pin FLASH_MEMORY_DATA_INOUT\[7\] has VCC driving its datain port" {  } { { "c:/altera/90/quartus/bin/pin_planner.ppl" "" { PinPlanner "c:/altera/90/quartus/bin/pin_planner.ppl" { FLASH_MEMORY_DATA_INOUT[7] } } } { "c:/altera/90/quartus/bin/Assignment Editor.qase" "" { Assignment "c:/altera/90/quartus/bin/Assignment Editor.qase" 1 { { 0 "FLASH_MEMORY_DATA_INOUT\[7\]" } } } } { "HD_ADPCM_Codec.vhd" "" { Text "D:/HD_ADPCM/HD_ADPCM_1Bit_Stereo_Decoder/HD_ADPCM_Codec.vhd" 28 -1 0 } } { "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" "" { FLASH_MEMORY_DATA_INOUT[7] } "NODE_NAME" } }  } 0 0 "Pin %1!s! has %2!s! driving its datain port" 0 0 "" 0 -1} { "Info" "IFIOMGR_BIDIR_OR_OUTPUT_WITH_TRIVIAL_DATAIN_SUB" "S_SEVEN_SEGMENT_1_OUT\[0\] GND " "Info: Pin S_SEVEN_SEGMENT_1_OUT\[0\] has GND driving its datain port" {  } { { "c:/altera/90/quartus/bin/pin_planner.ppl" "" { PinPlanner "c:/altera/90/quartus/bin/pin_planner.ppl" { S_SEVEN_SEGMENT_1_OUT[0] } } } { "c:/altera/90/quartus/bin/Assignment Editor.qase" "" { Assignment "c:/altera/90/quartus/bin/Assignment Editor.qase" 1 { { 0 "S_SEVEN_SEGMENT_1_OUT\[0\]" } } } } { "HD_ADPCM_Codec.vhd" "" { Text "D:/HD_ADPCM/HD_ADPCM_1Bit_Stereo_Decoder/HD_ADPCM_Codec.vhd" 13 -1 0 } } { "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" "" { S_SEVEN_SEGMENT_1_OUT[0] } "NODE_NAME" } }  } 0 0 "Pin %1!s! has %2!s! driving its datain port" 0 0 "" 0 -1} { "Info" "IFIOMGR_BIDIR_OR_OUTPUT_WITH_TRIVIAL_DATAIN_SUB" "S_SEVEN_SEGMENT_1_OUT\[1\] GND " "Info: Pin S_SEVEN_SEGMENT_1_OUT\[1\] has GND driving its datain port" {  } { { "c:/altera/90/quartus/bin/pin_planner.ppl" "" { PinPlanner "c:/altera/90/quartus/bin/pin_planner.ppl" { S_SEVEN_SEGMENT_1_OUT[1] } } } { "c:/altera/90/quartus/bin/Assignment Editor.qase" "" { Assignment "c:/altera/90/quartus/bin/Assignment Editor.qase" 1 { { 0 "S_SEVEN_SEGMENT_1_OUT\[1\]" } } } } { "HD_ADPCM_Codec.vhd" "" { Text "D:/HD_ADPCM/HD_ADPCM_1Bit_Stereo_Decoder/HD_ADPCM_Codec.vhd" 13 -1 0 } } { "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" "" { S_SEVEN_SEGMENT_1_OUT[1] } "NODE_NAME" } }  } 0 0 "Pin %1!s! has %2!s! driving its datain port" 0 0 "" 0 -1} { "Info" "IFIOMGR_BIDIR_OR_OUTPUT_WITH_TRIVIAL_DATAIN_SUB" "S_SEVEN_SEGMENT_1_OUT\[2\] GND " "Info: Pin S_SEVEN_SEGMENT_1_OUT\[2\] has GND driving its datain port" {  } { { "c:/altera/90/quartus/bin/pin_planner.ppl" "" { PinPlanner "c:/altera/90/quartus/bin/pin_planner.ppl" { S_SEVEN_SEGMENT_1_OUT[2] } } } { "c:/altera/90/quartus/bin/Assignment Editor.qase" "" { Assignment "c:/altera/90/quartus/bin/Assignment Editor.qase" 1 { { 0 "S_SEVEN_SEGMENT_1_OUT\[2\]" } } } } { "HD_ADPCM_Codec.vhd" "" { Text "D:/HD_ADPCM/HD_ADPCM_1Bit_Stereo_Decoder/HD_ADPCM_Codec.vhd" 13 -1 0 } } { "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" "" { S_SEVEN_SEGMENT_1_OUT[2] } "NODE_NAME" } }  } 0 0 "Pin %1!s! has %2!s! driving its datain port" 0 0 "" 0 -1} { "Info" "IFIOMGR_BIDIR_OR_OUTPUT_WITH_TRIVIAL_DATAIN_SUB" "S_SEVEN_SEGMENT_1_OUT\[3\] GND " "Info: Pin S_SEVEN_SEGMENT_1_OUT\[3\] has GND driving its datain port" {  } { { "c:/altera/90/quartus/bin/pin_planner.ppl" "" { PinPlanner "c:/altera/90/quartus/bin/pin_planner.ppl" { S_SEVEN_SEGMENT_1_OUT[3] } } } { "c:/altera/90/quartus/bin/Assignment Editor.qase" "" { Assignment "c:/altera/90/quartus/bin/Assignment Editor.qase" 1 { { 0 "S_SEVEN_SEGMENT_1_OUT\[3\]" } } } } { "HD_ADPCM_Codec.vhd" "" { Text "D:/HD_ADPCM/HD_ADPCM_1Bit_Stereo_Decoder/HD_ADPCM_Codec.vhd" 13 -1 0 } } { "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" "" { S_SEVEN_SEGMENT_1_OUT[3] } "NODE_NAME" } }  } 0 0 "Pin %1!s! has %2!s! driving its datain port" 0 0 "" 0 -1} { "Info" "IFIOMGR_BIDIR_OR_OUTPUT_WITH_TRIVIAL_DATAIN_SUB" "S_SEVEN_SEGMENT_1_OUT\[4\] GND " "Info: Pin S_SEVEN_SEGMENT_1_OUT\[4\] has GND driving its datain port" {  } { { "c:/altera/90/quartus/bin/pin_planner.ppl" "" { PinPlanner "c:/altera/90/quartus/bin/pin_planner.ppl" { S_SEVEN_SEGMENT_1_OUT[4] } } } { "c:/altera/90/quartus/bin/Assignment Editor.qase" "" { Assignment "c:/altera/90/quartus/bin/Assignment Editor.qase" 1 { { 0 "S_SEVEN_SEGMENT_1_OUT\[4\]" } } } } { "HD_ADPCM_Codec.vhd" "" { Text "D:/HD_ADPCM/HD_ADPCM_1Bit_Stereo_Decoder/HD_ADPCM_Codec.vhd" 13 -1 0 } } { "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" "" { S_SEVEN_SEGMENT_1_OUT[4] } "NODE_NAME" } }  } 0 0 "Pin %1!s! has %2!s! driving its datain port" 0 0 "" 0 -1} { "Info" "IFIOMGR_BIDIR_OR_OUTPUT_WITH_TRIVIAL_DATAIN_SUB" "S_SEVEN_SEGMENT_1_OUT\[5\] GND " "Info: Pin S_SEVEN_SEGMENT_1_OUT\[5\] has GND driving its datain port" {  } { { "c:/altera/90/quartus/bin/pin_planner.ppl" "" { PinPlanner "c:/altera/90/quartus/bin/pin_planner.ppl" { S_SEVEN_SEGMENT_1_OUT[5] } } } { "c:/altera/90/quartus/bin/Assignment Editor.qase" "" { Assignment "c:/altera/90/quartus/bin/Assignment Editor.qase" 1 { { 0 "S_SEVEN_SEGMENT_1_OUT\[5\]" } } } } { "HD_ADPCM_Codec.vhd" "" { Text "D:/HD_ADPCM/HD_ADPCM_1Bit_Stereo_Decoder/HD_ADPCM_Codec.vhd" 13 -1 0 } } { "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" "" { S_SEVEN_SEGMENT_1_OUT[5] } "NODE_NAME" } }  } 0 0 "Pin %1!s! has %2!s! driving its datain port" 0 0 "" 0 -1} { "Info" "IFIOMGR_BIDIR_OR_OUTPUT_WITH_TRIVIAL_DATAIN_SUB" "S_SEVEN_SEGMENT_1_OUT\[6\] VCC " "Info: Pin S_SEVEN_SEGMENT_1_OUT\[6\] has VCC driving its datain port" {  } { { "c:/altera/90/quartus/bin/pin_planner.ppl" "" { PinPlanner "c:/altera/90/quartus/bin/pin_planner.ppl" { S_SEVEN_SEGMENT_1_OUT[6] } } } { "c:/altera/90/quartus/bin/Assignment Editor.qase" "" { Assignment "c:/altera/90/quartus/bin/Assignment Editor.qase" 1 { { 0 "S_SEVEN_SEGMENT_1_OUT\[6\]" } } } } { "HD_ADPCM_Codec.vhd" "" { Text "D:/HD_ADPCM/HD_ADPCM_1Bit_Stereo_Decoder/HD_ADPCM_Codec.vhd" 13 -1 0 } } { "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" "" { S_SEVEN_SEGMENT_1_OUT[6] } "NODE_NAME" } }  } 0 0 "Pin %1!s! has %2!s! driving its datain port" 0 0 "" 0 -1} { "Info" "IFIOMGR_BIDIR_OR_OUTPUT_WITH_TRIVIAL_DATAIN_SUB" "S_SEVEN_SEGMENT_2_OUT\[0\] GND " "Info: Pin S_SEVEN_SEGMENT_2_OUT\[0\] has GND driving its datain port" {  } { { "c:/altera/90/quartus/bin/pin_planner.ppl" "" { PinPlanner "c:/altera/90/quartus/bin/pin_planner.ppl" { S_SEVEN_SEGMENT_2_OUT[0] } } } { "c:/altera/90/quartus/bin/Assignment Editor.qase" "" { Assignment "c:/altera/90/quartus/bin/Assignment Editor.qase" 1 { { 0 "S_SEVEN_SEGMENT_2_OUT\[0\]" } } } } { "HD_ADPCM_Codec.vhd" "" { Text "D:/HD_ADPCM/HD_ADPCM_1Bit_Stereo_Decoder/HD_ADPCM_Codec.vhd" 14 -1 0 } } { "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" "" { S_SEVEN_SEGMENT_2_OUT[0] } "NODE_NAME" } }  } 0 0 "Pin %1!s! has %2!s! driving its datain port" 0 0 "" 0 -1} { "Info" "IFIOMGR_BIDIR_OR_OUTPUT_WITH_TRIVIAL_DATAIN_SUB" "S_SEVEN_SEGMENT_2_OUT\[1\] GND " "Info: Pin S_SEVEN_SEGMENT_2_OUT\[1\] has GND driving its datain port" {  } { { "c:/altera/90/quartus/bin/pin_planner.ppl" "" { PinPlanner "c:/altera/90/quartus/bin/pin_planner.ppl" { S_SEVEN_SEGMENT_2_OUT[1] } } } { "c:/altera/90/quartus/bin/Assignment Editor.qase" "" { Assignment "c:/altera/90/quartus/bin/Assignment Editor.qase" 1 { { 0 "S_SEVEN_SEGMENT_2_OUT\[1\]" } } } } { "HD_ADPCM_Codec.vhd" "" { Text "D:/HD_ADPCM/HD_ADPCM_1Bit_Stereo_Decoder/HD_ADPCM_Codec.vhd" 14 -1 0 } } { "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" "" { S_SEVEN_SEGMENT_2_OUT[1] } "NODE_NAME" } }  } 0 0 "Pin %1!s! has %2!s! driving its datain port" 0 0 "" 0 -1} { "Info" "IFIOMGR_BIDIR_OR_OUTPUT_WITH_TRIVIAL_DATAIN_SUB" "S_SEVEN_SEGMENT_2_OUT\[2\] GND " "Info: Pin S_SEVEN_SEGMENT_2_OUT\[2\] has GND driving its datain port" {  } { { "c:/altera/90/quartus/bin/pin_planner.ppl" "" { PinPlanner "c:/altera/90/quartus/bin/pin_planner.ppl" { S_SEVEN_SEGMENT_2_OUT[2] } } } { "c:/altera/90/quartus/bin/Assignment Editor.qase" "" { Assignment "c:/altera/90/quartus/bin/Assignment Editor.qase" 1 { { 0 "S_SEVEN_SEGMENT_2_OUT\[2\]" } } } } { "HD_ADPCM_Codec.vhd" "" { Text "D:/HD_ADPCM/HD_ADPCM_1Bit_Stereo_Decoder/HD_ADPCM_Codec.vhd" 14 -1 0 } } { "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" "" { S_SEVEN_SEGMENT_2_OUT[2] } "NODE_NAME" } }  } 0 0 "Pin %1!s! has %2!s! driving its datain port" 0 0 "" 0 -1} { "Info" "IFIOMGR_BIDIR_OR_OUTPUT_WITH_TRIVIAL_DATAIN_SUB" "S_SEVEN_SEGMENT_2_OUT\[3\] GND " "Info: Pin S_SEVEN_SEGMENT_2_OUT\[3\] has GND driving its datain port" {  } { { "c:/altera/90/quartus/bin/pin_planner.ppl" "" { PinPlanner "c:/altera/90/quartus/bin/pin_planner.ppl" { S_SEVEN_SEGMENT_2_OUT[3] } } } { "c:/altera/90/quartus/bin/Assignment Editor.qase" "" { Assignment "c:/altera/90/quartus/bin/Assignment Editor.qase" 1 { { 0 "S_SEVEN_SEGMENT_2_OUT\[3\]" } } } } { "HD_ADPCM_Codec.vhd" "" { Text "D:/HD_ADPCM/HD_ADPCM_1Bit_Stereo_Decoder/HD_ADPCM_Codec.vhd" 14 -1 0 } } { "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" "" { S_SEVEN_SEGMENT_2_OUT[3] } "NODE_NAME" } }  } 0 0 "Pin %1!s! has %2!s! driving its datain port" 0 0 "" 0 -1} { "Info" "IFIOMGR_BIDIR_OR_OUTPUT_WITH_TRIVIAL_DATAIN_SUB" "S_SEVEN_SEGMENT_2_OUT\[4\] GND " "Info: Pin S_SEVEN_SEGMENT_2_OUT\[4\] has GND driving its datain port" {  } { { "c:/altera/90/quartus/bin/pin_planner.ppl" "" { PinPlanner "c:/altera/90/quartus/bin/pin_planner.ppl" { S_SEVEN_SEGMENT_2_OUT[4] } } } { "c:/altera/90/quartus/bin/Assignment Editor.qase" "" { Assignment "c:/altera/90/quartus/bin/Assignment Editor.qase" 1 { { 0 "S_SEVEN_SEGMENT_2_OUT\[4\]" } } } } { "HD_ADPCM_Codec.vhd" "" { Text "D:/HD_ADPCM/HD_ADPCM_1Bit_Stereo_Decoder/HD_ADPCM_Codec.vhd" 14 -1 0 } } { "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" "" { S_SEVEN_SEGMENT_2_OUT[4] } "NODE_NAME" } }  } 0 0 "Pin %1!s! has %2!s! driving its datain port" 0 0 "" 0 -1} { "Info" "IFIOMGR_BIDIR_OR_OUTPUT_WITH_TRIVIAL_DATAIN_SUB" "S_SEVEN_SEGMENT_2_OUT\[5\] GND " "Info: Pin S_SEVEN_SEGMENT_2_OUT\[5\] has GND driving its datain port" {  } { { "c:/altera/90/quartus/bin/pin_planner.ppl" "" { PinPlanner "c:/altera/90/quartus/bin/pin_planner.ppl" { S_SEVEN_SEGMENT_2_OUT[5] } } } { "c:/altera/90/quartus/bin/Assignment Editor.qase" "" { Assignment "c:/altera/90/quartus/bin/Assignment Editor.qase" 1 { { 0 "S_SEVEN_SEGMENT_2_OUT\[5\]" } } } } { "HD_ADPCM_Codec.vhd" "" { Text "D:/HD_ADPCM/HD_ADPCM_1Bit_Stereo_Decoder/HD_ADPCM_Codec.vhd" 14 -1 0 } } { "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" "" { S_SEVEN_SEGMENT_2_OUT[5] } "NODE_NAME" } }  } 0 0 "Pin %1!s! has %2!s! driving its datain port" 0 0 "" 0 -1} { "Info" "IFIOMGR_BIDIR_OR_OUTPUT_WITH_TRIVIAL_DATAIN_SUB" "S_SEVEN_SEGMENT_2_OUT\[6\] VCC " "Info: Pin S_SEVEN_SEGMENT_2_OUT\[6\] has VCC driving its datain port" {  } { { "c:/altera/90/quartus/bin/pin_planner.ppl" "" { PinPlanner "c:/altera/90/quartus/bin/pin_planner.ppl" { S_SEVEN_SEGMENT_2_OUT[6] } } } { "c:/altera/90/quartus/bin/Assignment Editor.qase" "" { Assignment "c:/altera/90/quartus/bin/Assignment Editor.qase" 1 { { 0 "S_SEVEN_SEGMENT_2_OUT\[6\]" } } } } { "HD_ADPCM_Codec.vhd" "" { Text "D:/HD_ADPCM/HD_ADPCM_1Bit_Stereo_Decoder/HD_ADPCM_Codec.vhd" 14 -1 0 } } { "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" "" { S_SEVEN_SEGMENT_2_OUT[6] } "NODE_NAME" } }  } 0 0 "Pin %1!s! has %2!s! driving its datain port" 0 0 "" 0 -1} { "Info" "IFIOMGR_BIDIR_OR_OUTPUT_WITH_TRIVIAL_DATAIN_SUB" "S_SEVEN_SEGMENT_3_OUT\[0\] GND " "Info: Pin S_SEVEN_SEGMENT_3_OUT\[0\] has GND driving its datain port" {  } { { "c:/altera/90/quartus/bin/pin_planner.ppl" "" { PinPlanner "c:/altera/90/quartus/bin/pin_planner.ppl" { S_SEVEN_SEGMENT_3_OUT[0] } } } { "c:/altera/90/quartus/bin/Assignment Editor.qase" "" { Assignment "c:/altera/90/quartus/bin/Assignment Editor.qase" 1 { { 0 "S_SEVEN_SEGMENT_3_OUT\[0\]" } } } } { "HD_ADPCM_Codec.vhd" "" { Text "D:/HD_ADPCM/HD_ADPCM_1Bit_Stereo_Decoder/HD_ADPCM_Codec.vhd" 15 -1 0 } } { "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" "" { S_SEVEN_SEGMENT_3_OUT[0] } "NODE_NAME" } }  } 0 0 "Pin %1!s! has %2!s! driving its datain port" 0 0 "" 0 -1} { "Info" "IFIOMGR_BIDIR_OR_OUTPUT_WITH_TRIVIAL_DATAIN_SUB" "S_SEVEN_SEGMENT_3_OUT\[1\] GND " "Info: Pin S_SEVEN_SEGMENT_3_OUT\[1\] has GND driving its datain port" {  } { { "c:/altera/90/quartus/bin/pin_planner.ppl" "" { PinPlanner "c:/altera/90/quartus/bin/pin_planner.ppl" { S_SEVEN_SEGMENT_3_OUT[1] } } } { "c:/altera/90/quartus/bin/Assignment Editor.qase" "" { Assignment "c:/altera/90/quartus/bin/Assignment Editor.qase" 1 { { 0 "S_SEVEN_SEGMENT_3_OUT\[1\]" } } } } { "HD_ADPCM_Codec.vhd" "" { Text "D:/HD_ADPCM/HD_ADPCM_1Bit_Stereo_Decoder/HD_ADPCM_Codec.vhd" 15 -1 0 } } { "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" "" { S_SEVEN_SEGMENT_3_OUT[1] } "NODE_NAME" } }  } 0 0 "Pin %1!s! has %2!s! driving its datain port" 0 0 "" 0 -1} { "Info" "IFIOMGR_BIDIR_OR_OUTPUT_WITH_TRIVIAL_DATAIN_SUB" "S_SEVEN_SEGMENT_3_OUT\[2\] GND " "Info: Pin S_SEVEN_SEGMENT_3_OUT\[2\] has GND driving its datain port" {  } { { "c:/altera/90/quartus/bin/pin_planner.ppl" "" { PinPlanner "c:/altera/90/quartus/bin/pin_planner.ppl" { S_SEVEN_SEGMENT_3_OUT[2] } } } { "c:/altera/90/quartus/bin/Assignment Editor.qase" "" { Assignment "c:/altera/90/quartus/bin/Assignment Editor.qase" 1 { { 0 "S_SEVEN_SEGMENT_3_OUT\[2\]" } } } } { "HD_ADPCM_Codec.vhd" "" { Text "D:/HD_ADPCM/HD_ADPCM_1Bit_Stereo_Decoder/HD_ADPCM_Codec.vhd" 15 -1 0 } } { "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" "" { S_SEVEN_SEGMENT_3_OUT[2] } "NODE_NAME" } }  } 0 0 "Pin %1!s! has %2!s! driving its datain port" 0 0 "" 0 -1} { "Info" "IFIOMGR_BIDIR_OR_OUTPUT_WITH_TRIVIAL_DATAIN_SUB" "S_SEVEN_SEGMENT_3_OUT\[3\] GND " "Info: Pin S_SEVEN_SEGMENT_3_OUT\[3\] has GND driving its datain port" {  } { { "c:/altera/90/quartus/bin/pin_planner.ppl" "" { PinPlanner "c:/altera/90/quartus/bin/pin_planner.ppl" { S_SEVEN_SEGMENT_3_OUT[3] } } } { "c:/altera/90/quartus/bin/Assignment Editor.qase" "" { Assignment "c:/altera/90/quartus/bin/Assignment Editor.qase" 1 { { 0 "S_SEVEN_SEGMENT_3_OUT\[3\]" } } } } { "HD_ADPCM_Codec.vhd" "" { Text "D:/HD_ADPCM/HD_ADPCM_1Bit_Stereo_Decoder/HD_ADPCM_Codec.vhd" 15 -1 0 } } { "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" "" { S_SEVEN_SEGMENT_3_OUT[3] } "NODE_NAME" } }  } 0 0 "Pin %1!s! has %2!s! driving its datain port" 0 0 "" 0 -1} { "Info" "IFIOMGR_BIDIR_OR_OUTPUT_WITH_TRIVIAL_DATAIN_SUB" "S_SEVEN_SEGMENT_3_OUT\[4\] GND " "Info: Pin S_SEVEN_SEGMENT_3_OUT\[4\] has GND driving its datain port" {  } { { "c:/altera/90/quartus/bin/pin_planner.ppl" "" { PinPlanner "c:/altera/90/quartus/bin/pin_planner.ppl" { S_SEVEN_SEGMENT_3_OUT[4] } } } { "c:/altera/90/quartus/bin/Assignment Editor.qase" "" { Assignment "c:/altera/90/quartus/bin/Assignment Editor.qase" 1 { { 0 "S_SEVEN_SEGMENT_3_OUT\[4\]" } } } } { "HD_ADPCM_Codec.vhd" "" { Text "D:/HD_ADPCM/HD_ADPCM_1Bit_Stereo_Decoder/HD_ADPCM_Codec.vhd" 15 -1 0 } } { "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" "" { S_SEVEN_SEGMENT_3_OUT[4] } "NODE_NAME" } }  } 0 0 "Pin %1!s! has %2!s! driving its datain port" 0 0 "" 0 -1} { "Info" "IFIOMGR_BIDIR_OR_OUTPUT_WITH_TRIVIAL_DATAIN_SUB" "S_SEVEN_SEGMENT_3_OUT\[5\] GND " "Info: Pin S_SEVEN_SEGMENT_3_OUT\[5\] has GND driving its datain port" {  } { { "c:/altera/90/quartus/bin/pin_planner.ppl" "" { PinPlanner "c:/altera/90/quartus/bin/pin_planner.ppl" { S_SEVEN_SEGMENT_3_OUT[5] } } } { "c:/altera/90/quartus/bin/Assignment Editor.qase" "" { Assignment "c:/altera/90/quartus/bin/Assignment Editor.qase" 1 { { 0 "S_SEVEN_SEGMENT_3_OUT\[5\]" } } } } { "HD_ADPCM_Codec.vhd" "" { Text "D:/HD_ADPCM/HD_ADPCM_1Bit_Stereo_Decoder/HD_ADPCM_Codec.vhd" 15 -1 0 } } { "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" "" { S_SEVEN_SEGMENT_3_OUT[5] } "NODE_NAME" } }  } 0 0 "Pin %1!s! has %2!s! driving its datain port" 0 0 "" 0 -1} { "Info" "IFIOMGR_BIDIR_OR_OUTPUT_WITH_TRIVIAL_DATAIN_SUB" "S_SEVEN_SEGMENT_3_OUT\[6\] VCC " "Info: Pin S_SEVEN_SEGMENT_3_OUT\[6\] has VCC driving its datain port" {  } { { "c:/altera/90/quartus/bin/pin_planner.ppl" "" { PinPlanner "c:/altera/90/quartus/bin/pin_planner.ppl" { S_SEVEN_SEGMENT_3_OUT[6] } } } { "c:/altera/90/quartus/bin/Assignment Editor.qase" "" { Assignment "c:/altera/90/quartus/bin/Assignment Editor.qase" 1 { { 0 "S_SEVEN_SEGMENT_3_OUT\[6\]" } } } } { "HD_ADPCM_Codec.vhd" "" { Text "D:/HD_ADPCM/HD_ADPCM_1Bit_Stereo_Decoder/HD_ADPCM_Codec.vhd" 15 -1 0 } } { "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" "" { S_SEVEN_SEGMENT_3_OUT[6] } "NODE_NAME" } }  } 0 0 "Pin %1!s! has %2!s! driving its datain port" 0 0 "" 0 -1} { "Info" "IFIOMGR_BIDIR_OR_OUTPUT_WITH_TRIVIAL_DATAIN_SUB" "S_SEVEN_SEGMENT_4_OUT\[0\] GND " "Info: Pin S_SEVEN_SEGMENT_4_OUT\[0\] has GND driving its datain port" {  } { { "c:/altera/90/quartus/bin/pin_planner.ppl" "" { PinPlanner "c:/altera/90/quartus/bin/pin_planner.ppl" { S_SEVEN_SEGMENT_4_OUT[0] } } } { "c:/altera/90/quartus/bin/Assignment Editor.qase" "" { Assignment "c:/altera/90/quartus/bin/Assignment Editor.qase" 1 { { 0 "S_SEVEN_SEGMENT_4_OUT\[0\]" } } } } { "HD_ADPCM_Codec.vhd" "" { Text "D:/HD_ADPCM/HD_ADPCM_1Bit_Stereo_Decoder/HD_ADPCM_Codec.vhd" 16 -1 0 } } { "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" "" { S_SEVEN_SEGMENT_4_OUT[0] } "NODE_NAME" } }  } 0 0 "Pin %1!s! has %2!s! driving its datain port" 0 0 "" 0 -1} { "Info" "IFIOMGR_BIDIR_OR_OUTPUT_WITH_TRIVIAL_DATAIN_SUB" "S_SEVEN_SEGMENT_4_OUT\[1\] GND " "Info: Pin S_SEVEN_SEGMENT_4_OUT\[1\] has GND driving its datain port" {  } { { "c:/altera/90/quartus/bin/pin_planner.ppl" "" { PinPlanner "c:/altera/90/quartus/bin/pin_planner.ppl" { S_SEVEN_SEGMENT_4_OUT[1] } } } { "c:/altera/90/quartus/bin/Assignment Editor.qase" "" { Assignment "c:/altera/90/quartus/bin/Assignment Editor.qase" 1 { { 0 "S_SEVEN_SEGMENT_4_OUT\[1\]" } } } } { "HD_ADPCM_Codec.vhd" "" { Text "D:/HD_ADPCM/HD_ADPCM_1Bit_Stereo_Decoder/HD_ADPCM_Codec.vhd" 16 -1 0 } } { "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" "" { S_SEVEN_SEGMENT_4_OUT[1] } "NODE_NAME" } }  } 0 0 "Pin %1!s! has %2!s! driving its datain port" 0 0 "" 0 -1} { "Info" "IFIOMGR_BIDIR_OR_OUTPUT_WITH_TRIVIAL_DATAIN_SUB" "S_SEVEN_SEGMENT_4_OUT\[2\] GND " "Info: Pin S_SEVEN_SEGMENT_4_OUT\[2\] has GND driving its datain port" {  } { { "c:/altera/90/quartus/bin/pin_planner.ppl" "" { PinPlanner "c:/altera/90/quartus/bin/pin_planner.ppl" { S_SEVEN_SEGMENT_4_OUT[2] } } } { "c:/altera/90/quartus/bin/Assignment Editor.qase" "" { Assignment "c:/altera/90/quartus/bin/Assignment Editor.qase" 1 { { 0 "S_SEVEN_SEGMENT_4_OUT\[2\]" } } } } { "HD_ADPCM_Codec.vhd" "" { Text "D:/HD_ADPCM/HD_ADPCM_1Bit_Stereo_Decoder/HD_ADPCM_Codec.vhd" 16 -1 0 } } { "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" "" { S_SEVEN_SEGMENT_4_OUT[2] } "NODE_NAME" } }  } 0 0 "Pin %1!s! has %2!s! driving its datain port" 0 0 "" 0 -1} { "Info" "IFIOMGR_BIDIR_OR_OUTPUT_WITH_TRIVIAL_DATAIN_SUB" "S_SEVEN_SEGMENT_4_OUT\[3\] GND " "Info: Pin S_SEVEN_SEGMENT_4_OUT\[3\] has GND driving its datain port" {  } { { "c:/altera/90/quartus/bin/pin_planner.ppl" "" { PinPlanner "c:/altera/90/quartus/bin/pin_planner.ppl" { S_SEVEN_SEGMENT_4_OUT[3] } } } { "c:/altera/90/quartus/bin/Assignment Editor.qase" "" { Assignment "c:/altera/90/quartus/bin/Assignment Editor.qase" 1 { { 0 "S_SEVEN_SEGMENT_4_OUT\[3\]" } } } } { "HD_ADPCM_Codec.vhd" "" { Text "D:/HD_ADPCM/HD_ADPCM_1Bit_Stereo_Decoder/HD_ADPCM_Codec.vhd" 16 -1 0 } } { "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" "" { S_SEVEN_SEGMENT_4_OUT[3] } "NODE_NAME" } }  } 0 0 "Pin %1!s! has %2!s! driving its datain port" 0 0 "" 0 -1} { "Info" "IFIOMGR_BIDIR_OR_OUTPUT_WITH_TRIVIAL_DATAIN_SUB" "S_SEVEN_SEGMENT_4_OUT\[4\] GND " "Info: Pin S_SEVEN_SEGMENT_4_OUT\[4\] has GND driving its datain port" {  } { { "c:/altera/90/quartus/bin/pin_planner.ppl" "" { PinPlanner "c:/altera/90/quartus/bin/pin_planner.ppl" { S_SEVEN_SEGMENT_4_OUT[4] } } } { "c:/altera/90/quartus/bin/Assignment Editor.qase" "" { Assignment "c:/altera/90/quartus/bin/Assignment Editor.qase" 1 { { 0 "S_SEVEN_SEGMENT_4_OUT\[4\]" } } } } { "HD_ADPCM_Codec.vhd" "" { Text "D:/HD_ADPCM/HD_ADPCM_1Bit_Stereo_Decoder/HD_ADPCM_Codec.vhd" 16 -1 0 } } { "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" "" { S_SEVEN_SEGMENT_4_OUT[4] } "NODE_NAME" } }  } 0 0 "Pin %1!s! has %2!s! driving its datain port" 0 0 "" 0 -1} { "Info" "IFIOMGR_BIDIR_OR_OUTPUT_WITH_TRIVIAL_DATAIN_SUB" "S_SEVEN_SEGMENT_4_OUT\[5\] GND " "Info: Pin S_SEVEN_SEGMENT_4_OUT\[5\] has GND driving its datain port" {  } { { "c:/altera/90/quartus/bin/pin_planner.ppl" "" { PinPlanner "c:/altera/90/quartus/bin/pin_planner.ppl" { S_SEVEN_SEGMENT_4_OUT[5] } } } { "c:/altera/90/quartus/bin/Assignment Editor.qase" "" { Assignment "c:/altera/90/quartus/bin/Assignment Editor.qase" 1 { { 0 "S_SEVEN_SEGMENT_4_OUT\[5\]" } } } } { "HD_ADPCM_Codec.vhd" "" { Text "D:/HD_ADPCM/HD_ADPCM_1Bit_Stereo_Decoder/HD_ADPCM_Codec.vhd" 16 -1 0 } } { "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" "" { S_SEVEN_SEGMENT_4_OUT[5] } "NODE_NAME" } }  } 0 0 "Pin %1!s! has %2!s! driving its datain port" 0 0 "" 0 -1} { "Info" "IFIOMGR_BIDIR_OR_OUTPUT_WITH_TRIVIAL_DATAIN_SUB" "S_SEVEN_SEGMENT_4_OUT\[6\] VCC " "Info: Pin S_SEVEN_SEGMENT_4_OUT\[6\] has VCC driving its datain port" {  } { { "c:/altera/90/quartus/bin/pin_planner.ppl" "" { PinPlanner "c:/altera/90/quartus/bin/pin_planner.ppl" { S_SEVEN_SEGMENT_4_OUT[6] } } } { "c:/altera/90/quartus/bin/Assignment Editor.qase" "" { Assignment "c:/altera/90/quartus/bin/Assignment Editor.qase" 1 { { 0 "S_SEVEN_SEGMENT_4_OUT\[6\]" } } } } { "HD_ADPCM_Codec.vhd" "" { Text "D:/HD_ADPCM/HD_ADPCM_1Bit_Stereo_Decoder/HD_ADPCM_Codec.vhd" 16 -1 0 } } { "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" "" { S_SEVEN_SEGMENT_4_OUT[6] } "NODE_NAME" } }  } 0 0 "Pin %1!s! has %2!s! driving its datain port" 0 0 "" 0 -1} { "Info" "IFIOMGR_BIDIR_OR_OUTPUT_WITH_TRIVIAL_DATAIN_SUB" "FLASH_MEMORY_nWE_OUT VCC " "Info: Pin FLASH_MEMORY_nWE_OUT has VCC driving its datain port" {  } { { "c:/altera/90/quartus/bin/pin_planner.ppl" "" { PinPlanner "c:/altera/90/quartus/bin/pin_planner.ppl" { FLASH_MEMORY_nWE_OUT } } } { "c:/altera/90/quartus/bin/Assignment Editor.qase" "" { Assignment "c:/altera/90/quartus/bin/Assignment Editor.qase" 1 { { 0 "FLASH_MEMORY_nWE_OUT" } } } } { "HD_ADPCM_Codec.vhd" "" { Text "D:/HD_ADPCM/HD_ADPCM_1Bit_Stereo_Decoder/HD_ADPCM_Codec.vhd" 29 -1 0 } } { "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" "" { FLASH_MEMORY_nWE_OUT } "NODE_NAME" } }  } 0 0 "Pin %1!s! has %2!s! driving its datain port" 0 0 "" 0 -1} { "Info" "IFIOMGR_BIDIR_OR_OUTPUT_WITH_TRIVIAL_DATAIN_SUB" "FLASH_MEMORY_nRESET_OUT VCC " "Info: Pin FLASH_MEMORY_nRESET_OUT has VCC driving its datain port" {  } { { "c:/altera/90/quartus/bin/pin_planner.ppl" "" { PinPlanner "c:/altera/90/quartus/bin/pin_planner.ppl" { FLASH_MEMORY_nRESET_OUT } } } { "c:/altera/90/quartus/bin/Assignment Editor.qase" "" { Assignment "c:/altera/90/quartus/bin/Assignment Editor.qase" 1 { { 0 "FLASH_MEMORY_nRESET_OUT" } } } } { "HD_ADPCM_Codec.vhd" "" { Text "D:/HD_ADPCM/HD_ADPCM_1Bit_Stereo_Decoder/HD_ADPCM_Codec.vhd" 31 -1 0 } } { "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" "" { FLASH_MEMORY_nRESET_OUT } "NODE_NAME" } }  } 0 0 "Pin %1!s! has %2!s! driving its datain port" 0 0 "" 0 -1}  } {  } 0 0 "Following %1!d! pins have nothing, GND, or VCC driving datain port -- changes to this connectivity may change fitting results" 0 0 "" 0 -1}
42 
{ "Info" "IQEXE_ERROR_COUNT" "Fitter 0 s 4 s Quartus II " "Info: Quartus II Fitter was successful. 0 errors, 4 warnings" { { "Info" "IQEXE_END_PEAK_VSIZE_MEMORY" "211 " "Info: Peak virtual memory: 211 megabytes" {  } {  } 0 0 "Peak virtual memory: %1!s! megabytes" 0 0 "" 0 -1} { "Info" "IQEXE_END_BANNER_TIME" "Tue May 11 23:49:54 2010 " "Info: Processing ended: Tue May 11 23:49:54 2010" {  } {  } 0 0 "Processing ended: %1!s!" 0 0 "" 0 -1} { "Info" "IQEXE_ELAPSED_TIME" "00:00:17 " "Info: Elapsed time: 00:00:17" {  } {  } 0 0 "Elapsed time: %1!s!" 0 0 "" 0 -1} { "Info" "IQEXE_ELAPSED_CPU_TIME" "00:00:17 " "Info: Total CPU time (on all processors): 00:00:17" {  } {  } 0 0 "Total CPU time (on all processors): %1!s!" 0 0 "" 0 -1}  } {  } 0 0 "%6!s! %1!s! was successful. %2!d! error%3!s!, %4!d! warning%5!s!" 0 0 "" 0 -1}

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