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--lpm_divide DEVICE_FAMILY="Cyclone II" LPM_DREPRESENTATION="UNSIGNED" LPM_NREPRESENTATION="UNSIGNED" LPM_WIDTHD=7 LPM_WIDTHN=20 OPTIMIZE_FOR_SPEED=1 denom numer quotient CARRY_CHAIN="MANUAL" CARRY_CHAIN_LENGTH=48 IGNORE_CARRY_BUFFERS="OFF"

--VERSION_BEGIN 9.0 cbx_cycloneii 2008:05:19:10:57:37:SJ cbx_lpm_abs 2008:05:19:10:51:43:SJ cbx_lpm_add_sub 2008:12:09:22:11:50:SJ cbx_lpm_divide 2008:05:21:18:11:28:SJ cbx_mgl 2009:01:29:16:12:07:SJ cbx_stratix 2008:09:18:16:08:35:SJ cbx_stratixii 2008:11:14:16:08:42:SJ cbx_util_mgl 2008:11:21:14:58:47:SJ  VERSION_END

-- Copyright (C) 1991-2009 Altera Corporation

--  Your use of Altera Corporation's design tools, logic functions

--  and other software and tools, and its AMPP partner logic

--  functions, and any output files from any of the foregoing

--  (including device programming or simulation files), and any

--  associated documentation or information are expressly subject

--  to the terms and conditions of the Altera Program License

--  Subscription Agreement, Altera MegaCore Function License

--  Agreement, or other applicable license agreement, including,

--  without limitation, that your use is for the sole purpose of

--  programming logic devices manufactured by Altera and sold by

--  Altera or its authorized distributors.  Please refer to the

--  applicable agreement for further details.

FUNCTION sign_div_unsign_klh (denominator[6..0], numerator[19..0])

RETURNS ( quotient[19..0], remainder[6..0]);

--synthesis_resources = lut 147

SUBDESIGN lpm_divide_aem

(

        denom[6..0]     :       input;

        numer[19..0]    :       input;

        quotient[19..0] :       output;

        remain[6..0]    :       output;

)

VARIABLE

        divider : sign_div_unsign_klh;

        numer_tmp[19..0]        : WIRE;

BEGIN

        divider.denominator[] = denom[];

        divider.numerator[] = numer_tmp[];

        numer_tmp[] = numer[];

        quotient[] = divider.quotient[];

        remain[] = divider.remainder[];

END;

--VALID FILE