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[/] [audio/] [trunk/] [HD_ADPCM/] [HD_ADPCM_1Bit_Stereo_Decoder/] [db/] [prev_cmp_HD_ADPCM_Codec.qmsg] - Blame information for rev 6

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1 6 ashematian 
{ "Info" "IQEXE_SEPARATOR" "" "Info: *******************************************************************" {  } {  } 3 0 "*******************************************************************" 0 0 "" 0 -1}
2 
{ "Info" "IQEXE_START_BANNER_PRODUCT" "Analysis & Synthesis Quartus II " "Info: Running Quartus II Analysis & Synthesis" { { "Info" "IQEXE_START_BANNER_VERSION" "Version 9.0 Build 132 02/25/2009 SJ Web Edition " "Info: Version 9.0 Build 132 02/25/2009 SJ Web Edition" {  } {  } 0 0 "%1!s!" 0 0 "" 0 -1} { "Info" "IQEXE_START_BANNER_TIME" "Tue May 11 23:47:12 2010 " "Info: Processing started: Tue May 11 23:47:12 2010" {  } {  } 0 0 "Processing started: %1!s!" 0 0 "" 0 -1}  } {  } 4 0 "Running %2!s! %1!s!" 0 0 "" 0 -1}
3 
{ "Info" "IQEXE_START_BANNER_COMMANDLINE" "quartus_map --read_settings_files=on --write_settings_files=off HD_ADPCM_Codec -c HD_ADPCM_Codec " "Info: Command: quartus_map --read_settings_files=on --write_settings_files=off HD_ADPCM_Codec -c HD_ADPCM_Codec" {  } {  } 0 0 "Command: %1!s!" 0 0 "" 0 -1}
4 
{ "Info" "ISGN_NUM_OF_DESIGN_UNITS_AND_ENTITIES" "HD_ADPCM_Codec.vhd 14 7 " "Info: Found 14 design units, including 7 entities, in source file HD_ADPCM_Codec.vhd" { { "Info" "ISGN_DESIGN_UNIT_NAME" "1 HD_ADPCM_Codec-HD_ADPCM_Codec_Function " "Info: Found design unit 1: HD_ADPCM_Codec-HD_ADPCM_Codec_Function" {  } { { "HD_ADPCM_Codec.vhd" "" { Text "D:/HD_ADPCM/HD_ADPCM_1Bit_Stereo_Decoder/HD_ADPCM_Codec.vhd" 38 -1 0 } }  } 0 0 "Found design unit %1!d!: %2!s!" 0 0 "" 0 -1} { "Info" "ISGN_DESIGN_UNIT_NAME" "2 SevenSegments_Driver-HD_ADPCM_Codec_Function " "Info: Found design unit 2: SevenSegments_Driver-HD_ADPCM_Codec_Function" {  } { { "HD_ADPCM_Codec.vhd" "" { Text "D:/HD_ADPCM/HD_ADPCM_1Bit_Stereo_Decoder/HD_ADPCM_Codec.vhd" 333 -1 0 } }  } 0 0 "Found design unit %1!d!: %2!s!" 0 0 "" 0 -1} { "Info" "ISGN_DESIGN_UNIT_NAME" "3 LEDs_Bar_Driver-HD_ADPCM_Codec_Function " "Info: Found design unit 3: LEDs_Bar_Driver-HD_ADPCM_Codec_Function" {  } { { "HD_ADPCM_Codec.vhd" "" { Text "D:/HD_ADPCM/HD_ADPCM_1Bit_Stereo_Decoder/HD_ADPCM_Codec.vhd" 403 -1 0 } }  } 0 0 "Found design unit %1!d!: %2!s!" 0 0 "" 0 -1} { "Info" "ISGN_DESIGN_UNIT_NAME" "4 I2C_Driver-HD_ADPCM_Codec_Function " "Info: Found design unit 4: I2C_Driver-HD_ADPCM_Codec_Function" {  } { { "HD_ADPCM_Codec.vhd" "" { Text "D:/HD_ADPCM/HD_ADPCM_1Bit_Stereo_Decoder/HD_ADPCM_Codec.vhd" 451 -1 0 } }  } 0 0 "Found design unit %1!d!: %2!s!" 0 0 "" 0 -1} { "Info" "ISGN_DESIGN_UNIT_NAME" "5 I2S_Driver-HD_ADPCM_Codec_Function " "Info: Found design unit 5: I2S_Driver-HD_ADPCM_Codec_Function" {  } { { "HD_ADPCM_Codec.vhd" "" { Text "D:/HD_ADPCM/HD_ADPCM_1Bit_Stereo_Decoder/HD_ADPCM_Codec.vhd" 695 -1 0 } }  } 0 0 "Found design unit %1!d!: %2!s!" 0 0 "" 0 -1} { "Info" "ISGN_DESIGN_UNIT_NAME" "6 Flash_Memory_Driver-HD_ADPCM_Codec_Function " "Info: Found design unit 6: Flash_Memory_Driver-HD_ADPCM_Codec_Function" {  } { { "HD_ADPCM_Codec.vhd" "" { Text "D:/HD_ADPCM/HD_ADPCM_1Bit_Stereo_Decoder/HD_ADPCM_Codec.vhd" 825 -1 0 } }  } 0 0 "Found design unit %1!d!: %2!s!" 0 0 "" 0 -1} { "Info" "ISGN_DESIGN_UNIT_NAME" "7 ADPCM_Decoder_1_Bit-HD_ADPCM_Codec_Function " "Info: Found design unit 7: ADPCM_Decoder_1_Bit-HD_ADPCM_Codec_Function" {  } { { "HD_ADPCM_Codec.vhd" "" { Text "D:/HD_ADPCM/HD_ADPCM_1Bit_Stereo_Decoder/HD_ADPCM_Codec.vhd" 910 -1 0 } }  } 0 0 "Found design unit %1!d!: %2!s!" 0 0 "" 0 -1} { "Info" "ISGN_ENTITY_NAME" "1 HD_ADPCM_Codec " "Info: Found entity 1: HD_ADPCM_Codec" {  } { { "HD_ADPCM_Codec.vhd" "" { Text "D:/HD_ADPCM/HD_ADPCM_1Bit_Stereo_Decoder/HD_ADPCM_Codec.vhd" 10 -1 0 } }  } 0 0 "Found entity %1!d!: %2!s!" 0 0 "" 0 -1} { "Info" "ISGN_ENTITY_NAME" "2 SevenSegments_Driver " "Info: Found entity 2: SevenSegments_Driver" {  } { { "HD_ADPCM_Codec.vhd" "" { Text "D:/HD_ADPCM/HD_ADPCM_1Bit_Stereo_Decoder/HD_ADPCM_Codec.vhd" 325 -1 0 } }  } 0 0 "Found entity %1!d!: %2!s!" 0 0 "" 0 -1} { "Info" "ISGN_ENTITY_NAME" "3 LEDs_Bar_Driver " "Info: Found entity 3: LEDs_Bar_Driver" {  } { { "HD_ADPCM_Codec.vhd" "" { Text "D:/HD_ADPCM/HD_ADPCM_1Bit_Stereo_Decoder/HD_ADPCM_Codec.vhd" 395 -1 0 } }  } 0 0 "Found entity %1!d!: %2!s!" 0 0 "" 0 -1} { "Info" "ISGN_ENTITY_NAME" "4 I2C_Driver " "Info: Found entity 4: I2C_Driver" {  } { { "HD_ADPCM_Codec.vhd" "" { Text "D:/HD_ADPCM/HD_ADPCM_1Bit_Stereo_Decoder/HD_ADPCM_Codec.vhd" 439 -1 0 } }  } 0 0 "Found entity %1!d!: %2!s!" 0 0 "" 0 -1} { "Info" "ISGN_ENTITY_NAME" "5 I2S_Driver " "Info: Found entity 5: I2S_Driver" {  } { { "HD_ADPCM_Codec.vhd" "" { Text "D:/HD_ADPCM/HD_ADPCM_1Bit_Stereo_Decoder/HD_ADPCM_Codec.vhd" 682 -1 0 } }  } 0 0 "Found entity %1!d!: %2!s!" 0 0 "" 0 -1} { "Info" "ISGN_ENTITY_NAME" "6 Flash_Memory_Driver " "Info: Found entity 6: Flash_Memory_Driver" {  } { { "HD_ADPCM_Codec.vhd" "" { Text "D:/HD_ADPCM/HD_ADPCM_1Bit_Stereo_Decoder/HD_ADPCM_Codec.vhd" 808 -1 0 } }  } 0 0 "Found entity %1!d!: %2!s!" 0 0 "" 0 -1} { "Info" "ISGN_ENTITY_NAME" "7 ADPCM_Decoder_1_Bit " "Info: Found entity 7: ADPCM_Decoder_1_Bit" {  } { { "HD_ADPCM_Codec.vhd" "" { Text "D:/HD_ADPCM/HD_ADPCM_1Bit_Stereo_Decoder/HD_ADPCM_Codec.vhd" 900 -1 0 } }  } 0 0 "Found entity %1!d!: %2!s!" 0 0 "" 0 -1}  } {  } 0 0 "Found %2!llu! design units, including %3!llu! entities, in source file %1!s!" 0 0 "" 0 -1}
5 
{ "Info" "ISGN_START_ELABORATION_TOP" "HD_ADPCM_Codec " "Info: Elaborating entity \"HD_ADPCM_Codec\" for the top level hierarchy" {  } {  } 0 0 "Elaborating entity \"%1!s!\" for the top level hierarchy" 0 0 "" 0 -1}
6 
{ "Warning" "WVRFX_VHDL_USED_IMPLICIT_DEFAULT_VALUE" "Seven_Segment_Digit1 HD_ADPCM_Codec.vhd(103) " "Warning (10541): VHDL Signal Declaration warning at HD_ADPCM_Codec.vhd(103): used implicit default value for signal \"Seven_Segment_Digit1\" because signal was never assigned a value or an explicit default value. Use of implicit default value may introduce unintended design optimizations." {  } { { "HD_ADPCM_Codec.vhd" "" { Text "D:/HD_ADPCM/HD_ADPCM_1Bit_Stereo_Decoder/HD_ADPCM_Codec.vhd" 103 0 0 } }  } 0 10541 "VHDL Signal Declaration warning at %2!s!: used implicit default value for signal \"%1!s!\" because signal was never assigned a value or an explicit default value. Use of implicit default value may introduce unintended design optimizations." 0 0 "" 0 -1}
7 
{ "Warning" "WVRFX_VHDL_USED_IMPLICIT_DEFAULT_VALUE" "Seven_Segment_Digit2 HD_ADPCM_Codec.vhd(104) " "Warning (10541): VHDL Signal Declaration warning at HD_ADPCM_Codec.vhd(104): used implicit default value for signal \"Seven_Segment_Digit2\" because signal was never assigned a value or an explicit default value. Use of implicit default value may introduce unintended design optimizations." {  } { { "HD_ADPCM_Codec.vhd" "" { Text "D:/HD_ADPCM/HD_ADPCM_1Bit_Stereo_Decoder/HD_ADPCM_Codec.vhd" 104 0 0 } }  } 0 10541 "VHDL Signal Declaration warning at %2!s!: used implicit default value for signal \"%1!s!\" because signal was never assigned a value or an explicit default value. Use of implicit default value may introduce unintended design optimizations." 0 0 "" 0 -1}
8 
{ "Warning" "WVRFX_VHDL_USED_IMPLICIT_DEFAULT_VALUE" "Seven_Segment_Digit3 HD_ADPCM_Codec.vhd(105) " "Warning (10541): VHDL Signal Declaration warning at HD_ADPCM_Codec.vhd(105): used implicit default value for signal \"Seven_Segment_Digit3\" because signal was never assigned a value or an explicit default value. Use of implicit default value may introduce unintended design optimizations." {  } { { "HD_ADPCM_Codec.vhd" "" { Text "D:/HD_ADPCM/HD_ADPCM_1Bit_Stereo_Decoder/HD_ADPCM_Codec.vhd" 105 0 0 } }  } 0 10541 "VHDL Signal Declaration warning at %2!s!: used implicit default value for signal \"%1!s!\" because signal was never assigned a value or an explicit default value. Use of implicit default value may introduce unintended design optimizations." 0 0 "" 0 -1}
9 
{ "Warning" "WVRFX_VHDL_USED_IMPLICIT_DEFAULT_VALUE" "Seven_Segment_Digit4 HD_ADPCM_Codec.vhd(106) " "Warning (10541): VHDL Signal Declaration warning at HD_ADPCM_Codec.vhd(106): used implicit default value for signal \"Seven_Segment_Digit4\" because signal was never assigned a value or an explicit default value. Use of implicit default value may introduce unintended design optimizations." {  } { { "HD_ADPCM_Codec.vhd" "" { Text "D:/HD_ADPCM/HD_ADPCM_1Bit_Stereo_Decoder/HD_ADPCM_Codec.vhd" 106 0 0 } }  } 0 10541 "VHDL Signal Declaration warning at %2!s!: used implicit default value for signal \"%1!s!\" because signal was never assigned a value or an explicit default value. Use of implicit default value may introduce unintended design optimizations." 0 0 "" 0 -1}
10 
{ "Warning" "WVRFX_VHDL_USED_EXPLICIT_DEFAULT_VALUE" "I2C_SLAVE_ADDRESS HD_ADPCM_Codec.vhd(127) " "Warning (10540): VHDL Signal Declaration warning at HD_ADPCM_Codec.vhd(127): used explicit default value for signal \"I2C_SLAVE_ADDRESS\" because signal was never assigned a value" {  } { { "HD_ADPCM_Codec.vhd" "" { Text "D:/HD_ADPCM/HD_ADPCM_1Bit_Stereo_Decoder/HD_ADPCM_Codec.vhd" 127 0 0 } }  } 0 10540 "VHDL Signal Declaration warning at %2!s!: used explicit default value for signal \"%1!s!\" because signal was never assigned a value" 0 0 "" 0 -1}
11 
{ "Warning" "WVRFX_VHDL_USED_EXPLICIT_DEFAULT_VALUE" "FLASH_MEMORY_ACTIVE HD_ADPCM_Codec.vhd(158) " "Warning (10540): VHDL Signal Declaration warning at HD_ADPCM_Codec.vhd(158): used explicit default value for signal \"FLASH_MEMORY_ACTIVE\" because signal was never assigned a value" {  } { { "HD_ADPCM_Codec.vhd" "" { Text "D:/HD_ADPCM/HD_ADPCM_1Bit_Stereo_Decoder/HD_ADPCM_Codec.vhd" 158 0 0 } }  } 0 10540 "VHDL Signal Declaration warning at %2!s!: used explicit default value for signal \"%1!s!\" because signal was never assigned a value" 0 0 "" 0 -1}
12 
{ "Warning" "WVRFX_L2_HDL_OBJECT_ASSIGNED_NOT_READ" "FLASH_MEMORY_DATA_VALID HD_ADPCM_Codec.vhd(162) " "Warning (10036): Verilog HDL or VHDL warning at HD_ADPCM_Codec.vhd(162): object \"FLASH_MEMORY_DATA_VALID\" assigned a value but never read" {  } { { "HD_ADPCM_Codec.vhd" "" { Text "D:/HD_ADPCM/HD_ADPCM_1Bit_Stereo_Decoder/HD_ADPCM_Codec.vhd" 162 0 0 } }  } 0 10036 "Verilog HDL or VHDL warning at %2!s!: object \"%1!s!\" assigned a value but never read" 0 0 "" 0 -1}
13 
{ "Info" "ISGN_START_ELABORATION_HIERARCHY" "SevenSegments_Driver SevenSegments_Driver:u0 " "Info: Elaborating entity \"SevenSegments_Driver\" for hierarchy \"SevenSegments_Driver:u0\"" {  } { { "HD_ADPCM_Codec.vhd" "u0" { Text "D:/HD_ADPCM/HD_ADPCM_1Bit_Stereo_Decoder/HD_ADPCM_Codec.vhd" 172 0 0 } }  } 0 0 "Elaborating entity \"%1!s!\" for hierarchy \"%2!s!\"" 0 0 "" 0 -1}
14 
{ "Info" "ISGN_START_ELABORATION_HIERARCHY" "LEDs_Bar_Driver LEDs_Bar_Driver:u1 " "Info: Elaborating entity \"LEDs_Bar_Driver\" for hierarchy \"LEDs_Bar_Driver:u1\"" {  } { { "HD_ADPCM_Codec.vhd" "u1" { Text "D:/HD_ADPCM/HD_ADPCM_1Bit_Stereo_Decoder/HD_ADPCM_Codec.vhd" 173 0 0 } }  } 0 0 "Elaborating entity \"%1!s!\" for hierarchy \"%2!s!\"" 0 0 "" 0 -1}
15 
{ "Info" "ISGN_START_ELABORATION_HIERARCHY" "I2C_Driver I2C_Driver:u2 " "Info: Elaborating entity \"I2C_Driver\" for hierarchy \"I2C_Driver:u2\"" {  } { { "HD_ADPCM_Codec.vhd" "u2" { Text "D:/HD_ADPCM/HD_ADPCM_1Bit_Stereo_Decoder/HD_ADPCM_Codec.vhd" 174 0 0 } }  } 0 0 "Elaborating entity \"%1!s!\" for hierarchy \"%2!s!\"" 0 0 "" 0 -1}
16 
{ "Warning" "WVRFX_VHDL_USED_EXPLICIT_DEFAULT_VALUE" "I2C_Data_Stream HD_ADPCM_Codec.vhd(461) " "Warning (10540): VHDL Signal Declaration warning at HD_ADPCM_Codec.vhd(461): used explicit default value for signal \"I2C_Data_Stream\" because signal was never assigned a value" {  } { { "HD_ADPCM_Codec.vhd" "" { Text "D:/HD_ADPCM/HD_ADPCM_1Bit_Stereo_Decoder/HD_ADPCM_Codec.vhd" 461 0 0 } }  } 0 10540 "VHDL Signal Declaration warning at %2!s!: used explicit default value for signal \"%1!s!\" because signal was never assigned a value" 0 0 "" 0 -1}
17 
{ "Info" "ISGN_START_ELABORATION_HIERARCHY" "I2S_Driver I2S_Driver:u3 " "Info: Elaborating entity \"I2S_Driver\" for hierarchy \"I2S_Driver:u3\"" {  } { { "HD_ADPCM_Codec.vhd" "u3" { Text "D:/HD_ADPCM/HD_ADPCM_1Bit_Stereo_Decoder/HD_ADPCM_Codec.vhd" 175 0 0 } }  } 0 0 "Elaborating entity \"%1!s!\" for hierarchy \"%2!s!\"" 0 0 "" 0 -1}
18 
{ "Warning" "WVRFX_VHDL_USED_EXPLICIT_DEFAULT_VALUE" "I2S_Data_Stream HD_ADPCM_Codec.vhd(708) " "Warning (10540): VHDL Signal Declaration warning at HD_ADPCM_Codec.vhd(708): used explicit default value for signal \"I2S_Data_Stream\" because signal was never assigned a value" {  } { { "HD_ADPCM_Codec.vhd" "" { Text "D:/HD_ADPCM/HD_ADPCM_1Bit_Stereo_Decoder/HD_ADPCM_Codec.vhd" 708 0 0 } }  } 0 10540 "VHDL Signal Declaration warning at %2!s!: used explicit default value for signal \"%1!s!\" because signal was never assigned a value" 0 0 "" 0 -1}
19 
{ "Info" "ISGN_START_ELABORATION_HIERARCHY" "Flash_Memory_Driver Flash_Memory_Driver:u4 " "Info: Elaborating entity \"Flash_Memory_Driver\" for hierarchy \"Flash_Memory_Driver:u4\"" {  } { { "HD_ADPCM_Codec.vhd" "u4" { Text "D:/HD_ADPCM/HD_ADPCM_1Bit_Stereo_Decoder/HD_ADPCM_Codec.vhd" 176 0 0 } }  } 0 0 "Elaborating entity \"%1!s!\" for hierarchy \"%2!s!\"" 0 0 "" 0 -1}
20 
{ "Info" "ISGN_START_ELABORATION_HIERARCHY" "ADPCM_Decoder_1_Bit ADPCM_Decoder_1_Bit:u5 " "Info: Elaborating entity \"ADPCM_Decoder_1_Bit\" for hierarchy \"ADPCM_Decoder_1_Bit:u5\"" {  } { { "HD_ADPCM_Codec.vhd" "u5" { Text "D:/HD_ADPCM/HD_ADPCM_1Bit_Stereo_Decoder/HD_ADPCM_Codec.vhd" 177 0 0 } }  } 0 0 "Elaborating entity \"%1!s!\" for hierarchy \"%2!s!\"" 0 0 "" 0 -1}
21 
{ "Info" "IOPT_UNINFERRED_RAM_SUMMARY" "1 " "Info: Found 1 instances of uninferred RAM logic" { { "Info" "IOPT_RAM_UNINFERRED_DUE_TO_SIZE" "I2C_Register_Address_Stream " "Info: RAM logic \"I2C_Register_Address_Stream\" is uninferred due to inappropriate RAM size" {  } { { "HD_ADPCM_Codec.vhd" "I2C_Register_Address_Stream" { Text "D:/HD_ADPCM/HD_ADPCM_1Bit_Stereo_Decoder/HD_ADPCM_Codec.vhd" 143 -1 0 } }  } 0 0 "RAM logic \"%1!s!\" is uninferred due to inappropriate RAM size" 0 0 "" 0 -1}  } {  } 0 0 "Found %1!d! instances of uninferred RAM logic" 0 0 "" 0 -1}
22 
{ "Info" "ILPMS_INFERENCING_SUMMARY" "4 " "Info: Inferred 4 megafunctions from design logic" { { "Info" "ILPMS_LPM_MULT_INFERRED" "ADPCM_Decoder_1_Bit:u5\|Mult0 lpm_mult " "Info: Inferred multiplier megafunction (\"lpm_mult\") from the following logic: \"ADPCM_Decoder_1_Bit:u5\|Mult0\"" {  } { { "HD_ADPCM_Codec.vhd" "Mult0" { Text "D:/HD_ADPCM/HD_ADPCM_1Bit_Stereo_Decoder/HD_ADPCM_Codec.vhd" 947 -1 0 } }  } 0 0 "Inferred multiplier megafunction (\"%2!s!\") from the following logic: \"%1!s!\"" 0 0 "" 0 -1} { "Info" "ILPMS_LPM_DIVIDE_INFERRED" "ADPCM_Decoder_1_Bit:u5\|Div0 lpm_divide " "Info: Inferred divider/modulo megafunction (\"lpm_divide\") from the following logic: \"ADPCM_Decoder_1_Bit:u5\|Div0\"" {  } { { "HD_ADPCM_Codec.vhd" "Div0" { Text "D:/HD_ADPCM/HD_ADPCM_1Bit_Stereo_Decoder/HD_ADPCM_Codec.vhd" 947 -1 0 } }  } 0 0 "Inferred divider/modulo megafunction (\"%2!s!\") from the following logic: \"%1!s!\"" 0 0 "" 0 -1} { "Info" "ILPMS_LPM_MULT_INFERRED" "ADPCM_Decoder_1_Bit:u6\|Mult0 lpm_mult " "Info: Inferred multiplier megafunction (\"lpm_mult\") from the following logic: \"ADPCM_Decoder_1_Bit:u6\|Mult0\"" {  } { { "HD_ADPCM_Codec.vhd" "Mult0" { Text "D:/HD_ADPCM/HD_ADPCM_1Bit_Stereo_Decoder/HD_ADPCM_Codec.vhd" 947 -1 0 } }  } 0 0 "Inferred multiplier megafunction (\"%2!s!\") from the following logic: \"%1!s!\"" 0 0 "" 0 -1} { "Info" "ILPMS_LPM_DIVIDE_INFERRED" "ADPCM_Decoder_1_Bit:u6\|Div0 lpm_divide " "Info: Inferred divider/modulo megafunction (\"lpm_divide\") from the following logic: \"ADPCM_Decoder_1_Bit:u6\|Div0\"" {  } { { "HD_ADPCM_Codec.vhd" "Div0" { Text "D:/HD_ADPCM/HD_ADPCM_1Bit_Stereo_Decoder/HD_ADPCM_Codec.vhd" 947 -1 0 } }  } 0 0 "Inferred divider/modulo megafunction (\"%2!s!\") from the following logic: \"%1!s!\"" 0 0 "" 0 -1}  } {  } 0 0 "Inferred %1!llu! megafunctions from design logic" 0 0 "" 0 -1}
23 
{ "Info" "ISGN_ELABORATION_HEADER" "ADPCM_Decoder_1_Bit:u5\|lpm_mult:Mult0 " "Info: Elaborated megafunction instantiation \"ADPCM_Decoder_1_Bit:u5\|lpm_mult:Mult0\"" {  } { { "HD_ADPCM_Codec.vhd" "" { Text "D:/HD_ADPCM/HD_ADPCM_1Bit_Stereo_Decoder/HD_ADPCM_Codec.vhd" 947 -1 0 } }  } 0 0 "Elaborated megafunction instantiation \"%1!s!\"" 0 0 "" 0 -1}
24 
{ "Info" "ISGN_MEGAFN_PARAM_TOP" "ADPCM_Decoder_1_Bit:u5\|lpm_mult:Mult0 " "Info: Instantiated megafunction \"ADPCM_Decoder_1_Bit:u5\|lpm_mult:Mult0\" with the following parameter:" { { "Info" "ISGN_MEGAFN_PARAM_SUB" "LPM_WIDTHA 10 " "Info: Parameter \"LPM_WIDTHA\" = \"10\"" {  } {  } 0 0 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "" 0 -1} { "Info" "ISGN_MEGAFN_PARAM_SUB" "LPM_WIDTHB 10 " "Info: Parameter \"LPM_WIDTHB\" = \"10\"" {  } {  } 0 0 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "" 0 -1} { "Info" "ISGN_MEGAFN_PARAM_SUB" "LPM_WIDTHP 20 " "Info: Parameter \"LPM_WIDTHP\" = \"20\"" {  } {  } 0 0 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "" 0 -1} { "Info" "ISGN_MEGAFN_PARAM_SUB" "LPM_WIDTHR 20 " "Info: Parameter \"LPM_WIDTHR\" = \"20\"" {  } {  } 0 0 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "" 0 -1} { "Info" "ISGN_MEGAFN_PARAM_SUB" "LPM_WIDTHS 1 " "Info: Parameter \"LPM_WIDTHS\" = \"1\"" {  } {  } 0 0 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "" 0 -1} { "Info" "ISGN_MEGAFN_PARAM_SUB" "LPM_REPRESENTATION UNSIGNED " "Info: Parameter \"LPM_REPRESENTATION\" = \"UNSIGNED\"" {  } {  } 0 0 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "" 0 -1} { "Info" "ISGN_MEGAFN_PARAM_SUB" "INPUT_A_IS_CONSTANT NO " "Info: Parameter \"INPUT_A_IS_CONSTANT\" = \"NO\"" {  } {  } 0 0 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "" 0 -1} { "Info" "ISGN_MEGAFN_PARAM_SUB" "INPUT_B_IS_CONSTANT NO " "Info: Parameter \"INPUT_B_IS_CONSTANT\" = \"NO\"" {  } {  } 0 0 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "" 0 -1} { "Info" "ISGN_MEGAFN_PARAM_SUB" "MAXIMIZE_SPEED 5 " "Info: Parameter \"MAXIMIZE_SPEED\" = \"5\"" {  } {  } 0 0 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "" 0 -1} { "Info" "ISGN_MEGAFN_PARAM_SUB" "DEDICATED_MULTIPLIER_CIRCUITRY AUTO " "Info: Parameter \"DEDICATED_MULTIPLIER_CIRCUITRY\" = \"AUTO\"" {  } {  } 0 0 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "" 0 -1}  } { { "HD_ADPCM_Codec.vhd" "" { Text "D:/HD_ADPCM/HD_ADPCM_1Bit_Stereo_Decoder/HD_ADPCM_Codec.vhd" 947 -1 0 } }  } 0 0 "Instantiated megafunction \"%1!s!\" with the following parameter:" 0 0 "" 0 -1}
25 
{ "Info" "ISGN_NUM_OF_DESIGN_UNITS_AND_ENTITIES" "db/mult_pu01.tdf 1 1 " "Info: Found 1 design units, including 1 entities, in source file db/mult_pu01.tdf" { { "Info" "ISGN_ENTITY_NAME" "1 mult_pu01 " "Info: Found entity 1: mult_pu01" {  } { { "db/mult_pu01.tdf" "" { Text "D:/HD_ADPCM/HD_ADPCM_1Bit_Stereo_Decoder/db/mult_pu01.tdf" 28 1 0 } }  } 0 0 "Found entity %1!d!: %2!s!" 0 0 "" 0 -1}  } {  } 0 0 "Found %2!llu! design units, including %3!llu! entities, in source file %1!s!" 0 0 "" 0 -1}
26 
{ "Info" "ISGN_ELABORATION_HEADER" "ADPCM_Decoder_1_Bit:u5\|lpm_divide:Div0 " "Info: Elaborated megafunction instantiation \"ADPCM_Decoder_1_Bit:u5\|lpm_divide:Div0\"" {  } { { "HD_ADPCM_Codec.vhd" "" { Text "D:/HD_ADPCM/HD_ADPCM_1Bit_Stereo_Decoder/HD_ADPCM_Codec.vhd" 947 -1 0 } }  } 0 0 "Elaborated megafunction instantiation \"%1!s!\"" 0 0 "" 0 -1}
27 
{ "Info" "ISGN_MEGAFN_PARAM_TOP" "ADPCM_Decoder_1_Bit:u5\|lpm_divide:Div0 " "Info: Instantiated megafunction \"ADPCM_Decoder_1_Bit:u5\|lpm_divide:Div0\" with the following parameter:" { { "Info" "ISGN_MEGAFN_PARAM_SUB" "LPM_WIDTHN 20 " "Info: Parameter \"LPM_WIDTHN\" = \"20\"" {  } {  } 0 0 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "" 0 -1} { "Info" "ISGN_MEGAFN_PARAM_SUB" "LPM_WIDTHD 7 " "Info: Parameter \"LPM_WIDTHD\" = \"7\"" {  } {  } 0 0 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "" 0 -1} { "Info" "ISGN_MEGAFN_PARAM_SUB" "LPM_NREPRESENTATION UNSIGNED " "Info: Parameter \"LPM_NREPRESENTATION\" = \"UNSIGNED\"" {  } {  } 0 0 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "" 0 -1} { "Info" "ISGN_MEGAFN_PARAM_SUB" "LPM_DREPRESENTATION UNSIGNED " "Info: Parameter \"LPM_DREPRESENTATION\" = \"UNSIGNED\"" {  } {  } 0 0 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "" 0 -1}  } { { "HD_ADPCM_Codec.vhd" "" { Text "D:/HD_ADPCM/HD_ADPCM_1Bit_Stereo_Decoder/HD_ADPCM_Codec.vhd" 947 -1 0 } }  } 0 0 "Instantiated megafunction \"%1!s!\" with the following parameter:" 0 0 "" 0 -1}
28 
{ "Info" "ISGN_NUM_OF_DESIGN_UNITS_AND_ENTITIES" "db/lpm_divide_aem.tdf 1 1 " "Info: Found 1 design units, including 1 entities, in source file db/lpm_divide_aem.tdf" { { "Info" "ISGN_ENTITY_NAME" "1 lpm_divide_aem " "Info: Found entity 1: lpm_divide_aem" {  } { { "db/lpm_divide_aem.tdf" "" { Text "D:/HD_ADPCM/HD_ADPCM_1Bit_Stereo_Decoder/db/lpm_divide_aem.tdf" 24 1 0 } }  } 0 0 "Found entity %1!d!: %2!s!" 0 0 "" 0 -1}  } {  } 0 0 "Found %2!llu! design units, including %3!llu! entities, in source file %1!s!" 0 0 "" 0 -1}
29 
{ "Info" "ISGN_NUM_OF_DESIGN_UNITS_AND_ENTITIES" "db/sign_div_unsign_klh.tdf 1 1 " "Info: Found 1 design units, including 1 entities, in source file db/sign_div_unsign_klh.tdf" { { "Info" "ISGN_ENTITY_NAME" "1 sign_div_unsign_klh " "Info: Found entity 1: sign_div_unsign_klh" {  } { { "db/sign_div_unsign_klh.tdf" "" { Text "D:/HD_ADPCM/HD_ADPCM_1Bit_Stereo_Decoder/db/sign_div_unsign_klh.tdf" 24 1 0 } }  } 0 0 "Found entity %1!d!: %2!s!" 0 0 "" 0 -1}  } {  } 0 0 "Found %2!llu! design units, including %3!llu! entities, in source file %1!s!" 0 0 "" 0 -1}
30 
{ "Info" "ISGN_NUM_OF_DESIGN_UNITS_AND_ENTITIES" "db/alt_u_div_e2f.tdf 1 1 " "Info: Found 1 design units, including 1 entities, in source file db/alt_u_div_e2f.tdf" { { "Info" "ISGN_ENTITY_NAME" "1 alt_u_div_e2f " "Info: Found entity 1: alt_u_div_e2f" {  } { { "db/alt_u_div_e2f.tdf" "" { Text "D:/HD_ADPCM/HD_ADPCM_1Bit_Stereo_Decoder/db/alt_u_div_e2f.tdf" 26 1 0 } }  } 0 0 "Found entity %1!d!: %2!s!" 0 0 "" 0 -1}  } {  } 0 0 "Found %2!llu! design units, including %3!llu! entities, in source file %1!s!" 0 0 "" 0 -1}
31 
{ "Info" "ISGN_NUM_OF_DESIGN_UNITS_AND_ENTITIES" "db/add_sub_lkc.tdf 1 1 " "Info: Found 1 design units, including 1 entities, in source file db/add_sub_lkc.tdf" { { "Info" "ISGN_ENTITY_NAME" "1 add_sub_lkc " "Info: Found entity 1: add_sub_lkc" {  } { { "db/add_sub_lkc.tdf" "" { Text "D:/HD_ADPCM/HD_ADPCM_1Bit_Stereo_Decoder/db/add_sub_lkc.tdf" 22 1 0 } }  } 0 0 "Found entity %1!d!: %2!s!" 0 0 "" 0 -1}  } {  } 0 0 "Found %2!llu! design units, including %3!llu! entities, in source file %1!s!" 0 0 "" 0 -1}
32 
{ "Info" "ISGN_NUM_OF_DESIGN_UNITS_AND_ENTITIES" "db/add_sub_mkc.tdf 1 1 " "Info: Found 1 design units, including 1 entities, in source file db/add_sub_mkc.tdf" { { "Info" "ISGN_ENTITY_NAME" "1 add_sub_mkc " "Info: Found entity 1: add_sub_mkc" {  } { { "db/add_sub_mkc.tdf" "" { Text "D:/HD_ADPCM/HD_ADPCM_1Bit_Stereo_Decoder/db/add_sub_mkc.tdf" 22 1 0 } }  } 0 0 "Found entity %1!d!: %2!s!" 0 0 "" 0 -1}  } {  } 0 0 "Found %2!llu! design units, including %3!llu! entities, in source file %1!s!" 0 0 "" 0 -1}
33 
{ "Warning" "WOPT_OPT_INSERTED_ALWAYS_ENABLED_TRI_AFTER_LOGIC_HDR" "" "Warning: The following nodes have both tri-state and non-tri-state drivers" { { "Warning" "WOPT_OPT_INSERTED_ALWAYS_ENABLED_TRI_AFTER_LOGIC" "I2C_DATA_INOUT " "Warning: Inserted always-enabled tri-state buffer between \"I2C_DATA_INOUT\" and its non-tri-state driver." {  } { { "HD_ADPCM_Codec.vhd" "" { Text "D:/HD_ADPCM/HD_ADPCM_1Bit_Stereo_Decoder/HD_ADPCM_Codec.vhd" 19 -1 0 } }  } 0 0 "Inserted always-enabled tri-state buffer between \"%1!s!\" and its non-tri-state driver." 0 0 "" 0 -1} { "Warning" "WOPT_OPT_INSERTED_ALWAYS_ENABLED_TRI_AFTER_LOGIC" "I2S_DATA_INOUT " "Warning: Inserted always-enabled tri-state buffer between \"I2S_DATA_INOUT\" and its non-tri-state driver." {  } { { "HD_ADPCM_Codec.vhd" "" { Text "D:/HD_ADPCM/HD_ADPCM_1Bit_Stereo_Decoder/HD_ADPCM_Codec.vhd" 22 -1 0 } }  } 0 0 "Inserted always-enabled tri-state buffer between \"%1!s!\" and its non-tri-state driver." 0 0 "" 0 -1}  } {  } 0 0 "The following nodes have both tri-state and non-tri-state drivers" 0 0 "" 0 -1}
34 
{ "Warning" "WOPT_OPT_INSERTED_ALWAYS_DISABLED_TRI_HDR" "" "Warning: The following bidir pins have no drivers" { { "Warning" "WOPT_OPT_INSERTED_ALWAYS_DISABLED_TRI" "FLASH_MEMORY_DATA_INOUT\[0\] " "Warning: Bidir \"FLASH_MEMORY_DATA_INOUT\[0\]\" has no driver" {  } { { "HD_ADPCM_Codec.vhd" "" { Text "D:/HD_ADPCM/HD_ADPCM_1Bit_Stereo_Decoder/HD_ADPCM_Codec.vhd" 28 -1 0 } }  } 0 0 "Bidir \"%1!s!\" has no driver" 0 0 "" 0 -1} { "Warning" "WOPT_OPT_INSERTED_ALWAYS_DISABLED_TRI" "FLASH_MEMORY_DATA_INOUT\[1\] " "Warning: Bidir \"FLASH_MEMORY_DATA_INOUT\[1\]\" has no driver" {  } { { "HD_ADPCM_Codec.vhd" "" { Text "D:/HD_ADPCM/HD_ADPCM_1Bit_Stereo_Decoder/HD_ADPCM_Codec.vhd" 28 -1 0 } }  } 0 0 "Bidir \"%1!s!\" has no driver" 0 0 "" 0 -1} { "Warning" "WOPT_OPT_INSERTED_ALWAYS_DISABLED_TRI" "FLASH_MEMORY_DATA_INOUT\[2\] " "Warning: Bidir \"FLASH_MEMORY_DATA_INOUT\[2\]\" has no driver" {  } { { "HD_ADPCM_Codec.vhd" "" { Text "D:/HD_ADPCM/HD_ADPCM_1Bit_Stereo_Decoder/HD_ADPCM_Codec.vhd" 28 -1 0 } }  } 0 0 "Bidir \"%1!s!\" has no driver" 0 0 "" 0 -1} { "Warning" "WOPT_OPT_INSERTED_ALWAYS_DISABLED_TRI" "FLASH_MEMORY_DATA_INOUT\[3\] " "Warning: Bidir \"FLASH_MEMORY_DATA_INOUT\[3\]\" has no driver" {  } { { "HD_ADPCM_Codec.vhd" "" { Text "D:/HD_ADPCM/HD_ADPCM_1Bit_Stereo_Decoder/HD_ADPCM_Codec.vhd" 28 -1 0 } }  } 0 0 "Bidir \"%1!s!\" has no driver" 0 0 "" 0 -1} { "Warning" "WOPT_OPT_INSERTED_ALWAYS_DISABLED_TRI" "FLASH_MEMORY_DATA_INOUT\[4\] " "Warning: Bidir \"FLASH_MEMORY_DATA_INOUT\[4\]\" has no driver" {  } { { "HD_ADPCM_Codec.vhd" "" { Text "D:/HD_ADPCM/HD_ADPCM_1Bit_Stereo_Decoder/HD_ADPCM_Codec.vhd" 28 -1 0 } }  } 0 0 "Bidir \"%1!s!\" has no driver" 0 0 "" 0 -1} { "Warning" "WOPT_OPT_INSERTED_ALWAYS_DISABLED_TRI" "FLASH_MEMORY_DATA_INOUT\[5\] " "Warning: Bidir \"FLASH_MEMORY_DATA_INOUT\[5\]\" has no driver" {  } { { "HD_ADPCM_Codec.vhd" "" { Text "D:/HD_ADPCM/HD_ADPCM_1Bit_Stereo_Decoder/HD_ADPCM_Codec.vhd" 28 -1 0 } }  } 0 0 "Bidir \"%1!s!\" has no driver" 0 0 "" 0 -1} { "Warning" "WOPT_OPT_INSERTED_ALWAYS_DISABLED_TRI" "FLASH_MEMORY_DATA_INOUT\[6\] " "Warning: Bidir \"FLASH_MEMORY_DATA_INOUT\[6\]\" has no driver" {  } { { "HD_ADPCM_Codec.vhd" "" { Text "D:/HD_ADPCM/HD_ADPCM_1Bit_Stereo_Decoder/HD_ADPCM_Codec.vhd" 28 -1 0 } }  } 0 0 "Bidir \"%1!s!\" has no driver" 0 0 "" 0 -1} { "Warning" "WOPT_OPT_INSERTED_ALWAYS_DISABLED_TRI" "FLASH_MEMORY_DATA_INOUT\[7\] " "Warning: Bidir \"FLASH_MEMORY_DATA_INOUT\[7\]\" has no driver" {  } { { "HD_ADPCM_Codec.vhd" "" { Text "D:/HD_ADPCM/HD_ADPCM_1Bit_Stereo_Decoder/HD_ADPCM_Codec.vhd" 28 -1 0 } }  } 0 0 "Bidir \"%1!s!\" has no driver" 0 0 "" 0 -1}  } {  } 0 0 "The following bidir pins have no drivers" 0 0 "" 0 -1}
35 
{ "Warning" "WOPT_MLS_ENABLED_OE" "" "Warning: TRI or OPNDRN buffers permanently enabled" { { "Warning" "WOPT_MLS_NODE_NAME" "I2C_DATA_INOUT~synth " "Warning: Node \"I2C_DATA_INOUT~synth\"" {  } { { "HD_ADPCM_Codec.vhd" "" { Text "D:/HD_ADPCM/HD_ADPCM_1Bit_Stereo_Decoder/HD_ADPCM_Codec.vhd" 19 -1 0 } }  } 0 0 "Node \"%1!s!\"" 0 0 "" 0 -1} { "Warning" "WOPT_MLS_NODE_NAME" "I2S_DATA_INOUT~synth " "Warning: Node \"I2S_DATA_INOUT~synth\"" {  } { { "HD_ADPCM_Codec.vhd" "" { Text "D:/HD_ADPCM/HD_ADPCM_1Bit_Stereo_Decoder/HD_ADPCM_Codec.vhd" 22 -1 0 } }  } 0 0 "Node \"%1!s!\"" 0 0 "" 0 -1}  } {  } 0 0 "TRI or OPNDRN buffers permanently enabled" 0 0 "" 0 -1}
36 
{ "Warning" "WOPT_MLS_STUCK_PIN_HDR" "" "Warning: Output pins are stuck at VCC or GND" { { "Warning" "WOPT_MLS_STUCK_PIN" "S_SEVEN_SEGMENT_1_OUT\[0\] GND " "Warning (13410): Pin \"S_SEVEN_SEGMENT_1_OUT\[0\]\" is stuck at GND" {  } { { "HD_ADPCM_Codec.vhd" "" { Text "D:/HD_ADPCM/HD_ADPCM_1Bit_Stereo_Decoder/HD_ADPCM_Codec.vhd" 13 -1 0 } }  } 0 13410 "Pin \"%1!s!\" is stuck at %2!s!" 0 0 "" 0 -1} { "Warning" "WOPT_MLS_STUCK_PIN" "S_SEVEN_SEGMENT_1_OUT\[1\] GND " "Warning (13410): Pin \"S_SEVEN_SEGMENT_1_OUT\[1\]\" is stuck at GND" {  } { { "HD_ADPCM_Codec.vhd" "" { Text "D:/HD_ADPCM/HD_ADPCM_1Bit_Stereo_Decoder/HD_ADPCM_Codec.vhd" 13 -1 0 } }  } 0 13410 "Pin \"%1!s!\" is stuck at %2!s!" 0 0 "" 0 -1} { "Warning" "WOPT_MLS_STUCK_PIN" "S_SEVEN_SEGMENT_1_OUT\[2\] GND " "Warning (13410): Pin \"S_SEVEN_SEGMENT_1_OUT\[2\]\" is stuck at GND" {  } { { "HD_ADPCM_Codec.vhd" "" { Text "D:/HD_ADPCM/HD_ADPCM_1Bit_Stereo_Decoder/HD_ADPCM_Codec.vhd" 13 -1 0 } }  } 0 13410 "Pin \"%1!s!\" is stuck at %2!s!" 0 0 "" 0 -1} { "Warning" "WOPT_MLS_STUCK_PIN" "S_SEVEN_SEGMENT_1_OUT\[3\] GND " "Warning (13410): Pin \"S_SEVEN_SEGMENT_1_OUT\[3\]\" is stuck at GND" {  } { { "HD_ADPCM_Codec.vhd" "" { Text "D:/HD_ADPCM/HD_ADPCM_1Bit_Stereo_Decoder/HD_ADPCM_Codec.vhd" 13 -1 0 } }  } 0 13410 "Pin \"%1!s!\" is stuck at %2!s!" 0 0 "" 0 -1} { "Warning" "WOPT_MLS_STUCK_PIN" "S_SEVEN_SEGMENT_1_OUT\[4\] GND " "Warning (13410): Pin \"S_SEVEN_SEGMENT_1_OUT\[4\]\" is stuck at GND" {  } { { "HD_ADPCM_Codec.vhd" "" { Text "D:/HD_ADPCM/HD_ADPCM_1Bit_Stereo_Decoder/HD_ADPCM_Codec.vhd" 13 -1 0 } }  } 0 13410 "Pin \"%1!s!\" is stuck at %2!s!" 0 0 "" 0 -1} { "Warning" "WOPT_MLS_STUCK_PIN" "S_SEVEN_SEGMENT_1_OUT\[5\] GND " "Warning (13410): Pin \"S_SEVEN_SEGMENT_1_OUT\[5\]\" is stuck at GND" {  } { { "HD_ADPCM_Codec.vhd" "" { Text "D:/HD_ADPCM/HD_ADPCM_1Bit_Stereo_Decoder/HD_ADPCM_Codec.vhd" 13 -1 0 } }  } 0 13410 "Pin \"%1!s!\" is stuck at %2!s!" 0 0 "" 0 -1} { "Warning" "WOPT_MLS_STUCK_PIN" "S_SEVEN_SEGMENT_1_OUT\[6\] VCC " "Warning (13410): Pin \"S_SEVEN_SEGMENT_1_OUT\[6\]\" is stuck at VCC" {  } { { "HD_ADPCM_Codec.vhd" "" { Text "D:/HD_ADPCM/HD_ADPCM_1Bit_Stereo_Decoder/HD_ADPCM_Codec.vhd" 13 -1 0 } }  } 0 13410 "Pin \"%1!s!\" is stuck at %2!s!" 0 0 "" 0 -1} { "Warning" "WOPT_MLS_STUCK_PIN" "S_SEVEN_SEGMENT_2_OUT\[0\] GND " "Warning (13410): Pin \"S_SEVEN_SEGMENT_2_OUT\[0\]\" is stuck at GND" {  } { { "HD_ADPCM_Codec.vhd" "" { Text "D:/HD_ADPCM/HD_ADPCM_1Bit_Stereo_Decoder/HD_ADPCM_Codec.vhd" 14 -1 0 } }  } 0 13410 "Pin \"%1!s!\" is stuck at %2!s!" 0 0 "" 0 -1} { "Warning" "WOPT_MLS_STUCK_PIN" "S_SEVEN_SEGMENT_2_OUT\[1\] GND " "Warning (13410): Pin \"S_SEVEN_SEGMENT_2_OUT\[1\]\" is stuck at GND" {  } { { "HD_ADPCM_Codec.vhd" "" { Text "D:/HD_ADPCM/HD_ADPCM_1Bit_Stereo_Decoder/HD_ADPCM_Codec.vhd" 14 -1 0 } }  } 0 13410 "Pin \"%1!s!\" is stuck at %2!s!" 0 0 "" 0 -1} { "Warning" "WOPT_MLS_STUCK_PIN" "S_SEVEN_SEGMENT_2_OUT\[2\] GND " "Warning (13410): Pin \"S_SEVEN_SEGMENT_2_OUT\[2\]\" is stuck at GND" {  } { { "HD_ADPCM_Codec.vhd" "" { Text "D:/HD_ADPCM/HD_ADPCM_1Bit_Stereo_Decoder/HD_ADPCM_Codec.vhd" 14 -1 0 } }  } 0 13410 "Pin \"%1!s!\" is stuck at %2!s!" 0 0 "" 0 -1} { "Warning" "WOPT_MLS_STUCK_PIN" "S_SEVEN_SEGMENT_2_OUT\[3\] GND " "Warning (13410): Pin \"S_SEVEN_SEGMENT_2_OUT\[3\]\" is stuck at GND" {  } { { "HD_ADPCM_Codec.vhd" "" { Text "D:/HD_ADPCM/HD_ADPCM_1Bit_Stereo_Decoder/HD_ADPCM_Codec.vhd" 14 -1 0 } }  } 0 13410 "Pin \"%1!s!\" is stuck at %2!s!" 0 0 "" 0 -1} { "Warning" "WOPT_MLS_STUCK_PIN" "S_SEVEN_SEGMENT_2_OUT\[4\] GND " "Warning (13410): Pin \"S_SEVEN_SEGMENT_2_OUT\[4\]\" is stuck at GND" {  } { { "HD_ADPCM_Codec.vhd" "" { Text "D:/HD_ADPCM/HD_ADPCM_1Bit_Stereo_Decoder/HD_ADPCM_Codec.vhd" 14 -1 0 } }  } 0 13410 "Pin \"%1!s!\" is stuck at %2!s!" 0 0 "" 0 -1} { "Warning" "WOPT_MLS_STUCK_PIN" "S_SEVEN_SEGMENT_2_OUT\[5\] GND " "Warning (13410): Pin \"S_SEVEN_SEGMENT_2_OUT\[5\]\" is stuck at GND" {  } { { "HD_ADPCM_Codec.vhd" "" { Text "D:/HD_ADPCM/HD_ADPCM_1Bit_Stereo_Decoder/HD_ADPCM_Codec.vhd" 14 -1 0 } }  } 0 13410 "Pin \"%1!s!\" is stuck at %2!s!" 0 0 "" 0 -1} { "Warning" "WOPT_MLS_STUCK_PIN" "S_SEVEN_SEGMENT_2_OUT\[6\] VCC " "Warning (13410): Pin \"S_SEVEN_SEGMENT_2_OUT\[6\]\" is stuck at VCC" {  } { { "HD_ADPCM_Codec.vhd" "" { Text "D:/HD_ADPCM/HD_ADPCM_1Bit_Stereo_Decoder/HD_ADPCM_Codec.vhd" 14 -1 0 } }  } 0 13410 "Pin \"%1!s!\" is stuck at %2!s!" 0 0 "" 0 -1} { "Warning" "WOPT_MLS_STUCK_PIN" "S_SEVEN_SEGMENT_3_OUT\[0\] GND " "Warning (13410): Pin \"S_SEVEN_SEGMENT_3_OUT\[0\]\" is stuck at GND" {  } { { "HD_ADPCM_Codec.vhd" "" { Text "D:/HD_ADPCM/HD_ADPCM_1Bit_Stereo_Decoder/HD_ADPCM_Codec.vhd" 15 -1 0 } }  } 0 13410 "Pin \"%1!s!\" is stuck at %2!s!" 0 0 "" 0 -1} { "Warning" "WOPT_MLS_STUCK_PIN" "S_SEVEN_SEGMENT_3_OUT\[1\] GND " "Warning (13410): Pin \"S_SEVEN_SEGMENT_3_OUT\[1\]\" is stuck at GND" {  } { { "HD_ADPCM_Codec.vhd" "" { Text "D:/HD_ADPCM/HD_ADPCM_1Bit_Stereo_Decoder/HD_ADPCM_Codec.vhd" 15 -1 0 } }  } 0 13410 "Pin \"%1!s!\" is stuck at %2!s!" 0 0 "" 0 -1} { "Warning" "WOPT_MLS_STUCK_PIN" "S_SEVEN_SEGMENT_3_OUT\[2\] GND " "Warning (13410): Pin \"S_SEVEN_SEGMENT_3_OUT\[2\]\" is stuck at GND" {  } { { "HD_ADPCM_Codec.vhd" "" { Text "D:/HD_ADPCM/HD_ADPCM_1Bit_Stereo_Decoder/HD_ADPCM_Codec.vhd" 15 -1 0 } }  } 0 13410 "Pin \"%1!s!\" is stuck at %2!s!" 0 0 "" 0 -1} { "Warning" "WOPT_MLS_STUCK_PIN" "S_SEVEN_SEGMENT_3_OUT\[3\] GND " "Warning (13410): Pin \"S_SEVEN_SEGMENT_3_OUT\[3\]\" is stuck at GND" {  } { { "HD_ADPCM_Codec.vhd" "" { Text "D:/HD_ADPCM/HD_ADPCM_1Bit_Stereo_Decoder/HD_ADPCM_Codec.vhd" 15 -1 0 } }  } 0 13410 "Pin \"%1!s!\" is stuck at %2!s!" 0 0 "" 0 -1} { "Warning" "WOPT_MLS_STUCK_PIN" "S_SEVEN_SEGMENT_3_OUT\[4\] GND " "Warning (13410): Pin \"S_SEVEN_SEGMENT_3_OUT\[4\]\" is stuck at GND" {  } { { "HD_ADPCM_Codec.vhd" "" { Text "D:/HD_ADPCM/HD_ADPCM_1Bit_Stereo_Decoder/HD_ADPCM_Codec.vhd" 15 -1 0 } }  } 0 13410 "Pin \"%1!s!\" is stuck at %2!s!" 0 0 "" 0 -1} { "Warning" "WOPT_MLS_STUCK_PIN" "S_SEVEN_SEGMENT_3_OUT\[5\] GND " "Warning (13410): Pin \"S_SEVEN_SEGMENT_3_OUT\[5\]\" is stuck at GND" {  } { { "HD_ADPCM_Codec.vhd" "" { Text "D:/HD_ADPCM/HD_ADPCM_1Bit_Stereo_Decoder/HD_ADPCM_Codec.vhd" 15 -1 0 } }  } 0 13410 "Pin \"%1!s!\" is stuck at %2!s!" 0 0 "" 0 -1} { "Warning" "WOPT_MLS_STUCK_PIN" "S_SEVEN_SEGMENT_3_OUT\[6\] VCC " "Warning (13410): Pin \"S_SEVEN_SEGMENT_3_OUT\[6\]\" is stuck at VCC" {  } { { "HD_ADPCM_Codec.vhd" "" { Text "D:/HD_ADPCM/HD_ADPCM_1Bit_Stereo_Decoder/HD_ADPCM_Codec.vhd" 15 -1 0 } }  } 0 13410 "Pin \"%1!s!\" is stuck at %2!s!" 0 0 "" 0 -1} { "Warning" "WOPT_MLS_STUCK_PIN" "S_SEVEN_SEGMENT_4_OUT\[0\] GND " "Warning (13410): Pin \"S_SEVEN_SEGMENT_4_OUT\[0\]\" is stuck at GND" {  } { { "HD_ADPCM_Codec.vhd" "" { Text "D:/HD_ADPCM/HD_ADPCM_1Bit_Stereo_Decoder/HD_ADPCM_Codec.vhd" 16 -1 0 } }  } 0 13410 "Pin \"%1!s!\" is stuck at %2!s!" 0 0 "" 0 -1} { "Warning" "WOPT_MLS_STUCK_PIN" "S_SEVEN_SEGMENT_4_OUT\[1\] GND " "Warning (13410): Pin \"S_SEVEN_SEGMENT_4_OUT\[1\]\" is stuck at GND" {  } { { "HD_ADPCM_Codec.vhd" "" { Text "D:/HD_ADPCM/HD_ADPCM_1Bit_Stereo_Decoder/HD_ADPCM_Codec.vhd" 16 -1 0 } }  } 0 13410 "Pin \"%1!s!\" is stuck at %2!s!" 0 0 "" 0 -1} { "Warning" "WOPT_MLS_STUCK_PIN" "S_SEVEN_SEGMENT_4_OUT\[2\] GND " "Warning (13410): Pin \"S_SEVEN_SEGMENT_4_OUT\[2\]\" is stuck at GND" {  } { { "HD_ADPCM_Codec.vhd" "" { Text "D:/HD_ADPCM/HD_ADPCM_1Bit_Stereo_Decoder/HD_ADPCM_Codec.vhd" 16 -1 0 } }  } 0 13410 "Pin \"%1!s!\" is stuck at %2!s!" 0 0 "" 0 -1} { "Warning" "WOPT_MLS_STUCK_PIN" "S_SEVEN_SEGMENT_4_OUT\[3\] GND " "Warning (13410): Pin \"S_SEVEN_SEGMENT_4_OUT\[3\]\" is stuck at GND" {  } { { "HD_ADPCM_Codec.vhd" "" { Text "D:/HD_ADPCM/HD_ADPCM_1Bit_Stereo_Decoder/HD_ADPCM_Codec.vhd" 16 -1 0 } }  } 0 13410 "Pin \"%1!s!\" is stuck at %2!s!" 0 0 "" 0 -1} { "Warning" "WOPT_MLS_STUCK_PIN" "S_SEVEN_SEGMENT_4_OUT\[4\] GND " "Warning (13410): Pin \"S_SEVEN_SEGMENT_4_OUT\[4\]\" is stuck at GND" {  } { { "HD_ADPCM_Codec.vhd" "" { Text "D:/HD_ADPCM/HD_ADPCM_1Bit_Stereo_Decoder/HD_ADPCM_Codec.vhd" 16 -1 0 } }  } 0 13410 "Pin \"%1!s!\" is stuck at %2!s!" 0 0 "" 0 -1} { "Warning" "WOPT_MLS_STUCK_PIN" "S_SEVEN_SEGMENT_4_OUT\[5\] GND " "Warning (13410): Pin \"S_SEVEN_SEGMENT_4_OUT\[5\]\" is stuck at GND" {  } { { "HD_ADPCM_Codec.vhd" "" { Text "D:/HD_ADPCM/HD_ADPCM_1Bit_Stereo_Decoder/HD_ADPCM_Codec.vhd" 16 -1 0 } }  } 0 13410 "Pin \"%1!s!\" is stuck at %2!s!" 0 0 "" 0 -1} { "Warning" "WOPT_MLS_STUCK_PIN" "S_SEVEN_SEGMENT_4_OUT\[6\] VCC " "Warning (13410): Pin \"S_SEVEN_SEGMENT_4_OUT\[6\]\" is stuck at VCC" {  } { { "HD_ADPCM_Codec.vhd" "" { Text "D:/HD_ADPCM/HD_ADPCM_1Bit_Stereo_Decoder/HD_ADPCM_Codec.vhd" 16 -1 0 } }  } 0 13410 "Pin \"%1!s!\" is stuck at %2!s!" 0 0 "" 0 -1} { "Warning" "WOPT_MLS_STUCK_PIN" "FLASH_MEMORY_nWE_OUT VCC " "Warning (13410): Pin \"FLASH_MEMORY_nWE_OUT\" is stuck at VCC" {  } { { "HD_ADPCM_Codec.vhd" "" { Text "D:/HD_ADPCM/HD_ADPCM_1Bit_Stereo_Decoder/HD_ADPCM_Codec.vhd" 29 -1 0 } }  } 0 13410 "Pin \"%1!s!\" is stuck at %2!s!" 0 0 "" 0 -1} { "Warning" "WOPT_MLS_STUCK_PIN" "FLASH_MEMORY_nRESET_OUT VCC " "Warning (13410): Pin \"FLASH_MEMORY_nRESET_OUT\" is stuck at VCC" {  } { { "HD_ADPCM_Codec.vhd" "" { Text "D:/HD_ADPCM/HD_ADPCM_1Bit_Stereo_Decoder/HD_ADPCM_Codec.vhd" 31 -1 0 } }  } 0 13410 "Pin \"%1!s!\" is stuck at %2!s!" 0 0 "" 0 -1}  } {  } 0 0 "Output pins are stuck at VCC or GND" 0 0 "" 0 -1}
37 
{ "Info" "ISCL_SCL_LOST_FANOUT_MSG_HDR" "4 4 " "Info: 4 registers lost all their fanouts during netlist optimizations. The first 4 are displayed below." { { "Info" "ISCL_SCL_LOST_FANOUT_MSG_SUB" "ADPCM_Decoder_1_Bit:u5\|PCM_Data_Difference\[16\] " "Info: Register \"ADPCM_Decoder_1_Bit:u5\|PCM_Data_Difference\[16\]\" lost all its fanouts during netlist optimizations." {  } {  } 0 0 "Register \"%1!s!\" lost all its fanouts during netlist optimizations." 0 0 "" 0 -1} { "Info" "ISCL_SCL_LOST_FANOUT_MSG_SUB" "ADPCM_Decoder_1_Bit:u5\|Last_PCM_Data\[16\] " "Info: Register \"ADPCM_Decoder_1_Bit:u5\|Last_PCM_Data\[16\]\" lost all its fanouts during netlist optimizations." {  } {  } 0 0 "Register \"%1!s!\" lost all its fanouts during netlist optimizations." 0 0 "" 0 -1} { "Info" "ISCL_SCL_LOST_FANOUT_MSG_SUB" "ADPCM_Decoder_1_Bit:u6\|PCM_Data_Difference\[16\] " "Info: Register \"ADPCM_Decoder_1_Bit:u6\|PCM_Data_Difference\[16\]\" lost all its fanouts during netlist optimizations." {  } {  } 0 0 "Register \"%1!s!\" lost all its fanouts during netlist optimizations." 0 0 "" 0 -1} { "Info" "ISCL_SCL_LOST_FANOUT_MSG_SUB" "ADPCM_Decoder_1_Bit:u6\|Last_PCM_Data\[16\] " "Info: Register \"ADPCM_Decoder_1_Bit:u6\|Last_PCM_Data\[16\]\" lost all its fanouts during netlist optimizations." {  } {  } 0 0 "Register \"%1!s!\" lost all its fanouts during netlist optimizations." 0 0 "" 0 -1}  } {  } 0 0 "%1!d! registers lost all their fanouts during netlist optimizations. The first %2!d! are displayed below." 0 0 "" 0 -1}
38 
{ "Warning" "WCUT_CUT_UNNECESSARY_INPUT_PIN_HDR" "1 " "Warning: Design contains 1 input pin(s) that do not drive logic" { { "Warning" "WCUT_CUT_UNNECESSARY_INPUT_PIN" "SWITCH_0 " "Warning (15610): No output dependent on input pin \"SWITCH_0\"" {  } { { "HD_ADPCM_Codec.vhd" "" { Text "D:/HD_ADPCM/HD_ADPCM_1Bit_Stereo_Decoder/HD_ADPCM_Codec.vhd" 24 -1 0 } }  } 0 15610 "No output dependent on input pin \"%1!s!\"" 0 0 "" 0 -1}  } {  } 0 0 "Design contains %1!d! input pin(s) that do not drive logic" 0 0 "" 0 -1}
39 
{ "Info" "ICUT_CUT_TM_SUMMARY" "1781 " "Info: Implemented 1781 device resources after synthesis - the final resource count might be different" { { "Info" "ICUT_CUT_TM_IPINS" "4 " "Info: Implemented 4 input pins" {  } {  } 0 0 "Implemented %1!d! input pins" 0 0 "" 0 -1} { "Info" "ICUT_CUT_TM_OPINS" "68 " "Info: Implemented 68 output pins" {  } {  } 0 0 "Implemented %1!d! output pins" 0 0 "" 0 -1} { "Info" "ICUT_CUT_TM_BIDIRS" "10 " "Info: Implemented 10 bidirectional pins" {  } {  } 0 0 "Implemented %1!d! bidirectional pins" 0 0 "" 0 -1} { "Info" "ICUT_CUT_TM_LCELLS" "1695 " "Info: Implemented 1695 logic cells" {  } {  } 0 0 "Implemented %1!d! logic cells" 0 0 "" 0 -1} { "Info" "ICUT_CUT_TM_DSP_ELEM" "4 " "Info: Implemented 4 DSP elements" {  } {  } 0 0 "Implemented %1!d! DSP elements" 0 0 "" 0 -1}  } {  } 0 0 "Implemented %1!d! device resources after synthesis - the final resource count might be different" 0 0 "" 0 -1}
40 
{ "Info" "IQEXE_ERROR_COUNT" "Analysis & Synthesis 0 s 57 s Quartus II " "Info: Quartus II Analysis & Synthesis was successful. 0 errors, 57 warnings" { { "Info" "IQEXE_END_PEAK_VSIZE_MEMORY" "199 " "Info: Peak virtual memory: 199 megabytes" {  } {  } 0 0 "Peak virtual memory: %1!s! megabytes" 0 0 "" 0 -1} { "Info" "IQEXE_END_BANNER_TIME" "Tue May 11 23:47:27 2010 " "Info: Processing ended: Tue May 11 23:47:27 2010" {  } {  } 0 0 "Processing ended: %1!s!" 0 0 "" 0 -1} { "Info" "IQEXE_ELAPSED_TIME" "00:00:15 " "Info: Elapsed time: 00:00:15" {  } {  } 0 0 "Elapsed time: %1!s!" 0 0 "" 0 -1} { "Info" "IQEXE_ELAPSED_CPU_TIME" "00:00:15 " "Info: Total CPU time (on all processors): 00:00:15" {  } {  } 0 0 "Total CPU time (on all processors): %1!s!" 0 0 "" 0 -1}  } {  } 0 0 "%6!s! %1!s! was successful. %2!d! error%3!s!, %4!d! warning%5!s!" 0 0 "" 0 -1}
41 
{ "Info" "IQEXE_SEPARATOR" "" "Info: *******************************************************************" {  } {  } 3 0 "*******************************************************************" 0 0 "" 0 -1}
42 
{ "Info" "IQEXE_START_BANNER_PRODUCT" "Fitter Quartus II " "Info: Running Quartus II Fitter" { { "Info" "IQEXE_START_BANNER_VERSION" "Version 9.0 Build 132 02/25/2009 SJ Web Edition " "Info: Version 9.0 Build 132 02/25/2009 SJ Web Edition" {  } {  } 0 0 "%1!s!" 0 0 "" 0 -1} { "Info" "IQEXE_START_BANNER_TIME" "Tue May 11 23:47:28 2010 " "Info: Processing started: Tue May 11 23:47:28 2010" {  } {  } 0 0 "Processing started: %1!s!" 0 0 "" 0 -1}  } {  } 4 0 "Running %2!s! %1!s!" 0 0 "" 0 -1}
43 
{ "Info" "IQEXE_START_BANNER_COMMANDLINE" "quartus_fit --read_settings_files=off --write_settings_files=off HD_ADPCM_Codec -c HD_ADPCM_Codec " "Info: Command: quartus_fit --read_settings_files=off --write_settings_files=off HD_ADPCM_Codec -c HD_ADPCM_Codec" {  } {  } 0 0 "Command: %1!s!" 0 0 "" 0 -1}
44 
{ "Info" "IMPP_MPP_USER_DEVICE" "HD_ADPCM_Codec EP2C20F484C7 " "Info: Selected device EP2C20F484C7 for design \"HD_ADPCM_Codec\"" {  } {  } 0 0 "Selected device %2!s! for design \"%1!s!\"" 0 0 "" 0 -1}
45 
{ "Info" "ICUT_CUT_USING_OPERATING_CONDITION" "Low junction temperature 0 degrees C " "Info: Low junction temperature is 0 degrees C" {  } {  } 0 0 "%1!s! is %2!s!" 0 0 "" 0 -1}
46 
{ "Info" "ICUT_CUT_USING_OPERATING_CONDITION" "High junction temperature 85 degrees C " "Info: High junction temperature is 85 degrees C" {  } {  } 0 0 "%1!s! is %2!s!" 0 0 "" 0 -1}
47 
{ "Info" "IFITCC_FITCC_INFO_AUTO_FIT_COMPILATION_ON" "" "Info: Fitter is performing an Auto Fit compilation, which may decrease Fitter effort to reduce compilation time" {  } {  } 0 0 "Fitter is performing an Auto Fit compilation, which may decrease Fitter effort to reduce compilation time" 0 0 "" 0 -1}
48 
{ "Warning" "WCPT_FEATURE_DISABLED_POST" "LogicLock " "Warning: Feature LogicLock is not available with your current license" {  } {  } 0 0 "Feature %1!s! is not available with your current license" 0 0 "" 0 -1}
49 
{ "Info" "IFSAC_FSAC_MIGRATION_NOT_SELECTED" "" "Info: Device migration not selected. If you intend to use device migration later, you may need to change the pin assignments as they may be incompatible with other devices" { { "Info" "IFSAC_FSAC_MIGRATION_NOT_SELECTED_SUB" "EP2C15AF484C7 " "Info: Device EP2C15AF484C7 is compatible" {  } {  } 2 0 "Device %1!s! is compatible" 0 0 "" 0 -1} { "Info" "IFSAC_FSAC_MIGRATION_NOT_SELECTED_SUB" "EP2C35F484C7 " "Info: Device EP2C35F484C7 is compatible" {  } {  } 2 0 "Device %1!s! is compatible" 0 0 "" 0 -1} { "Info" "IFSAC_FSAC_MIGRATION_NOT_SELECTED_SUB" "EP2C50F484C7 " "Info: Device EP2C50F484C7 is compatible" {  } {  } 2 0 "Device %1!s! is compatible" 0 0 "" 0 -1}  } {  } 2 0 "Device migration not selected. If you intend to use device migration later, you may need to change the pin assignments as they may be incompatible with other devices" 0 0 "" 0 -1}
50 
{ "Info" "IFIOMGR_RESERVED_PIN_WITH_LOCATION" "3 " "Info: Fitter converted 3 user pins into dedicated programming pins" { { "Info" "IFIOMGR_RESERVED_PIN_WITH_LOCATION_SUB" "~ASDO~ C4 " "Info: Pin ~ASDO~ is reserved at location C4" {  } { { "c:/altera/90/quartus/bin/pin_planner.ppl" "" { PinPlanner "c:/altera/90/quartus/bin/pin_planner.ppl" { ~ASDO~ } } } { "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" "" { ~ASDO~ } "NODE_NAME" } }  } 0 0 "Pin %1!s! is reserved at location %2!s!" 0 0 "" 0 -1} { "Info" "IFIOMGR_RESERVED_PIN_WITH_LOCATION_SUB" "~nCSO~ C3 " "Info: Pin ~nCSO~ is reserved at location C3" {  } { { "c:/altera/90/quartus/bin/pin_planner.ppl" "" { PinPlanner "c:/altera/90/quartus/bin/pin_planner.ppl" { ~nCSO~ } } } { "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" "" { ~nCSO~ } "NODE_NAME" } }  } 0 0 "Pin %1!s! is reserved at location %2!s!" 0 0 "" 0 -1} { "Info" "IFIOMGR_RESERVED_PIN_WITH_LOCATION_SUB" "~LVDS91p/nCEO~ W20 " "Info: Pin ~LVDS91p/nCEO~ is reserved at location W20" {  } { { "c:/altera/90/quartus/bin/pin_planner.ppl" "" { PinPlanner "c:/altera/90/quartus/bin/pin_planner.ppl" { ~LVDS91p/nCEO~ } } } { "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" "" { ~LVDS91p/nCEO~ } "NODE_NAME" } }  } 0 0 "Pin %1!s! is reserved at location %2!s!" 0 0 "" 0 -1}  } {  } 0 0 "Fitter converted %1!d! user pins into dedicated programming pins" 0 0 "" 0 -1}
51 
{ "Info" "ITDC_FITTER_TIMING_ENGINE" "Classic " "Info: Fitter is using the Classic Timing Analyzer" {  } {  } 0 0 "Fitter is using the %1!s! Timing Analyzer" 0 0 "" 0 -1}
52 
{ "Info" "ITAN_TDC_NO_DEFAULT_OPTIMIZATION_GOALS" "" "Info: Timing requirements not specified -- quality metrics such as performance and power consumption may be sacrificed to reduce compilation time." {  } {  } 0 0 "Timing requirements not specified -- quality metrics such as performance and power consumption may be sacrificed to reduce compilation time." 0 0 "" 0 -1}
53 
{ "Info" "IFSAC_FSAC_ASSIGN_AUTO_GLOBAL_TO_SIGNAL" "CLOCK_IN (placed in PIN D12 (CLK10, LVDSCLK5n, Input)) " "Info: Automatically promoted node CLOCK_IN (placed in PIN D12 (CLK10, LVDSCLK5n, Input))" { { "Info" "IFSAC_FSAC_ASSIGN_AUTO_GLOBAL_TO_SIGNAL_FANOUTS" "destinations Global Clock CLKCTRL_G11 " "Info: Automatically promoted destinations to use location or clock signal Global Clock CLKCTRL_G11" {  } {  } 0 0 "Automatically promoted %1!s! to use location or clock signal %2!s!" 0 0 "" 0 -1} { "Info" "IFSAC_FSAC_GLOBAL_UNASSIGNED_FANOUTS" "" "Info: Following destination nodes may be non-global or may not use global or regional clocks" { { "Info" "IFSAC_FSAC_GLOBAL_UNASSIGNED_FANOUTS_SUB" "I2S_Driver:u3\|I2S_Clock " "Info: Destination node I2S_Driver:u3\|I2S_Clock" {  } { { "HD_ADPCM_Codec.vhd" "" { Text "D:/HD_ADPCM/HD_ADPCM_1Bit_Stereo_Decoder/HD_ADPCM_Codec.vhd" 754 -1 0 } } { "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" "" { I2S_Driver:u3|I2S_Clock } "NODE_NAME" } }  } 0 0 "Destination node %1!s!" 0 0 "" 0 -1} { "Info" "IFSAC_FSAC_GLOBAL_UNASSIGNED_FANOUTS_SUB" "Flash_Memory_Driver:u4\|Flash_Memory_Clock " "Info: Destination node Flash_Memory_Driver:u4\|Flash_Memory_Clock" {  } { { "HD_ADPCM_Codec.vhd" "" { Text "D:/HD_ADPCM/HD_ADPCM_1Bit_Stereo_Decoder/HD_ADPCM_Codec.vhd" 832 -1 0 } } { "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" "" { Flash_Memory_Driver:u4|Flash_Memory_Clock } "NODE_NAME" } }  } 0 0 "Destination node %1!s!" 0 0 "" 0 -1} { "Info" "IFSAC_FSAC_GLOBAL_UNASSIGNED_FANOUTS_SUB" "I2S_ACTIVE_IN " "Info: Destination node I2S_ACTIVE_IN" {  } { { "HD_ADPCM_Codec.vhd" "" { Text "D:/HD_ADPCM/HD_ADPCM_1Bit_Stereo_Decoder/HD_ADPCM_Codec.vhd" 153 -1 0 } } { "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" "" { I2S_ACTIVE_IN } "NODE_NAME" } }  } 0 0 "Destination node %1!s!" 0 0 "" 0 -1}  } {  } 0 0 "Following destination nodes may be non-global or may not use global or regional clocks" 0 0 "" 0 -1}  } { { "c:/altera/90/quartus/bin/pin_planner.ppl" "" { PinPlanner "c:/altera/90/quartus/bin/pin_planner.ppl" { CLOCK_IN } } } { "c:/altera/90/quartus/bin/Assignment Editor.qase" "" { Assignment "c:/altera/90/quartus/bin/Assignment Editor.qase" 1 { { 0 "CLOCK_IN" } } } } { "HD_ADPCM_Codec.vhd" "" { Text "D:/HD_ADPCM/HD_ADPCM_1Bit_Stereo_Decoder/HD_ADPCM_Codec.vhd" 12 -1 0 } } { "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" "" { CLOCK_IN } "NODE_NAME" } }  } 0 0 "Automatically promoted node %1!s! %2!s!" 0 0 "" 0 -1}
54 
{ "Info" "IFSAC_FSAC_ASSIGN_AUTO_GLOBAL_TO_SIGNAL" "Flash_Memory_Driver:u4\|Flash_Memory_Clock  " "Info: Automatically promoted node Flash_Memory_Driver:u4\|Flash_Memory_Clock " { { "Info" "IFSAC_FSAC_ASSIGN_AUTO_GLOBAL_TO_SIGNAL_FANOUTS" "destinations Global Clock " "Info: Automatically promoted destinations to use location or clock signal Global Clock" {  } {  } 0 0 "Automatically promoted %1!s! to use location or clock signal %2!s!" 0 0 "" 0 -1} { "Info" "IFSAC_FSAC_GLOBAL_UNASSIGNED_FANOUTS" "" "Info: Following destination nodes may be non-global or may not use global or regional clocks" { { "Info" "IFSAC_FSAC_GLOBAL_UNASSIGNED_FANOUTS_SUB" "Flash_Memory_Driver:u4\|Flash_Memory_Clock~1 " "Info: Destination node Flash_Memory_Driver:u4\|Flash_Memory_Clock~1" {  } { { "HD_ADPCM_Codec.vhd" "" { Text "D:/HD_ADPCM/HD_ADPCM_1Bit_Stereo_Decoder/HD_ADPCM_Codec.vhd" 832 -1 0 } } { "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" "" { Flash_Memory_Driver:u4|Flash_Memory_Clock~1 } "NODE_NAME" } }  } 0 0 "Destination node %1!s!" 0 0 "" 0 -1}  } {  } 0 0 "Following destination nodes may be non-global or may not use global or regional clocks" 0 0 "" 0 -1}  } { { "HD_ADPCM_Codec.vhd" "" { Text "D:/HD_ADPCM/HD_ADPCM_1Bit_Stereo_Decoder/HD_ADPCM_Codec.vhd" 832 -1 0 } } { "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" "" { Flash_Memory_Driver:u4|Flash_Memory_Clock } "NODE_NAME" } }  } 0 0 "Automatically promoted node %1!s! %2!s!" 0 0 "" 0 -1}
55 
{ "Info" "IFSAC_FSAC_ASSIGN_AUTO_GLOBAL_TO_SIGNAL" "I2S_Driver:u3\|I2S_PCM_DATA_ACCESS_OUT  " "Info: Automatically promoted node I2S_Driver:u3\|I2S_PCM_DATA_ACCESS_OUT " { { "Info" "IFSAC_FSAC_ASSIGN_AUTO_GLOBAL_TO_SIGNAL_FANOUTS" "destinations Global Clock " "Info: Automatically promoted destinations to use location or clock signal Global Clock" {  } {  } 0 0 "Automatically promoted %1!s! to use location or clock signal %2!s!" 0 0 "" 0 -1}  } { { "HD_ADPCM_Codec.vhd" "" { Text "D:/HD_ADPCM/HD_ADPCM_1Bit_Stereo_Decoder/HD_ADPCM_Codec.vhd" 690 -1 0 } } { "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" "" { I2S_Driver:u3|I2S_PCM_DATA_ACCESS_OUT } "NODE_NAME" } }  } 0 0 "Automatically promoted node %1!s! %2!s!" 0 0 "" 0 -1}
56 
{ "Info" "IFSAC_FSAC_ASSIGN_AUTO_GLOBAL_TO_SIGNAL" "I2S_Driver:u3\|I2S_Clock  " "Info: Automatically promoted node I2S_Driver:u3\|I2S_Clock " { { "Info" "IFSAC_FSAC_ASSIGN_AUTO_GLOBAL_TO_SIGNAL_FANOUTS" "destinations Global Clock " "Info: Automatically promoted destinations to use location or clock signal Global Clock" {  } {  } 0 0 "Automatically promoted %1!s! to use location or clock signal %2!s!" 0 0 "" 0 -1} { "Info" "IFSAC_FSAC_GLOBAL_UNASSIGNED_FANOUTS" "" "Info: Following destination nodes may be non-global or may not use global or regional clocks" { { "Info" "IFSAC_FSAC_GLOBAL_UNASSIGNED_FANOUTS_SUB" "I2S_Driver:u3\|I2S_PCM_DATA_ACCESS_OUT " "Info: Destination node I2S_Driver:u3\|I2S_PCM_DATA_ACCESS_OUT" {  } { { "HD_ADPCM_Codec.vhd" "" { Text "D:/HD_ADPCM/HD_ADPCM_1Bit_Stereo_Decoder/HD_ADPCM_Codec.vhd" 690 -1 0 } } { "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" "" { I2S_Driver:u3|I2S_PCM_DATA_ACCESS_OUT } "NODE_NAME" } }  } 0 0 "Destination node %1!s!" 0 0 "" 0 -1} { "Info" "IFSAC_FSAC_GLOBAL_UNASSIGNED_FANOUTS_SUB" "I2S_Driver:u3\|I2S_Clock~1 " "Info: Destination node I2S_Driver:u3\|I2S_Clock~1" {  } { { "HD_ADPCM_Codec.vhd" "" { Text "D:/HD_ADPCM/HD_ADPCM_1Bit_Stereo_Decoder/HD_ADPCM_Codec.vhd" 754 -1 0 } } { "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" "" { I2S_Driver:u3|I2S_Clock~1 } "NODE_NAME" } }  } 0 0 "Destination node %1!s!" 0 0 "" 0 -1} { "Info" "IFSAC_FSAC_GLOBAL_UNASSIGNED_FANOUTS_SUB" "I2S_CLOCK_OUT " "Info: Destination node I2S_CLOCK_OUT" {  } { { "c:/altera/90/quartus/bin/pin_planner.ppl" "" { PinPlanner "c:/altera/90/quartus/bin/pin_planner.ppl" { I2S_CLOCK_OUT } } } { "c:/altera/90/quartus/bin/Assignment Editor.qase" "" { Assignment "c:/altera/90/quartus/bin/Assignment Editor.qase" 1 { { 0 "I2S_CLOCK_OUT" } } } } { "HD_ADPCM_Codec.vhd" "" { Text "D:/HD_ADPCM/HD_ADPCM_1Bit_Stereo_Decoder/HD_ADPCM_Codec.vhd" 21 -1 0 } } { "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" "" { I2S_CLOCK_OUT } "NODE_NAME" } }  } 0 0 "Destination node %1!s!" 0 0 "" 0 -1}  } {  } 0 0 "Following destination nodes may be non-global or may not use global or regional clocks" 0 0 "" 0 -1}  } { { "HD_ADPCM_Codec.vhd" "" { Text "D:/HD_ADPCM/HD_ADPCM_1Bit_Stereo_Decoder/HD_ADPCM_Codec.vhd" 754 -1 0 } } { "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" "" { I2S_Driver:u3|I2S_Clock } "NODE_NAME" } }  } 0 0 "Automatically promoted node %1!s! %2!s!" 0 0 "" 0 -1}
57 
{ "Info" "IFSAC_FSAC_REGISTER_PACKING_START_REGPACKING_INFO" "" "Info: Starting register packing" {  } {  } 0 0 "Starting register packing" 0 0 "" 0 -1}
58 
{ "Extra Info" "IFSAC_FSAC_START_REG_LOCATION_PROCESSING" "" "Extra Info: Performing register packing on registers with non-logic cell location assignments" {  } {  } 1 0 "Performing register packing on registers with non-logic cell location assignments" 1 0 "" 0 -1}
59 
{ "Extra Info" "IFSAC_FSAC_FINISH_REG_LOCATION_PROCESSING" "" "Extra Info: Completed register packing on registers with non-logic cell location assignments" {  } {  } 1 0 "Completed register packing on registers with non-logic cell location assignments" 1 0 "" 0 -1}
60 
{ "Extra Info" "IFSAC_FSAC_REGISTER_PACKING_BEGIN_FAST_REGISTER_INFO" "" "Extra Info: Started Fast Input/Output/OE register processing" {  } {  } 1 0 "Started Fast Input/Output/OE register processing" 1 0 "" 0 -1}
61 
{ "Extra Info" "IFSAC_FSAC_REGISTER_PACKING_FINISH_FAST_REGISTER_INFO" "" "Extra Info: Finished Fast Input/Output/OE register processing" {  } {  } 1 0 "Finished Fast Input/Output/OE register processing" 1 0 "" 0 -1}
62 
{ "Extra Info" "IFSAC_FSAC_START_IO_MULT_RAM_PACKING" "" "Extra Info: Moving registers into I/O cells, Multiplier Blocks, and RAM blocks to improve timing and density" {  } {  } 1 0 "Moving registers into I/O cells, Multiplier Blocks, and RAM blocks to improve timing and density" 1 0 "" 0 -1}
63 
{ "Extra Info" "IFSAC_FSAC_FINISH_IO_MULT_RAM_PACKING" "" "Extra Info: Finished moving registers into I/O cells, Multiplier Blocks, and RAM blocks" {  } {  } 1 0 "Finished moving registers into I/O cells, Multiplier Blocks, and RAM blocks" 1 0 "" 0 -1}
64 
{ "Info" "IFSAC_FSAC_REGISTER_PACKING_FINISH_REGPACKING_INFO" "" "Info: Finished register packing" { { "Extra Info" "IFSAC_NUM_REGISTERS_PACKED_INTO_ATOM_TYPE" "40 Embedded multiplier block " "Extra Info: Packed 40 registers into blocks of type Embedded multiplier block" {  } {  } 1 0 "Packed %1!d! registers into blocks of type %2!s!" 0 0 "" 0 -1} { "Extra Info" "IFSAC_NUM_REGISTERS_DUPLICATED" "40 " "Extra Info: Created 40 register duplicates" {  } {  } 1 0 "Created %1!d! register duplicates" 0 0 "" 0 -1}  } {  } 0 0 "Finished register packing" 0 0 "" 0 -1}
65 
{ "Info" "IFITCC_FITTER_PREPARATION_END" "00:00:02 " "Info: Fitter preparation operations ending: elapsed time is 00:00:02" {  } {  } 0 0 "Fitter preparation operations ending: elapsed time is %1!s!" 0 0 "" 0 -1}
66 
{ "Info" "IFITAPI_FITAPI_VPR_FITTER_PLACEMENT_PREP_START" "" "Info: Fitter placement preparation operations beginning" {  } {  } 0 0 "Fitter placement preparation operations beginning" 0 0 "" 0 -1}
67 
{ "Info" "IFITAPI_FITAPI_VPR_FITTER_PLACEMENT_PREP_END" "00:00:00 " "Info: Fitter placement preparation operations ending: elapsed time is 00:00:00" {  } {  } 0 0 "Fitter placement preparation operations ending: elapsed time is %1!s!" 0 0 "" 0 -1}
68 
{ "Info" "IFITAPI_FITAPI_VPR_FITTER_PLACEMENT_START" "" "Info: Fitter placement operations beginning" {  } {  } 0 0 "Fitter placement operations beginning" 0 0 "" 0 -1}
69 
{ "Info" "IFITAPI_FITAPI_INFO_VPR_PLACEMENT_FINISH" "" "Info: Fitter placement was successful" {  } {  } 0 0 "Fitter placement was successful" 0 0 "" 0 -1}
70 
{ "Info" "IFITAPI_FITAPI_VPR_FITTER_PLACEMENT_END" "00:00:03 " "Info: Fitter placement operations ending: elapsed time is 00:00:03" {  } {  } 0 0 "Fitter placement operations ending: elapsed time is %1!s!" 0 0 "" 0 -1}
71 
{ "Info" "ITDB_FULL_SLACK_TPD_RESULT" "register ADPCM_Decoder_1_Bit:u6\|ADPCM_Decoder_Step_Size_Table_Pointer\[9\] register ADPCM_Decoder_1_Bit:u6\|PCM_Data_Difference\[0\] -48.815 ns " "Info: Slack time is -48.815 ns between source register \"ADPCM_Decoder_1_Bit:u6\|ADPCM_Decoder_Step_Size_Table_Pointer\[9\]\" and destination register \"ADPCM_Decoder_1_Bit:u6\|PCM_Data_Difference\[0\]\"" { { "Info" "ITDB_FULL_P2P_REQUIREMENT_RESULT" "0.768 ns + Largest register register " "Info: + Largest register to register requirement is 0.768 ns" {  } {  } 0 0 "%2!c! %3!s! %4!s! to %5!s! requirement is %1!s!" 0 0 "" 0 -1} { "Info" "ITDB_FULL_CLOCK_PATH_RESULT" "CLOCK_IN destination 2.608 ns   Shortest register " "Info:   Shortest clock path from clock \"CLOCK_IN\" to destination register is 2.608 ns" { { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.783 ns) 0.783 ns CLOCK_IN 1 CLK Unassigned 4 " "Info: 1: + IC(0.000 ns) + CELL(0.783 ns) = 0.783 ns; Loc. = Unassigned; Fanout = 4; CLK Node = 'CLOCK_IN'" {  } { { "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" "" { CLOCK_IN } "NODE_NAME" } } { "HD_ADPCM_Codec.vhd" "" { Text "D:/HD_ADPCM/HD_ADPCM_1Bit_Stereo_Decoder/HD_ADPCM_Codec.vhd" 12 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 -1} { "Info" "ITDB_NODE_DELAY" "IC(0.235 ns) + CELL(0.000 ns) 1.018 ns CLOCK_IN~clkctrl 2 COMB Unassigned 325 " "Info: 2: + IC(0.235 ns) + CELL(0.000 ns) = 1.018 ns; Loc. = Unassigned; Fanout = 325; COMB Node = 'CLOCK_IN~clkctrl'" {  } { { "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" "0.235 ns" { CLOCK_IN CLOCK_IN~clkctrl } "NODE_NAME" } } { "HD_ADPCM_Codec.vhd" "" { Text "D:/HD_ADPCM/HD_ADPCM_1Bit_Stereo_Decoder/HD_ADPCM_Codec.vhd" 12 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 -1} { "Info" "ITDB_NODE_DELAY" "IC(0.988 ns) + CELL(0.602 ns) 2.608 ns ADPCM_Decoder_1_Bit:u6\|PCM_Data_Difference\[0\] 3 REG Unassigned 1 " "Info: 3: + IC(0.988 ns) + CELL(0.602 ns) = 2.608 ns; Loc. = Unassigned; Fanout = 1; REG Node = 'ADPCM_Decoder_1_Bit:u6\|PCM_Data_Difference\[0\]'" {  } { { "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" "1.590 ns" { CLOCK_IN~clkctrl ADPCM_Decoder_1_Bit:u6|PCM_Data_Difference[0] } "NODE_NAME" } } { "HD_ADPCM_Codec.vhd" "" { Text "D:/HD_ADPCM/HD_ADPCM_1Bit_Stereo_Decoder/HD_ADPCM_Codec.vhd" 943 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 -1} { "Info" "ITDB_TOTAL_CELL_DELAY" "1.385 ns ( 53.11 % ) " "Info: Total cell delay = 1.385 ns ( 53.11 % )" {  } {  } 0 0 "Total cell delay = %1!s! %2!s!" 0 0 "" 0 -1} { "Info" "ITDB_TOTAL_IC_DELAY" "1.223 ns ( 46.89 % ) " "Info: Total interconnect delay = 1.223 ns ( 46.89 % )" {  } {  } 0 0 "Total interconnect delay = %1!s! %2!s!" 0 0 "" 0 -1}  } { { "HD_ADPCM_Codec.vhd" "" { Text "D:/HD_ADPCM/HD_ADPCM_1Bit_Stereo_Decoder/HD_ADPCM_Codec.vhd" 12 -1 0 } }  } 0 0 "%4!c! %5!s! clock path from clock \"%1!s!\" to %2!s! %6!s! is %3!s!" 0 0 "" 0 -1} { "Info" "ITDB_FULL_CLOCK_PATH_RESULT" "CLOCK_IN destination 2.608 ns   Longest register " "Info:   Longest clock path from clock \"CLOCK_IN\" to destination register is 2.608 ns" { { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.783 ns) 0.783 ns CLOCK_IN 1 CLK Unassigned 4 " "Info: 1: + IC(0.000 ns) + CELL(0.783 ns) = 0.783 ns; Loc. = Unassigned; Fanout = 4; CLK Node = 'CLOCK_IN'" {  } { { "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" "" { CLOCK_IN } "NODE_NAME" } } { "HD_ADPCM_Codec.vhd" "" { Text "D:/HD_ADPCM/HD_ADPCM_1Bit_Stereo_Decoder/HD_ADPCM_Codec.vhd" 12 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 -1} { "Info" "ITDB_NODE_DELAY" "IC(0.235 ns) + CELL(0.000 ns) 1.018 ns CLOCK_IN~clkctrl 2 COMB Unassigned 325 " "Info: 2: + IC(0.235 ns) + CELL(0.000 ns) = 1.018 ns; Loc. = Unassigned; Fanout = 325; COMB Node = 'CLOCK_IN~clkctrl'" {  } { { "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" "0.235 ns" { CLOCK_IN CLOCK_IN~clkctrl } "NODE_NAME" } } { "HD_ADPCM_Codec.vhd" "" { Text "D:/HD_ADPCM/HD_ADPCM_1Bit_Stereo_Decoder/HD_ADPCM_Codec.vhd" 12 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 -1} { "Info" "ITDB_NODE_DELAY" "IC(0.988 ns) + CELL(0.602 ns) 2.608 ns ADPCM_Decoder_1_Bit:u6\|PCM_Data_Difference\[0\] 3 REG Unassigned 1 " "Info: 3: + IC(0.988 ns) + CELL(0.602 ns) = 2.608 ns; Loc. = Unassigned; Fanout = 1; REG Node = 'ADPCM_Decoder_1_Bit:u6\|PCM_Data_Difference\[0\]'" {  } { { "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" "1.590 ns" { CLOCK_IN~clkctrl ADPCM_Decoder_1_Bit:u6|PCM_Data_Difference[0] } "NODE_NAME" } } { "HD_ADPCM_Codec.vhd" "" { Text "D:/HD_ADPCM/HD_ADPCM_1Bit_Stereo_Decoder/HD_ADPCM_Codec.vhd" 943 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 -1} { "Info" "ITDB_TOTAL_CELL_DELAY" "1.385 ns ( 53.11 % ) " "Info: Total cell delay = 1.385 ns ( 53.11 % )" {  } {  } 0 0 "Total cell delay = %1!s! %2!s!" 0 0 "" 0 -1} { "Info" "ITDB_TOTAL_IC_DELAY" "1.223 ns ( 46.89 % ) " "Info: Total interconnect delay = 1.223 ns ( 46.89 % )" {  } {  } 0 0 "Total interconnect delay = %1!s! %2!s!" 0 0 "" 0 -1}  } { { "HD_ADPCM_Codec.vhd" "" { Text "D:/HD_ADPCM/HD_ADPCM_1Bit_Stereo_Decoder/HD_ADPCM_Codec.vhd" 12 -1 0 } }  } 0 0 "%4!c! %5!s! clock path from clock \"%1!s!\" to %2!s! %6!s! is %3!s!" 0 0 "" 0 -1} { "Info" "ITDB_FULL_CLOCK_PATH_RESULT" "CLOCK_IN source 2.878 ns   Shortest register " "Info:   Shortest clock path from clock \"CLOCK_IN\" to source register is 2.878 ns" { { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.783 ns) 0.783 ns CLOCK_IN 1 CLK Unassigned 4 " "Info: 1: + IC(0.000 ns) + CELL(0.783 ns) = 0.783 ns; Loc. = Unassigned; Fanout = 4; CLK Node = 'CLOCK_IN'" {  } { { "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" "" { CLOCK_IN } "NODE_NAME" } } { "HD_ADPCM_Codec.vhd" "" { Text "D:/HD_ADPCM/HD_ADPCM_1Bit_Stereo_Decoder/HD_ADPCM_Codec.vhd" 12 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 -1} { "Info" "ITDB_NODE_DELAY" "IC(0.235 ns) + CELL(0.000 ns) 1.018 ns CLOCK_IN~clkctrl 2 COMB Unassigned 325 " "Info: 2: + IC(0.235 ns) + CELL(0.000 ns) = 1.018 ns; Loc. = Unassigned; Fanout = 325; COMB Node = 'CLOCK_IN~clkctrl'" {  } { { "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" "0.235 ns" { CLOCK_IN CLOCK_IN~clkctrl } "NODE_NAME" } } { "HD_ADPCM_Codec.vhd" "" { Text "D:/HD_ADPCM/HD_ADPCM_1Bit_Stereo_Decoder/HD_ADPCM_Codec.vhd" 12 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 -1} { "Info" "ITDB_NODE_DELAY" "IC(0.988 ns) + CELL(0.872 ns) 2.878 ns ADPCM_Decoder_1_Bit:u6\|ADPCM_Decoder_Step_Size_Table_Pointer\[9\] 3 REG Unassigned 11 " "Info: 3: + IC(0.988 ns) + CELL(0.872 ns) = 2.878 ns; Loc. = Unassigned; Fanout = 11; REG Node = 'ADPCM_Decoder_1_Bit:u6\|ADPCM_Decoder_Step_Size_Table_Pointer\[9\]'" {  } { { "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" "1.860 ns" { CLOCK_IN~clkctrl ADPCM_Decoder_1_Bit:u6|ADPCM_Decoder_Step_Size_Table_Pointer[9] } "NODE_NAME" } } { "HD_ADPCM_Codec.vhd" "" { Text "D:/HD_ADPCM/HD_ADPCM_1Bit_Stereo_Decoder/HD_ADPCM_Codec.vhd" 943 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 -1} { "Info" "ITDB_TOTAL_CELL_DELAY" "1.655 ns ( 57.51 % ) " "Info: Total cell delay = 1.655 ns ( 57.51 % )" {  } {  } 0 0 "Total cell delay = %1!s! %2!s!" 0 0 "" 0 -1} { "Info" "ITDB_TOTAL_IC_DELAY" "1.223 ns ( 42.49 % ) " "Info: Total interconnect delay = 1.223 ns ( 42.49 % )" {  } {  } 0 0 "Total interconnect delay = %1!s! %2!s!" 0 0 "" 0 -1}  } { { "HD_ADPCM_Codec.vhd" "" { Text "D:/HD_ADPCM/HD_ADPCM_1Bit_Stereo_Decoder/HD_ADPCM_Codec.vhd" 12 -1 0 } }  } 0 0 "%4!c! %5!s! clock path from clock \"%1!s!\" to %2!s! %6!s! is %3!s!" 0 0 "" 0 -1} { "Info" "ITDB_FULL_CLOCK_PATH_RESULT" "CLOCK_IN source 2.878 ns   Longest register " "Info:   Longest clock path from clock \"CLOCK_IN\" to source register is 2.878 ns" { { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.783 ns) 0.783 ns CLOCK_IN 1 CLK Unassigned 4 " "Info: 1: + IC(0.000 ns) + CELL(0.783 ns) = 0.783 ns; Loc. = Unassigned; Fanout = 4; CLK Node = 'CLOCK_IN'" {  } { { "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" "" { CLOCK_IN } "NODE_NAME" } } { "HD_ADPCM_Codec.vhd" "" { Text "D:/HD_ADPCM/HD_ADPCM_1Bit_Stereo_Decoder/HD_ADPCM_Codec.vhd" 12 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 -1} { "Info" "ITDB_NODE_DELAY" "IC(0.235 ns) + CELL(0.000 ns) 1.018 ns CLOCK_IN~clkctrl 2 COMB Unassigned 325 " "Info: 2: + IC(0.235 ns) + CELL(0.000 ns) = 1.018 ns; Loc. = Unassigned; Fanout = 325; COMB Node = 'CLOCK_IN~clkctrl'" {  } { { "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" "0.235 ns" { CLOCK_IN CLOCK_IN~clkctrl } "NODE_NAME" } } { "HD_ADPCM_Codec.vhd" "" { Text "D:/HD_ADPCM/HD_ADPCM_1Bit_Stereo_Decoder/HD_ADPCM_Codec.vhd" 12 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 -1} { "Info" "ITDB_NODE_DELAY" "IC(0.988 ns) + CELL(0.872 ns) 2.878 ns ADPCM_Decoder_1_Bit:u6\|ADPCM_Decoder_Step_Size_Table_Pointer\[9\] 3 REG Unassigned 11 " "Info: 3: + IC(0.988 ns) + CELL(0.872 ns) = 2.878 ns; Loc. = Unassigned; Fanout = 11; REG Node = 'ADPCM_Decoder_1_Bit:u6\|ADPCM_Decoder_Step_Size_Table_Pointer\[9\]'" {  } { { "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" "1.860 ns" { CLOCK_IN~clkctrl ADPCM_Decoder_1_Bit:u6|ADPCM_Decoder_Step_Size_Table_Pointer[9] } "NODE_NAME" } } { "HD_ADPCM_Codec.vhd" "" { Text "D:/HD_ADPCM/HD_ADPCM_1Bit_Stereo_Decoder/HD_ADPCM_Codec.vhd" 943 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 -1} { "Info" "ITDB_TOTAL_CELL_DELAY" "1.655 ns ( 57.51 % ) " "Info: Total cell delay = 1.655 ns ( 57.51 % )" {  } {  } 0 0 "Total cell delay = %1!s! %2!s!" 0 0 "" 0 -1} { "Info" "ITDB_TOTAL_IC_DELAY" "1.223 ns ( 42.49 % ) " "Info: Total interconnect delay = 1.223 ns ( 42.49 % )" {  } {  } 0 0 "Total interconnect delay = %1!s! %2!s!" 0 0 "" 0 -1}  } { { "HD_ADPCM_Codec.vhd" "" { Text "D:/HD_ADPCM/HD_ADPCM_1Bit_Stereo_Decoder/HD_ADPCM_Codec.vhd" 12 -1 0 } }  } 0 0 "%4!c! %5!s! clock path from clock \"%1!s!\" to %2!s! %6!s! is %3!s!" 0 0 "" 0 -1} { "Info" "ITDB_FULL_TCO_DELAY" "0.000 ns   " "Info:   Micro clock to output delay of source is 0.000 ns" {  } { { "HD_ADPCM_Codec.vhd" "" { Text "D:/HD_ADPCM/HD_ADPCM_1Bit_Stereo_Decoder/HD_ADPCM_Codec.vhd" 943 -1 0 } }  } 0 0 "%2!c! Micro clock to output delay of source is %1!s!" 0 0 "" 0 -1} { "Info" "ITDB_FULL_TSU_DELAY" "-0.038 ns   " "Info:   Micro setup delay of destination is -0.038 ns" {  } { { "HD_ADPCM_Codec.vhd" "" { Text "D:/HD_ADPCM/HD_ADPCM_1Bit_Stereo_Decoder/HD_ADPCM_Codec.vhd" 943 -1 0 } }  } 0 0 "%2!c! Micro setup delay of destination is %1!s!" 0 0 "" 0 -1} { "Info" "ITDB_FULL_DATA_PATH_RESULT" "49.583 ns - Longest register register " "Info: - Longest register to register delay is 49.583 ns" { { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.000 ns) 0.000 ns ADPCM_Decoder_1_Bit:u6\|ADPCM_Decoder_Step_Size_Table_Pointer\[9\] 1 REG Unassigned 11 " "Info: 1: + IC(0.000 ns) + CELL(0.000 ns) = 0.000 ns; Loc. = Unassigned; Fanout = 11; REG Node = 'ADPCM_Decoder_1_Bit:u6\|ADPCM_Decoder_Step_Size_Table_Pointer\[9\]'" {  } { { "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" "" { ADPCM_Decoder_1_Bit:u6|ADPCM_Decoder_Step_Size_Table_Pointer[9] } "NODE_NAME" } } { "HD_ADPCM_Codec.vhd" "" { Text "D:/HD_ADPCM/HD_ADPCM_1Bit_Stereo_Decoder/HD_ADPCM_Codec.vhd" 943 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 -1} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(3.257 ns) 3.257 ns ADPCM_Decoder_1_Bit:u6\|lpm_mult:Mult0\|mult_pu01:auto_generated\|mac_mult1~DATAOUT15 2 COMB Unassigned 1 " "Info: 2: + IC(0.000 ns) + CELL(3.257 ns) = 3.257 ns; Loc. = Unassigned; Fanout = 1; COMB Node = 'ADPCM_Decoder_1_Bit:u6\|lpm_mult:Mult0\|mult_pu01:auto_generated\|mac_mult1~DATAOUT15'" {  } { { "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" "3.257 ns" { ADPCM_Decoder_1_Bit:u6|ADPCM_Decoder_Step_Size_Table_Pointer[9] ADPCM_Decoder_1_Bit:u6|lpm_mult:Mult0|mult_pu01:auto_generated|mac_mult1~DATAOUT15 } "NODE_NAME" } } { "db/mult_pu01.tdf" "" { Text "D:/HD_ADPCM/HD_ADPCM_1Bit_Stereo_Decoder/db/mult_pu01.tdf" 35 2 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 -1} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.304 ns) 3.561 ns ADPCM_Decoder_1_Bit:u6\|lpm_mult:Mult0\|mult_pu01:auto_generated\|mac_out2~DATAOUT15 3 COMB Unassigned 4 " "Info: 3: + IC(0.000 ns) + CELL(0.304 ns) = 3.561 ns; Loc. = Unassigned; Fanout = 4; COMB Node = 'ADPCM_Decoder_1_Bit:u6\|lpm_mult:Mult0\|mult_pu01:auto_generated\|mac_out2~DATAOUT15'" {  } { { "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" "0.304 ns" { ADPCM_Decoder_1_Bit:u6|lpm_mult:Mult0|mult_pu01:auto_generated|mac_mult1~DATAOUT15 ADPCM_Decoder_1_Bit:u6|lpm_mult:Mult0|mult_pu01:auto_generated|mac_out2~DATAOUT15 } "NODE_NAME" } } { "db/mult_pu01.tdf" "" { Text "D:/HD_ADPCM/HD_ADPCM_1Bit_Stereo_Decoder/db/mult_pu01.tdf" 44 2 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 -1} { "Info" "ITDB_NODE_DELAY" "IC(0.965 ns) + CELL(0.517 ns) 5.043 ns ADPCM_Decoder_1_Bit:u6\|lpm_divide:Div0\|lpm_divide_aem:auto_generated\|sign_div_unsign_klh:divider\|alt_u_div_e2f:divider\|add_sub_6_result_int\[2\]~1 4 COMB Unassigned 2 " "Info: 4: + IC(0.965 ns) + CELL(0.517 ns) = 5.043 ns; Loc. = Unassigned; Fanout = 2; COMB Node = 'ADPCM_Decoder_1_Bit:u6\|lpm_divide:Div0\|lpm_divide_aem:auto_generated\|sign_div_unsign_klh:divider\|alt_u_div_e2f:divider\|add_sub_6_result_int\[2\]~1'" {  } { { "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" "1.482 ns" { ADPCM_Decoder_1_Bit:u6|lpm_mult:Mult0|mult_pu01:auto_generated|mac_out2~DATAOUT15 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_6_result_int[2]~1 } "NODE_NAME" } } { "db/alt_u_div_e2f.tdf" "" { Text "D:/HD_ADPCM/HD_ADPCM_1Bit_Stereo_Decoder/db/alt_u_div_e2f.tdf" 106 22 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 -1} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.080 ns) 5.123 ns ADPCM_Decoder_1_Bit:u6\|lpm_divide:Div0\|lpm_divide_aem:auto_generated\|sign_div_unsign_klh:divider\|alt_u_div_e2f:divider\|add_sub_6_result_int\[3\]~3 5 COMB Unassigned 2 " "Info: 5: + IC(0.000 ns) + CELL(0.080 ns) = 5.123 ns; Loc. = Unassigned; Fanout = 2; COMB Node = 'ADPCM_Decoder_1_Bit:u6\|lpm_divide:Div0\|lpm_divide_aem:auto_generated\|sign_div_unsign_klh:divider\|alt_u_div_e2f:divider\|add_sub_6_result_int\[3\]~3'" {  } { { "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" "0.080 ns" { ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_6_result_int[2]~1 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_6_result_int[3]~3 } "NODE_NAME" } } { "db/alt_u_div_e2f.tdf" "" { Text "D:/HD_ADPCM/HD_ADPCM_1Bit_Stereo_Decoder/db/alt_u_div_e2f.tdf" 106 22 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 -1} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.080 ns) 5.203 ns ADPCM_Decoder_1_Bit:u6\|lpm_divide:Div0\|lpm_divide_aem:auto_generated\|sign_div_unsign_klh:divider\|alt_u_div_e2f:divider\|add_sub_6_result_int\[4\]~5 6 COMB Unassigned 2 " "Info: 6: + IC(0.000 ns) + CELL(0.080 ns) = 5.203 ns; Loc. = Unassigned; Fanout = 2; COMB Node = 'ADPCM_Decoder_1_Bit:u6\|lpm_divide:Div0\|lpm_divide_aem:auto_generated\|sign_div_unsign_klh:divider\|alt_u_div_e2f:divider\|add_sub_6_result_int\[4\]~5'" {  } { { "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" "0.080 ns" { ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_6_result_int[3]~3 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_6_result_int[4]~5 } "NODE_NAME" } } { "db/alt_u_div_e2f.tdf" "" { Text "D:/HD_ADPCM/HD_ADPCM_1Bit_Stereo_Decoder/db/alt_u_div_e2f.tdf" 106 22 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 -1} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.080 ns) 5.283 ns ADPCM_Decoder_1_Bit:u6\|lpm_divide:Div0\|lpm_divide_aem:auto_generated\|sign_div_unsign_klh:divider\|alt_u_div_e2f:divider\|add_sub_6_result_int\[5\]~7 7 COMB Unassigned 2 " "Info: 7: + IC(0.000 ns) + CELL(0.080 ns) = 5.283 ns; Loc. = Unassigned; Fanout = 2; COMB Node = 'ADPCM_Decoder_1_Bit:u6\|lpm_divide:Div0\|lpm_divide_aem:auto_generated\|sign_div_unsign_klh:divider\|alt_u_div_e2f:divider\|add_sub_6_result_int\[5\]~7'" {  } { { "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" "0.080 ns" { ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_6_result_int[4]~5 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_6_result_int[5]~7 } "NODE_NAME" } } { "db/alt_u_div_e2f.tdf" "" { Text "D:/HD_ADPCM/HD_ADPCM_1Bit_Stereo_Decoder/db/alt_u_div_e2f.tdf" 106 22 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 -1} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.080 ns) 5.363 ns ADPCM_Decoder_1_Bit:u6\|lpm_divide:Div0\|lpm_divide_aem:auto_generated\|sign_div_unsign_klh:divider\|alt_u_div_e2f:divider\|add_sub_6_result_int\[6\]~9 8 COMB Unassigned 1 " "Info: 8: + IC(0.000 ns) + CELL(0.080 ns) = 5.363 ns; Loc. = Unassigned; Fanout = 1; COMB Node = 'ADPCM_Decoder_1_Bit:u6\|lpm_divide:Div0\|lpm_divide_aem:auto_generated\|sign_div_unsign_klh:divider\|alt_u_div_e2f:divider\|add_sub_6_result_int\[6\]~9'" {  } { { "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" "0.080 ns" { ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_6_result_int[5]~7 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_6_result_int[6]~9 } "NODE_NAME" } } { "db/alt_u_div_e2f.tdf" "" { Text "D:/HD_ADPCM/HD_ADPCM_1Bit_Stereo_Decoder/db/alt_u_div_e2f.tdf" 106 22 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 -1} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.458 ns) 5.821 ns ADPCM_Decoder_1_Bit:u6\|lpm_divide:Div0\|lpm_divide_aem:auto_generated\|sign_div_unsign_klh:divider\|alt_u_div_e2f:divider\|add_sub_6_result_int\[7\]~10 9 COMB Unassigned 19 " "Info: 9: + IC(0.000 ns) + CELL(0.458 ns) = 5.821 ns; Loc. = Unassigned; Fanout = 19; COMB Node = 'ADPCM_Decoder_1_Bit:u6\|lpm_divide:Div0\|lpm_divide_aem:auto_generated\|sign_div_unsign_klh:divider\|alt_u_div_e2f:divider\|add_sub_6_result_int\[7\]~10'" {  } { { "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" "0.458 ns" { ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_6_result_int[6]~9 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_6_result_int[7]~10 } "NODE_NAME" } } { "db/alt_u_div_e2f.tdf" "" { Text "D:/HD_ADPCM/HD_ADPCM_1Bit_Stereo_Decoder/db/alt_u_div_e2f.tdf" 106 22 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 -1} { "Info" "ITDB_NODE_DELAY" "IC(1.073 ns) + CELL(0.177 ns) 7.071 ns ADPCM_Decoder_1_Bit:u6\|lpm_divide:Div0\|lpm_divide_aem:auto_generated\|sign_div_unsign_klh:divider\|alt_u_div_e2f:divider\|StageOut\[50\]~221 10 COMB Unassigned 2 " "Info: 10: + IC(1.073 ns) + CELL(0.177 ns) = 7.071 ns; Loc. = Unassigned; Fanout = 2; COMB Node = 'ADPCM_Decoder_1_Bit:u6\|lpm_divide:Div0\|lpm_divide_aem:auto_generated\|sign_div_unsign_klh:divider\|alt_u_div_e2f:divider\|StageOut\[50\]~221'" {  } { { "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" "1.250 ns" { ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_6_result_int[7]~10 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|StageOut[50]~221 } "NODE_NAME" } } { "db/alt_u_div_e2f.tdf" "" { Text "D:/HD_ADPCM/HD_ADPCM_1Bit_Stereo_Decoder/db/alt_u_div_e2f.tdf" 138 10 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 -1} { "Info" "ITDB_NODE_DELAY" "IC(1.073 ns) + CELL(0.495 ns) 8.639 ns ADPCM_Decoder_1_Bit:u6\|lpm_divide:Div0\|lpm_divide_aem:auto_generated\|sign_div_unsign_klh:divider\|alt_u_div_e2f:divider\|add_sub_7_result_int\[3\]~3 11 COMB Unassigned 2 " "Info: 11: + IC(1.073 ns) + CELL(0.495 ns) = 8.639 ns; Loc. = Unassigned; Fanout = 2; COMB Node = 'ADPCM_Decoder_1_Bit:u6\|lpm_divide:Div0\|lpm_divide_aem:auto_generated\|sign_div_unsign_klh:divider\|alt_u_div_e2f:divider\|add_sub_7_result_int\[3\]~3'" {  } { { "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" "1.568 ns" { ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|StageOut[50]~221 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_7_result_int[3]~3 } "NODE_NAME" } } { "db/alt_u_div_e2f.tdf" "" { Text "D:/HD_ADPCM/HD_ADPCM_1Bit_Stereo_Decoder/db/alt_u_div_e2f.tdf" 111 22 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 -1} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.080 ns) 8.719 ns ADPCM_Decoder_1_Bit:u6\|lpm_divide:Div0\|lpm_divide_aem:auto_generated\|sign_div_unsign_klh:divider\|alt_u_div_e2f:divider\|add_sub_7_result_int\[4\]~5 12 COMB Unassigned 2 " "Info: 12: + IC(0.000 ns) + CELL(0.080 ns) = 8.719 ns; Loc. = Unassigned; Fanout = 2; COMB Node = 'ADPCM_Decoder_1_Bit:u6\|lpm_divide:Div0\|lpm_divide_aem:auto_generated\|sign_div_unsign_klh:divider\|alt_u_div_e2f:divider\|add_sub_7_result_int\[4\]~5'" {  } { { "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" "0.080 ns" { ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_7_result_int[3]~3 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_7_result_int[4]~5 } "NODE_NAME" } } { "db/alt_u_div_e2f.tdf" "" { Text "D:/HD_ADPCM/HD_ADPCM_1Bit_Stereo_Decoder/db/alt_u_div_e2f.tdf" 111 22 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 -1} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.080 ns) 8.799 ns ADPCM_Decoder_1_Bit:u6\|lpm_divide:Div0\|lpm_divide_aem:auto_generated\|sign_div_unsign_klh:divider\|alt_u_div_e2f:divider\|add_sub_7_result_int\[5\]~7 13 COMB Unassigned 2 " "Info: 13: + IC(0.000 ns) + CELL(0.080 ns) = 8.799 ns; Loc. = Unassigned; Fanout = 2; COMB Node = 'ADPCM_Decoder_1_Bit:u6\|lpm_divide:Div0\|lpm_divide_aem:auto_generated\|sign_div_unsign_klh:divider\|alt_u_div_e2f:divider\|add_sub_7_result_int\[5\]~7'" {  } { { "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" "0.080 ns" { ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_7_result_int[4]~5 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_7_result_int[5]~7 } "NODE_NAME" } } { "db/alt_u_div_e2f.tdf" "" { Text "D:/HD_ADPCM/HD_ADPCM_1Bit_Stereo_Decoder/db/alt_u_div_e2f.tdf" 111 22 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 -1} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.080 ns) 8.879 ns ADPCM_Decoder_1_Bit:u6\|lpm_divide:Div0\|lpm_divide_aem:auto_generated\|sign_div_unsign_klh:divider\|alt_u_div_e2f:divider\|add_sub_7_result_int\[6\]~9 14 COMB Unassigned 1 " "Info: 14: + IC(0.000 ns) + CELL(0.080 ns) = 8.879 ns; Loc. = Unassigned; Fanout = 1; COMB Node = 'ADPCM_Decoder_1_Bit:u6\|lpm_divide:Div0\|lpm_divide_aem:auto_generated\|sign_div_unsign_klh:divider\|alt_u_div_e2f:divider\|add_sub_7_result_int\[6\]~9'" {  } { { "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" "0.080 ns" { ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_7_result_int[5]~7 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_7_result_int[6]~9 } "NODE_NAME" } } { "db/alt_u_div_e2f.tdf" "" { Text "D:/HD_ADPCM/HD_ADPCM_1Bit_Stereo_Decoder/db/alt_u_div_e2f.tdf" 111 22 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 -1} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.080 ns) 8.959 ns ADPCM_Decoder_1_Bit:u6\|lpm_divide:Div0\|lpm_divide_aem:auto_generated\|sign_div_unsign_klh:divider\|alt_u_div_e2f:divider\|add_sub_7_result_int\[7\]~11 15 COMB Unassigned 1 " "Info: 15: + IC(0.000 ns) + CELL(0.080 ns) = 8.959 ns; Loc. = Unassigned; Fanout = 1; COMB Node = 'ADPCM_Decoder_1_Bit:u6\|lpm_divide:Div0\|lpm_divide_aem:auto_generated\|sign_div_unsign_klh:divider\|alt_u_div_e2f:divider\|add_sub_7_result_int\[7\]~11'" {  } { { "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" "0.080 ns" { ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_7_result_int[6]~9 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_7_result_int[7]~11 } "NODE_NAME" } } { "db/alt_u_div_e2f.tdf" "" { Text "D:/HD_ADPCM/HD_ADPCM_1Bit_Stereo_Decoder/db/alt_u_div_e2f.tdf" 111 22 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 -1} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.458 ns) 9.417 ns ADPCM_Decoder_1_Bit:u6\|lpm_divide:Div0\|lpm_divide_aem:auto_generated\|sign_div_unsign_klh:divider\|alt_u_div_e2f:divider\|add_sub_7_result_int\[8\]~12 16 COMB Unassigned 20 " "Info: 16: + IC(0.000 ns) + CELL(0.458 ns) = 9.417 ns; Loc. = Unassigned; Fanout = 20; COMB Node = 'ADPCM_Decoder_1_Bit:u6\|lpm_divide:Div0\|lpm_divide_aem:auto_generated\|sign_div_unsign_klh:divider\|alt_u_div_e2f:divider\|add_sub_7_result_int\[8\]~12'" {  } { { "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" "0.458 ns" { ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_7_result_int[7]~11 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_7_result_int[8]~12 } "NODE_NAME" } } { "db/alt_u_div_e2f.tdf" "" { Text "D:/HD_ADPCM/HD_ADPCM_1Bit_Stereo_Decoder/db/alt_u_div_e2f.tdf" 111 22 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 -1} { "Info" "ITDB_NODE_DELAY" "IC(0.388 ns) + CELL(0.521 ns) 10.326 ns ADPCM_Decoder_1_Bit:u6\|lpm_divide:Div0\|lpm_divide_aem:auto_generated\|sign_div_unsign_klh:divider\|alt_u_div_e2f:divider\|StageOut\[58\]~197 17 COMB Unassigned 2 " "Info: 17: + IC(0.388 ns) + CELL(0.521 ns) = 10.326 ns; Loc. = Unassigned; Fanout = 2; COMB Node = 'ADPCM_Decoder_1_Bit:u6\|lpm_divide:Div0\|lpm_divide_aem:auto_generated\|sign_div_unsign_klh:divider\|alt_u_div_e2f:divider\|StageOut\[58\]~197'" {  } { { "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" "0.909 ns" { ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_7_result_int[8]~12 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|StageOut[58]~197 } "NODE_NAME" } } { "db/alt_u_div_e2f.tdf" "" { Text "D:/HD_ADPCM/HD_ADPCM_1Bit_Stereo_Decoder/db/alt_u_div_e2f.tdf" 138 10 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 -1} { "Info" "ITDB_NODE_DELAY" "IC(1.015 ns) + CELL(0.517 ns) 11.858 ns ADPCM_Decoder_1_Bit:u6\|lpm_divide:Div0\|lpm_divide_aem:auto_generated\|sign_div_unsign_klh:divider\|alt_u_div_e2f:divider\|add_sub_8_result_int\[3\]~3 18 COMB Unassigned 2 " "Info: 18: + IC(1.015 ns) + CELL(0.517 ns) = 11.858 ns; Loc. = Unassigned; Fanout = 2; COMB Node = 'ADPCM_Decoder_1_Bit:u6\|lpm_divide:Div0\|lpm_divide_aem:auto_generated\|sign_div_unsign_klh:divider\|alt_u_div_e2f:divider\|add_sub_8_result_int\[3\]~3'" {  } { { "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" "1.532 ns" { ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|StageOut[58]~197 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_8_result_int[3]~3 } "NODE_NAME" } } { "db/alt_u_div_e2f.tdf" "" { Text "D:/HD_ADPCM/HD_ADPCM_1Bit_Stereo_Decoder/db/alt_u_div_e2f.tdf" 116 22 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 -1} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.080 ns) 11.938 ns ADPCM_Decoder_1_Bit:u6\|lpm_divide:Div0\|lpm_divide_aem:auto_generated\|sign_div_unsign_klh:divider\|alt_u_div_e2f:divider\|add_sub_8_result_int\[4\]~5 19 COMB Unassigned 2 " "Info: 19: + IC(0.000 ns) + CELL(0.080 ns) = 11.938 ns; Loc. = Unassigned; Fanout = 2; COMB Node = 'ADPCM_Decoder_1_Bit:u6\|lpm_divide:Div0\|lpm_divide_aem:auto_generated\|sign_div_unsign_klh:divider\|alt_u_div_e2f:divider\|add_sub_8_result_int\[4\]~5'" {  } { { "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" "0.080 ns" { ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_8_result_int[3]~3 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_8_result_int[4]~5 } "NODE_NAME" } } { "db/alt_u_div_e2f.tdf" "" { Text "D:/HD_ADPCM/HD_ADPCM_1Bit_Stereo_Decoder/db/alt_u_div_e2f.tdf" 116 22 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 -1} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.080 ns) 12.018 ns ADPCM_Decoder_1_Bit:u6\|lpm_divide:Div0\|lpm_divide_aem:auto_generated\|sign_div_unsign_klh:divider\|alt_u_div_e2f:divider\|add_sub_8_result_int\[5\]~7 20 COMB Unassigned 2 " "Info: 20: + IC(0.000 ns) + CELL(0.080 ns) = 12.018 ns; Loc. = Unassigned; Fanout = 2; COMB Node = 'ADPCM_Decoder_1_Bit:u6\|lpm_divide:Div0\|lpm_divide_aem:auto_generated\|sign_div_unsign_klh:divider\|alt_u_div_e2f:divider\|add_sub_8_result_int\[5\]~7'" {  } { { "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" "0.080 ns" { ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_8_result_int[4]~5 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_8_result_int[5]~7 } "NODE_NAME" } } { "db/alt_u_div_e2f.tdf" "" { Text "D:/HD_ADPCM/HD_ADPCM_1Bit_Stereo_Decoder/db/alt_u_div_e2f.tdf" 116 22 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 -1} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.080 ns) 12.098 ns ADPCM_Decoder_1_Bit:u6\|lpm_divide:Div0\|lpm_divide_aem:auto_generated\|sign_div_unsign_klh:divider\|alt_u_div_e2f:divider\|add_sub_8_result_int\[6\]~9 21 COMB Unassigned 1 " "Info: 21: + IC(0.000 ns) + CELL(0.080 ns) = 12.098 ns; Loc. = Unassigned; Fanout = 1; COMB Node = 'ADPCM_Decoder_1_Bit:u6\|lpm_divide:Div0\|lpm_divide_aem:auto_generated\|sign_div_unsign_klh:divider\|alt_u_div_e2f:divider\|add_sub_8_result_int\[6\]~9'" {  } { { "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" "0.080 ns" { ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_8_result_int[5]~7 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_8_result_int[6]~9 } "NODE_NAME" } } { "db/alt_u_div_e2f.tdf" "" { Text "D:/HD_ADPCM/HD_ADPCM_1Bit_Stereo_Decoder/db/alt_u_div_e2f.tdf" 116 22 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 -1} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.080 ns) 12.178 ns ADPCM_Decoder_1_Bit:u6\|lpm_divide:Div0\|lpm_divide_aem:auto_generated\|sign_div_unsign_klh:divider\|alt_u_div_e2f:divider\|add_sub_8_result_int\[7\]~11 22 COMB Unassigned 1 " "Info: 22: + IC(0.000 ns) + CELL(0.080 ns) = 12.178 ns; Loc. = Unassigned; Fanout = 1; COMB Node = 'ADPCM_Decoder_1_Bit:u6\|lpm_divide:Div0\|lpm_divide_aem:auto_generated\|sign_div_unsign_klh:divider\|alt_u_div_e2f:divider\|add_sub_8_result_int\[7\]~11'" {  } { { "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" "0.080 ns" { ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_8_result_int[6]~9 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_8_result_int[7]~11 } "NODE_NAME" } } { "db/alt_u_div_e2f.tdf" "" { Text "D:/HD_ADPCM/HD_ADPCM_1Bit_Stereo_Decoder/db/alt_u_div_e2f.tdf" 116 22 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 -1} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.458 ns) 12.636 ns ADPCM_Decoder_1_Bit:u6\|lpm_divide:Div0\|lpm_divide_aem:auto_generated\|sign_div_unsign_klh:divider\|alt_u_div_e2f:divider\|add_sub_8_result_int\[8\]~12 23 COMB Unassigned 20 " "Info: 23: + IC(0.000 ns) + CELL(0.458 ns) = 12.636 ns; Loc. = Unassigned; Fanout = 20; COMB Node = 'ADPCM_Decoder_1_Bit:u6\|lpm_divide:Div0\|lpm_divide_aem:auto_generated\|sign_div_unsign_klh:divider\|alt_u_div_e2f:divider\|add_sub_8_result_int\[8\]~12'" {  } { { "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" "0.458 ns" { ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_8_result_int[7]~11 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_8_result_int[8]~12 } "NODE_NAME" } } { "db/alt_u_div_e2f.tdf" "" { Text "D:/HD_ADPCM/HD_ADPCM_1Bit_Stereo_Decoder/db/alt_u_div_e2f.tdf" 116 22 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 -1} { "Info" "ITDB_NODE_DELAY" "IC(1.039 ns) + CELL(0.178 ns) 13.853 ns ADPCM_Decoder_1_Bit:u6\|lpm_divide:Div0\|lpm_divide_aem:auto_generated\|sign_div_unsign_klh:divider\|alt_u_div_e2f:divider\|StageOut\[67\]~581 24 COMB Unassigned 3 " "Info: 24: + IC(1.039 ns) + CELL(0.178 ns) = 13.853 ns; Loc. = Unassigned; Fanout = 3; COMB Node = 'ADPCM_Decoder_1_Bit:u6\|lpm_divide:Div0\|lpm_divide_aem:auto_generated\|sign_div_unsign_klh:divider\|alt_u_div_e2f:divider\|StageOut\[67\]~581'" {  } { { "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" "1.217 ns" { ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_8_result_int[8]~12 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|StageOut[67]~581 } "NODE_NAME" } } { "db/alt_u_div_e2f.tdf" "" { Text "D:/HD_ADPCM/HD_ADPCM_1Bit_Stereo_Decoder/db/alt_u_div_e2f.tdf" 138 10 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 -1} { "Info" "ITDB_NODE_DELAY" "IC(1.375 ns) + CELL(0.517 ns) 15.745 ns ADPCM_Decoder_1_Bit:u6\|lpm_divide:Div0\|lpm_divide_aem:auto_generated\|sign_div_unsign_klh:divider\|alt_u_div_e2f:divider\|add_sub_9_result_int\[4\]~5 25 COMB Unassigned 2 " "Info: 25: + IC(1.375 ns) + CELL(0.517 ns) = 15.745 ns; Loc. = Unassigned; Fanout = 2; COMB Node = 'ADPCM_Decoder_1_Bit:u6\|lpm_divide:Div0\|lpm_divide_aem:auto_generated\|sign_div_unsign_klh:divider\|alt_u_div_e2f:divider\|add_sub_9_result_int\[4\]~5'" {  } { { "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" "1.892 ns" { ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|StageOut[67]~581 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_9_result_int[4]~5 } "NODE_NAME" } } { "db/alt_u_div_e2f.tdf" "" { Text "D:/HD_ADPCM/HD_ADPCM_1Bit_Stereo_Decoder/db/alt_u_div_e2f.tdf" 121 22 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 -1} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.080 ns) 15.825 ns ADPCM_Decoder_1_Bit:u6\|lpm_divide:Div0\|lpm_divide_aem:auto_generated\|sign_div_unsign_klh:divider\|alt_u_div_e2f:divider\|add_sub_9_result_int\[5\]~7 26 COMB Unassigned 2 " "Info: 26: + IC(0.000 ns) + CELL(0.080 ns) = 15.825 ns; Loc. = Unassigned; Fanout = 2; COMB Node = 'ADPCM_Decoder_1_Bit:u6\|lpm_divide:Div0\|lpm_divide_aem:auto_generated\|sign_div_unsign_klh:divider\|alt_u_div_e2f:divider\|add_sub_9_result_int\[5\]~7'" {  } { { "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" "0.080 ns" { ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_9_result_int[4]~5 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_9_result_int[5]~7 } "NODE_NAME" } } { "db/alt_u_div_e2f.tdf" "" { Text "D:/HD_ADPCM/HD_ADPCM_1Bit_Stereo_Decoder/db/alt_u_div_e2f.tdf" 121 22 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 -1} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.080 ns) 15.905 ns ADPCM_Decoder_1_Bit:u6\|lpm_divide:Div0\|lpm_divide_aem:auto_generated\|sign_div_unsign_klh:divider\|alt_u_div_e2f:divider\|add_sub_9_result_int\[6\]~9 27 COMB Unassigned 1 " "Info: 27: + IC(0.000 ns) + CELL(0.080 ns) = 15.905 ns; Loc. = Unassigned; Fanout = 1; COMB Node = 'ADPCM_Decoder_1_Bit:u6\|lpm_divide:Div0\|lpm_divide_aem:auto_generated\|sign_div_unsign_klh:divider\|alt_u_div_e2f:divider\|add_sub_9_result_int\[6\]~9'" {  } { { "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" "0.080 ns" { ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_9_result_int[5]~7 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_9_result_int[6]~9 } "NODE_NAME" } } { "db/alt_u_div_e2f.tdf" "" { Text "D:/HD_ADPCM/HD_ADPCM_1Bit_Stereo_Decoder/db/alt_u_div_e2f.tdf" 121 22 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 -1} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.080 ns) 15.985 ns ADPCM_Decoder_1_Bit:u6\|lpm_divide:Div0\|lpm_divide_aem:auto_generated\|sign_div_unsign_klh:divider\|alt_u_div_e2f:divider\|add_sub_9_result_int\[7\]~11 28 COMB Unassigned 1 " "Info: 28: + IC(0.000 ns) + CELL(0.080 ns) = 15.985 ns; Loc. = Unassigned; Fanout = 1; COMB Node = 'ADPCM_Decoder_1_Bit:u6\|lpm_divide:Div0\|lpm_divide_aem:auto_generated\|sign_div_unsign_klh:divider\|alt_u_div_e2f:divider\|add_sub_9_result_int\[7\]~11'" {  } { { "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" "0.080 ns" { ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_9_result_int[6]~9 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_9_result_int[7]~11 } "NODE_NAME" } } { "db/alt_u_div_e2f.tdf" "" { Text "D:/HD_ADPCM/HD_ADPCM_1Bit_Stereo_Decoder/db/alt_u_div_e2f.tdf" 121 22 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 -1} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.458 ns) 16.443 ns ADPCM_Decoder_1_Bit:u6\|lpm_divide:Div0\|lpm_divide_aem:auto_generated\|sign_div_unsign_klh:divider\|alt_u_div_e2f:divider\|add_sub_9_result_int\[8\]~12 29 COMB Unassigned 20 " "Info: 29: + IC(0.000 ns) + CELL(0.458 ns) = 16.443 ns; Loc. = Unassigned; Fanout = 20; COMB Node = 'ADPCM_Decoder_1_Bit:u6\|lpm_divide:Div0\|lpm_divide_aem:auto_generated\|sign_div_unsign_klh:divider\|alt_u_div_e2f:divider\|add_sub_9_result_int\[8\]~12'" {  } { { "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" "0.458 ns" { ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_9_result_int[7]~11 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_9_result_int[8]~12 } "NODE_NAME" } } { "db/alt_u_div_e2f.tdf" "" { Text "D:/HD_ADPCM/HD_ADPCM_1Bit_Stereo_Decoder/db/alt_u_div_e2f.tdf" 121 22 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 -1} { "Info" "ITDB_NODE_DELAY" "IC(1.039 ns) + CELL(0.177 ns) 17.659 ns ADPCM_Decoder_1_Bit:u6\|lpm_divide:Div0\|lpm_divide_aem:auto_generated\|sign_div_unsign_klh:divider\|alt_u_div_e2f:divider\|StageOut\[73\]~174 30 COMB Unassigned 2 " "Info: 30: + IC(1.039 ns) + CELL(0.177 ns) = 17.659 ns; Loc. = Unassigned; Fanout = 2; COMB Node = 'ADPCM_Decoder_1_Bit:u6\|lpm_divide:Div0\|lpm_divide_aem:auto_generated\|sign_div_unsign_klh:divider\|alt_u_div_e2f:divider\|StageOut\[73\]~174'" {  } { { "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" "1.216 ns" { ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_9_result_int[8]~12 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|StageOut[73]~174 } "NODE_NAME" } } { "db/alt_u_div_e2f.tdf" "" { Text "D:/HD_ADPCM/HD_ADPCM_1Bit_Stereo_Decoder/db/alt_u_div_e2f.tdf" 138 10 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 -1} { "Info" "ITDB_NODE_DELAY" "IC(0.498 ns) + CELL(0.495 ns) 18.652 ns ADPCM_Decoder_1_Bit:u6\|lpm_divide:Div0\|lpm_divide_aem:auto_generated\|sign_div_unsign_klh:divider\|alt_u_div_e2f:divider\|add_sub_10_result_int\[2\]~1 31 COMB Unassigned 2 " "Info: 31: + IC(0.498 ns) + CELL(0.495 ns) = 18.652 ns; Loc. = Unassigned; Fanout = 2; COMB Node = 'ADPCM_Decoder_1_Bit:u6\|lpm_divide:Div0\|lpm_divide_aem:auto_generated\|sign_div_unsign_klh:divider\|alt_u_div_e2f:divider\|add_sub_10_result_int\[2\]~1'" {  } { { "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" "0.993 ns" { ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|StageOut[73]~174 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_10_result_int[2]~1 } "NODE_NAME" } } { "db/alt_u_div_e2f.tdf" "" { Text "D:/HD_ADPCM/HD_ADPCM_1Bit_Stereo_Decoder/db/alt_u_div_e2f.tdf" 36 23 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 -1} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.080 ns) 18.732 ns ADPCM_Decoder_1_Bit:u6\|lpm_divide:Div0\|lpm_divide_aem:auto_generated\|sign_div_unsign_klh:divider\|alt_u_div_e2f:divider\|add_sub_10_result_int\[3\]~3 32 COMB Unassigned 2 " "Info: 32: + IC(0.000 ns) + CELL(0.080 ns) = 18.732 ns; Loc. = Unassigned; Fanout = 2; COMB Node = 'ADPCM_Decoder_1_Bit:u6\|lpm_divide:Div0\|lpm_divide_aem:auto_generated\|sign_div_unsign_klh:divider\|alt_u_div_e2f:divider\|add_sub_10_result_int\[3\]~3'" {  } { { "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" "0.080 ns" { ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_10_result_int[2]~1 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_10_result_int[3]~3 } "NODE_NAME" } } { "db/alt_u_div_e2f.tdf" "" { Text "D:/HD_ADPCM/HD_ADPCM_1Bit_Stereo_Decoder/db/alt_u_div_e2f.tdf" 36 23 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 -1} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.080 ns) 18.812 ns ADPCM_Decoder_1_Bit:u6\|lpm_divide:Div0\|lpm_divide_aem:auto_generated\|sign_div_unsign_klh:divider\|alt_u_div_e2f:divider\|add_sub_10_result_int\[4\]~5 33 COMB Unassigned 2 " "Info: 33: + IC(0.000 ns) + CELL(0.080 ns) = 18.812 ns; Loc. = Unassigned; Fanout = 2; COMB Node = 'ADPCM_Decoder_1_Bit:u6\|lpm_divide:Div0\|lpm_divide_aem:auto_generated\|sign_div_unsign_klh:divider\|alt_u_div_e2f:divider\|add_sub_10_result_int\[4\]~5'" {  } { { "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" "0.080 ns" { ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_10_result_int[3]~3 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_10_result_int[4]~5 } "NODE_NAME" } } { "db/alt_u_div_e2f.tdf" "" { Text "D:/HD_ADPCM/HD_ADPCM_1Bit_Stereo_Decoder/db/alt_u_div_e2f.tdf" 36 23 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 -1} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.080 ns) 18.892 ns ADPCM_Decoder_1_Bit:u6\|lpm_divide:Div0\|lpm_divide_aem:auto_generated\|sign_div_unsign_klh:divider\|alt_u_div_e2f:divider\|add_sub_10_result_int\[5\]~7 34 COMB Unassigned 2 " "Info: 34: + IC(0.000 ns) + CELL(0.080 ns) = 18.892 ns; Loc. = Unassigned; Fanout = 2; COMB Node = 'ADPCM_Decoder_1_Bit:u6\|lpm_divide:Div0\|lpm_divide_aem:auto_generated\|sign_div_unsign_klh:divider\|alt_u_div_e2f:divider\|add_sub_10_result_int\[5\]~7'" {  } { { "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" "0.080 ns" { ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_10_result_int[4]~5 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_10_result_int[5]~7 } "NODE_NAME" } } { "db/alt_u_div_e2f.tdf" "" { Text "D:/HD_ADPCM/HD_ADPCM_1Bit_Stereo_Decoder/db/alt_u_div_e2f.tdf" 36 23 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 -1} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.080 ns) 18.972 ns ADPCM_Decoder_1_Bit:u6\|lpm_divide:Div0\|lpm_divide_aem:auto_generated\|sign_div_unsign_klh:divider\|alt_u_div_e2f:divider\|add_sub_10_result_int\[6\]~9 35 COMB Unassigned 1 " "Info: 35: + IC(0.000 ns) + CELL(0.080 ns) = 18.972 ns; Loc. = Unassigned; Fanout = 1; COMB Node = 'ADPCM_Decoder_1_Bit:u6\|lpm_divide:Div0\|lpm_divide_aem:auto_generated\|sign_div_unsign_klh:divider\|alt_u_div_e2f:divider\|add_sub_10_result_int\[6\]~9'" {  } { { "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" "0.080 ns" { ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_10_result_int[5]~7 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_10_result_int[6]~9 } "NODE_NAME" } } { "db/alt_u_div_e2f.tdf" "" { Text "D:/HD_ADPCM/HD_ADPCM_1Bit_Stereo_Decoder/db/alt_u_div_e2f.tdf" 36 23 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 -1} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.080 ns) 19.052 ns ADPCM_Decoder_1_Bit:u6\|lpm_divide:Div0\|lpm_divide_aem:auto_generated\|sign_div_unsign_klh:divider\|alt_u_div_e2f:divider\|add_sub_10_result_int\[7\]~11 36 COMB Unassigned 1 " "Info: 36: + IC(0.000 ns) + CELL(0.080 ns) = 19.052 ns; Loc. = Unassigned; Fanout = 1; COMB Node = 'ADPCM_Decoder_1_Bit:u6\|lpm_divide:Div0\|lpm_divide_aem:auto_generated\|sign_div_unsign_klh:divider\|alt_u_div_e2f:divider\|add_sub_10_result_int\[7\]~11'" {  } { { "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" "0.080 ns" { ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_10_result_int[6]~9 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_10_result_int[7]~11 } "NODE_NAME" } } { "db/alt_u_div_e2f.tdf" "" { Text "D:/HD_ADPCM/HD_ADPCM_1Bit_Stereo_Decoder/db/alt_u_div_e2f.tdf" 36 23 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 -1} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.458 ns) 19.510 ns ADPCM_Decoder_1_Bit:u6\|lpm_divide:Div0\|lpm_divide_aem:auto_generated\|sign_div_unsign_klh:divider\|alt_u_div_e2f:divider\|add_sub_10_result_int\[8\]~12 37 COMB Unassigned 20 " "Info: 37: + IC(0.000 ns) + CELL(0.458 ns) = 19.510 ns; Loc. = Unassigned; Fanout = 20; COMB Node = 'ADPCM_Decoder_1_Bit:u6\|lpm_divide:Div0\|lpm_divide_aem:auto_generated\|sign_div_unsign_klh:divider\|alt_u_div_e2f:divider\|add_sub_10_result_int\[8\]~12'" {  } { { "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" "0.458 ns" { ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_10_result_int[7]~11 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_10_result_int[8]~12 } "NODE_NAME" } } { "db/alt_u_div_e2f.tdf" "" { Text "D:/HD_ADPCM/HD_ADPCM_1Bit_Stereo_Decoder/db/alt_u_div_e2f.tdf" 36 23 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 -1} { "Info" "ITDB_NODE_DELAY" "IC(0.588 ns) + CELL(0.319 ns) 20.417 ns ADPCM_Decoder_1_Bit:u6\|lpm_divide:Div0\|lpm_divide_aem:auto_generated\|sign_div_unsign_klh:divider\|alt_u_div_e2f:divider\|StageOut\[83\]~544 38 COMB Unassigned 3 " "Info: 38: + IC(0.588 ns) + CELL(0.319 ns) = 20.417 ns; Loc. = Unassigned; Fanout = 3; COMB Node = 'ADPCM_Decoder_1_Bit:u6\|lpm_divide:Div0\|lpm_divide_aem:auto_generated\|sign_div_unsign_klh:divider\|alt_u_div_e2f:divider\|StageOut\[83\]~544'" {  } { { "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" "0.907 ns" { ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_10_result_int[8]~12 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|StageOut[83]~544 } "NODE_NAME" } } { "db/alt_u_div_e2f.tdf" "" { Text "D:/HD_ADPCM/HD_ADPCM_1Bit_Stereo_Decoder/db/alt_u_div_e2f.tdf" 138 10 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 -1} { "Info" "ITDB_NODE_DELAY" "IC(1.016 ns) + CELL(0.517 ns) 21.950 ns ADPCM_Decoder_1_Bit:u6\|lpm_divide:Div0\|lpm_divide_aem:auto_generated\|sign_div_unsign_klh:divider\|alt_u_div_e2f:divider\|add_sub_11_result_int\[4\]~5 39 COMB Unassigned 2 " "Info: 39: + IC(1.016 ns) + CELL(0.517 ns) = 21.950 ns; Loc. = Unassigned; Fanout = 2; COMB Node = 'ADPCM_Decoder_1_Bit:u6\|lpm_divide:Div0\|lpm_divide_aem:auto_generated\|sign_div_unsign_klh:divider\|alt_u_div_e2f:divider\|add_sub_11_result_int\[4\]~5'" {  } { { "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" "1.533 ns" { ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|StageOut[83]~544 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_11_result_int[4]~5 } "NODE_NAME" } } { "db/alt_u_div_e2f.tdf" "" { Text "D:/HD_ADPCM/HD_ADPCM_1Bit_Stereo_Decoder/db/alt_u_div_e2f.tdf" 41 23 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 -1} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.080 ns) 22.030 ns ADPCM_Decoder_1_Bit:u6\|lpm_divide:Div0\|lpm_divide_aem:auto_generated\|sign_div_unsign_klh:divider\|alt_u_div_e2f:divider\|add_sub_11_result_int\[5\]~7 40 COMB Unassigned 2 " "Info: 40: + IC(0.000 ns) + CELL(0.080 ns) = 22.030 ns; Loc. = Unassigned; Fanout = 2; COMB Node = 'ADPCM_Decoder_1_Bit:u6\|lpm_divide:Div0\|lpm_divide_aem:auto_generated\|sign_div_unsign_klh:divider\|alt_u_div_e2f:divider\|add_sub_11_result_int\[5\]~7'" {  } { { "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" "0.080 ns" { ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_11_result_int[4]~5 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_11_result_int[5]~7 } "NODE_NAME" } } { "db/alt_u_div_e2f.tdf" "" { Text "D:/HD_ADPCM/HD_ADPCM_1Bit_Stereo_Decoder/db/alt_u_div_e2f.tdf" 41 23 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 -1} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.080 ns) 22.110 ns ADPCM_Decoder_1_Bit:u6\|lpm_divide:Div0\|lpm_divide_aem:auto_generated\|sign_div_unsign_klh:divider\|alt_u_div_e2f:divider\|add_sub_11_result_int\[6\]~9 41 COMB Unassigned 1 " "Info: 41: + IC(0.000 ns) + CELL(0.080 ns) = 22.110 ns; Loc. = Unassigned; Fanout = 1; COMB Node = 'ADPCM_Decoder_1_Bit:u6\|lpm_divide:Div0\|lpm_divide_aem:auto_generated\|sign_div_unsign_klh:divider\|alt_u_div_e2f:divider\|add_sub_11_result_int\[6\]~9'" {  } { { "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" "0.080 ns" { ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_11_result_int[5]~7 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_11_result_int[6]~9 } "NODE_NAME" } } { "db/alt_u_div_e2f.tdf" "" { Text "D:/HD_ADPCM/HD_ADPCM_1Bit_Stereo_Decoder/db/alt_u_div_e2f.tdf" 41 23 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 -1} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.080 ns) 22.190 ns ADPCM_Decoder_1_Bit:u6\|lpm_divide:Div0\|lpm_divide_aem:auto_generated\|sign_div_unsign_klh:divider\|alt_u_div_e2f:divider\|add_sub_11_result_int\[7\]~11 42 COMB Unassigned 1 " "Info: 42: + IC(0.000 ns) + CELL(0.080 ns) = 22.190 ns; Loc. = Unassigned; Fanout = 1; COMB Node = 'ADPCM_Decoder_1_Bit:u6\|lpm_divide:Div0\|lpm_divide_aem:auto_generated\|sign_div_unsign_klh:divider\|alt_u_div_e2f:divider\|add_sub_11_result_int\[7\]~11'" {  } { { "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" "0.080 ns" { ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_11_result_int[6]~9 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_11_result_int[7]~11 } "NODE_NAME" } } { "db/alt_u_div_e2f.tdf" "" { Text "D:/HD_ADPCM/HD_ADPCM_1Bit_Stereo_Decoder/db/alt_u_div_e2f.tdf" 41 23 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 -1} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.458 ns) 22.648 ns ADPCM_Decoder_1_Bit:u6\|lpm_divide:Div0\|lpm_divide_aem:auto_generated\|sign_div_unsign_klh:divider\|alt_u_div_e2f:divider\|add_sub_11_result_int\[8\]~12 43 COMB Unassigned 20 " "Info: 43: + IC(0.000 ns) + CELL(0.458 ns) = 22.648 ns; Loc. = Unassigned; Fanout = 20; COMB Node = 'ADPCM_Decoder_1_Bit:u6\|lpm_divide:Div0\|lpm_divide_aem:auto_generated\|sign_div_unsign_klh:divider\|alt_u_div_e2f:divider\|add_sub_11_result_int\[8\]~12'" {  } { { "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" "0.458 ns" { ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_11_result_int[7]~11 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_11_result_int[8]~12 } "NODE_NAME" } } { "db/alt_u_div_e2f.tdf" "" { Text "D:/HD_ADPCM/HD_ADPCM_1Bit_Stereo_Decoder/db/alt_u_div_e2f.tdf" 41 23 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 -1} { "Info" "ITDB_NODE_DELAY" "IC(0.895 ns) + CELL(0.319 ns) 23.862 ns ADPCM_Decoder_1_Bit:u6\|lpm_divide:Div0\|lpm_divide_aem:auto_generated\|sign_div_unsign_klh:divider\|alt_u_div_e2f:divider\|StageOut\[92\]~547 44 COMB Unassigned 3 " "Info: 44: + IC(0.895 ns) + CELL(0.319 ns) = 23.862 ns; Loc. = Unassigned; Fanout = 3; COMB Node = 'ADPCM_Decoder_1_Bit:u6\|lpm_divide:Div0\|lpm_divide_aem:auto_generated\|sign_div_unsign_klh:divider\|alt_u_div_e2f:divider\|StageOut\[92\]~547'" {  } { { "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" "1.214 ns" { ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_11_result_int[8]~12 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|StageOut[92]~547 } "NODE_NAME" } } { "db/alt_u_div_e2f.tdf" "" { Text "D:/HD_ADPCM/HD_ADPCM_1Bit_Stereo_Decoder/db/alt_u_div_e2f.tdf" 138 10 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 -1} { "Info" "ITDB_NODE_DELAY" "IC(1.017 ns) + CELL(0.517 ns) 25.396 ns ADPCM_Decoder_1_Bit:u6\|lpm_divide:Div0\|lpm_divide_aem:auto_generated\|sign_div_unsign_klh:divider\|alt_u_div_e2f:divider\|add_sub_12_result_int\[5\]~7 45 COMB Unassigned 2 " "Info: 45: + IC(1.017 ns) + CELL(0.517 ns) = 25.396 ns; Loc. = Unassigned; Fanout = 2; COMB Node = 'ADPCM_Decoder_1_Bit:u6\|lpm_divide:Div0\|lpm_divide_aem:auto_generated\|sign_div_unsign_klh:divider\|alt_u_div_e2f:divider\|add_sub_12_result_int\[5\]~7'" {  } { { "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" "1.534 ns" { ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|StageOut[92]~547 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_12_result_int[5]~7 } "NODE_NAME" } } { "db/alt_u_div_e2f.tdf" "" { Text "D:/HD_ADPCM/HD_ADPCM_1Bit_Stereo_Decoder/db/alt_u_div_e2f.tdf" 46 23 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 -1} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.080 ns) 25.476 ns ADPCM_Decoder_1_Bit:u6\|lpm_divide:Div0\|lpm_divide_aem:auto_generated\|sign_div_unsign_klh:divider\|alt_u_div_e2f:divider\|add_sub_12_result_int\[6\]~9 46 COMB Unassigned 1 " "Info: 46: + IC(0.000 ns) + CELL(0.080 ns) = 25.476 ns; Loc. = Unassigned; Fanout = 1; COMB Node = 'ADPCM_Decoder_1_Bit:u6\|lpm_divide:Div0\|lpm_divide_aem:auto_generated\|sign_div_unsign_klh:divider\|alt_u_div_e2f:divider\|add_sub_12_result_int\[6\]~9'" {  } { { "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" "0.080 ns" { ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_12_result_int[5]~7 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_12_result_int[6]~9 } "NODE_NAME" } } { "db/alt_u_div_e2f.tdf" "" { Text "D:/HD_ADPCM/HD_ADPCM_1Bit_Stereo_Decoder/db/alt_u_div_e2f.tdf" 46 23 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 -1} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.080 ns) 25.556 ns ADPCM_Decoder_1_Bit:u6\|lpm_divide:Div0\|lpm_divide_aem:auto_generated\|sign_div_unsign_klh:divider\|alt_u_div_e2f:divider\|add_sub_12_result_int\[7\]~11 47 COMB Unassigned 1 " "Info: 47: + IC(0.000 ns) + CELL(0.080 ns) = 25.556 ns; Loc. = Unassigned; Fanout = 1; COMB Node = 'ADPCM_Decoder_1_Bit:u6\|lpm_divide:Div0\|lpm_divide_aem:auto_generated\|sign_div_unsign_klh:divider\|alt_u_div_e2f:divider\|add_sub_12_result_int\[7\]~11'" {  } { { "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" "0.080 ns" { ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_12_result_int[6]~9 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_12_result_int[7]~11 } "NODE_NAME" } } { "db/alt_u_div_e2f.tdf" "" { Text "D:/HD_ADPCM/HD_ADPCM_1Bit_Stereo_Decoder/db/alt_u_div_e2f.tdf" 46 23 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 -1} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.458 ns) 26.014 ns ADPCM_Decoder_1_Bit:u6\|lpm_divide:Div0\|lpm_divide_aem:auto_generated\|sign_div_unsign_klh:divider\|alt_u_div_e2f:divider\|add_sub_12_result_int\[8\]~12 48 COMB Unassigned 20 " "Info: 48: + IC(0.000 ns) + CELL(0.458 ns) = 26.014 ns; Loc. = Unassigned; Fanout = 20; COMB Node = 'ADPCM_Decoder_1_Bit:u6\|lpm_divide:Div0\|lpm_divide_aem:auto_generated\|sign_div_unsign_klh:divider\|alt_u_div_e2f:divider\|add_sub_12_result_int\[8\]~12'" {  } { { "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" "0.458 ns" { ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_12_result_int[7]~11 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_12_result_int[8]~12 } "NODE_NAME" } } { "db/alt_u_div_e2f.tdf" "" { Text "D:/HD_ADPCM/HD_ADPCM_1Bit_Stereo_Decoder/db/alt_u_div_e2f.tdf" 46 23 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 -1} { "Info" "ITDB_NODE_DELAY" "IC(0.896 ns) + CELL(0.319 ns) 27.229 ns ADPCM_Decoder_1_Bit:u6\|lpm_divide:Div0\|lpm_divide_aem:auto_generated\|sign_div_unsign_klh:divider\|alt_u_div_e2f:divider\|StageOut\[101\]~550 49 COMB Unassigned 3 " "Info: 49: + IC(0.896 ns) + CELL(0.319 ns) = 27.229 ns; Loc. = Unassigned; Fanout = 3; COMB Node = 'ADPCM_Decoder_1_Bit:u6\|lpm_divide:Div0\|lpm_divide_aem:auto_generated\|sign_div_unsign_klh:divider\|alt_u_div_e2f:divider\|StageOut\[101\]~550'" {  } { { "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" "1.215 ns" { ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_12_result_int[8]~12 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|StageOut[101]~550 } "NODE_NAME" } } { "db/alt_u_div_e2f.tdf" "" { Text "D:/HD_ADPCM/HD_ADPCM_1Bit_Stereo_Decoder/db/alt_u_div_e2f.tdf" 138 10 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 -1} { "Info" "ITDB_NODE_DELAY" "IC(1.359 ns) + CELL(0.517 ns) 29.105 ns ADPCM_Decoder_1_Bit:u6\|lpm_divide:Div0\|lpm_divide_aem:auto_generated\|sign_div_unsign_klh:divider\|alt_u_div_e2f:divider\|add_sub_13_result_int\[6\]~9 50 COMB Unassigned 1 " "Info: 50: + IC(1.359 ns) + CELL(0.517 ns) = 29.105 ns; Loc. = Unassigned; Fanout = 1; COMB Node = 'ADPCM_Decoder_1_Bit:u6\|lpm_divide:Div0\|lpm_divide_aem:auto_generated\|sign_div_unsign_klh:divider\|alt_u_div_e2f:divider\|add_sub_13_result_int\[6\]~9'" {  } { { "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" "1.876 ns" { ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|StageOut[101]~550 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_13_result_int[6]~9 } "NODE_NAME" } } { "db/alt_u_div_e2f.tdf" "" { Text "D:/HD_ADPCM/HD_ADPCM_1Bit_Stereo_Decoder/db/alt_u_div_e2f.tdf" 51 23 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 -1} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.080 ns) 29.185 ns ADPCM_Decoder_1_Bit:u6\|lpm_divide:Div0\|lpm_divide_aem:auto_generated\|sign_div_unsign_klh:divider\|alt_u_div_e2f:divider\|add_sub_13_result_int\[7\]~11 51 COMB Unassigned 1 " "Info: 51: + IC(0.000 ns) + CELL(0.080 ns) = 29.185 ns; Loc. = Unassigned; Fanout = 1; COMB Node = 'ADPCM_Decoder_1_Bit:u6\|lpm_divide:Div0\|lpm_divide_aem:auto_generated\|sign_div_unsign_klh:divider\|alt_u_div_e2f:divider\|add_sub_13_result_int\[7\]~11'" {  } { { "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" "0.080 ns" { ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_13_result_int[6]~9 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_13_result_int[7]~11 } "NODE_NAME" } } { "db/alt_u_div_e2f.tdf" "" { Text "D:/HD_ADPCM/HD_ADPCM_1Bit_Stereo_Decoder/db/alt_u_div_e2f.tdf" 51 23 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 -1} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.458 ns) 29.643 ns ADPCM_Decoder_1_Bit:u6\|lpm_divide:Div0\|lpm_divide_aem:auto_generated\|sign_div_unsign_klh:divider\|alt_u_div_e2f:divider\|add_sub_13_result_int\[8\]~12 52 COMB Unassigned 20 " "Info: 52: + IC(0.000 ns) + CELL(0.458 ns) = 29.643 ns; Loc. = Unassigned; Fanout = 20; COMB Node = 'ADPCM_Decoder_1_Bit:u6\|lpm_divide:Div0\|lpm_divide_aem:auto_generated\|sign_div_unsign_klh:divider\|alt_u_div_e2f:divider\|add_sub_13_result_int\[8\]~12'" {  } { { "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" "0.458 ns" { ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_13_result_int[7]~11 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_13_result_int[8]~12 } "NODE_NAME" } } { "db/alt_u_div_e2f.tdf" "" { Text "D:/HD_ADPCM/HD_ADPCM_1Bit_Stereo_Decoder/db/alt_u_div_e2f.tdf" 51 23 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 -1} { "Info" "ITDB_NODE_DELAY" "IC(1.238 ns) + CELL(0.319 ns) 31.200 ns ADPCM_Decoder_1_Bit:u6\|lpm_divide:Div0\|lpm_divide_aem:auto_generated\|sign_div_unsign_klh:divider\|alt_u_div_e2f:divider\|StageOut\[110\]~553 53 COMB Unassigned 1 " "Info: 53: + IC(1.238 ns) + CELL(0.319 ns) = 31.200 ns; Loc. = Unassigned; Fanout = 1; COMB Node = 'ADPCM_Decoder_1_Bit:u6\|lpm_divide:Div0\|lpm_divide_aem:auto_generated\|sign_div_unsign_klh:divider\|alt_u_div_e2f:divider\|StageOut\[110\]~553'" {  } { { "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" "1.557 ns" { ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_13_result_int[8]~12 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|StageOut[110]~553 } "NODE_NAME" } } { "db/alt_u_div_e2f.tdf" "" { Text "D:/HD_ADPCM/HD_ADPCM_1Bit_Stereo_Decoder/db/alt_u_div_e2f.tdf" 138 10 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 -1} { "Info" "ITDB_NODE_DELAY" "IC(1.362 ns) + CELL(0.517 ns) 33.079 ns ADPCM_Decoder_1_Bit:u6\|lpm_divide:Div0\|lpm_divide_aem:auto_generated\|sign_div_unsign_klh:divider\|alt_u_div_e2f:divider\|add_sub_14_result_int\[7\]~11 54 COMB Unassigned 1 " "Info: 54: + IC(1.362 ns) + CELL(0.517 ns) = 33.079 ns; Loc. = Unassigned; Fanout = 1; COMB Node = 'ADPCM_Decoder_1_Bit:u6\|lpm_divide:Div0\|lpm_divide_aem:auto_generated\|sign_div_unsign_klh:divider\|alt_u_div_e2f:divider\|add_sub_14_result_int\[7\]~11'" {  } { { "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" "1.879 ns" { ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|StageOut[110]~553 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_14_result_int[7]~11 } "NODE_NAME" } } { "db/alt_u_div_e2f.tdf" "" { Text "D:/HD_ADPCM/HD_ADPCM_1Bit_Stereo_Decoder/db/alt_u_div_e2f.tdf" 56 23 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 -1} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.458 ns) 33.537 ns ADPCM_Decoder_1_Bit:u6\|lpm_divide:Div0\|lpm_divide_aem:auto_generated\|sign_div_unsign_klh:divider\|alt_u_div_e2f:divider\|add_sub_14_result_int\[8\]~12 55 COMB Unassigned 20 " "Info: 55: + IC(0.000 ns) + CELL(0.458 ns) = 33.537 ns; Loc. = Unassigned; Fanout = 20; COMB Node = 'ADPCM_Decoder_1_Bit:u6\|lpm_divide:Div0\|lpm_divide_aem:auto_generated\|sign_div_unsign_klh:divider\|alt_u_div_e2f:divider\|add_sub_14_result_int\[8\]~12'" {  } { { "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" "0.458 ns" { ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_14_result_int[7]~11 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_14_result_int[8]~12 } "NODE_NAME" } } { "db/alt_u_div_e2f.tdf" "" { Text "D:/HD_ADPCM/HD_ADPCM_1Bit_Stereo_Decoder/db/alt_u_div_e2f.tdf" 56 23 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 -1} { "Info" "ITDB_NODE_DELAY" "IC(0.498 ns) + CELL(0.177 ns) 34.212 ns ADPCM_Decoder_1_Bit:u6\|lpm_divide:Div0\|lpm_divide_aem:auto_generated\|sign_div_unsign_klh:divider\|alt_u_div_e2f:divider\|StageOut\[113\]~94 56 COMB Unassigned 2 " "Info: 56: + IC(0.498 ns) + CELL(0.177 ns) = 34.212 ns; Loc. = Unassigned; Fanout = 2; COMB Node = 'ADPCM_Decoder_1_Bit:u6\|lpm_divide:Div0\|lpm_divide_aem:auto_generated\|sign_div_unsign_klh:divider\|alt_u_div_e2f:divider\|StageOut\[113\]~94'" {  } { { "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" "0.675 ns" { ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_14_result_int[8]~12 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|StageOut[113]~94 } "NODE_NAME" } } { "db/alt_u_div_e2f.tdf" "" { Text "D:/HD_ADPCM/HD_ADPCM_1Bit_Stereo_Decoder/db/alt_u_div_e2f.tdf" 138 10 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 -1} { "Info" "ITDB_NODE_DELAY" "IC(1.073 ns) + CELL(0.495 ns) 35.780 ns ADPCM_Decoder_1_Bit:u6\|lpm_divide:Div0\|lpm_divide_aem:auto_generated\|sign_div_unsign_klh:divider\|alt_u_div_e2f:divider\|add_sub_15_result_int\[2\]~1 57 COMB Unassigned 2 " "Info: 57: + IC(1.073 ns) + CELL(0.495 ns) = 35.780 ns; Loc. = Unassigned; Fanout = 2; COMB Node = 'ADPCM_Decoder_1_Bit:u6\|lpm_divide:Div0\|lpm_divide_aem:auto_generated\|sign_div_unsign_klh:divider\|alt_u_div_e2f:divider\|add_sub_15_result_int\[2\]~1'" {  } { { "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" "1.568 ns" { ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|StageOut[113]~94 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_15_result_int[2]~1 } "NODE_NAME" } } { "db/alt_u_div_e2f.tdf" "" { Text "D:/HD_ADPCM/HD_ADPCM_1Bit_Stereo_Decoder/db/alt_u_div_e2f.tdf" 61 23 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 -1} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.080 ns) 35.860 ns ADPCM_Decoder_1_Bit:u6\|lpm_divide:Div0\|lpm_divide_aem:auto_generated\|sign_div_unsign_klh:divider\|alt_u_div_e2f:divider\|add_sub_15_result_int\[3\]~3 58 COMB Unassigned 2 " "Info: 58: + IC(0.000 ns) + CELL(0.080 ns) = 35.860 ns; Loc. = Unassigned; Fanout = 2; COMB Node = 'ADPCM_Decoder_1_Bit:u6\|lpm_divide:Div0\|lpm_divide_aem:auto_generated\|sign_div_unsign_klh:divider\|alt_u_div_e2f:divider\|add_sub_15_result_int\[3\]~3'" {  } { { "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" "0.080 ns" { ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_15_result_int[2]~1 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_15_result_int[3]~3 } "NODE_NAME" } } { "db/alt_u_div_e2f.tdf" "" { Text "D:/HD_ADPCM/HD_ADPCM_1Bit_Stereo_Decoder/db/alt_u_div_e2f.tdf" 61 23 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 -1} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.080 ns) 35.940 ns ADPCM_Decoder_1_Bit:u6\|lpm_divide:Div0\|lpm_divide_aem:auto_generated\|sign_div_unsign_klh:divider\|alt_u_div_e2f:divider\|add_sub_15_result_int\[4\]~5 59 COMB Unassigned 2 " "Info: 59: + IC(0.000 ns) + CELL(0.080 ns) = 35.940 ns; Loc. = Unassigned; Fanout = 2; COMB Node = 'ADPCM_Decoder_1_Bit:u6\|lpm_divide:Div0\|lpm_divide_aem:auto_generated\|sign_div_unsign_klh:divider\|alt_u_div_e2f:divider\|add_sub_15_result_int\[4\]~5'" {  } { { "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" "0.080 ns" { ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_15_result_int[3]~3 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_15_result_int[4]~5 } "NODE_NAME" } } { "db/alt_u_div_e2f.tdf" "" { Text "D:/HD_ADPCM/HD_ADPCM_1Bit_Stereo_Decoder/db/alt_u_div_e2f.tdf" 61 23 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 -1} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.080 ns) 36.020 ns ADPCM_Decoder_1_Bit:u6\|lpm_divide:Div0\|lpm_divide_aem:auto_generated\|sign_div_unsign_klh:divider\|alt_u_div_e2f:divider\|add_sub_15_result_int\[5\]~7 60 COMB Unassigned 2 " "Info: 60: + IC(0.000 ns) + CELL(0.080 ns) = 36.020 ns; Loc. = Unassigned; Fanout = 2; COMB Node = 'ADPCM_Decoder_1_Bit:u6\|lpm_divide:Div0\|lpm_divide_aem:auto_generated\|sign_div_unsign_klh:divider\|alt_u_div_e2f:divider\|add_sub_15_result_int\[5\]~7'" {  } { { "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" "0.080 ns" { ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_15_result_int[4]~5 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_15_result_int[5]~7 } "NODE_NAME" } } { "db/alt_u_div_e2f.tdf" "" { Text "D:/HD_ADPCM/HD_ADPCM_1Bit_Stereo_Decoder/db/alt_u_div_e2f.tdf" 61 23 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 -1} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.080 ns) 36.100 ns ADPCM_Decoder_1_Bit:u6\|lpm_divide:Div0\|lpm_divide_aem:auto_generated\|sign_div_unsign_klh:divider\|alt_u_div_e2f:divider\|add_sub_15_result_int\[6\]~9 61 COMB Unassigned 1 " "Info: 61: + IC(0.000 ns) + CELL(0.080 ns) = 36.100 ns; Loc. = Unassigned; Fanout = 1; COMB Node = 'ADPCM_Decoder_1_Bit:u6\|lpm_divide:Div0\|lpm_divide_aem:auto_generated\|sign_div_unsign_klh:divider\|alt_u_div_e2f:divider\|add_sub_15_result_int\[6\]~9'" {  } { { "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" "0.080 ns" { ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_15_result_int[5]~7 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_15_result_int[6]~9 } "NODE_NAME" } } { "db/alt_u_div_e2f.tdf" "" { Text "D:/HD_ADPCM/HD_ADPCM_1Bit_Stereo_Decoder/db/alt_u_div_e2f.tdf" 61 23 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 -1} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.080 ns) 36.180 ns ADPCM_Decoder_1_Bit:u6\|lpm_divide:Div0\|lpm_divide_aem:auto_generated\|sign_div_unsign_klh:divider\|alt_u_div_e2f:divider\|add_sub_15_result_int\[7\]~11 62 COMB Unassigned 1 " "Info: 62: + IC(0.000 ns) + CELL(0.080 ns) = 36.180 ns; Loc. = Unassigned; Fanout = 1; COMB Node = 'ADPCM_Decoder_1_Bit:u6\|lpm_divide:Div0\|lpm_divide_aem:auto_generated\|sign_div_unsign_klh:divider\|alt_u_div_e2f:divider\|add_sub_15_result_int\[7\]~11'" {  } { { "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" "0.080 ns" { ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_15_result_int[6]~9 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_15_result_int[7]~11 } "NODE_NAME" } } { "db/alt_u_div_e2f.tdf" "" { Text "D:/HD_ADPCM/HD_ADPCM_1Bit_Stereo_Decoder/db/alt_u_div_e2f.tdf" 61 23 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 -1} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.458 ns) 36.638 ns ADPCM_Decoder_1_Bit:u6\|lpm_divide:Div0\|lpm_divide_aem:auto_generated\|sign_div_unsign_klh:divider\|alt_u_div_e2f:divider\|add_sub_15_result_int\[8\]~12 63 COMB Unassigned 20 " "Info: 63: + IC(0.000 ns) + CELL(0.458 ns) = 36.638 ns; Loc. = Unassigned; Fanout = 20; COMB Node = 'ADPCM_Decoder_1_Bit:u6\|lpm_divide:Div0\|lpm_divide_aem:auto_generated\|sign_div_unsign_klh:divider\|alt_u_div_e2f:divider\|add_sub_15_result_int\[8\]~12'" {  } { { "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" "0.458 ns" { ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_15_result_int[7]~11 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_15_result_int[8]~12 } "NODE_NAME" } } { "db/alt_u_div_e2f.tdf" "" { Text "D:/HD_ADPCM/HD_ADPCM_1Bit_Stereo_Decoder/db/alt_u_div_e2f.tdf" 61 23 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 -1} { "Info" "ITDB_NODE_DELAY" "IC(0.598 ns) + CELL(0.319 ns) 37.555 ns ADPCM_Decoder_1_Bit:u6\|lpm_divide:Div0\|lpm_divide_aem:auto_generated\|sign_div_unsign_klh:divider\|alt_u_div_e2f:divider\|StageOut\[124\]~563 64 COMB Unassigned 3 " "Info: 64: + IC(0.598 ns) + CELL(0.319 ns) = 37.555 ns; Loc. = Unassigned; Fanout = 3; COMB Node = 'ADPCM_Decoder_1_Bit:u6\|lpm_divide:Div0\|lpm_divide_aem:auto_generated\|sign_div_unsign_klh:divider\|alt_u_div_e2f:divider\|StageOut\[124\]~563'" {  } { { "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" "0.917 ns" { ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_15_result_int[8]~12 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|StageOut[124]~563 } "NODE_NAME" } } { "db/alt_u_div_e2f.tdf" "" { Text "D:/HD_ADPCM/HD_ADPCM_1Bit_Stereo_Decoder/db/alt_u_div_e2f.tdf" 138 10 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 -1} { "Info" "ITDB_NODE_DELAY" "IC(1.016 ns) + CELL(0.517 ns) 39.088 ns ADPCM_Decoder_1_Bit:u6\|lpm_divide:Div0\|lpm_divide_aem:auto_generated\|sign_div_unsign_klh:divider\|alt_u_div_e2f:divider\|add_sub_16_result_int\[5\]~7 65 COMB Unassigned 2 " "Info: 65: + IC(1.016 ns) + CELL(0.517 ns) = 39.088 ns; Loc. = Unassigned; Fanout = 2; COMB Node = 'ADPCM_Decoder_1_Bit:u6\|lpm_divide:Div0\|lpm_divide_aem:auto_generated\|sign_div_unsign_klh:divider\|alt_u_div_e2f:divider\|add_sub_16_result_int\[5\]~7'" {  } { { "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" "1.533 ns" { ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|StageOut[124]~563 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_16_result_int[5]~7 } "NODE_NAME" } } { "db/alt_u_div_e2f.tdf" "" { Text "D:/HD_ADPCM/HD_ADPCM_1Bit_Stereo_Decoder/db/alt_u_div_e2f.tdf" 66 23 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 -1} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.080 ns) 39.168 ns ADPCM_Decoder_1_Bit:u6\|lpm_divide:Div0\|lpm_divide_aem:auto_generated\|sign_div_unsign_klh:divider\|alt_u_div_e2f:divider\|add_sub_16_result_int\[6\]~9 66 COMB Unassigned 1 " "Info: 66: + IC(0.000 ns) + CELL(0.080 ns) = 39.168 ns; Loc. = Unassigned; Fanout = 1; COMB Node = 'ADPCM_Decoder_1_Bit:u6\|lpm_divide:Div0\|lpm_divide_aem:auto_generated\|sign_div_unsign_klh:divider\|alt_u_div_e2f:divider\|add_sub_16_result_int\[6\]~9'" {  } { { "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" "0.080 ns" { ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_16_result_int[5]~7 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_16_result_int[6]~9 } "NODE_NAME" } } { "db/alt_u_div_e2f.tdf" "" { Text "D:/HD_ADPCM/HD_ADPCM_1Bit_Stereo_Decoder/db/alt_u_div_e2f.tdf" 66 23 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 -1} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.080 ns) 39.248 ns ADPCM_Decoder_1_Bit:u6\|lpm_divide:Div0\|lpm_divide_aem:auto_generated\|sign_div_unsign_klh:divider\|alt_u_div_e2f:divider\|add_sub_16_result_int\[7\]~11 67 COMB Unassigned 1 " "Info: 67: + IC(0.000 ns) + CELL(0.080 ns) = 39.248 ns; Loc. = Unassigned; Fanout = 1; COMB Node = 'ADPCM_Decoder_1_Bit:u6\|lpm_divide:Div0\|lpm_divide_aem:auto_generated\|sign_div_unsign_klh:divider\|alt_u_div_e2f:divider\|add_sub_16_result_int\[7\]~11'" {  } { { "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" "0.080 ns" { ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_16_result_int[6]~9 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_16_result_int[7]~11 } "NODE_NAME" } } { "db/alt_u_div_e2f.tdf" "" { Text "D:/HD_ADPCM/HD_ADPCM_1Bit_Stereo_Decoder/db/alt_u_div_e2f.tdf" 66 23 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 -1} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.458 ns) 39.706 ns ADPCM_Decoder_1_Bit:u6\|lpm_divide:Div0\|lpm_divide_aem:auto_generated\|sign_div_unsign_klh:divider\|alt_u_div_e2f:divider\|add_sub_16_result_int\[8\]~12 68 COMB Unassigned 20 " "Info: 68: + IC(0.000 ns) + CELL(0.458 ns) = 39.706 ns; Loc. = Unassigned; Fanout = 20; COMB Node = 'ADPCM_Decoder_1_Bit:u6\|lpm_divide:Div0\|lpm_divide_aem:auto_generated\|sign_div_unsign_klh:divider\|alt_u_div_e2f:divider\|add_sub_16_result_int\[8\]~12'" {  } { { "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" "0.458 ns" { ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_16_result_int[7]~11 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_16_result_int[8]~12 } "NODE_NAME" } } { "db/alt_u_div_e2f.tdf" "" { Text "D:/HD_ADPCM/HD_ADPCM_1Bit_Stereo_Decoder/db/alt_u_div_e2f.tdf" 66 23 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 -1} { "Info" "ITDB_NODE_DELAY" "IC(0.949 ns) + CELL(0.319 ns) 40.974 ns ADPCM_Decoder_1_Bit:u6\|lpm_divide:Div0\|lpm_divide_aem:auto_generated\|sign_div_unsign_klh:divider\|alt_u_div_e2f:divider\|StageOut\[132\]~567 69 COMB Unassigned 3 " "Info: 69: + IC(0.949 ns) + CELL(0.319 ns) = 40.974 ns; Loc. = Unassigned; Fanout = 3; COMB Node = 'ADPCM_Decoder_1_Bit:u6\|lpm_divide:Div0\|lpm_divide_aem:auto_generated\|sign_div_unsign_klh:divider\|alt_u_div_e2f:divider\|StageOut\[132\]~567'" {  } { { "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" "1.268 ns" { ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_16_result_int[8]~12 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|StageOut[132]~567 } "NODE_NAME" } } { "db/alt_u_div_e2f.tdf" "" { Text "D:/HD_ADPCM/HD_ADPCM_1Bit_Stereo_Decoder/db/alt_u_div_e2f.tdf" 138 10 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 -1} { "Info" "ITDB_NODE_DELAY" "IC(1.070 ns) + CELL(0.517 ns) 42.561 ns ADPCM_Decoder_1_Bit:u6\|lpm_divide:Div0\|lpm_divide_aem:auto_generated\|sign_div_unsign_klh:divider\|alt_u_div_e2f:divider\|add_sub_17_result_int\[5\]~7 70 COMB Unassigned 2 " "Info: 70: + IC(1.070 ns) + CELL(0.517 ns) = 42.561 ns; Loc. = Unassigned; Fanout = 2; COMB Node = 'ADPCM_Decoder_1_Bit:u6\|lpm_divide:Div0\|lpm_divide_aem:auto_generated\|sign_div_unsign_klh:divider\|alt_u_div_e2f:divider\|add_sub_17_result_int\[5\]~7'" {  } { { "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" "1.587 ns" { ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|StageOut[132]~567 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_17_result_int[5]~7 } "NODE_NAME" } } { "db/alt_u_div_e2f.tdf" "" { Text "D:/HD_ADPCM/HD_ADPCM_1Bit_Stereo_Decoder/db/alt_u_div_e2f.tdf" 71 23 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 -1} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.080 ns) 42.641 ns ADPCM_Decoder_1_Bit:u6\|lpm_divide:Div0\|lpm_divide_aem:auto_generated\|sign_div_unsign_klh:divider\|alt_u_div_e2f:divider\|add_sub_17_result_int\[6\]~9 71 COMB Unassigned 1 " "Info: 71: + IC(0.000 ns) + CELL(0.080 ns) = 42.641 ns; Loc. = Unassigned; Fanout = 1; COMB Node = 'ADPCM_Decoder_1_Bit:u6\|lpm_divide:Div0\|lpm_divide_aem:auto_generated\|sign_div_unsign_klh:divider\|alt_u_div_e2f:divider\|add_sub_17_result_int\[6\]~9'" {  } { { "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" "0.080 ns" { ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_17_result_int[5]~7 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_17_result_int[6]~9 } "NODE_NAME" } } { "db/alt_u_div_e2f.tdf" "" { Text "D:/HD_ADPCM/HD_ADPCM_1Bit_Stereo_Decoder/db/alt_u_div_e2f.tdf" 71 23 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 -1} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.080 ns) 42.721 ns ADPCM_Decoder_1_Bit:u6\|lpm_divide:Div0\|lpm_divide_aem:auto_generated\|sign_div_unsign_klh:divider\|alt_u_div_e2f:divider\|add_sub_17_result_int\[7\]~11 72 COMB Unassigned 1 " "Info: 72: + IC(0.000 ns) + CELL(0.080 ns) = 42.721 ns; Loc. = Unassigned; Fanout = 1; COMB Node = 'ADPCM_Decoder_1_Bit:u6\|lpm_divide:Div0\|lpm_divide_aem:auto_generated\|sign_div_unsign_klh:divider\|alt_u_div_e2f:divider\|add_sub_17_result_int\[7\]~11'" {  } { { "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" "0.080 ns" { ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_17_result_int[6]~9 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_17_result_int[7]~11 } "NODE_NAME" } } { "db/alt_u_div_e2f.tdf" "" { Text "D:/HD_ADPCM/HD_ADPCM_1Bit_Stereo_Decoder/db/alt_u_div_e2f.tdf" 71 23 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 -1} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.458 ns) 43.179 ns ADPCM_Decoder_1_Bit:u6\|lpm_divide:Div0\|lpm_divide_aem:auto_generated\|sign_div_unsign_klh:divider\|alt_u_div_e2f:divider\|add_sub_17_result_int\[8\]~12 73 COMB Unassigned 20 " "Info: 73: + IC(0.000 ns) + CELL(0.458 ns) = 43.179 ns; Loc. = Unassigned; Fanout = 20; COMB Node = 'ADPCM_Decoder_1_Bit:u6\|lpm_divide:Div0\|lpm_divide_aem:auto_generated\|sign_div_unsign_klh:divider\|alt_u_div_e2f:divider\|add_sub_17_result_int\[8\]~12'" {  } { { "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" "0.458 ns" { ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_17_result_int[7]~11 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_17_result_int[8]~12 } "NODE_NAME" } } { "db/alt_u_div_e2f.tdf" "" { Text "D:/HD_ADPCM/HD_ADPCM_1Bit_Stereo_Decoder/db/alt_u_div_e2f.tdf" 71 23 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 -1} { "Info" "ITDB_NODE_DELAY" "IC(0.895 ns) + CELL(0.319 ns) 44.393 ns ADPCM_Decoder_1_Bit:u6\|lpm_divide:Div0\|lpm_divide_aem:auto_generated\|sign_div_unsign_klh:divider\|alt_u_div_e2f:divider\|StageOut\[142\]~569 74 COMB Unassigned 1 " "Info: 74: + IC(0.895 ns) + CELL(0.319 ns) = 44.393 ns; Loc. = Unassigned; Fanout = 1; COMB Node = 'ADPCM_Decoder_1_Bit:u6\|lpm_divide:Div0\|lpm_divide_aem:auto_generated\|sign_div_unsign_klh:divider\|alt_u_div_e2f:divider\|StageOut\[142\]~569'" {  } { { "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" "1.214 ns" { ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_17_result_int[8]~12 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|StageOut[142]~569 } "NODE_NAME" } } { "db/alt_u_div_e2f.tdf" "" { Text "D:/HD_ADPCM/HD_ADPCM_1Bit_Stereo_Decoder/db/alt_u_div_e2f.tdf" 138 10 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 -1} { "Info" "ITDB_NODE_DELAY" "IC(1.359 ns) + CELL(0.517 ns) 46.269 ns ADPCM_Decoder_1_Bit:u6\|lpm_divide:Div0\|lpm_divide_aem:auto_generated\|sign_div_unsign_klh:divider\|alt_u_div_e2f:divider\|op_9~32 75 COMB Unassigned 1 " "Info: 75: + IC(1.359 ns) + CELL(0.517 ns) = 46.269 ns; Loc. = Unassigned; Fanout = 1; COMB Node = 'ADPCM_Decoder_1_Bit:u6\|lpm_divide:Div0\|lpm_divide_aem:auto_generated\|sign_div_unsign_klh:divider\|alt_u_div_e2f:divider\|op_9~32'" {  } { { "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" "1.876 ns" { ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|StageOut[142]~569 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|op_9~32 } "NODE_NAME" } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 -1} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.458 ns) 46.727 ns ADPCM_Decoder_1_Bit:u6\|lpm_divide:Div0\|lpm_divide_aem:auto_generated\|sign_div_unsign_klh:divider\|alt_u_div_e2f:divider\|op_9~33 76 COMB Unassigned 13 " "Info: 76: + IC(0.000 ns) + CELL(0.458 ns) = 46.727 ns; Loc. = Unassigned; Fanout = 13; COMB Node = 'ADPCM_Decoder_1_Bit:u6\|lpm_divide:Div0\|lpm_divide_aem:auto_generated\|sign_div_unsign_klh:divider\|alt_u_div_e2f:divider\|op_9~33'" {  } { { "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" "0.458 ns" { ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|op_9~32 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|op_9~33 } "NODE_NAME" } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 -1} { "Info" "ITDB_NODE_DELAY" "IC(0.732 ns) + CELL(0.177 ns) 47.636 ns ADPCM_Decoder_1_Bit:u6\|lpm_divide:Div0\|lpm_divide_aem:auto_generated\|sign_div_unsign_klh:divider\|alt_u_div_e2f:divider\|StageOut\[145\]~30 77 COMB Unassigned 1 " "Info: 77: + IC(0.732 ns) + CELL(0.177 ns) = 47.636 ns; Loc. = Unassigned; Fanout = 1; COMB Node = 'ADPCM_Decoder_1_Bit:u6\|lpm_divide:Div0\|lpm_divide_aem:auto_generated\|sign_div_unsign_klh:divider\|alt_u_div_e2f:divider\|StageOut\[145\]~30'" {  } { { "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" "0.909 ns" { ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|op_9~33 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|StageOut[145]~30 } "NODE_NAME" } } { "db/alt_u_div_e2f.tdf" "" { Text "D:/HD_ADPCM/HD_ADPCM_1Bit_Stereo_Decoder/db/alt_u_div_e2f.tdf" 138 10 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 -1} { "Info" "ITDB_NODE_DELAY" "IC(0.498 ns) + CELL(0.495 ns) 48.629 ns ADPCM_Decoder_1_Bit:u6\|lpm_divide:Div0\|lpm_divide_aem:auto_generated\|sign_div_unsign_klh:divider\|alt_u_div_e2f:divider\|add_sub_19_result_int\[2\]~1 78 COMB Unassigned 1 " "Info: 78: + IC(0.498 ns) + CELL(0.495 ns) = 48.629 ns; Loc. = Unassigned; Fanout = 1; COMB Node = 'ADPCM_Decoder_1_Bit:u6\|lpm_divide:Div0\|lpm_divide_aem:auto_generated\|sign_div_unsign_klh:divider\|alt_u_div_e2f:divider\|add_sub_19_result_int\[2\]~1'" {  } { { "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" "0.993 ns" { ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|StageOut[145]~30 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_19_result_int[2]~1 } "NODE_NAME" } } { "db/alt_u_div_e2f.tdf" "" { Text "D:/HD_ADPCM/HD_ADPCM_1Bit_Stereo_Decoder/db/alt_u_div_e2f.tdf" 81 23 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 -1} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.080 ns) 48.709 ns ADPCM_Decoder_1_Bit:u6\|lpm_divide:Div0\|lpm_divide_aem:auto_generated\|sign_div_unsign_klh:divider\|alt_u_div_e2f:divider\|add_sub_19_result_int\[3\]~3 79 COMB Unassigned 1 " "Info: 79: + IC(0.000 ns) + CELL(0.080 ns) = 48.709 ns; Loc. = Unassigned; Fanout = 1; COMB Node = 'ADPCM_Decoder_1_Bit:u6\|lpm_divide:Div0\|lpm_divide_aem:auto_generated\|sign_div_unsign_klh:divider\|alt_u_div_e2f:divider\|add_sub_19_result_int\[3\]~3'" {  } { { "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" "0.080 ns" { ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_19_result_int[2]~1 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_19_result_int[3]~3 } "NODE_NAME" } } { "db/alt_u_div_e2f.tdf" "" { Text "D:/HD_ADPCM/HD_ADPCM_1Bit_Stereo_Decoder/db/alt_u_div_e2f.tdf" 81 23 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 -1} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.080 ns) 48.789 ns ADPCM_Decoder_1_Bit:u6\|lpm_divide:Div0\|lpm_divide_aem:auto_generated\|sign_div_unsign_klh:divider\|alt_u_div_e2f:divider\|add_sub_19_result_int\[4\]~5 80 COMB Unassigned 1 " "Info: 80: + IC(0.000 ns) + CELL(0.080 ns) = 48.789 ns; Loc. = Unassigned; Fanout = 1; COMB Node = 'ADPCM_Decoder_1_Bit:u6\|lpm_divide:Div0\|lpm_divide_aem:auto_generated\|sign_div_unsign_klh:divider\|alt_u_div_e2f:divider\|add_sub_19_result_int\[4\]~5'" {  } { { "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" "0.080 ns" { ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_19_result_int[3]~3 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_19_result_int[4]~5 } "NODE_NAME" } } { "db/alt_u_div_e2f.tdf" "" { Text "D:/HD_ADPCM/HD_ADPCM_1Bit_Stereo_Decoder/db/alt_u_div_e2f.tdf" 81 23 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 -1} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.080 ns) 48.869 ns ADPCM_Decoder_1_Bit:u6\|lpm_divide:Div0\|lpm_divide_aem:auto_generated\|sign_div_unsign_klh:divider\|alt_u_div_e2f:divider\|add_sub_19_result_int\[5\]~7 81 COMB Unassigned 1 " "Info: 81: + IC(0.000 ns) + CELL(0.080 ns) = 48.869 ns; Loc. = Unassigned; Fanout = 1; COMB Node = 'ADPCM_Decoder_1_Bit:u6\|lpm_divide:Div0\|lpm_divide_aem:auto_generated\|sign_div_unsign_klh:divider\|alt_u_div_e2f:divider\|add_sub_19_result_int\[5\]~7'" {  } { { "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" "0.080 ns" { ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_19_result_int[4]~5 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_19_result_int[5]~7 } "NODE_NAME" } } { "db/alt_u_div_e2f.tdf" "" { Text "D:/HD_ADPCM/HD_ADPCM_1Bit_Stereo_Decoder/db/alt_u_div_e2f.tdf" 81 23 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 -1} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.080 ns) 48.949 ns ADPCM_Decoder_1_Bit:u6\|lpm_divide:Div0\|lpm_divide_aem:auto_generated\|sign_div_unsign_klh:divider\|alt_u_div_e2f:divider\|add_sub_19_result_int\[6\]~9 82 COMB Unassigned 1 " "Info: 82: + IC(0.000 ns) + CELL(0.080 ns) = 48.949 ns; Loc. = Unassigned; Fanout = 1; COMB Node = 'ADPCM_Decoder_1_Bit:u6\|lpm_divide:Div0\|lpm_divide_aem:auto_generated\|sign_div_unsign_klh:divider\|alt_u_div_e2f:divider\|add_sub_19_result_int\[6\]~9'" {  } { { "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" "0.080 ns" { ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_19_result_int[5]~7 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_19_result_int[6]~9 } "NODE_NAME" } } { "db/alt_u_div_e2f.tdf" "" { Text "D:/HD_ADPCM/HD_ADPCM_1Bit_Stereo_Decoder/db/alt_u_div_e2f.tdf" 81 23 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 -1} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.080 ns) 49.029 ns ADPCM_Decoder_1_Bit:u6\|lpm_divide:Div0\|lpm_divide_aem:auto_generated\|sign_div_unsign_klh:divider\|alt_u_div_e2f:divider\|add_sub_19_result_int\[7\]~11 83 COMB Unassigned 1 " "Info: 83: + IC(0.000 ns) + CELL(0.080 ns) = 49.029 ns; Loc. = Unassigned; Fanout = 1; COMB Node = 'ADPCM_Decoder_1_Bit:u6\|lpm_divide:Div0\|lpm_divide_aem:auto_generated\|sign_div_unsign_klh:divider\|alt_u_div_e2f:divider\|add_sub_19_result_int\[7\]~11'" {  } { { "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" "0.080 ns" { ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_19_result_int[6]~9 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_19_result_int[7]~11 } "NODE_NAME" } } { "db/alt_u_div_e2f.tdf" "" { Text "D:/HD_ADPCM/HD_ADPCM_1Bit_Stereo_Decoder/db/alt_u_div_e2f.tdf" 81 23 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 -1} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.458 ns) 49.487 ns ADPCM_Decoder_1_Bit:u6\|lpm_divide:Div0\|lpm_divide_aem:auto_generated\|sign_div_unsign_klh:divider\|alt_u_div_e2f:divider\|add_sub_19_result_int\[8\]~12 84 COMB Unassigned 1 " "Info: 84: + IC(0.000 ns) + CELL(0.458 ns) = 49.487 ns; Loc. = Unassigned; Fanout = 1; COMB Node = 'ADPCM_Decoder_1_Bit:u6\|lpm_divide:Div0\|lpm_divide_aem:auto_generated\|sign_div_unsign_klh:divider\|alt_u_div_e2f:divider\|add_sub_19_result_int\[8\]~12'" {  } { { "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" "0.458 ns" { ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_19_result_int[7]~11 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_19_result_int[8]~12 } "NODE_NAME" } } { "db/alt_u_div_e2f.tdf" "" { Text "D:/HD_ADPCM/HD_ADPCM_1Bit_Stereo_Decoder/db/alt_u_div_e2f.tdf" 81 23 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 -1} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.096 ns) 49.583 ns ADPCM_Decoder_1_Bit:u6\|PCM_Data_Difference\[0\] 85 REG Unassigned 1 " "Info: 85: + IC(0.000 ns) + CELL(0.096 ns) = 49.583 ns; Loc. = Unassigned; Fanout = 1; REG Node = 'ADPCM_Decoder_1_Bit:u6\|PCM_Data_Difference\[0\]'" {  } { { "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" "0.096 ns" { ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_19_result_int[8]~12 ADPCM_Decoder_1_Bit:u6|PCM_Data_Difference[0] } "NODE_NAME" } } { "HD_ADPCM_Codec.vhd" "" { Text "D:/HD_ADPCM/HD_ADPCM_1Bit_Stereo_Decoder/HD_ADPCM_Codec.vhd" 943 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 -1} { "Info" "ITDB_TOTAL_CELL_DELAY" "24.059 ns ( 48.52 % ) " "Info: Total cell delay = 24.059 ns ( 48.52 % )" {  } {  } 0 0 "Total cell delay = %1!s! %2!s!" 0 0 "" 0 -1} { "Info" "ITDB_TOTAL_IC_DELAY" "25.524 ns ( 51.48 % ) " "Info: Total interconnect delay = 25.524 ns ( 51.48 % )" {  } {  } 0 0 "Total interconnect delay = %1!s! %2!s!" 0 0 "" 0 -1}  } { { "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" "49.583 ns" { ADPCM_Decoder_1_Bit:u6|ADPCM_Decoder_Step_Size_Table_Pointer[9] ADPCM_Decoder_1_Bit:u6|lpm_mult:Mult0|mult_pu01:auto_generated|mac_mult1~DATAOUT15 ADPCM_Decoder_1_Bit:u6|lpm_mult:Mult0|mult_pu01:auto_generated|mac_out2~DATAOUT15 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_6_result_int[2]~1 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_6_result_int[3]~3 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_6_result_int[4]~5 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_6_result_int[5]~7 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_6_result_int[6]~9 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_6_result_int[7]~10 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|StageOut[50]~221 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_7_result_int[3]~3 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_7_result_int[4]~5 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_7_result_int[5]~7 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_7_result_int[6]~9 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_7_result_int[7]~11 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_7_result_int[8]~12 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|StageOut[58]~197 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_8_result_int[3]~3 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_8_result_int[4]~5 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_8_result_int[5]~7 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_8_result_int[6]~9 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_8_result_int[7]~11 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_8_result_int[8]~12 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|StageOut[67]~581 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_9_result_int[4]~5 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_9_result_int[5]~7 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_9_result_int[6]~9 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_9_result_int[7]~11 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_9_result_int[8]~12 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|StageOut[73]~174 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_10_result_int[2]~1 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_10_result_int[3]~3 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_10_result_int[4]~5 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_10_result_int[5]~7 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_10_result_int[6]~9 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_10_result_int[7]~11 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_10_result_int[8]~12 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|StageOut[83]~544 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_11_result_int[4]~5 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_11_result_int[5]~7 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_11_result_int[6]~9 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_11_result_int[7]~11 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_11_result_int[8]~12 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|StageOut[92]~547 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_12_result_int[5]~7 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_12_result_int[6]~9 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_12_result_int[7]~11 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_12_result_int[8]~12 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|StageOut[101]~550 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_13_result_int[6]~9 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_13_result_int[7]~11 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_13_result_int[8]~12 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|StageOut[110]~553 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_14_result_int[7]~11 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_14_result_int[8]~12 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|StageOut[113]~94 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_15_result_int[2]~1 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_15_result_int[3]~3 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_15_result_int[4]~5 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_15_result_int[5]~7 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_15_result_int[6]~9 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_15_result_int[7]~11 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_15_result_int[8]~12 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|StageOut[124]~563 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_16_result_int[5]~7 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_16_result_int[6]~9 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_16_result_int[7]~11 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_16_result_int[8]~12 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|StageOut[132]~567 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_17_result_int[5]~7 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_17_result_int[6]~9 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_17_result_int[7]~11 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_17_result_int[8]~12 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|StageOut[142]~569 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|op_9~32 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|op_9~33 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|StageOut[145]~30 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_19_result_int[2]~1 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_19_result_int[3]~3 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_19_result_int[4]~5 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_19_result_int[5]~7 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_19_result_int[6]~9 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_19_result_int[7]~11 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_19_result_int[8]~12 ADPCM_Decoder_1_Bit:u6|PCM_Data_Difference[0] } "NODE_NAME" } }  } 0 0 "%2!c! %3!s! %4!s! to %5!s! delay is %1!s!" 0 0 "" 0 -1}  } { { "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" "49.583 ns" { ADPCM_Decoder_1_Bit:u6|ADPCM_Decoder_Step_Size_Table_Pointer[9] ADPCM_Decoder_1_Bit:u6|lpm_mult:Mult0|mult_pu01:auto_generated|mac_mult1~DATAOUT15 ADPCM_Decoder_1_Bit:u6|lpm_mult:Mult0|mult_pu01:auto_generated|mac_out2~DATAOUT15 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_6_result_int[2]~1 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_6_result_int[3]~3 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_6_result_int[4]~5 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_6_result_int[5]~7 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_6_result_int[6]~9 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_6_result_int[7]~10 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|StageOut[50]~221 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_7_result_int[3]~3 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_7_result_int[4]~5 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_7_result_int[5]~7 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_7_result_int[6]~9 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_7_result_int[7]~11 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_7_result_int[8]~12 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|StageOut[58]~197 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_8_result_int[3]~3 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_8_result_int[4]~5 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_8_result_int[5]~7 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_8_result_int[6]~9 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_8_result_int[7]~11 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_8_result_int[8]~12 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|StageOut[67]~581 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_9_result_int[4]~5 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_9_result_int[5]~7 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_9_result_int[6]~9 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_9_result_int[7]~11 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_9_result_int[8]~12 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|StageOut[73]~174 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_10_result_int[2]~1 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_10_result_int[3]~3 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_10_result_int[4]~5 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_10_result_int[5]~7 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_10_result_int[6]~9 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_10_result_int[7]~11 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_10_result_int[8]~12 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|StageOut[83]~544 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_11_result_int[4]~5 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_11_result_int[5]~7 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_11_result_int[6]~9 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_11_result_int[7]~11 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_11_result_int[8]~12 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|StageOut[92]~547 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_12_result_int[5]~7 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_12_result_int[6]~9 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_12_result_int[7]~11 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_12_result_int[8]~12 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|StageOut[101]~550 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_13_result_int[6]~9 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_13_result_int[7]~11 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_13_result_int[8]~12 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|StageOut[110]~553 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_14_result_int[7]~11 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_14_result_int[8]~12 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|StageOut[113]~94 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_15_result_int[2]~1 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_15_result_int[3]~3 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_15_result_int[4]~5 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_15_result_int[5]~7 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_15_result_int[6]~9 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_15_result_int[7]~11 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_15_result_int[8]~12 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|StageOut[124]~563 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_16_result_int[5]~7 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_16_result_int[6]~9 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_16_result_int[7]~11 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_16_result_int[8]~12 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|StageOut[132]~567 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_17_result_int[5]~7 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_17_result_int[6]~9 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_17_result_int[7]~11 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_17_result_int[8]~12 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|StageOut[142]~569 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|op_9~32 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|op_9~33 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|StageOut[145]~30 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_19_result_int[2]~1 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_19_result_int[3]~3 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_19_result_int[4]~5 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_19_result_int[5]~7 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_19_result_int[6]~9 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_19_result_int[7]~11 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_19_result_int[8]~12 ADPCM_Decoder_1_Bit:u6|PCM_Data_Difference[0] } "NODE_NAME" } }  } 0 0 "Slack time is %5!s! between source %1!s! \"%2!s!\" and destination %3!s! \"%4!s!\"" 0 0 "" 0 -1}
72 
{ "Info" "ITDB_FULL_ESTIMATED_DATA_PATH_RESULT" "49.583 ns register register " "Info: Estimated most critical path is register to register delay of 49.583 ns" { { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.000 ns) 0.000 ns ADPCM_Decoder_1_Bit:u6\|ADPCM_Decoder_Step_Size_Table_Pointer\[9\] 1 REG DSPMULT_X28_Y17_N0 11 " "Info: 1: + IC(0.000 ns) + CELL(0.000 ns) = 0.000 ns; Loc. = DSPMULT_X28_Y17_N0; Fanout = 11; REG Node = 'ADPCM_Decoder_1_Bit:u6\|ADPCM_Decoder_Step_Size_Table_Pointer\[9\]'" {  } { { "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" "" { ADPCM_Decoder_1_Bit:u6|ADPCM_Decoder_Step_Size_Table_Pointer[9] } "NODE_NAME" } } { "HD_ADPCM_Codec.vhd" "" { Text "D:/HD_ADPCM/HD_ADPCM_1Bit_Stereo_Decoder/HD_ADPCM_Codec.vhd" 943 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 -1} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(3.257 ns) 3.257 ns ADPCM_Decoder_1_Bit:u6\|lpm_mult:Mult0\|mult_pu01:auto_generated\|mac_mult1~DATAOUT15 2 COMB DSPMULT_X28_Y17_N0 1 " "Info: 2: + IC(0.000 ns) + CELL(3.257 ns) = 3.257 ns; Loc. = DSPMULT_X28_Y17_N0; Fanout = 1; COMB Node = 'ADPCM_Decoder_1_Bit:u6\|lpm_mult:Mult0\|mult_pu01:auto_generated\|mac_mult1~DATAOUT15'" {  } { { "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" "3.257 ns" { ADPCM_Decoder_1_Bit:u6|ADPCM_Decoder_Step_Size_Table_Pointer[9] ADPCM_Decoder_1_Bit:u6|lpm_mult:Mult0|mult_pu01:auto_generated|mac_mult1~DATAOUT15 } "NODE_NAME" } } { "db/mult_pu01.tdf" "" { Text "D:/HD_ADPCM/HD_ADPCM_1Bit_Stereo_Decoder/db/mult_pu01.tdf" 35 2 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 -1} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.304 ns) 3.561 ns ADPCM_Decoder_1_Bit:u6\|lpm_mult:Mult0\|mult_pu01:auto_generated\|mac_out2~DATAOUT15 3 COMB DSPOUT_X28_Y17_N2 4 " "Info: 3: + IC(0.000 ns) + CELL(0.304 ns) = 3.561 ns; Loc. = DSPOUT_X28_Y17_N2; Fanout = 4; COMB Node = 'ADPCM_Decoder_1_Bit:u6\|lpm_mult:Mult0\|mult_pu01:auto_generated\|mac_out2~DATAOUT15'" {  } { { "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" "0.304 ns" { ADPCM_Decoder_1_Bit:u6|lpm_mult:Mult0|mult_pu01:auto_generated|mac_mult1~DATAOUT15 ADPCM_Decoder_1_Bit:u6|lpm_mult:Mult0|mult_pu01:auto_generated|mac_out2~DATAOUT15 } "NODE_NAME" } } { "db/mult_pu01.tdf" "" { Text "D:/HD_ADPCM/HD_ADPCM_1Bit_Stereo_Decoder/db/mult_pu01.tdf" 44 2 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 -1} { "Info" "ITDB_NODE_DELAY" "IC(0.965 ns) + CELL(0.517 ns) 5.043 ns ADPCM_Decoder_1_Bit:u6\|lpm_divide:Div0\|lpm_divide_aem:auto_generated\|sign_div_unsign_klh:divider\|alt_u_div_e2f:divider\|add_sub_6_result_int\[2\]~1 4 COMB LAB_X30_Y17 2 " "Info: 4: + IC(0.965 ns) + CELL(0.517 ns) = 5.043 ns; Loc. = LAB_X30_Y17; Fanout = 2; COMB Node = 'ADPCM_Decoder_1_Bit:u6\|lpm_divide:Div0\|lpm_divide_aem:auto_generated\|sign_div_unsign_klh:divider\|alt_u_div_e2f:divider\|add_sub_6_result_int\[2\]~1'" {  } { { "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" "1.482 ns" { ADPCM_Decoder_1_Bit:u6|lpm_mult:Mult0|mult_pu01:auto_generated|mac_out2~DATAOUT15 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_6_result_int[2]~1 } "NODE_NAME" } } { "db/alt_u_div_e2f.tdf" "" { Text "D:/HD_ADPCM/HD_ADPCM_1Bit_Stereo_Decoder/db/alt_u_div_e2f.tdf" 106 22 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 -1} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.080 ns) 5.123 ns ADPCM_Decoder_1_Bit:u6\|lpm_divide:Div0\|lpm_divide_aem:auto_generated\|sign_div_unsign_klh:divider\|alt_u_div_e2f:divider\|add_sub_6_result_int\[3\]~3 5 COMB LAB_X30_Y17 2 " "Info: 5: + IC(0.000 ns) + CELL(0.080 ns) = 5.123 ns; Loc. = LAB_X30_Y17; Fanout = 2; COMB Node = 'ADPCM_Decoder_1_Bit:u6\|lpm_divide:Div0\|lpm_divide_aem:auto_generated\|sign_div_unsign_klh:divider\|alt_u_div_e2f:divider\|add_sub_6_result_int\[3\]~3'" {  } { { "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" "0.080 ns" { ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_6_result_int[2]~1 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_6_result_int[3]~3 } "NODE_NAME" } } { "db/alt_u_div_e2f.tdf" "" { Text "D:/HD_ADPCM/HD_ADPCM_1Bit_Stereo_Decoder/db/alt_u_div_e2f.tdf" 106 22 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 -1} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.080 ns) 5.203 ns ADPCM_Decoder_1_Bit:u6\|lpm_divide:Div0\|lpm_divide_aem:auto_generated\|sign_div_unsign_klh:divider\|alt_u_div_e2f:divider\|add_sub_6_result_int\[4\]~5 6 COMB LAB_X30_Y17 2 " "Info: 6: + IC(0.000 ns) + CELL(0.080 ns) = 5.203 ns; Loc. = LAB_X30_Y17; Fanout = 2; COMB Node = 'ADPCM_Decoder_1_Bit:u6\|lpm_divide:Div0\|lpm_divide_aem:auto_generated\|sign_div_unsign_klh:divider\|alt_u_div_e2f:divider\|add_sub_6_result_int\[4\]~5'" {  } { { "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" "0.080 ns" { ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_6_result_int[3]~3 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_6_result_int[4]~5 } "NODE_NAME" } } { "db/alt_u_div_e2f.tdf" "" { Text "D:/HD_ADPCM/HD_ADPCM_1Bit_Stereo_Decoder/db/alt_u_div_e2f.tdf" 106 22 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 -1} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.080 ns) 5.283 ns ADPCM_Decoder_1_Bit:u6\|lpm_divide:Div0\|lpm_divide_aem:auto_generated\|sign_div_unsign_klh:divider\|alt_u_div_e2f:divider\|add_sub_6_result_int\[5\]~7 7 COMB LAB_X30_Y17 2 " "Info: 7: + IC(0.000 ns) + CELL(0.080 ns) = 5.283 ns; Loc. = LAB_X30_Y17; Fanout = 2; COMB Node = 'ADPCM_Decoder_1_Bit:u6\|lpm_divide:Div0\|lpm_divide_aem:auto_generated\|sign_div_unsign_klh:divider\|alt_u_div_e2f:divider\|add_sub_6_result_int\[5\]~7'" {  } { { "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" "0.080 ns" { ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_6_result_int[4]~5 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_6_result_int[5]~7 } "NODE_NAME" } } { "db/alt_u_div_e2f.tdf" "" { Text "D:/HD_ADPCM/HD_ADPCM_1Bit_Stereo_Decoder/db/alt_u_div_e2f.tdf" 106 22 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 -1} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.080 ns) 5.363 ns ADPCM_Decoder_1_Bit:u6\|lpm_divide:Div0\|lpm_divide_aem:auto_generated\|sign_div_unsign_klh:divider\|alt_u_div_e2f:divider\|add_sub_6_result_int\[6\]~9 8 COMB LAB_X30_Y17 1 " "Info: 8: + IC(0.000 ns) + CELL(0.080 ns) = 5.363 ns; Loc. = LAB_X30_Y17; Fanout = 1; COMB Node = 'ADPCM_Decoder_1_Bit:u6\|lpm_divide:Div0\|lpm_divide_aem:auto_generated\|sign_div_unsign_klh:divider\|alt_u_div_e2f:divider\|add_sub_6_result_int\[6\]~9'" {  } { { "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" "0.080 ns" { ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_6_result_int[5]~7 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_6_result_int[6]~9 } "NODE_NAME" } } { "db/alt_u_div_e2f.tdf" "" { Text "D:/HD_ADPCM/HD_ADPCM_1Bit_Stereo_Decoder/db/alt_u_div_e2f.tdf" 106 22 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 -1} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.458 ns) 5.821 ns ADPCM_Decoder_1_Bit:u6\|lpm_divide:Div0\|lpm_divide_aem:auto_generated\|sign_div_unsign_klh:divider\|alt_u_div_e2f:divider\|add_sub_6_result_int\[7\]~10 9 COMB LAB_X30_Y17 19 " "Info: 9: + IC(0.000 ns) + CELL(0.458 ns) = 5.821 ns; Loc. = LAB_X30_Y17; Fanout = 19; COMB Node = 'ADPCM_Decoder_1_Bit:u6\|lpm_divide:Div0\|lpm_divide_aem:auto_generated\|sign_div_unsign_klh:divider\|alt_u_div_e2f:divider\|add_sub_6_result_int\[7\]~10'" {  } { { "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" "0.458 ns" { ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_6_result_int[6]~9 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_6_result_int[7]~10 } "NODE_NAME" } } { "db/alt_u_div_e2f.tdf" "" { Text "D:/HD_ADPCM/HD_ADPCM_1Bit_Stereo_Decoder/db/alt_u_div_e2f.tdf" 106 22 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 -1} { "Info" "ITDB_NODE_DELAY" "IC(1.073 ns) + CELL(0.177 ns) 7.071 ns ADPCM_Decoder_1_Bit:u6\|lpm_divide:Div0\|lpm_divide_aem:auto_generated\|sign_div_unsign_klh:divider\|alt_u_div_e2f:divider\|StageOut\[50\]~221 10 COMB LAB_X29_Y18 2 " "Info: 10: + IC(1.073 ns) + CELL(0.177 ns) = 7.071 ns; Loc. = LAB_X29_Y18; Fanout = 2; COMB Node = 'ADPCM_Decoder_1_Bit:u6\|lpm_divide:Div0\|lpm_divide_aem:auto_generated\|sign_div_unsign_klh:divider\|alt_u_div_e2f:divider\|StageOut\[50\]~221'" {  } { { "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" "1.250 ns" { ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_6_result_int[7]~10 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|StageOut[50]~221 } "NODE_NAME" } } { "db/alt_u_div_e2f.tdf" "" { Text "D:/HD_ADPCM/HD_ADPCM_1Bit_Stereo_Decoder/db/alt_u_div_e2f.tdf" 138 10 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 -1} { "Info" "ITDB_NODE_DELAY" "IC(1.073 ns) + CELL(0.495 ns) 8.639 ns ADPCM_Decoder_1_Bit:u6\|lpm_divide:Div0\|lpm_divide_aem:auto_generated\|sign_div_unsign_klh:divider\|alt_u_div_e2f:divider\|add_sub_7_result_int\[3\]~3 11 COMB LAB_X30_Y17 2 " "Info: 11: + IC(1.073 ns) + CELL(0.495 ns) = 8.639 ns; Loc. = LAB_X30_Y17; Fanout = 2; COMB Node = 'ADPCM_Decoder_1_Bit:u6\|lpm_divide:Div0\|lpm_divide_aem:auto_generated\|sign_div_unsign_klh:divider\|alt_u_div_e2f:divider\|add_sub_7_result_int\[3\]~3'" {  } { { "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" "1.568 ns" { ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|StageOut[50]~221 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_7_result_int[3]~3 } "NODE_NAME" } } { "db/alt_u_div_e2f.tdf" "" { Text "D:/HD_ADPCM/HD_ADPCM_1Bit_Stereo_Decoder/db/alt_u_div_e2f.tdf" 111 22 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 -1} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.080 ns) 8.719 ns ADPCM_Decoder_1_Bit:u6\|lpm_divide:Div0\|lpm_divide_aem:auto_generated\|sign_div_unsign_klh:divider\|alt_u_div_e2f:divider\|add_sub_7_result_int\[4\]~5 12 COMB LAB_X30_Y17 2 " "Info: 12: + IC(0.000 ns) + CELL(0.080 ns) = 8.719 ns; Loc. = LAB_X30_Y17; Fanout = 2; COMB Node = 'ADPCM_Decoder_1_Bit:u6\|lpm_divide:Div0\|lpm_divide_aem:auto_generated\|sign_div_unsign_klh:divider\|alt_u_div_e2f:divider\|add_sub_7_result_int\[4\]~5'" {  } { { "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" "0.080 ns" { ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_7_result_int[3]~3 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_7_result_int[4]~5 } "NODE_NAME" } } { "db/alt_u_div_e2f.tdf" "" { Text "D:/HD_ADPCM/HD_ADPCM_1Bit_Stereo_Decoder/db/alt_u_div_e2f.tdf" 111 22 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 -1} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.080 ns) 8.799 ns ADPCM_Decoder_1_Bit:u6\|lpm_divide:Div0\|lpm_divide_aem:auto_generated\|sign_div_unsign_klh:divider\|alt_u_div_e2f:divider\|add_sub_7_result_int\[5\]~7 13 COMB LAB_X30_Y17 2 " "Info: 13: + IC(0.000 ns) + CELL(0.080 ns) = 8.799 ns; Loc. = LAB_X30_Y17; Fanout = 2; COMB Node = 'ADPCM_Decoder_1_Bit:u6\|lpm_divide:Div0\|lpm_divide_aem:auto_generated\|sign_div_unsign_klh:divider\|alt_u_div_e2f:divider\|add_sub_7_result_int\[5\]~7'" {  } { { "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" "0.080 ns" { ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_7_result_int[4]~5 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_7_result_int[5]~7 } "NODE_NAME" } } { "db/alt_u_div_e2f.tdf" "" { Text "D:/HD_ADPCM/HD_ADPCM_1Bit_Stereo_Decoder/db/alt_u_div_e2f.tdf" 111 22 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 -1} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.080 ns) 8.879 ns ADPCM_Decoder_1_Bit:u6\|lpm_divide:Div0\|lpm_divide_aem:auto_generated\|sign_div_unsign_klh:divider\|alt_u_div_e2f:divider\|add_sub_7_result_int\[6\]~9 14 COMB LAB_X30_Y17 1 " "Info: 14: + IC(0.000 ns) + CELL(0.080 ns) = 8.879 ns; Loc. = LAB_X30_Y17; Fanout = 1; COMB Node = 'ADPCM_Decoder_1_Bit:u6\|lpm_divide:Div0\|lpm_divide_aem:auto_generated\|sign_div_unsign_klh:divider\|alt_u_div_e2f:divider\|add_sub_7_result_int\[6\]~9'" {  } { { "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" "0.080 ns" { ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_7_result_int[5]~7 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_7_result_int[6]~9 } "NODE_NAME" } } { "db/alt_u_div_e2f.tdf" "" { Text "D:/HD_ADPCM/HD_ADPCM_1Bit_Stereo_Decoder/db/alt_u_div_e2f.tdf" 111 22 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 -1} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.080 ns) 8.959 ns ADPCM_Decoder_1_Bit:u6\|lpm_divide:Div0\|lpm_divide_aem:auto_generated\|sign_div_unsign_klh:divider\|alt_u_div_e2f:divider\|add_sub_7_result_int\[7\]~11 15 COMB LAB_X30_Y17 1 " "Info: 15: + IC(0.000 ns) + CELL(0.080 ns) = 8.959 ns; Loc. = LAB_X30_Y17; Fanout = 1; COMB Node = 'ADPCM_Decoder_1_Bit:u6\|lpm_divide:Div0\|lpm_divide_aem:auto_generated\|sign_div_unsign_klh:divider\|alt_u_div_e2f:divider\|add_sub_7_result_int\[7\]~11'" {  } { { "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" "0.080 ns" { ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_7_result_int[6]~9 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_7_result_int[7]~11 } "NODE_NAME" } } { "db/alt_u_div_e2f.tdf" "" { Text "D:/HD_ADPCM/HD_ADPCM_1Bit_Stereo_Decoder/db/alt_u_div_e2f.tdf" 111 22 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 -1} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.458 ns) 9.417 ns ADPCM_Decoder_1_Bit:u6\|lpm_divide:Div0\|lpm_divide_aem:auto_generated\|sign_div_unsign_klh:divider\|alt_u_div_e2f:divider\|add_sub_7_result_int\[8\]~12 16 COMB LAB_X30_Y17 20 " "Info: 16: + IC(0.000 ns) + CELL(0.458 ns) = 9.417 ns; Loc. = LAB_X30_Y17; Fanout = 20; COMB Node = 'ADPCM_Decoder_1_Bit:u6\|lpm_divide:Div0\|lpm_divide_aem:auto_generated\|sign_div_unsign_klh:divider\|alt_u_div_e2f:divider\|add_sub_7_result_int\[8\]~12'" {  } { { "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" "0.458 ns" { ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_7_result_int[7]~11 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_7_result_int[8]~12 } "NODE_NAME" } } { "db/alt_u_div_e2f.tdf" "" { Text "D:/HD_ADPCM/HD_ADPCM_1Bit_Stereo_Decoder/db/alt_u_div_e2f.tdf" 111 22 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 -1} { "Info" "ITDB_NODE_DELAY" "IC(0.388 ns) + CELL(0.521 ns) 10.326 ns ADPCM_Decoder_1_Bit:u6\|lpm_divide:Div0\|lpm_divide_aem:auto_generated\|sign_div_unsign_klh:divider\|alt_u_div_e2f:divider\|StageOut\[58\]~197 17 COMB LAB_X29_Y17 2 " "Info: 17: + IC(0.388 ns) + CELL(0.521 ns) = 10.326 ns; Loc. = LAB_X29_Y17; Fanout = 2; COMB Node = 'ADPCM_Decoder_1_Bit:u6\|lpm_divide:Div0\|lpm_divide_aem:auto_generated\|sign_div_unsign_klh:divider\|alt_u_div_e2f:divider\|StageOut\[58\]~197'" {  } { { "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" "0.909 ns" { ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_7_result_int[8]~12 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|StageOut[58]~197 } "NODE_NAME" } } { "db/alt_u_div_e2f.tdf" "" { Text "D:/HD_ADPCM/HD_ADPCM_1Bit_Stereo_Decoder/db/alt_u_div_e2f.tdf" 138 10 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 -1} { "Info" "ITDB_NODE_DELAY" "IC(1.015 ns) + CELL(0.517 ns) 11.858 ns ADPCM_Decoder_1_Bit:u6\|lpm_divide:Div0\|lpm_divide_aem:auto_generated\|sign_div_unsign_klh:divider\|alt_u_div_e2f:divider\|add_sub_8_result_int\[3\]~3 18 COMB LAB_X31_Y17 2 " "Info: 18: + IC(1.015 ns) + CELL(0.517 ns) = 11.858 ns; Loc. = LAB_X31_Y17; Fanout = 2; COMB Node = 'ADPCM_Decoder_1_Bit:u6\|lpm_divide:Div0\|lpm_divide_aem:auto_generated\|sign_div_unsign_klh:divider\|alt_u_div_e2f:divider\|add_sub_8_result_int\[3\]~3'" {  } { { "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" "1.532 ns" { ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|StageOut[58]~197 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_8_result_int[3]~3 } "NODE_NAME" } } { "db/alt_u_div_e2f.tdf" "" { Text "D:/HD_ADPCM/HD_ADPCM_1Bit_Stereo_Decoder/db/alt_u_div_e2f.tdf" 116 22 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 -1} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.080 ns) 11.938 ns ADPCM_Decoder_1_Bit:u6\|lpm_divide:Div0\|lpm_divide_aem:auto_generated\|sign_div_unsign_klh:divider\|alt_u_div_e2f:divider\|add_sub_8_result_int\[4\]~5 19 COMB LAB_X31_Y17 2 " "Info: 19: + IC(0.000 ns) + CELL(0.080 ns) = 11.938 ns; Loc. = LAB_X31_Y17; Fanout = 2; COMB Node = 'ADPCM_Decoder_1_Bit:u6\|lpm_divide:Div0\|lpm_divide_aem:auto_generated\|sign_div_unsign_klh:divider\|alt_u_div_e2f:divider\|add_sub_8_result_int\[4\]~5'" {  } { { "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" "0.080 ns" { ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_8_result_int[3]~3 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_8_result_int[4]~5 } "NODE_NAME" } } { "db/alt_u_div_e2f.tdf" "" { Text "D:/HD_ADPCM/HD_ADPCM_1Bit_Stereo_Decoder/db/alt_u_div_e2f.tdf" 116 22 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 -1} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.080 ns) 12.018 ns ADPCM_Decoder_1_Bit:u6\|lpm_divide:Div0\|lpm_divide_aem:auto_generated\|sign_div_unsign_klh:divider\|alt_u_div_e2f:divider\|add_sub_8_result_int\[5\]~7 20 COMB LAB_X31_Y17 2 " "Info: 20: + IC(0.000 ns) + CELL(0.080 ns) = 12.018 ns; Loc. = LAB_X31_Y17; Fanout = 2; COMB Node = 'ADPCM_Decoder_1_Bit:u6\|lpm_divide:Div0\|lpm_divide_aem:auto_generated\|sign_div_unsign_klh:divider\|alt_u_div_e2f:divider\|add_sub_8_result_int\[5\]~7'" {  } { { "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" "0.080 ns" { ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_8_result_int[4]~5 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_8_result_int[5]~7 } "NODE_NAME" } } { "db/alt_u_div_e2f.tdf" "" { Text "D:/HD_ADPCM/HD_ADPCM_1Bit_Stereo_Decoder/db/alt_u_div_e2f.tdf" 116 22 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 -1} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.080 ns) 12.098 ns ADPCM_Decoder_1_Bit:u6\|lpm_divide:Div0\|lpm_divide_aem:auto_generated\|sign_div_unsign_klh:divider\|alt_u_div_e2f:divider\|add_sub_8_result_int\[6\]~9 21 COMB LAB_X31_Y17 1 " "Info: 21: + IC(0.000 ns) + CELL(0.080 ns) = 12.098 ns; Loc. = LAB_X31_Y17; Fanout = 1; COMB Node = 'ADPCM_Decoder_1_Bit:u6\|lpm_divide:Div0\|lpm_divide_aem:auto_generated\|sign_div_unsign_klh:divider\|alt_u_div_e2f:divider\|add_sub_8_result_int\[6\]~9'" {  } { { "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" "0.080 ns" { ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_8_result_int[5]~7 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_8_result_int[6]~9 } "NODE_NAME" } } { "db/alt_u_div_e2f.tdf" "" { Text "D:/HD_ADPCM/HD_ADPCM_1Bit_Stereo_Decoder/db/alt_u_div_e2f.tdf" 116 22 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 -1} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.080 ns) 12.178 ns ADPCM_Decoder_1_Bit:u6\|lpm_divide:Div0\|lpm_divide_aem:auto_generated\|sign_div_unsign_klh:divider\|alt_u_div_e2f:divider\|add_sub_8_result_int\[7\]~11 22 COMB LAB_X31_Y17 1 " "Info: 22: + IC(0.000 ns) + CELL(0.080 ns) = 12.178 ns; Loc. = LAB_X31_Y17; Fanout = 1; COMB Node = 'ADPCM_Decoder_1_Bit:u6\|lpm_divide:Div0\|lpm_divide_aem:auto_generated\|sign_div_unsign_klh:divider\|alt_u_div_e2f:divider\|add_sub_8_result_int\[7\]~11'" {  } { { "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" "0.080 ns" { ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_8_result_int[6]~9 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_8_result_int[7]~11 } "NODE_NAME" } } { "db/alt_u_div_e2f.tdf" "" { Text "D:/HD_ADPCM/HD_ADPCM_1Bit_Stereo_Decoder/db/alt_u_div_e2f.tdf" 116 22 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 -1} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.458 ns) 12.636 ns ADPCM_Decoder_1_Bit:u6\|lpm_divide:Div0\|lpm_divide_aem:auto_generated\|sign_div_unsign_klh:divider\|alt_u_div_e2f:divider\|add_sub_8_result_int\[8\]~12 23 COMB LAB_X31_Y17 20 " "Info: 23: + IC(0.000 ns) + CELL(0.458 ns) = 12.636 ns; Loc. = LAB_X31_Y17; Fanout = 20; COMB Node = 'ADPCM_Decoder_1_Bit:u6\|lpm_divide:Div0\|lpm_divide_aem:auto_generated\|sign_div_unsign_klh:divider\|alt_u_div_e2f:divider\|add_sub_8_result_int\[8\]~12'" {  } { { "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" "0.458 ns" { ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_8_result_int[7]~11 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_8_result_int[8]~12 } "NODE_NAME" } } { "db/alt_u_div_e2f.tdf" "" { Text "D:/HD_ADPCM/HD_ADPCM_1Bit_Stereo_Decoder/db/alt_u_div_e2f.tdf" 116 22 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 -1} { "Info" "ITDB_NODE_DELAY" "IC(1.039 ns) + CELL(0.178 ns) 13.853 ns ADPCM_Decoder_1_Bit:u6\|lpm_divide:Div0\|lpm_divide_aem:auto_generated\|sign_div_unsign_klh:divider\|alt_u_div_e2f:divider\|StageOut\[67\]~581 24 COMB LAB_X29_Y17 3 " "Info: 24: + IC(1.039 ns) + CELL(0.178 ns) = 13.853 ns; Loc. = LAB_X29_Y17; Fanout = 3; COMB Node = 'ADPCM_Decoder_1_Bit:u6\|lpm_divide:Div0\|lpm_divide_aem:auto_generated\|sign_div_unsign_klh:divider\|alt_u_div_e2f:divider\|StageOut\[67\]~581'" {  } { { "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" "1.217 ns" { ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_8_result_int[8]~12 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|StageOut[67]~581 } "NODE_NAME" } } { "db/alt_u_div_e2f.tdf" "" { Text "D:/HD_ADPCM/HD_ADPCM_1Bit_Stereo_Decoder/db/alt_u_div_e2f.tdf" 138 10 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 -1} { "Info" "ITDB_NODE_DELAY" "IC(1.375 ns) + CELL(0.517 ns) 15.745 ns ADPCM_Decoder_1_Bit:u6\|lpm_divide:Div0\|lpm_divide_aem:auto_generated\|sign_div_unsign_klh:divider\|alt_u_div_e2f:divider\|add_sub_9_result_int\[4\]~5 25 COMB LAB_X32_Y20 2 " "Info: 25: + IC(1.375 ns) + CELL(0.517 ns) = 15.745 ns; Loc. = LAB_X32_Y20; Fanout = 2; COMB Node = 'ADPCM_Decoder_1_Bit:u6\|lpm_divide:Div0\|lpm_divide_aem:auto_generated\|sign_div_unsign_klh:divider\|alt_u_div_e2f:divider\|add_sub_9_result_int\[4\]~5'" {  } { { "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" "1.892 ns" { ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|StageOut[67]~581 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_9_result_int[4]~5 } "NODE_NAME" } } { "db/alt_u_div_e2f.tdf" "" { Text "D:/HD_ADPCM/HD_ADPCM_1Bit_Stereo_Decoder/db/alt_u_div_e2f.tdf" 121 22 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 -1} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.080 ns) 15.825 ns ADPCM_Decoder_1_Bit:u6\|lpm_divide:Div0\|lpm_divide_aem:auto_generated\|sign_div_unsign_klh:divider\|alt_u_div_e2f:divider\|add_sub_9_result_int\[5\]~7 26 COMB LAB_X32_Y20 2 " "Info: 26: + IC(0.000 ns) + CELL(0.080 ns) = 15.825 ns; Loc. = LAB_X32_Y20; Fanout = 2; COMB Node = 'ADPCM_Decoder_1_Bit:u6\|lpm_divide:Div0\|lpm_divide_aem:auto_generated\|sign_div_unsign_klh:divider\|alt_u_div_e2f:divider\|add_sub_9_result_int\[5\]~7'" {  } { { "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" "0.080 ns" { ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_9_result_int[4]~5 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_9_result_int[5]~7 } "NODE_NAME" } } { "db/alt_u_div_e2f.tdf" "" { Text "D:/HD_ADPCM/HD_ADPCM_1Bit_Stereo_Decoder/db/alt_u_div_e2f.tdf" 121 22 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 -1} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.080 ns) 15.905 ns ADPCM_Decoder_1_Bit:u6\|lpm_divide:Div0\|lpm_divide_aem:auto_generated\|sign_div_unsign_klh:divider\|alt_u_div_e2f:divider\|add_sub_9_result_int\[6\]~9 27 COMB LAB_X32_Y20 1 " "Info: 27: + IC(0.000 ns) + CELL(0.080 ns) = 15.905 ns; Loc. = LAB_X32_Y20; Fanout = 1; COMB Node = 'ADPCM_Decoder_1_Bit:u6\|lpm_divide:Div0\|lpm_divide_aem:auto_generated\|sign_div_unsign_klh:divider\|alt_u_div_e2f:divider\|add_sub_9_result_int\[6\]~9'" {  } { { "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" "0.080 ns" { ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_9_result_int[5]~7 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_9_result_int[6]~9 } "NODE_NAME" } } { "db/alt_u_div_e2f.tdf" "" { Text "D:/HD_ADPCM/HD_ADPCM_1Bit_Stereo_Decoder/db/alt_u_div_e2f.tdf" 121 22 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 -1} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.080 ns) 15.985 ns ADPCM_Decoder_1_Bit:u6\|lpm_divide:Div0\|lpm_divide_aem:auto_generated\|sign_div_unsign_klh:divider\|alt_u_div_e2f:divider\|add_sub_9_result_int\[7\]~11 28 COMB LAB_X32_Y20 1 " "Info: 28: + IC(0.000 ns) + CELL(0.080 ns) = 15.985 ns; Loc. = LAB_X32_Y20; Fanout = 1; COMB Node = 'ADPCM_Decoder_1_Bit:u6\|lpm_divide:Div0\|lpm_divide_aem:auto_generated\|sign_div_unsign_klh:divider\|alt_u_div_e2f:divider\|add_sub_9_result_int\[7\]~11'" {  } { { "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" "0.080 ns" { ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_9_result_int[6]~9 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_9_result_int[7]~11 } "NODE_NAME" } } { "db/alt_u_div_e2f.tdf" "" { Text "D:/HD_ADPCM/HD_ADPCM_1Bit_Stereo_Decoder/db/alt_u_div_e2f.tdf" 121 22 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 -1} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.458 ns) 16.443 ns ADPCM_Decoder_1_Bit:u6\|lpm_divide:Div0\|lpm_divide_aem:auto_generated\|sign_div_unsign_klh:divider\|alt_u_div_e2f:divider\|add_sub_9_result_int\[8\]~12 29 COMB LAB_X32_Y20 20 " "Info: 29: + IC(0.000 ns) + CELL(0.458 ns) = 16.443 ns; Loc. = LAB_X32_Y20; Fanout = 20; COMB Node = 'ADPCM_Decoder_1_Bit:u6\|lpm_divide:Div0\|lpm_divide_aem:auto_generated\|sign_div_unsign_klh:divider\|alt_u_div_e2f:divider\|add_sub_9_result_int\[8\]~12'" {  } { { "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" "0.458 ns" { ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_9_result_int[7]~11 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_9_result_int[8]~12 } "NODE_NAME" } } { "db/alt_u_div_e2f.tdf" "" { Text "D:/HD_ADPCM/HD_ADPCM_1Bit_Stereo_Decoder/db/alt_u_div_e2f.tdf" 121 22 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 -1} { "Info" "ITDB_NODE_DELAY" "IC(1.039 ns) + CELL(0.177 ns) 17.659 ns ADPCM_Decoder_1_Bit:u6\|lpm_divide:Div0\|lpm_divide_aem:auto_generated\|sign_div_unsign_klh:divider\|alt_u_div_e2f:divider\|StageOut\[73\]~174 30 COMB LAB_X34_Y20 2 " "Info: 30: + IC(1.039 ns) + CELL(0.177 ns) = 17.659 ns; Loc. = LAB_X34_Y20; Fanout = 2; COMB Node = 'ADPCM_Decoder_1_Bit:u6\|lpm_divide:Div0\|lpm_divide_aem:auto_generated\|sign_div_unsign_klh:divider\|alt_u_div_e2f:divider\|StageOut\[73\]~174'" {  } { { "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" "1.216 ns" { ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_9_result_int[8]~12 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|StageOut[73]~174 } "NODE_NAME" } } { "db/alt_u_div_e2f.tdf" "" { Text "D:/HD_ADPCM/HD_ADPCM_1Bit_Stereo_Decoder/db/alt_u_div_e2f.tdf" 138 10 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 -1} { "Info" "ITDB_NODE_DELAY" "IC(0.498 ns) + CELL(0.495 ns) 18.652 ns ADPCM_Decoder_1_Bit:u6\|lpm_divide:Div0\|lpm_divide_aem:auto_generated\|sign_div_unsign_klh:divider\|alt_u_div_e2f:divider\|add_sub_10_result_int\[2\]~1 31 COMB LAB_X34_Y20 2 " "Info: 31: + IC(0.498 ns) + CELL(0.495 ns) = 18.652 ns; Loc. = LAB_X34_Y20; Fanout = 2; COMB Node = 'ADPCM_Decoder_1_Bit:u6\|lpm_divide:Div0\|lpm_divide_aem:auto_generated\|sign_div_unsign_klh:divider\|alt_u_div_e2f:divider\|add_sub_10_result_int\[2\]~1'" {  } { { "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" "0.993 ns" { ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|StageOut[73]~174 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_10_result_int[2]~1 } "NODE_NAME" } } { "db/alt_u_div_e2f.tdf" "" { Text "D:/HD_ADPCM/HD_ADPCM_1Bit_Stereo_Decoder/db/alt_u_div_e2f.tdf" 36 23 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 -1} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.080 ns) 18.732 ns ADPCM_Decoder_1_Bit:u6\|lpm_divide:Div0\|lpm_divide_aem:auto_generated\|sign_div_unsign_klh:divider\|alt_u_div_e2f:divider\|add_sub_10_result_int\[3\]~3 32 COMB LAB_X34_Y20 2 " "Info: 32: + IC(0.000 ns) + CELL(0.080 ns) = 18.732 ns; Loc. = LAB_X34_Y20; Fanout = 2; COMB Node = 'ADPCM_Decoder_1_Bit:u6\|lpm_divide:Div0\|lpm_divide_aem:auto_generated\|sign_div_unsign_klh:divider\|alt_u_div_e2f:divider\|add_sub_10_result_int\[3\]~3'" {  } { { "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" "0.080 ns" { ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_10_result_int[2]~1 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_10_result_int[3]~3 } "NODE_NAME" } } { "db/alt_u_div_e2f.tdf" "" { Text "D:/HD_ADPCM/HD_ADPCM_1Bit_Stereo_Decoder/db/alt_u_div_e2f.tdf" 36 23 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 -1} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.080 ns) 18.812 ns ADPCM_Decoder_1_Bit:u6\|lpm_divide:Div0\|lpm_divide_aem:auto_generated\|sign_div_unsign_klh:divider\|alt_u_div_e2f:divider\|add_sub_10_result_int\[4\]~5 33 COMB LAB_X34_Y20 2 " "Info: 33: + IC(0.000 ns) + CELL(0.080 ns) = 18.812 ns; Loc. = LAB_X34_Y20; Fanout = 2; COMB Node = 'ADPCM_Decoder_1_Bit:u6\|lpm_divide:Div0\|lpm_divide_aem:auto_generated\|sign_div_unsign_klh:divider\|alt_u_div_e2f:divider\|add_sub_10_result_int\[4\]~5'" {  } { { "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" "0.080 ns" { ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_10_result_int[3]~3 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_10_result_int[4]~5 } "NODE_NAME" } } { "db/alt_u_div_e2f.tdf" "" { Text "D:/HD_ADPCM/HD_ADPCM_1Bit_Stereo_Decoder/db/alt_u_div_e2f.tdf" 36 23 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 -1} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.080 ns) 18.892 ns ADPCM_Decoder_1_Bit:u6\|lpm_divide:Div0\|lpm_divide_aem:auto_generated\|sign_div_unsign_klh:divider\|alt_u_div_e2f:divider\|add_sub_10_result_int\[5\]~7 34 COMB LAB_X34_Y20 2 " "Info: 34: + IC(0.000 ns) + CELL(0.080 ns) = 18.892 ns; Loc. = LAB_X34_Y20; Fanout = 2; COMB Node = 'ADPCM_Decoder_1_Bit:u6\|lpm_divide:Div0\|lpm_divide_aem:auto_generated\|sign_div_unsign_klh:divider\|alt_u_div_e2f:divider\|add_sub_10_result_int\[5\]~7'" {  } { { "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" "0.080 ns" { ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_10_result_int[4]~5 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_10_result_int[5]~7 } "NODE_NAME" } } { "db/alt_u_div_e2f.tdf" "" { Text "D:/HD_ADPCM/HD_ADPCM_1Bit_Stereo_Decoder/db/alt_u_div_e2f.tdf" 36 23 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 -1} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.080 ns) 18.972 ns ADPCM_Decoder_1_Bit:u6\|lpm_divide:Div0\|lpm_divide_aem:auto_generated\|sign_div_unsign_klh:divider\|alt_u_div_e2f:divider\|add_sub_10_result_int\[6\]~9 35 COMB LAB_X34_Y20 1 " "Info: 35: + IC(0.000 ns) + CELL(0.080 ns) = 18.972 ns; Loc. = LAB_X34_Y20; Fanout = 1; COMB Node = 'ADPCM_Decoder_1_Bit:u6\|lpm_divide:Div0\|lpm_divide_aem:auto_generated\|sign_div_unsign_klh:divider\|alt_u_div_e2f:divider\|add_sub_10_result_int\[6\]~9'" {  } { { "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" "0.080 ns" { ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_10_result_int[5]~7 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_10_result_int[6]~9 } "NODE_NAME" } } { "db/alt_u_div_e2f.tdf" "" { Text "D:/HD_ADPCM/HD_ADPCM_1Bit_Stereo_Decoder/db/alt_u_div_e2f.tdf" 36 23 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 -1} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.080 ns) 19.052 ns ADPCM_Decoder_1_Bit:u6\|lpm_divide:Div0\|lpm_divide_aem:auto_generated\|sign_div_unsign_klh:divider\|alt_u_div_e2f:divider\|add_sub_10_result_int\[7\]~11 36 COMB LAB_X34_Y20 1 " "Info: 36: + IC(0.000 ns) + CELL(0.080 ns) = 19.052 ns; Loc. = LAB_X34_Y20; Fanout = 1; COMB Node = 'ADPCM_Decoder_1_Bit:u6\|lpm_divide:Div0\|lpm_divide_aem:auto_generated\|sign_div_unsign_klh:divider\|alt_u_div_e2f:divider\|add_sub_10_result_int\[7\]~11'" {  } { { "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" "0.080 ns" { ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_10_result_int[6]~9 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_10_result_int[7]~11 } "NODE_NAME" } } { "db/alt_u_div_e2f.tdf" "" { Text "D:/HD_ADPCM/HD_ADPCM_1Bit_Stereo_Decoder/db/alt_u_div_e2f.tdf" 36 23 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 -1} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.458 ns) 19.510 ns ADPCM_Decoder_1_Bit:u6\|lpm_divide:Div0\|lpm_divide_aem:auto_generated\|sign_div_unsign_klh:divider\|alt_u_div_e2f:divider\|add_sub_10_result_int\[8\]~12 37 COMB LAB_X34_Y20 20 " "Info: 37: + IC(0.000 ns) + CELL(0.458 ns) = 19.510 ns; Loc. = LAB_X34_Y20; Fanout = 20; COMB Node = 'ADPCM_Decoder_1_Bit:u6\|lpm_divide:Div0\|lpm_divide_aem:auto_generated\|sign_div_unsign_klh:divider\|alt_u_div_e2f:divider\|add_sub_10_result_int\[8\]~12'" {  } { { "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" "0.458 ns" { ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_10_result_int[7]~11 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_10_result_int[8]~12 } "NODE_NAME" } } { "db/alt_u_div_e2f.tdf" "" { Text "D:/HD_ADPCM/HD_ADPCM_1Bit_Stereo_Decoder/db/alt_u_div_e2f.tdf" 36 23 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 -1} { "Info" "ITDB_NODE_DELAY" "IC(0.588 ns) + CELL(0.319 ns) 20.417 ns ADPCM_Decoder_1_Bit:u6\|lpm_divide:Div0\|lpm_divide_aem:auto_generated\|sign_div_unsign_klh:divider\|alt_u_div_e2f:divider\|StageOut\[83\]~544 38 COMB LAB_X33_Y20 3 " "Info: 38: + IC(0.588 ns) + CELL(0.319 ns) = 20.417 ns; Loc. = LAB_X33_Y20; Fanout = 3; COMB Node = 'ADPCM_Decoder_1_Bit:u6\|lpm_divide:Div0\|lpm_divide_aem:auto_generated\|sign_div_unsign_klh:divider\|alt_u_div_e2f:divider\|StageOut\[83\]~544'" {  } { { "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" "0.907 ns" { ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_10_result_int[8]~12 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|StageOut[83]~544 } "NODE_NAME" } } { "db/alt_u_div_e2f.tdf" "" { Text "D:/HD_ADPCM/HD_ADPCM_1Bit_Stereo_Decoder/db/alt_u_div_e2f.tdf" 138 10 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 -1} { "Info" "ITDB_NODE_DELAY" "IC(1.016 ns) + CELL(0.517 ns) 21.950 ns ADPCM_Decoder_1_Bit:u6\|lpm_divide:Div0\|lpm_divide_aem:auto_generated\|sign_div_unsign_klh:divider\|alt_u_div_e2f:divider\|add_sub_11_result_int\[4\]~5 39 COMB LAB_X35_Y20 2 " "Info: 39: + IC(1.016 ns) + CELL(0.517 ns) = 21.950 ns; Loc. = LAB_X35_Y20; Fanout = 2; COMB Node = 'ADPCM_Decoder_1_Bit:u6\|lpm_divide:Div0\|lpm_divide_aem:auto_generated\|sign_div_unsign_klh:divider\|alt_u_div_e2f:divider\|add_sub_11_result_int\[4\]~5'" {  } { { "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" "1.533 ns" { ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|StageOut[83]~544 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_11_result_int[4]~5 } "NODE_NAME" } } { "db/alt_u_div_e2f.tdf" "" { Text "D:/HD_ADPCM/HD_ADPCM_1Bit_Stereo_Decoder/db/alt_u_div_e2f.tdf" 41 23 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 -1} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.080 ns) 22.030 ns ADPCM_Decoder_1_Bit:u6\|lpm_divide:Div0\|lpm_divide_aem:auto_generated\|sign_div_unsign_klh:divider\|alt_u_div_e2f:divider\|add_sub_11_result_int\[5\]~7 40 COMB LAB_X35_Y20 2 " "Info: 40: + IC(0.000 ns) + CELL(0.080 ns) = 22.030 ns; Loc. = LAB_X35_Y20; Fanout = 2; COMB Node = 'ADPCM_Decoder_1_Bit:u6\|lpm_divide:Div0\|lpm_divide_aem:auto_generated\|sign_div_unsign_klh:divider\|alt_u_div_e2f:divider\|add_sub_11_result_int\[5\]~7'" {  } { { "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" "0.080 ns" { ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_11_result_int[4]~5 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_11_result_int[5]~7 } "NODE_NAME" } } { "db/alt_u_div_e2f.tdf" "" { Text "D:/HD_ADPCM/HD_ADPCM_1Bit_Stereo_Decoder/db/alt_u_div_e2f.tdf" 41 23 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 -1} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.080 ns) 22.110 ns ADPCM_Decoder_1_Bit:u6\|lpm_divide:Div0\|lpm_divide_aem:auto_generated\|sign_div_unsign_klh:divider\|alt_u_div_e2f:divider\|add_sub_11_result_int\[6\]~9 41 COMB LAB_X35_Y20 1 " "Info: 41: + IC(0.000 ns) + CELL(0.080 ns) = 22.110 ns; Loc. = LAB_X35_Y20; Fanout = 1; COMB Node = 'ADPCM_Decoder_1_Bit:u6\|lpm_divide:Div0\|lpm_divide_aem:auto_generated\|sign_div_unsign_klh:divider\|alt_u_div_e2f:divider\|add_sub_11_result_int\[6\]~9'" {  } { { "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" "0.080 ns" { ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_11_result_int[5]~7 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_11_result_int[6]~9 } "NODE_NAME" } } { "db/alt_u_div_e2f.tdf" "" { Text "D:/HD_ADPCM/HD_ADPCM_1Bit_Stereo_Decoder/db/alt_u_div_e2f.tdf" 41 23 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 -1} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.080 ns) 22.190 ns ADPCM_Decoder_1_Bit:u6\|lpm_divide:Div0\|lpm_divide_aem:auto_generated\|sign_div_unsign_klh:divider\|alt_u_div_e2f:divider\|add_sub_11_result_int\[7\]~11 42 COMB LAB_X35_Y20 1 " "Info: 42: + IC(0.000 ns) + CELL(0.080 ns) = 22.190 ns; Loc. = LAB_X35_Y20; Fanout = 1; COMB Node = 'ADPCM_Decoder_1_Bit:u6\|lpm_divide:Div0\|lpm_divide_aem:auto_generated\|sign_div_unsign_klh:divider\|alt_u_div_e2f:divider\|add_sub_11_result_int\[7\]~11'" {  } { { "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" "0.080 ns" { ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_11_result_int[6]~9 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_11_result_int[7]~11 } "NODE_NAME" } } { "db/alt_u_div_e2f.tdf" "" { Text "D:/HD_ADPCM/HD_ADPCM_1Bit_Stereo_Decoder/db/alt_u_div_e2f.tdf" 41 23 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 -1} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.458 ns) 22.648 ns ADPCM_Decoder_1_Bit:u6\|lpm_divide:Div0\|lpm_divide_aem:auto_generated\|sign_div_unsign_klh:divider\|alt_u_div_e2f:divider\|add_sub_11_result_int\[8\]~12 43 COMB LAB_X35_Y20 20 " "Info: 43: + IC(0.000 ns) + CELL(0.458 ns) = 22.648 ns; Loc. = LAB_X35_Y20; Fanout = 20; COMB Node = 'ADPCM_Decoder_1_Bit:u6\|lpm_divide:Div0\|lpm_divide_aem:auto_generated\|sign_div_unsign_klh:divider\|alt_u_div_e2f:divider\|add_sub_11_result_int\[8\]~12'" {  } { { "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" "0.458 ns" { ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_11_result_int[7]~11 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_11_result_int[8]~12 } "NODE_NAME" } } { "db/alt_u_div_e2f.tdf" "" { Text "D:/HD_ADPCM/HD_ADPCM_1Bit_Stereo_Decoder/db/alt_u_div_e2f.tdf" 41 23 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 -1} { "Info" "ITDB_NODE_DELAY" "IC(0.895 ns) + CELL(0.319 ns) 23.862 ns ADPCM_Decoder_1_Bit:u6\|lpm_divide:Div0\|lpm_divide_aem:auto_generated\|sign_div_unsign_klh:divider\|alt_u_div_e2f:divider\|StageOut\[92\]~547 44 COMB LAB_X33_Y20 3 " "Info: 44: + IC(0.895 ns) + CELL(0.319 ns) = 23.862 ns; Loc. = LAB_X33_Y20; Fanout = 3; COMB Node = 'ADPCM_Decoder_1_Bit:u6\|lpm_divide:Div0\|lpm_divide_aem:auto_generated\|sign_div_unsign_klh:divider\|alt_u_div_e2f:divider\|StageOut\[92\]~547'" {  } { { "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" "1.214 ns" { ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_11_result_int[8]~12 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|StageOut[92]~547 } "NODE_NAME" } } { "db/alt_u_div_e2f.tdf" "" { Text "D:/HD_ADPCM/HD_ADPCM_1Bit_Stereo_Decoder/db/alt_u_div_e2f.tdf" 138 10 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 -1} { "Info" "ITDB_NODE_DELAY" "IC(1.017 ns) + CELL(0.517 ns) 25.396 ns ADPCM_Decoder_1_Bit:u6\|lpm_divide:Div0\|lpm_divide_aem:auto_generated\|sign_div_unsign_klh:divider\|alt_u_div_e2f:divider\|add_sub_12_result_int\[5\]~7 45 COMB LAB_X36_Y20 2 " "Info: 45: + IC(1.017 ns) + CELL(0.517 ns) = 25.396 ns; Loc. = LAB_X36_Y20; Fanout = 2; COMB Node = 'ADPCM_Decoder_1_Bit:u6\|lpm_divide:Div0\|lpm_divide_aem:auto_generated\|sign_div_unsign_klh:divider\|alt_u_div_e2f:divider\|add_sub_12_result_int\[5\]~7'" {  } { { "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" "1.534 ns" { ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|StageOut[92]~547 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_12_result_int[5]~7 } "NODE_NAME" } } { "db/alt_u_div_e2f.tdf" "" { Text "D:/HD_ADPCM/HD_ADPCM_1Bit_Stereo_Decoder/db/alt_u_div_e2f.tdf" 46 23 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 -1} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.080 ns) 25.476 ns ADPCM_Decoder_1_Bit:u6\|lpm_divide:Div0\|lpm_divide_aem:auto_generated\|sign_div_unsign_klh:divider\|alt_u_div_e2f:divider\|add_sub_12_result_int\[6\]~9 46 COMB LAB_X36_Y20 1 " "Info: 46: + IC(0.000 ns) + CELL(0.080 ns) = 25.476 ns; Loc. = LAB_X36_Y20; Fanout = 1; COMB Node = 'ADPCM_Decoder_1_Bit:u6\|lpm_divide:Div0\|lpm_divide_aem:auto_generated\|sign_div_unsign_klh:divider\|alt_u_div_e2f:divider\|add_sub_12_result_int\[6\]~9'" {  } { { "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" "0.080 ns" { ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_12_result_int[5]~7 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_12_result_int[6]~9 } "NODE_NAME" } } { "db/alt_u_div_e2f.tdf" "" { Text "D:/HD_ADPCM/HD_ADPCM_1Bit_Stereo_Decoder/db/alt_u_div_e2f.tdf" 46 23 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 -1} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.080 ns) 25.556 ns ADPCM_Decoder_1_Bit:u6\|lpm_divide:Div0\|lpm_divide_aem:auto_generated\|sign_div_unsign_klh:divider\|alt_u_div_e2f:divider\|add_sub_12_result_int\[7\]~11 47 COMB LAB_X36_Y20 1 " "Info: 47: + IC(0.000 ns) + CELL(0.080 ns) = 25.556 ns; Loc. = LAB_X36_Y20; Fanout = 1; COMB Node = 'ADPCM_Decoder_1_Bit:u6\|lpm_divide:Div0\|lpm_divide_aem:auto_generated\|sign_div_unsign_klh:divider\|alt_u_div_e2f:divider\|add_sub_12_result_int\[7\]~11'" {  } { { "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" "0.080 ns" { ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_12_result_int[6]~9 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_12_result_int[7]~11 } "NODE_NAME" } } { "db/alt_u_div_e2f.tdf" "" { Text "D:/HD_ADPCM/HD_ADPCM_1Bit_Stereo_Decoder/db/alt_u_div_e2f.tdf" 46 23 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 -1} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.458 ns) 26.014 ns ADPCM_Decoder_1_Bit:u6\|lpm_divide:Div0\|lpm_divide_aem:auto_generated\|sign_div_unsign_klh:divider\|alt_u_div_e2f:divider\|add_sub_12_result_int\[8\]~12 48 COMB LAB_X36_Y20 20 " "Info: 48: + IC(0.000 ns) + CELL(0.458 ns) = 26.014 ns; Loc. = LAB_X36_Y20; Fanout = 20; COMB Node = 'ADPCM_Decoder_1_Bit:u6\|lpm_divide:Div0\|lpm_divide_aem:auto_generated\|sign_div_unsign_klh:divider\|alt_u_div_e2f:divider\|add_sub_12_result_int\[8\]~12'" {  } { { "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" "0.458 ns" { ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_12_result_int[7]~11 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_12_result_int[8]~12 } "NODE_NAME" } } { "db/alt_u_div_e2f.tdf" "" { Text "D:/HD_ADPCM/HD_ADPCM_1Bit_Stereo_Decoder/db/alt_u_div_e2f.tdf" 46 23 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 -1} { "Info" "ITDB_NODE_DELAY" "IC(0.896 ns) + CELL(0.319 ns) 27.229 ns ADPCM_Decoder_1_Bit:u6\|lpm_divide:Div0\|lpm_divide_aem:auto_generated\|sign_div_unsign_klh:divider\|alt_u_div_e2f:divider\|StageOut\[101\]~550 49 COMB LAB_X33_Y20 3 " "Info: 49: + IC(0.896 ns) + CELL(0.319 ns) = 27.229 ns; Loc. = LAB_X33_Y20; Fanout = 3; COMB Node = 'ADPCM_Decoder_1_Bit:u6\|lpm_divide:Div0\|lpm_divide_aem:auto_generated\|sign_div_unsign_klh:divider\|alt_u_div_e2f:divider\|StageOut\[101\]~550'" {  } { { "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" "1.215 ns" { ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_12_result_int[8]~12 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|StageOut[101]~550 } "NODE_NAME" } } { "db/alt_u_div_e2f.tdf" "" { Text "D:/HD_ADPCM/HD_ADPCM_1Bit_Stereo_Decoder/db/alt_u_div_e2f.tdf" 138 10 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 -1} { "Info" "ITDB_NODE_DELAY" "IC(1.359 ns) + CELL(0.517 ns) 29.105 ns ADPCM_Decoder_1_Bit:u6\|lpm_divide:Div0\|lpm_divide_aem:auto_generated\|sign_div_unsign_klh:divider\|alt_u_div_e2f:divider\|add_sub_13_result_int\[6\]~9 50 COMB LAB_X36_Y21 1 " "Info: 50: + IC(1.359 ns) + CELL(0.517 ns) = 29.105 ns; Loc. = LAB_X36_Y21; Fanout = 1; COMB Node = 'ADPCM_Decoder_1_Bit:u6\|lpm_divide:Div0\|lpm_divide_aem:auto_generated\|sign_div_unsign_klh:divider\|alt_u_div_e2f:divider\|add_sub_13_result_int\[6\]~9'" {  } { { "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" "1.876 ns" { ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|StageOut[101]~550 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_13_result_int[6]~9 } "NODE_NAME" } } { "db/alt_u_div_e2f.tdf" "" { Text "D:/HD_ADPCM/HD_ADPCM_1Bit_Stereo_Decoder/db/alt_u_div_e2f.tdf" 51 23 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 -1} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.080 ns) 29.185 ns ADPCM_Decoder_1_Bit:u6\|lpm_divide:Div0\|lpm_divide_aem:auto_generated\|sign_div_unsign_klh:divider\|alt_u_div_e2f:divider\|add_sub_13_result_int\[7\]~11 51 COMB LAB_X36_Y21 1 " "Info: 51: + IC(0.000 ns) + CELL(0.080 ns) = 29.185 ns; Loc. = LAB_X36_Y21; Fanout = 1; COMB Node = 'ADPCM_Decoder_1_Bit:u6\|lpm_divide:Div0\|lpm_divide_aem:auto_generated\|sign_div_unsign_klh:divider\|alt_u_div_e2f:divider\|add_sub_13_result_int\[7\]~11'" {  } { { "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" "0.080 ns" { ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_13_result_int[6]~9 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_13_result_int[7]~11 } "NODE_NAME" } } { "db/alt_u_div_e2f.tdf" "" { Text "D:/HD_ADPCM/HD_ADPCM_1Bit_Stereo_Decoder/db/alt_u_div_e2f.tdf" 51 23 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 -1} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.458 ns) 29.643 ns ADPCM_Decoder_1_Bit:u6\|lpm_divide:Div0\|lpm_divide_aem:auto_generated\|sign_div_unsign_klh:divider\|alt_u_div_e2f:divider\|add_sub_13_result_int\[8\]~12 52 COMB LAB_X36_Y21 20 " "Info: 52: + IC(0.000 ns) + CELL(0.458 ns) = 29.643 ns; Loc. = LAB_X36_Y21; Fanout = 20; COMB Node = 'ADPCM_Decoder_1_Bit:u6\|lpm_divide:Div0\|lpm_divide_aem:auto_generated\|sign_div_unsign_klh:divider\|alt_u_div_e2f:divider\|add_sub_13_result_int\[8\]~12'" {  } { { "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" "0.458 ns" { ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_13_result_int[7]~11 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_13_result_int[8]~12 } "NODE_NAME" } } { "db/alt_u_div_e2f.tdf" "" { Text "D:/HD_ADPCM/HD_ADPCM_1Bit_Stereo_Decoder/db/alt_u_div_e2f.tdf" 51 23 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 -1} { "Info" "ITDB_NODE_DELAY" "IC(1.238 ns) + CELL(0.319 ns) 31.200 ns ADPCM_Decoder_1_Bit:u6\|lpm_divide:Div0\|lpm_divide_aem:auto_generated\|sign_div_unsign_klh:divider\|alt_u_div_e2f:divider\|StageOut\[110\]~553 53 COMB LAB_X33_Y20 1 " "Info: 53: + IC(1.238 ns) + CELL(0.319 ns) = 31.200 ns; Loc. = LAB_X33_Y20; Fanout = 1; COMB Node = 'ADPCM_Decoder_1_Bit:u6\|lpm_divide:Div0\|lpm_divide_aem:auto_generated\|sign_div_unsign_klh:divider\|alt_u_div_e2f:divider\|StageOut\[110\]~553'" {  } { { "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" "1.557 ns" { ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_13_result_int[8]~12 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|StageOut[110]~553 } "NODE_NAME" } } { "db/alt_u_div_e2f.tdf" "" { Text "D:/HD_ADPCM/HD_ADPCM_1Bit_Stereo_Decoder/db/alt_u_div_e2f.tdf" 138 10 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 -1} { "Info" "ITDB_NODE_DELAY" "IC(1.362 ns) + CELL(0.517 ns) 33.079 ns ADPCM_Decoder_1_Bit:u6\|lpm_divide:Div0\|lpm_divide_aem:auto_generated\|sign_div_unsign_klh:divider\|alt_u_div_e2f:divider\|add_sub_14_result_int\[7\]~11 54 COMB LAB_X37_Y21 1 " "Info: 54: + IC(1.362 ns) + CELL(0.517 ns) = 33.079 ns; Loc. = LAB_X37_Y21; Fanout = 1; COMB Node = 'ADPCM_Decoder_1_Bit:u6\|lpm_divide:Div0\|lpm_divide_aem:auto_generated\|sign_div_unsign_klh:divider\|alt_u_div_e2f:divider\|add_sub_14_result_int\[7\]~11'" {  } { { "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" "1.879 ns" { ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|StageOut[110]~553 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_14_result_int[7]~11 } "NODE_NAME" } } { "db/alt_u_div_e2f.tdf" "" { Text "D:/HD_ADPCM/HD_ADPCM_1Bit_Stereo_Decoder/db/alt_u_div_e2f.tdf" 56 23 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 -1} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.458 ns) 33.537 ns ADPCM_Decoder_1_Bit:u6\|lpm_divide:Div0\|lpm_divide_aem:auto_generated\|sign_div_unsign_klh:divider\|alt_u_div_e2f:divider\|add_sub_14_result_int\[8\]~12 55 COMB LAB_X37_Y21 20 " "Info: 55: + IC(0.000 ns) + CELL(0.458 ns) = 33.537 ns; Loc. = LAB_X37_Y21; Fanout = 20; COMB Node = 'ADPCM_Decoder_1_Bit:u6\|lpm_divide:Div0\|lpm_divide_aem:auto_generated\|sign_div_unsign_klh:divider\|alt_u_div_e2f:divider\|add_sub_14_result_int\[8\]~12'" {  } { { "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" "0.458 ns" { ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_14_result_int[7]~11 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_14_result_int[8]~12 } "NODE_NAME" } } { "db/alt_u_div_e2f.tdf" "" { Text "D:/HD_ADPCM/HD_ADPCM_1Bit_Stereo_Decoder/db/alt_u_div_e2f.tdf" 56 23 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 -1} { "Info" "ITDB_NODE_DELAY" "IC(0.498 ns) + CELL(0.177 ns) 34.212 ns ADPCM_Decoder_1_Bit:u6\|lpm_divide:Div0\|lpm_divide_aem:auto_generated\|sign_div_unsign_klh:divider\|alt_u_div_e2f:divider\|StageOut\[113\]~94 56 COMB LAB_X37_Y21 2 " "Info: 56: + IC(0.498 ns) + CELL(0.177 ns) = 34.212 ns; Loc. = LAB_X37_Y21; Fanout = 2; COMB Node = 'ADPCM_Decoder_1_Bit:u6\|lpm_divide:Div0\|lpm_divide_aem:auto_generated\|sign_div_unsign_klh:divider\|alt_u_div_e2f:divider\|StageOut\[113\]~94'" {  } { { "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" "0.675 ns" { ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_14_result_int[8]~12 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|StageOut[113]~94 } "NODE_NAME" } } { "db/alt_u_div_e2f.tdf" "" { Text "D:/HD_ADPCM/HD_ADPCM_1Bit_Stereo_Decoder/db/alt_u_div_e2f.tdf" 138 10 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 -1} { "Info" "ITDB_NODE_DELAY" "IC(1.073 ns) + CELL(0.495 ns) 35.780 ns ADPCM_Decoder_1_Bit:u6\|lpm_divide:Div0\|lpm_divide_aem:auto_generated\|sign_div_unsign_klh:divider\|alt_u_div_e2f:divider\|add_sub_15_result_int\[2\]~1 57 COMB LAB_X38_Y20 2 " "Info: 57: + IC(1.073 ns) + CELL(0.495 ns) = 35.780 ns; Loc. = LAB_X38_Y20; Fanout = 2; COMB Node = 'ADPCM_Decoder_1_Bit:u6\|lpm_divide:Div0\|lpm_divide_aem:auto_generated\|sign_div_unsign_klh:divider\|alt_u_div_e2f:divider\|add_sub_15_result_int\[2\]~1'" {  } { { "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" "1.568 ns" { ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|StageOut[113]~94 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_15_result_int[2]~1 } "NODE_NAME" } } { "db/alt_u_div_e2f.tdf" "" { Text "D:/HD_ADPCM/HD_ADPCM_1Bit_Stereo_Decoder/db/alt_u_div_e2f.tdf" 61 23 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 -1} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.080 ns) 35.860 ns ADPCM_Decoder_1_Bit:u6\|lpm_divide:Div0\|lpm_divide_aem:auto_generated\|sign_div_unsign_klh:divider\|alt_u_div_e2f:divider\|add_sub_15_result_int\[3\]~3 58 COMB LAB_X38_Y20 2 " "Info: 58: + IC(0.000 ns) + CELL(0.080 ns) = 35.860 ns; Loc. = LAB_X38_Y20; Fanout = 2; COMB Node = 'ADPCM_Decoder_1_Bit:u6\|lpm_divide:Div0\|lpm_divide_aem:auto_generated\|sign_div_unsign_klh:divider\|alt_u_div_e2f:divider\|add_sub_15_result_int\[3\]~3'" {  } { { "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" "0.080 ns" { ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_15_result_int[2]~1 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_15_result_int[3]~3 } "NODE_NAME" } } { "db/alt_u_div_e2f.tdf" "" { Text "D:/HD_ADPCM/HD_ADPCM_1Bit_Stereo_Decoder/db/alt_u_div_e2f.tdf" 61 23 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 -1} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.080 ns) 35.940 ns ADPCM_Decoder_1_Bit:u6\|lpm_divide:Div0\|lpm_divide_aem:auto_generated\|sign_div_unsign_klh:divider\|alt_u_div_e2f:divider\|add_sub_15_result_int\[4\]~5 59 COMB LAB_X38_Y20 2 " "Info: 59: + IC(0.000 ns) + CELL(0.080 ns) = 35.940 ns; Loc. = LAB_X38_Y20; Fanout = 2; COMB Node = 'ADPCM_Decoder_1_Bit:u6\|lpm_divide:Div0\|lpm_divide_aem:auto_generated\|sign_div_unsign_klh:divider\|alt_u_div_e2f:divider\|add_sub_15_result_int\[4\]~5'" {  } { { "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" "0.080 ns" { ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_15_result_int[3]~3 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_15_result_int[4]~5 } "NODE_NAME" } } { "db/alt_u_div_e2f.tdf" "" { Text "D:/HD_ADPCM/HD_ADPCM_1Bit_Stereo_Decoder/db/alt_u_div_e2f.tdf" 61 23 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 -1} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.080 ns) 36.020 ns ADPCM_Decoder_1_Bit:u6\|lpm_divide:Div0\|lpm_divide_aem:auto_generated\|sign_div_unsign_klh:divider\|alt_u_div_e2f:divider\|add_sub_15_result_int\[5\]~7 60 COMB LAB_X38_Y20 2 " "Info: 60: + IC(0.000 ns) + CELL(0.080 ns) = 36.020 ns; Loc. = LAB_X38_Y20; Fanout = 2; COMB Node = 'ADPCM_Decoder_1_Bit:u6\|lpm_divide:Div0\|lpm_divide_aem:auto_generated\|sign_div_unsign_klh:divider\|alt_u_div_e2f:divider\|add_sub_15_result_int\[5\]~7'" {  } { { "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" "0.080 ns" { ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_15_result_int[4]~5 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_15_result_int[5]~7 } "NODE_NAME" } } { "db/alt_u_div_e2f.tdf" "" { Text "D:/HD_ADPCM/HD_ADPCM_1Bit_Stereo_Decoder/db/alt_u_div_e2f.tdf" 61 23 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 -1} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.080 ns) 36.100 ns ADPCM_Decoder_1_Bit:u6\|lpm_divide:Div0\|lpm_divide_aem:auto_generated\|sign_div_unsign_klh:divider\|alt_u_div_e2f:divider\|add_sub_15_result_int\[6\]~9 61 COMB LAB_X38_Y20 1 " "Info: 61: + IC(0.000 ns) + CELL(0.080 ns) = 36.100 ns; Loc. = LAB_X38_Y20; Fanout = 1; COMB Node = 'ADPCM_Decoder_1_Bit:u6\|lpm_divide:Div0\|lpm_divide_aem:auto_generated\|sign_div_unsign_klh:divider\|alt_u_div_e2f:divider\|add_sub_15_result_int\[6\]~9'" {  } { { "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" "0.080 ns" { ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_15_result_int[5]~7 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_15_result_int[6]~9 } "NODE_NAME" } } { "db/alt_u_div_e2f.tdf" "" { Text "D:/HD_ADPCM/HD_ADPCM_1Bit_Stereo_Decoder/db/alt_u_div_e2f.tdf" 61 23 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 -1} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.080 ns) 36.180 ns ADPCM_Decoder_1_Bit:u6\|lpm_divide:Div0\|lpm_divide_aem:auto_generated\|sign_div_unsign_klh:divider\|alt_u_div_e2f:divider\|add_sub_15_result_int\[7\]~11 62 COMB LAB_X38_Y20 1 " "Info: 62: + IC(0.000 ns) + CELL(0.080 ns) = 36.180 ns; Loc. = LAB_X38_Y20; Fanout = 1; COMB Node = 'ADPCM_Decoder_1_Bit:u6\|lpm_divide:Div0\|lpm_divide_aem:auto_generated\|sign_div_unsign_klh:divider\|alt_u_div_e2f:divider\|add_sub_15_result_int\[7\]~11'" {  } { { "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" "0.080 ns" { ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_15_result_int[6]~9 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_15_result_int[7]~11 } "NODE_NAME" } } { "db/alt_u_div_e2f.tdf" "" { Text "D:/HD_ADPCM/HD_ADPCM_1Bit_Stereo_Decoder/db/alt_u_div_e2f.tdf" 61 23 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 -1} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.458 ns) 36.638 ns ADPCM_Decoder_1_Bit:u6\|lpm_divide:Div0\|lpm_divide_aem:auto_generated\|sign_div_unsign_klh:divider\|alt_u_div_e2f:divider\|add_sub_15_result_int\[8\]~12 63 COMB LAB_X38_Y20 20 " "Info: 63: + IC(0.000 ns) + CELL(0.458 ns) = 36.638 ns; Loc. = LAB_X38_Y20; Fanout = 20; COMB Node = 'ADPCM_Decoder_1_Bit:u6\|lpm_divide:Div0\|lpm_divide_aem:auto_generated\|sign_div_unsign_klh:divider\|alt_u_div_e2f:divider\|add_sub_15_result_int\[8\]~12'" {  } { { "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" "0.458 ns" { ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_15_result_int[7]~11 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_15_result_int[8]~12 } "NODE_NAME" } } { "db/alt_u_div_e2f.tdf" "" { Text "D:/HD_ADPCM/HD_ADPCM_1Bit_Stereo_Decoder/db/alt_u_div_e2f.tdf" 61 23 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 -1} { "Info" "ITDB_NODE_DELAY" "IC(0.598 ns) + CELL(0.319 ns) 37.555 ns ADPCM_Decoder_1_Bit:u6\|lpm_divide:Div0\|lpm_divide_aem:auto_generated\|sign_div_unsign_klh:divider\|alt_u_div_e2f:divider\|StageOut\[124\]~563 64 COMB LAB_X37_Y20 3 " "Info: 64: + IC(0.598 ns) + CELL(0.319 ns) = 37.555 ns; Loc. = LAB_X37_Y20; Fanout = 3; COMB Node = 'ADPCM_Decoder_1_Bit:u6\|lpm_divide:Div0\|lpm_divide_aem:auto_generated\|sign_div_unsign_klh:divider\|alt_u_div_e2f:divider\|StageOut\[124\]~563'" {  } { { "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" "0.917 ns" { ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_15_result_int[8]~12 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|StageOut[124]~563 } "NODE_NAME" } } { "db/alt_u_div_e2f.tdf" "" { Text "D:/HD_ADPCM/HD_ADPCM_1Bit_Stereo_Decoder/db/alt_u_div_e2f.tdf" 138 10 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 -1} { "Info" "ITDB_NODE_DELAY" "IC(1.016 ns) + CELL(0.517 ns) 39.088 ns ADPCM_Decoder_1_Bit:u6\|lpm_divide:Div0\|lpm_divide_aem:auto_generated\|sign_div_unsign_klh:divider\|alt_u_div_e2f:divider\|add_sub_16_result_int\[5\]~7 65 COMB LAB_X39_Y20 2 " "Info: 65: + IC(1.016 ns) + CELL(0.517 ns) = 39.088 ns; Loc. = LAB_X39_Y20; Fanout = 2; COMB Node = 'ADPCM_Decoder_1_Bit:u6\|lpm_divide:Div0\|lpm_divide_aem:auto_generated\|sign_div_unsign_klh:divider\|alt_u_div_e2f:divider\|add_sub_16_result_int\[5\]~7'" {  } { { "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" "1.533 ns" { ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|StageOut[124]~563 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_16_result_int[5]~7 } "NODE_NAME" } } { "db/alt_u_div_e2f.tdf" "" { Text "D:/HD_ADPCM/HD_ADPCM_1Bit_Stereo_Decoder/db/alt_u_div_e2f.tdf" 66 23 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 -1} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.080 ns) 39.168 ns ADPCM_Decoder_1_Bit:u6\|lpm_divide:Div0\|lpm_divide_aem:auto_generated\|sign_div_unsign_klh:divider\|alt_u_div_e2f:divider\|add_sub_16_result_int\[6\]~9 66 COMB LAB_X39_Y20 1 " "Info: 66: + IC(0.000 ns) + CELL(0.080 ns) = 39.168 ns; Loc. = LAB_X39_Y20; Fanout = 1; COMB Node = 'ADPCM_Decoder_1_Bit:u6\|lpm_divide:Div0\|lpm_divide_aem:auto_generated\|sign_div_unsign_klh:divider\|alt_u_div_e2f:divider\|add_sub_16_result_int\[6\]~9'" {  } { { "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" "0.080 ns" { ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_16_result_int[5]~7 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_16_result_int[6]~9 } "NODE_NAME" } } { "db/alt_u_div_e2f.tdf" "" { Text "D:/HD_ADPCM/HD_ADPCM_1Bit_Stereo_Decoder/db/alt_u_div_e2f.tdf" 66 23 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 -1} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.080 ns) 39.248 ns ADPCM_Decoder_1_Bit:u6\|lpm_divide:Div0\|lpm_divide_aem:auto_generated\|sign_div_unsign_klh:divider\|alt_u_div_e2f:divider\|add_sub_16_result_int\[7\]~11 67 COMB LAB_X39_Y20 1 " "Info: 67: + IC(0.000 ns) + CELL(0.080 ns) = 39.248 ns; Loc. = LAB_X39_Y20; Fanout = 1; COMB Node = 'ADPCM_Decoder_1_Bit:u6\|lpm_divide:Div0\|lpm_divide_aem:auto_generated\|sign_div_unsign_klh:divider\|alt_u_div_e2f:divider\|add_sub_16_result_int\[7\]~11'" {  } { { "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" "0.080 ns" { ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_16_result_int[6]~9 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_16_result_int[7]~11 } "NODE_NAME" } } { "db/alt_u_div_e2f.tdf" "" { Text "D:/HD_ADPCM/HD_ADPCM_1Bit_Stereo_Decoder/db/alt_u_div_e2f.tdf" 66 23 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 -1} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.458 ns) 39.706 ns ADPCM_Decoder_1_Bit:u6\|lpm_divide:Div0\|lpm_divide_aem:auto_generated\|sign_div_unsign_klh:divider\|alt_u_div_e2f:divider\|add_sub_16_result_int\[8\]~12 68 COMB LAB_X39_Y20 20 " "Info: 68: + IC(0.000 ns) + CELL(0.458 ns) = 39.706 ns; Loc. = LAB_X39_Y20; Fanout = 20; COMB Node = 'ADPCM_Decoder_1_Bit:u6\|lpm_divide:Div0\|lpm_divide_aem:auto_generated\|sign_div_unsign_klh:divider\|alt_u_div_e2f:divider\|add_sub_16_result_int\[8\]~12'" {  } { { "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" "0.458 ns" { ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_16_result_int[7]~11 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_16_result_int[8]~12 } "NODE_NAME" } } { "db/alt_u_div_e2f.tdf" "" { Text "D:/HD_ADPCM/HD_ADPCM_1Bit_Stereo_Decoder/db/alt_u_div_e2f.tdf" 66 23 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 -1} { "Info" "ITDB_NODE_DELAY" "IC(0.949 ns) + CELL(0.319 ns) 40.974 ns ADPCM_Decoder_1_Bit:u6\|lpm_divide:Div0\|lpm_divide_aem:auto_generated\|sign_div_unsign_klh:divider\|alt_u_div_e2f:divider\|StageOut\[132\]~567 69 COMB LAB_X39_Y18 3 " "Info: 69: + IC(0.949 ns) + CELL(0.319 ns) = 40.974 ns; Loc. = LAB_X39_Y18; Fanout = 3; COMB Node = 'ADPCM_Decoder_1_Bit:u6\|lpm_divide:Div0\|lpm_divide_aem:auto_generated\|sign_div_unsign_klh:divider\|alt_u_div_e2f:divider\|StageOut\[132\]~567'" {  } { { "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" "1.268 ns" { ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_16_result_int[8]~12 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|StageOut[132]~567 } "NODE_NAME" } } { "db/alt_u_div_e2f.tdf" "" { Text "D:/HD_ADPCM/HD_ADPCM_1Bit_Stereo_Decoder/db/alt_u_div_e2f.tdf" 138 10 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 -1} { "Info" "ITDB_NODE_DELAY" "IC(1.070 ns) + CELL(0.517 ns) 42.561 ns ADPCM_Decoder_1_Bit:u6\|lpm_divide:Div0\|lpm_divide_aem:auto_generated\|sign_div_unsign_klh:divider\|alt_u_div_e2f:divider\|add_sub_17_result_int\[5\]~7 70 COMB LAB_X40_Y20 2 " "Info: 70: + IC(1.070 ns) + CELL(0.517 ns) = 42.561 ns; Loc. = LAB_X40_Y20; Fanout = 2; COMB Node = 'ADPCM_Decoder_1_Bit:u6\|lpm_divide:Div0\|lpm_divide_aem:auto_generated\|sign_div_unsign_klh:divider\|alt_u_div_e2f:divider\|add_sub_17_result_int\[5\]~7'" {  } { { "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" "1.587 ns" { ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|StageOut[132]~567 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_17_result_int[5]~7 } "NODE_NAME" } } { "db/alt_u_div_e2f.tdf" "" { Text "D:/HD_ADPCM/HD_ADPCM_1Bit_Stereo_Decoder/db/alt_u_div_e2f.tdf" 71 23 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 -1} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.080 ns) 42.641 ns ADPCM_Decoder_1_Bit:u6\|lpm_divide:Div0\|lpm_divide_aem:auto_generated\|sign_div_unsign_klh:divider\|alt_u_div_e2f:divider\|add_sub_17_result_int\[6\]~9 71 COMB LAB_X40_Y20 1 " "Info: 71: + IC(0.000 ns) + CELL(0.080 ns) = 42.641 ns; Loc. = LAB_X40_Y20; Fanout = 1; COMB Node = 'ADPCM_Decoder_1_Bit:u6\|lpm_divide:Div0\|lpm_divide_aem:auto_generated\|sign_div_unsign_klh:divider\|alt_u_div_e2f:divider\|add_sub_17_result_int\[6\]~9'" {  } { { "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" "0.080 ns" { ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_17_result_int[5]~7 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_17_result_int[6]~9 } "NODE_NAME" } } { "db/alt_u_div_e2f.tdf" "" { Text "D:/HD_ADPCM/HD_ADPCM_1Bit_Stereo_Decoder/db/alt_u_div_e2f.tdf" 71 23 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 -1} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.080 ns) 42.721 ns ADPCM_Decoder_1_Bit:u6\|lpm_divide:Div0\|lpm_divide_aem:auto_generated\|sign_div_unsign_klh:divider\|alt_u_div_e2f:divider\|add_sub_17_result_int\[7\]~11 72 COMB LAB_X40_Y20 1 " "Info: 72: + IC(0.000 ns) + CELL(0.080 ns) = 42.721 ns; Loc. = LAB_X40_Y20; Fanout = 1; COMB Node = 'ADPCM_Decoder_1_Bit:u6\|lpm_divide:Div0\|lpm_divide_aem:auto_generated\|sign_div_unsign_klh:divider\|alt_u_div_e2f:divider\|add_sub_17_result_int\[7\]~11'" {  } { { "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" "0.080 ns" { ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_17_result_int[6]~9 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_17_result_int[7]~11 } "NODE_NAME" } } { "db/alt_u_div_e2f.tdf" "" { Text "D:/HD_ADPCM/HD_ADPCM_1Bit_Stereo_Decoder/db/alt_u_div_e2f.tdf" 71 23 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 -1} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.458 ns) 43.179 ns ADPCM_Decoder_1_Bit:u6\|lpm_divide:Div0\|lpm_divide_aem:auto_generated\|sign_div_unsign_klh:divider\|alt_u_div_e2f:divider\|add_sub_17_result_int\[8\]~12 73 COMB LAB_X40_Y20 20 " "Info: 73: + IC(0.000 ns) + CELL(0.458 ns) = 43.179 ns; Loc. = LAB_X40_Y20; Fanout = 20; COMB Node = 'ADPCM_Decoder_1_Bit:u6\|lpm_divide:Div0\|lpm_divide_aem:auto_generated\|sign_div_unsign_klh:divider\|alt_u_div_e2f:divider\|add_sub_17_result_int\[8\]~12'" {  } { { "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" "0.458 ns" { ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_17_result_int[7]~11 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_17_result_int[8]~12 } "NODE_NAME" } } { "db/alt_u_div_e2f.tdf" "" { Text "D:/HD_ADPCM/HD_ADPCM_1Bit_Stereo_Decoder/db/alt_u_div_e2f.tdf" 71 23 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 -1} { "Info" "ITDB_NODE_DELAY" "IC(0.895 ns) + CELL(0.319 ns) 44.393 ns ADPCM_Decoder_1_Bit:u6\|lpm_divide:Div0\|lpm_divide_aem:auto_generated\|sign_div_unsign_klh:divider\|alt_u_div_e2f:divider\|StageOut\[142\]~569 74 COMB LAB_X37_Y20 1 " "Info: 74: + IC(0.895 ns) + CELL(0.319 ns) = 44.393 ns; Loc. = LAB_X37_Y20; Fanout = 1; COMB Node = 'ADPCM_Decoder_1_Bit:u6\|lpm_divide:Div0\|lpm_divide_aem:auto_generated\|sign_div_unsign_klh:divider\|alt_u_div_e2f:divider\|StageOut\[142\]~569'" {  } { { "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" "1.214 ns" { ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_17_result_int[8]~12 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|StageOut[142]~569 } "NODE_NAME" } } { "db/alt_u_div_e2f.tdf" "" { Text "D:/HD_ADPCM/HD_ADPCM_1Bit_Stereo_Decoder/db/alt_u_div_e2f.tdf" 138 10 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 -1} { "Info" "ITDB_NODE_DELAY" "IC(1.359 ns) + CELL(0.517 ns) 46.269 ns ADPCM_Decoder_1_Bit:u6\|lpm_divide:Div0\|lpm_divide_aem:auto_generated\|sign_div_unsign_klh:divider\|alt_u_div_e2f:divider\|op_9~32 75 COMB LAB_X40_Y19 1 " "Info: 75: + IC(1.359 ns) + CELL(0.517 ns) = 46.269 ns; Loc. = LAB_X40_Y19; Fanout = 1; COMB Node = 'ADPCM_Decoder_1_Bit:u6\|lpm_divide:Div0\|lpm_divide_aem:auto_generated\|sign_div_unsign_klh:divider\|alt_u_div_e2f:divider\|op_9~32'" {  } { { "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" "1.876 ns" { ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|StageOut[142]~569 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|op_9~32 } "NODE_NAME" } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 -1} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.458 ns) 46.727 ns ADPCM_Decoder_1_Bit:u6\|lpm_divide:Div0\|lpm_divide_aem:auto_generated\|sign_div_unsign_klh:divider\|alt_u_div_e2f:divider\|op_9~33 76 COMB LAB_X40_Y19 13 " "Info: 76: + IC(0.000 ns) + CELL(0.458 ns) = 46.727 ns; Loc. = LAB_X40_Y19; Fanout = 13; COMB Node = 'ADPCM_Decoder_1_Bit:u6\|lpm_divide:Div0\|lpm_divide_aem:auto_generated\|sign_div_unsign_klh:divider\|alt_u_div_e2f:divider\|op_9~33'" {  } { { "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" "0.458 ns" { ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|op_9~32 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|op_9~33 } "NODE_NAME" } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 -1} { "Info" "ITDB_NODE_DELAY" "IC(0.732 ns) + CELL(0.177 ns) 47.636 ns ADPCM_Decoder_1_Bit:u6\|lpm_divide:Div0\|lpm_divide_aem:auto_generated\|sign_div_unsign_klh:divider\|alt_u_div_e2f:divider\|StageOut\[145\]~30 77 COMB LAB_X39_Y19 1 " "Info: 77: + IC(0.732 ns) + CELL(0.177 ns) = 47.636 ns; Loc. = LAB_X39_Y19; Fanout = 1; COMB Node = 'ADPCM_Decoder_1_Bit:u6\|lpm_divide:Div0\|lpm_divide_aem:auto_generated\|sign_div_unsign_klh:divider\|alt_u_div_e2f:divider\|StageOut\[145\]~30'" {  } { { "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" "0.909 ns" { ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|op_9~33 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|StageOut[145]~30 } "NODE_NAME" } } { "db/alt_u_div_e2f.tdf" "" { Text "D:/HD_ADPCM/HD_ADPCM_1Bit_Stereo_Decoder/db/alt_u_div_e2f.tdf" 138 10 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 -1} { "Info" "ITDB_NODE_DELAY" "IC(0.498 ns) + CELL(0.495 ns) 48.629 ns ADPCM_Decoder_1_Bit:u6\|lpm_divide:Div0\|lpm_divide_aem:auto_generated\|sign_div_unsign_klh:divider\|alt_u_div_e2f:divider\|add_sub_19_result_int\[2\]~1 78 COMB LAB_X39_Y19 1 " "Info: 78: + IC(0.498 ns) + CELL(0.495 ns) = 48.629 ns; Loc. = LAB_X39_Y19; Fanout = 1; COMB Node = 'ADPCM_Decoder_1_Bit:u6\|lpm_divide:Div0\|lpm_divide_aem:auto_generated\|sign_div_unsign_klh:divider\|alt_u_div_e2f:divider\|add_sub_19_result_int\[2\]~1'" {  } { { "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" "0.993 ns" { ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|StageOut[145]~30 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_19_result_int[2]~1 } "NODE_NAME" } } { "db/alt_u_div_e2f.tdf" "" { Text "D:/HD_ADPCM/HD_ADPCM_1Bit_Stereo_Decoder/db/alt_u_div_e2f.tdf" 81 23 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 -1} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.080 ns) 48.709 ns ADPCM_Decoder_1_Bit:u6\|lpm_divide:Div0\|lpm_divide_aem:auto_generated\|sign_div_unsign_klh:divider\|alt_u_div_e2f:divider\|add_sub_19_result_int\[3\]~3 79 COMB LAB_X39_Y19 1 " "Info: 79: + IC(0.000 ns) + CELL(0.080 ns) = 48.709 ns; Loc. = LAB_X39_Y19; Fanout = 1; COMB Node = 'ADPCM_Decoder_1_Bit:u6\|lpm_divide:Div0\|lpm_divide_aem:auto_generated\|sign_div_unsign_klh:divider\|alt_u_div_e2f:divider\|add_sub_19_result_int\[3\]~3'" {  } { { "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" "0.080 ns" { ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_19_result_int[2]~1 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_19_result_int[3]~3 } "NODE_NAME" } } { "db/alt_u_div_e2f.tdf" "" { Text "D:/HD_ADPCM/HD_ADPCM_1Bit_Stereo_Decoder/db/alt_u_div_e2f.tdf" 81 23 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 -1} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.080 ns) 48.789 ns ADPCM_Decoder_1_Bit:u6\|lpm_divide:Div0\|lpm_divide_aem:auto_generated\|sign_div_unsign_klh:divider\|alt_u_div_e2f:divider\|add_sub_19_result_int\[4\]~5 80 COMB LAB_X39_Y19 1 " "Info: 80: + IC(0.000 ns) + CELL(0.080 ns) = 48.789 ns; Loc. = LAB_X39_Y19; Fanout = 1; COMB Node = 'ADPCM_Decoder_1_Bit:u6\|lpm_divide:Div0\|lpm_divide_aem:auto_generated\|sign_div_unsign_klh:divider\|alt_u_div_e2f:divider\|add_sub_19_result_int\[4\]~5'" {  } { { "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" "0.080 ns" { ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_19_result_int[3]~3 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_19_result_int[4]~5 } "NODE_NAME" } } { "db/alt_u_div_e2f.tdf" "" { Text "D:/HD_ADPCM/HD_ADPCM_1Bit_Stereo_Decoder/db/alt_u_div_e2f.tdf" 81 23 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 -1} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.080 ns) 48.869 ns ADPCM_Decoder_1_Bit:u6\|lpm_divide:Div0\|lpm_divide_aem:auto_generated\|sign_div_unsign_klh:divider\|alt_u_div_e2f:divider\|add_sub_19_result_int\[5\]~7 81 COMB LAB_X39_Y19 1 " "Info: 81: + IC(0.000 ns) + CELL(0.080 ns) = 48.869 ns; Loc. = LAB_X39_Y19; Fanout = 1; COMB Node = 'ADPCM_Decoder_1_Bit:u6\|lpm_divide:Div0\|lpm_divide_aem:auto_generated\|sign_div_unsign_klh:divider\|alt_u_div_e2f:divider\|add_sub_19_result_int\[5\]~7'" {  } { { "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" "0.080 ns" { ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_19_result_int[4]~5 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_19_result_int[5]~7 } "NODE_NAME" } } { "db/alt_u_div_e2f.tdf" "" { Text "D:/HD_ADPCM/HD_ADPCM_1Bit_Stereo_Decoder/db/alt_u_div_e2f.tdf" 81 23 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 -1} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.080 ns) 48.949 ns ADPCM_Decoder_1_Bit:u6\|lpm_divide:Div0\|lpm_divide_aem:auto_generated\|sign_div_unsign_klh:divider\|alt_u_div_e2f:divider\|add_sub_19_result_int\[6\]~9 82 COMB LAB_X39_Y19 1 " "Info: 82: + IC(0.000 ns) + CELL(0.080 ns) = 48.949 ns; Loc. = LAB_X39_Y19; Fanout = 1; COMB Node = 'ADPCM_Decoder_1_Bit:u6\|lpm_divide:Div0\|lpm_divide_aem:auto_generated\|sign_div_unsign_klh:divider\|alt_u_div_e2f:divider\|add_sub_19_result_int\[6\]~9'" {  } { { "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" "0.080 ns" { ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_19_result_int[5]~7 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_19_result_int[6]~9 } "NODE_NAME" } } { "db/alt_u_div_e2f.tdf" "" { Text "D:/HD_ADPCM/HD_ADPCM_1Bit_Stereo_Decoder/db/alt_u_div_e2f.tdf" 81 23 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 -1} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.080 ns) 49.029 ns ADPCM_Decoder_1_Bit:u6\|lpm_divide:Div0\|lpm_divide_aem:auto_generated\|sign_div_unsign_klh:divider\|alt_u_div_e2f:divider\|add_sub_19_result_int\[7\]~11 83 COMB LAB_X39_Y19 1 " "Info: 83: + IC(0.000 ns) + CELL(0.080 ns) = 49.029 ns; Loc. = LAB_X39_Y19; Fanout = 1; COMB Node = 'ADPCM_Decoder_1_Bit:u6\|lpm_divide:Div0\|lpm_divide_aem:auto_generated\|sign_div_unsign_klh:divider\|alt_u_div_e2f:divider\|add_sub_19_result_int\[7\]~11'" {  } { { "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" "0.080 ns" { ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_19_result_int[6]~9 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_19_result_int[7]~11 } "NODE_NAME" } } { "db/alt_u_div_e2f.tdf" "" { Text "D:/HD_ADPCM/HD_ADPCM_1Bit_Stereo_Decoder/db/alt_u_div_e2f.tdf" 81 23 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 -1} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.458 ns) 49.487 ns ADPCM_Decoder_1_Bit:u6\|lpm_divide:Div0\|lpm_divide_aem:auto_generated\|sign_div_unsign_klh:divider\|alt_u_div_e2f:divider\|add_sub_19_result_int\[8\]~12 84 COMB LAB_X39_Y19 1 " "Info: 84: + IC(0.000 ns) + CELL(0.458 ns) = 49.487 ns; Loc. = LAB_X39_Y19; Fanout = 1; COMB Node = 'ADPCM_Decoder_1_Bit:u6\|lpm_divide:Div0\|lpm_divide_aem:auto_generated\|sign_div_unsign_klh:divider\|alt_u_div_e2f:divider\|add_sub_19_result_int\[8\]~12'" {  } { { "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" "0.458 ns" { ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_19_result_int[7]~11 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_19_result_int[8]~12 } "NODE_NAME" } } { "db/alt_u_div_e2f.tdf" "" { Text "D:/HD_ADPCM/HD_ADPCM_1Bit_Stereo_Decoder/db/alt_u_div_e2f.tdf" 81 23 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 -1} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.096 ns) 49.583 ns ADPCM_Decoder_1_Bit:u6\|PCM_Data_Difference\[0\] 85 REG LAB_X39_Y19 1 " "Info: 85: + IC(0.000 ns) + CELL(0.096 ns) = 49.583 ns; Loc. = LAB_X39_Y19; Fanout = 1; REG Node = 'ADPCM_Decoder_1_Bit:u6\|PCM_Data_Difference\[0\]'" {  } { { "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" "0.096 ns" { ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_19_result_int[8]~12 ADPCM_Decoder_1_Bit:u6|PCM_Data_Difference[0] } "NODE_NAME" } } { "HD_ADPCM_Codec.vhd" "" { Text "D:/HD_ADPCM/HD_ADPCM_1Bit_Stereo_Decoder/HD_ADPCM_Codec.vhd" 943 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 -1} { "Info" "ITDB_TOTAL_CELL_DELAY" "24.059 ns ( 48.52 % ) " "Info: Total cell delay = 24.059 ns ( 48.52 % )" {  } {  } 0 0 "Total cell delay = %1!s! %2!s!" 0 0 "" 0 -1} { "Info" "ITDB_TOTAL_IC_DELAY" "25.524 ns ( 51.48 % ) " "Info: Total interconnect delay = 25.524 ns ( 51.48 % )" {  } {  } 0 0 "Total interconnect delay = %1!s! %2!s!" 0 0 "" 0 -1}  } { { "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" "49.583 ns" { ADPCM_Decoder_1_Bit:u6|ADPCM_Decoder_Step_Size_Table_Pointer[9] ADPCM_Decoder_1_Bit:u6|lpm_mult:Mult0|mult_pu01:auto_generated|mac_mult1~DATAOUT15 ADPCM_Decoder_1_Bit:u6|lpm_mult:Mult0|mult_pu01:auto_generated|mac_out2~DATAOUT15 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_6_result_int[2]~1 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_6_result_int[3]~3 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_6_result_int[4]~5 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_6_result_int[5]~7 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_6_result_int[6]~9 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_6_result_int[7]~10 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|StageOut[50]~221 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_7_result_int[3]~3 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_7_result_int[4]~5 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_7_result_int[5]~7 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_7_result_int[6]~9 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_7_result_int[7]~11 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_7_result_int[8]~12 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|StageOut[58]~197 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_8_result_int[3]~3 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_8_result_int[4]~5 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_8_result_int[5]~7 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_8_result_int[6]~9 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_8_result_int[7]~11 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_8_result_int[8]~12 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|StageOut[67]~581 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_9_result_int[4]~5 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_9_result_int[5]~7 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_9_result_int[6]~9 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_9_result_int[7]~11 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_9_result_int[8]~12 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|StageOut[73]~174 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_10_result_int[2]~1 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_10_result_int[3]~3 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_10_result_int[4]~5 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_10_result_int[5]~7 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_10_result_int[6]~9 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_10_result_int[7]~11 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_10_result_int[8]~12 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|StageOut[83]~544 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_11_result_int[4]~5 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_11_result_int[5]~7 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_11_result_int[6]~9 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_11_result_int[7]~11 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_11_result_int[8]~12 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|StageOut[92]~547 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_12_result_int[5]~7 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_12_result_int[6]~9 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_12_result_int[7]~11 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_12_result_int[8]~12 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|StageOut[101]~550 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_13_result_int[6]~9 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_13_result_int[7]~11 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_13_result_int[8]~12 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|StageOut[110]~553 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_14_result_int[7]~11 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_14_result_int[8]~12 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|StageOut[113]~94 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_15_result_int[2]~1 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_15_result_int[3]~3 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_15_result_int[4]~5 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_15_result_int[5]~7 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_15_result_int[6]~9 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_15_result_int[7]~11 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_15_result_int[8]~12 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|StageOut[124]~563 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_16_result_int[5]~7 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_16_result_int[6]~9 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_16_result_int[7]~11 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_16_result_int[8]~12 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|StageOut[132]~567 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_17_result_int[5]~7 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_17_result_int[6]~9 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_17_result_int[7]~11 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_17_result_int[8]~12 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|StageOut[142]~569 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|op_9~32 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|op_9~33 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|StageOut[145]~30 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_19_result_int[2]~1 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_19_result_int[3]~3 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_19_result_int[4]~5 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_19_result_int[5]~7 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_19_result_int[6]~9 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_19_result_int[7]~11 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_19_result_int[8]~12 ADPCM_Decoder_1_Bit:u6|PCM_Data_Difference[0] } "NODE_NAME" } }  } 0 0 "Estimated most critical path is %2!s! to %3!s! delay of %1!s!" 0 0 "" 0 -1}
73 
{ "Info" "IFITAPI_FITAPI_VPR_FITTER_ROUTING_START" "" "Info: Fitter routing operations beginning" {  } {  } 0 0 "Fitter routing operations beginning" 0 0 "" 0 -1}
74 
{ "Info" "IFITAPI_FITAPI_VPR_PERCENT_ROUTING_RESOURCE_USAGE" "1 " "Info: Average interconnect usage is 1% of the available device resources" { { "Info" "IFITAPI_FITAPI_VPR_PEAK_ROUTING_REGION" "5 X25_Y14 X37_Y27 " "Info: Peak interconnect usage is 5% of the available device resources in the region that extends from location X25_Y14 to location X37_Y27" {  } {  } 0 0 "Peak interconnect usage is %1!d!%% of the available device resources in the region that extends from location %2!s! to location %3!s!" 0 0 "" 0 -1}  } {  } 0 0 "Average interconnect usage is %1!d!%% of the available device resources" 0 0 "" 0 -1}
75 
{ "Info" "IFITAPI_FITAPI_VPR_FITTER_ROUTING_END" "00:00:03 " "Info: Fitter routing operations ending: elapsed time is 00:00:03" {  } {  } 0 0 "Fitter routing operations ending: elapsed time is %1!s!" 0 0 "" 0 -1}
76 
{ "Info" "IFITAPI_FITAPI_VPR_AUTO_FIT_ENABLED_AND_USED" "" "Info: The Fitter performed an Auto Fit compilation.  Optimizations were skipped to reduce compilation time." { { "Info" "IFITAPI_FITAPI_VPR_AUTO_FIT_ENABLED_AND_USED_FOR_ROUTABILITY" "" "Info: Optimizations that may affect the design's routability were skipped" {  } {  } 0 0 "Optimizations that may affect the design's routability were skipped" 0 0 "" 0 -1} { "Info" "IFITAPI_FITAPI_VPR_AUTO_FIT_ENABLED_AND_USED_FOR_TIMING" "" "Info: Optimizations that may affect the design's timing were skipped" {  } {  } 0 0 "Optimizations that may affect the design's timing were skipped" 0 0 "" 0 -1}  } {  } 0 0 "The Fitter performed an Auto Fit compilation.  Optimizations were skipped to reduce compilation time." 0 0 "" 0 -1}
77 
{ "Info" "IDAT_DAT_STARTED" "" "Info: Started post-fitting delay annotation" {  } {  } 0 0 "Started post-fitting delay annotation" 0 0 "" 0 -1}
78 
{ "Warning" "WDAT_NO_LOADING_SPECIFIED_ONE_OR_MORE_PINS" "78 " "Warning: Found 78 output pins without output pin load capacitance assignment" { { "Info" "IDAT_NO_LOADING_SPECIFIED_ON_PIN" "I2C_DATA_INOUT 0 " "Info: Pin \"I2C_DATA_INOUT\" has no specified output pin load capacitance -- assuming default load capacitance of 0 pF for timing analysis" {  } {  } 0 0 "Pin \"%1!s!\" has no specified output pin load capacitance -- assuming default load capacitance of %2!d! pF for timing analysis" 0 0 "" 0 -1} { "Info" "IDAT_NO_LOADING_SPECIFIED_ON_PIN" "I2S_DATA_INOUT 0 " "Info: Pin \"I2S_DATA_INOUT\" has no specified output pin load capacitance -- assuming default load capacitance of 0 pF for timing analysis" {  } {  } 0 0 "Pin \"%1!s!\" has no specified output pin load capacitance -- assuming default load capacitance of %2!d! pF for timing analysis" 0 0 "" 0 -1} { "Info" "IDAT_NO_LOADING_SPECIFIED_ON_PIN" "FLASH_MEMORY_DATA_INOUT\[0\] 0 " "Info: Pin \"FLASH_MEMORY_DATA_INOUT\[0\]\" has no specified output pin load capacitance -- assuming default load capacitance of 0 pF for timing analysis" {  } {  } 0 0 "Pin \"%1!s!\" has no specified output pin load capacitance -- assuming default load capacitance of %2!d! pF for timing analysis" 0 0 "" 0 -1} { "Info" "IDAT_NO_LOADING_SPECIFIED_ON_PIN" "FLASH_MEMORY_DATA_INOUT\[1\] 0 " "Info: Pin \"FLASH_MEMORY_DATA_INOUT\[1\]\" has no specified output pin load capacitance -- assuming default load capacitance of 0 pF for timing analysis" {  } {  } 0 0 "Pin \"%1!s!\" has no specified output pin load capacitance -- assuming default load capacitance of %2!d! pF for timing analysis" 0 0 "" 0 -1} { "Info" "IDAT_NO_LOADING_SPECIFIED_ON_PIN" "FLASH_MEMORY_DATA_INOUT\[2\] 0 " "Info: Pin \"FLASH_MEMORY_DATA_INOUT\[2\]\" has no specified output pin load capacitance -- assuming default load capacitance of 0 pF for timing analysis" {  } {  } 0 0 "Pin \"%1!s!\" has no specified output pin load capacitance -- assuming default load capacitance of %2!d! pF for timing analysis" 0 0 "" 0 -1} { "Info" "IDAT_NO_LOADING_SPECIFIED_ON_PIN" "FLASH_MEMORY_DATA_INOUT\[3\] 0 " "Info: Pin \"FLASH_MEMORY_DATA_INOUT\[3\]\" has no specified output pin load capacitance -- assuming default load capacitance of 0 pF for timing analysis" {  } {  } 0 0 "Pin \"%1!s!\" has no specified output pin load capacitance -- assuming default load capacitance of %2!d! pF for timing analysis" 0 0 "" 0 -1} { "Info" "IDAT_NO_LOADING_SPECIFIED_ON_PIN" "FLASH_MEMORY_DATA_INOUT\[4\] 0 " "Info: Pin \"FLASH_MEMORY_DATA_INOUT\[4\]\" has no specified output pin load capacitance -- assuming default load capacitance of 0 pF for timing analysis" {  } {  } 0 0 "Pin \"%1!s!\" has no specified output pin load capacitance -- assuming default load capacitance of %2!d! pF for timing analysis" 0 0 "" 0 -1} { "Info" "IDAT_NO_LOADING_SPECIFIED_ON_PIN" "FLASH_MEMORY_DATA_INOUT\[5\] 0 " "Info: Pin \"FLASH_MEMORY_DATA_INOUT\[5\]\" has no specified output pin load capacitance -- assuming default load capacitance of 0 pF for timing analysis" {  } {  } 0 0 "Pin \"%1!s!\" has no specified output pin load capacitance -- assuming default load capacitance of %2!d! pF for timing analysis" 0 0 "" 0 -1} { "Info" "IDAT_NO_LOADING_SPECIFIED_ON_PIN" "FLASH_MEMORY_DATA_INOUT\[6\] 0 " "Info: Pin \"FLASH_MEMORY_DATA_INOUT\[6\]\" has no specified output pin load capacitance -- assuming default load capacitance of 0 pF for timing analysis" {  } {  } 0 0 "Pin \"%1!s!\" has no specified output pin load capacitance -- assuming default load capacitance of %2!d! pF for timing analysis" 0 0 "" 0 -1} { "Info" "IDAT_NO_LOADING_SPECIFIED_ON_PIN" "FLASH_MEMORY_DATA_INOUT\[7\] 0 " "Info: Pin \"FLASH_MEMORY_DATA_INOUT\[7\]\" has no specified output pin load capacitance -- assuming default load capacitance of 0 pF for timing analysis" {  } {  } 0 0 "Pin \"%1!s!\" has no specified output pin load capacitance -- assuming default load capacitance of %2!d! pF for timing analysis" 0 0 "" 0 -1} { "Info" "IDAT_NO_LOADING_SPECIFIED_ON_PIN" "S_SEVEN_SEGMENT_1_OUT\[0\] 0 " "Info: Pin \"S_SEVEN_SEGMENT_1_OUT\[0\]\" has no specified output pin load capacitance -- assuming default load capacitance of 0 pF for timing analysis" {  } {  } 0 0 "Pin \"%1!s!\" has no specified output pin load capacitance -- assuming default load capacitance of %2!d! pF for timing analysis" 0 0 "" 0 -1} { "Info" "IDAT_NO_LOADING_SPECIFIED_ON_PIN" "S_SEVEN_SEGMENT_1_OUT\[1\] 0 " "Info: Pin \"S_SEVEN_SEGMENT_1_OUT\[1\]\" has no specified output pin load capacitance -- assuming default load capacitance of 0 pF for timing analysis" {  } {  } 0 0 "Pin \"%1!s!\" has no specified output pin load capacitance -- assuming default load capacitance of %2!d! pF for timing analysis" 0 0 "" 0 -1} { "Info" "IDAT_NO_LOADING_SPECIFIED_ON_PIN" "S_SEVEN_SEGMENT_1_OUT\[2\] 0 " "Info: Pin \"S_SEVEN_SEGMENT_1_OUT\[2\]\" has no specified output pin load capacitance -- assuming default load capacitance of 0 pF for timing analysis" {  } {  } 0 0 "Pin \"%1!s!\" has no specified output pin load capacitance -- assuming default load capacitance of %2!d! pF for timing analysis" 0 0 "" 0 -1} { "Info" "IDAT_NO_LOADING_SPECIFIED_ON_PIN" "S_SEVEN_SEGMENT_1_OUT\[3\] 0 " "Info: Pin \"S_SEVEN_SEGMENT_1_OUT\[3\]\" has no specified output pin load capacitance -- assuming default load capacitance of 0 pF for timing analysis" {  } {  } 0 0 "Pin \"%1!s!\" has no specified output pin load capacitance -- assuming default load capacitance of %2!d! pF for timing analysis" 0 0 "" 0 -1} { "Info" "IDAT_NO_LOADING_SPECIFIED_ON_PIN" "S_SEVEN_SEGMENT_1_OUT\[4\] 0 " "Info: Pin \"S_SEVEN_SEGMENT_1_OUT\[4\]\" has no specified output pin load capacitance -- assuming default load capacitance of 0 pF for timing analysis" {  } {  } 0 0 "Pin \"%1!s!\" has no specified output pin load capacitance -- assuming default load capacitance of %2!d! pF for timing analysis" 0 0 "" 0 -1} { "Info" "IDAT_NO_LOADING_SPECIFIED_ON_PIN" "S_SEVEN_SEGMENT_1_OUT\[5\] 0 " "Info: Pin \"S_SEVEN_SEGMENT_1_OUT\[5\]\" has no specified output pin load capacitance -- assuming default load capacitance of 0 pF for timing analysis" {  } {  } 0 0 "Pin \"%1!s!\" has no specified output pin load capacitance -- assuming default load capacitance of %2!d! pF for timing analysis" 0 0 "" 0 -1} { "Info" "IDAT_NO_LOADING_SPECIFIED_ON_PIN" "S_SEVEN_SEGMENT_1_OUT\[6\] 0 " "Info: Pin \"S_SEVEN_SEGMENT_1_OUT\[6\]\" has no specified output pin load capacitance -- assuming default load capacitance of 0 pF for timing analysis" {  } {  } 0 0 "Pin \"%1!s!\" has no specified output pin load capacitance -- assuming default load capacitance of %2!d! pF for timing analysis" 0 0 "" 0 -1} { "Info" "IDAT_NO_LOADING_SPECIFIED_ON_PIN" "S_SEVEN_SEGMENT_2_OUT\[0\] 0 " "Info: Pin \"S_SEVEN_SEGMENT_2_OUT\[0\]\" has no specified output pin load capacitance -- assuming default load capacitance of 0 pF for timing analysis" {  } {  } 0 0 "Pin \"%1!s!\" has no specified output pin load capacitance -- assuming default load capacitance of %2!d! pF for timing analysis" 0 0 "" 0 -1} { "Info" "IDAT_NO_LOADING_SPECIFIED_ON_PIN" "S_SEVEN_SEGMENT_2_OUT\[1\] 0 " "Info: Pin \"S_SEVEN_SEGMENT_2_OUT\[1\]\" has no specified output pin load capacitance -- assuming default load capacitance of 0 pF for timing analysis" {  } {  } 0 0 "Pin \"%1!s!\" has no specified output pin load capacitance -- assuming default load capacitance of %2!d! pF for timing analysis" 0 0 "" 0 -1} { "Info" "IDAT_NO_LOADING_SPECIFIED_ON_PIN" "S_SEVEN_SEGMENT_2_OUT\[2\] 0 " "Info: Pin \"S_SEVEN_SEGMENT_2_OUT\[2\]\" has no specified output pin load capacitance -- assuming default load capacitance of 0 pF for timing analysis" {  } {  } 0 0 "Pin \"%1!s!\" has no specified output pin load capacitance -- assuming default load capacitance of %2!d! pF for timing analysis" 0 0 "" 0 -1} { "Info" "IDAT_NO_LOADING_SPECIFIED_ON_PIN" "S_SEVEN_SEGMENT_2_OUT\[3\] 0 " "Info: Pin \"S_SEVEN_SEGMENT_2_OUT\[3\]\" has no specified output pin load capacitance -- assuming default load capacitance of 0 pF for timing analysis" {  } {  } 0 0 "Pin \"%1!s!\" has no specified output pin load capacitance -- assuming default load capacitance of %2!d! pF for timing analysis" 0 0 "" 0 -1} { "Info" "IDAT_NO_LOADING_SPECIFIED_ON_PIN" "S_SEVEN_SEGMENT_2_OUT\[4\] 0 " "Info: Pin \"S_SEVEN_SEGMENT_2_OUT\[4\]\" has no specified output pin load capacitance -- assuming default load capacitance of 0 pF for timing analysis" {  } {  } 0 0 "Pin \"%1!s!\" has no specified output pin load capacitance -- assuming default load capacitance of %2!d! pF for timing analysis" 0 0 "" 0 -1} { "Info" "IDAT_NO_LOADING_SPECIFIED_ON_PIN" "S_SEVEN_SEGMENT_2_OUT\[5\] 0 " "Info: Pin \"S_SEVEN_SEGMENT_2_OUT\[5\]\" has no specified output pin load capacitance -- assuming default load capacitance of 0 pF for timing analysis" {  } {  } 0 0 "Pin \"%1!s!\" has no specified output pin load capacitance -- assuming default load capacitance of %2!d! pF for timing analysis" 0 0 "" 0 -1} { "Info" "IDAT_NO_LOADING_SPECIFIED_ON_PIN" "S_SEVEN_SEGMENT_2_OUT\[6\] 0 " "Info: Pin \"S_SEVEN_SEGMENT_2_OUT\[6\]\" has no specified output pin load capacitance -- assuming default load capacitance of 0 pF for timing analysis" {  } {  } 0 0 "Pin \"%1!s!\" has no specified output pin load capacitance -- assuming default load capacitance of %2!d! pF for timing analysis" 0 0 "" 0 -1} { "Info" "IDAT_NO_LOADING_SPECIFIED_ON_PIN" "S_SEVEN_SEGMENT_3_OUT\[0\] 0 " "Info: Pin \"S_SEVEN_SEGMENT_3_OUT\[0\]\" has no specified output pin load capacitance -- assuming default load capacitance of 0 pF for timing analysis" {  } {  } 0 0 "Pin \"%1!s!\" has no specified output pin load capacitance -- assuming default load capacitance of %2!d! pF for timing analysis" 0 0 "" 0 -1} { "Info" "IDAT_NO_LOADING_SPECIFIED_ON_PIN" "S_SEVEN_SEGMENT_3_OUT\[1\] 0 " "Info: Pin \"S_SEVEN_SEGMENT_3_OUT\[1\]\" has no specified output pin load capacitance -- assuming default load capacitance of 0 pF for timing analysis" {  } {  } 0 0 "Pin \"%1!s!\" has no specified output pin load capacitance -- assuming default load capacitance of %2!d! pF for timing analysis" 0 0 "" 0 -1} { "Info" "IDAT_NO_LOADING_SPECIFIED_ON_PIN" "S_SEVEN_SEGMENT_3_OUT\[2\] 0 " "Info: Pin \"S_SEVEN_SEGMENT_3_OUT\[2\]\" has no specified output pin load capacitance -- assuming default load capacitance of 0 pF for timing analysis" {  } {  } 0 0 "Pin \"%1!s!\" has no specified output pin load capacitance -- assuming default load capacitance of %2!d! pF for timing analysis" 0 0 "" 0 -1} { "Info" "IDAT_NO_LOADING_SPECIFIED_ON_PIN" "S_SEVEN_SEGMENT_3_OUT\[3\] 0 " "Info: Pin \"S_SEVEN_SEGMENT_3_OUT\[3\]\" has no specified output pin load capacitance -- assuming default load capacitance of 0 pF for timing analysis" {  } {  } 0 0 "Pin \"%1!s!\" has no specified output pin load capacitance -- assuming default load capacitance of %2!d! pF for timing analysis" 0 0 "" 0 -1} { "Info" "IDAT_NO_LOADING_SPECIFIED_ON_PIN" "S_SEVEN_SEGMENT_3_OUT\[4\] 0 " "Info: Pin \"S_SEVEN_SEGMENT_3_OUT\[4\]\" has no specified output pin load capacitance -- assuming default load capacitance of 0 pF for timing analysis" {  } {  } 0 0 "Pin \"%1!s!\" has no specified output pin load capacitance -- assuming default load capacitance of %2!d! pF for timing analysis" 0 0 "" 0 -1} { "Info" "IDAT_NO_LOADING_SPECIFIED_ON_PIN" "S_SEVEN_SEGMENT_3_OUT\[5\] 0 " "Info: Pin \"S_SEVEN_SEGMENT_3_OUT\[5\]\" has no specified output pin load capacitance -- assuming default load capacitance of 0 pF for timing analysis" {  } {  } 0 0 "Pin \"%1!s!\" has no specified output pin load capacitance -- assuming default load capacitance of %2!d! pF for timing analysis" 0 0 "" 0 -1} { "Info" "IDAT_NO_LOADING_SPECIFIED_ON_PIN" "S_SEVEN_SEGMENT_3_OUT\[6\] 0 " "Info: Pin \"S_SEVEN_SEGMENT_3_OUT\[6\]\" has no specified output pin load capacitance -- assuming default load capacitance of 0 pF for timing analysis" {  } {  } 0 0 "Pin \"%1!s!\" has no specified output pin load capacitance -- assuming default load capacitance of %2!d! pF for timing analysis" 0 0 "" 0 -1} { "Info" "IDAT_NO_LOADING_SPECIFIED_ON_PIN" "S_SEVEN_SEGMENT_4_OUT\[0\] 0 " "Info: Pin \"S_SEVEN_SEGMENT_4_OUT\[0\]\" has no specified output pin load capacitance -- assuming default load capacitance of 0 pF for timing analysis" {  } {  } 0 0 "Pin \"%1!s!\" has no specified output pin load capacitance -- assuming default load capacitance of %2!d! pF for timing analysis" 0 0 "" 0 -1} { "Info" "IDAT_NO_LOADING_SPECIFIED_ON_PIN" "S_SEVEN_SEGMENT_4_OUT\[1\] 0 " "Info: Pin \"S_SEVEN_SEGMENT_4_OUT\[1\]\" has no specified output pin load capacitance -- assuming default load capacitance of 0 pF for timing analysis" {  } {  } 0 0 "Pin \"%1!s!\" has no specified output pin load capacitance -- assuming default load capacitance of %2!d! pF for timing analysis" 0 0 "" 0 -1} { "Info" "IDAT_NO_LOADING_SPECIFIED_ON_PIN" "S_SEVEN_SEGMENT_4_OUT\[2\] 0 " "Info: Pin \"S_SEVEN_SEGMENT_4_OUT\[2\]\" has no specified output pin load capacitance -- assuming default load capacitance of 0 pF for timing analysis" {  } {  } 0 0 "Pin \"%1!s!\" has no specified output pin load capacitance -- assuming default load capacitance of %2!d! pF for timing analysis" 0 0 "" 0 -1} { "Info" "IDAT_NO_LOADING_SPECIFIED_ON_PIN" "S_SEVEN_SEGMENT_4_OUT\[3\] 0 " "Info: Pin \"S_SEVEN_SEGMENT_4_OUT\[3\]\" has no specified output pin load capacitance -- assuming default load capacitance of 0 pF for timing analysis" {  } {  } 0 0 "Pin \"%1!s!\" has no specified output pin load capacitance -- assuming default load capacitance of %2!d! pF for timing analysis" 0 0 "" 0 -1} { "Info" "IDAT_NO_LOADING_SPECIFIED_ON_PIN" "S_SEVEN_SEGMENT_4_OUT\[4\] 0 " "Info: Pin \"S_SEVEN_SEGMENT_4_OUT\[4\]\" has no specified output pin load capacitance -- assuming default load capacitance of 0 pF for timing analysis" {  } {  } 0 0 "Pin \"%1!s!\" has no specified output pin load capacitance -- assuming default load capacitance of %2!d! pF for timing analysis" 0 0 "" 0 -1} { "Info" "IDAT_NO_LOADING_SPECIFIED_ON_PIN" "S_SEVEN_SEGMENT_4_OUT\[5\] 0 " "Info: Pin \"S_SEVEN_SEGMENT_4_OUT\[5\]\" has no specified output pin load capacitance -- assuming default load capacitance of 0 pF for timing analysis" {  } {  } 0 0 "Pin \"%1!s!\" has no specified output pin load capacitance -- assuming default load capacitance of %2!d! pF for timing analysis" 0 0 "" 0 -1} { "Info" "IDAT_NO_LOADING_SPECIFIED_ON_PIN" "S_SEVEN_SEGMENT_4_OUT\[6\] 0 " "Info: Pin \"S_SEVEN_SEGMENT_4_OUT\[6\]\" has no specified output pin load capacitance -- assuming default load capacitance of 0 pF for timing analysis" {  } {  } 0 0 "Pin \"%1!s!\" has no specified output pin load capacitance -- assuming default load capacitance of %2!d! pF for timing analysis" 0 0 "" 0 -1} { "Info" "IDAT_NO_LOADING_SPECIFIED_ON_PIN" "S_RED_LEDS_OUT\[0\] 0 " "Info: Pin \"S_RED_LEDS_OUT\[0\]\" has no specified output pin load capacitance -- assuming default load capacitance of 0 pF for timing analysis" {  } {  } 0 0 "Pin \"%1!s!\" has no specified output pin load capacitance -- assuming default load capacitance of %2!d! pF for timing analysis" 0 0 "" 0 -1} { "Info" "IDAT_NO_LOADING_SPECIFIED_ON_PIN" "S_RED_LEDS_OUT\[1\] 0 " "Info: Pin \"S_RED_LEDS_OUT\[1\]\" has no specified output pin load capacitance -- assuming default load capacitance of 0 pF for timing analysis" {  } {  } 0 0 "Pin \"%1!s!\" has no specified output pin load capacitance -- assuming default load capacitance of %2!d! pF for timing analysis" 0 0 "" 0 -1} { "Info" "IDAT_NO_LOADING_SPECIFIED_ON_PIN" "S_RED_LEDS_OUT\[2\] 0 " "Info: Pin \"S_RED_LEDS_OUT\[2\]\" has no specified output pin load capacitance -- assuming default load capacitance of 0 pF for timing analysis" {  } {  } 0 0 "Pin \"%1!s!\" has no specified output pin load capacitance -- assuming default load capacitance of %2!d! pF for timing analysis" 0 0 "" 0 -1} { "Info" "IDAT_NO_LOADING_SPECIFIED_ON_PIN" "S_RED_LEDS_OUT\[3\] 0 " "Info: Pin \"S_RED_LEDS_OUT\[3\]\" has no specified output pin load capacitance -- assuming default load capacitance of 0 pF for timing analysis" {  } {  } 0 0 "Pin \"%1!s!\" has no specified output pin load capacitance -- assuming default load capacitance of %2!d! pF for timing analysis" 0 0 "" 0 -1} { "Info" "IDAT_NO_LOADING_SPECIFIED_ON_PIN" "S_RED_LEDS_OUT\[4\] 0 " "Info: Pin \"S_RED_LEDS_OUT\[4\]\" has no specified output pin load capacitance -- assuming default load capacitance of 0 pF for timing analysis" {  } {  } 0 0 "Pin \"%1!s!\" has no specified output pin load capacitance -- assuming default load capacitance of %2!d! pF for timing analysis" 0 0 "" 0 -1} { "Info" "IDAT_NO_LOADING_SPECIFIED_ON_PIN" "S_RED_LEDS_OUT\[5\] 0 " "Info: Pin \"S_RED_LEDS_OUT\[5\]\" has no specified output pin load capacitance -- assuming default load capacitance of 0 pF for timing analysis" {  } {  } 0 0 "Pin \"%1!s!\" has no specified output pin load capacitance -- assuming default load capacitance of %2!d! pF for timing analysis" 0 0 "" 0 -1} { "Info" "IDAT_NO_LOADING_SPECIFIED_ON_PIN" "S_RED_LEDS_OUT\[6\] 0 " "Info: Pin \"S_RED_LEDS_OUT\[6\]\" has no specified output pin load capacitance -- assuming default load capacitance of 0 pF for timing analysis" {  } {  } 0 0 "Pin \"%1!s!\" has no specified output pin load capacitance -- assuming default load capacitance of %2!d! pF for timing analysis" 0 0 "" 0 -1} { "Info" "IDAT_NO_LOADING_SPECIFIED_ON_PIN" "S_RED_LEDS_OUT\[7\] 0 " "Info: Pin \"S_RED_LEDS_OUT\[7\]\" has no specified output pin load capacitance -- assuming default load capacitance of 0 pF for timing analysis" {  } {  } 0 0 "Pin \"%1!s!\" has no specified output pin load capacitance -- assuming default load capacitance of %2!d! pF for timing analysis" 0 0 "" 0 -1} { "Info" "IDAT_NO_LOADING_SPECIFIED_ON_PIN" "S_RED_LEDS_OUT\[8\] 0 " "Info: Pin \"S_RED_LEDS_OUT\[8\]\" has no specified output pin load capacitance -- assuming default load capacitance of 0 pF for timing analysis" {  } {  } 0 0 "Pin \"%1!s!\" has no specified output pin load capacitance -- assuming default load capacitance of %2!d! pF for timing analysis" 0 0 "" 0 -1} { "Info" "IDAT_NO_LOADING_SPECIFIED_ON_PIN" "S_RED_LEDS_OUT\[9\] 0 " "Info: Pin \"S_RED_LEDS_OUT\[9\]\" has no specified output pin load capacitance -- assuming default load capacitance of 0 pF for timing analysis" {  } {  } 0 0 "Pin \"%1!s!\" has no specified output pin load capacitance -- assuming default load capacitance of %2!d! pF for timing analysis" 0 0 "" 0 -1} { "Info" "IDAT_NO_LOADING_SPECIFIED_ON_PIN" "I2C_CLOCK_OUT 0 " "Info: Pin \"I2C_CLOCK_OUT\" has no specified output pin load capacitance -- assuming default load capacitance of 0 pF for timing analysis" {  } {  } 0 0 "Pin \"%1!s!\" has no specified output pin load capacitance -- assuming default load capacitance of %2!d! pF for timing analysis" 0 0 "" 0 -1} { "Info" "IDAT_NO_LOADING_SPECIFIED_ON_PIN" "I2S_LEFT_RIGHT_CLOCK_OUT 0 " "Info: Pin \"I2S_LEFT_RIGHT_CLOCK_OUT\" has no specified output pin load capacitance -- assuming default load capacitance of 0 pF for timing analysis" {  } {  } 0 0 "Pin \"%1!s!\" has no specified output pin load capacitance -- assuming default load capacitance of %2!d! pF for timing analysis" 0 0 "" 0 -1} { "Info" "IDAT_NO_LOADING_SPECIFIED_ON_PIN" "I2S_CLOCK_OUT 0 " "Info: Pin \"I2S_CLOCK_OUT\" has no specified output pin load capacitance -- assuming default load capacitance of 0 pF for timing analysis" {  } {  } 0 0 "Pin \"%1!s!\" has no specified output pin load capacitance -- assuming default load capacitance of %2!d! pF for timing analysis" 0 0 "" 0 -1} { "Info" "IDAT_NO_LOADING_SPECIFIED_ON_PIN" "I2S_CORE_CLOCK_OUT 0 " "Info: Pin \"I2S_CORE_CLOCK_OUT\" has no specified output pin load capacitance -- assuming default load capacitance of 0 pF for timing analysis" {  } {  } 0 0 "Pin \"%1!s!\" has no specified output pin load capacitance -- assuming default load capacitance of %2!d! pF for timing analysis" 0 0 "" 0 -1} { "Info" "IDAT_NO_LOADING_SPECIFIED_ON_PIN" "FLASH_MEMORY_ADDRESS_OUT\[0\] 0 " "Info: Pin \"FLASH_MEMORY_ADDRESS_OUT\[0\]\" has no specified output pin load capacitance -- assuming default load capacitance of 0 pF for timing analysis" {  } {  } 0 0 "Pin \"%1!s!\" has no specified output pin load capacitance -- assuming default load capacitance of %2!d! pF for timing analysis" 0 0 "" 0 -1} { "Info" "IDAT_NO_LOADING_SPECIFIED_ON_PIN" "FLASH_MEMORY_ADDRESS_OUT\[1\] 0 " "Info: Pin \"FLASH_MEMORY_ADDRESS_OUT\[1\]\" has no specified output pin load capacitance -- assuming default load capacitance of 0 pF for timing analysis" {  } {  } 0 0 "Pin \"%1!s!\" has no specified output pin load capacitance -- assuming default load capacitance of %2!d! pF for timing analysis" 0 0 "" 0 -1} { "Info" "IDAT_NO_LOADING_SPECIFIED_ON_PIN" "FLASH_MEMORY_ADDRESS_OUT\[2\] 0 " "Info: Pin \"FLASH_MEMORY_ADDRESS_OUT\[2\]\" has no specified output pin load capacitance -- assuming default load capacitance of 0 pF for timing analysis" {  } {  } 0 0 "Pin \"%1!s!\" has no specified output pin load capacitance -- assuming default load capacitance of %2!d! pF for timing analysis" 0 0 "" 0 -1} { "Info" "IDAT_NO_LOADING_SPECIFIED_ON_PIN" "FLASH_MEMORY_ADDRESS_OUT\[3\] 0 " "Info: Pin \"FLASH_MEMORY_ADDRESS_OUT\[3\]\" has no specified output pin load capacitance -- assuming default load capacitance of 0 pF for timing analysis" {  } {  } 0 0 "Pin \"%1!s!\" has no specified output pin load capacitance -- assuming default load capacitance of %2!d! pF for timing analysis" 0 0 "" 0 -1} { "Info" "IDAT_NO_LOADING_SPECIFIED_ON_PIN" "FLASH_MEMORY_ADDRESS_OUT\[4\] 0 " "Info: Pin \"FLASH_MEMORY_ADDRESS_OUT\[4\]\" has no specified output pin load capacitance -- assuming default load capacitance of 0 pF for timing analysis" {  } {  } 0 0 "Pin \"%1!s!\" has no specified output pin load capacitance -- assuming default load capacitance of %2!d! pF for timing analysis" 0 0 "" 0 -1} { "Info" "IDAT_NO_LOADING_SPECIFIED_ON_PIN" "FLASH_MEMORY_ADDRESS_OUT\[5\] 0 " "Info: Pin \"FLASH_MEMORY_ADDRESS_OUT\[5\]\" has no specified output pin load capacitance -- assuming default load capacitance of 0 pF for timing analysis" {  } {  } 0 0 "Pin \"%1!s!\" has no specified output pin load capacitance -- assuming default load capacitance of %2!d! pF for timing analysis" 0 0 "" 0 -1} { "Info" "IDAT_NO_LOADING_SPECIFIED_ON_PIN" "FLASH_MEMORY_ADDRESS_OUT\[6\] 0 " "Info: Pin \"FLASH_MEMORY_ADDRESS_OUT\[6\]\" has no specified output pin load capacitance -- assuming default load capacitance of 0 pF for timing analysis" {  } {  } 0 0 "Pin \"%1!s!\" has no specified output pin load capacitance -- assuming default load capacitance of %2!d! pF for timing analysis" 0 0 "" 0 -1} { "Info" "IDAT_NO_LOADING_SPECIFIED_ON_PIN" "FLASH_MEMORY_ADDRESS_OUT\[7\] 0 " "Info: Pin \"FLASH_MEMORY_ADDRESS_OUT\[7\]\" has no specified output pin load capacitance -- assuming default load capacitance of 0 pF for timing analysis" {  } {  } 0 0 "Pin \"%1!s!\" has no specified output pin load capacitance -- assuming default load capacitance of %2!d! pF for timing analysis" 0 0 "" 0 -1} { "Info" "IDAT_NO_LOADING_SPECIFIED_ON_PIN" "FLASH_MEMORY_ADDRESS_OUT\[8\] 0 " "Info: Pin \"FLASH_MEMORY_ADDRESS_OUT\[8\]\" has no specified output pin load capacitance -- assuming default load capacitance of 0 pF for timing analysis" {  } {  } 0 0 "Pin \"%1!s!\" has no specified output pin load capacitance -- assuming default load capacitance of %2!d! pF for timing analysis" 0 0 "" 0 -1} { "Info" "IDAT_NO_LOADING_SPECIFIED_ON_PIN" "FLASH_MEMORY_ADDRESS_OUT\[9\] 0 " "Info: Pin \"FLASH_MEMORY_ADDRESS_OUT\[9\]\" has no specified output pin load capacitance -- assuming default load capacitance of 0 pF for timing analysis" {  } {  } 0 0 "Pin \"%1!s!\" has no specified output pin load capacitance -- assuming default load capacitance of %2!d! pF for timing analysis" 0 0 "" 0 -1} { "Info" "IDAT_NO_LOADING_SPECIFIED_ON_PIN" "FLASH_MEMORY_ADDRESS_OUT\[10\] 0 " "Info: Pin \"FLASH_MEMORY_ADDRESS_OUT\[10\]\" has no specified output pin load capacitance -- assuming default load capacitance of 0 pF for timing analysis" {  } {  } 0 0 "Pin \"%1!s!\" has no specified output pin load capacitance -- assuming default load capacitance of %2!d! pF for timing analysis" 0 0 "" 0 -1} { "Info" "IDAT_NO_LOADING_SPECIFIED_ON_PIN" "FLASH_MEMORY_ADDRESS_OUT\[11\] 0 " "Info: Pin \"FLASH_MEMORY_ADDRESS_OUT\[11\]\" has no specified output pin load capacitance -- assuming default load capacitance of 0 pF for timing analysis" {  } {  } 0 0 "Pin \"%1!s!\" has no specified output pin load capacitance -- assuming default load capacitance of %2!d! pF for timing analysis" 0 0 "" 0 -1} { "Info" "IDAT_NO_LOADING_SPECIFIED_ON_PIN" "FLASH_MEMORY_ADDRESS_OUT\[12\] 0 " "Info: Pin \"FLASH_MEMORY_ADDRESS_OUT\[12\]\" has no specified output pin load capacitance -- assuming default load capacitance of 0 pF for timing analysis" {  } {  } 0 0 "Pin \"%1!s!\" has no specified output pin load capacitance -- assuming default load capacitance of %2!d! pF for timing analysis" 0 0 "" 0 -1} { "Info" "IDAT_NO_LOADING_SPECIFIED_ON_PIN" "FLASH_MEMORY_ADDRESS_OUT\[13\] 0 " "Info: Pin \"FLASH_MEMORY_ADDRESS_OUT\[13\]\" has no specified output pin load capacitance -- assuming default load capacitance of 0 pF for timing analysis" {  } {  } 0 0 "Pin \"%1!s!\" has no specified output pin load capacitance -- assuming default load capacitance of %2!d! pF for timing analysis" 0 0 "" 0 -1} { "Info" "IDAT_NO_LOADING_SPECIFIED_ON_PIN" "FLASH_MEMORY_ADDRESS_OUT\[14\] 0 " "Info: Pin \"FLASH_MEMORY_ADDRESS_OUT\[14\]\" has no specified output pin load capacitance -- assuming default load capacitance of 0 pF for timing analysis" {  } {  } 0 0 "Pin \"%1!s!\" has no specified output pin load capacitance -- assuming default load capacitance of %2!d! pF for timing analysis" 0 0 "" 0 -1} { "Info" "IDAT_NO_LOADING_SPECIFIED_ON_PIN" "FLASH_MEMORY_ADDRESS_OUT\[15\] 0 " "Info: Pin \"FLASH_MEMORY_ADDRESS_OUT\[15\]\" has no specified output pin load capacitance -- assuming default load capacitance of 0 pF for timing analysis" {  } {  } 0 0 "Pin \"%1!s!\" has no specified output pin load capacitance -- assuming default load capacitance of %2!d! pF for timing analysis" 0 0 "" 0 -1} { "Info" "IDAT_NO_LOADING_SPECIFIED_ON_PIN" "FLASH_MEMORY_ADDRESS_OUT\[16\] 0 " "Info: Pin \"FLASH_MEMORY_ADDRESS_OUT\[16\]\" has no specified output pin load capacitance -- assuming default load capacitance of 0 pF for timing analysis" {  } {  } 0 0 "Pin \"%1!s!\" has no specified output pin load capacitance -- assuming default load capacitance of %2!d! pF for timing analysis" 0 0 "" 0 -1} { "Info" "IDAT_NO_LOADING_SPECIFIED_ON_PIN" "FLASH_MEMORY_ADDRESS_OUT\[17\] 0 " "Info: Pin \"FLASH_MEMORY_ADDRESS_OUT\[17\]\" has no specified output pin load capacitance -- assuming default load capacitance of 0 pF for timing analysis" {  } {  } 0 0 "Pin \"%1!s!\" has no specified output pin load capacitance -- assuming default load capacitance of %2!d! pF for timing analysis" 0 0 "" 0 -1} { "Info" "IDAT_NO_LOADING_SPECIFIED_ON_PIN" "FLASH_MEMORY_ADDRESS_OUT\[18\] 0 " "Info: Pin \"FLASH_MEMORY_ADDRESS_OUT\[18\]\" has no specified output pin load capacitance -- assuming default load capacitance of 0 pF for timing analysis" {  } {  } 0 0 "Pin \"%1!s!\" has no specified output pin load capacitance -- assuming default load capacitance of %2!d! pF for timing analysis" 0 0 "" 0 -1} { "Info" "IDAT_NO_LOADING_SPECIFIED_ON_PIN" "FLASH_MEMORY_ADDRESS_OUT\[19\] 0 " "Info: Pin \"FLASH_MEMORY_ADDRESS_OUT\[19\]\" has no specified output pin load capacitance -- assuming default load capacitance of 0 pF for timing analysis" {  } {  } 0 0 "Pin \"%1!s!\" has no specified output pin load capacitance -- assuming default load capacitance of %2!d! pF for timing analysis" 0 0 "" 0 -1} { "Info" "IDAT_NO_LOADING_SPECIFIED_ON_PIN" "FLASH_MEMORY_ADDRESS_OUT\[20\] 0 " "Info: Pin \"FLASH_MEMORY_ADDRESS_OUT\[20\]\" has no specified output pin load capacitance -- assuming default load capacitance of 0 pF for timing analysis" {  } {  } 0 0 "Pin \"%1!s!\" has no specified output pin load capacitance -- assuming default load capacitance of %2!d! pF for timing analysis" 0 0 "" 0 -1} { "Info" "IDAT_NO_LOADING_SPECIFIED_ON_PIN" "FLASH_MEMORY_ADDRESS_OUT\[21\] 0 " "Info: Pin \"FLASH_MEMORY_ADDRESS_OUT\[21\]\" has no specified output pin load capacitance -- assuming default load capacitance of 0 pF for timing analysis" {  } {  } 0 0 "Pin \"%1!s!\" has no specified output pin load capacitance -- assuming default load capacitance of %2!d! pF for timing analysis" 0 0 "" 0 -1} { "Info" "IDAT_NO_LOADING_SPECIFIED_ON_PIN" "FLASH_MEMORY_nWE_OUT 0 " "Info: Pin \"FLASH_MEMORY_nWE_OUT\" has no specified output pin load capacitance -- assuming default load capacitance of 0 pF for timing analysis" {  } {  } 0 0 "Pin \"%1!s!\" has no specified output pin load capacitance -- assuming default load capacitance of %2!d! pF for timing analysis" 0 0 "" 0 -1} { "Info" "IDAT_NO_LOADING_SPECIFIED_ON_PIN" "FLASH_MEMORY_nOE_OUT 0 " "Info: Pin \"FLASH_MEMORY_nOE_OUT\" has no specified output pin load capacitance -- assuming default load capacitance of 0 pF for timing analysis" {  } {  } 0 0 "Pin \"%1!s!\" has no specified output pin load capacitance -- assuming default load capacitance of %2!d! pF for timing analysis" 0 0 "" 0 -1} { "Info" "IDAT_NO_LOADING_SPECIFIED_ON_PIN" "FLASH_MEMORY_nRESET_OUT 0 " "Info: Pin \"FLASH_MEMORY_nRESET_OUT\" has no specified output pin load capacitance -- assuming default load capacitance of 0 pF for timing analysis" {  } {  } 0 0 "Pin \"%1!s!\" has no specified output pin load capacitance -- assuming default load capacitance of %2!d! pF for timing analysis" 0 0 "" 0 -1} { "Info" "IDAT_NO_LOADING_SPECIFIED_ON_PIN" "FLASH_MEMORY_nCE_OUT 0 " "Info: Pin \"FLASH_MEMORY_nCE_OUT\" has no specified output pin load capacitance -- assuming default load capacitance of 0 pF for timing analysis" {  } {  } 0 0 "Pin \"%1!s!\" has no specified output pin load capacitance -- assuming default load capacitance of %2!d! pF for timing analysis" 0 0 "" 0 -1}  } {  } 0 0 "Found %1!d! output pins without output pin load capacitance assignment" 0 0 "" 0 -1}
79 
{ "Info" "IDAT_DAT_COMPLETED" "" "Info: Delay annotation completed successfully" {  } {  } 0 0 "Delay annotation completed successfully" 0 0 "" 0 -1}
80 
{ "Warning" "WFIOMGR_BIDIR_WITH_TRIVIAL_OUTPUT_ENABLE" "10 " "Warning: Following 10 pins have no output enable or a GND or VCC output enable - later changes to this connectivity may change fitting results" { { "Info" "IFIOMGR_BIDIR_WITH_TRIVIAL_OUTPUT_ENABLE_SUB" "I2C_DATA_INOUT a permanently enabled " "Info: Pin I2C_DATA_INOUT has a permanently enabled output enable" {  } { { "c:/altera/90/quartus/bin/pin_planner.ppl" "" { PinPlanner "c:/altera/90/quartus/bin/pin_planner.ppl" { I2C_DATA_INOUT } } } { "c:/altera/90/quartus/bin/Assignment Editor.qase" "" { Assignment "c:/altera/90/quartus/bin/Assignment Editor.qase" 1 { { 0 "I2C_DATA_INOUT" } } } } { "HD_ADPCM_Codec.vhd" "" { Text "D:/HD_ADPCM/HD_ADPCM_1Bit_Stereo_Decoder/HD_ADPCM_Codec.vhd" 19 -1 0 } } { "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" "" { I2C_DATA_INOUT } "NODE_NAME" } }  } 0 0 "Pin %1!s! has %2!s! output enable" 0 0 "" 0 -1} { "Info" "IFIOMGR_BIDIR_WITH_TRIVIAL_OUTPUT_ENABLE_SUB" "I2S_DATA_INOUT a permanently enabled " "Info: Pin I2S_DATA_INOUT has a permanently enabled output enable" {  } { { "c:/altera/90/quartus/bin/pin_planner.ppl" "" { PinPlanner "c:/altera/90/quartus/bin/pin_planner.ppl" { I2S_DATA_INOUT } } } { "c:/altera/90/quartus/bin/Assignment Editor.qase" "" { Assignment "c:/altera/90/quartus/bin/Assignment Editor.qase" 1 { { 0 "I2S_DATA_INOUT" } } } } { "HD_ADPCM_Codec.vhd" "" { Text "D:/HD_ADPCM/HD_ADPCM_1Bit_Stereo_Decoder/HD_ADPCM_Codec.vhd" 22 -1 0 } } { "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" "" { I2S_DATA_INOUT } "NODE_NAME" } }  } 0 0 "Pin %1!s! has %2!s! output enable" 0 0 "" 0 -1} { "Info" "IFIOMGR_BIDIR_WITH_TRIVIAL_OUTPUT_ENABLE_SUB" "FLASH_MEMORY_DATA_INOUT\[0\] a permanently disabled " "Info: Pin FLASH_MEMORY_DATA_INOUT\[0\] has a permanently disabled output enable" {  } { { "c:/altera/90/quartus/bin/pin_planner.ppl" "" { PinPlanner "c:/altera/90/quartus/bin/pin_planner.ppl" { FLASH_MEMORY_DATA_INOUT[0] } } } { "c:/altera/90/quartus/bin/Assignment Editor.qase" "" { Assignment "c:/altera/90/quartus/bin/Assignment Editor.qase" 1 { { 0 "FLASH_MEMORY_DATA_INOUT\[0\]" } } } } { "HD_ADPCM_Codec.vhd" "" { Text "D:/HD_ADPCM/HD_ADPCM_1Bit_Stereo_Decoder/HD_ADPCM_Codec.vhd" 28 -1 0 } } { "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" "" { FLASH_MEMORY_DATA_INOUT[0] } "NODE_NAME" } }  } 0 0 "Pin %1!s! has %2!s! output enable" 0 0 "" 0 -1} { "Info" "IFIOMGR_BIDIR_WITH_TRIVIAL_OUTPUT_ENABLE_SUB" "FLASH_MEMORY_DATA_INOUT\[1\] a permanently disabled " "Info: Pin FLASH_MEMORY_DATA_INOUT\[1\] has a permanently disabled output enable" {  } { { "c:/altera/90/quartus/bin/pin_planner.ppl" "" { PinPlanner "c:/altera/90/quartus/bin/pin_planner.ppl" { FLASH_MEMORY_DATA_INOUT[1] } } } { "c:/altera/90/quartus/bin/Assignment Editor.qase" "" { Assignment "c:/altera/90/quartus/bin/Assignment Editor.qase" 1 { { 0 "FLASH_MEMORY_DATA_INOUT\[1\]" } } } } { "HD_ADPCM_Codec.vhd" "" { Text "D:/HD_ADPCM/HD_ADPCM_1Bit_Stereo_Decoder/HD_ADPCM_Codec.vhd" 28 -1 0 } } { "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" "" { FLASH_MEMORY_DATA_INOUT[1] } "NODE_NAME" } }  } 0 0 "Pin %1!s! has %2!s! output enable" 0 0 "" 0 -1} { "Info" "IFIOMGR_BIDIR_WITH_TRIVIAL_OUTPUT_ENABLE_SUB" "FLASH_MEMORY_DATA_INOUT\[2\] a permanently disabled " "Info: Pin FLASH_MEMORY_DATA_INOUT\[2\] has a permanently disabled output enable" {  } { { "c:/altera/90/quartus/bin/pin_planner.ppl" "" { PinPlanner "c:/altera/90/quartus/bin/pin_planner.ppl" { FLASH_MEMORY_DATA_INOUT[2] } } } { "c:/altera/90/quartus/bin/Assignment Editor.qase" "" { Assignment "c:/altera/90/quartus/bin/Assignment Editor.qase" 1 { { 0 "FLASH_MEMORY_DATA_INOUT\[2\]" } } } } { "HD_ADPCM_Codec.vhd" "" { Text "D:/HD_ADPCM/HD_ADPCM_1Bit_Stereo_Decoder/HD_ADPCM_Codec.vhd" 28 -1 0 } } { "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" "" { FLASH_MEMORY_DATA_INOUT[2] } "NODE_NAME" } }  } 0 0 "Pin %1!s! has %2!s! output enable" 0 0 "" 0 -1} { "Info" "IFIOMGR_BIDIR_WITH_TRIVIAL_OUTPUT_ENABLE_SUB" "FLASH_MEMORY_DATA_INOUT\[3\] a permanently disabled " "Info: Pin FLASH_MEMORY_DATA_INOUT\[3\] has a permanently disabled output enable" {  } { { "c:/altera/90/quartus/bin/pin_planner.ppl" "" { PinPlanner "c:/altera/90/quartus/bin/pin_planner.ppl" { FLASH_MEMORY_DATA_INOUT[3] } } } { "c:/altera/90/quartus/bin/Assignment Editor.qase" "" { Assignment "c:/altera/90/quartus/bin/Assignment Editor.qase" 1 { { 0 "FLASH_MEMORY_DATA_INOUT\[3\]" } } } } { "HD_ADPCM_Codec.vhd" "" { Text "D:/HD_ADPCM/HD_ADPCM_1Bit_Stereo_Decoder/HD_ADPCM_Codec.vhd" 28 -1 0 } } { "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" "" { FLASH_MEMORY_DATA_INOUT[3] } "NODE_NAME" } }  } 0 0 "Pin %1!s! has %2!s! output enable" 0 0 "" 0 -1} { "Info" "IFIOMGR_BIDIR_WITH_TRIVIAL_OUTPUT_ENABLE_SUB" "FLASH_MEMORY_DATA_INOUT\[4\] a permanently disabled " "Info: Pin FLASH_MEMORY_DATA_INOUT\[4\] has a permanently disabled output enable" {  } { { "c:/altera/90/quartus/bin/pin_planner.ppl" "" { PinPlanner "c:/altera/90/quartus/bin/pin_planner.ppl" { FLASH_MEMORY_DATA_INOUT[4] } } } { "c:/altera/90/quartus/bin/Assignment Editor.qase" "" { Assignment "c:/altera/90/quartus/bin/Assignment Editor.qase" 1 { { 0 "FLASH_MEMORY_DATA_INOUT\[4\]" } } } } { "HD_ADPCM_Codec.vhd" "" { Text "D:/HD_ADPCM/HD_ADPCM_1Bit_Stereo_Decoder/HD_ADPCM_Codec.vhd" 28 -1 0 } } { "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" "" { FLASH_MEMORY_DATA_INOUT[4] } "NODE_NAME" } }  } 0 0 "Pin %1!s! has %2!s! output enable" 0 0 "" 0 -1} { "Info" "IFIOMGR_BIDIR_WITH_TRIVIAL_OUTPUT_ENABLE_SUB" "FLASH_MEMORY_DATA_INOUT\[5\] a permanently disabled " "Info: Pin FLASH_MEMORY_DATA_INOUT\[5\] has a permanently disabled output enable" {  } { { "c:/altera/90/quartus/bin/pin_planner.ppl" "" { PinPlanner "c:/altera/90/quartus/bin/pin_planner.ppl" { FLASH_MEMORY_DATA_INOUT[5] } } } { "c:/altera/90/quartus/bin/Assignment Editor.qase" "" { Assignment "c:/altera/90/quartus/bin/Assignment Editor.qase" 1 { { 0 "FLASH_MEMORY_DATA_INOUT\[5\]" } } } } { "HD_ADPCM_Codec.vhd" "" { Text "D:/HD_ADPCM/HD_ADPCM_1Bit_Stereo_Decoder/HD_ADPCM_Codec.vhd" 28 -1 0 } } { "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" "" { FLASH_MEMORY_DATA_INOUT[5] } "NODE_NAME" } }  } 0 0 "Pin %1!s! has %2!s! output enable" 0 0 "" 0 -1} { "Info" "IFIOMGR_BIDIR_WITH_TRIVIAL_OUTPUT_ENABLE_SUB" "FLASH_MEMORY_DATA_INOUT\[6\] a permanently disabled " "Info: Pin FLASH_MEMORY_DATA_INOUT\[6\] has a permanently disabled output enable" {  } { { "c:/altera/90/quartus/bin/pin_planner.ppl" "" { PinPlanner "c:/altera/90/quartus/bin/pin_planner.ppl" { FLASH_MEMORY_DATA_INOUT[6] } } } { "c:/altera/90/quartus/bin/Assignment Editor.qase" "" { Assignment "c:/altera/90/quartus/bin/Assignment Editor.qase" 1 { { 0 "FLASH_MEMORY_DATA_INOUT\[6\]" } } } } { "HD_ADPCM_Codec.vhd" "" { Text "D:/HD_ADPCM/HD_ADPCM_1Bit_Stereo_Decoder/HD_ADPCM_Codec.vhd" 28 -1 0 } } { "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" "" { FLASH_MEMORY_DATA_INOUT[6] } "NODE_NAME" } }  } 0 0 "Pin %1!s! has %2!s! output enable" 0 0 "" 0 -1} { "Info" "IFIOMGR_BIDIR_WITH_TRIVIAL_OUTPUT_ENABLE_SUB" "FLASH_MEMORY_DATA_INOUT\[7\] a permanently disabled " "Info: Pin FLASH_MEMORY_DATA_INOUT\[7\] has a permanently disabled output enable" {  } { { "c:/altera/90/quartus/bin/pin_planner.ppl" "" { PinPlanner "c:/altera/90/quartus/bin/pin_planner.ppl" { FLASH_MEMORY_DATA_INOUT[7] } } } { "c:/altera/90/quartus/bin/Assignment Editor.qase" "" { Assignment "c:/altera/90/quartus/bin/Assignment Editor.qase" 1 { { 0 "FLASH_MEMORY_DATA_INOUT\[7\]" } } } } { "HD_ADPCM_Codec.vhd" "" { Text "D:/HD_ADPCM/HD_ADPCM_1Bit_Stereo_Decoder/HD_ADPCM_Codec.vhd" 28 -1 0 } } { "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" "" { FLASH_MEMORY_DATA_INOUT[7] } "NODE_NAME" } }  } 0 0 "Pin %1!s! has %2!s! output enable" 0 0 "" 0 -1}  } {  } 0 0 "Following %1!d! pins have no output enable or a GND or VCC output enable - later changes to this connectivity may change fitting results" 0 0 "" 0 -1}
81 
{ "Warning" "WFIOMGR_BIDIR_OR_OUTPUT_WITH_TRIVIAL_DATAIN" "38 " "Warning: Following 38 pins have nothing, GND, or VCC driving datain port -- changes to this connectivity may change fitting results" { { "Info" "IFIOMGR_BIDIR_OR_OUTPUT_WITH_TRIVIAL_DATAIN_SUB" "FLASH_MEMORY_DATA_INOUT\[0\] VCC " "Info: Pin FLASH_MEMORY_DATA_INOUT\[0\] has VCC driving its datain port" {  } { { "c:/altera/90/quartus/bin/pin_planner.ppl" "" { PinPlanner "c:/altera/90/quartus/bin/pin_planner.ppl" { FLASH_MEMORY_DATA_INOUT[0] } } } { "c:/altera/90/quartus/bin/Assignment Editor.qase" "" { Assignment "c:/altera/90/quartus/bin/Assignment Editor.qase" 1 { { 0 "FLASH_MEMORY_DATA_INOUT\[0\]" } } } } { "HD_ADPCM_Codec.vhd" "" { Text "D:/HD_ADPCM/HD_ADPCM_1Bit_Stereo_Decoder/HD_ADPCM_Codec.vhd" 28 -1 0 } } { "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" "" { FLASH_MEMORY_DATA_INOUT[0] } "NODE_NAME" } }  } 0 0 "Pin %1!s! has %2!s! driving its datain port" 0 0 "" 0 -1} { "Info" "IFIOMGR_BIDIR_OR_OUTPUT_WITH_TRIVIAL_DATAIN_SUB" "FLASH_MEMORY_DATA_INOUT\[1\] VCC " "Info: Pin FLASH_MEMORY_DATA_INOUT\[1\] has VCC driving its datain port" {  } { { "c:/altera/90/quartus/bin/pin_planner.ppl" "" { PinPlanner "c:/altera/90/quartus/bin/pin_planner.ppl" { FLASH_MEMORY_DATA_INOUT[1] } } } { "c:/altera/90/quartus/bin/Assignment Editor.qase" "" { Assignment "c:/altera/90/quartus/bin/Assignment Editor.qase" 1 { { 0 "FLASH_MEMORY_DATA_INOUT\[1\]" } } } } { "HD_ADPCM_Codec.vhd" "" { Text "D:/HD_ADPCM/HD_ADPCM_1Bit_Stereo_Decoder/HD_ADPCM_Codec.vhd" 28 -1 0 } } { "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" "" { FLASH_MEMORY_DATA_INOUT[1] } "NODE_NAME" } }  } 0 0 "Pin %1!s! has %2!s! driving its datain port" 0 0 "" 0 -1} { "Info" "IFIOMGR_BIDIR_OR_OUTPUT_WITH_TRIVIAL_DATAIN_SUB" "FLASH_MEMORY_DATA_INOUT\[2\] VCC " "Info: Pin FLASH_MEMORY_DATA_INOUT\[2\] has VCC driving its datain port" {  } { { "c:/altera/90/quartus/bin/pin_planner.ppl" "" { PinPlanner "c:/altera/90/quartus/bin/pin_planner.ppl" { FLASH_MEMORY_DATA_INOUT[2] } } } { "c:/altera/90/quartus/bin/Assignment Editor.qase" "" { Assignment "c:/altera/90/quartus/bin/Assignment Editor.qase" 1 { { 0 "FLASH_MEMORY_DATA_INOUT\[2\]" } } } } { "HD_ADPCM_Codec.vhd" "" { Text "D:/HD_ADPCM/HD_ADPCM_1Bit_Stereo_Decoder/HD_ADPCM_Codec.vhd" 28 -1 0 } } { "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" "" { FLASH_MEMORY_DATA_INOUT[2] } "NODE_NAME" } }  } 0 0 "Pin %1!s! has %2!s! driving its datain port" 0 0 "" 0 -1} { "Info" "IFIOMGR_BIDIR_OR_OUTPUT_WITH_TRIVIAL_DATAIN_SUB" "FLASH_MEMORY_DATA_INOUT\[3\] VCC " "Info: Pin FLASH_MEMORY_DATA_INOUT\[3\] has VCC driving its datain port" {  } { { "c:/altera/90/quartus/bin/pin_planner.ppl" "" { PinPlanner "c:/altera/90/quartus/bin/pin_planner.ppl" { FLASH_MEMORY_DATA_INOUT[3] } } } { "c:/altera/90/quartus/bin/Assignment Editor.qase" "" { Assignment "c:/altera/90/quartus/bin/Assignment Editor.qase" 1 { { 0 "FLASH_MEMORY_DATA_INOUT\[3\]" } } } } { "HD_ADPCM_Codec.vhd" "" { Text "D:/HD_ADPCM/HD_ADPCM_1Bit_Stereo_Decoder/HD_ADPCM_Codec.vhd" 28 -1 0 } } { "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" "" { FLASH_MEMORY_DATA_INOUT[3] } "NODE_NAME" } }  } 0 0 "Pin %1!s! has %2!s! driving its datain port" 0 0 "" 0 -1} { "Info" "IFIOMGR_BIDIR_OR_OUTPUT_WITH_TRIVIAL_DATAIN_SUB" "FLASH_MEMORY_DATA_INOUT\[4\] VCC " "Info: Pin FLASH_MEMORY_DATA_INOUT\[4\] has VCC driving its datain port" {  } { { "c:/altera/90/quartus/bin/pin_planner.ppl" "" { PinPlanner "c:/altera/90/quartus/bin/pin_planner.ppl" { FLASH_MEMORY_DATA_INOUT[4] } } } { "c:/altera/90/quartus/bin/Assignment Editor.qase" "" { Assignment "c:/altera/90/quartus/bin/Assignment Editor.qase" 1 { { 0 "FLASH_MEMORY_DATA_INOUT\[4\]" } } } } { "HD_ADPCM_Codec.vhd" "" { Text "D:/HD_ADPCM/HD_ADPCM_1Bit_Stereo_Decoder/HD_ADPCM_Codec.vhd" 28 -1 0 } } { "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" "" { FLASH_MEMORY_DATA_INOUT[4] } "NODE_NAME" } }  } 0 0 "Pin %1!s! has %2!s! driving its datain port" 0 0 "" 0 -1} { "Info" "IFIOMGR_BIDIR_OR_OUTPUT_WITH_TRIVIAL_DATAIN_SUB" "FLASH_MEMORY_DATA_INOUT\[5\] VCC " "Info: Pin FLASH_MEMORY_DATA_INOUT\[5\] has VCC driving its datain port" {  } { { "c:/altera/90/quartus/bin/pin_planner.ppl" "" { PinPlanner "c:/altera/90/quartus/bin/pin_planner.ppl" { FLASH_MEMORY_DATA_INOUT[5] } } } { "c:/altera/90/quartus/bin/Assignment Editor.qase" "" { Assignment "c:/altera/90/quartus/bin/Assignment Editor.qase" 1 { { 0 "FLASH_MEMORY_DATA_INOUT\[5\]" } } } } { "HD_ADPCM_Codec.vhd" "" { Text "D:/HD_ADPCM/HD_ADPCM_1Bit_Stereo_Decoder/HD_ADPCM_Codec.vhd" 28 -1 0 } } { "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" "" { FLASH_MEMORY_DATA_INOUT[5] } "NODE_NAME" } }  } 0 0 "Pin %1!s! has %2!s! driving its datain port" 0 0 "" 0 -1} { "Info" "IFIOMGR_BIDIR_OR_OUTPUT_WITH_TRIVIAL_DATAIN_SUB" "FLASH_MEMORY_DATA_INOUT\[6\] VCC " "Info: Pin FLASH_MEMORY_DATA_INOUT\[6\] has VCC driving its datain port" {  } { { "c:/altera/90/quartus/bin/pin_planner.ppl" "" { PinPlanner "c:/altera/90/quartus/bin/pin_planner.ppl" { FLASH_MEMORY_DATA_INOUT[6] } } } { "c:/altera/90/quartus/bin/Assignment Editor.qase" "" { Assignment "c:/altera/90/quartus/bin/Assignment Editor.qase" 1 { { 0 "FLASH_MEMORY_DATA_INOUT\[6\]" } } } } { "HD_ADPCM_Codec.vhd" "" { Text "D:/HD_ADPCM/HD_ADPCM_1Bit_Stereo_Decoder/HD_ADPCM_Codec.vhd" 28 -1 0 } } { "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" "" { FLASH_MEMORY_DATA_INOUT[6] } "NODE_NAME" } }  } 0 0 "Pin %1!s! has %2!s! driving its datain port" 0 0 "" 0 -1} { "Info" "IFIOMGR_BIDIR_OR_OUTPUT_WITH_TRIVIAL_DATAIN_SUB" "FLASH_MEMORY_DATA_INOUT\[7\] VCC " "Info: Pin FLASH_MEMORY_DATA_INOUT\[7\] has VCC driving its datain port" {  } { { "c:/altera/90/quartus/bin/pin_planner.ppl" "" { PinPlanner "c:/altera/90/quartus/bin/pin_planner.ppl" { FLASH_MEMORY_DATA_INOUT[7] } } } { "c:/altera/90/quartus/bin/Assignment Editor.qase" "" { Assignment "c:/altera/90/quartus/bin/Assignment Editor.qase" 1 { { 0 "FLASH_MEMORY_DATA_INOUT\[7\]" } } } } { "HD_ADPCM_Codec.vhd" "" { Text "D:/HD_ADPCM/HD_ADPCM_1Bit_Stereo_Decoder/HD_ADPCM_Codec.vhd" 28 -1 0 } } { "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" "" { FLASH_MEMORY_DATA_INOUT[7] } "NODE_NAME" } }  } 0 0 "Pin %1!s! has %2!s! driving its datain port" 0 0 "" 0 -1} { "Info" "IFIOMGR_BIDIR_OR_OUTPUT_WITH_TRIVIAL_DATAIN_SUB" "S_SEVEN_SEGMENT_1_OUT\[0\] GND " "Info: Pin S_SEVEN_SEGMENT_1_OUT\[0\] has GND driving its datain port" {  } { { "c:/altera/90/quartus/bin/pin_planner.ppl" "" { PinPlanner "c:/altera/90/quartus/bin/pin_planner.ppl" { S_SEVEN_SEGMENT_1_OUT[0] } } } { "c:/altera/90/quartus/bin/Assignment Editor.qase" "" { Assignment "c:/altera/90/quartus/bin/Assignment Editor.qase" 1 { { 0 "S_SEVEN_SEGMENT_1_OUT\[0\]" } } } } { "HD_ADPCM_Codec.vhd" "" { Text "D:/HD_ADPCM/HD_ADPCM_1Bit_Stereo_Decoder/HD_ADPCM_Codec.vhd" 13 -1 0 } } { "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" "" { S_SEVEN_SEGMENT_1_OUT[0] } "NODE_NAME" } }  } 0 0 "Pin %1!s! has %2!s! driving its datain port" 0 0 "" 0 -1} { "Info" "IFIOMGR_BIDIR_OR_OUTPUT_WITH_TRIVIAL_DATAIN_SUB" "S_SEVEN_SEGMENT_1_OUT\[1\] GND " "Info: Pin S_SEVEN_SEGMENT_1_OUT\[1\] has GND driving its datain port" {  } { { "c:/altera/90/quartus/bin/pin_planner.ppl" "" { PinPlanner "c:/altera/90/quartus/bin/pin_planner.ppl" { S_SEVEN_SEGMENT_1_OUT[1] } } } { "c:/altera/90/quartus/bin/Assignment Editor.qase" "" { Assignment "c:/altera/90/quartus/bin/Assignment Editor.qase" 1 { { 0 "S_SEVEN_SEGMENT_1_OUT\[1\]" } } } } { "HD_ADPCM_Codec.vhd" "" { Text "D:/HD_ADPCM/HD_ADPCM_1Bit_Stereo_Decoder/HD_ADPCM_Codec.vhd" 13 -1 0 } } { "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" "" { S_SEVEN_SEGMENT_1_OUT[1] } "NODE_NAME" } }  } 0 0 "Pin %1!s! has %2!s! driving its datain port" 0 0 "" 0 -1} { "Info" "IFIOMGR_BIDIR_OR_OUTPUT_WITH_TRIVIAL_DATAIN_SUB" "S_SEVEN_SEGMENT_1_OUT\[2\] GND " "Info: Pin S_SEVEN_SEGMENT_1_OUT\[2\] has GND driving its datain port" {  } { { "c:/altera/90/quartus/bin/pin_planner.ppl" "" { PinPlanner "c:/altera/90/quartus/bin/pin_planner.ppl" { S_SEVEN_SEGMENT_1_OUT[2] } } } { "c:/altera/90/quartus/bin/Assignment Editor.qase" "" { Assignment "c:/altera/90/quartus/bin/Assignment Editor.qase" 1 { { 0 "S_SEVEN_SEGMENT_1_OUT\[2\]" } } } } { "HD_ADPCM_Codec.vhd" "" { Text "D:/HD_ADPCM/HD_ADPCM_1Bit_Stereo_Decoder/HD_ADPCM_Codec.vhd" 13 -1 0 } } { "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" "" { S_SEVEN_SEGMENT_1_OUT[2] } "NODE_NAME" } }  } 0 0 "Pin %1!s! has %2!s! driving its datain port" 0 0 "" 0 -1} { "Info" "IFIOMGR_BIDIR_OR_OUTPUT_WITH_TRIVIAL_DATAIN_SUB" "S_SEVEN_SEGMENT_1_OUT\[3\] GND " "Info: Pin S_SEVEN_SEGMENT_1_OUT\[3\] has GND driving its datain port" {  } { { "c:/altera/90/quartus/bin/pin_planner.ppl" "" { PinPlanner "c:/altera/90/quartus/bin/pin_planner.ppl" { S_SEVEN_SEGMENT_1_OUT[3] } } } { "c:/altera/90/quartus/bin/Assignment Editor.qase" "" { Assignment "c:/altera/90/quartus/bin/Assignment Editor.qase" 1 { { 0 "S_SEVEN_SEGMENT_1_OUT\[3\]" } } } } { "HD_ADPCM_Codec.vhd" "" { Text "D:/HD_ADPCM/HD_ADPCM_1Bit_Stereo_Decoder/HD_ADPCM_Codec.vhd" 13 -1 0 } } { "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" "" { S_SEVEN_SEGMENT_1_OUT[3] } "NODE_NAME" } }  } 0 0 "Pin %1!s! has %2!s! driving its datain port" 0 0 "" 0 -1} { "Info" "IFIOMGR_BIDIR_OR_OUTPUT_WITH_TRIVIAL_DATAIN_SUB" "S_SEVEN_SEGMENT_1_OUT\[4\] GND " "Info: Pin S_SEVEN_SEGMENT_1_OUT\[4\] has GND driving its datain port" {  } { { "c:/altera/90/quartus/bin/pin_planner.ppl" "" { PinPlanner "c:/altera/90/quartus/bin/pin_planner.ppl" { S_SEVEN_SEGMENT_1_OUT[4] } } } { "c:/altera/90/quartus/bin/Assignment Editor.qase" "" { Assignment "c:/altera/90/quartus/bin/Assignment Editor.qase" 1 { { 0 "S_SEVEN_SEGMENT_1_OUT\[4\]" } } } } { "HD_ADPCM_Codec.vhd" "" { Text "D:/HD_ADPCM/HD_ADPCM_1Bit_Stereo_Decoder/HD_ADPCM_Codec.vhd" 13 -1 0 } } { "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" "" { S_SEVEN_SEGMENT_1_OUT[4] } "NODE_NAME" } }  } 0 0 "Pin %1!s! has %2!s! driving its datain port" 0 0 "" 0 -1} { "Info" "IFIOMGR_BIDIR_OR_OUTPUT_WITH_TRIVIAL_DATAIN_SUB" "S_SEVEN_SEGMENT_1_OUT\[5\] GND " "Info: Pin S_SEVEN_SEGMENT_1_OUT\[5\] has GND driving its datain port" {  } { { "c:/altera/90/quartus/bin/pin_planner.ppl" "" { PinPlanner "c:/altera/90/quartus/bin/pin_planner.ppl" { S_SEVEN_SEGMENT_1_OUT[5] } } } { "c:/altera/90/quartus/bin/Assignment Editor.qase" "" { Assignment "c:/altera/90/quartus/bin/Assignment Editor.qase" 1 { { 0 "S_SEVEN_SEGMENT_1_OUT\[5\]" } } } } { "HD_ADPCM_Codec.vhd" "" { Text "D:/HD_ADPCM/HD_ADPCM_1Bit_Stereo_Decoder/HD_ADPCM_Codec.vhd" 13 -1 0 } } { "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" "" { S_SEVEN_SEGMENT_1_OUT[5] } "NODE_NAME" } }  } 0 0 "Pin %1!s! has %2!s! driving its datain port" 0 0 "" 0 -1} { "Info" "IFIOMGR_BIDIR_OR_OUTPUT_WITH_TRIVIAL_DATAIN_SUB" "S_SEVEN_SEGMENT_1_OUT\[6\] VCC " "Info: Pin S_SEVEN_SEGMENT_1_OUT\[6\] has VCC driving its datain port" {  } { { "c:/altera/90/quartus/bin/pin_planner.ppl" "" { PinPlanner "c:/altera/90/quartus/bin/pin_planner.ppl" { S_SEVEN_SEGMENT_1_OUT[6] } } } { "c:/altera/90/quartus/bin/Assignment Editor.qase" "" { Assignment "c:/altera/90/quartus/bin/Assignment Editor.qase" 1 { { 0 "S_SEVEN_SEGMENT_1_OUT\[6\]" } } } } { "HD_ADPCM_Codec.vhd" "" { Text "D:/HD_ADPCM/HD_ADPCM_1Bit_Stereo_Decoder/HD_ADPCM_Codec.vhd" 13 -1 0 } } { "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" "" { S_SEVEN_SEGMENT_1_OUT[6] } "NODE_NAME" } }  } 0 0 "Pin %1!s! has %2!s! driving its datain port" 0 0 "" 0 -1} { "Info" "IFIOMGR_BIDIR_OR_OUTPUT_WITH_TRIVIAL_DATAIN_SUB" "S_SEVEN_SEGMENT_2_OUT\[0\] GND " "Info: Pin S_SEVEN_SEGMENT_2_OUT\[0\] has GND driving its datain port" {  } { { "c:/altera/90/quartus/bin/pin_planner.ppl" "" { PinPlanner "c:/altera/90/quartus/bin/pin_planner.ppl" { S_SEVEN_SEGMENT_2_OUT[0] } } } { "c:/altera/90/quartus/bin/Assignment Editor.qase" "" { Assignment "c:/altera/90/quartus/bin/Assignment Editor.qase" 1 { { 0 "S_SEVEN_SEGMENT_2_OUT\[0\]" } } } } { "HD_ADPCM_Codec.vhd" "" { Text "D:/HD_ADPCM/HD_ADPCM_1Bit_Stereo_Decoder/HD_ADPCM_Codec.vhd" 14 -1 0 } } { "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" "" { S_SEVEN_SEGMENT_2_OUT[0] } "NODE_NAME" } }  } 0 0 "Pin %1!s! has %2!s! driving its datain port" 0 0 "" 0 -1} { "Info" "IFIOMGR_BIDIR_OR_OUTPUT_WITH_TRIVIAL_DATAIN_SUB" "S_SEVEN_SEGMENT_2_OUT\[1\] GND " "Info: Pin S_SEVEN_SEGMENT_2_OUT\[1\] has GND driving its datain port" {  } { { "c:/altera/90/quartus/bin/pin_planner.ppl" "" { PinPlanner "c:/altera/90/quartus/bin/pin_planner.ppl" { S_SEVEN_SEGMENT_2_OUT[1] } } } { "c:/altera/90/quartus/bin/Assignment Editor.qase" "" { Assignment "c:/altera/90/quartus/bin/Assignment Editor.qase" 1 { { 0 "S_SEVEN_SEGMENT_2_OUT\[1\]" } } } } { "HD_ADPCM_Codec.vhd" "" { Text "D:/HD_ADPCM/HD_ADPCM_1Bit_Stereo_Decoder/HD_ADPCM_Codec.vhd" 14 -1 0 } } { "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" "" { S_SEVEN_SEGMENT_2_OUT[1] } "NODE_NAME" } }  } 0 0 "Pin %1!s! has %2!s! driving its datain port" 0 0 "" 0 -1} { "Info" "IFIOMGR_BIDIR_OR_OUTPUT_WITH_TRIVIAL_DATAIN_SUB" "S_SEVEN_SEGMENT_2_OUT\[2\] GND " "Info: Pin S_SEVEN_SEGMENT_2_OUT\[2\] has GND driving its datain port" {  } { { "c:/altera/90/quartus/bin/pin_planner.ppl" "" { PinPlanner "c:/altera/90/quartus/bin/pin_planner.ppl" { S_SEVEN_SEGMENT_2_OUT[2] } } } { "c:/altera/90/quartus/bin/Assignment Editor.qase" "" { Assignment "c:/altera/90/quartus/bin/Assignment Editor.qase" 1 { { 0 "S_SEVEN_SEGMENT_2_OUT\[2\]" } } } } { "HD_ADPCM_Codec.vhd" "" { Text "D:/HD_ADPCM/HD_ADPCM_1Bit_Stereo_Decoder/HD_ADPCM_Codec.vhd" 14 -1 0 } } { "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" "" { S_SEVEN_SEGMENT_2_OUT[2] } "NODE_NAME" } }  } 0 0 "Pin %1!s! has %2!s! driving its datain port" 0 0 "" 0 -1} { "Info" "IFIOMGR_BIDIR_OR_OUTPUT_WITH_TRIVIAL_DATAIN_SUB" "S_SEVEN_SEGMENT_2_OUT\[3\] GND " "Info: Pin S_SEVEN_SEGMENT_2_OUT\[3\] has GND driving its datain port" {  } { { "c:/altera/90/quartus/bin/pin_planner.ppl" "" { PinPlanner "c:/altera/90/quartus/bin/pin_planner.ppl" { S_SEVEN_SEGMENT_2_OUT[3] } } } { "c:/altera/90/quartus/bin/Assignment Editor.qase" "" { Assignment "c:/altera/90/quartus/bin/Assignment Editor.qase" 1 { { 0 "S_SEVEN_SEGMENT_2_OUT\[3\]" } } } } { "HD_ADPCM_Codec.vhd" "" { Text "D:/HD_ADPCM/HD_ADPCM_1Bit_Stereo_Decoder/HD_ADPCM_Codec.vhd" 14 -1 0 } } { "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" "" { S_SEVEN_SEGMENT_2_OUT[3] } "NODE_NAME" } }  } 0 0 "Pin %1!s! has %2!s! driving its datain port" 0 0 "" 0 -1} { "Info" "IFIOMGR_BIDIR_OR_OUTPUT_WITH_TRIVIAL_DATAIN_SUB" "S_SEVEN_SEGMENT_2_OUT\[4\] GND " "Info: Pin S_SEVEN_SEGMENT_2_OUT\[4\] has GND driving its datain port" {  } { { "c:/altera/90/quartus/bin/pin_planner.ppl" "" { PinPlanner "c:/altera/90/quartus/bin/pin_planner.ppl" { S_SEVEN_SEGMENT_2_OUT[4] } } } { "c:/altera/90/quartus/bin/Assignment Editor.qase" "" { Assignment "c:/altera/90/quartus/bin/Assignment Editor.qase" 1 { { 0 "S_SEVEN_SEGMENT_2_OUT\[4\]" } } } } { "HD_ADPCM_Codec.vhd" "" { Text "D:/HD_ADPCM/HD_ADPCM_1Bit_Stereo_Decoder/HD_ADPCM_Codec.vhd" 14 -1 0 } } { "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" "" { S_SEVEN_SEGMENT_2_OUT[4] } "NODE_NAME" } }  } 0 0 "Pin %1!s! has %2!s! driving its datain port" 0 0 "" 0 -1} { "Info" "IFIOMGR_BIDIR_OR_OUTPUT_WITH_TRIVIAL_DATAIN_SUB" "S_SEVEN_SEGMENT_2_OUT\[5\] GND " "Info: Pin S_SEVEN_SEGMENT_2_OUT\[5\] has GND driving its datain port" {  } { { "c:/altera/90/quartus/bin/pin_planner.ppl" "" { PinPlanner "c:/altera/90/quartus/bin/pin_planner.ppl" { S_SEVEN_SEGMENT_2_OUT[5] } } } { "c:/altera/90/quartus/bin/Assignment Editor.qase" "" { Assignment "c:/altera/90/quartus/bin/Assignment Editor.qase" 1 { { 0 "S_SEVEN_SEGMENT_2_OUT\[5\]" } } } } { "HD_ADPCM_Codec.vhd" "" { Text "D:/HD_ADPCM/HD_ADPCM_1Bit_Stereo_Decoder/HD_ADPCM_Codec.vhd" 14 -1 0 } } { "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" "" { S_SEVEN_SEGMENT_2_OUT[5] } "NODE_NAME" } }  } 0 0 "Pin %1!s! has %2!s! driving its datain port" 0 0 "" 0 -1} { "Info" "IFIOMGR_BIDIR_OR_OUTPUT_WITH_TRIVIAL_DATAIN_SUB" "S_SEVEN_SEGMENT_2_OUT\[6\] VCC " "Info: Pin S_SEVEN_SEGMENT_2_OUT\[6\] has VCC driving its datain port" {  } { { "c:/altera/90/quartus/bin/pin_planner.ppl" "" { PinPlanner "c:/altera/90/quartus/bin/pin_planner.ppl" { S_SEVEN_SEGMENT_2_OUT[6] } } } { "c:/altera/90/quartus/bin/Assignment Editor.qase" "" { Assignment "c:/altera/90/quartus/bin/Assignment Editor.qase" 1 { { 0 "S_SEVEN_SEGMENT_2_OUT\[6\]" } } } } { "HD_ADPCM_Codec.vhd" "" { Text "D:/HD_ADPCM/HD_ADPCM_1Bit_Stereo_Decoder/HD_ADPCM_Codec.vhd" 14 -1 0 } } { "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" "" { S_SEVEN_SEGMENT_2_OUT[6] } "NODE_NAME" } }  } 0 0 "Pin %1!s! has %2!s! driving its datain port" 0 0 "" 0 -1} { "Info" "IFIOMGR_BIDIR_OR_OUTPUT_WITH_TRIVIAL_DATAIN_SUB" "S_SEVEN_SEGMENT_3_OUT\[0\] GND " "Info: Pin S_SEVEN_SEGMENT_3_OUT\[0\] has GND driving its datain port" {  } { { "c:/altera/90/quartus/bin/pin_planner.ppl" "" { PinPlanner "c:/altera/90/quartus/bin/pin_planner.ppl" { S_SEVEN_SEGMENT_3_OUT[0] } } } { "c:/altera/90/quartus/bin/Assignment Editor.qase" "" { Assignment "c:/altera/90/quartus/bin/Assignment Editor.qase" 1 { { 0 "S_SEVEN_SEGMENT_3_OUT\[0\]" } } } } { "HD_ADPCM_Codec.vhd" "" { Text "D:/HD_ADPCM/HD_ADPCM_1Bit_Stereo_Decoder/HD_ADPCM_Codec.vhd" 15 -1 0 } } { "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" "" { S_SEVEN_SEGMENT_3_OUT[0] } "NODE_NAME" } }  } 0 0 "Pin %1!s! has %2!s! driving its datain port" 0 0 "" 0 -1} { "Info" "IFIOMGR_BIDIR_OR_OUTPUT_WITH_TRIVIAL_DATAIN_SUB" "S_SEVEN_SEGMENT_3_OUT\[1\] GND " "Info: Pin S_SEVEN_SEGMENT_3_OUT\[1\] has GND driving its datain port" {  } { { "c:/altera/90/quartus/bin/pin_planner.ppl" "" { PinPlanner "c:/altera/90/quartus/bin/pin_planner.ppl" { S_SEVEN_SEGMENT_3_OUT[1] } } } { "c:/altera/90/quartus/bin/Assignment Editor.qase" "" { Assignment "c:/altera/90/quartus/bin/Assignment Editor.qase" 1 { { 0 "S_SEVEN_SEGMENT_3_OUT\[1\]" } } } } { "HD_ADPCM_Codec.vhd" "" { Text "D:/HD_ADPCM/HD_ADPCM_1Bit_Stereo_Decoder/HD_ADPCM_Codec.vhd" 15 -1 0 } } { "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" "" { S_SEVEN_SEGMENT_3_OUT[1] } "NODE_NAME" } }  } 0 0 "Pin %1!s! has %2!s! driving its datain port" 0 0 "" 0 -1} { "Info" "IFIOMGR_BIDIR_OR_OUTPUT_WITH_TRIVIAL_DATAIN_SUB" "S_SEVEN_SEGMENT_3_OUT\[2\] GND " "Info: Pin S_SEVEN_SEGMENT_3_OUT\[2\] has GND driving its datain port" {  } { { "c:/altera/90/quartus/bin/pin_planner.ppl" "" { PinPlanner "c:/altera/90/quartus/bin/pin_planner.ppl" { S_SEVEN_SEGMENT_3_OUT[2] } } } { "c:/altera/90/quartus/bin/Assignment Editor.qase" "" { Assignment "c:/altera/90/quartus/bin/Assignment Editor.qase" 1 { { 0 "S_SEVEN_SEGMENT_3_OUT\[2\]" } } } } { "HD_ADPCM_Codec.vhd" "" { Text "D:/HD_ADPCM/HD_ADPCM_1Bit_Stereo_Decoder/HD_ADPCM_Codec.vhd" 15 -1 0 } } { "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" "" { S_SEVEN_SEGMENT_3_OUT[2] } "NODE_NAME" } }  } 0 0 "Pin %1!s! has %2!s! driving its datain port" 0 0 "" 0 -1} { "Info" "IFIOMGR_BIDIR_OR_OUTPUT_WITH_TRIVIAL_DATAIN_SUB" "S_SEVEN_SEGMENT_3_OUT\[3\] GND " "Info: Pin S_SEVEN_SEGMENT_3_OUT\[3\] has GND driving its datain port" {  } { { "c:/altera/90/quartus/bin/pin_planner.ppl" "" { PinPlanner "c:/altera/90/quartus/bin/pin_planner.ppl" { S_SEVEN_SEGMENT_3_OUT[3] } } } { "c:/altera/90/quartus/bin/Assignment Editor.qase" "" { Assignment "c:/altera/90/quartus/bin/Assignment Editor.qase" 1 { { 0 "S_SEVEN_SEGMENT_3_OUT\[3\]" } } } } { "HD_ADPCM_Codec.vhd" "" { Text "D:/HD_ADPCM/HD_ADPCM_1Bit_Stereo_Decoder/HD_ADPCM_Codec.vhd" 15 -1 0 } } { "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" "" { S_SEVEN_SEGMENT_3_OUT[3] } "NODE_NAME" } }  } 0 0 "Pin %1!s! has %2!s! driving its datain port" 0 0 "" 0 -1} { "Info" "IFIOMGR_BIDIR_OR_OUTPUT_WITH_TRIVIAL_DATAIN_SUB" "S_SEVEN_SEGMENT_3_OUT\[4\] GND " "Info: Pin S_SEVEN_SEGMENT_3_OUT\[4\] has GND driving its datain port" {  } { { "c:/altera/90/quartus/bin/pin_planner.ppl" "" { PinPlanner "c:/altera/90/quartus/bin/pin_planner.ppl" { S_SEVEN_SEGMENT_3_OUT[4] } } } { "c:/altera/90/quartus/bin/Assignment Editor.qase" "" { Assignment "c:/altera/90/quartus/bin/Assignment Editor.qase" 1 { { 0 "S_SEVEN_SEGMENT_3_OUT\[4\]" } } } } { "HD_ADPCM_Codec.vhd" "" { Text "D:/HD_ADPCM/HD_ADPCM_1Bit_Stereo_Decoder/HD_ADPCM_Codec.vhd" 15 -1 0 } } { "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" "" { S_SEVEN_SEGMENT_3_OUT[4] } "NODE_NAME" } }  } 0 0 "Pin %1!s! has %2!s! driving its datain port" 0 0 "" 0 -1} { "Info" "IFIOMGR_BIDIR_OR_OUTPUT_WITH_TRIVIAL_DATAIN_SUB" "S_SEVEN_SEGMENT_3_OUT\[5\] GND " "Info: Pin S_SEVEN_SEGMENT_3_OUT\[5\] has GND driving its datain port" {  } { { "c:/altera/90/quartus/bin/pin_planner.ppl" "" { PinPlanner "c:/altera/90/quartus/bin/pin_planner.ppl" { S_SEVEN_SEGMENT_3_OUT[5] } } } { "c:/altera/90/quartus/bin/Assignment Editor.qase" "" { Assignment "c:/altera/90/quartus/bin/Assignment Editor.qase" 1 { { 0 "S_SEVEN_SEGMENT_3_OUT\[5\]" } } } } { "HD_ADPCM_Codec.vhd" "" { Text "D:/HD_ADPCM/HD_ADPCM_1Bit_Stereo_Decoder/HD_ADPCM_Codec.vhd" 15 -1 0 } } { "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" "" { S_SEVEN_SEGMENT_3_OUT[5] } "NODE_NAME" } }  } 0 0 "Pin %1!s! has %2!s! driving its datain port" 0 0 "" 0 -1} { "Info" "IFIOMGR_BIDIR_OR_OUTPUT_WITH_TRIVIAL_DATAIN_SUB" "S_SEVEN_SEGMENT_3_OUT\[6\] VCC " "Info: Pin S_SEVEN_SEGMENT_3_OUT\[6\] has VCC driving its datain port" {  } { { "c:/altera/90/quartus/bin/pin_planner.ppl" "" { PinPlanner "c:/altera/90/quartus/bin/pin_planner.ppl" { S_SEVEN_SEGMENT_3_OUT[6] } } } { "c:/altera/90/quartus/bin/Assignment Editor.qase" "" { Assignment "c:/altera/90/quartus/bin/Assignment Editor.qase" 1 { { 0 "S_SEVEN_SEGMENT_3_OUT\[6\]" } } } } { "HD_ADPCM_Codec.vhd" "" { Text "D:/HD_ADPCM/HD_ADPCM_1Bit_Stereo_Decoder/HD_ADPCM_Codec.vhd" 15 -1 0 } } { "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" "" { S_SEVEN_SEGMENT_3_OUT[6] } "NODE_NAME" } }  } 0 0 "Pin %1!s! has %2!s! driving its datain port" 0 0 "" 0 -1} { "Info" "IFIOMGR_BIDIR_OR_OUTPUT_WITH_TRIVIAL_DATAIN_SUB" "S_SEVEN_SEGMENT_4_OUT\[0\] GND " "Info: Pin S_SEVEN_SEGMENT_4_OUT\[0\] has GND driving its datain port" {  } { { "c:/altera/90/quartus/bin/pin_planner.ppl" "" { PinPlanner "c:/altera/90/quartus/bin/pin_planner.ppl" { S_SEVEN_SEGMENT_4_OUT[0] } } } { "c:/altera/90/quartus/bin/Assignment Editor.qase" "" { Assignment "c:/altera/90/quartus/bin/Assignment Editor.qase" 1 { { 0 "S_SEVEN_SEGMENT_4_OUT\[0\]" } } } } { "HD_ADPCM_Codec.vhd" "" { Text "D:/HD_ADPCM/HD_ADPCM_1Bit_Stereo_Decoder/HD_ADPCM_Codec.vhd" 16 -1 0 } } { "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" "" { S_SEVEN_SEGMENT_4_OUT[0] } "NODE_NAME" } }  } 0 0 "Pin %1!s! has %2!s! driving its datain port" 0 0 "" 0 -1} { "Info" "IFIOMGR_BIDIR_OR_OUTPUT_WITH_TRIVIAL_DATAIN_SUB" "S_SEVEN_SEGMENT_4_OUT\[1\] GND " "Info: Pin S_SEVEN_SEGMENT_4_OUT\[1\] has GND driving its datain port" {  } { { "c:/altera/90/quartus/bin/pin_planner.ppl" "" { PinPlanner "c:/altera/90/quartus/bin/pin_planner.ppl" { S_SEVEN_SEGMENT_4_OUT[1] } } } { "c:/altera/90/quartus/bin/Assignment Editor.qase" "" { Assignment "c:/altera/90/quartus/bin/Assignment Editor.qase" 1 { { 0 "S_SEVEN_SEGMENT_4_OUT\[1\]" } } } } { "HD_ADPCM_Codec.vhd" "" { Text "D:/HD_ADPCM/HD_ADPCM_1Bit_Stereo_Decoder/HD_ADPCM_Codec.vhd" 16 -1 0 } } { "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" "" { S_SEVEN_SEGMENT_4_OUT[1] } "NODE_NAME" } }  } 0 0 "Pin %1!s! has %2!s! driving its datain port" 0 0 "" 0 -1} { "Info" "IFIOMGR_BIDIR_OR_OUTPUT_WITH_TRIVIAL_DATAIN_SUB" "S_SEVEN_SEGMENT_4_OUT\[2\] GND " "Info: Pin S_SEVEN_SEGMENT_4_OUT\[2\] has GND driving its datain port" {  } { { "c:/altera/90/quartus/bin/pin_planner.ppl" "" { PinPlanner "c:/altera/90/quartus/bin/pin_planner.ppl" { S_SEVEN_SEGMENT_4_OUT[2] } } } { "c:/altera/90/quartus/bin/Assignment Editor.qase" "" { Assignment "c:/altera/90/quartus/bin/Assignment Editor.qase" 1 { { 0 "S_SEVEN_SEGMENT_4_OUT\[2\]" } } } } { "HD_ADPCM_Codec.vhd" "" { Text "D:/HD_ADPCM/HD_ADPCM_1Bit_Stereo_Decoder/HD_ADPCM_Codec.vhd" 16 -1 0 } } { "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" "" { S_SEVEN_SEGMENT_4_OUT[2] } "NODE_NAME" } }  } 0 0 "Pin %1!s! has %2!s! driving its datain port" 0 0 "" 0 -1} { "Info" "IFIOMGR_BIDIR_OR_OUTPUT_WITH_TRIVIAL_DATAIN_SUB" "S_SEVEN_SEGMENT_4_OUT\[3\] GND " "Info: Pin S_SEVEN_SEGMENT_4_OUT\[3\] has GND driving its datain port" {  } { { "c:/altera/90/quartus/bin/pin_planner.ppl" "" { PinPlanner "c:/altera/90/quartus/bin/pin_planner.ppl" { S_SEVEN_SEGMENT_4_OUT[3] } } } { "c:/altera/90/quartus/bin/Assignment Editor.qase" "" { Assignment "c:/altera/90/quartus/bin/Assignment Editor.qase" 1 { { 0 "S_SEVEN_SEGMENT_4_OUT\[3\]" } } } } { "HD_ADPCM_Codec.vhd" "" { Text "D:/HD_ADPCM/HD_ADPCM_1Bit_Stereo_Decoder/HD_ADPCM_Codec.vhd" 16 -1 0 } } { "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" "" { S_SEVEN_SEGMENT_4_OUT[3] } "NODE_NAME" } }  } 0 0 "Pin %1!s! has %2!s! driving its datain port" 0 0 "" 0 -1} { "Info" "IFIOMGR_BIDIR_OR_OUTPUT_WITH_TRIVIAL_DATAIN_SUB" "S_SEVEN_SEGMENT_4_OUT\[4\] GND " "Info: Pin S_SEVEN_SEGMENT_4_OUT\[4\] has GND driving its datain port" {  } { { "c:/altera/90/quartus/bin/pin_planner.ppl" "" { PinPlanner "c:/altera/90/quartus/bin/pin_planner.ppl" { S_SEVEN_SEGMENT_4_OUT[4] } } } { "c:/altera/90/quartus/bin/Assignment Editor.qase" "" { Assignment "c:/altera/90/quartus/bin/Assignment Editor.qase" 1 { { 0 "S_SEVEN_SEGMENT_4_OUT\[4\]" } } } } { "HD_ADPCM_Codec.vhd" "" { Text "D:/HD_ADPCM/HD_ADPCM_1Bit_Stereo_Decoder/HD_ADPCM_Codec.vhd" 16 -1 0 } } { "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" "" { S_SEVEN_SEGMENT_4_OUT[4] } "NODE_NAME" } }  } 0 0 "Pin %1!s! has %2!s! driving its datain port" 0 0 "" 0 -1} { "Info" "IFIOMGR_BIDIR_OR_OUTPUT_WITH_TRIVIAL_DATAIN_SUB" "S_SEVEN_SEGMENT_4_OUT\[5\] GND " "Info: Pin S_SEVEN_SEGMENT_4_OUT\[5\] has GND driving its datain port" {  } { { "c:/altera/90/quartus/bin/pin_planner.ppl" "" { PinPlanner "c:/altera/90/quartus/bin/pin_planner.ppl" { S_SEVEN_SEGMENT_4_OUT[5] } } } { "c:/altera/90/quartus/bin/Assignment Editor.qase" "" { Assignment "c:/altera/90/quartus/bin/Assignment Editor.qase" 1 { { 0 "S_SEVEN_SEGMENT_4_OUT\[5\]" } } } } { "HD_ADPCM_Codec.vhd" "" { Text "D:/HD_ADPCM/HD_ADPCM_1Bit_Stereo_Decoder/HD_ADPCM_Codec.vhd" 16 -1 0 } } { "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" "" { S_SEVEN_SEGMENT_4_OUT[5] } "NODE_NAME" } }  } 0 0 "Pin %1!s! has %2!s! driving its datain port" 0 0 "" 0 -1} { "Info" "IFIOMGR_BIDIR_OR_OUTPUT_WITH_TRIVIAL_DATAIN_SUB" "S_SEVEN_SEGMENT_4_OUT\[6\] VCC " "Info: Pin S_SEVEN_SEGMENT_4_OUT\[6\] has VCC driving its datain port" {  } { { "c:/altera/90/quartus/bin/pin_planner.ppl" "" { PinPlanner "c:/altera/90/quartus/bin/pin_planner.ppl" { S_SEVEN_SEGMENT_4_OUT[6] } } } { "c:/altera/90/quartus/bin/Assignment Editor.qase" "" { Assignment "c:/altera/90/quartus/bin/Assignment Editor.qase" 1 { { 0 "S_SEVEN_SEGMENT_4_OUT\[6\]" } } } } { "HD_ADPCM_Codec.vhd" "" { Text "D:/HD_ADPCM/HD_ADPCM_1Bit_Stereo_Decoder/HD_ADPCM_Codec.vhd" 16 -1 0 } } { "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" "" { S_SEVEN_SEGMENT_4_OUT[6] } "NODE_NAME" } }  } 0 0 "Pin %1!s! has %2!s! driving its datain port" 0 0 "" 0 -1} { "Info" "IFIOMGR_BIDIR_OR_OUTPUT_WITH_TRIVIAL_DATAIN_SUB" "FLASH_MEMORY_nWE_OUT VCC " "Info: Pin FLASH_MEMORY_nWE_OUT has VCC driving its datain port" {  } { { "c:/altera/90/quartus/bin/pin_planner.ppl" "" { PinPlanner "c:/altera/90/quartus/bin/pin_planner.ppl" { FLASH_MEMORY_nWE_OUT } } } { "c:/altera/90/quartus/bin/Assignment Editor.qase" "" { Assignment "c:/altera/90/quartus/bin/Assignment Editor.qase" 1 { { 0 "FLASH_MEMORY_nWE_OUT" } } } } { "HD_ADPCM_Codec.vhd" "" { Text "D:/HD_ADPCM/HD_ADPCM_1Bit_Stereo_Decoder/HD_ADPCM_Codec.vhd" 29 -1 0 } } { "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" "" { FLASH_MEMORY_nWE_OUT } "NODE_NAME" } }  } 0 0 "Pin %1!s! has %2!s! driving its datain port" 0 0 "" 0 -1} { "Info" "IFIOMGR_BIDIR_OR_OUTPUT_WITH_TRIVIAL_DATAIN_SUB" "FLASH_MEMORY_nRESET_OUT VCC " "Info: Pin FLASH_MEMORY_nRESET_OUT has VCC driving its datain port" {  } { { "c:/altera/90/quartus/bin/pin_planner.ppl" "" { PinPlanner "c:/altera/90/quartus/bin/pin_planner.ppl" { FLASH_MEMORY_nRESET_OUT } } } { "c:/altera/90/quartus/bin/Assignment Editor.qase" "" { Assignment "c:/altera/90/quartus/bin/Assignment Editor.qase" 1 { { 0 "FLASH_MEMORY_nRESET_OUT" } } } } { "HD_ADPCM_Codec.vhd" "" { Text "D:/HD_ADPCM/HD_ADPCM_1Bit_Stereo_Decoder/HD_ADPCM_Codec.vhd" 31 -1 0 } } { "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" "" { FLASH_MEMORY_nRESET_OUT } "NODE_NAME" } }  } 0 0 "Pin %1!s! has %2!s! driving its datain port" 0 0 "" 0 -1}  } {  } 0 0 "Following %1!d! pins have nothing, GND, or VCC driving datain port -- changes to this connectivity may change fitting results" 0 0 "" 0 -1}
82 
{ "Info" "IQEXE_ERROR_COUNT" "Fitter 0 s 4 s Quartus II " "Info: Quartus II Fitter was successful. 0 errors, 4 warnings" { { "Info" "IQEXE_END_PEAK_VSIZE_MEMORY" "211 " "Info: Peak virtual memory: 211 megabytes" {  } {  } 0 0 "Peak virtual memory: %1!s! megabytes" 0 0 "" 0 -1} { "Info" "IQEXE_END_BANNER_TIME" "Tue May 11 23:47:47 2010 " "Info: Processing ended: Tue May 11 23:47:47 2010" {  } {  } 0 0 "Processing ended: %1!s!" 0 0 "" 0 -1} { "Info" "IQEXE_ELAPSED_TIME" "00:00:19 " "Info: Elapsed time: 00:00:19" {  } {  } 0 0 "Elapsed time: %1!s!" 0 0 "" 0 -1} { "Info" "IQEXE_ELAPSED_CPU_TIME" "00:00:19 " "Info: Total CPU time (on all processors): 00:00:19" {  } {  } 0 0 "Total CPU time (on all processors): %1!s!" 0 0 "" 0 -1}  } {  } 0 0 "%6!s! %1!s! was successful. %2!d! error%3!s!, %4!d! warning%5!s!" 0 0 "" 0 -1}
83 
{ "Info" "IQEXE_SEPARATOR" "" "Info: *******************************************************************" {  } {  } 3 0 "*******************************************************************" 0 0 "" 0 -1}
84 
{ "Info" "IQEXE_START_BANNER_PRODUCT" "Assembler Quartus II " "Info: Running Quartus II Assembler" { { "Info" "IQEXE_START_BANNER_VERSION" "Version 9.0 Build 132 02/25/2009 SJ Web Edition " "Info: Version 9.0 Build 132 02/25/2009 SJ Web Edition" {  } {  } 0 0 "%1!s!" 0 0 "" 0 -1} { "Info" "IQEXE_START_BANNER_TIME" "Tue May 11 23:47:48 2010 " "Info: Processing started: Tue May 11 23:47:48 2010" {  } {  } 0 0 "Processing started: %1!s!" 0 0 "" 0 -1}  } {  } 4 0 "Running %2!s! %1!s!" 0 0 "" 0 -1}
85 
{ "Info" "IQEXE_START_BANNER_COMMANDLINE" "quartus_asm --read_settings_files=off --write_settings_files=off HD_ADPCM_Codec -c HD_ADPCM_Codec " "Info: Command: quartus_asm --read_settings_files=off --write_settings_files=off HD_ADPCM_Codec -c HD_ADPCM_Codec" {  } {  } 0 0 "Command: %1!s!" 0 0 "" 0 -1}
86 
{ "Info" "IASM_ASM_GENERATING_POWER_DATA" "" "Info: Writing out detailed assembly data for power analysis" {  } {  } 0 0 "Writing out detailed assembly data for power analysis" 0 0 "" 0 -1}
87 
{ "Info" "IASM_ASM_GENERATING_PROGRAMMING_FILES" "" "Info: Assembler is generating device programming files" {  } {  } 0 0 "Assembler is generating device programming files" 0 0 "" 0 -1}
88 
{ "Info" "IQEXE_ERROR_COUNT" "Assembler 0 s 0 s Quartus II " "Info: Quartus II Assembler was successful. 0 errors, 0 warnings" { { "Info" "IQEXE_END_PEAK_VSIZE_MEMORY" "189 " "Info: Peak virtual memory: 189 megabytes" {  } {  } 0 0 "Peak virtual memory: %1!s! megabytes" 0 0 "" 0 -1} { "Info" "IQEXE_END_BANNER_TIME" "Tue May 11 23:47:54 2010 " "Info: Processing ended: Tue May 11 23:47:54 2010" {  } {  } 0 0 "Processing ended: %1!s!" 0 0 "" 0 -1} { "Info" "IQEXE_ELAPSED_TIME" "00:00:06 " "Info: Elapsed time: 00:00:06" {  } {  } 0 0 "Elapsed time: %1!s!" 0 0 "" 0 -1} { "Info" "IQEXE_ELAPSED_CPU_TIME" "00:00:06 " "Info: Total CPU time (on all processors): 00:00:06" {  } {  } 0 0 "Total CPU time (on all processors): %1!s!" 0 0 "" 0 -1}  } {  } 0 0 "%6!s! %1!s! was successful. %2!d! error%3!s!, %4!d! warning%5!s!" 0 0 "" 0 -1}
89 
{ "Info" "IQEXE_SEPARATOR" "" "Info: *******************************************************************" {  } {  } 3 0 "*******************************************************************" 0 0 "" 0 -1}
90 
{ "Info" "IQEXE_START_BANNER_PRODUCT" "Classic Timing Analyzer Quartus II " "Info: Running Quartus II Classic Timing Analyzer" { { "Info" "IQEXE_START_BANNER_VERSION" "Version 9.0 Build 132 02/25/2009 SJ Web Edition " "Info: Version 9.0 Build 132 02/25/2009 SJ Web Edition" {  } {  } 0 0 "%1!s!" 0 0 "" 0 -1} { "Info" "IQEXE_START_BANNER_TIME" "Tue May 11 23:47:56 2010 " "Info: Processing started: Tue May 11 23:47:56 2010" {  } {  } 0 0 "Processing started: %1!s!" 0 0 "" 0 -1}  } {  } 4 0 "Running %2!s! %1!s!" 0 0 "" 0 -1}
91 
{ "Info" "IQEXE_START_BANNER_COMMANDLINE" "quartus_tan --read_settings_files=off --write_settings_files=off HD_ADPCM_Codec -c HD_ADPCM_Codec --timing_analysis_only " "Info: Command: quartus_tan --read_settings_files=off --write_settings_files=off HD_ADPCM_Codec -c HD_ADPCM_Codec --timing_analysis_only" {  } {  } 0 0 "Command: %1!s!" 0 0 "" 0 -1}
92 
{ "Warning" "WTAN_NO_CLOCKS" "" "Warning: Found pins functioning as undefined clocks and/or memory enables" { { "Info" "ITAN_NODE_MAP_TO_CLK" "CLOCK_IN " "Info: Assuming node \"CLOCK_IN\" is an undefined clock" {  } { { "HD_ADPCM_Codec.vhd" "" { Text "D:/HD_ADPCM/HD_ADPCM_1Bit_Stereo_Decoder/HD_ADPCM_Codec.vhd" 12 -1 0 } } { "c:/altera/90/quartus/bin/Assignment Editor.qase" "" { Assignment "c:/altera/90/quartus/bin/Assignment Editor.qase" 1 { { 0 "CLOCK_IN" } } } }  } 0 0 "Assuming node \"%1!s!\" is an undefined clock" 0 0 "" 0 -1}  } {  } 0 0 "Found pins functioning as undefined clocks and/or memory enables" 0 0 "" 0 -1}
93 
{ "Warning" "WTAN_RIPPLE_OR_GATED_CLOCKS_FOUND" "4 " "Warning: Found 4 node(s) in clock paths which may be acting as ripple and/or gated clocks -- node(s) analyzed as buffer(s) resulting in clock skew" { { "Info" "ITAN_RIPPLE_CLK" "Flash_Memory_Driver:u4\|Flash_Memory_Clock " "Info: Detected ripple clock \"Flash_Memory_Driver:u4\|Flash_Memory_Clock\" as buffer" {  } { { "HD_ADPCM_Codec.vhd" "" { Text "D:/HD_ADPCM/HD_ADPCM_1Bit_Stereo_Decoder/HD_ADPCM_Codec.vhd" 832 -1 0 } } { "c:/altera/90/quartus/bin/Assignment Editor.qase" "" { Assignment "c:/altera/90/quartus/bin/Assignment Editor.qase" 1 { { 0 "Flash_Memory_Driver:u4\|Flash_Memory_Clock" } } } }  } 0 0 "Detected ripple clock \"%1!s!\" as buffer" 0 0 "" 0 -1} { "Info" "ITAN_RIPPLE_CLK" "I2S_ACTIVE_IN " "Info: Detected ripple clock \"I2S_ACTIVE_IN\" as buffer" {  } { { "HD_ADPCM_Codec.vhd" "" { Text "D:/HD_ADPCM/HD_ADPCM_1Bit_Stereo_Decoder/HD_ADPCM_Codec.vhd" 153 -1 0 } } { "c:/altera/90/quartus/bin/Assignment Editor.qase" "" { Assignment "c:/altera/90/quartus/bin/Assignment Editor.qase" 1 { { 0 "I2S_ACTIVE_IN" } } } }  } 0 0 "Detected ripple clock \"%1!s!\" as buffer" 0 0 "" 0 -1} { "Info" "ITAN_RIPPLE_CLK" "I2S_Driver:u3\|I2S_Clock " "Info: Detected ripple clock \"I2S_Driver:u3\|I2S_Clock\" as buffer" {  } { { "HD_ADPCM_Codec.vhd" "" { Text "D:/HD_ADPCM/HD_ADPCM_1Bit_Stereo_Decoder/HD_ADPCM_Codec.vhd" 754 -1 0 } } { "c:/altera/90/quartus/bin/Assignment Editor.qase" "" { Assignment "c:/altera/90/quartus/bin/Assignment Editor.qase" 1 { { 0 "I2S_Driver:u3\|I2S_Clock" } } } }  } 0 0 "Detected ripple clock \"%1!s!\" as buffer" 0 0 "" 0 -1} { "Info" "ITAN_RIPPLE_CLK" "I2S_Driver:u3\|I2S_PCM_DATA_ACCESS_OUT " "Info: Detected ripple clock \"I2S_Driver:u3\|I2S_PCM_DATA_ACCESS_OUT\" as buffer" {  } { { "HD_ADPCM_Codec.vhd" "" { Text "D:/HD_ADPCM/HD_ADPCM_1Bit_Stereo_Decoder/HD_ADPCM_Codec.vhd" 690 -1 0 } } { "c:/altera/90/quartus/bin/Assignment Editor.qase" "" { Assignment "c:/altera/90/quartus/bin/Assignment Editor.qase" 1 { { 0 "I2S_Driver:u3\|I2S_PCM_DATA_ACCESS_OUT" } } } }  } 0 0 "Detected ripple clock \"%1!s!\" as buffer" 0 0 "" 0 -1}  } {  } 0 0 "Found %1!d! node(s) in clock paths which may be acting as ripple and/or gated clocks -- node(s) analyzed as buffer(s) resulting in clock skew" 0 0 "" 0 -1}
94 
{ "Info" "ITDB_FULL_CLOCK_REG_RESULT" "CLOCK_IN register ADPCM_Decoder_1_Bit:u6\|ADPCM_Decoder_Step_Size_Table_Pointer\[0\] register ADPCM_Decoder_1_Bit:u6\|PCM_Data_Difference\[0\] 21.79 MHz 45.9 ns Internal " "Info: Clock \"CLOCK_IN\" has Internal fmax of 21.79 MHz between source register \"ADPCM_Decoder_1_Bit:u6\|ADPCM_Decoder_Step_Size_Table_Pointer\[0\]\" and destination register \"ADPCM_Decoder_1_Bit:u6\|PCM_Data_Difference\[0\]\" (period= 45.9 ns)" { { "Info" "ITDB_FULL_DATA_PATH_RESULT" "45.719 ns + Longest register register " "Info: + Longest register to register delay is 45.719 ns" { { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.000 ns) 0.000 ns ADPCM_Decoder_1_Bit:u6\|ADPCM_Decoder_Step_Size_Table_Pointer\[0\] 1 REG DSPMULT_X28_Y17_N0 20 " "Info: 1: + IC(0.000 ns) + CELL(0.000 ns) = 0.000 ns; Loc. = DSPMULT_X28_Y17_N0; Fanout = 20; REG Node = 'ADPCM_Decoder_1_Bit:u6\|ADPCM_Decoder_Step_Size_Table_Pointer\[0\]'" {  } { { "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" "" { ADPCM_Decoder_1_Bit:u6|ADPCM_Decoder_Step_Size_Table_Pointer[0] } "NODE_NAME" } } { "HD_ADPCM_Codec.vhd" "" { Text "D:/HD_ADPCM/HD_ADPCM_1Bit_Stereo_Decoder/HD_ADPCM_Codec.vhd" 943 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 -1} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(3.257 ns) 3.257 ns ADPCM_Decoder_1_Bit:u6\|lpm_mult:Mult0\|mult_pu01:auto_generated\|mac_mult1~DATAOUT15 2 COMB DSPMULT_X28_Y17_N0 1 " "Info: 2: + IC(0.000 ns) + CELL(3.257 ns) = 3.257 ns; Loc. = DSPMULT_X28_Y17_N0; Fanout = 1; COMB Node = 'ADPCM_Decoder_1_Bit:u6\|lpm_mult:Mult0\|mult_pu01:auto_generated\|mac_mult1~DATAOUT15'" {  } { { "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" "3.257 ns" { ADPCM_Decoder_1_Bit:u6|ADPCM_Decoder_Step_Size_Table_Pointer[0] ADPCM_Decoder_1_Bit:u6|lpm_mult:Mult0|mult_pu01:auto_generated|mac_mult1~DATAOUT15 } "NODE_NAME" } } { "db/mult_pu01.tdf" "" { Text "D:/HD_ADPCM/HD_ADPCM_1Bit_Stereo_Decoder/db/mult_pu01.tdf" 35 2 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 -1} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.304 ns) 3.561 ns ADPCM_Decoder_1_Bit:u6\|lpm_mult:Mult0\|mult_pu01:auto_generated\|mac_out2~DATAOUT15 3 COMB DSPOUT_X28_Y17_N2 4 " "Info: 3: + IC(0.000 ns) + CELL(0.304 ns) = 3.561 ns; Loc. = DSPOUT_X28_Y17_N2; Fanout = 4; COMB Node = 'ADPCM_Decoder_1_Bit:u6\|lpm_mult:Mult0\|mult_pu01:auto_generated\|mac_out2~DATAOUT15'" {  } { { "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" "0.304 ns" { ADPCM_Decoder_1_Bit:u6|lpm_mult:Mult0|mult_pu01:auto_generated|mac_mult1~DATAOUT15 ADPCM_Decoder_1_Bit:u6|lpm_mult:Mult0|mult_pu01:auto_generated|mac_out2~DATAOUT15 } "NODE_NAME" } } { "db/mult_pu01.tdf" "" { Text "D:/HD_ADPCM/HD_ADPCM_1Bit_Stereo_Decoder/db/mult_pu01.tdf" 44 2 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 -1} { "Info" "ITDB_NODE_DELAY" "IC(0.777 ns) + CELL(0.495 ns) 4.833 ns ADPCM_Decoder_1_Bit:u6\|lpm_divide:Div0\|lpm_divide_aem:auto_generated\|sign_div_unsign_klh:divider\|alt_u_div_e2f:divider\|add_sub_6_result_int\[2\]~1 4 COMB LCCOMB_X30_Y17_N2 2 " "Info: 4: + IC(0.777 ns) + CELL(0.495 ns) = 4.833 ns; Loc. = LCCOMB_X30_Y17_N2; Fanout = 2; COMB Node = 'ADPCM_Decoder_1_Bit:u6\|lpm_divide:Div0\|lpm_divide_aem:auto_generated\|sign_div_unsign_klh:divider\|alt_u_div_e2f:divider\|add_sub_6_result_int\[2\]~1'" {  } { { "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" "1.272 ns" { ADPCM_Decoder_1_Bit:u6|lpm_mult:Mult0|mult_pu01:auto_generated|mac_out2~DATAOUT15 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_6_result_int[2]~1 } "NODE_NAME" } } { "db/alt_u_div_e2f.tdf" "" { Text "D:/HD_ADPCM/HD_ADPCM_1Bit_Stereo_Decoder/db/alt_u_div_e2f.tdf" 106 22 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 -1} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.080 ns) 4.913 ns ADPCM_Decoder_1_Bit:u6\|lpm_divide:Div0\|lpm_divide_aem:auto_generated\|sign_div_unsign_klh:divider\|alt_u_div_e2f:divider\|add_sub_6_result_int\[3\]~3 5 COMB LCCOMB_X30_Y17_N4 2 " "Info: 5: + IC(0.000 ns) + CELL(0.080 ns) = 4.913 ns; Loc. = LCCOMB_X30_Y17_N4; Fanout = 2; COMB Node = 'ADPCM_Decoder_1_Bit:u6\|lpm_divide:Div0\|lpm_divide_aem:auto_generated\|sign_div_unsign_klh:divider\|alt_u_div_e2f:divider\|add_sub_6_result_int\[3\]~3'" {  } { { "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" "0.080 ns" { ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_6_result_int[2]~1 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_6_result_int[3]~3 } "NODE_NAME" } } { "db/alt_u_div_e2f.tdf" "" { Text "D:/HD_ADPCM/HD_ADPCM_1Bit_Stereo_Decoder/db/alt_u_div_e2f.tdf" 106 22 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 -1} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.080 ns) 4.993 ns ADPCM_Decoder_1_Bit:u6\|lpm_divide:Div0\|lpm_divide_aem:auto_generated\|sign_div_unsign_klh:divider\|alt_u_div_e2f:divider\|add_sub_6_result_int\[4\]~5 6 COMB LCCOMB_X30_Y17_N6 2 " "Info: 6: + IC(0.000 ns) + CELL(0.080 ns) = 4.993 ns; Loc. = LCCOMB_X30_Y17_N6; Fanout = 2; COMB Node = 'ADPCM_Decoder_1_Bit:u6\|lpm_divide:Div0\|lpm_divide_aem:auto_generated\|sign_div_unsign_klh:divider\|alt_u_div_e2f:divider\|add_sub_6_result_int\[4\]~5'" {  } { { "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" "0.080 ns" { ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_6_result_int[3]~3 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_6_result_int[4]~5 } "NODE_NAME" } } { "db/alt_u_div_e2f.tdf" "" { Text "D:/HD_ADPCM/HD_ADPCM_1Bit_Stereo_Decoder/db/alt_u_div_e2f.tdf" 106 22 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 -1} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.080 ns) 5.073 ns ADPCM_Decoder_1_Bit:u6\|lpm_divide:Div0\|lpm_divide_aem:auto_generated\|sign_div_unsign_klh:divider\|alt_u_div_e2f:divider\|add_sub_6_result_int\[5\]~7 7 COMB LCCOMB_X30_Y17_N8 2 " "Info: 7: + IC(0.000 ns) + CELL(0.080 ns) = 5.073 ns; Loc. = LCCOMB_X30_Y17_N8; Fanout = 2; COMB Node = 'ADPCM_Decoder_1_Bit:u6\|lpm_divide:Div0\|lpm_divide_aem:auto_generated\|sign_div_unsign_klh:divider\|alt_u_div_e2f:divider\|add_sub_6_result_int\[5\]~7'" {  } { { "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" "0.080 ns" { ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_6_result_int[4]~5 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_6_result_int[5]~7 } "NODE_NAME" } } { "db/alt_u_div_e2f.tdf" "" { Text "D:/HD_ADPCM/HD_ADPCM_1Bit_Stereo_Decoder/db/alt_u_div_e2f.tdf" 106 22 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 -1} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.080 ns) 5.153 ns ADPCM_Decoder_1_Bit:u6\|lpm_divide:Div0\|lpm_divide_aem:auto_generated\|sign_div_unsign_klh:divider\|alt_u_div_e2f:divider\|add_sub_6_result_int\[6\]~9 8 COMB LCCOMB_X30_Y17_N10 1 " "Info: 8: + IC(0.000 ns) + CELL(0.080 ns) = 5.153 ns; Loc. = LCCOMB_X30_Y17_N10; Fanout = 1; COMB Node = 'ADPCM_Decoder_1_Bit:u6\|lpm_divide:Div0\|lpm_divide_aem:auto_generated\|sign_div_unsign_klh:divider\|alt_u_div_e2f:divider\|add_sub_6_result_int\[6\]~9'" {  } { { "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" "0.080 ns" { ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_6_result_int[5]~7 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_6_result_int[6]~9 } "NODE_NAME" } } { "db/alt_u_div_e2f.tdf" "" { Text "D:/HD_ADPCM/HD_ADPCM_1Bit_Stereo_Decoder/db/alt_u_div_e2f.tdf" 106 22 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 -1} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.458 ns) 5.611 ns ADPCM_Decoder_1_Bit:u6\|lpm_divide:Div0\|lpm_divide_aem:auto_generated\|sign_div_unsign_klh:divider\|alt_u_div_e2f:divider\|add_sub_6_result_int\[7\]~10 9 COMB LCCOMB_X30_Y17_N12 19 " "Info: 9: + IC(0.000 ns) + CELL(0.458 ns) = 5.611 ns; Loc. = LCCOMB_X30_Y17_N12; Fanout = 19; COMB Node = 'ADPCM_Decoder_1_Bit:u6\|lpm_divide:Div0\|lpm_divide_aem:auto_generated\|sign_div_unsign_klh:divider\|alt_u_div_e2f:divider\|add_sub_6_result_int\[7\]~10'" {  } { { "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" "0.458 ns" { ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_6_result_int[6]~9 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_6_result_int[7]~10 } "NODE_NAME" } } { "db/alt_u_div_e2f.tdf" "" { Text "D:/HD_ADPCM/HD_ADPCM_1Bit_Stereo_Decoder/db/alt_u_div_e2f.tdf" 106 22 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 -1} { "Info" "ITDB_NODE_DELAY" "IC(0.899 ns) + CELL(0.322 ns) 6.832 ns ADPCM_Decoder_1_Bit:u6\|lpm_divide:Div0\|lpm_divide_aem:auto_generated\|sign_div_unsign_klh:divider\|alt_u_div_e2f:divider\|StageOut\[50\]~221 10 COMB LCCOMB_X29_Y18_N18 2 " "Info: 10: + IC(0.899 ns) + CELL(0.322 ns) = 6.832 ns; Loc. = LCCOMB_X29_Y18_N18; Fanout = 2; COMB Node = 'ADPCM_Decoder_1_Bit:u6\|lpm_divide:Div0\|lpm_divide_aem:auto_generated\|sign_div_unsign_klh:divider\|alt_u_div_e2f:divider\|StageOut\[50\]~221'" {  } { { "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" "1.221 ns" { ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_6_result_int[7]~10 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|StageOut[50]~221 } "NODE_NAME" } } { "db/alt_u_div_e2f.tdf" "" { Text "D:/HD_ADPCM/HD_ADPCM_1Bit_Stereo_Decoder/db/alt_u_div_e2f.tdf" 138 10 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 -1} { "Info" "ITDB_NODE_DELAY" "IC(0.867 ns) + CELL(0.495 ns) 8.194 ns ADPCM_Decoder_1_Bit:u6\|lpm_divide:Div0\|lpm_divide_aem:auto_generated\|sign_div_unsign_klh:divider\|alt_u_div_e2f:divider\|add_sub_7_result_int\[3\]~3 11 COMB LCCOMB_X30_Y17_N20 2 " "Info: 11: + IC(0.867 ns) + CELL(0.495 ns) = 8.194 ns; Loc. = LCCOMB_X30_Y17_N20; Fanout = 2; COMB Node = 'ADPCM_Decoder_1_Bit:u6\|lpm_divide:Div0\|lpm_divide_aem:auto_generated\|sign_div_unsign_klh:divider\|alt_u_div_e2f:divider\|add_sub_7_result_int\[3\]~3'" {  } { { "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" "1.362 ns" { ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|StageOut[50]~221 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_7_result_int[3]~3 } "NODE_NAME" } } { "db/alt_u_div_e2f.tdf" "" { Text "D:/HD_ADPCM/HD_ADPCM_1Bit_Stereo_Decoder/db/alt_u_div_e2f.tdf" 111 22 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 -1} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.080 ns) 8.274 ns ADPCM_Decoder_1_Bit:u6\|lpm_divide:Div0\|lpm_divide_aem:auto_generated\|sign_div_unsign_klh:divider\|alt_u_div_e2f:divider\|add_sub_7_result_int\[4\]~5 12 COMB LCCOMB_X30_Y17_N22 2 " "Info: 12: + IC(0.000 ns) + CELL(0.080 ns) = 8.274 ns; Loc. = LCCOMB_X30_Y17_N22; Fanout = 2; COMB Node = 'ADPCM_Decoder_1_Bit:u6\|lpm_divide:Div0\|lpm_divide_aem:auto_generated\|sign_div_unsign_klh:divider\|alt_u_div_e2f:divider\|add_sub_7_result_int\[4\]~5'" {  } { { "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" "0.080 ns" { ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_7_result_int[3]~3 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_7_result_int[4]~5 } "NODE_NAME" } } { "db/alt_u_div_e2f.tdf" "" { Text "D:/HD_ADPCM/HD_ADPCM_1Bit_Stereo_Decoder/db/alt_u_div_e2f.tdf" 111 22 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 -1} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.080 ns) 8.354 ns ADPCM_Decoder_1_Bit:u6\|lpm_divide:Div0\|lpm_divide_aem:auto_generated\|sign_div_unsign_klh:divider\|alt_u_div_e2f:divider\|add_sub_7_result_int\[5\]~7 13 COMB LCCOMB_X30_Y17_N24 2 " "Info: 13: + IC(0.000 ns) + CELL(0.080 ns) = 8.354 ns; Loc. = LCCOMB_X30_Y17_N24; Fanout = 2; COMB Node = 'ADPCM_Decoder_1_Bit:u6\|lpm_divide:Div0\|lpm_divide_aem:auto_generated\|sign_div_unsign_klh:divider\|alt_u_div_e2f:divider\|add_sub_7_result_int\[5\]~7'" {  } { { "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" "0.080 ns" { ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_7_result_int[4]~5 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_7_result_int[5]~7 } "NODE_NAME" } } { "db/alt_u_div_e2f.tdf" "" { Text "D:/HD_ADPCM/HD_ADPCM_1Bit_Stereo_Decoder/db/alt_u_div_e2f.tdf" 111 22 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 -1} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.080 ns) 8.434 ns ADPCM_Decoder_1_Bit:u6\|lpm_divide:Div0\|lpm_divide_aem:auto_generated\|sign_div_unsign_klh:divider\|alt_u_div_e2f:divider\|add_sub_7_result_int\[6\]~9 14 COMB LCCOMB_X30_Y17_N26 1 " "Info: 14: + IC(0.000 ns) + CELL(0.080 ns) = 8.434 ns; Loc. = LCCOMB_X30_Y17_N26; Fanout = 1; COMB Node = 'ADPCM_Decoder_1_Bit:u6\|lpm_divide:Div0\|lpm_divide_aem:auto_generated\|sign_div_unsign_klh:divider\|alt_u_div_e2f:divider\|add_sub_7_result_int\[6\]~9'" {  } { { "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" "0.080 ns" { ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_7_result_int[5]~7 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_7_result_int[6]~9 } "NODE_NAME" } } { "db/alt_u_div_e2f.tdf" "" { Text "D:/HD_ADPCM/HD_ADPCM_1Bit_Stereo_Decoder/db/alt_u_div_e2f.tdf" 111 22 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 -1} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.080 ns) 8.514 ns ADPCM_Decoder_1_Bit:u6\|lpm_divide:Div0\|lpm_divide_aem:auto_generated\|sign_div_unsign_klh:divider\|alt_u_div_e2f:divider\|add_sub_7_result_int\[7\]~11 15 COMB LCCOMB_X30_Y17_N28 1 " "Info: 15: + IC(0.000 ns) + CELL(0.080 ns) = 8.514 ns; Loc. = LCCOMB_X30_Y17_N28; Fanout = 1; COMB Node = 'ADPCM_Decoder_1_Bit:u6\|lpm_divide:Div0\|lpm_divide_aem:auto_generated\|sign_div_unsign_klh:divider\|alt_u_div_e2f:divider\|add_sub_7_result_int\[7\]~11'" {  } { { "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" "0.080 ns" { ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_7_result_int[6]~9 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_7_result_int[7]~11 } "NODE_NAME" } } { "db/alt_u_div_e2f.tdf" "" { Text "D:/HD_ADPCM/HD_ADPCM_1Bit_Stereo_Decoder/db/alt_u_div_e2f.tdf" 111 22 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 -1} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.458 ns) 8.972 ns ADPCM_Decoder_1_Bit:u6\|lpm_divide:Div0\|lpm_divide_aem:auto_generated\|sign_div_unsign_klh:divider\|alt_u_div_e2f:divider\|add_sub_7_result_int\[8\]~12 16 COMB LCCOMB_X30_Y17_N30 20 " "Info: 16: + IC(0.000 ns) + CELL(0.458 ns) = 8.972 ns; Loc. = LCCOMB_X30_Y17_N30; Fanout = 20; COMB Node = 'ADPCM_Decoder_1_Bit:u6\|lpm_divide:Div0\|lpm_divide_aem:auto_generated\|sign_div_unsign_klh:divider\|alt_u_div_e2f:divider\|add_sub_7_result_int\[8\]~12'" {  } { { "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" "0.458 ns" { ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_7_result_int[7]~11 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_7_result_int[8]~12 } "NODE_NAME" } } { "db/alt_u_div_e2f.tdf" "" { Text "D:/HD_ADPCM/HD_ADPCM_1Bit_Stereo_Decoder/db/alt_u_div_e2f.tdf" 111 22 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 -1} { "Info" "ITDB_NODE_DELAY" "IC(0.528 ns) + CELL(0.178 ns) 9.678 ns ADPCM_Decoder_1_Bit:u6\|lpm_divide:Div0\|lpm_divide_aem:auto_generated\|sign_div_unsign_klh:divider\|alt_u_div_e2f:divider\|StageOut\[58\]~197 17 COMB LCCOMB_X29_Y17_N24 2 " "Info: 17: + IC(0.528 ns) + CELL(0.178 ns) = 9.678 ns; Loc. = LCCOMB_X29_Y17_N24; Fanout = 2; COMB Node = 'ADPCM_Decoder_1_Bit:u6\|lpm_divide:Div0\|lpm_divide_aem:auto_generated\|sign_div_unsign_klh:divider\|alt_u_div_e2f:divider\|StageOut\[58\]~197'" {  } { { "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" "0.706 ns" { ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_7_result_int[8]~12 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|StageOut[58]~197 } "NODE_NAME" } } { "db/alt_u_div_e2f.tdf" "" { Text "D:/HD_ADPCM/HD_ADPCM_1Bit_Stereo_Decoder/db/alt_u_div_e2f.tdf" 138 10 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 -1} { "Info" "ITDB_NODE_DELAY" "IC(0.847 ns) + CELL(0.517 ns) 11.042 ns ADPCM_Decoder_1_Bit:u6\|lpm_divide:Div0\|lpm_divide_aem:auto_generated\|sign_div_unsign_klh:divider\|alt_u_div_e2f:divider\|add_sub_8_result_int\[3\]~3 18 COMB LCCOMB_X31_Y17_N2 2 " "Info: 18: + IC(0.847 ns) + CELL(0.517 ns) = 11.042 ns; Loc. = LCCOMB_X31_Y17_N2; Fanout = 2; COMB Node = 'ADPCM_Decoder_1_Bit:u6\|lpm_divide:Div0\|lpm_divide_aem:auto_generated\|sign_div_unsign_klh:divider\|alt_u_div_e2f:divider\|add_sub_8_result_int\[3\]~3'" {  } { { "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" "1.364 ns" { ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|StageOut[58]~197 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_8_result_int[3]~3 } "NODE_NAME" } } { "db/alt_u_div_e2f.tdf" "" { Text "D:/HD_ADPCM/HD_ADPCM_1Bit_Stereo_Decoder/db/alt_u_div_e2f.tdf" 116 22 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 -1} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.080 ns) 11.122 ns ADPCM_Decoder_1_Bit:u6\|lpm_divide:Div0\|lpm_divide_aem:auto_generated\|sign_div_unsign_klh:divider\|alt_u_div_e2f:divider\|add_sub_8_result_int\[4\]~5 19 COMB LCCOMB_X31_Y17_N4 2 " "Info: 19: + IC(0.000 ns) + CELL(0.080 ns) = 11.122 ns; Loc. = LCCOMB_X31_Y17_N4; Fanout = 2; COMB Node = 'ADPCM_Decoder_1_Bit:u6\|lpm_divide:Div0\|lpm_divide_aem:auto_generated\|sign_div_unsign_klh:divider\|alt_u_div_e2f:divider\|add_sub_8_result_int\[4\]~5'" {  } { { "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" "0.080 ns" { ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_8_result_int[3]~3 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_8_result_int[4]~5 } "NODE_NAME" } } { "db/alt_u_div_e2f.tdf" "" { Text "D:/HD_ADPCM/HD_ADPCM_1Bit_Stereo_Decoder/db/alt_u_div_e2f.tdf" 116 22 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 -1} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.080 ns) 11.202 ns ADPCM_Decoder_1_Bit:u6\|lpm_divide:Div0\|lpm_divide_aem:auto_generated\|sign_div_unsign_klh:divider\|alt_u_div_e2f:divider\|add_sub_8_result_int\[5\]~7 20 COMB LCCOMB_X31_Y17_N6 2 " "Info: 20: + IC(0.000 ns) + CELL(0.080 ns) = 11.202 ns; Loc. = LCCOMB_X31_Y17_N6; Fanout = 2; COMB Node = 'ADPCM_Decoder_1_Bit:u6\|lpm_divide:Div0\|lpm_divide_aem:auto_generated\|sign_div_unsign_klh:divider\|alt_u_div_e2f:divider\|add_sub_8_result_int\[5\]~7'" {  } { { "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" "0.080 ns" { ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_8_result_int[4]~5 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_8_result_int[5]~7 } "NODE_NAME" } } { "db/alt_u_div_e2f.tdf" "" { Text "D:/HD_ADPCM/HD_ADPCM_1Bit_Stereo_Decoder/db/alt_u_div_e2f.tdf" 116 22 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 -1} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.080 ns) 11.282 ns ADPCM_Decoder_1_Bit:u6\|lpm_divide:Div0\|lpm_divide_aem:auto_generated\|sign_div_unsign_klh:divider\|alt_u_div_e2f:divider\|add_sub_8_result_int\[6\]~9 21 COMB LCCOMB_X31_Y17_N8 1 " "Info: 21: + IC(0.000 ns) + CELL(0.080 ns) = 11.282 ns; Loc. = LCCOMB_X31_Y17_N8; Fanout = 1; COMB Node = 'ADPCM_Decoder_1_Bit:u6\|lpm_divide:Div0\|lpm_divide_aem:auto_generated\|sign_div_unsign_klh:divider\|alt_u_div_e2f:divider\|add_sub_8_result_int\[6\]~9'" {  } { { "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" "0.080 ns" { ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_8_result_int[5]~7 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_8_result_int[6]~9 } "NODE_NAME" } } { "db/alt_u_div_e2f.tdf" "" { Text "D:/HD_ADPCM/HD_ADPCM_1Bit_Stereo_Decoder/db/alt_u_div_e2f.tdf" 116 22 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 -1} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.080 ns) 11.362 ns ADPCM_Decoder_1_Bit:u6\|lpm_divide:Div0\|lpm_divide_aem:auto_generated\|sign_div_unsign_klh:divider\|alt_u_div_e2f:divider\|add_sub_8_result_int\[7\]~11 22 COMB LCCOMB_X31_Y17_N10 1 " "Info: 22: + IC(0.000 ns) + CELL(0.080 ns) = 11.362 ns; Loc. = LCCOMB_X31_Y17_N10; Fanout = 1; COMB Node = 'ADPCM_Decoder_1_Bit:u6\|lpm_divide:Div0\|lpm_divide_aem:auto_generated\|sign_div_unsign_klh:divider\|alt_u_div_e2f:divider\|add_sub_8_result_int\[7\]~11'" {  } { { "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" "0.080 ns" { ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_8_result_int[6]~9 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_8_result_int[7]~11 } "NODE_NAME" } } { "db/alt_u_div_e2f.tdf" "" { Text "D:/HD_ADPCM/HD_ADPCM_1Bit_Stereo_Decoder/db/alt_u_div_e2f.tdf" 116 22 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 -1} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.458 ns) 11.820 ns ADPCM_Decoder_1_Bit:u6\|lpm_divide:Div0\|lpm_divide_aem:auto_generated\|sign_div_unsign_klh:divider\|alt_u_div_e2f:divider\|add_sub_8_result_int\[8\]~12 23 COMB LCCOMB_X31_Y17_N12 20 " "Info: 23: + IC(0.000 ns) + CELL(0.458 ns) = 11.820 ns; Loc. = LCCOMB_X31_Y17_N12; Fanout = 20; COMB Node = 'ADPCM_Decoder_1_Bit:u6\|lpm_divide:Div0\|lpm_divide_aem:auto_generated\|sign_div_unsign_klh:divider\|alt_u_div_e2f:divider\|add_sub_8_result_int\[8\]~12'" {  } { { "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" "0.458 ns" { ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_8_result_int[7]~11 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_8_result_int[8]~12 } "NODE_NAME" } } { "db/alt_u_div_e2f.tdf" "" { Text "D:/HD_ADPCM/HD_ADPCM_1Bit_Stereo_Decoder/db/alt_u_div_e2f.tdf" 116 22 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 -1} { "Info" "ITDB_NODE_DELAY" "IC(0.819 ns) + CELL(0.178 ns) 12.817 ns ADPCM_Decoder_1_Bit:u6\|lpm_divide:Div0\|lpm_divide_aem:auto_generated\|sign_div_unsign_klh:divider\|alt_u_div_e2f:divider\|StageOut\[67\]~581 24 COMB LCCOMB_X29_Y17_N22 3 " "Info: 24: + IC(0.819 ns) + CELL(0.178 ns) = 12.817 ns; Loc. = LCCOMB_X29_Y17_N22; Fanout = 3; COMB Node = 'ADPCM_Decoder_1_Bit:u6\|lpm_divide:Div0\|lpm_divide_aem:auto_generated\|sign_div_unsign_klh:divider\|alt_u_div_e2f:divider\|StageOut\[67\]~581'" {  } { { "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" "0.997 ns" { ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_8_result_int[8]~12 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|StageOut[67]~581 } "NODE_NAME" } } { "db/alt_u_div_e2f.tdf" "" { Text "D:/HD_ADPCM/HD_ADPCM_1Bit_Stereo_Decoder/db/alt_u_div_e2f.tdf" 138 10 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 -1} { "Info" "ITDB_NODE_DELAY" "IC(1.165 ns) + CELL(0.495 ns) 14.477 ns ADPCM_Decoder_1_Bit:u6\|lpm_divide:Div0\|lpm_divide_aem:auto_generated\|sign_div_unsign_klh:divider\|alt_u_div_e2f:divider\|add_sub_9_result_int\[4\]~5 25 COMB LCCOMB_X32_Y20_N16 2 " "Info: 25: + IC(1.165 ns) + CELL(0.495 ns) = 14.477 ns; Loc. = LCCOMB_X32_Y20_N16; Fanout = 2; COMB Node = 'ADPCM_Decoder_1_Bit:u6\|lpm_divide:Div0\|lpm_divide_aem:auto_generated\|sign_div_unsign_klh:divider\|alt_u_div_e2f:divider\|add_sub_9_result_int\[4\]~5'" {  } { { "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" "1.660 ns" { ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|StageOut[67]~581 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_9_result_int[4]~5 } "NODE_NAME" } } { "db/alt_u_div_e2f.tdf" "" { Text "D:/HD_ADPCM/HD_ADPCM_1Bit_Stereo_Decoder/db/alt_u_div_e2f.tdf" 121 22 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 -1} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.080 ns) 14.557 ns ADPCM_Decoder_1_Bit:u6\|lpm_divide:Div0\|lpm_divide_aem:auto_generated\|sign_div_unsign_klh:divider\|alt_u_div_e2f:divider\|add_sub_9_result_int\[5\]~7 26 COMB LCCOMB_X32_Y20_N18 2 " "Info: 26: + IC(0.000 ns) + CELL(0.080 ns) = 14.557 ns; Loc. = LCCOMB_X32_Y20_N18; Fanout = 2; COMB Node = 'ADPCM_Decoder_1_Bit:u6\|lpm_divide:Div0\|lpm_divide_aem:auto_generated\|sign_div_unsign_klh:divider\|alt_u_div_e2f:divider\|add_sub_9_result_int\[5\]~7'" {  } { { "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" "0.080 ns" { ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_9_result_int[4]~5 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_9_result_int[5]~7 } "NODE_NAME" } } { "db/alt_u_div_e2f.tdf" "" { Text "D:/HD_ADPCM/HD_ADPCM_1Bit_Stereo_Decoder/db/alt_u_div_e2f.tdf" 121 22 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 -1} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.080 ns) 14.637 ns ADPCM_Decoder_1_Bit:u6\|lpm_divide:Div0\|lpm_divide_aem:auto_generated\|sign_div_unsign_klh:divider\|alt_u_div_e2f:divider\|add_sub_9_result_int\[6\]~9 27 COMB LCCOMB_X32_Y20_N20 1 " "Info: 27: + IC(0.000 ns) + CELL(0.080 ns) = 14.637 ns; Loc. = LCCOMB_X32_Y20_N20; Fanout = 1; COMB Node = 'ADPCM_Decoder_1_Bit:u6\|lpm_divide:Div0\|lpm_divide_aem:auto_generated\|sign_div_unsign_klh:divider\|alt_u_div_e2f:divider\|add_sub_9_result_int\[6\]~9'" {  } { { "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" "0.080 ns" { ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_9_result_int[5]~7 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_9_result_int[6]~9 } "NODE_NAME" } } { "db/alt_u_div_e2f.tdf" "" { Text "D:/HD_ADPCM/HD_ADPCM_1Bit_Stereo_Decoder/db/alt_u_div_e2f.tdf" 121 22 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 -1} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.080 ns) 14.717 ns ADPCM_Decoder_1_Bit:u6\|lpm_divide:Div0\|lpm_divide_aem:auto_generated\|sign_div_unsign_klh:divider\|alt_u_div_e2f:divider\|add_sub_9_result_int\[7\]~11 28 COMB LCCOMB_X32_Y20_N22 1 " "Info: 28: + IC(0.000 ns) + CELL(0.080 ns) = 14.717 ns; Loc. = LCCOMB_X32_Y20_N22; Fanout = 1; COMB Node = 'ADPCM_Decoder_1_Bit:u6\|lpm_divide:Div0\|lpm_divide_aem:auto_generated\|sign_div_unsign_klh:divider\|alt_u_div_e2f:divider\|add_sub_9_result_int\[7\]~11'" {  } { { "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" "0.080 ns" { ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_9_result_int[6]~9 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_9_result_int[7]~11 } "NODE_NAME" } } { "db/alt_u_div_e2f.tdf" "" { Text "D:/HD_ADPCM/HD_ADPCM_1Bit_Stereo_Decoder/db/alt_u_div_e2f.tdf" 121 22 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 -1} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.458 ns) 15.175 ns ADPCM_Decoder_1_Bit:u6\|lpm_divide:Div0\|lpm_divide_aem:auto_generated\|sign_div_unsign_klh:divider\|alt_u_div_e2f:divider\|add_sub_9_result_int\[8\]~12 29 COMB LCCOMB_X32_Y20_N24 20 " "Info: 29: + IC(0.000 ns) + CELL(0.458 ns) = 15.175 ns; Loc. = LCCOMB_X32_Y20_N24; Fanout = 20; COMB Node = 'ADPCM_Decoder_1_Bit:u6\|lpm_divide:Div0\|lpm_divide_aem:auto_generated\|sign_div_unsign_klh:divider\|alt_u_div_e2f:divider\|add_sub_9_result_int\[8\]~12'" {  } { { "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" "0.458 ns" { ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_9_result_int[7]~11 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_9_result_int[8]~12 } "NODE_NAME" } } { "db/alt_u_div_e2f.tdf" "" { Text "D:/HD_ADPCM/HD_ADPCM_1Bit_Stereo_Decoder/db/alt_u_div_e2f.tdf" 121 22 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 -1} { "Info" "ITDB_NODE_DELAY" "IC(0.328 ns) + CELL(0.319 ns) 15.822 ns ADPCM_Decoder_1_Bit:u6\|lpm_divide:Div0\|lpm_divide_aem:auto_generated\|sign_div_unsign_klh:divider\|alt_u_div_e2f:divider\|StageOut\[73\]~166 30 COMB LCCOMB_X32_Y20_N4 2 " "Info: 30: + IC(0.328 ns) + CELL(0.319 ns) = 15.822 ns; Loc. = LCCOMB_X32_Y20_N4; Fanout = 2; COMB Node = 'ADPCM_Decoder_1_Bit:u6\|lpm_divide:Div0\|lpm_divide_aem:auto_generated\|sign_div_unsign_klh:divider\|alt_u_div_e2f:divider\|StageOut\[73\]~166'" {  } { { "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" "0.647 ns" { ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_9_result_int[8]~12 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|StageOut[73]~166 } "NODE_NAME" } } { "db/alt_u_div_e2f.tdf" "" { Text "D:/HD_ADPCM/HD_ADPCM_1Bit_Stereo_Decoder/db/alt_u_div_e2f.tdf" 138 10 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 -1} { "Info" "ITDB_NODE_DELAY" "IC(0.816 ns) + CELL(0.517 ns) 17.155 ns ADPCM_Decoder_1_Bit:u6\|lpm_divide:Div0\|lpm_divide_aem:auto_generated\|sign_div_unsign_klh:divider\|alt_u_div_e2f:divider\|add_sub_10_result_int\[2\]~1 31 COMB LCCOMB_X34_Y20_N12 2 " "Info: 31: + IC(0.816 ns) + CELL(0.517 ns) = 17.155 ns; Loc. = LCCOMB_X34_Y20_N12; Fanout = 2; COMB Node = 'ADPCM_Decoder_1_Bit:u6\|lpm_divide:Div0\|lpm_divide_aem:auto_generated\|sign_div_unsign_klh:divider\|alt_u_div_e2f:divider\|add_sub_10_result_int\[2\]~1'" {  } { { "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" "1.333 ns" { ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|StageOut[73]~166 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_10_result_int[2]~1 } "NODE_NAME" } } { "db/alt_u_div_e2f.tdf" "" { Text "D:/HD_ADPCM/HD_ADPCM_1Bit_Stereo_Decoder/db/alt_u_div_e2f.tdf" 36 23 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 -1} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.174 ns) 17.329 ns ADPCM_Decoder_1_Bit:u6\|lpm_divide:Div0\|lpm_divide_aem:auto_generated\|sign_div_unsign_klh:divider\|alt_u_div_e2f:divider\|add_sub_10_result_int\[3\]~3 32 COMB LCCOMB_X34_Y20_N14 2 " "Info: 32: + IC(0.000 ns) + CELL(0.174 ns) = 17.329 ns; Loc. = LCCOMB_X34_Y20_N14; Fanout = 2; COMB Node = 'ADPCM_Decoder_1_Bit:u6\|lpm_divide:Div0\|lpm_divide_aem:auto_generated\|sign_div_unsign_klh:divider\|alt_u_div_e2f:divider\|add_sub_10_result_int\[3\]~3'" {  } { { "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" "0.174 ns" { ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_10_result_int[2]~1 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_10_result_int[3]~3 } "NODE_NAME" } } { "db/alt_u_div_e2f.tdf" "" { Text "D:/HD_ADPCM/HD_ADPCM_1Bit_Stereo_Decoder/db/alt_u_div_e2f.tdf" 36 23 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 -1} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.080 ns) 17.409 ns ADPCM_Decoder_1_Bit:u6\|lpm_divide:Div0\|lpm_divide_aem:auto_generated\|sign_div_unsign_klh:divider\|alt_u_div_e2f:divider\|add_sub_10_result_int\[4\]~5 33 COMB LCCOMB_X34_Y20_N16 2 " "Info: 33: + IC(0.000 ns) + CELL(0.080 ns) = 17.409 ns; Loc. = LCCOMB_X34_Y20_N16; Fanout = 2; COMB Node = 'ADPCM_Decoder_1_Bit:u6\|lpm_divide:Div0\|lpm_divide_aem:auto_generated\|sign_div_unsign_klh:divider\|alt_u_div_e2f:divider\|add_sub_10_result_int\[4\]~5'" {  } { { "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" "0.080 ns" { ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_10_result_int[3]~3 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_10_result_int[4]~5 } "NODE_NAME" } } { "db/alt_u_div_e2f.tdf" "" { Text "D:/HD_ADPCM/HD_ADPCM_1Bit_Stereo_Decoder/db/alt_u_div_e2f.tdf" 36 23 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 -1} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.080 ns) 17.489 ns ADPCM_Decoder_1_Bit:u6\|lpm_divide:Div0\|lpm_divide_aem:auto_generated\|sign_div_unsign_klh:divider\|alt_u_div_e2f:divider\|add_sub_10_result_int\[5\]~7 34 COMB LCCOMB_X34_Y20_N18 2 " "Info: 34: + IC(0.000 ns) + CELL(0.080 ns) = 17.489 ns; Loc. = LCCOMB_X34_Y20_N18; Fanout = 2; COMB Node = 'ADPCM_Decoder_1_Bit:u6\|lpm_divide:Div0\|lpm_divide_aem:auto_generated\|sign_div_unsign_klh:divider\|alt_u_div_e2f:divider\|add_sub_10_result_int\[5\]~7'" {  } { { "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" "0.080 ns" { ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_10_result_int[4]~5 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_10_result_int[5]~7 } "NODE_NAME" } } { "db/alt_u_div_e2f.tdf" "" { Text "D:/HD_ADPCM/HD_ADPCM_1Bit_Stereo_Decoder/db/alt_u_div_e2f.tdf" 36 23 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 -1} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.080 ns) 17.569 ns ADPCM_Decoder_1_Bit:u6\|lpm_divide:Div0\|lpm_divide_aem:auto_generated\|sign_div_unsign_klh:divider\|alt_u_div_e2f:divider\|add_sub_10_result_int\[6\]~9 35 COMB LCCOMB_X34_Y20_N20 1 " "Info: 35: + IC(0.000 ns) + CELL(0.080 ns) = 17.569 ns; Loc. = LCCOMB_X34_Y20_N20; Fanout = 1; COMB Node = 'ADPCM_Decoder_1_Bit:u6\|lpm_divide:Div0\|lpm_divide_aem:auto_generated\|sign_div_unsign_klh:divider\|alt_u_div_e2f:divider\|add_sub_10_result_int\[6\]~9'" {  } { { "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" "0.080 ns" { ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_10_result_int[5]~7 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_10_result_int[6]~9 } "NODE_NAME" } } { "db/alt_u_div_e2f.tdf" "" { Text "D:/HD_ADPCM/HD_ADPCM_1Bit_Stereo_Decoder/db/alt_u_div_e2f.tdf" 36 23 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 -1} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.080 ns) 17.649 ns ADPCM_Decoder_1_Bit:u6\|lpm_divide:Div0\|lpm_divide_aem:auto_generated\|sign_div_unsign_klh:divider\|alt_u_div_e2f:divider\|add_sub_10_result_int\[7\]~11 36 COMB LCCOMB_X34_Y20_N22 1 " "Info: 36: + IC(0.000 ns) + CELL(0.080 ns) = 17.649 ns; Loc. = LCCOMB_X34_Y20_N22; Fanout = 1; COMB Node = 'ADPCM_Decoder_1_Bit:u6\|lpm_divide:Div0\|lpm_divide_aem:auto_generated\|sign_div_unsign_klh:divider\|alt_u_div_e2f:divider\|add_sub_10_result_int\[7\]~11'" {  } { { "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" "0.080 ns" { ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_10_result_int[6]~9 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_10_result_int[7]~11 } "NODE_NAME" } } { "db/alt_u_div_e2f.tdf" "" { Text "D:/HD_ADPCM/HD_ADPCM_1Bit_Stereo_Decoder/db/alt_u_div_e2f.tdf" 36 23 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 -1} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.458 ns) 18.107 ns ADPCM_Decoder_1_Bit:u6\|lpm_divide:Div0\|lpm_divide_aem:auto_generated\|sign_div_unsign_klh:divider\|alt_u_div_e2f:divider\|add_sub_10_result_int\[8\]~12 37 COMB LCCOMB_X34_Y20_N24 20 " "Info: 37: + IC(0.000 ns) + CELL(0.458 ns) = 18.107 ns; Loc. = LCCOMB_X34_Y20_N24; Fanout = 20; COMB Node = 'ADPCM_Decoder_1_Bit:u6\|lpm_divide:Div0\|lpm_divide_aem:auto_generated\|sign_div_unsign_klh:divider\|alt_u_div_e2f:divider\|add_sub_10_result_int\[8\]~12'" {  } { { "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" "0.458 ns" { ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_10_result_int[7]~11 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_10_result_int[8]~12 } "NODE_NAME" } } { "db/alt_u_div_e2f.tdf" "" { Text "D:/HD_ADPCM/HD_ADPCM_1Bit_Stereo_Decoder/db/alt_u_div_e2f.tdf" 36 23 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 -1} { "Info" "ITDB_NODE_DELAY" "IC(0.617 ns) + CELL(0.178 ns) 18.902 ns ADPCM_Decoder_1_Bit:u6\|lpm_divide:Div0\|lpm_divide_aem:auto_generated\|sign_div_unsign_klh:divider\|alt_u_div_e2f:divider\|StageOut\[83\]~544 38 COMB LCCOMB_X33_Y20_N10 3 " "Info: 38: + IC(0.617 ns) + CELL(0.178 ns) = 18.902 ns; Loc. = LCCOMB_X33_Y20_N10; Fanout = 3; COMB Node = 'ADPCM_Decoder_1_Bit:u6\|lpm_divide:Div0\|lpm_divide_aem:auto_generated\|sign_div_unsign_klh:divider\|alt_u_div_e2f:divider\|StageOut\[83\]~544'" {  } { { "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" "0.795 ns" { ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_10_result_int[8]~12 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|StageOut[83]~544 } "NODE_NAME" } } { "db/alt_u_div_e2f.tdf" "" { Text "D:/HD_ADPCM/HD_ADPCM_1Bit_Stereo_Decoder/db/alt_u_div_e2f.tdf" 138 10 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 -1} { "Info" "ITDB_NODE_DELAY" "IC(0.799 ns) + CELL(0.495 ns) 20.196 ns ADPCM_Decoder_1_Bit:u6\|lpm_divide:Div0\|lpm_divide_aem:auto_generated\|sign_div_unsign_klh:divider\|alt_u_div_e2f:divider\|add_sub_11_result_int\[4\]~5 39 COMB LCCOMB_X35_Y20_N18 2 " "Info: 39: + IC(0.799 ns) + CELL(0.495 ns) = 20.196 ns; Loc. = LCCOMB_X35_Y20_N18; Fanout = 2; COMB Node = 'ADPCM_Decoder_1_Bit:u6\|lpm_divide:Div0\|lpm_divide_aem:auto_generated\|sign_div_unsign_klh:divider\|alt_u_div_e2f:divider\|add_sub_11_result_int\[4\]~5'" {  } { { "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" "1.294 ns" { ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|StageOut[83]~544 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_11_result_int[4]~5 } "NODE_NAME" } } { "db/alt_u_div_e2f.tdf" "" { Text "D:/HD_ADPCM/HD_ADPCM_1Bit_Stereo_Decoder/db/alt_u_div_e2f.tdf" 41 23 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 -1} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.080 ns) 20.276 ns ADPCM_Decoder_1_Bit:u6\|lpm_divide:Div0\|lpm_divide_aem:auto_generated\|sign_div_unsign_klh:divider\|alt_u_div_e2f:divider\|add_sub_11_result_int\[5\]~7 40 COMB LCCOMB_X35_Y20_N20 2 " "Info: 40: + IC(0.000 ns) + CELL(0.080 ns) = 20.276 ns; Loc. = LCCOMB_X35_Y20_N20; Fanout = 2; COMB Node = 'ADPCM_Decoder_1_Bit:u6\|lpm_divide:Div0\|lpm_divide_aem:auto_generated\|sign_div_unsign_klh:divider\|alt_u_div_e2f:divider\|add_sub_11_result_int\[5\]~7'" {  } { { "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" "0.080 ns" { ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_11_result_int[4]~5 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_11_result_int[5]~7 } "NODE_NAME" } } { "db/alt_u_div_e2f.tdf" "" { Text "D:/HD_ADPCM/HD_ADPCM_1Bit_Stereo_Decoder/db/alt_u_div_e2f.tdf" 41 23 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 -1} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.080 ns) 20.356 ns ADPCM_Decoder_1_Bit:u6\|lpm_divide:Div0\|lpm_divide_aem:auto_generated\|sign_div_unsign_klh:divider\|alt_u_div_e2f:divider\|add_sub_11_result_int\[6\]~9 41 COMB LCCOMB_X35_Y20_N22 1 " "Info: 41: + IC(0.000 ns) + CELL(0.080 ns) = 20.356 ns; Loc. = LCCOMB_X35_Y20_N22; Fanout = 1; COMB Node = 'ADPCM_Decoder_1_Bit:u6\|lpm_divide:Div0\|lpm_divide_aem:auto_generated\|sign_div_unsign_klh:divider\|alt_u_div_e2f:divider\|add_sub_11_result_int\[6\]~9'" {  } { { "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" "0.080 ns" { ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_11_result_int[5]~7 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_11_result_int[6]~9 } "NODE_NAME" } } { "db/alt_u_div_e2f.tdf" "" { Text "D:/HD_ADPCM/HD_ADPCM_1Bit_Stereo_Decoder/db/alt_u_div_e2f.tdf" 41 23 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 -1} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.080 ns) 20.436 ns ADPCM_Decoder_1_Bit:u6\|lpm_divide:Div0\|lpm_divide_aem:auto_generated\|sign_div_unsign_klh:divider\|alt_u_div_e2f:divider\|add_sub_11_result_int\[7\]~11 42 COMB LCCOMB_X35_Y20_N24 1 " "Info: 42: + IC(0.000 ns) + CELL(0.080 ns) = 20.436 ns; Loc. = LCCOMB_X35_Y20_N24; Fanout = 1; COMB Node = 'ADPCM_Decoder_1_Bit:u6\|lpm_divide:Div0\|lpm_divide_aem:auto_generated\|sign_div_unsign_klh:divider\|alt_u_div_e2f:divider\|add_sub_11_result_int\[7\]~11'" {  } { { "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" "0.080 ns" { ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_11_result_int[6]~9 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_11_result_int[7]~11 } "NODE_NAME" } } { "db/alt_u_div_e2f.tdf" "" { Text "D:/HD_ADPCM/HD_ADPCM_1Bit_Stereo_Decoder/db/alt_u_div_e2f.tdf" 41 23 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 -1} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.458 ns) 20.894 ns ADPCM_Decoder_1_Bit:u6\|lpm_divide:Div0\|lpm_divide_aem:auto_generated\|sign_div_unsign_klh:divider\|alt_u_div_e2f:divider\|add_sub_11_result_int\[8\]~12 43 COMB LCCOMB_X35_Y20_N26 20 " "Info: 43: + IC(0.000 ns) + CELL(0.458 ns) = 20.894 ns; Loc. = LCCOMB_X35_Y20_N26; Fanout = 20; COMB Node = 'ADPCM_Decoder_1_Bit:u6\|lpm_divide:Div0\|lpm_divide_aem:auto_generated\|sign_div_unsign_klh:divider\|alt_u_div_e2f:divider\|add_sub_11_result_int\[8\]~12'" {  } { { "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" "0.458 ns" { ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_11_result_int[7]~11 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_11_result_int[8]~12 } "NODE_NAME" } } { "db/alt_u_div_e2f.tdf" "" { Text "D:/HD_ADPCM/HD_ADPCM_1Bit_Stereo_Decoder/db/alt_u_div_e2f.tdf" 41 23 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 -1} { "Info" "ITDB_NODE_DELAY" "IC(0.877 ns) + CELL(0.178 ns) 21.949 ns ADPCM_Decoder_1_Bit:u6\|lpm_divide:Div0\|lpm_divide_aem:auto_generated\|sign_div_unsign_klh:divider\|alt_u_div_e2f:divider\|StageOut\[92\]~547 44 COMB LCCOMB_X33_Y20_N16 3 " "Info: 44: + IC(0.877 ns) + CELL(0.178 ns) = 21.949 ns; Loc. = LCCOMB_X33_Y20_N16; Fanout = 3; COMB Node = 'ADPCM_Decoder_1_Bit:u6\|lpm_divide:Div0\|lpm_divide_aem:auto_generated\|sign_div_unsign_klh:divider\|alt_u_div_e2f:divider\|StageOut\[92\]~547'" {  } { { "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" "1.055 ns" { ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_11_result_int[8]~12 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|StageOut[92]~547 } "NODE_NAME" } } { "db/alt_u_div_e2f.tdf" "" { Text "D:/HD_ADPCM/HD_ADPCM_1Bit_Stereo_Decoder/db/alt_u_div_e2f.tdf" 138 10 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 -1} { "Info" "ITDB_NODE_DELAY" "IC(0.822 ns) + CELL(0.517 ns) 23.288 ns ADPCM_Decoder_1_Bit:u6\|lpm_divide:Div0\|lpm_divide_aem:auto_generated\|sign_div_unsign_klh:divider\|alt_u_div_e2f:divider\|add_sub_12_result_int\[5\]~7 45 COMB LCCOMB_X36_Y20_N24 2 " "Info: 45: + IC(0.822 ns) + CELL(0.517 ns) = 23.288 ns; Loc. = LCCOMB_X36_Y20_N24; Fanout = 2; COMB Node = 'ADPCM_Decoder_1_Bit:u6\|lpm_divide:Div0\|lpm_divide_aem:auto_generated\|sign_div_unsign_klh:divider\|alt_u_div_e2f:divider\|add_sub_12_result_int\[5\]~7'" {  } { { "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" "1.339 ns" { ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|StageOut[92]~547 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_12_result_int[5]~7 } "NODE_NAME" } } { "db/alt_u_div_e2f.tdf" "" { Text "D:/HD_ADPCM/HD_ADPCM_1Bit_Stereo_Decoder/db/alt_u_div_e2f.tdf" 46 23 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 -1} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.080 ns) 23.368 ns ADPCM_Decoder_1_Bit:u6\|lpm_divide:Div0\|lpm_divide_aem:auto_generated\|sign_div_unsign_klh:divider\|alt_u_div_e2f:divider\|add_sub_12_result_int\[6\]~9 46 COMB LCCOMB_X36_Y20_N26 1 " "Info: 46: + IC(0.000 ns) + CELL(0.080 ns) = 23.368 ns; Loc. = LCCOMB_X36_Y20_N26; Fanout = 1; COMB Node = 'ADPCM_Decoder_1_Bit:u6\|lpm_divide:Div0\|lpm_divide_aem:auto_generated\|sign_div_unsign_klh:divider\|alt_u_div_e2f:divider\|add_sub_12_result_int\[6\]~9'" {  } { { "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" "0.080 ns" { ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_12_result_int[5]~7 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_12_result_int[6]~9 } "NODE_NAME" } } { "db/alt_u_div_e2f.tdf" "" { Text "D:/HD_ADPCM/HD_ADPCM_1Bit_Stereo_Decoder/db/alt_u_div_e2f.tdf" 46 23 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 -1} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.080 ns) 23.448 ns ADPCM_Decoder_1_Bit:u6\|lpm_divide:Div0\|lpm_divide_aem:auto_generated\|sign_div_unsign_klh:divider\|alt_u_div_e2f:divider\|add_sub_12_result_int\[7\]~11 47 COMB LCCOMB_X36_Y20_N28 1 " "Info: 47: + IC(0.000 ns) + CELL(0.080 ns) = 23.448 ns; Loc. = LCCOMB_X36_Y20_N28; Fanout = 1; COMB Node = 'ADPCM_Decoder_1_Bit:u6\|lpm_divide:Div0\|lpm_divide_aem:auto_generated\|sign_div_unsign_klh:divider\|alt_u_div_e2f:divider\|add_sub_12_result_int\[7\]~11'" {  } { { "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" "0.080 ns" { ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_12_result_int[6]~9 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_12_result_int[7]~11 } "NODE_NAME" } } { "db/alt_u_div_e2f.tdf" "" { Text "D:/HD_ADPCM/HD_ADPCM_1Bit_Stereo_Decoder/db/alt_u_div_e2f.tdf" 46 23 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 -1} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.458 ns) 23.906 ns ADPCM_Decoder_1_Bit:u6\|lpm_divide:Div0\|lpm_divide_aem:auto_generated\|sign_div_unsign_klh:divider\|alt_u_div_e2f:divider\|add_sub_12_result_int\[8\]~12 48 COMB LCCOMB_X36_Y20_N30 20 " "Info: 48: + IC(0.000 ns) + CELL(0.458 ns) = 23.906 ns; Loc. = LCCOMB_X36_Y20_N30; Fanout = 20; COMB Node = 'ADPCM_Decoder_1_Bit:u6\|lpm_divide:Div0\|lpm_divide_aem:auto_generated\|sign_div_unsign_klh:divider\|alt_u_div_e2f:divider\|add_sub_12_result_int\[8\]~12'" {  } { { "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" "0.458 ns" { ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_12_result_int[7]~11 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_12_result_int[8]~12 } "NODE_NAME" } } { "db/alt_u_div_e2f.tdf" "" { Text "D:/HD_ADPCM/HD_ADPCM_1Bit_Stereo_Decoder/db/alt_u_div_e2f.tdf" 46 23 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 -1} { "Info" "ITDB_NODE_DELAY" "IC(0.876 ns) + CELL(0.178 ns) 24.960 ns ADPCM_Decoder_1_Bit:u6\|lpm_divide:Div0\|lpm_divide_aem:auto_generated\|sign_div_unsign_klh:divider\|alt_u_div_e2f:divider\|StageOut\[101\]~550 49 COMB LCCOMB_X33_Y20_N4 3 " "Info: 49: + IC(0.876 ns) + CELL(0.178 ns) = 24.960 ns; Loc. = LCCOMB_X33_Y20_N4; Fanout = 3; COMB Node = 'ADPCM_Decoder_1_Bit:u6\|lpm_divide:Div0\|lpm_divide_aem:auto_generated\|sign_div_unsign_klh:divider\|alt_u_div_e2f:divider\|StageOut\[101\]~550'" {  } { { "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" "1.054 ns" { ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_12_result_int[8]~12 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|StageOut[101]~550 } "NODE_NAME" } } { "db/alt_u_div_e2f.tdf" "" { Text "D:/HD_ADPCM/HD_ADPCM_1Bit_Stereo_Decoder/db/alt_u_div_e2f.tdf" 138 10 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 -1} { "Info" "ITDB_NODE_DELAY" "IC(1.162 ns) + CELL(0.495 ns) 26.617 ns ADPCM_Decoder_1_Bit:u6\|lpm_divide:Div0\|lpm_divide_aem:auto_generated\|sign_div_unsign_klh:divider\|alt_u_div_e2f:divider\|add_sub_13_result_int\[6\]~9 50 COMB LCCOMB_X36_Y21_N10 1 " "Info: 50: + IC(1.162 ns) + CELL(0.495 ns) = 26.617 ns; Loc. = LCCOMB_X36_Y21_N10; Fanout = 1; COMB Node = 'ADPCM_Decoder_1_Bit:u6\|lpm_divide:Div0\|lpm_divide_aem:auto_generated\|sign_div_unsign_klh:divider\|alt_u_div_e2f:divider\|add_sub_13_result_int\[6\]~9'" {  } { { "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" "1.657 ns" { ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|StageOut[101]~550 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_13_result_int[6]~9 } "NODE_NAME" } } { "db/alt_u_div_e2f.tdf" "" { Text "D:/HD_ADPCM/HD_ADPCM_1Bit_Stereo_Decoder/db/alt_u_div_e2f.tdf" 51 23 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 -1} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.080 ns) 26.697 ns ADPCM_Decoder_1_Bit:u6\|lpm_divide:Div0\|lpm_divide_aem:auto_generated\|sign_div_unsign_klh:divider\|alt_u_div_e2f:divider\|add_sub_13_result_int\[7\]~11 51 COMB LCCOMB_X36_Y21_N12 1 " "Info: 51: + IC(0.000 ns) + CELL(0.080 ns) = 26.697 ns; Loc. = LCCOMB_X36_Y21_N12; Fanout = 1; COMB Node = 'ADPCM_Decoder_1_Bit:u6\|lpm_divide:Div0\|lpm_divide_aem:auto_generated\|sign_div_unsign_klh:divider\|alt_u_div_e2f:divider\|add_sub_13_result_int\[7\]~11'" {  } { { "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" "0.080 ns" { ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_13_result_int[6]~9 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_13_result_int[7]~11 } "NODE_NAME" } } { "db/alt_u_div_e2f.tdf" "" { Text "D:/HD_ADPCM/HD_ADPCM_1Bit_Stereo_Decoder/db/alt_u_div_e2f.tdf" 51 23 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 -1} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.458 ns) 27.155 ns ADPCM_Decoder_1_Bit:u6\|lpm_divide:Div0\|lpm_divide_aem:auto_generated\|sign_div_unsign_klh:divider\|alt_u_div_e2f:divider\|add_sub_13_result_int\[8\]~12 52 COMB LCCOMB_X36_Y21_N14 20 " "Info: 52: + IC(0.000 ns) + CELL(0.458 ns) = 27.155 ns; Loc. = LCCOMB_X36_Y21_N14; Fanout = 20; COMB Node = 'ADPCM_Decoder_1_Bit:u6\|lpm_divide:Div0\|lpm_divide_aem:auto_generated\|sign_div_unsign_klh:divider\|alt_u_div_e2f:divider\|add_sub_13_result_int\[8\]~12'" {  } { { "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" "0.458 ns" { ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_13_result_int[7]~11 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_13_result_int[8]~12 } "NODE_NAME" } } { "db/alt_u_div_e2f.tdf" "" { Text "D:/HD_ADPCM/HD_ADPCM_1Bit_Stereo_Decoder/db/alt_u_div_e2f.tdf" 51 23 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 -1} { "Info" "ITDB_NODE_DELAY" "IC(1.256 ns) + CELL(0.178 ns) 28.589 ns ADPCM_Decoder_1_Bit:u6\|lpm_divide:Div0\|lpm_divide_aem:auto_generated\|sign_div_unsign_klh:divider\|alt_u_div_e2f:divider\|StageOut\[110\]~553 53 COMB LCCOMB_X33_Y20_N22 1 " "Info: 53: + IC(1.256 ns) + CELL(0.178 ns) = 28.589 ns; Loc. = LCCOMB_X33_Y20_N22; Fanout = 1; COMB Node = 'ADPCM_Decoder_1_Bit:u6\|lpm_divide:Div0\|lpm_divide_aem:auto_generated\|sign_div_unsign_klh:divider\|alt_u_div_e2f:divider\|StageOut\[110\]~553'" {  } { { "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" "1.434 ns" { ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_13_result_int[8]~12 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|StageOut[110]~553 } "NODE_NAME" } } { "db/alt_u_div_e2f.tdf" "" { Text "D:/HD_ADPCM/HD_ADPCM_1Bit_Stereo_Decoder/db/alt_u_div_e2f.tdf" 138 10 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 -1} { "Info" "ITDB_NODE_DELAY" "IC(1.122 ns) + CELL(0.495 ns) 30.206 ns ADPCM_Decoder_1_Bit:u6\|lpm_divide:Div0\|lpm_divide_aem:auto_generated\|sign_div_unsign_klh:divider\|alt_u_div_e2f:divider\|add_sub_14_result_int\[7\]~11 54 COMB LCCOMB_X37_Y21_N26 1 " "Info: 54: + IC(1.122 ns) + CELL(0.495 ns) = 30.206 ns; Loc. = LCCOMB_X37_Y21_N26; Fanout = 1; COMB Node = 'ADPCM_Decoder_1_Bit:u6\|lpm_divide:Div0\|lpm_divide_aem:auto_generated\|sign_div_unsign_klh:divider\|alt_u_div_e2f:divider\|add_sub_14_result_int\[7\]~11'" {  } { { "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" "1.617 ns" { ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|StageOut[110]~553 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_14_result_int[7]~11 } "NODE_NAME" } } { "db/alt_u_div_e2f.tdf" "" { Text "D:/HD_ADPCM/HD_ADPCM_1Bit_Stereo_Decoder/db/alt_u_div_e2f.tdf" 56 23 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 -1} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.458 ns) 30.664 ns ADPCM_Decoder_1_Bit:u6\|lpm_divide:Div0\|lpm_divide_aem:auto_generated\|sign_div_unsign_klh:divider\|alt_u_div_e2f:divider\|add_sub_14_result_int\[8\]~12 55 COMB LCCOMB_X37_Y21_N28 20 " "Info: 55: + IC(0.000 ns) + CELL(0.458 ns) = 30.664 ns; Loc. = LCCOMB_X37_Y21_N28; Fanout = 20; COMB Node = 'ADPCM_Decoder_1_Bit:u6\|lpm_divide:Div0\|lpm_divide_aem:auto_generated\|sign_div_unsign_klh:divider\|alt_u_div_e2f:divider\|add_sub_14_result_int\[8\]~12'" {  } { { "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" "0.458 ns" { ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_14_result_int[7]~11 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_14_result_int[8]~12 } "NODE_NAME" } } { "db/alt_u_div_e2f.tdf" "" { Text "D:/HD_ADPCM/HD_ADPCM_1Bit_Stereo_Decoder/db/alt_u_div_e2f.tdf" 56 23 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 -1} { "Info" "ITDB_NODE_DELAY" "IC(0.352 ns) + CELL(0.178 ns) 31.194 ns ADPCM_Decoder_1_Bit:u6\|lpm_divide:Div0\|lpm_divide_aem:auto_generated\|sign_div_unsign_klh:divider\|alt_u_div_e2f:divider\|StageOut\[113\]~86 56 COMB LCCOMB_X37_Y21_N10 2 " "Info: 56: + IC(0.352 ns) + CELL(0.178 ns) = 31.194 ns; Loc. = LCCOMB_X37_Y21_N10; Fanout = 2; COMB Node = 'ADPCM_Decoder_1_Bit:u6\|lpm_divide:Div0\|lpm_divide_aem:auto_generated\|sign_div_unsign_klh:divider\|alt_u_div_e2f:divider\|StageOut\[113\]~86'" {  } { { "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" "0.530 ns" { ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_14_result_int[8]~12 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|StageOut[113]~86 } "NODE_NAME" } } { "db/alt_u_div_e2f.tdf" "" { Text "D:/HD_ADPCM/HD_ADPCM_1Bit_Stereo_Decoder/db/alt_u_div_e2f.tdf" 138 10 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 -1} { "Info" "ITDB_NODE_DELAY" "IC(1.144 ns) + CELL(0.517 ns) 32.855 ns ADPCM_Decoder_1_Bit:u6\|lpm_divide:Div0\|lpm_divide_aem:auto_generated\|sign_div_unsign_klh:divider\|alt_u_div_e2f:divider\|add_sub_15_result_int\[2\]~1 57 COMB LCCOMB_X38_Y20_N16 2 " "Info: 57: + IC(1.144 ns) + CELL(0.517 ns) = 32.855 ns; Loc. = LCCOMB_X38_Y20_N16; Fanout = 2; COMB Node = 'ADPCM_Decoder_1_Bit:u6\|lpm_divide:Div0\|lpm_divide_aem:auto_generated\|sign_div_unsign_klh:divider\|alt_u_div_e2f:divider\|add_sub_15_result_int\[2\]~1'" {  } { { "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" "1.661 ns" { ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|StageOut[113]~86 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_15_result_int[2]~1 } "NODE_NAME" } } { "db/alt_u_div_e2f.tdf" "" { Text "D:/HD_ADPCM/HD_ADPCM_1Bit_Stereo_Decoder/db/alt_u_div_e2f.tdf" 61 23 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 -1} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.080 ns) 32.935 ns ADPCM_Decoder_1_Bit:u6\|lpm_divide:Div0\|lpm_divide_aem:auto_generated\|sign_div_unsign_klh:divider\|alt_u_div_e2f:divider\|add_sub_15_result_int\[3\]~3 58 COMB LCCOMB_X38_Y20_N18 2 " "Info: 58: + IC(0.000 ns) + CELL(0.080 ns) = 32.935 ns; Loc. = LCCOMB_X38_Y20_N18; Fanout = 2; COMB Node = 'ADPCM_Decoder_1_Bit:u6\|lpm_divide:Div0\|lpm_divide_aem:auto_generated\|sign_div_unsign_klh:divider\|alt_u_div_e2f:divider\|add_sub_15_result_int\[3\]~3'" {  } { { "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" "0.080 ns" { ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_15_result_int[2]~1 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_15_result_int[3]~3 } "NODE_NAME" } } { "db/alt_u_div_e2f.tdf" "" { Text "D:/HD_ADPCM/HD_ADPCM_1Bit_Stereo_Decoder/db/alt_u_div_e2f.tdf" 61 23 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 -1} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.080 ns) 33.015 ns ADPCM_Decoder_1_Bit:u6\|lpm_divide:Div0\|lpm_divide_aem:auto_generated\|sign_div_unsign_klh:divider\|alt_u_div_e2f:divider\|add_sub_15_result_int\[4\]~5 59 COMB LCCOMB_X38_Y20_N20 2 " "Info: 59: + IC(0.000 ns) + CELL(0.080 ns) = 33.015 ns; Loc. = LCCOMB_X38_Y20_N20; Fanout = 2; COMB Node = 'ADPCM_Decoder_1_Bit:u6\|lpm_divide:Div0\|lpm_divide_aem:auto_generated\|sign_div_unsign_klh:divider\|alt_u_div_e2f:divider\|add_sub_15_result_int\[4\]~5'" {  } { { "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" "0.080 ns" { ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_15_result_int[3]~3 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_15_result_int[4]~5 } "NODE_NAME" } } { "db/alt_u_div_e2f.tdf" "" { Text "D:/HD_ADPCM/HD_ADPCM_1Bit_Stereo_Decoder/db/alt_u_div_e2f.tdf" 61 23 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 -1} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.080 ns) 33.095 ns ADPCM_Decoder_1_Bit:u6\|lpm_divide:Div0\|lpm_divide_aem:auto_generated\|sign_div_unsign_klh:divider\|alt_u_div_e2f:divider\|add_sub_15_result_int\[5\]~7 60 COMB LCCOMB_X38_Y20_N22 2 " "Info: 60: + IC(0.000 ns) + CELL(0.080 ns) = 33.095 ns; Loc. = LCCOMB_X38_Y20_N22; Fanout = 2; COMB Node = 'ADPCM_Decoder_1_Bit:u6\|lpm_divide:Div0\|lpm_divide_aem:auto_generated\|sign_div_unsign_klh:divider\|alt_u_div_e2f:divider\|add_sub_15_result_int\[5\]~7'" {  } { { "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" "0.080 ns" { ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_15_result_int[4]~5 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_15_result_int[5]~7 } "NODE_NAME" } } { "db/alt_u_div_e2f.tdf" "" { Text "D:/HD_ADPCM/HD_ADPCM_1Bit_Stereo_Decoder/db/alt_u_div_e2f.tdf" 61 23 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 -1} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.080 ns) 33.175 ns ADPCM_Decoder_1_Bit:u6\|lpm_divide:Div0\|lpm_divide_aem:auto_generated\|sign_div_unsign_klh:divider\|alt_u_div_e2f:divider\|add_sub_15_result_int\[6\]~9 61 COMB LCCOMB_X38_Y20_N24 1 " "Info: 61: + IC(0.000 ns) + CELL(0.080 ns) = 33.175 ns; Loc. = LCCOMB_X38_Y20_N24; Fanout = 1; COMB Node = 'ADPCM_Decoder_1_Bit:u6\|lpm_divide:Div0\|lpm_divide_aem:auto_generated\|sign_div_unsign_klh:divider\|alt_u_div_e2f:divider\|add_sub_15_result_int\[6\]~9'" {  } { { "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" "0.080 ns" { ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_15_result_int[5]~7 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_15_result_int[6]~9 } "NODE_NAME" } } { "db/alt_u_div_e2f.tdf" "" { Text "D:/HD_ADPCM/HD_ADPCM_1Bit_Stereo_Decoder/db/alt_u_div_e2f.tdf" 61 23 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 -1} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.080 ns) 33.255 ns ADPCM_Decoder_1_Bit:u6\|lpm_divide:Div0\|lpm_divide_aem:auto_generated\|sign_div_unsign_klh:divider\|alt_u_div_e2f:divider\|add_sub_15_result_int\[7\]~11 62 COMB LCCOMB_X38_Y20_N26 1 " "Info: 62: + IC(0.000 ns) + CELL(0.080 ns) = 33.255 ns; Loc. = LCCOMB_X38_Y20_N26; Fanout = 1; COMB Node = 'ADPCM_Decoder_1_Bit:u6\|lpm_divide:Div0\|lpm_divide_aem:auto_generated\|sign_div_unsign_klh:divider\|alt_u_div_e2f:divider\|add_sub_15_result_int\[7\]~11'" {  } { { "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" "0.080 ns" { ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_15_result_int[6]~9 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_15_result_int[7]~11 } "NODE_NAME" } } { "db/alt_u_div_e2f.tdf" "" { Text "D:/HD_ADPCM/HD_ADPCM_1Bit_Stereo_Decoder/db/alt_u_div_e2f.tdf" 61 23 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 -1} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.458 ns) 33.713 ns ADPCM_Decoder_1_Bit:u6\|lpm_divide:Div0\|lpm_divide_aem:auto_generated\|sign_div_unsign_klh:divider\|alt_u_div_e2f:divider\|add_sub_15_result_int\[8\]~12 63 COMB LCCOMB_X38_Y20_N28 20 " "Info: 63: + IC(0.000 ns) + CELL(0.458 ns) = 33.713 ns; Loc. = LCCOMB_X38_Y20_N28; Fanout = 20; COMB Node = 'ADPCM_Decoder_1_Bit:u6\|lpm_divide:Div0\|lpm_divide_aem:auto_generated\|sign_div_unsign_klh:divider\|alt_u_div_e2f:divider\|add_sub_15_result_int\[8\]~12'" {  } { { "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" "0.458 ns" { ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_15_result_int[7]~11 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_15_result_int[8]~12 } "NODE_NAME" } } { "db/alt_u_div_e2f.tdf" "" { Text "D:/HD_ADPCM/HD_ADPCM_1Bit_Stereo_Decoder/db/alt_u_div_e2f.tdf" 61 23 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 -1} { "Info" "ITDB_NODE_DELAY" "IC(0.621 ns) + CELL(0.178 ns) 34.512 ns ADPCM_Decoder_1_Bit:u6\|lpm_divide:Div0\|lpm_divide_aem:auto_generated\|sign_div_unsign_klh:divider\|alt_u_div_e2f:divider\|StageOut\[124\]~563 64 COMB LCCOMB_X37_Y20_N24 3 " "Info: 64: + IC(0.621 ns) + CELL(0.178 ns) = 34.512 ns; Loc. = LCCOMB_X37_Y20_N24; Fanout = 3; COMB Node = 'ADPCM_Decoder_1_Bit:u6\|lpm_divide:Div0\|lpm_divide_aem:auto_generated\|sign_div_unsign_klh:divider\|alt_u_div_e2f:divider\|StageOut\[124\]~563'" {  } { { "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" "0.799 ns" { ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_15_result_int[8]~12 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|StageOut[124]~563 } "NODE_NAME" } } { "db/alt_u_div_e2f.tdf" "" { Text "D:/HD_ADPCM/HD_ADPCM_1Bit_Stereo_Decoder/db/alt_u_div_e2f.tdf" 138 10 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 -1} { "Info" "ITDB_NODE_DELAY" "IC(0.806 ns) + CELL(0.495 ns) 35.813 ns ADPCM_Decoder_1_Bit:u6\|lpm_divide:Div0\|lpm_divide_aem:auto_generated\|sign_div_unsign_klh:divider\|alt_u_div_e2f:divider\|add_sub_16_result_int\[5\]~7 65 COMB LCCOMB_X39_Y20_N6 2 " "Info: 65: + IC(0.806 ns) + CELL(0.495 ns) = 35.813 ns; Loc. = LCCOMB_X39_Y20_N6; Fanout = 2; COMB Node = 'ADPCM_Decoder_1_Bit:u6\|lpm_divide:Div0\|lpm_divide_aem:auto_generated\|sign_div_unsign_klh:divider\|alt_u_div_e2f:divider\|add_sub_16_result_int\[5\]~7'" {  } { { "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" "1.301 ns" { ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|StageOut[124]~563 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_16_result_int[5]~7 } "NODE_NAME" } } { "db/alt_u_div_e2f.tdf" "" { Text "D:/HD_ADPCM/HD_ADPCM_1Bit_Stereo_Decoder/db/alt_u_div_e2f.tdf" 66 23 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 -1} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.080 ns) 35.893 ns ADPCM_Decoder_1_Bit:u6\|lpm_divide:Div0\|lpm_divide_aem:auto_generated\|sign_div_unsign_klh:divider\|alt_u_div_e2f:divider\|add_sub_16_result_int\[6\]~9 66 COMB LCCOMB_X39_Y20_N8 1 " "Info: 66: + IC(0.000 ns) + CELL(0.080 ns) = 35.893 ns; Loc. = LCCOMB_X39_Y20_N8; Fanout = 1; COMB Node = 'ADPCM_Decoder_1_Bit:u6\|lpm_divide:Div0\|lpm_divide_aem:auto_generated\|sign_div_unsign_klh:divider\|alt_u_div_e2f:divider\|add_sub_16_result_int\[6\]~9'" {  } { { "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" "0.080 ns" { ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_16_result_int[5]~7 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_16_result_int[6]~9 } "NODE_NAME" } } { "db/alt_u_div_e2f.tdf" "" { Text "D:/HD_ADPCM/HD_ADPCM_1Bit_Stereo_Decoder/db/alt_u_div_e2f.tdf" 66 23 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 -1} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.080 ns) 35.973 ns ADPCM_Decoder_1_Bit:u6\|lpm_divide:Div0\|lpm_divide_aem:auto_generated\|sign_div_unsign_klh:divider\|alt_u_div_e2f:divider\|add_sub_16_result_int\[7\]~11 67 COMB LCCOMB_X39_Y20_N10 1 " "Info: 67: + IC(0.000 ns) + CELL(0.080 ns) = 35.973 ns; Loc. = LCCOMB_X39_Y20_N10; Fanout = 1; COMB Node = 'ADPCM_Decoder_1_Bit:u6\|lpm_divide:Div0\|lpm_divide_aem:auto_generated\|sign_div_unsign_klh:divider\|alt_u_div_e2f:divider\|add_sub_16_result_int\[7\]~11'" {  } { { "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" "0.080 ns" { ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_16_result_int[6]~9 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_16_result_int[7]~11 } "NODE_NAME" } } { "db/alt_u_div_e2f.tdf" "" { Text "D:/HD_ADPCM/HD_ADPCM_1Bit_Stereo_Decoder/db/alt_u_div_e2f.tdf" 66 23 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 -1} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.458 ns) 36.431 ns ADPCM_Decoder_1_Bit:u6\|lpm_divide:Div0\|lpm_divide_aem:auto_generated\|sign_div_unsign_klh:divider\|alt_u_div_e2f:divider\|add_sub_16_result_int\[8\]~12 68 COMB LCCOMB_X39_Y20_N12 20 " "Info: 68: + IC(0.000 ns) + CELL(0.458 ns) = 36.431 ns; Loc. = LCCOMB_X39_Y20_N12; Fanout = 20; COMB Node = 'ADPCM_Decoder_1_Bit:u6\|lpm_divide:Div0\|lpm_divide_aem:auto_generated\|sign_div_unsign_klh:divider\|alt_u_div_e2f:divider\|add_sub_16_result_int\[8\]~12'" {  } { { "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" "0.458 ns" { ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_16_result_int[7]~11 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_16_result_int[8]~12 } "NODE_NAME" } } { "db/alt_u_div_e2f.tdf" "" { Text "D:/HD_ADPCM/HD_ADPCM_1Bit_Stereo_Decoder/db/alt_u_div_e2f.tdf" 66 23 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 -1} { "Info" "ITDB_NODE_DELAY" "IC(1.014 ns) + CELL(0.178 ns) 37.623 ns ADPCM_Decoder_1_Bit:u6\|lpm_divide:Div0\|lpm_divide_aem:auto_generated\|sign_div_unsign_klh:divider\|alt_u_div_e2f:divider\|StageOut\[132\]~567 69 COMB LCCOMB_X39_Y18_N4 3 " "Info: 69: + IC(1.014 ns) + CELL(0.178 ns) = 37.623 ns; Loc. = LCCOMB_X39_Y18_N4; Fanout = 3; COMB Node = 'ADPCM_Decoder_1_Bit:u6\|lpm_divide:Div0\|lpm_divide_aem:auto_generated\|sign_div_unsign_klh:divider\|alt_u_div_e2f:divider\|StageOut\[132\]~567'" {  } { { "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" "1.192 ns" { ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_16_result_int[8]~12 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|StageOut[132]~567 } "NODE_NAME" } } { "db/alt_u_div_e2f.tdf" "" { Text "D:/HD_ADPCM/HD_ADPCM_1Bit_Stereo_Decoder/db/alt_u_div_e2f.tdf" 138 10 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 -1} { "Info" "ITDB_NODE_DELAY" "IC(0.913 ns) + CELL(0.517 ns) 39.053 ns ADPCM_Decoder_1_Bit:u6\|lpm_divide:Div0\|lpm_divide_aem:auto_generated\|sign_div_unsign_klh:divider\|alt_u_div_e2f:divider\|add_sub_17_result_int\[5\]~7 70 COMB LCCOMB_X40_Y20_N16 2 " "Info: 70: + IC(0.913 ns) + CELL(0.517 ns) = 39.053 ns; Loc. = LCCOMB_X40_Y20_N16; Fanout = 2; COMB Node = 'ADPCM_Decoder_1_Bit:u6\|lpm_divide:Div0\|lpm_divide_aem:auto_generated\|sign_div_unsign_klh:divider\|alt_u_div_e2f:divider\|add_sub_17_result_int\[5\]~7'" {  } { { "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" "1.430 ns" { ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|StageOut[132]~567 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_17_result_int[5]~7 } "NODE_NAME" } } { "db/alt_u_div_e2f.tdf" "" { Text "D:/HD_ADPCM/HD_ADPCM_1Bit_Stereo_Decoder/db/alt_u_div_e2f.tdf" 71 23 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 -1} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.080 ns) 39.133 ns ADPCM_Decoder_1_Bit:u6\|lpm_divide:Div0\|lpm_divide_aem:auto_generated\|sign_div_unsign_klh:divider\|alt_u_div_e2f:divider\|add_sub_17_result_int\[6\]~9 71 COMB LCCOMB_X40_Y20_N18 1 " "Info: 71: + IC(0.000 ns) + CELL(0.080 ns) = 39.133 ns; Loc. = LCCOMB_X40_Y20_N18; Fanout = 1; COMB Node = 'ADPCM_Decoder_1_Bit:u6\|lpm_divide:Div0\|lpm_divide_aem:auto_generated\|sign_div_unsign_klh:divider\|alt_u_div_e2f:divider\|add_sub_17_result_int\[6\]~9'" {  } { { "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" "0.080 ns" { ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_17_result_int[5]~7 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_17_result_int[6]~9 } "NODE_NAME" } } { "db/alt_u_div_e2f.tdf" "" { Text "D:/HD_ADPCM/HD_ADPCM_1Bit_Stereo_Decoder/db/alt_u_div_e2f.tdf" 71 23 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 -1} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.080 ns) 39.213 ns ADPCM_Decoder_1_Bit:u6\|lpm_divide:Div0\|lpm_divide_aem:auto_generated\|sign_div_unsign_klh:divider\|alt_u_div_e2f:divider\|add_sub_17_result_int\[7\]~11 72 COMB LCCOMB_X40_Y20_N20 1 " "Info: 72: + IC(0.000 ns) + CELL(0.080 ns) = 39.213 ns; Loc. = LCCOMB_X40_Y20_N20; Fanout = 1; COMB Node = 'ADPCM_Decoder_1_Bit:u6\|lpm_divide:Div0\|lpm_divide_aem:auto_generated\|sign_div_unsign_klh:divider\|alt_u_div_e2f:divider\|add_sub_17_result_int\[7\]~11'" {  } { { "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" "0.080 ns" { ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_17_result_int[6]~9 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_17_result_int[7]~11 } "NODE_NAME" } } { "db/alt_u_div_e2f.tdf" "" { Text "D:/HD_ADPCM/HD_ADPCM_1Bit_Stereo_Decoder/db/alt_u_div_e2f.tdf" 71 23 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 -1} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.458 ns) 39.671 ns ADPCM_Decoder_1_Bit:u6\|lpm_divide:Div0\|lpm_divide_aem:auto_generated\|sign_div_unsign_klh:divider\|alt_u_div_e2f:divider\|add_sub_17_result_int\[8\]~12 73 COMB LCCOMB_X40_Y20_N22 20 " "Info: 73: + IC(0.000 ns) + CELL(0.458 ns) = 39.671 ns; Loc. = LCCOMB_X40_Y20_N22; Fanout = 20; COMB Node = 'ADPCM_Decoder_1_Bit:u6\|lpm_divide:Div0\|lpm_divide_aem:auto_generated\|sign_div_unsign_klh:divider\|alt_u_div_e2f:divider\|add_sub_17_result_int\[8\]~12'" {  } { { "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" "0.458 ns" { ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_17_result_int[7]~11 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_17_result_int[8]~12 } "NODE_NAME" } } { "db/alt_u_div_e2f.tdf" "" { Text "D:/HD_ADPCM/HD_ADPCM_1Bit_Stereo_Decoder/db/alt_u_div_e2f.tdf" 71 23 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 -1} { "Info" "ITDB_NODE_DELAY" "IC(0.915 ns) + CELL(0.178 ns) 40.764 ns ADPCM_Decoder_1_Bit:u6\|lpm_divide:Div0\|lpm_divide_aem:auto_generated\|sign_div_unsign_klh:divider\|alt_u_div_e2f:divider\|StageOut\[140\]~571 74 COMB LCCOMB_X39_Y18_N6 3 " "Info: 74: + IC(0.915 ns) + CELL(0.178 ns) = 40.764 ns; Loc. = LCCOMB_X39_Y18_N6; Fanout = 3; COMB Node = 'ADPCM_Decoder_1_Bit:u6\|lpm_divide:Div0\|lpm_divide_aem:auto_generated\|sign_div_unsign_klh:divider\|alt_u_div_e2f:divider\|StageOut\[140\]~571'" {  } { { "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" "1.093 ns" { ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_17_result_int[8]~12 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|StageOut[140]~571 } "NODE_NAME" } } { "db/alt_u_div_e2f.tdf" "" { Text "D:/HD_ADPCM/HD_ADPCM_1Bit_Stereo_Decoder/db/alt_u_div_e2f.tdf" 138 10 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 -1} { "Info" "ITDB_NODE_DELAY" "IC(0.911 ns) + CELL(0.620 ns) 42.295 ns ADPCM_Decoder_1_Bit:u6\|lpm_divide:Div0\|lpm_divide_aem:auto_generated\|sign_div_unsign_klh:divider\|alt_u_div_e2f:divider\|op_9~28 75 COMB LCCOMB_X40_Y19_N14 2 " "Info: 75: + IC(0.911 ns) + CELL(0.620 ns) = 42.295 ns; Loc. = LCCOMB_X40_Y19_N14; Fanout = 2; COMB Node = 'ADPCM_Decoder_1_Bit:u6\|lpm_divide:Div0\|lpm_divide_aem:auto_generated\|sign_div_unsign_klh:divider\|alt_u_div_e2f:divider\|op_9~28'" {  } { { "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" "1.531 ns" { ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|StageOut[140]~571 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|op_9~28 } "NODE_NAME" } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 -1} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.080 ns) 42.375 ns ADPCM_Decoder_1_Bit:u6\|lpm_divide:Div0\|lpm_divide_aem:auto_generated\|sign_div_unsign_klh:divider\|alt_u_div_e2f:divider\|op_9~30 76 COMB LCCOMB_X40_Y19_N16 1 " "Info: 76: + IC(0.000 ns) + CELL(0.080 ns) = 42.375 ns; Loc. = LCCOMB_X40_Y19_N16; Fanout = 1; COMB Node = 'ADPCM_Decoder_1_Bit:u6\|lpm_divide:Div0\|lpm_divide_aem:auto_generated\|sign_div_unsign_klh:divider\|alt_u_div_e2f:divider\|op_9~30'" {  } { { "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" "0.080 ns" { ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|op_9~28 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|op_9~30 } "NODE_NAME" } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 -1} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.080 ns) 42.455 ns ADPCM_Decoder_1_Bit:u6\|lpm_divide:Div0\|lpm_divide_aem:auto_generated\|sign_div_unsign_klh:divider\|alt_u_div_e2f:divider\|op_9~32 77 COMB LCCOMB_X40_Y19_N18 1 " "Info: 77: + IC(0.000 ns) + CELL(0.080 ns) = 42.455 ns; Loc. = LCCOMB_X40_Y19_N18; Fanout = 1; COMB Node = 'ADPCM_Decoder_1_Bit:u6\|lpm_divide:Div0\|lpm_divide_aem:auto_generated\|sign_div_unsign_klh:divider\|alt_u_div_e2f:divider\|op_9~32'" {  } { { "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" "0.080 ns" { ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|op_9~30 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|op_9~32 } "NODE_NAME" } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 -1} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.458 ns) 42.913 ns ADPCM_Decoder_1_Bit:u6\|lpm_divide:Div0\|lpm_divide_aem:auto_generated\|sign_div_unsign_klh:divider\|alt_u_div_e2f:divider\|op_9~33 78 COMB LCCOMB_X40_Y19_N20 13 " "Info: 78: + IC(0.000 ns) + CELL(0.458 ns) = 42.913 ns; Loc. = LCCOMB_X40_Y19_N20; Fanout = 13; COMB Node = 'ADPCM_Decoder_1_Bit:u6\|lpm_divide:Div0\|lpm_divide_aem:auto_generated\|sign_div_unsign_klh:divider\|alt_u_div_e2f:divider\|op_9~33'" {  } { { "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" "0.458 ns" { ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|op_9~32 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|op_9~33 } "NODE_NAME" } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 -1} { "Info" "ITDB_NODE_DELAY" "IC(0.350 ns) + CELL(0.322 ns) 43.585 ns ADPCM_Decoder_1_Bit:u6\|lpm_divide:Div0\|lpm_divide_aem:auto_generated\|sign_div_unsign_klh:divider\|alt_u_div_e2f:divider\|StageOut\[147\]~28 79 COMB LCCOMB_X40_Y19_N24 1 " "Info: 79: + IC(0.350 ns) + CELL(0.322 ns) = 43.585 ns; Loc. = LCCOMB_X40_Y19_N24; Fanout = 1; COMB Node = 'ADPCM_Decoder_1_Bit:u6\|lpm_divide:Div0\|lpm_divide_aem:auto_generated\|sign_div_unsign_klh:divider\|alt_u_div_e2f:divider\|StageOut\[147\]~28'" {  } { { "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" "0.672 ns" { ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|op_9~33 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|StageOut[147]~28 } "NODE_NAME" } } { "db/alt_u_div_e2f.tdf" "" { Text "D:/HD_ADPCM/HD_ADPCM_1Bit_Stereo_Decoder/db/alt_u_div_e2f.tdf" 138 10 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 -1} { "Info" "ITDB_NODE_DELAY" "IC(0.823 ns) + CELL(0.517 ns) 44.925 ns ADPCM_Decoder_1_Bit:u6\|lpm_divide:Div0\|lpm_divide_aem:auto_generated\|sign_div_unsign_klh:divider\|alt_u_div_e2f:divider\|add_sub_19_result_int\[4\]~5 80 COMB LCCOMB_X39_Y19_N6 1 " "Info: 80: + IC(0.823 ns) + CELL(0.517 ns) = 44.925 ns; Loc. = LCCOMB_X39_Y19_N6; Fanout = 1; COMB Node = 'ADPCM_Decoder_1_Bit:u6\|lpm_divide:Div0\|lpm_divide_aem:auto_generated\|sign_div_unsign_klh:divider\|alt_u_div_e2f:divider\|add_sub_19_result_int\[4\]~5'" {  } { { "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" "1.340 ns" { ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|StageOut[147]~28 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_19_result_int[4]~5 } "NODE_NAME" } } { "db/alt_u_div_e2f.tdf" "" { Text "D:/HD_ADPCM/HD_ADPCM_1Bit_Stereo_Decoder/db/alt_u_div_e2f.tdf" 81 23 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 -1} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.080 ns) 45.005 ns ADPCM_Decoder_1_Bit:u6\|lpm_divide:Div0\|lpm_divide_aem:auto_generated\|sign_div_unsign_klh:divider\|alt_u_div_e2f:divider\|add_sub_19_result_int\[5\]~7 81 COMB LCCOMB_X39_Y19_N8 1 " "Info: 81: + IC(0.000 ns) + CELL(0.080 ns) = 45.005 ns; Loc. = LCCOMB_X39_Y19_N8; Fanout = 1; COMB Node = 'ADPCM_Decoder_1_Bit:u6\|lpm_divide:Div0\|lpm_divide_aem:auto_generated\|sign_div_unsign_klh:divider\|alt_u_div_e2f:divider\|add_sub_19_result_int\[5\]~7'" {  } { { "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" "0.080 ns" { ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_19_result_int[4]~5 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_19_result_int[5]~7 } "NODE_NAME" } } { "db/alt_u_div_e2f.tdf" "" { Text "D:/HD_ADPCM/HD_ADPCM_1Bit_Stereo_Decoder/db/alt_u_div_e2f.tdf" 81 23 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 -1} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.080 ns) 45.085 ns ADPCM_Decoder_1_Bit:u6\|lpm_divide:Div0\|lpm_divide_aem:auto_generated\|sign_div_unsign_klh:divider\|alt_u_div_e2f:divider\|add_sub_19_result_int\[6\]~9 82 COMB LCCOMB_X39_Y19_N10 1 " "Info: 82: + IC(0.000 ns) + CELL(0.080 ns) = 45.085 ns; Loc. = LCCOMB_X39_Y19_N10; Fanout = 1; COMB Node = 'ADPCM_Decoder_1_Bit:u6\|lpm_divide:Div0\|lpm_divide_aem:auto_generated\|sign_div_unsign_klh:divider\|alt_u_div_e2f:divider\|add_sub_19_result_int\[6\]~9'" {  } { { "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" "0.080 ns" { ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_19_result_int[5]~7 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_19_result_int[6]~9 } "NODE_NAME" } } { "db/alt_u_div_e2f.tdf" "" { Text "D:/HD_ADPCM/HD_ADPCM_1Bit_Stereo_Decoder/db/alt_u_div_e2f.tdf" 81 23 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 -1} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.080 ns) 45.165 ns ADPCM_Decoder_1_Bit:u6\|lpm_divide:Div0\|lpm_divide_aem:auto_generated\|sign_div_unsign_klh:divider\|alt_u_div_e2f:divider\|add_sub_19_result_int\[7\]~11 83 COMB LCCOMB_X39_Y19_N12 1 " "Info: 83: + IC(0.000 ns) + CELL(0.080 ns) = 45.165 ns; Loc. = LCCOMB_X39_Y19_N12; Fanout = 1; COMB Node = 'ADPCM_Decoder_1_Bit:u6\|lpm_divide:Div0\|lpm_divide_aem:auto_generated\|sign_div_unsign_klh:divider\|alt_u_div_e2f:divider\|add_sub_19_result_int\[7\]~11'" {  } { { "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" "0.080 ns" { ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_19_result_int[6]~9 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_19_result_int[7]~11 } "NODE_NAME" } } { "db/alt_u_div_e2f.tdf" "" { Text "D:/HD_ADPCM/HD_ADPCM_1Bit_Stereo_Decoder/db/alt_u_div_e2f.tdf" 81 23 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 -1} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.458 ns) 45.623 ns ADPCM_Decoder_1_Bit:u6\|lpm_divide:Div0\|lpm_divide_aem:auto_generated\|sign_div_unsign_klh:divider\|alt_u_div_e2f:divider\|add_sub_19_result_int\[8\]~12 84 COMB LCCOMB_X39_Y19_N14 1 " "Info: 84: + IC(0.000 ns) + CELL(0.458 ns) = 45.623 ns; Loc. = LCCOMB_X39_Y19_N14; Fanout = 1; COMB Node = 'ADPCM_Decoder_1_Bit:u6\|lpm_divide:Div0\|lpm_divide_aem:auto_generated\|sign_div_unsign_klh:divider\|alt_u_div_e2f:divider\|add_sub_19_result_int\[8\]~12'" {  } { { "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" "0.458 ns" { ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_19_result_int[7]~11 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_19_result_int[8]~12 } "NODE_NAME" } } { "db/alt_u_div_e2f.tdf" "" { Text "D:/HD_ADPCM/HD_ADPCM_1Bit_Stereo_Decoder/db/alt_u_div_e2f.tdf" 81 23 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 -1} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.096 ns) 45.719 ns ADPCM_Decoder_1_Bit:u6\|PCM_Data_Difference\[0\] 85 REG LCFF_X39_Y19_N15 1 " "Info: 85: + IC(0.000 ns) + CELL(0.096 ns) = 45.719 ns; Loc. = LCFF_X39_Y19_N15; Fanout = 1; REG Node = 'ADPCM_Decoder_1_Bit:u6\|PCM_Data_Difference\[0\]'" {  } { { "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" "0.096 ns" { ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_19_result_int[8]~12 ADPCM_Decoder_1_Bit:u6|PCM_Data_Difference[0] } "NODE_NAME" } } { "HD_ADPCM_Codec.vhd" "" { Text "D:/HD_ADPCM/HD_ADPCM_1Bit_Stereo_Decoder/HD_ADPCM_Codec.vhd" 943 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 -1} { "Info" "ITDB_TOTAL_CELL_DELAY" "23.293 ns ( 50.95 % ) " "Info: Total cell delay = 23.293 ns ( 50.95 % )" {  } {  } 0 0 "Total cell delay = %1!s! %2!s!" 0 0 "" 0 -1} { "Info" "ITDB_TOTAL_IC_DELAY" "22.426 ns ( 49.05 % ) " "Info: Total interconnect delay = 22.426 ns ( 49.05 % )" {  } {  } 0 0 "Total interconnect delay = %1!s! %2!s!" 0 0 "" 0 -1}  } { { "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" "45.719 ns" { ADPCM_Decoder_1_Bit:u6|ADPCM_Decoder_Step_Size_Table_Pointer[0] ADPCM_Decoder_1_Bit:u6|lpm_mult:Mult0|mult_pu01:auto_generated|mac_mult1~DATAOUT15 ADPCM_Decoder_1_Bit:u6|lpm_mult:Mult0|mult_pu01:auto_generated|mac_out2~DATAOUT15 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_6_result_int[2]~1 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_6_result_int[3]~3 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_6_result_int[4]~5 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_6_result_int[5]~7 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_6_result_int[6]~9 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_6_result_int[7]~10 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|StageOut[50]~221 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_7_result_int[3]~3 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_7_result_int[4]~5 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_7_result_int[5]~7 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_7_result_int[6]~9 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_7_result_int[7]~11 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_7_result_int[8]~12 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|StageOut[58]~197 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_8_result_int[3]~3 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_8_result_int[4]~5 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_8_result_int[5]~7 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_8_result_int[6]~9 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_8_result_int[7]~11 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_8_result_int[8]~12 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|StageOut[67]~581 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_9_result_int[4]~5 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_9_result_int[5]~7 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_9_result_int[6]~9 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_9_result_int[7]~11 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_9_result_int[8]~12 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|StageOut[73]~166 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_10_result_int[2]~1 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_10_result_int[3]~3 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_10_result_int[4]~5 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_10_result_int[5]~7 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_10_result_int[6]~9 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_10_result_int[7]~11 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_10_result_int[8]~12 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|StageOut[83]~544 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_11_result_int[4]~5 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_11_result_int[5]~7 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_11_result_int[6]~9 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_11_result_int[7]~11 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_11_result_int[8]~12 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|StageOut[92]~547 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_12_result_int[5]~7 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_12_result_int[6]~9 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_12_result_int[7]~11 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_12_result_int[8]~12 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|StageOut[101]~550 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_13_result_int[6]~9 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_13_result_int[7]~11 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_13_result_int[8]~12 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|StageOut[110]~553 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_14_result_int[7]~11 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_14_result_int[8]~12 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|StageOut[113]~86 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_15_result_int[2]~1 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_15_result_int[3]~3 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_15_result_int[4]~5 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_15_result_int[5]~7 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_15_result_int[6]~9 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_15_result_int[7]~11 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_15_result_int[8]~12 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|StageOut[124]~563 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_16_result_int[5]~7 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_16_result_int[6]~9 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_16_result_int[7]~11 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_16_result_int[8]~12 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|StageOut[132]~567 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_17_result_int[5]~7 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_17_result_int[6]~9 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_17_result_int[7]~11 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_17_result_int[8]~12 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|StageOut[140]~571 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|op_9~28 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|op_9~30 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|op_9~32 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|op_9~33 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|StageOut[147]~28 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_19_result_int[4]~5 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_19_result_int[5]~7 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_19_result_int[6]~9 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_19_result_int[7]~11 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_19_result_int[8]~12 ADPCM_Decoder_1_Bit:u6|PCM_Data_Difference[0] } "NODE_NAME" } } { "c:/altera/90/quartus/bin/Technology_Viewer.qrui" "" { "TechnologyMapViewer" "c:/altera/90/quartus/bin/Technology_Viewer.qrui" "45.719 ns" { ADPCM_Decoder_1_Bit:u6|ADPCM_Decoder_Step_Size_Table_Pointer[0] {} ADPCM_Decoder_1_Bit:u6|lpm_mult:Mult0|mult_pu01:auto_generated|mac_mult1~DATAOUT15 {} ADPCM_Decoder_1_Bit:u6|lpm_mult:Mult0|mult_pu01:auto_generated|mac_out2~DATAOUT15 {} ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_6_result_int[2]~1 {} ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_6_result_int[3]~3 {} ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_6_result_int[4]~5 {} ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_6_result_int[5]~7 {} ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_6_result_int[6]~9 {} ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_6_result_int[7]~10 {} ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|StageOut[50]~221 {} ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_7_result_int[3]~3 {} ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_7_result_int[4]~5 {} ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_7_result_int[5]~7 {} ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_7_result_int[6]~9 {} ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_7_result_int[7]~11 {} ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_7_result_int[8]~12 {} ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|StageOut[58]~197 {} ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_8_result_int[3]~3 {} ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_8_result_int[4]~5 {} ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_8_result_int[5]~7 {} ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_8_result_int[6]~9 {} ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_8_result_int[7]~11 {} ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_8_result_int[8]~12 {} ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|StageOut[67]~581 {} ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_9_result_int[4]~5 {} ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_9_result_int[5]~7 {} ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_9_result_int[6]~9 {} ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_9_result_int[7]~11 {} ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_9_result_int[8]~12 {} ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|StageOut[73]~166 {} ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_10_result_int[2]~1 {} ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_10_result_int[3]~3 {} ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_10_result_int[4]~5 {} ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_10_result_int[5]~7 {} ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_10_result_int[6]~9 {} ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_10_result_int[7]~11 {} ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_10_result_int[8]~12 {} ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|StageOut[83]~544 {} ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_11_result_int[4]~5 {} ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_11_result_int[5]~7 {} ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_11_result_int[6]~9 {} ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_11_result_int[7]~11 {} ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_11_result_int[8]~12 {} ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|StageOut[92]~547 {} ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_12_result_int[5]~7 {} ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_12_result_int[6]~9 {} ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_12_result_int[7]~11 {} ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_12_result_int[8]~12 {} ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|StageOut[101]~550 {} ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_13_result_int[6]~9 {} ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_13_result_int[7]~11 {} ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_13_result_int[8]~12 {} ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|StageOut[110]~553 {} ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_14_result_int[7]~11 {} ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_14_result_int[8]~12 {} ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|StageOut[113]~86 {} ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_15_result_int[2]~1 {} ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_15_result_int[3]~3 {} ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_15_result_int[4]~5 {} ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_15_result_int[5]~7 {} ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_15_result_int[6]~9 {} ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_15_result_int[7]~11 {} ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_15_result_int[8]~12 {} ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|StageOut[124]~563 {} ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_16_result_int[5]~7 {} ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_16_result_int[6]~9 {} ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_16_result_int[7]~11 {} ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_16_result_int[8]~12 {} ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|StageOut[132]~567 {} ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_17_result_int[5]~7 {} ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_17_result_int[6]~9 {} ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_17_result_int[7]~11 {} ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_17_result_int[8]~12 {} ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|StageOut[140]~571 {} ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|op_9~28 {} ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|op_9~30 {} ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|op_9~32 {} ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|op_9~33 {} ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|StageOut[147]~28 {} ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_19_result_int[4]~5 {} ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_19_result_int[5]~7 {} ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_19_result_int[6]~9 {} ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_19_result_int[7]~11 {} ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_19_result_int[8]~12 {} ADPCM_Decoder_1_Bit:u6|PCM_Data_Difference[0] {} } { 0.000ns 0.000ns 0.000ns 0.777ns 0.000ns 0.000ns 0.000ns 0.000ns 0.000ns 0.899ns 0.867ns 0.000ns 0.000ns 0.000ns 0.000ns 0.000ns 0.528ns 0.847ns 0.000ns 0.000ns 0.000ns 0.000ns 0.000ns 0.819ns 1.165ns 0.000ns 0.000ns 0.000ns 0.000ns 0.328ns 0.816ns 0.000ns 0.000ns 0.000ns 0.000ns 0.000ns 0.000ns 0.617ns 0.799ns 0.000ns 0.000ns 0.000ns 0.000ns 0.877ns 0.822ns 0.000ns 0.000ns 0.000ns 0.876ns 1.162ns 0.000ns 0.000ns 1.256ns 1.122ns 0.000ns 0.352ns 1.144ns 0.000ns 0.000ns 0.000ns 0.000ns 0.000ns 0.000ns 0.621ns 0.806ns 0.000ns 0.000ns 0.000ns 1.014ns 0.913ns 0.000ns 0.000ns 0.000ns 0.915ns 0.911ns 0.000ns 0.000ns 0.000ns 0.350ns 0.823ns 0.000ns 0.000ns 0.000ns 0.000ns 0.000ns } { 0.000ns 3.257ns 0.304ns 0.495ns 0.080ns 0.080ns 0.080ns 0.080ns 0.458ns 0.322ns 0.495ns 0.080ns 0.080ns 0.080ns 0.080ns 0.458ns 0.178ns 0.517ns 0.080ns 0.080ns 0.080ns 0.080ns 0.458ns 0.178ns 0.495ns 0.080ns 0.080ns 0.080ns 0.458ns 0.319ns 0.517ns 0.174ns 0.080ns 0.080ns 0.080ns 0.080ns 0.458ns 0.178ns 0.495ns 0.080ns 0.080ns 0.080ns 0.458ns 0.178ns 0.517ns 0.080ns 0.080ns 0.458ns 0.178ns 0.495ns 0.080ns 0.458ns 0.178ns 0.495ns 0.458ns 0.178ns 0.517ns 0.080ns 0.080ns 0.080ns 0.080ns 0.080ns 0.458ns 0.178ns 0.495ns 0.080ns 0.080ns 0.458ns 0.178ns 0.517ns 0.080ns 0.080ns 0.458ns 0.178ns 0.620ns 0.080ns 0.080ns 0.458ns 0.322ns 0.517ns 0.080ns 0.080ns 0.080ns 0.458ns 0.096ns } "" } }  } 0 0 "%2!c! %3!s! %4!s! to %5!s! delay is %1!s!" 0 0 "" 0 -1} { "Info" "ITDB_FULL_CLOCK_SKEW_RESULT" "-0.219 ns - Smallest " "Info: - Smallest clock skew is -0.219 ns" { { "Info" "ITDB_FULL_CLOCK_PATH_RESULT" "CLOCK_IN destination 2.817 ns + Shortest register " "Info: + Shortest clock path from clock \"CLOCK_IN\" to destination register is 2.817 ns" { { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(1.006 ns) 1.006 ns CLOCK_IN 1 CLK PIN_D12 4 " "Info: 1: + IC(0.000 ns) + CELL(1.006 ns) = 1.006 ns; Loc. = PIN_D12; Fanout = 4; CLK Node = 'CLOCK_IN'" {  } { { "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" "" { CLOCK_IN } "NODE_NAME" } } { "HD_ADPCM_Codec.vhd" "" { Text "D:/HD_ADPCM/HD_ADPCM_1Bit_Stereo_Decoder/HD_ADPCM_Codec.vhd" 12 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 -1} { "Info" "ITDB_NODE_DELAY" "IC(0.238 ns) + CELL(0.000 ns) 1.244 ns CLOCK_IN~clkctrl 2 COMB CLKCTRL_G11 325 " "Info: 2: + IC(0.238 ns) + CELL(0.000 ns) = 1.244 ns; Loc. = CLKCTRL_G11; Fanout = 325; COMB Node = 'CLOCK_IN~clkctrl'" {  } { { "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" "0.238 ns" { CLOCK_IN CLOCK_IN~clkctrl } "NODE_NAME" } } { "HD_ADPCM_Codec.vhd" "" { Text "D:/HD_ADPCM/HD_ADPCM_1Bit_Stereo_Decoder/HD_ADPCM_Codec.vhd" 12 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 -1} { "Info" "ITDB_NODE_DELAY" "IC(0.971 ns) + CELL(0.602 ns) 2.817 ns ADPCM_Decoder_1_Bit:u6\|PCM_Data_Difference\[0\] 3 REG LCFF_X39_Y19_N15 1 " "Info: 3: + IC(0.971 ns) + CELL(0.602 ns) = 2.817 ns; Loc. = LCFF_X39_Y19_N15; Fanout = 1; REG Node = 'ADPCM_Decoder_1_Bit:u6\|PCM_Data_Difference\[0\]'" {  } { { "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" "1.573 ns" { CLOCK_IN~clkctrl ADPCM_Decoder_1_Bit:u6|PCM_Data_Difference[0] } "NODE_NAME" } } { "HD_ADPCM_Codec.vhd" "" { Text "D:/HD_ADPCM/HD_ADPCM_1Bit_Stereo_Decoder/HD_ADPCM_Codec.vhd" 943 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 -1} { "Info" "ITDB_TOTAL_CELL_DELAY" "1.608 ns ( 57.08 % ) " "Info: Total cell delay = 1.608 ns ( 57.08 % )" {  } {  } 0 0 "Total cell delay = %1!s! %2!s!" 0 0 "" 0 -1} { "Info" "ITDB_TOTAL_IC_DELAY" "1.209 ns ( 42.92 % ) " "Info: Total interconnect delay = 1.209 ns ( 42.92 % )" {  } {  } 0 0 "Total interconnect delay = %1!s! %2!s!" 0 0 "" 0 -1}  } { { "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" "2.817 ns" { CLOCK_IN CLOCK_IN~clkctrl ADPCM_Decoder_1_Bit:u6|PCM_Data_Difference[0] } "NODE_NAME" } } { "c:/altera/90/quartus/bin/Technology_Viewer.qrui" "" { "TechnologyMapViewer" "c:/altera/90/quartus/bin/Technology_Viewer.qrui" "2.817 ns" { CLOCK_IN {} CLOCK_IN~combout {} CLOCK_IN~clkctrl {} ADPCM_Decoder_1_Bit:u6|PCM_Data_Difference[0] {} } { 0.000ns 0.000ns 0.238ns 0.971ns } { 0.000ns 1.006ns 0.000ns 0.602ns } "" } }  } 0 0 "%4!c! %5!s! clock path from clock \"%1!s!\" to %2!s! %6!s! is %3!s!" 0 0 "" 0 -1} { "Info" "ITDB_FULL_CLOCK_PATH_RESULT" "CLOCK_IN source 3.036 ns - Longest register " "Info: - Longest clock path from clock \"CLOCK_IN\" to source register is 3.036 ns" { { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(1.006 ns) 1.006 ns CLOCK_IN 1 CLK PIN_D12 4 " "Info: 1: + IC(0.000 ns) + CELL(1.006 ns) = 1.006 ns; Loc. = PIN_D12; Fanout = 4; CLK Node = 'CLOCK_IN'" {  } { { "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" "" { CLOCK_IN } "NODE_NAME" } } { "HD_ADPCM_Codec.vhd" "" { Text "D:/HD_ADPCM/HD_ADPCM_1Bit_Stereo_Decoder/HD_ADPCM_Codec.vhd" 12 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 -1} { "Info" "ITDB_NODE_DELAY" "IC(0.238 ns) + CELL(0.000 ns) 1.244 ns CLOCK_IN~clkctrl 2 COMB CLKCTRL_G11 325 " "Info: 2: + IC(0.238 ns) + CELL(0.000 ns) = 1.244 ns; Loc. = CLKCTRL_G11; Fanout = 325; COMB Node = 'CLOCK_IN~clkctrl'" {  } { { "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" "0.238 ns" { CLOCK_IN CLOCK_IN~clkctrl } "NODE_NAME" } } { "HD_ADPCM_Codec.vhd" "" { Text "D:/HD_ADPCM/HD_ADPCM_1Bit_Stereo_Decoder/HD_ADPCM_Codec.vhd" 12 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 -1} { "Info" "ITDB_NODE_DELAY" "IC(0.920 ns) + CELL(0.872 ns) 3.036 ns ADPCM_Decoder_1_Bit:u6\|ADPCM_Decoder_Step_Size_Table_Pointer\[0\] 3 REG DSPMULT_X28_Y17_N0 20 " "Info: 3: + IC(0.920 ns) + CELL(0.872 ns) = 3.036 ns; Loc. = DSPMULT_X28_Y17_N0; Fanout = 20; REG Node = 'ADPCM_Decoder_1_Bit:u6\|ADPCM_Decoder_Step_Size_Table_Pointer\[0\]'" {  } { { "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" "1.792 ns" { CLOCK_IN~clkctrl ADPCM_Decoder_1_Bit:u6|ADPCM_Decoder_Step_Size_Table_Pointer[0] } "NODE_NAME" } } { "HD_ADPCM_Codec.vhd" "" { Text "D:/HD_ADPCM/HD_ADPCM_1Bit_Stereo_Decoder/HD_ADPCM_Codec.vhd" 943 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 -1} { "Info" "ITDB_TOTAL_CELL_DELAY" "1.878 ns ( 61.86 % ) " "Info: Total cell delay = 1.878 ns ( 61.86 % )" {  } {  } 0 0 "Total cell delay = %1!s! %2!s!" 0 0 "" 0 -1} { "Info" "ITDB_TOTAL_IC_DELAY" "1.158 ns ( 38.14 % ) " "Info: Total interconnect delay = 1.158 ns ( 38.14 % )" {  } {  } 0 0 "Total interconnect delay = %1!s! %2!s!" 0 0 "" 0 -1}  } { { "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" "3.036 ns" { CLOCK_IN CLOCK_IN~clkctrl ADPCM_Decoder_1_Bit:u6|ADPCM_Decoder_Step_Size_Table_Pointer[0] } "NODE_NAME" } } { "c:/altera/90/quartus/bin/Technology_Viewer.qrui" "" { "TechnologyMapViewer" "c:/altera/90/quartus/bin/Technology_Viewer.qrui" "3.036 ns" { CLOCK_IN {} CLOCK_IN~combout {} CLOCK_IN~clkctrl {} ADPCM_Decoder_1_Bit:u6|ADPCM_Decoder_Step_Size_Table_Pointer[0] {} } { 0.000ns 0.000ns 0.238ns 0.920ns } { 0.000ns 1.006ns 0.000ns 0.872ns } "" } }  } 0 0 "%4!c! %5!s! clock path from clock \"%1!s!\" to %2!s! %6!s! is %3!s!" 0 0 "" 0 -1}  } { { "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" "2.817 ns" { CLOCK_IN CLOCK_IN~clkctrl ADPCM_Decoder_1_Bit:u6|PCM_Data_Difference[0] } "NODE_NAME" } } { "c:/altera/90/quartus/bin/Technology_Viewer.qrui" "" { "TechnologyMapViewer" "c:/altera/90/quartus/bin/Technology_Viewer.qrui" "2.817 ns" { CLOCK_IN {} CLOCK_IN~combout {} CLOCK_IN~clkctrl {} ADPCM_Decoder_1_Bit:u6|PCM_Data_Difference[0] {} } { 0.000ns 0.000ns 0.238ns 0.971ns } { 0.000ns 1.006ns 0.000ns 0.602ns } "" } } { "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" "3.036 ns" { CLOCK_IN CLOCK_IN~clkctrl ADPCM_Decoder_1_Bit:u6|ADPCM_Decoder_Step_Size_Table_Pointer[0] } "NODE_NAME" } } { "c:/altera/90/quartus/bin/Technology_Viewer.qrui" "" { "TechnologyMapViewer" "c:/altera/90/quartus/bin/Technology_Viewer.qrui" "3.036 ns" { CLOCK_IN {} CLOCK_IN~combout {} CLOCK_IN~clkctrl {} ADPCM_Decoder_1_Bit:u6|ADPCM_Decoder_Step_Size_Table_Pointer[0] {} } { 0.000ns 0.000ns 0.238ns 0.920ns } { 0.000ns 1.006ns 0.000ns 0.872ns } "" } }  } 0 0 "%2!c! %3!s! clock skew is %1!s!" 0 0 "" 0 -1} { "Info" "ITDB_FULL_TCO_DELAY" "0.000 ns + " "Info: + Micro clock to output delay of source is 0.000 ns" {  } { { "HD_ADPCM_Codec.vhd" "" { Text "D:/HD_ADPCM/HD_ADPCM_1Bit_Stereo_Decoder/HD_ADPCM_Codec.vhd" 943 -1 0 } }  } 0 0 "%2!c! Micro clock to output delay of source is %1!s!" 0 0 "" 0 -1} { "Info" "ITDB_FULL_TSU_DELAY" "-0.038 ns + " "Info: + Micro setup delay of destination is -0.038 ns" {  } { { "HD_ADPCM_Codec.vhd" "" { Text "D:/HD_ADPCM/HD_ADPCM_1Bit_Stereo_Decoder/HD_ADPCM_Codec.vhd" 943 -1 0 } }  } 0 0 "%2!c! Micro setup delay of destination is %1!s!" 0 0 "" 0 -1}  } { { "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" "45.719 ns" { ADPCM_Decoder_1_Bit:u6|ADPCM_Decoder_Step_Size_Table_Pointer[0] ADPCM_Decoder_1_Bit:u6|lpm_mult:Mult0|mult_pu01:auto_generated|mac_mult1~DATAOUT15 ADPCM_Decoder_1_Bit:u6|lpm_mult:Mult0|mult_pu01:auto_generated|mac_out2~DATAOUT15 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_6_result_int[2]~1 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_6_result_int[3]~3 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_6_result_int[4]~5 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_6_result_int[5]~7 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_6_result_int[6]~9 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_6_result_int[7]~10 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|StageOut[50]~221 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_7_result_int[3]~3 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_7_result_int[4]~5 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_7_result_int[5]~7 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_7_result_int[6]~9 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_7_result_int[7]~11 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_7_result_int[8]~12 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|StageOut[58]~197 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_8_result_int[3]~3 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_8_result_int[4]~5 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_8_result_int[5]~7 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_8_result_int[6]~9 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_8_result_int[7]~11 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_8_result_int[8]~12 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|StageOut[67]~581 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_9_result_int[4]~5 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_9_result_int[5]~7 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_9_result_int[6]~9 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_9_result_int[7]~11 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_9_result_int[8]~12 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|StageOut[73]~166 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_10_result_int[2]~1 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_10_result_int[3]~3 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_10_result_int[4]~5 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_10_result_int[5]~7 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_10_result_int[6]~9 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_10_result_int[7]~11 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_10_result_int[8]~12 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|StageOut[83]~544 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_11_result_int[4]~5 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_11_result_int[5]~7 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_11_result_int[6]~9 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_11_result_int[7]~11 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_11_result_int[8]~12 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|StageOut[92]~547 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_12_result_int[5]~7 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_12_result_int[6]~9 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_12_result_int[7]~11 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_12_result_int[8]~12 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|StageOut[101]~550 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_13_result_int[6]~9 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_13_result_int[7]~11 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_13_result_int[8]~12 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|StageOut[110]~553 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_14_result_int[7]~11 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_14_result_int[8]~12 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|StageOut[113]~86 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_15_result_int[2]~1 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_15_result_int[3]~3 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_15_result_int[4]~5 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_15_result_int[5]~7 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_15_result_int[6]~9 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_15_result_int[7]~11 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_15_result_int[8]~12 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|StageOut[124]~563 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_16_result_int[5]~7 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_16_result_int[6]~9 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_16_result_int[7]~11 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_16_result_int[8]~12 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|StageOut[132]~567 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_17_result_int[5]~7 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_17_result_int[6]~9 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_17_result_int[7]~11 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_17_result_int[8]~12 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|StageOut[140]~571 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|op_9~28 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|op_9~30 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|op_9~32 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|op_9~33 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|StageOut[147]~28 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_19_result_int[4]~5 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_19_result_int[5]~7 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_19_result_int[6]~9 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_19_result_int[7]~11 ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_19_result_int[8]~12 ADPCM_Decoder_1_Bit:u6|PCM_Data_Difference[0] } "NODE_NAME" } } { "c:/altera/90/quartus/bin/Technology_Viewer.qrui" "" { "TechnologyMapViewer" "c:/altera/90/quartus/bin/Technology_Viewer.qrui" "45.719 ns" { ADPCM_Decoder_1_Bit:u6|ADPCM_Decoder_Step_Size_Table_Pointer[0] {} ADPCM_Decoder_1_Bit:u6|lpm_mult:Mult0|mult_pu01:auto_generated|mac_mult1~DATAOUT15 {} ADPCM_Decoder_1_Bit:u6|lpm_mult:Mult0|mult_pu01:auto_generated|mac_out2~DATAOUT15 {} ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_6_result_int[2]~1 {} ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_6_result_int[3]~3 {} ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_6_result_int[4]~5 {} ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_6_result_int[5]~7 {} ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_6_result_int[6]~9 {} ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_6_result_int[7]~10 {} ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|StageOut[50]~221 {} ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_7_result_int[3]~3 {} ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_7_result_int[4]~5 {} ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_7_result_int[5]~7 {} ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_7_result_int[6]~9 {} ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_7_result_int[7]~11 {} ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_7_result_int[8]~12 {} ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|StageOut[58]~197 {} ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_8_result_int[3]~3 {} ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_8_result_int[4]~5 {} ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_8_result_int[5]~7 {} ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_8_result_int[6]~9 {} ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_8_result_int[7]~11 {} ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_8_result_int[8]~12 {} ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|StageOut[67]~581 {} ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_9_result_int[4]~5 {} ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_9_result_int[5]~7 {} ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_9_result_int[6]~9 {} ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_9_result_int[7]~11 {} ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_9_result_int[8]~12 {} ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|StageOut[73]~166 {} ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_10_result_int[2]~1 {} ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_10_result_int[3]~3 {} ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_10_result_int[4]~5 {} ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_10_result_int[5]~7 {} ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_10_result_int[6]~9 {} ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_10_result_int[7]~11 {} ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_10_result_int[8]~12 {} ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|StageOut[83]~544 {} ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_11_result_int[4]~5 {} ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_11_result_int[5]~7 {} ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_11_result_int[6]~9 {} ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_11_result_int[7]~11 {} ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_11_result_int[8]~12 {} ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|StageOut[92]~547 {} ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_12_result_int[5]~7 {} ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_12_result_int[6]~9 {} ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_12_result_int[7]~11 {} ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_12_result_int[8]~12 {} ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|StageOut[101]~550 {} ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_13_result_int[6]~9 {} ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_13_result_int[7]~11 {} ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_13_result_int[8]~12 {} ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|StageOut[110]~553 {} ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_14_result_int[7]~11 {} ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_14_result_int[8]~12 {} ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|StageOut[113]~86 {} ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_15_result_int[2]~1 {} ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_15_result_int[3]~3 {} ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_15_result_int[4]~5 {} ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_15_result_int[5]~7 {} ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_15_result_int[6]~9 {} ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_15_result_int[7]~11 {} ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_15_result_int[8]~12 {} ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|StageOut[124]~563 {} ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_16_result_int[5]~7 {} ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_16_result_int[6]~9 {} ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_16_result_int[7]~11 {} ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_16_result_int[8]~12 {} ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|StageOut[132]~567 {} ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_17_result_int[5]~7 {} ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_17_result_int[6]~9 {} ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_17_result_int[7]~11 {} ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_17_result_int[8]~12 {} ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|StageOut[140]~571 {} ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|op_9~28 {} ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|op_9~30 {} ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|op_9~32 {} ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|op_9~33 {} ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|StageOut[147]~28 {} ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_19_result_int[4]~5 {} ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_19_result_int[5]~7 {} ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_19_result_int[6]~9 {} ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_19_result_int[7]~11 {} ADPCM_Decoder_1_Bit:u6|lpm_divide:Div0|lpm_divide_aem:auto_generated|sign_div_unsign_klh:divider|alt_u_div_e2f:divider|add_sub_19_result_int[8]~12 {} ADPCM_Decoder_1_Bit:u6|PCM_Data_Difference[0] {} } { 0.000ns 0.000ns 0.000ns 0.777ns 0.000ns 0.000ns 0.000ns 0.000ns 0.000ns 0.899ns 0.867ns 0.000ns 0.000ns 0.000ns 0.000ns 0.000ns 0.528ns 0.847ns 0.000ns 0.000ns 0.000ns 0.000ns 0.000ns 0.819ns 1.165ns 0.000ns 0.000ns 0.000ns 0.000ns 0.328ns 0.816ns 0.000ns 0.000ns 0.000ns 0.000ns 0.000ns 0.000ns 0.617ns 0.799ns 0.000ns 0.000ns 0.000ns 0.000ns 0.877ns 0.822ns 0.000ns 0.000ns 0.000ns 0.876ns 1.162ns 0.000ns 0.000ns 1.256ns 1.122ns 0.000ns 0.352ns 1.144ns 0.000ns 0.000ns 0.000ns 0.000ns 0.000ns 0.000ns 0.621ns 0.806ns 0.000ns 0.000ns 0.000ns 1.014ns 0.913ns 0.000ns 0.000ns 0.000ns 0.915ns 0.911ns 0.000ns 0.000ns 0.000ns 0.350ns 0.823ns 0.000ns 0.000ns 0.000ns 0.000ns 0.000ns } { 0.000ns 3.257ns 0.304ns 0.495ns 0.080ns 0.080ns 0.080ns 0.080ns 0.458ns 0.322ns 0.495ns 0.080ns 0.080ns 0.080ns 0.080ns 0.458ns 0.178ns 0.517ns 0.080ns 0.080ns 0.080ns 0.080ns 0.458ns 0.178ns 0.495ns 0.080ns 0.080ns 0.080ns 0.458ns 0.319ns 0.517ns 0.174ns 0.080ns 0.080ns 0.080ns 0.080ns 0.458ns 0.178ns 0.495ns 0.080ns 0.080ns 0.080ns 0.458ns 0.178ns 0.517ns 0.080ns 0.080ns 0.458ns 0.178ns 0.495ns 0.080ns 0.458ns 0.178ns 0.495ns 0.458ns 0.178ns 0.517ns 0.080ns 0.080ns 0.080ns 0.080ns 0.080ns 0.458ns 0.178ns 0.495ns 0.080ns 0.080ns 0.458ns 0.178ns 0.517ns 0.080ns 0.080ns 0.458ns 0.178ns 0.620ns 0.080ns 0.080ns 0.458ns 0.322ns 0.517ns 0.080ns 0.080ns 0.080ns 0.458ns 0.096ns } "" } } { "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" "2.817 ns" { CLOCK_IN CLOCK_IN~clkctrl ADPCM_Decoder_1_Bit:u6|PCM_Data_Difference[0] } "NODE_NAME" } } { "c:/altera/90/quartus/bin/Technology_Viewer.qrui" "" { "TechnologyMapViewer" "c:/altera/90/quartus/bin/Technology_Viewer.qrui" "2.817 ns" { CLOCK_IN {} CLOCK_IN~combout {} CLOCK_IN~clkctrl {} ADPCM_Decoder_1_Bit:u6|PCM_Data_Difference[0] {} } { 0.000ns 0.000ns 0.238ns 0.971ns } { 0.000ns 1.006ns 0.000ns 0.602ns } "" } } { "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" "3.036 ns" { CLOCK_IN CLOCK_IN~clkctrl ADPCM_Decoder_1_Bit:u6|ADPCM_Decoder_Step_Size_Table_Pointer[0] } "NODE_NAME" } } { "c:/altera/90/quartus/bin/Technology_Viewer.qrui" "" { "TechnologyMapViewer" "c:/altera/90/quartus/bin/Technology_Viewer.qrui" "3.036 ns" { CLOCK_IN {} CLOCK_IN~combout {} CLOCK_IN~clkctrl {} ADPCM_Decoder_1_Bit:u6|ADPCM_Decoder_Step_Size_Table_Pointer[0] {} } { 0.000ns 0.000ns 0.238ns 0.920ns } { 0.000ns 1.006ns 0.000ns 0.872ns } "" } }  } 0 0 "Clock \"%1!s!\" has %8!s! fmax of %6!s! between source %2!s! \"%3!s!\" and destination %4!s! \"%5!s!\" (period= %7!s!)" 0 0 "" 0 -1}
95 
{ "Warning" "WTAN_CLOCK_WILL_NOT_OPERATE" "CLOCK_IN 44 " "Warning: Circuit may not operate. Detected 44 non-operational path(s) clocked by clock \"CLOCK_IN\" with clock skew larger than data delay. See Compilation Report for details." {  } {  } 0 0 "Circuit may not operate. Detected %2!d! non-operational path(s) clocked by clock \"%1!s!\" with clock skew larger than data delay. See Compilation Report for details." 0 0 "" 0 -1}
96 
{ "Info" "ITDB_FULL_NEGATIVE_HOLD_RESULT" "ADPCM_Decoder_1_Bit:u5\|PCM_DATA_OUT\[15\] Red_LEDs_Bar\[1\] CLOCK_IN 4.361 ns " "Info: Found hold time violation between source  pin or register \"ADPCM_Decoder_1_Bit:u5\|PCM_DATA_OUT\[15\]\" and destination pin or register \"Red_LEDs_Bar\[1\]\" for clock \"CLOCK_IN\" (Hold time is 4.361 ns)" { { "Info" "ITDB_FULL_CLOCK_SKEW_RESULT" "6.075 ns + Largest " "Info: + Largest clock skew is 6.075 ns" { { "Info" "ITDB_FULL_CLOCK_PATH_RESULT" "CLOCK_IN destination 8.907 ns + Longest register " "Info: + Longest clock path from clock \"CLOCK_IN\" to destination register is 8.907 ns" { { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(1.006 ns) 1.006 ns CLOCK_IN 1 CLK PIN_D12 4 " "Info: 1: + IC(0.000 ns) + CELL(1.006 ns) = 1.006 ns; Loc. = PIN_D12; Fanout = 4; CLK Node = 'CLOCK_IN'" {  } { { "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" "" { CLOCK_IN } "NODE_NAME" } } { "HD_ADPCM_Codec.vhd" "" { Text "D:/HD_ADPCM/HD_ADPCM_1Bit_Stereo_Decoder/HD_ADPCM_Codec.vhd" 12 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 -1} { "Info" "ITDB_NODE_DELAY" "IC(1.242 ns) + CELL(0.879 ns) 3.127 ns I2S_Driver:u3\|I2S_Clock 2 REG LCFF_X24_Y15_N29 4 " "Info: 2: + IC(1.242 ns) + CELL(0.879 ns) = 3.127 ns; Loc. = LCFF_X24_Y15_N29; Fanout = 4; REG Node = 'I2S_Driver:u3\|I2S_Clock'" {  } { { "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" "2.121 ns" { CLOCK_IN I2S_Driver:u3|I2S_Clock } "NODE_NAME" } } { "HD_ADPCM_Codec.vhd" "" { Text "D:/HD_ADPCM/HD_ADPCM_1Bit_Stereo_Decoder/HD_ADPCM_Codec.vhd" 754 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 -1} { "Info" "ITDB_NODE_DELAY" "IC(1.502 ns) + CELL(0.879 ns) 5.508 ns I2S_Driver:u3\|I2S_PCM_DATA_ACCESS_OUT 3 REG LCFF_X29_Y13_N9 1 " "Info: 3: + IC(1.502 ns) + CELL(0.879 ns) = 5.508 ns; Loc. = LCFF_X29_Y13_N9; Fanout = 1; REG Node = 'I2S_Driver:u3\|I2S_PCM_DATA_ACCESS_OUT'" {  } { { "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" "2.381 ns" { I2S_Driver:u3|I2S_Clock I2S_Driver:u3|I2S_PCM_DATA_ACCESS_OUT } "NODE_NAME" } } { "HD_ADPCM_Codec.vhd" "" { Text "D:/HD_ADPCM/HD_ADPCM_1Bit_Stereo_Decoder/HD_ADPCM_Codec.vhd" 690 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 -1} { "Info" "ITDB_NODE_DELAY" "IC(1.819 ns) + CELL(0.000 ns) 7.327 ns I2S_Driver:u3\|I2S_PCM_DATA_ACCESS_OUT~clkctrl 4 COMB CLKCTRL_G3 31 " "Info: 4: + IC(1.819 ns) + CELL(0.000 ns) = 7.327 ns; Loc. = CLKCTRL_G3; Fanout = 31; COMB Node = 'I2S_Driver:u3\|I2S_PCM_DATA_ACCESS_OUT~clkctrl'" {  } { { "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" "1.819 ns" { I2S_Driver:u3|I2S_PCM_DATA_ACCESS_OUT I2S_Driver:u3|I2S_PCM_DATA_ACCESS_OUT~clkctrl } "NODE_NAME" } } { "HD_ADPCM_Codec.vhd" "" { Text "D:/HD_ADPCM/HD_ADPCM_1Bit_Stereo_Decoder/HD_ADPCM_Codec.vhd" 690 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 -1} { "Info" "ITDB_NODE_DELAY" "IC(0.978 ns) + CELL(0.602 ns) 8.907 ns Red_LEDs_Bar\[1\] 5 REG LCFF_X40_Y6_N11 8 " "Info: 5: + IC(0.978 ns) + CELL(0.602 ns) = 8.907 ns; Loc. = LCFF_X40_Y6_N11; Fanout = 8; REG Node = 'Red_LEDs_Bar\[1\]'" {  } { { "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" "1.580 ns" { I2S_Driver:u3|I2S_PCM_DATA_ACCESS_OUT~clkctrl Red_LEDs_Bar[1] } "NODE_NAME" } } { "HD_ADPCM_Codec.vhd" "" { Text "D:/HD_ADPCM/HD_ADPCM_1Bit_Stereo_Decoder/HD_ADPCM_Codec.vhd" 237 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 -1} { "Info" "ITDB_TOTAL_CELL_DELAY" "3.366 ns ( 37.79 % ) " "Info: Total cell delay = 3.366 ns ( 37.79 % )" {  } {  } 0 0 "Total cell delay = %1!s! %2!s!" 0 0 "" 0 -1} { "Info" "ITDB_TOTAL_IC_DELAY" "5.541 ns ( 62.21 % ) " "Info: Total interconnect delay = 5.541 ns ( 62.21 % )" {  } {  } 0 0 "Total interconnect delay = %1!s! %2!s!" 0 0 "" 0 -1}  } { { "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" "8.907 ns" { CLOCK_IN I2S_Driver:u3|I2S_Clock I2S_Driver:u3|I2S_PCM_DATA_ACCESS_OUT I2S_Driver:u3|I2S_PCM_DATA_ACCESS_OUT~clkctrl Red_LEDs_Bar[1] } "NODE_NAME" } } { "c:/altera/90/quartus/bin/Technology_Viewer.qrui" "" { "TechnologyMapViewer" "c:/altera/90/quartus/bin/Technology_Viewer.qrui" "8.907 ns" { CLOCK_IN {} CLOCK_IN~combout {} I2S_Driver:u3|I2S_Clock {} I2S_Driver:u3|I2S_PCM_DATA_ACCESS_OUT {} I2S_Driver:u3|I2S_PCM_DATA_ACCESS_OUT~clkctrl {} Red_LEDs_Bar[1] {} } { 0.000ns 0.000ns 1.242ns 1.502ns 1.819ns 0.978ns } { 0.000ns 1.006ns 0.879ns 0.879ns 0.000ns 0.602ns } "" } }  } 0 0 "%4!c! %5!s! clock path from clock \"%1!s!\" to %2!s! %6!s! is %3!s!" 0 0 "" 0 -1} { "Info" "ITDB_FULL_CLOCK_PATH_RESULT" "CLOCK_IN source 2.832 ns - Shortest register " "Info: - Shortest clock path from clock \"CLOCK_IN\" to source register is 2.832 ns" { { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(1.006 ns) 1.006 ns CLOCK_IN 1 CLK PIN_D12 4 " "Info: 1: + IC(0.000 ns) + CELL(1.006 ns) = 1.006 ns; Loc. = PIN_D12; Fanout = 4; CLK Node = 'CLOCK_IN'" {  } { { "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" "" { CLOCK_IN } "NODE_NAME" } } { "HD_ADPCM_Codec.vhd" "" { Text "D:/HD_ADPCM/HD_ADPCM_1Bit_Stereo_Decoder/HD_ADPCM_Codec.vhd" 12 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 -1} { "Info" "ITDB_NODE_DELAY" "IC(0.238 ns) + CELL(0.000 ns) 1.244 ns CLOCK_IN~clkctrl 2 COMB CLKCTRL_G11 325 " "Info: 2: + IC(0.238 ns) + CELL(0.000 ns) = 1.244 ns; Loc. = CLKCTRL_G11; Fanout = 325; COMB Node = 'CLOCK_IN~clkctrl'" {  } { { "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" "0.238 ns" { CLOCK_IN CLOCK_IN~clkctrl } "NODE_NAME" } } { "HD_ADPCM_Codec.vhd" "" { Text "D:/HD_ADPCM/HD_ADPCM_1Bit_Stereo_Decoder/HD_ADPCM_Codec.vhd" 12 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 -1} { "Info" "ITDB_NODE_DELAY" "IC(0.986 ns) + CELL(0.602 ns) 2.832 ns ADPCM_Decoder_1_Bit:u5\|PCM_DATA_OUT\[15\] 3 REG LCFF_X36_Y10_N5 5 " "Info: 3: + IC(0.986 ns) + CELL(0.602 ns) = 2.832 ns; Loc. = LCFF_X36_Y10_N5; Fanout = 5; REG Node = 'ADPCM_Decoder_1_Bit:u5\|PCM_DATA_OUT\[15\]'" {  } { { "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" "1.588 ns" { CLOCK_IN~clkctrl ADPCM_Decoder_1_Bit:u5|PCM_DATA_OUT[15] } "NODE_NAME" } } { "HD_ADPCM_Codec.vhd" "" { Text "D:/HD_ADPCM/HD_ADPCM_1Bit_Stereo_Decoder/HD_ADPCM_Codec.vhd" 943 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 -1} { "Info" "ITDB_TOTAL_CELL_DELAY" "1.608 ns ( 56.78 % ) " "Info: Total cell delay = 1.608 ns ( 56.78 % )" {  } {  } 0 0 "Total cell delay = %1!s! %2!s!" 0 0 "" 0 -1} { "Info" "ITDB_TOTAL_IC_DELAY" "1.224 ns ( 43.22 % ) " "Info: Total interconnect delay = 1.224 ns ( 43.22 % )" {  } {  } 0 0 "Total interconnect delay = %1!s! %2!s!" 0 0 "" 0 -1}  } { { "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" "2.832 ns" { CLOCK_IN CLOCK_IN~clkctrl ADPCM_Decoder_1_Bit:u5|PCM_DATA_OUT[15] } "NODE_NAME" } } { "c:/altera/90/quartus/bin/Technology_Viewer.qrui" "" { "TechnologyMapViewer" "c:/altera/90/quartus/bin/Technology_Viewer.qrui" "2.832 ns" { CLOCK_IN {} CLOCK_IN~combout {} CLOCK_IN~clkctrl {} ADPCM_Decoder_1_Bit:u5|PCM_DATA_OUT[15] {} } { 0.000ns 0.000ns 0.238ns 0.986ns } { 0.000ns 1.006ns 0.000ns 0.602ns } "" } }  } 0 0 "%4!c! %5!s! clock path from clock \"%1!s!\" to %2!s! %6!s! is %3!s!" 0 0 "" 0 -1}  } { { "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" "8.907 ns" { CLOCK_IN I2S_Driver:u3|I2S_Clock I2S_Driver:u3|I2S_PCM_DATA_ACCESS_OUT I2S_Driver:u3|I2S_PCM_DATA_ACCESS_OUT~clkctrl Red_LEDs_Bar[1] } "NODE_NAME" } } { "c:/altera/90/quartus/bin/Technology_Viewer.qrui" "" { "TechnologyMapViewer" "c:/altera/90/quartus/bin/Technology_Viewer.qrui" "8.907 ns" { CLOCK_IN {} CLOCK_IN~combout {} I2S_Driver:u3|I2S_Clock {} I2S_Driver:u3|I2S_PCM_DATA_ACCESS_OUT {} I2S_Driver:u3|I2S_PCM_DATA_ACCESS_OUT~clkctrl {} Red_LEDs_Bar[1] {} } { 0.000ns 0.000ns 1.242ns 1.502ns 1.819ns 0.978ns } { 0.000ns 1.006ns 0.879ns 0.879ns 0.000ns 0.602ns } "" } } { "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" "2.832 ns" { CLOCK_IN CLOCK_IN~clkctrl ADPCM_Decoder_1_Bit:u5|PCM_DATA_OUT[15] } "NODE_NAME" } } { "c:/altera/90/quartus/bin/Technology_Viewer.qrui" "" { "TechnologyMapViewer" "c:/altera/90/quartus/bin/Technology_Viewer.qrui" "2.832 ns" { CLOCK_IN {} CLOCK_IN~combout {} CLOCK_IN~clkctrl {} ADPCM_Decoder_1_Bit:u5|PCM_DATA_OUT[15] {} } { 0.000ns 0.000ns 0.238ns 0.986ns } { 0.000ns 1.006ns 0.000ns 0.602ns } "" } }  } 0 0 "%2!c! %3!s! clock skew is %1!s!" 0 0 "" 0 -1} { "Info" "ITDB_FULL_TCO_DELAY" "0.277 ns - " "Info: - Micro clock to output delay of source is 0.277 ns" {  } { { "HD_ADPCM_Codec.vhd" "" { Text "D:/HD_ADPCM/HD_ADPCM_1Bit_Stereo_Decoder/HD_ADPCM_Codec.vhd" 943 -1 0 } }  } 0 0 "%2!c! Micro clock to output delay of source is %1!s!" 0 0 "" 0 -1} { "Info" "ITDB_FULL_DATA_PATH_RESULT" "1.723 ns - Shortest register register " "Info: - Shortest register to register delay is 1.723 ns" { { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.000 ns) 0.000 ns ADPCM_Decoder_1_Bit:u5\|PCM_DATA_OUT\[15\] 1 REG LCFF_X36_Y10_N5 5 " "Info: 1: + IC(0.000 ns) + CELL(0.000 ns) = 0.000 ns; Loc. = LCFF_X36_Y10_N5; Fanout = 5; REG Node = 'ADPCM_Decoder_1_Bit:u5\|PCM_DATA_OUT\[15\]'" {  } { { "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" "" { ADPCM_Decoder_1_Bit:u5|PCM_DATA_OUT[15] } "NODE_NAME" } } { "HD_ADPCM_Codec.vhd" "" { Text "D:/HD_ADPCM/HD_ADPCM_1Bit_Stereo_Decoder/HD_ADPCM_Codec.vhd" 943 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 -1} { "Info" "ITDB_NODE_DELAY" "IC(1.308 ns) + CELL(0.319 ns) 1.627 ns Red_LEDs_Bar~32 2 COMB LCCOMB_X40_Y6_N10 1 " "Info: 2: + IC(1.308 ns) + CELL(0.319 ns) = 1.627 ns; Loc. = LCCOMB_X40_Y6_N10; Fanout = 1; COMB Node = 'Red_LEDs_Bar~32'" {  } { { "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" "1.627 ns" { ADPCM_Decoder_1_Bit:u5|PCM_DATA_OUT[15] Red_LEDs_Bar~32 } "NODE_NAME" } } { "HD_ADPCM_Codec.vhd" "" { Text "D:/HD_ADPCM/HD_ADPCM_1Bit_Stereo_Decoder/HD_ADPCM_Codec.vhd" 108 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 -1} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.096 ns) 1.723 ns Red_LEDs_Bar\[1\] 3 REG LCFF_X40_Y6_N11 8 " "Info: 3: + IC(0.000 ns) + CELL(0.096 ns) = 1.723 ns; Loc. = LCFF_X40_Y6_N11; Fanout = 8; REG Node = 'Red_LEDs_Bar\[1\]'" {  } { { "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" "0.096 ns" { Red_LEDs_Bar~32 Red_LEDs_Bar[1] } "NODE_NAME" } } { "HD_ADPCM_Codec.vhd" "" { Text "D:/HD_ADPCM/HD_ADPCM_1Bit_Stereo_Decoder/HD_ADPCM_Codec.vhd" 237 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 -1} { "Info" "ITDB_TOTAL_CELL_DELAY" "0.415 ns ( 24.09 % ) " "Info: Total cell delay = 0.415 ns ( 24.09 % )" {  } {  } 0 0 "Total cell delay = %1!s! %2!s!" 0 0 "" 0 -1} { "Info" "ITDB_TOTAL_IC_DELAY" "1.308 ns ( 75.91 % ) " "Info: Total interconnect delay = 1.308 ns ( 75.91 % )" {  } {  } 0 0 "Total interconnect delay = %1!s! %2!s!" 0 0 "" 0 -1}  } { { "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" "1.723 ns" { ADPCM_Decoder_1_Bit:u5|PCM_DATA_OUT[15] Red_LEDs_Bar~32 Red_LEDs_Bar[1] } "NODE_NAME" } } { "c:/altera/90/quartus/bin/Technology_Viewer.qrui" "" { "TechnologyMapViewer" "c:/altera/90/quartus/bin/Technology_Viewer.qrui" "1.723 ns" { ADPCM_Decoder_1_Bit:u5|PCM_DATA_OUT[15] {} Red_LEDs_Bar~32 {} Red_LEDs_Bar[1] {} } { 0.000ns 1.308ns 0.000ns } { 0.000ns 0.319ns 0.096ns } "" } }  } 0 0 "%2!c! %3!s! %4!s! to %5!s! delay is %1!s!" 0 0 "" 0 -1} { "Info" "ITDB_FULL_TH_DELAY" "0.286 ns + " "Info: + Micro hold delay of destination is 0.286 ns" {  } { { "HD_ADPCM_Codec.vhd" "" { Text "D:/HD_ADPCM/HD_ADPCM_1Bit_Stereo_Decoder/HD_ADPCM_Codec.vhd" 237 -1 0 } }  } 0 0 "%2!c! Micro hold delay of destination is %1!s!" 0 0 "" 0 -1}  } { { "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" "8.907 ns" { CLOCK_IN I2S_Driver:u3|I2S_Clock I2S_Driver:u3|I2S_PCM_DATA_ACCESS_OUT I2S_Driver:u3|I2S_PCM_DATA_ACCESS_OUT~clkctrl Red_LEDs_Bar[1] } "NODE_NAME" } } { "c:/altera/90/quartus/bin/Technology_Viewer.qrui" "" { "TechnologyMapViewer" "c:/altera/90/quartus/bin/Technology_Viewer.qrui" "8.907 ns" { CLOCK_IN {} CLOCK_IN~combout {} I2S_Driver:u3|I2S_Clock {} I2S_Driver:u3|I2S_PCM_DATA_ACCESS_OUT {} I2S_Driver:u3|I2S_PCM_DATA_ACCESS_OUT~clkctrl {} Red_LEDs_Bar[1] {} } { 0.000ns 0.000ns 1.242ns 1.502ns 1.819ns 0.978ns } { 0.000ns 1.006ns 0.879ns 0.879ns 0.000ns 0.602ns } "" } } { "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" "2.832 ns" { CLOCK_IN CLOCK_IN~clkctrl ADPCM_Decoder_1_Bit:u5|PCM_DATA_OUT[15] } "NODE_NAME" } } { "c:/altera/90/quartus/bin/Technology_Viewer.qrui" "" { "TechnologyMapViewer" "c:/altera/90/quartus/bin/Technology_Viewer.qrui" "2.832 ns" { CLOCK_IN {} CLOCK_IN~combout {} CLOCK_IN~clkctrl {} ADPCM_Decoder_1_Bit:u5|PCM_DATA_OUT[15] {} } { 0.000ns 0.000ns 0.238ns 0.986ns } { 0.000ns 1.006ns 0.000ns 0.602ns } "" } } { "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" "1.723 ns" { ADPCM_Decoder_1_Bit:u5|PCM_DATA_OUT[15] Red_LEDs_Bar~32 Red_LEDs_Bar[1] } "NODE_NAME" } } { "c:/altera/90/quartus/bin/Technology_Viewer.qrui" "" { "TechnologyMapViewer" "c:/altera/90/quartus/bin/Technology_Viewer.qrui" "1.723 ns" { ADPCM_Decoder_1_Bit:u5|PCM_DATA_OUT[15] {} Red_LEDs_Bar~32 {} Red_LEDs_Bar[1] {} } { 0.000ns 1.308ns 0.000ns } { 0.000ns 0.319ns 0.096ns } "" } }  } 0 0 "Found hold time violation between source  pin or register \"%1!s!\" and destination pin or register \"%2!s!\" for clock \"%3!s!\" (Hold time is %4!s!)" 0 0 "" 0 -1}
97 
{ "Info" "ITDB_TSU_RESULT" "AUDIO_CODEC_VOLUME\[4\] KEY_0 CLOCK_IN 7.689 ns register " "Info: tsu for register \"AUDIO_CODEC_VOLUME\[4\]\" (data pin = \"KEY_0\", clock pin = \"CLOCK_IN\") is 7.689 ns" { { "Info" "ITDB_FULL_DATA_PATH_RESULT" "10.571 ns + Longest pin register " "Info: + Longest pin to register delay is 10.571 ns" { { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.864 ns) 0.864 ns KEY_0 1 PIN PIN_R22 13 " "Info: 1: + IC(0.000 ns) + CELL(0.864 ns) = 0.864 ns; Loc. = PIN_R22; Fanout = 13; PIN Node = 'KEY_0'" {  } { { "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" "" { KEY_0 } "NODE_NAME" } } { "HD_ADPCM_Codec.vhd" "" { Text "D:/HD_ADPCM/HD_ADPCM_1Bit_Stereo_Decoder/HD_ADPCM_Codec.vhd" 25 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 -1} { "Info" "ITDB_NODE_DELAY" "IC(6.335 ns) + CELL(0.545 ns) 7.744 ns Add3~2 2 COMB LCCOMB_X14_Y12_N8 1 " "Info: 2: + IC(6.335 ns) + CELL(0.545 ns) = 7.744 ns; Loc. = LCCOMB_X14_Y12_N8; Fanout = 1; COMB Node = 'Add3~2'" {  } { { "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" "6.880 ns" { KEY_0 Add3~2 } "NODE_NAME" } } { "c:/altera/90/quartus/libraries/vhdl/ieee/numeric_std.vhd" "" { Text "c:/altera/90/quartus/libraries/vhdl/ieee/numeric_std.vhd" 1244 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 -1} { "Info" "ITDB_NODE_DELAY" "IC(0.301 ns) + CELL(0.278 ns) 8.323 ns Add3~3 3 COMB LCCOMB_X14_Y12_N2 2 " "Info: 3: + IC(0.301 ns) + CELL(0.278 ns) = 8.323 ns; Loc. = LCCOMB_X14_Y12_N2; Fanout = 2; COMB Node = 'Add3~3'" {  } { { "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" "0.579 ns" { Add3~2 Add3~3 } "NODE_NAME" } } { "c:/altera/90/quartus/libraries/vhdl/ieee/numeric_std.vhd" "" { Text "c:/altera/90/quartus/libraries/vhdl/ieee/numeric_std.vhd" 1244 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 -1} { "Info" "ITDB_NODE_DELAY" "IC(0.321 ns) + CELL(0.495 ns) 9.139 ns Add3~5 4 COMB LCCOMB_X14_Y12_N16 2 " "Info: 4: + IC(0.321 ns) + CELL(0.495 ns) = 9.139 ns; Loc. = LCCOMB_X14_Y12_N16; Fanout = 2; COMB Node = 'Add3~5'" {  } { { "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" "0.816 ns" { Add3~3 Add3~5 } "NODE_NAME" } } { "c:/altera/90/quartus/libraries/vhdl/ieee/numeric_std.vhd" "" { Text "c:/altera/90/quartus/libraries/vhdl/ieee/numeric_std.vhd" 1244 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 -1} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.080 ns) 9.219 ns Add3~7 5 COMB LCCOMB_X14_Y12_N18 2 " "Info: 5: + IC(0.000 ns) + CELL(0.080 ns) = 9.219 ns; Loc. = LCCOMB_X14_Y12_N18; Fanout = 2; COMB Node = 'Add3~7'" {  } { { "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" "0.080 ns" { Add3~5 Add3~7 } "NODE_NAME" } } { "c:/altera/90/quartus/libraries/vhdl/ieee/numeric_std.vhd" "" { Text "c:/altera/90/quartus/libraries/vhdl/ieee/numeric_std.vhd" 1244 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 -1} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.080 ns) 9.299 ns Add3~9 6 COMB LCCOMB_X14_Y12_N20 2 " "Info: 6: + IC(0.000 ns) + CELL(0.080 ns) = 9.299 ns; Loc. = LCCOMB_X14_Y12_N20; Fanout = 2; COMB Node = 'Add3~9'" {  } { { "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" "0.080 ns" { Add3~7 Add3~9 } "NODE_NAME" } } { "c:/altera/90/quartus/libraries/vhdl/ieee/numeric_std.vhd" "" { Text "c:/altera/90/quartus/libraries/vhdl/ieee/numeric_std.vhd" 1244 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 -1} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.080 ns) 9.379 ns Add3~11 7 COMB LCCOMB_X14_Y12_N22 2 " "Info: 7: + IC(0.000 ns) + CELL(0.080 ns) = 9.379 ns; Loc. = LCCOMB_X14_Y12_N22; Fanout = 2; COMB Node = 'Add3~11'" {  } { { "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" "0.080 ns" { Add3~9 Add3~11 } "NODE_NAME" } } { "c:/altera/90/quartus/libraries/vhdl/ieee/numeric_std.vhd" "" { Text "c:/altera/90/quartus/libraries/vhdl/ieee/numeric_std.vhd" 1244 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 -1} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.458 ns) 9.837 ns Add3~12 8 COMB LCCOMB_X14_Y12_N24 1 " "Info: 8: + IC(0.000 ns) + CELL(0.458 ns) = 9.837 ns; Loc. = LCCOMB_X14_Y12_N24; Fanout = 1; COMB Node = 'Add3~12'" {  } { { "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" "0.458 ns" { Add3~11 Add3~12 } "NODE_NAME" } } { "c:/altera/90/quartus/libraries/vhdl/ieee/numeric_std.vhd" "" { Text "c:/altera/90/quartus/libraries/vhdl/ieee/numeric_std.vhd" 1244 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 -1} { "Info" "ITDB_NODE_DELAY" "IC(0.316 ns) + CELL(0.322 ns) 10.475 ns AUDIO_CODEC_VOLUME\[4\]~33 9 COMB LCCOMB_X14_Y12_N12 1 " "Info: 9: + IC(0.316 ns) + CELL(0.322 ns) = 10.475 ns; Loc. = LCCOMB_X14_Y12_N12; Fanout = 1; COMB Node = 'AUDIO_CODEC_VOLUME\[4\]~33'" {  } { { "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" "0.638 ns" { Add3~12 AUDIO_CODEC_VOLUME[4]~33 } "NODE_NAME" } } { "HD_ADPCM_Codec.vhd" "" { Text "D:/HD_ADPCM/HD_ADPCM_1Bit_Stereo_Decoder/HD_ADPCM_Codec.vhd" 278 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 -1} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.096 ns) 10.571 ns AUDIO_CODEC_VOLUME\[4\] 10 REG LCFF_X14_Y12_N13 5 " "Info: 10: + IC(0.000 ns) + CELL(0.096 ns) = 10.571 ns; Loc. = LCFF_X14_Y12_N13; Fanout = 5; REG Node = 'AUDIO_CODEC_VOLUME\[4\]'" {  } { { "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" "0.096 ns" { AUDIO_CODEC_VOLUME[4]~33 AUDIO_CODEC_VOLUME[4] } "NODE_NAME" } } { "HD_ADPCM_Codec.vhd" "" { Text "D:/HD_ADPCM/HD_ADPCM_1Bit_Stereo_Decoder/HD_ADPCM_Codec.vhd" 278 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 -1} { "Info" "ITDB_TOTAL_CELL_DELAY" "3.298 ns ( 31.20 % ) " "Info: Total cell delay = 3.298 ns ( 31.20 % )" {  } {  } 0 0 "Total cell delay = %1!s! %2!s!" 0 0 "" 0 -1} { "Info" "ITDB_TOTAL_IC_DELAY" "7.273 ns ( 68.80 % ) " "Info: Total interconnect delay = 7.273 ns ( 68.80 % )" {  } {  } 0 0 "Total interconnect delay = %1!s! %2!s!" 0 0 "" 0 -1}  } { { "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" "10.571 ns" { KEY_0 Add3~2 Add3~3 Add3~5 Add3~7 Add3~9 Add3~11 Add3~12 AUDIO_CODEC_VOLUME[4]~33 AUDIO_CODEC_VOLUME[4] } "NODE_NAME" } } { "c:/altera/90/quartus/bin/Technology_Viewer.qrui" "" { "TechnologyMapViewer" "c:/altera/90/quartus/bin/Technology_Viewer.qrui" "10.571 ns" { KEY_0 {} KEY_0~combout {} Add3~2 {} Add3~3 {} Add3~5 {} Add3~7 {} Add3~9 {} Add3~11 {} Add3~12 {} AUDIO_CODEC_VOLUME[4]~33 {} AUDIO_CODEC_VOLUME[4] {} } { 0.000ns 0.000ns 6.335ns 0.301ns 0.321ns 0.000ns 0.000ns 0.000ns 0.000ns 0.316ns 0.000ns } { 0.000ns 0.864ns 0.545ns 0.278ns 0.495ns 0.080ns 0.080ns 0.080ns 0.458ns 0.322ns 0.096ns } "" } }  } 0 0 "%2!c! %3!s! %4!s! to %5!s! delay is %1!s!" 0 0 "" 0 -1} { "Info" "ITDB_FULL_TSU_DELAY" "-0.038 ns + " "Info: + Micro setup delay of destination is -0.038 ns" {  } { { "HD_ADPCM_Codec.vhd" "" { Text "D:/HD_ADPCM/HD_ADPCM_1Bit_Stereo_Decoder/HD_ADPCM_Codec.vhd" 278 -1 0 } }  } 0 0 "%2!c! Micro setup delay of destination is %1!s!" 0 0 "" 0 -1} { "Info" "ITDB_FULL_CLOCK_PATH_RESULT" "CLOCK_IN destination 2.844 ns - Shortest register " "Info: - Shortest clock path from clock \"CLOCK_IN\" to destination register is 2.844 ns" { { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(1.006 ns) 1.006 ns CLOCK_IN 1 CLK PIN_D12 4 " "Info: 1: + IC(0.000 ns) + CELL(1.006 ns) = 1.006 ns; Loc. = PIN_D12; Fanout = 4; CLK Node = 'CLOCK_IN'" {  } { { "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" "" { CLOCK_IN } "NODE_NAME" } } { "HD_ADPCM_Codec.vhd" "" { Text "D:/HD_ADPCM/HD_ADPCM_1Bit_Stereo_Decoder/HD_ADPCM_Codec.vhd" 12 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 -1} { "Info" "ITDB_NODE_DELAY" "IC(0.238 ns) + CELL(0.000 ns) 1.244 ns CLOCK_IN~clkctrl 2 COMB CLKCTRL_G11 325 " "Info: 2: + IC(0.238 ns) + CELL(0.000 ns) = 1.244 ns; Loc. = CLKCTRL_G11; Fanout = 325; COMB Node = 'CLOCK_IN~clkctrl'" {  } { { "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" "0.238 ns" { CLOCK_IN CLOCK_IN~clkctrl } "NODE_NAME" } } { "HD_ADPCM_Codec.vhd" "" { Text "D:/HD_ADPCM/HD_ADPCM_1Bit_Stereo_Decoder/HD_ADPCM_Codec.vhd" 12 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 -1} { "Info" "ITDB_NODE_DELAY" "IC(0.998 ns) + CELL(0.602 ns) 2.844 ns AUDIO_CODEC_VOLUME\[4\] 3 REG LCFF_X14_Y12_N13 5 " "Info: 3: + IC(0.998 ns) + CELL(0.602 ns) = 2.844 ns; Loc. = LCFF_X14_Y12_N13; Fanout = 5; REG Node = 'AUDIO_CODEC_VOLUME\[4\]'" {  } { { "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" "1.600 ns" { CLOCK_IN~clkctrl AUDIO_CODEC_VOLUME[4] } "NODE_NAME" } } { "HD_ADPCM_Codec.vhd" "" { Text "D:/HD_ADPCM/HD_ADPCM_1Bit_Stereo_Decoder/HD_ADPCM_Codec.vhd" 278 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 -1} { "Info" "ITDB_TOTAL_CELL_DELAY" "1.608 ns ( 56.54 % ) " "Info: Total cell delay = 1.608 ns ( 56.54 % )" {  } {  } 0 0 "Total cell delay = %1!s! %2!s!" 0 0 "" 0 -1} { "Info" "ITDB_TOTAL_IC_DELAY" "1.236 ns ( 43.46 % ) " "Info: Total interconnect delay = 1.236 ns ( 43.46 % )" {  } {  } 0 0 "Total interconnect delay = %1!s! %2!s!" 0 0 "" 0 -1}  } { { "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" "2.844 ns" { CLOCK_IN CLOCK_IN~clkctrl AUDIO_CODEC_VOLUME[4] } "NODE_NAME" } } { "c:/altera/90/quartus/bin/Technology_Viewer.qrui" "" { "TechnologyMapViewer" "c:/altera/90/quartus/bin/Technology_Viewer.qrui" "2.844 ns" { CLOCK_IN {} CLOCK_IN~combout {} CLOCK_IN~clkctrl {} AUDIO_CODEC_VOLUME[4] {} } { 0.000ns 0.000ns 0.238ns 0.998ns } { 0.000ns 1.006ns 0.000ns 0.602ns } "" } }  } 0 0 "%4!c! %5!s! clock path from clock \"%1!s!\" to %2!s! %6!s! is %3!s!" 0 0 "" 0 -1}  } { { "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" "10.571 ns" { KEY_0 Add3~2 Add3~3 Add3~5 Add3~7 Add3~9 Add3~11 Add3~12 AUDIO_CODEC_VOLUME[4]~33 AUDIO_CODEC_VOLUME[4] } "NODE_NAME" } } { "c:/altera/90/quartus/bin/Technology_Viewer.qrui" "" { "TechnologyMapViewer" "c:/altera/90/quartus/bin/Technology_Viewer.qrui" "10.571 ns" { KEY_0 {} KEY_0~combout {} Add3~2 {} Add3~3 {} Add3~5 {} Add3~7 {} Add3~9 {} Add3~11 {} Add3~12 {} AUDIO_CODEC_VOLUME[4]~33 {} AUDIO_CODEC_VOLUME[4] {} } { 0.000ns 0.000ns 6.335ns 0.301ns 0.321ns 0.000ns 0.000ns 0.000ns 0.000ns 0.316ns 0.000ns } { 0.000ns 0.864ns 0.545ns 0.278ns 0.495ns 0.080ns 0.080ns 0.080ns 0.458ns 0.322ns 0.096ns } "" } } { "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" "2.844 ns" { CLOCK_IN CLOCK_IN~clkctrl AUDIO_CODEC_VOLUME[4] } "NODE_NAME" } } { "c:/altera/90/quartus/bin/Technology_Viewer.qrui" "" { "TechnologyMapViewer" "c:/altera/90/quartus/bin/Technology_Viewer.qrui" "2.844 ns" { CLOCK_IN {} CLOCK_IN~combout {} CLOCK_IN~clkctrl {} AUDIO_CODEC_VOLUME[4] {} } { 0.000ns 0.000ns 0.238ns 0.998ns } { 0.000ns 1.006ns 0.000ns 0.602ns } "" } }  } 0 0 "tsu for %5!s! \"%1!s!\" (data pin = \"%2!s!\", clock pin = \"%3!s!\") is %4!s!" 0 0 "" 0 -1}
98 
{ "Info" "ITDB_FULL_TCO_RESULT" "CLOCK_IN S_RED_LEDS_OUT\[4\] Red_LEDs_Bar\[2\] 14.997 ns register " "Info: tco from clock \"CLOCK_IN\" to destination pin \"S_RED_LEDS_OUT\[4\]\" through register \"Red_LEDs_Bar\[2\]\" is 14.997 ns" { { "Info" "ITDB_FULL_CLOCK_PATH_RESULT" "CLOCK_IN source 8.907 ns + Longest register " "Info: + Longest clock path from clock \"CLOCK_IN\" to source register is 8.907 ns" { { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(1.006 ns) 1.006 ns CLOCK_IN 1 CLK PIN_D12 4 " "Info: 1: + IC(0.000 ns) + CELL(1.006 ns) = 1.006 ns; Loc. = PIN_D12; Fanout = 4; CLK Node = 'CLOCK_IN'" {  } { { "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" "" { CLOCK_IN } "NODE_NAME" } } { "HD_ADPCM_Codec.vhd" "" { Text "D:/HD_ADPCM/HD_ADPCM_1Bit_Stereo_Decoder/HD_ADPCM_Codec.vhd" 12 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 -1} { "Info" "ITDB_NODE_DELAY" "IC(1.242 ns) + CELL(0.879 ns) 3.127 ns I2S_Driver:u3\|I2S_Clock 2 REG LCFF_X24_Y15_N29 4 " "Info: 2: + IC(1.242 ns) + CELL(0.879 ns) = 3.127 ns; Loc. = LCFF_X24_Y15_N29; Fanout = 4; REG Node = 'I2S_Driver:u3\|I2S_Clock'" {  } { { "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" "2.121 ns" { CLOCK_IN I2S_Driver:u3|I2S_Clock } "NODE_NAME" } } { "HD_ADPCM_Codec.vhd" "" { Text "D:/HD_ADPCM/HD_ADPCM_1Bit_Stereo_Decoder/HD_ADPCM_Codec.vhd" 754 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 -1} { "Info" "ITDB_NODE_DELAY" "IC(1.502 ns) + CELL(0.879 ns) 5.508 ns I2S_Driver:u3\|I2S_PCM_DATA_ACCESS_OUT 3 REG LCFF_X29_Y13_N9 1 " "Info: 3: + IC(1.502 ns) + CELL(0.879 ns) = 5.508 ns; Loc. = LCFF_X29_Y13_N9; Fanout = 1; REG Node = 'I2S_Driver:u3\|I2S_PCM_DATA_ACCESS_OUT'" {  } { { "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" "2.381 ns" { I2S_Driver:u3|I2S_Clock I2S_Driver:u3|I2S_PCM_DATA_ACCESS_OUT } "NODE_NAME" } } { "HD_ADPCM_Codec.vhd" "" { Text "D:/HD_ADPCM/HD_ADPCM_1Bit_Stereo_Decoder/HD_ADPCM_Codec.vhd" 690 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 -1} { "Info" "ITDB_NODE_DELAY" "IC(1.819 ns) + CELL(0.000 ns) 7.327 ns I2S_Driver:u3\|I2S_PCM_DATA_ACCESS_OUT~clkctrl 4 COMB CLKCTRL_G3 31 " "Info: 4: + IC(1.819 ns) + CELL(0.000 ns) = 7.327 ns; Loc. = CLKCTRL_G3; Fanout = 31; COMB Node = 'I2S_Driver:u3\|I2S_PCM_DATA_ACCESS_OUT~clkctrl'" {  } { { "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" "1.819 ns" { I2S_Driver:u3|I2S_PCM_DATA_ACCESS_OUT I2S_Driver:u3|I2S_PCM_DATA_ACCESS_OUT~clkctrl } "NODE_NAME" } } { "HD_ADPCM_Codec.vhd" "" { Text "D:/HD_ADPCM/HD_ADPCM_1Bit_Stereo_Decoder/HD_ADPCM_Codec.vhd" 690 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 -1} { "Info" "ITDB_NODE_DELAY" "IC(0.978 ns) + CELL(0.602 ns) 8.907 ns Red_LEDs_Bar\[2\] 5 REG LCFF_X40_Y6_N7 7 " "Info: 5: + IC(0.978 ns) + CELL(0.602 ns) = 8.907 ns; Loc. = LCFF_X40_Y6_N7; Fanout = 7; REG Node = 'Red_LEDs_Bar\[2\]'" {  } { { "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" "1.580 ns" { I2S_Driver:u3|I2S_PCM_DATA_ACCESS_OUT~clkctrl Red_LEDs_Bar[2] } "NODE_NAME" } } { "HD_ADPCM_Codec.vhd" "" { Text "D:/HD_ADPCM/HD_ADPCM_1Bit_Stereo_Decoder/HD_ADPCM_Codec.vhd" 237 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 -1} { "Info" "ITDB_TOTAL_CELL_DELAY" "3.366 ns ( 37.79 % ) " "Info: Total cell delay = 3.366 ns ( 37.79 % )" {  } {  } 0 0 "Total cell delay = %1!s! %2!s!" 0 0 "" 0 -1} { "Info" "ITDB_TOTAL_IC_DELAY" "5.541 ns ( 62.21 % ) " "Info: Total interconnect delay = 5.541 ns ( 62.21 % )" {  } {  } 0 0 "Total interconnect delay = %1!s! %2!s!" 0 0 "" 0 -1}  } { { "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" "8.907 ns" { CLOCK_IN I2S_Driver:u3|I2S_Clock I2S_Driver:u3|I2S_PCM_DATA_ACCESS_OUT I2S_Driver:u3|I2S_PCM_DATA_ACCESS_OUT~clkctrl Red_LEDs_Bar[2] } "NODE_NAME" } } { "c:/altera/90/quartus/bin/Technology_Viewer.qrui" "" { "TechnologyMapViewer" "c:/altera/90/quartus/bin/Technology_Viewer.qrui" "8.907 ns" { CLOCK_IN {} CLOCK_IN~combout {} I2S_Driver:u3|I2S_Clock {} I2S_Driver:u3|I2S_PCM_DATA_ACCESS_OUT {} I2S_Driver:u3|I2S_PCM_DATA_ACCESS_OUT~clkctrl {} Red_LEDs_Bar[2] {} } { 0.000ns 0.000ns 1.242ns 1.502ns 1.819ns 0.978ns } { 0.000ns 1.006ns 0.879ns 0.879ns 0.000ns 0.602ns } "" } }  } 0 0 "%4!c! %5!s! clock path from clock \"%1!s!\" to %2!s! %6!s! is %3!s!" 0 0 "" 0 -1} { "Info" "ITDB_FULL_TCO_DELAY" "0.277 ns + " "Info: + Micro clock to output delay of source is 0.277 ns" {  } { { "HD_ADPCM_Codec.vhd" "" { Text "D:/HD_ADPCM/HD_ADPCM_1Bit_Stereo_Decoder/HD_ADPCM_Codec.vhd" 237 -1 0 } }  } 0 0 "%2!c! Micro clock to output delay of source is %1!s!" 0 0 "" 0 -1} { "Info" "ITDB_FULL_DATA_PATH_RESULT" "5.813 ns + Longest register pin " "Info: + Longest register to pin delay is 5.813 ns" { { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.000 ns) 0.000 ns Red_LEDs_Bar\[2\] 1 REG LCFF_X40_Y6_N7 7 " "Info: 1: + IC(0.000 ns) + CELL(0.000 ns) = 0.000 ns; Loc. = LCFF_X40_Y6_N7; Fanout = 7; REG Node = 'Red_LEDs_Bar\[2\]'" {  } { { "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" "" { Red_LEDs_Bar[2] } "NODE_NAME" } } { "HD_ADPCM_Codec.vhd" "" { Text "D:/HD_ADPCM/HD_ADPCM_1Bit_Stereo_Decoder/HD_ADPCM_Codec.vhd" 237 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 -1} { "Info" "ITDB_NODE_DELAY" "IC(0.674 ns) + CELL(0.521 ns) 1.195 ns LEDs_Bar_Driver:u1\|Mux4~5 2 COMB LCCOMB_X40_Y6_N22 1 " "Info: 2: + IC(0.674 ns) + CELL(0.521 ns) = 1.195 ns; Loc. = LCCOMB_X40_Y6_N22; Fanout = 1; COMB Node = 'LEDs_Bar_Driver:u1\|Mux4~5'" {  } { { "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" "1.195 ns" { Red_LEDs_Bar[2] LEDs_Bar_Driver:u1|Mux4~5 } "NODE_NAME" } } { "HD_ADPCM_Codec.vhd" "" { Text "D:/HD_ADPCM/HD_ADPCM_1Bit_Stereo_Decoder/HD_ADPCM_Codec.vhd" 422 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 -1} { "Info" "ITDB_NODE_DELAY" "IC(1.662 ns) + CELL(2.956 ns) 5.813 ns S_RED_LEDS_OUT\[4\] 3 PIN PIN_T18 0 " "Info: 3: + IC(1.662 ns) + CELL(2.956 ns) = 5.813 ns; Loc. = PIN_T18; Fanout = 0; PIN Node = 'S_RED_LEDS_OUT\[4\]'" {  } { { "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" "4.618 ns" { LEDs_Bar_Driver:u1|Mux4~5 S_RED_LEDS_OUT[4] } "NODE_NAME" } } { "HD_ADPCM_Codec.vhd" "" { Text "D:/HD_ADPCM/HD_ADPCM_1Bit_Stereo_Decoder/HD_ADPCM_Codec.vhd" 17 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 -1} { "Info" "ITDB_TOTAL_CELL_DELAY" "3.477 ns ( 59.81 % ) " "Info: Total cell delay = 3.477 ns ( 59.81 % )" {  } {  } 0 0 "Total cell delay = %1!s! %2!s!" 0 0 "" 0 -1} { "Info" "ITDB_TOTAL_IC_DELAY" "2.336 ns ( 40.19 % ) " "Info: Total interconnect delay = 2.336 ns ( 40.19 % )" {  } {  } 0 0 "Total interconnect delay = %1!s! %2!s!" 0 0 "" 0 -1}  } { { "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" "5.813 ns" { Red_LEDs_Bar[2] LEDs_Bar_Driver:u1|Mux4~5 S_RED_LEDS_OUT[4] } "NODE_NAME" } } { "c:/altera/90/quartus/bin/Technology_Viewer.qrui" "" { "TechnologyMapViewer" "c:/altera/90/quartus/bin/Technology_Viewer.qrui" "5.813 ns" { Red_LEDs_Bar[2] {} LEDs_Bar_Driver:u1|Mux4~5 {} S_RED_LEDS_OUT[4] {} } { 0.000ns 0.674ns 1.662ns } { 0.000ns 0.521ns 2.956ns } "" } }  } 0 0 "%2!c! %3!s! %4!s! to %5!s! delay is %1!s!" 0 0 "" 0 -1}  } { { "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" "8.907 ns" { CLOCK_IN I2S_Driver:u3|I2S_Clock I2S_Driver:u3|I2S_PCM_DATA_ACCESS_OUT I2S_Driver:u3|I2S_PCM_DATA_ACCESS_OUT~clkctrl Red_LEDs_Bar[2] } "NODE_NAME" } } { "c:/altera/90/quartus/bin/Technology_Viewer.qrui" "" { "TechnologyMapViewer" "c:/altera/90/quartus/bin/Technology_Viewer.qrui" "8.907 ns" { CLOCK_IN {} CLOCK_IN~combout {} I2S_Driver:u3|I2S_Clock {} I2S_Driver:u3|I2S_PCM_DATA_ACCESS_OUT {} I2S_Driver:u3|I2S_PCM_DATA_ACCESS_OUT~clkctrl {} Red_LEDs_Bar[2] {} } { 0.000ns 0.000ns 1.242ns 1.502ns 1.819ns 0.978ns } { 0.000ns 1.006ns 0.879ns 0.879ns 0.000ns 0.602ns } "" } } { "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" "5.813 ns" { Red_LEDs_Bar[2] LEDs_Bar_Driver:u1|Mux4~5 S_RED_LEDS_OUT[4] } "NODE_NAME" } } { "c:/altera/90/quartus/bin/Technology_Viewer.qrui" "" { "TechnologyMapViewer" "c:/altera/90/quartus/bin/Technology_Viewer.qrui" "5.813 ns" { Red_LEDs_Bar[2] {} LEDs_Bar_Driver:u1|Mux4~5 {} S_RED_LEDS_OUT[4] {} } { 0.000ns 0.674ns 1.662ns } { 0.000ns 0.521ns 2.956ns } "" } }  } 0 0 "tco from clock \"%1!s!\" to destination pin \"%2!s!\" through %5!s! \"%3!s!\" is %4!s!" 0 0 "" 0 -1}
99 
{ "Info" "ITDB_TH_RESULT" "Flash_Memory_Driver:u4\|FLASH_MEMORY_DATA_OUT\[3\] FLASH_MEMORY_DATA_INOUT\[3\] CLOCK_IN 1.344 ns register " "Info: th for register \"Flash_Memory_Driver:u4\|FLASH_MEMORY_DATA_OUT\[3\]\" (data pin = \"FLASH_MEMORY_DATA_INOUT\[3\]\", clock pin = \"CLOCK_IN\") is 1.344 ns" { { "Info" "ITDB_FULL_CLOCK_PATH_RESULT" "CLOCK_IN destination 7.532 ns + Longest register " "Info: + Longest clock path from clock \"CLOCK_IN\" to destination register is 7.532 ns" { { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(1.006 ns) 1.006 ns CLOCK_IN 1 CLK PIN_D12 4 " "Info: 1: + IC(0.000 ns) + CELL(1.006 ns) = 1.006 ns; Loc. = PIN_D12; Fanout = 4; CLK Node = 'CLOCK_IN'" {  } { { "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" "" { CLOCK_IN } "NODE_NAME" } } { "HD_ADPCM_Codec.vhd" "" { Text "D:/HD_ADPCM/HD_ADPCM_1Bit_Stereo_Decoder/HD_ADPCM_Codec.vhd" 12 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 -1} { "Info" "ITDB_NODE_DELAY" "IC(1.739 ns) + CELL(0.879 ns) 3.624 ns Flash_Memory_Driver:u4\|Flash_Memory_Clock 2 REG LCFF_X15_Y12_N9 2 " "Info: 2: + IC(1.739 ns) + CELL(0.879 ns) = 3.624 ns; Loc. = LCFF_X15_Y12_N9; Fanout = 2; REG Node = 'Flash_Memory_Driver:u4\|Flash_Memory_Clock'" {  } { { "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" "2.618 ns" { CLOCK_IN Flash_Memory_Driver:u4|Flash_Memory_Clock } "NODE_NAME" } } { "HD_ADPCM_Codec.vhd" "" { Text "D:/HD_ADPCM/HD_ADPCM_1Bit_Stereo_Decoder/HD_ADPCM_Codec.vhd" 832 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 -1} { "Info" "ITDB_NODE_DELAY" "IC(2.306 ns) + CELL(0.000 ns) 5.930 ns Flash_Memory_Driver:u4\|Flash_Memory_Clock~clkctrl 3 COMB CLKCTRL_G0 35 " "Info: 3: + IC(2.306 ns) + CELL(0.000 ns) = 5.930 ns; Loc. = CLKCTRL_G0; Fanout = 35; COMB Node = 'Flash_Memory_Driver:u4\|Flash_Memory_Clock~clkctrl'" {  } { { "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" "2.306 ns" { Flash_Memory_Driver:u4|Flash_Memory_Clock Flash_Memory_Driver:u4|Flash_Memory_Clock~clkctrl } "NODE_NAME" } } { "HD_ADPCM_Codec.vhd" "" { Text "D:/HD_ADPCM/HD_ADPCM_1Bit_Stereo_Decoder/HD_ADPCM_Codec.vhd" 832 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 -1} { "Info" "ITDB_NODE_DELAY" "IC(1.000 ns) + CELL(0.602 ns) 7.532 ns Flash_Memory_Driver:u4\|FLASH_MEMORY_DATA_OUT\[3\] 4 REG LCFF_X36_Y1_N13 1 " "Info: 4: + IC(1.000 ns) + CELL(0.602 ns) = 7.532 ns; Loc. = LCFF_X36_Y1_N13; Fanout = 1; REG Node = 'Flash_Memory_Driver:u4\|FLASH_MEMORY_DATA_OUT\[3\]'" {  } { { "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" "1.602 ns" { Flash_Memory_Driver:u4|Flash_Memory_Clock~clkctrl Flash_Memory_Driver:u4|FLASH_MEMORY_DATA_OUT[3] } "NODE_NAME" } } { "HD_ADPCM_Codec.vhd" "" { Text "D:/HD_ADPCM/HD_ADPCM_1Bit_Stereo_Decoder/HD_ADPCM_Codec.vhd" 858 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 -1} { "Info" "ITDB_TOTAL_CELL_DELAY" "2.487 ns ( 33.02 % ) " "Info: Total cell delay = 2.487 ns ( 33.02 % )" {  } {  } 0 0 "Total cell delay = %1!s! %2!s!" 0 0 "" 0 -1} { "Info" "ITDB_TOTAL_IC_DELAY" "5.045 ns ( 66.98 % ) " "Info: Total interconnect delay = 5.045 ns ( 66.98 % )" {  } {  } 0 0 "Total interconnect delay = %1!s! %2!s!" 0 0 "" 0 -1}  } { { "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" "7.532 ns" { CLOCK_IN Flash_Memory_Driver:u4|Flash_Memory_Clock Flash_Memory_Driver:u4|Flash_Memory_Clock~clkctrl Flash_Memory_Driver:u4|FLASH_MEMORY_DATA_OUT[3] } "NODE_NAME" } } { "c:/altera/90/quartus/bin/Technology_Viewer.qrui" "" { "TechnologyMapViewer" "c:/altera/90/quartus/bin/Technology_Viewer.qrui" "7.532 ns" { CLOCK_IN {} CLOCK_IN~combout {} Flash_Memory_Driver:u4|Flash_Memory_Clock {} Flash_Memory_Driver:u4|Flash_Memory_Clock~clkctrl {} Flash_Memory_Driver:u4|FLASH_MEMORY_DATA_OUT[3] {} } { 0.000ns 0.000ns 1.739ns 2.306ns 1.000ns } { 0.000ns 1.006ns 0.879ns 0.000ns 0.602ns } "" } }  } 0 0 "%4!c! %5!s! clock path from clock \"%1!s!\" to %2!s! %6!s! is %3!s!" 0 0 "" 0 -1} { "Info" "ITDB_FULL_TH_DELAY" "0.286 ns + " "Info: + Micro hold delay of destination is 0.286 ns" {  } { { "HD_ADPCM_Codec.vhd" "" { Text "D:/HD_ADPCM/HD_ADPCM_1Bit_Stereo_Decoder/HD_ADPCM_Codec.vhd" 858 -1 0 } }  } 0 0 "%2!c! Micro hold delay of destination is %1!s!" 0 0 "" 0 -1} { "Info" "ITDB_FULL_DATA_PATH_RESULT" "6.474 ns - Shortest pin register " "Info: - Shortest pin to register delay is 6.474 ns" { { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.000 ns) 0.000 ns FLASH_MEMORY_DATA_INOUT\[3\] 1 PIN PIN_AA17 1 " "Info: 1: + IC(0.000 ns) + CELL(0.000 ns) = 0.000 ns; Loc. = PIN_AA17; Fanout = 1; PIN Node = 'FLASH_MEMORY_DATA_INOUT\[3\]'" {  } { { "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" "" { FLASH_MEMORY_DATA_INOUT[3] } "NODE_NAME" } } { "HD_ADPCM_Codec.vhd" "" { Text "D:/HD_ADPCM/HD_ADPCM_1Bit_Stereo_Decoder/HD_ADPCM_Codec.vhd" 28 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 -1} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.873 ns) 0.873 ns FLASH_MEMORY_DATA_INOUT\[3\]~4 2 COMB IOC_X37_Y0_N1 1 " "Info: 2: + IC(0.000 ns) + CELL(0.873 ns) = 0.873 ns; Loc. = IOC_X37_Y0_N1; Fanout = 1; COMB Node = 'FLASH_MEMORY_DATA_INOUT\[3\]~4'" {  } { { "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" "0.873 ns" { FLASH_MEMORY_DATA_INOUT[3] FLASH_MEMORY_DATA_INOUT[3]~4 } "NODE_NAME" } } { "HD_ADPCM_Codec.vhd" "" { Text "D:/HD_ADPCM/HD_ADPCM_1Bit_Stereo_Decoder/HD_ADPCM_Codec.vhd" 28 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 -1} { "Info" "ITDB_NODE_DELAY" "IC(5.188 ns) + CELL(0.413 ns) 6.474 ns Flash_Memory_Driver:u4\|FLASH_MEMORY_DATA_OUT\[3\] 3 REG LCFF_X36_Y1_N13 1 " "Info: 3: + IC(5.188 ns) + CELL(0.413 ns) = 6.474 ns; Loc. = LCFF_X36_Y1_N13; Fanout = 1; REG Node = 'Flash_Memory_Driver:u4\|FLASH_MEMORY_DATA_OUT\[3\]'" {  } { { "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" "5.601 ns" { FLASH_MEMORY_DATA_INOUT[3]~4 Flash_Memory_Driver:u4|FLASH_MEMORY_DATA_OUT[3] } "NODE_NAME" } } { "HD_ADPCM_Codec.vhd" "" { Text "D:/HD_ADPCM/HD_ADPCM_1Bit_Stereo_Decoder/HD_ADPCM_Codec.vhd" 858 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 -1} { "Info" "ITDB_TOTAL_CELL_DELAY" "1.286 ns ( 19.86 % ) " "Info: Total cell delay = 1.286 ns ( 19.86 % )" {  } {  } 0 0 "Total cell delay = %1!s! %2!s!" 0 0 "" 0 -1} { "Info" "ITDB_TOTAL_IC_DELAY" "5.188 ns ( 80.14 % ) " "Info: Total interconnect delay = 5.188 ns ( 80.14 % )" {  } {  } 0 0 "Total interconnect delay = %1!s! %2!s!" 0 0 "" 0 -1}  } { { "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" "6.474 ns" { FLASH_MEMORY_DATA_INOUT[3] FLASH_MEMORY_DATA_INOUT[3]~4 Flash_Memory_Driver:u4|FLASH_MEMORY_DATA_OUT[3] } "NODE_NAME" } } { "c:/altera/90/quartus/bin/Technology_Viewer.qrui" "" { "TechnologyMapViewer" "c:/altera/90/quartus/bin/Technology_Viewer.qrui" "6.474 ns" { FLASH_MEMORY_DATA_INOUT[3] {} FLASH_MEMORY_DATA_INOUT[3]~4 {} Flash_Memory_Driver:u4|FLASH_MEMORY_DATA_OUT[3] {} } { 0.000ns 0.000ns 5.188ns } { 0.000ns 0.873ns 0.413ns } "" } }  } 0 0 "%2!c! %3!s! %4!s! to %5!s! delay is %1!s!" 0 0 "" 0 -1}  } { { "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" "7.532 ns" { CLOCK_IN Flash_Memory_Driver:u4|Flash_Memory_Clock Flash_Memory_Driver:u4|Flash_Memory_Clock~clkctrl Flash_Memory_Driver:u4|FLASH_MEMORY_DATA_OUT[3] } "NODE_NAME" } } { "c:/altera/90/quartus/bin/Technology_Viewer.qrui" "" { "TechnologyMapViewer" "c:/altera/90/quartus/bin/Technology_Viewer.qrui" "7.532 ns" { CLOCK_IN {} CLOCK_IN~combout {} Flash_Memory_Driver:u4|Flash_Memory_Clock {} Flash_Memory_Driver:u4|Flash_Memory_Clock~clkctrl {} Flash_Memory_Driver:u4|FLASH_MEMORY_DATA_OUT[3] {} } { 0.000ns 0.000ns 1.739ns 2.306ns 1.000ns } { 0.000ns 1.006ns 0.879ns 0.000ns 0.602ns } "" } } { "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" "6.474 ns" { FLASH_MEMORY_DATA_INOUT[3] FLASH_MEMORY_DATA_INOUT[3]~4 Flash_Memory_Driver:u4|FLASH_MEMORY_DATA_OUT[3] } "NODE_NAME" } } { "c:/altera/90/quartus/bin/Technology_Viewer.qrui" "" { "TechnologyMapViewer" "c:/altera/90/quartus/bin/Technology_Viewer.qrui" "6.474 ns" { FLASH_MEMORY_DATA_INOUT[3] {} FLASH_MEMORY_DATA_INOUT[3]~4 {} Flash_Memory_Driver:u4|FLASH_MEMORY_DATA_OUT[3] {} } { 0.000ns 0.000ns 5.188ns } { 0.000ns 0.873ns 0.413ns } "" } }  } 0 0 "th for %5!s! \"%1!s!\" (data pin = \"%2!s!\", clock pin = \"%3!s!\") is %4!s!" 0 0 "" 0 -1}
100 
{ "Info" "IQEXE_ERROR_COUNT" "Classic Timing Analyzer 0 s 3 s Quartus II " "Info: Quartus II Classic Timing Analyzer was successful. 0 errors, 3 warnings" { { "Info" "IQEXE_END_PEAK_VSIZE_MEMORY" "146 " "Info: Peak virtual memory: 146 megabytes" {  } {  } 0 0 "Peak virtual memory: %1!s! megabytes" 0 0 "" 0 -1} { "Info" "IQEXE_END_BANNER_TIME" "Tue May 11 23:47:58 2010 " "Info: Processing ended: Tue May 11 23:47:58 2010" {  } {  } 0 0 "Processing ended: %1!s!" 0 0 "" 0 -1} { "Info" "IQEXE_ELAPSED_TIME" "00:00:02 " "Info: Elapsed time: 00:00:02" {  } {  } 0 0 "Elapsed time: %1!s!" 0 0 "" 0 -1} { "Info" "IQEXE_ELAPSED_CPU_TIME" "00:00:02 " "Info: Total CPU time (on all processors): 00:00:02" {  } {  } 0 0 "Total CPU time (on all processors): %1!s!" 0 0 "" 0 -1}  } {  } 0 0 "%6!s! %1!s! was successful. %2!d! error%3!s!, %4!d! warning%5!s!" 0 0 "" 0 -1}
101 
{ "Info" "IQEXE_SEPARATOR" "" "Info: *******************************************************************" {  } {  } 3 0 "*******************************************************************" 0 0 "" 0 -1}
102 
{ "Info" "IQEXE_START_BANNER_PRODUCT" "EDA Netlist Writer Quartus II " "Info: Running Quartus II EDA Netlist Writer" { { "Info" "IQEXE_START_BANNER_VERSION" "Version 9.0 Build 132 02/25/2009 SJ Web Edition " "Info: Version 9.0 Build 132 02/25/2009 SJ Web Edition" {  } {  } 0 0 "%1!s!" 0 0 "" 0 -1} { "Info" "IQEXE_START_BANNER_TIME" "Tue May 11 23:47:59 2010 " "Info: Processing started: Tue May 11 23:47:59 2010" {  } {  } 0 0 "Processing started: %1!s!" 0 0 "" 0 -1}  } {  } 4 0 "Running %2!s! %1!s!" 0 0 "" 0 -1}
103 
{ "Info" "IQEXE_START_BANNER_COMMANDLINE" "quartus_eda --read_settings_files=off --write_settings_files=off HD_ADPCM_Codec -c HD_ADPCM_Codec " "Info: Command: quartus_eda --read_settings_files=off --write_settings_files=off HD_ADPCM_Codec -c HD_ADPCM_Codec" {  } {  } 0 0 "Command: %1!s!" 0 0 "" 0 -1}
104 
{ "Info" "IWSC_DONE_HDL_SDO_GENERATION" "HD_ADPCM_Codec.vho HD_ADPCM_Codec_vhd.sdo D:/HD_ADPCM/HD_ADPCM_1Bit_Stereo_Decoder/simulation/modelsim/ simulation " "Info: Generated files \"HD_ADPCM_Codec.vho\" and \"HD_ADPCM_Codec_vhd.sdo\" in directory \"D:/HD_ADPCM/HD_ADPCM_1Bit_Stereo_Decoder/simulation/modelsim/\" for EDA simulation tool" {  } {  } 0 0 "Generated files \"%1!s!\" and \"%2!s!\" in directory \"%3!s!\" for EDA %4!s! tool" 0 0 "" 0 -1}
105 
{ "Info" "IQEXE_ERROR_COUNT" "EDA Netlist Writer 0 s 0 s Quartus II " "Info: Quartus II EDA Netlist Writer was successful. 0 errors, 0 warnings" { { "Info" "IQEXE_END_PEAK_VSIZE_MEMORY" "139 " "Info: Peak virtual memory: 139 megabytes" {  } {  } 0 0 "Peak virtual memory: %1!s! megabytes" 0 0 "" 0 -1} { "Info" "IQEXE_END_BANNER_TIME" "Tue May 11 23:48:02 2010 " "Info: Processing ended: Tue May 11 23:48:02 2010" {  } {  } 0 0 "Processing ended: %1!s!" 0 0 "" 0 -1} { "Info" "IQEXE_ELAPSED_TIME" "00:00:03 " "Info: Elapsed time: 00:00:03" {  } {  } 0 0 "Elapsed time: %1!s!" 0 0 "" 0 -1} { "Info" "IQEXE_ELAPSED_CPU_TIME" "00:00:02 " "Info: Total CPU time (on all processors): 00:00:02" {  } {  } 0 0 "Total CPU time (on all processors): %1!s!" 0 0 "" 0 -1}  } {  } 0 0 "%6!s! %1!s! was successful. %2!d! error%3!s!, %4!d! warning%5!s!" 0 0 "" 0 -1}
106 
{ "Info" "IFLOW_ERROR_COUNT" "Full Compilation 0 s 64 s " "Info: Quartus II Full Compilation was successful. 0 errors, 64 warnings" {  } {  } 0 0 "Quartus II %1!s! was successful. %2!d! error%3!s!, %4!d! warning%5!s!" 0 0 "" 0 -1}

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