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akaminski |
`timescale 1ns / 1ps
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//////////////////////////////////////////////////////////////////////////////////
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// Company:
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// Engineer: Aleksander Kaminski
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//
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// Create Date: 04:23:50 07/08/2014
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// Design Name: Braindfuck CPU
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// Module Name: brainfuck_cpu_tb
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// Project Name:
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// Target Devices:
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// Tool versions:
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// Description:
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//
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// Dependencies:
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//
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// Revision:
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// Revision 0.01 - File Created
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// Additional Comments:
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//
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//////////////////////////////////////////////////////////////////////////////////
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module brainfuck_cpu_tb();
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reg clk;
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reg rst;
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wire [7:0] data_i;
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wire [7:0] data_o;
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reg [2:0] rom_i;
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wire [10:0] data_addr_o;
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wire [6:0] rom_addr_o;
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wire rd;
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wire wr;
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wire mreq;
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wire ioreq;
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reg ready;
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reg ready_fsm, ready_fsm_next;
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brainfuck_cpu #(11,7,8) uut(clk, rst, data_i, data_o, rom_i, data_addr_o, rom_addr_o, rd, wr, mreq, ioreq, ready);
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always @(posedge clk, posedge rst) begin
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if(rst)
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ready_fsm <= 0;
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else
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ready_fsm <= ready_fsm_next;
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end
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always @(*) begin
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case(ready_fsm)
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0: begin
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ready <= 0;
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if(rd||wr)
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ready_fsm_next <= 1;
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else
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ready_fsm_next <= 0;
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end
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1: begin
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ready <= 1;
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ready_fsm_next <= 0;
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end
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endcase
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end
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initial begin
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rst <= 1'b1;
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clk <= 1'b0;
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#100 rst <= 1'b0;
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end
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always
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#1 clk <= ~clk;
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RAMB16_S9 #(
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.INIT(9'h000), // Value of output RAM registers at startup
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.SRVAL(9'h000), // Output value upon SSR assertion
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.WRITE_MODE("WRITE_FIRST"), // WRITE_FIRST, READ_FIRST or NO_CHANGE
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// The forllowing INIT_xx declarations specify the initial contents of the RAM
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// Address 0 to 511
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.INIT_00(256'h00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00),
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.INIT_01(256'h00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00),
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| 81 |
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.INIT_02(256'h00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00),
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.INIT_03(256'h00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00),
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.INIT_04(256'h00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00),
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| 84 |
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.INIT_05(256'h00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00),
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| 85 |
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.INIT_06(256'h00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00),
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| 86 |
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.INIT_07(256'h00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00),
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| 87 |
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.INIT_08(256'h00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00),
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.INIT_09(256'h00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00),
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.INIT_0A(256'h00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00),
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| 90 |
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.INIT_0B(256'h00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00),
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.INIT_0C(256'h00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00),
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.INIT_0D(256'h00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00),
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.INIT_0E(256'h00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00),
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.INIT_0F(256'h00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00),
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// Address 512 to 1023
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.INIT_10(256'h00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00),
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.INIT_11(256'h00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00),
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.INIT_12(256'h00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00),
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.INIT_13(256'h00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00),
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.INIT_14(256'h00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00),
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.INIT_15(256'h00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00),
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.INIT_16(256'h00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00),
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.INIT_17(256'h00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00),
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.INIT_18(256'h00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00),
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.INIT_19(256'h00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00),
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.INIT_1A(256'h00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00),
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.INIT_1B(256'h00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00),
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.INIT_1C(256'h00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00),
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.INIT_1D(256'h00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00),
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.INIT_1E(256'h00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00),
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.INIT_1F(256'h00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00),
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// Address 1024 to 1535
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.INIT_20(256'h00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00),
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.INIT_21(256'h00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00),
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.INIT_22(256'h00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00),
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.INIT_23(256'h00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00),
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.INIT_24(256'h00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00),
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| 118 |
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.INIT_25(256'h00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00),
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| 119 |
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.INIT_26(256'h00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00),
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.INIT_27(256'h00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00),
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| 121 |
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.INIT_28(256'h00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00),
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| 122 |
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.INIT_29(256'h00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00),
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| 123 |
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.INIT_2A(256'h00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00),
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| 124 |
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.INIT_2B(256'h00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00),
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| 125 |
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.INIT_2C(256'h00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00),
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| 126 |
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.INIT_2D(256'h00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00),
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| 127 |
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.INIT_2E(256'h00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00),
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| 128 |
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.INIT_2F(256'h00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00),
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// Address 1536 to 2047
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.INIT_30(256'h00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00),
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| 131 |
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.INIT_31(256'h00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00),
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| 132 |
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.INIT_32(256'h00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00),
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| 133 |
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.INIT_33(256'h00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00),
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| 134 |
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.INIT_34(256'h00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00),
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| 135 |
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.INIT_35(256'h00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00),
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| 136 |
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.INIT_36(256'h00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00),
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| 137 |
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.INIT_37(256'h00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00),
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| 138 |
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.INIT_38(256'h00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00),
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| 139 |
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.INIT_39(256'h00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00),
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| 140 |
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.INIT_3A(256'h00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00),
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| 141 |
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.INIT_3B(256'h00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00),
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| 142 |
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.INIT_3C(256'h00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00),
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| 143 |
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.INIT_3D(256'h00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00),
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| 144 |
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.INIT_3E(256'h00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00),
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| 145 |
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.INIT_3F(256'h00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00),
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| 146 |
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| 147 |
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// The next set of INITP_xx are for the parity bits
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| 148 |
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// Address 0 to 511
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| 149 |
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.INITP_00(256'h0000000000000000000000000000000000000000000000000000000000000000),
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| 150 |
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.INITP_01(256'h0000000000000000000000000000000000000000000000000000000000000000),
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| 151 |
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// Address 512 to 1023
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| 152 |
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.INITP_02(256'h0000000000000000000000000000000000000000000000000000000000000000),
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| 153 |
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.INITP_03(256'h0000000000000000000000000000000000000000000000000000000000000000),
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| 154 |
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// Address 1024 to 1535
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| 155 |
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.INITP_04(256'h0000000000000000000000000000000000000000000000000000000000000000),
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| 156 |
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.INITP_05(256'h0000000000000000000000000000000000000000000000000000000000000000),
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| 157 |
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// Address 1536 to 2047
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| 158 |
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.INITP_06(256'h0000000000000000000000000000000000000000000000000000000000000000),
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| 159 |
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.INITP_07(256'h0000000000000000000000000000000000000000000000000000000000000000)
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| 160 |
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) RAMB16_S9_inst (
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| 161 |
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.DO(data_i), // 8-bit Data Output
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| 162 |
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.DOP(), // 1-bit parity Output
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| 163 |
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.ADDR(data_addr_o), // 11-bit Address Input
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| 164 |
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.CLK(clk), // Clock
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| 165 |
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.DI(data_o), // 8-bit Data Input
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| 166 |
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.DIP(1'b0), // 1-bit parity Input
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| 167 |
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.EN(mreq), // RAM Enable Input
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| 168 |
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.SSR(rst), // Synchronous Set/Reset Input
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| 169 |
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.WE(wr) // Write Enable Input
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| 170 |
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);
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| 171 |
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| 172 |
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always @(negedge clk)
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| 173 |
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if(wr && ioreq)
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| 174 |
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$display("%c", data_o);
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| 175 |
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| 176 |
|
|
always @(*) begin
|
| 177 |
|
|
case(rom_addr_o)
|
| 178 |
|
|
7'd0: rom_i <= 3'b010; //+
|
| 179 |
|
|
7'd1: rom_i <= 3'b010; //+
|
| 180 |
|
|
7'd2: rom_i <= 3'b010; //+
|
| 181 |
|
|
7'd3: rom_i <= 3'b010; //+
|
| 182 |
|
|
7'd4: rom_i <= 3'b010; //+
|
| 183 |
|
|
7'd5: rom_i <= 3'b010; //+
|
| 184 |
|
|
7'd6: rom_i <= 3'b010; //+
|
| 185 |
|
|
7'd7: rom_i <= 3'b010; //+
|
| 186 |
|
|
7'd8: rom_i <= 3'b010; //+
|
| 187 |
|
|
7'd9: rom_i <= 3'b010; //+
|
| 188 |
|
|
7'd10: rom_i <= 3'b110; //[
|
| 189 |
|
|
7'd11: rom_i <= 3'b001; //>
|
| 190 |
|
|
7'd12: rom_i <= 3'b010; //+
|
| 191 |
|
|
7'd13: rom_i <= 3'b010; //+
|
| 192 |
|
|
7'd14: rom_i <= 3'b010; //+
|
| 193 |
|
|
7'd15: rom_i <= 3'b010; //+
|
| 194 |
|
|
7'd16: rom_i <= 3'b010; //+
|
| 195 |
|
|
7'd17: rom_i <= 3'b010; //+
|
| 196 |
|
|
7'd18: rom_i <= 3'b010; //+
|
| 197 |
|
|
7'd19: rom_i <= 3'b001; //>
|
| 198 |
|
|
7'd20: rom_i <= 3'b010; //+
|
| 199 |
|
|
7'd21: rom_i <= 3'b010; //+
|
| 200 |
|
|
7'd22: rom_i <= 3'b010; //+
|
| 201 |
|
|
7'd23: rom_i <= 3'b010; //+
|
| 202 |
|
|
7'd24: rom_i <= 3'b010; //+
|
| 203 |
|
|
7'd25: rom_i <= 3'b010; //+
|
| 204 |
|
|
7'd26: rom_i <= 3'b010; //+
|
| 205 |
|
|
7'd27: rom_i <= 3'b010; //+
|
| 206 |
|
|
7'd28: rom_i <= 3'b010; //+
|
| 207 |
|
|
7'd29: rom_i <= 3'b010; //+
|
| 208 |
|
|
7'd30: rom_i <= 3'b001; //>
|
| 209 |
|
|
7'd31: rom_i <= 3'b010; //+
|
| 210 |
|
|
7'd32: rom_i <= 3'b010; //+
|
| 211 |
|
|
7'd33: rom_i <= 3'b010; //+
|
| 212 |
|
|
7'd34: rom_i <= 3'b001; //>
|
| 213 |
|
|
7'd35: rom_i <= 3'b010; //+
|
| 214 |
|
|
7'd36: rom_i <= 3'b000; //<
|
| 215 |
|
|
7'd37: rom_i <= 3'b000; //<
|
| 216 |
|
|
7'd38: rom_i <= 3'b000; //<
|
| 217 |
|
|
7'd39: rom_i <= 3'b000; //<
|
| 218 |
|
|
7'd40: rom_i <= 3'b011; //-
|
| 219 |
|
|
7'd41: rom_i <= 3'b111; //]
|
| 220 |
|
|
7'd42: rom_i <= 3'b001; //>
|
| 221 |
|
|
7'd43: rom_i <= 3'b010; //+
|
| 222 |
|
|
7'd44: rom_i <= 3'b010; //+
|
| 223 |
|
|
7'd45: rom_i <= 3'b101; //.
|
| 224 |
|
|
7'd46: rom_i <= 3'b001; //>
|
| 225 |
|
|
7'd47: rom_i <= 3'b010; //+
|
| 226 |
|
|
7'd48: rom_i <= 3'b101; //.
|
| 227 |
|
|
7'd49: rom_i <= 3'b010; //+
|
| 228 |
|
|
7'd50: rom_i <= 3'b010; //+
|
| 229 |
|
|
7'd51: rom_i <= 3'b010; //+
|
| 230 |
|
|
7'd52: rom_i <= 3'b010; //+
|
| 231 |
|
|
7'd53: rom_i <= 3'b010; //+
|
| 232 |
|
|
7'd54: rom_i <= 3'b010; //+
|
| 233 |
|
|
7'd55: rom_i <= 3'b010; //+
|
| 234 |
|
|
7'd56: rom_i <= 3'b101; //.
|
| 235 |
|
|
7'd57: rom_i <= 3'b101; //.
|
| 236 |
|
|
7'd58: rom_i <= 3'b010; //+
|
| 237 |
|
|
7'd59: rom_i <= 3'b010; //+
|
| 238 |
|
|
7'd60: rom_i <= 3'b010; //+
|
| 239 |
|
|
7'd61: rom_i <= 3'b101; //.
|
| 240 |
|
|
7'd62: rom_i <= 3'b001; //>
|
| 241 |
|
|
7'd63: rom_i <= 3'b010; //+
|
| 242 |
|
|
7'd64: rom_i <= 3'b010; //+
|
| 243 |
|
|
7'd65: rom_i <= 3'b101; //.
|
| 244 |
|
|
7'd66: rom_i <= 3'b000; //<
|
| 245 |
|
|
7'd67: rom_i <= 3'b000; //<
|
| 246 |
|
|
7'd68: rom_i <= 3'b010; //+
|
| 247 |
|
|
7'd69: rom_i <= 3'b010; //+
|
| 248 |
|
|
7'd70: rom_i <= 3'b010; //+
|
| 249 |
|
|
7'd71: rom_i <= 3'b010; //+
|
| 250 |
|
|
7'd72: rom_i <= 3'b010; //+
|
| 251 |
|
|
7'd73: rom_i <= 3'b010; //+
|
| 252 |
|
|
7'd74: rom_i <= 3'b010; //+
|
| 253 |
|
|
7'd75: rom_i <= 3'b010; //+
|
| 254 |
|
|
7'd76: rom_i <= 3'b010; //+
|
| 255 |
|
|
7'd77: rom_i <= 3'b010; //+
|
| 256 |
|
|
7'd78: rom_i <= 3'b010; //+
|
| 257 |
|
|
7'd79: rom_i <= 3'b010; //+
|
| 258 |
|
|
7'd80: rom_i <= 3'b010; //+
|
| 259 |
|
|
7'd81: rom_i <= 3'b010; //+
|
| 260 |
|
|
7'd82: rom_i <= 3'b010; //+
|
| 261 |
|
|
7'd83: rom_i <= 3'b101; //.
|
| 262 |
|
|
7'd84: rom_i <= 3'b001; //>
|
| 263 |
|
|
7'd85: rom_i <= 3'b101; //.
|
| 264 |
|
|
7'd86: rom_i <= 3'b010; //+
|
| 265 |
|
|
7'd87: rom_i <= 3'b010; //+
|
| 266 |
|
|
7'd88: rom_i <= 3'b010; //+
|
| 267 |
|
|
7'd89: rom_i <= 3'b101; //.
|
| 268 |
|
|
7'd90: rom_i <= 3'b011; //-
|
| 269 |
|
|
7'd91: rom_i <= 3'b011; //-
|
| 270 |
|
|
7'd92: rom_i <= 3'b011; //-
|
| 271 |
|
|
7'd93: rom_i <= 3'b011; //-
|
| 272 |
|
|
7'd94: rom_i <= 3'b011; //-
|
| 273 |
|
|
7'd95: rom_i <= 3'b011; //-
|
| 274 |
|
|
7'd96: rom_i <= 3'b101; //.
|
| 275 |
|
|
7'd97: rom_i <= 3'b011; //-
|
| 276 |
|
|
7'd98: rom_i <= 3'b011; //-
|
| 277 |
|
|
7'd99: rom_i <= 3'b011; //-
|
| 278 |
|
|
7'd100: rom_i <= 3'b011; //-
|
| 279 |
|
|
7'd101: rom_i <= 3'b011; //-
|
| 280 |
|
|
7'd102: rom_i <= 3'b011; //-
|
| 281 |
|
|
7'd103: rom_i <= 3'b011; //-
|
| 282 |
|
|
7'd104: rom_i <= 3'b011; //-
|
| 283 |
|
|
7'd105: rom_i <= 3'b101; //.
|
| 284 |
|
|
7'd106: rom_i <= 3'b001; //>
|
| 285 |
|
|
7'd107: rom_i <= 3'b010; //+
|
| 286 |
|
|
7'd108: rom_i <= 3'b101; //.
|
| 287 |
|
|
7'd109: rom_i <= 3'b001; //>
|
| 288 |
|
|
7'd110: rom_i <= 3'b101; //.
|
| 289 |
|
|
7'd111: rom_i <= 3'b110; //[
|
| 290 |
|
|
7'd112: rom_i <= 3'b010; //+
|
| 291 |
|
|
7'd113: rom_i <= 3'b011; //-
|
| 292 |
|
|
7'd114: rom_i <= 3'b111; //]
|
| 293 |
|
|
7'd115: rom_i <= 3'b000;
|
| 294 |
|
|
7'd116: rom_i <= 3'b000;
|
| 295 |
|
|
7'd117: rom_i <= 3'b000;
|
| 296 |
|
|
7'd118: rom_i <= 3'b000;
|
| 297 |
|
|
7'd119: rom_i <= 3'b000;
|
| 298 |
|
|
7'd120: rom_i <= 3'b000;
|
| 299 |
|
|
7'd121: rom_i <= 3'b000;
|
| 300 |
|
|
7'd122: rom_i <= 3'b000;
|
| 301 |
|
|
7'd123: rom_i <= 3'b000;
|
| 302 |
|
|
7'd124: rom_i <= 3'b000;
|
| 303 |
|
|
7'd125: rom_i <= 3'b000;
|
| 304 |
|
|
7'd126: rom_i <= 3'b000;
|
| 305 |
|
|
7'd127: rom_i <= 3'b000;
|
| 306 |
|
|
|
| 307 |
|
|
endcase
|
| 308 |
|
|
end
|
| 309 |
|
|
|
| 310 |
|
|
endmodule
|
