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Juzujka |
module cic_i
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/*********************************************************************************************/
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#(parameter dw = 8, r = 4, m = 4, g = 1)
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/*********************************************************************************************/
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//m - CIC order (comb chain length, integrator chain length)
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//r - interpolation ratio
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//dw - input data width
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//g - differential delay in combs
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/*********************************************************************************************/
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(
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input clk,
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input reset_n,
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input in_dv,
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input signed [dw-1:0] data_in,
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output signed [dw+$clog2((r**(m))/r)-1:0] data_out
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);
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/*********************************************************************************************/
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wire signed [dw+m-2:0] upsample;
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/*********************************************************************************************/
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genvar i;
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generate
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for (i = 0; i < m; i++) begin:comb_stage
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wire signed [dw+i-1:0] comb_in;
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localparam odw = (i == m - 1) ? dw+i : dw+i+1;
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if (i!=0)
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assign comb_in = comb_stage[i-1].comb_out;
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else
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assign comb_in = data_in;
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wire signed [odw-1:0] comb_out;
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comb #(dw+i, odw, g) comb_inst(.clk(clk) , .reset_n(reset_n) , .in_dv(in_dv) , .data_in(comb_in) , .data_out(comb_out));
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end
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endgenerate
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/*********************************************************************************************/
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assign upsample = (in_dv) ? comb_stage[m-1].comb_out : 0;
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/*********************************************************************************************/
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genvar j;
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generate
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for (j = 0; j < m; j++) begin:int_stage
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localparam idw = (j == 0) ? dw+m-1 : dw+$clog2(((2**(m-j))*(r**(j)))/r);
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localparam odw = dw+$clog2(((2**(m-j-1))*(r**(j+1)))/r);
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wire signed [idw-1:0] int_in;
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if (j==0)
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assign int_in = upsample;
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else
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assign int_in = int_stage[j-1].int_out;
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wire signed [odw-1:0] int_out;
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integrator #(idw, odw) int_inst(.clk(clk) , .reset_n(reset_n) , .data_in(int_in) , .data_out(int_out));
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end
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endgenerate
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/*********************************************************************************************/
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assign data_out = int_stage[m-1].int_out;
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/*********************************************************************************************/
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endmodule
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