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[/] [core1990_interlaken/] [trunk/] [gateware/] [simulation/] [deframing_burst_tb.vhd] - Blame information for rev 9

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Line No. Rev Author Line
1 6 N.Boukadid
library ieee;
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use ieee.std_logic_1164.all;
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4
entity testbench_deburster is
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end entity testbench_deburster;
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architecture tb_deburster of testbench_deburster is
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9
    signal Clk          : std_logic;                     -- Clock input
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        signal Reset            : std_logic;                                     -- Reset decoder
11 9 N.Boukadid
 
12 6 N.Boukadid
        signal Data_In      : std_logic_vector(63 downto 0); -- Data input
13 9 N.Boukadid
        signal Data_Out     : std_logic_vector(68 downto 0); -- Decoded 64-bit output
14 6 N.Boukadid
 
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    signal Data_Control_In  : std_logic;                     -- Indicates whether the word is data or control
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    signal Data_Valid_In    : std_logic;
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    signal Data_Valid_Out   : std_logic;
18 9 N.Boukadid
 
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    signal CRC24_Error  : std_logic;
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    signal Flowcontrol  : std_logic;
21 6 N.Boukadid
 
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    constant CLK_PERIOD : time := 10 ns;
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begin
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  uut : entity work.Burst_Deframer
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  port map (
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    clk => clk,
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    reset => reset,
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    Deburst_En => Deburst_En,
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    Data_in => Data_in,
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    Data_out => Data_out,
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    Data_control_in => Data_control_in,
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    Data_control_out => Data_control_out,
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    CRC24_Error => CRC24_Error,
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    FIFO_Full => FIFO_Full,
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    FIFO_Data => FIFO_Data,
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    FIFO_Write => FIFO_Write,
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    Data_valid_in => Data_valid_in,
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    Data_valid_out => Data_valid_out
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  );
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   Clk_process :process
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     begin
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          clk <= '1';
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          wait for CLK_PERIOD/2;  --for half of clock period clk stays at '0'.
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          clk <= '0';
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          wait for CLK_PERIOD/2;  --for next half of clock period clk stays at '1'.
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     end process;
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    simulation : process
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    begin
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        wait for 1 ps;
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        Data_control_in <= '0';
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        deburst_en <= '1';
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        reset <= '1';
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        data_in <= (others=>'0');
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        wait for CLK_PERIOD;
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        wait for CLK_PERIOD;
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        reset <= '0';
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        Data_control_in <= '1';
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        Data_in <= X"E000_0001_0000_0000";
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        wait for CLK_PERIOD;
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        Data_control_in <= '0';
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        Data_in <= X"2800_0000_0000_0000";
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        wait for CLK_PERIOD;
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        data_in <= X"1e1e_1e1e_1e1e_1e1e";
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        wait for CLK_PERIOD;
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        Data_in <= X"4f21a2a3a4a5a6a7";
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        wait for CLK_PERIOD;
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        data_in <= X"5f5e5a5c5b60f2a0";
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        wait for CLK_PERIOD;
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        Data_control_in <= '1';
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        data_in  <= X"9000_0001_dd52_35a7";
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        wait for CLK_PERIOD;
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        Data_control_in <= '0';
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        data_in  <= X"70000FFF000000F0";
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        wait for CLK_PERIOD*2;
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        Data_in  <= X"2f5e5d5c5b5a5958";
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        wait for CLK_PERIOD;
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        wait for CLK_PERIOD;
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        Data_Control_In <= '1';
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        data_in  <= X"E000_0001_0000_0000";
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        wait for CLK_PERIOD*3;
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        Data_Control_In <= '0';
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        data_in  <= X"9486576758050505";
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        wait for CLK_PERIOD;
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        data_in <= X"60b35d5dc4a582a7";
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        wait for CLK_PERIOD;
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        Data_control_in <= '1';
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        data_in  <= X"9000_0001_dd52_35a7";
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        wait for CLK_PERIOD;
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        Data_control_in <= '0';
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        data_in <= X"2f5e5d5c5b5a5958";
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        wait for CLK_PERIOD*5;
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        Data_in <= X"1f5e5d5c5b5a5958";
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        wait for CLK_PERIOD*3;
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        Data_Control_In <= '1';
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        Data_in <= X"6400_0000_6222_431a";
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        wait for clk_period;
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        Data_control_in <= '1';
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        Data_in <= X"78f6_78f6_78f6_78f6";
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        wait for CLK_PERIOD;
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        Data_in <= X"2800_0000_0000_0000";
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        wait for CLK_PERIOD;
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        data_in <= X"1e1e_1e1e_1e1e_1e1e";
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        wait for CLK_PERIOD;
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        Data_control_in <= '0';
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        Data_in <= X"4f21a2a3a4a5a6a7";
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        wait for CLK_PERIOD;
142
 
143
        Data_control_in <= '1';
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        Data_in <= X"E000_0001_0000_0000";
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        wait for CLK_PERIOD;
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        Data_control_in <= '0';
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148
        data_in <= X"5f5e5a5c5b60f2a0";
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        wait for CLK_PERIOD;
150
 
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        data_in <= X"2f5e5d5c5b5a5958";
152
        wait for CLK_PERIOD;
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154
        Data_control_in <= '1';
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        data_in <= X"C000_0001_0000_0000";
156
        wait for CLK_PERIOD;
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        Data_control_in <= '0';
158
 
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        Data_in <= X"1f5e5d5c5b5a5958";
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        wait for CLK_PERIOD;
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162
 
163
        Data_in <= X"2f5e5d5c5b5a5958";
164
        wait for CLK_PERIOD;
165
 
166
        Data_in <= X"78f6_78f6_78f6_78f6";
167
        wait for CLK_PERIOD;
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        Data_control_in <= '1';
170
        data_in  <= X"9000_0001_dd52_35a7";
171
        wait for CLK_PERIOD;
172
        Data_control_in <= '0';
173
 
174
        Data_in <= X"2800_0000_0000_0000";
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        wait for CLK_PERIOD;
176
 
177
 
178
        data_in <= X"1e1e_1e1e_1e1e_1e1e";
179
        wait for CLK_PERIOD;
180
 
181
        Data_Control_In <= '1';
182
        data_in <= X"645e5d5c5b5a5958";
183
        wait for CLK_PERIOD;
184
 
185
        Data_in <= X"78f6_78f6_78f6_78f6";
186
        wait for CLK_PERIOD;
187
 
188
 
189
        Data_in <= X"2800_0000_0000_0000";
190
        wait for CLK_PERIOD;
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192
        Data_Control_In <= '0';
193
        data_in <= X"1e1e_1e1e_1e1e_1e1e";
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        wait for CLK_PERIOD;
195
 
196
        Data_in <= X"4f21a2a3a4a5a6a7";
197
        wait for CLK_PERIOD;
198
 
199
 
200
        data_in <= X"5f5e5a5c5b60f2a0";
201
        wait for CLK_PERIOD;
202
 
203
        data_in  <= X"635e22a3a4a5a7a7";
204
        wait for CLK_PERIOD;
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206
        data_in <= X"5f5e5a5c5b60f2a0";
207
        wait for CLK_PERIOD;
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        data_in  <= X"635e22a3a4a5a7a7";
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        wait for CLK_PERIOD;
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212
        data_in  <= X"70000FFF000000F0";
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        wait for CLK_PERIOD*2;
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215
 
216
        Data_in <= X"2f5e5d5c5b5a5958";
217
        wait for CLK_PERIOD;
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219
        data_in  <= X"8050505050050505";
220
        wait for CLK_PERIOD*3;
221
 
222
        data_in  <= X"9486576758050505";
223
        wait for CLK_PERIOD;
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225
        data_in <= X"60b35d5dc4a582a7";
226
        wait for CLK_PERIOD*60;
227
 
228
        data_in  <= X"8050505050050505";
229
        wait for CLK_PERIOD*3;
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231
        data_in  <= X"9486576758050505";
232
        wait for CLK_PERIOD;
233
 
234
 
235
        data_in <= X"60b35d5dc4a582a7";
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        wait for CLK_PERIOD;
237
 
238
 
239
        data_in <= X"2f5e5d5c5b5a5958";
240
        wait for CLK_PERIOD*12;
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242
        data_in <= X"2c8e5d5c5b5a5958";
243
        wait for CLK_PERIOD;
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245
        Data_in <= X"1f5e5d5c5b5a5958";
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        wait for CLK_PERIOD*26;
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248
        data_in <= X"2c8e5d5c5b5a5958";
249
        wait for CLK_PERIOD*18;
250
 
251
        data_in <= X"1f5e5d5c5b5a5958";
252
        wait for CLK_PERIOD;
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        wait;
254
    end process;
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256
end architecture tb_deburster;
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